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authorSebastien Guiriec <s-guiriec@ti.com>2012-10-23 04:37:10 -0400
committerBenoit Cousson <b-cousson@ti.com>2012-10-29 11:56:34 -0400
commitd7118bbd5095982ddc179387e9fd7d0524fdcf10 (patch)
treea1f99a15e7bafe830a728de52993bb886048dbad
parentf4b224f2b48e3a5203a25fe64ef46cc5c54e1604 (diff)
ARM: dts: omap5: Update I2C with address space and interrupts
Add base address and interrupt line inside Device Tree data for OMAP5 Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
-rw-r--r--arch/arm/boot/dts/omap5.dtsi14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4cd8acf32c6f..9abcff75e8b7 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -192,6 +192,8 @@
192 192
193 i2c1: i2c@48070000 { 193 i2c1: i2c@48070000 {
194 compatible = "ti,omap4-i2c"; 194 compatible = "ti,omap4-i2c";
195 reg = <0x48070000 0x100>;
196 interrupts = <0 56 0x4>;
195 #address-cells = <1>; 197 #address-cells = <1>;
196 #size-cells = <0>; 198 #size-cells = <0>;
197 ti,hwmods = "i2c1"; 199 ti,hwmods = "i2c1";
@@ -199,6 +201,8 @@
199 201
200 i2c2: i2c@48072000 { 202 i2c2: i2c@48072000 {
201 compatible = "ti,omap4-i2c"; 203 compatible = "ti,omap4-i2c";
204 reg = <0x48072000 0x100>;
205 interrupts = <0 57 0x4>;
202 #address-cells = <1>; 206 #address-cells = <1>;
203 #size-cells = <0>; 207 #size-cells = <0>;
204 ti,hwmods = "i2c2"; 208 ti,hwmods = "i2c2";
@@ -206,20 +210,26 @@
206 210
207 i2c3: i2c@48060000 { 211 i2c3: i2c@48060000 {
208 compatible = "ti,omap4-i2c"; 212 compatible = "ti,omap4-i2c";
213 reg = <0x48060000 0x100>;
214 interrupts = <0 61 0x4>;
209 #address-cells = <1>; 215 #address-cells = <1>;
210 #size-cells = <0>; 216 #size-cells = <0>;
211 ti,hwmods = "i2c3"; 217 ti,hwmods = "i2c3";
212 }; 218 };
213 219
214 i2c4: i2c@4807A000 { 220 i2c4: i2c@4807a000 {
215 compatible = "ti,omap4-i2c"; 221 compatible = "ti,omap4-i2c";
222 reg = <0x4807a000 0x100>;
223 interrupts = <0 62 0x4>;
216 #address-cells = <1>; 224 #address-cells = <1>;
217 #size-cells = <0>; 225 #size-cells = <0>;
218 ti,hwmods = "i2c4"; 226 ti,hwmods = "i2c4";
219 }; 227 };
220 228
221 i2c5: i2c@4807C000 { 229 i2c5: i2c@4807c000 {
222 compatible = "ti,omap4-i2c"; 230 compatible = "ti,omap4-i2c";
231 reg = <0x4807c000 0x100>;
232 interrupts = <0 60 0x4>;
223 #address-cells = <1>; 233 #address-cells = <1>;
224 #size-cells = <0>; 234 #size-cells = <0>;
225 ti,hwmods = "i2c5"; 235 ti,hwmods = "i2c5";