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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-27 06:30:29 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-02-13 12:31:37 -0500
commit88dcde98ad113411f45ea7e8261839f7a1ba3c33 (patch)
treea30da405718ed314da4281261a9861e5b167774f
parent59594e13e4d83239332746395fe03ba49b8efa12 (diff)
pata/at91: use newly introduced SMC accessors
pata_at91 driver is broken since faee0cc: "make smc register base soc independent" Fix it with newly introduced SMC accessors. The overall action of removal of at91_sys_read/write will allow to use the pata_at91 on a single zImage kernel. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: linux-ide@vger.kernel.org
-rw-r--r--drivers/ata/pata_at91.c48
1 files changed, 21 insertions, 27 deletions
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index a7d91a72ee35..53d3770a0b1b 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -207,11 +207,11 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
207{ 207{
208 int ret = 0; 208 int ret = 0;
209 int use_iordy; 209 int use_iordy;
210 struct sam9_smc_config smc;
210 unsigned int t6z; /* data tristate time in ns */ 211 unsigned int t6z; /* data tristate time in ns */
211 unsigned int cycle; /* SMC Cycle width in MCK ticks */ 212 unsigned int cycle; /* SMC Cycle width in MCK ticks */
212 unsigned int setup; /* SMC Setup width in MCK ticks */ 213 unsigned int setup; /* SMC Setup width in MCK ticks */
213 unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */ 214 unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
214 unsigned int cs_setup = 0;/* CS4 or CS5 setup width in MCK ticks */
215 unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/ 215 unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
216 unsigned int tdf_cycles; /* SMC TDF MCK ticks */ 216 unsigned int tdf_cycles; /* SMC TDF MCK ticks */
217 unsigned long mck_hz; /* MCK frequency in Hz */ 217 unsigned long mck_hz; /* MCK frequency in Hz */
@@ -244,26 +244,20 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
244 } 244 }
245 245
246 dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles); 246 dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
247 info->mode |= AT91_SMC_TDF_(tdf_cycles); 247
248 248 /* SMC Setup Register */
249 /* write SMC Setup Register */ 249 smc.nwe_setup = smc.nrd_setup = setup;
250 at91_sys_write(AT91_SMC_SETUP(info->cs), 250 smc.ncs_write_setup = smc.ncs_read_setup = 0;
251 AT91_SMC_NWESETUP_(setup) | 251 /* SMC Pulse Register */
252 AT91_SMC_NRDSETUP_(setup) | 252 smc.nwe_pulse = smc.nrd_pulse = pulse;
253 AT91_SMC_NCS_WRSETUP_(cs_setup) | 253 smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
254 AT91_SMC_NCS_RDSETUP_(cs_setup)); 254 /* SMC Cycle Register */
255 /* write SMC Pulse Register */ 255 smc.write_cycle = smc.read_cycle = cycle;
256 at91_sys_write(AT91_SMC_PULSE(info->cs), 256 /* SMC Mode Register*/
257 AT91_SMC_NWEPULSE_(pulse) | 257 smc.tdf_cycles = tdf_cycles;
258 AT91_SMC_NRDPULSE_(pulse) | 258 smc.mode = info->mode;
259 AT91_SMC_NCS_WRPULSE_(cs_pulse) | 259
260 AT91_SMC_NCS_RDPULSE_(cs_pulse)); 260 sam9_smc_configure(0, info->cs, &smc);
261 /* write SMC Cycle Register */
262 at91_sys_write(AT91_SMC_CYCLE(info->cs),
263 AT91_SMC_NWECYCLE_(cycle) |
264 AT91_SMC_NRDCYCLE_(cycle));
265 /* write SMC Mode Register*/
266 at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
267} 261}
268 262
269static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev) 263static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -288,20 +282,20 @@ static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
288 struct at91_ide_info *info = dev->link->ap->host->private_data; 282 struct at91_ide_info *info = dev->link->ap->host->private_data;
289 unsigned int consumed; 283 unsigned int consumed;
290 unsigned long flags; 284 unsigned long flags;
291 unsigned int mode; 285 struct sam9_smc_config smc;
292 286
293 local_irq_save(flags); 287 local_irq_save(flags);
294 mode = at91_sys_read(AT91_SMC_MODE(info->cs)); 288 sam9_smc_read_mode(0, info->cs, &smc);
295 289
296 /* set 16bit mode before writing data */ 290 /* set 16bit mode before writing data */
297 at91_sys_write(AT91_SMC_MODE(info->cs), 291 smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
298 (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16); 292 sam9_smc_write_mode(0, info->cs, &smc);
299 293
300 consumed = ata_sff_data_xfer(dev, buf, buflen, rw); 294 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
301 295
302 /* restore 8bit mode after data is written */ 296 /* restore 8bit mode after data is written */
303 at91_sys_write(AT91_SMC_MODE(info->cs), 297 smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
304 (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8); 298 sam9_smc_write_mode(0, info->cs, &smc);
305 299
306 local_irq_restore(flags); 300 local_irq_restore(flags);
307 return consumed; 301 return consumed;