diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-27 06:29:57 -0500 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-02-13 12:31:36 -0500 |
commit | 59594e13e4d83239332746395fe03ba49b8efa12 (patch) | |
tree | a60e58e60039d413b5ac73ffa64d699913f17d33 | |
parent | 2dcc90e6ac06d78433aec682961d9b587a07d4b5 (diff) |
ARM: at91: add accessor to manage SMC
SMC, Static Memory Controller will need more accessors to fine
configure its parameters.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9_smc.h | 29 | ||||
-rw-r--r-- | arch/arm/mach-at91/sam9_smc.c | 76 | ||||
-rw-r--r-- | arch/arm/mach-at91/sam9_smc.h | 23 |
3 files changed, 100 insertions, 28 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h index eb18a70fa647..175e1fdd9fe8 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h | |||
@@ -18,6 +18,35 @@ | |||
18 | 18 | ||
19 | #include <mach/cpu.h> | 19 | #include <mach/cpu.h> |
20 | 20 | ||
21 | #ifndef __ASSEMBLY__ | ||
22 | struct sam9_smc_config { | ||
23 | /* Setup register */ | ||
24 | u8 ncs_read_setup; | ||
25 | u8 nrd_setup; | ||
26 | u8 ncs_write_setup; | ||
27 | u8 nwe_setup; | ||
28 | |||
29 | /* Pulse register */ | ||
30 | u8 ncs_read_pulse; | ||
31 | u8 nrd_pulse; | ||
32 | u8 ncs_write_pulse; | ||
33 | u8 nwe_pulse; | ||
34 | |||
35 | /* Cycle register */ | ||
36 | u16 read_cycle; | ||
37 | u16 write_cycle; | ||
38 | |||
39 | /* Mode register */ | ||
40 | u32 mode; | ||
41 | u8 tdf_cycles:4; | ||
42 | }; | ||
43 | |||
44 | extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config); | ||
45 | extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config); | ||
46 | extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config); | ||
47 | extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config); | ||
48 | #endif | ||
49 | |||
21 | #define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ | 50 | #define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ |
22 | #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ | 51 | #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ |
23 | #define AT91_SMC_NWESETUP_(x) ((x) << 0) | 52 | #define AT91_SMC_NWESETUP_(x) ((x) << 0) |
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index 8294783b679d..99a0a1d2b7dc 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * linux/arch/arm/mach-at91/sam9_smc.c | 2 | * linux/arch/arm/mach-at91/sam9_smc.c |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Andrew Victor | 4 | * Copyright (C) 2008 Andrew Victor |
5 | * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -22,7 +23,22 @@ | |||
22 | 23 | ||
23 | static void __iomem *smc_base_addr[2]; | 24 | static void __iomem *smc_base_addr[2]; |
24 | 25 | ||
25 | static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) | 26 | static void sam9_smc_cs_write_mode(void __iomem *base, |
27 | struct sam9_smc_config *config) | ||
28 | { | ||
29 | __raw_writel(config->mode | ||
30 | | AT91_SMC_TDF_(config->tdf_cycles), | ||
31 | base + AT91_SMC_MODE); | ||
32 | } | ||
33 | |||
34 | void sam9_smc_write_mode(int id, int cs, | ||
35 | struct sam9_smc_config *config) | ||
36 | { | ||
37 | sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config); | ||
38 | } | ||
39 | |||
40 | static void sam9_smc_cs_configure(void __iomem *base, | ||
41 | struct sam9_smc_config *config) | ||
26 | { | 42 | { |
27 | 43 | ||
28 | /* Setup register */ | 44 | /* Setup register */ |
@@ -45,16 +61,66 @@ static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_con | |||
45 | base + AT91_SMC_CYCLE); | 61 | base + AT91_SMC_CYCLE); |
46 | 62 | ||
47 | /* Mode register */ | 63 | /* Mode register */ |
48 | __raw_writel(config->mode | 64 | sam9_smc_cs_write_mode(base, config); |
49 | | AT91_SMC_TDF_(config->tdf_cycles), | ||
50 | base + AT91_SMC_MODE); | ||
51 | } | 65 | } |
52 | 66 | ||
53 | void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) | 67 | void sam9_smc_configure(int id, int cs, |
68 | struct sam9_smc_config *config) | ||
54 | { | 69 | { |
55 | sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); | 70 | sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); |
56 | } | 71 | } |
57 | 72 | ||
73 | static void sam9_smc_cs_read_mode(void __iomem *base, | ||
74 | struct sam9_smc_config *config) | ||
75 | { | ||
76 | u32 val = __raw_readl(base + AT91_SMC_MODE); | ||
77 | |||
78 | config->mode = (val & ~AT91_SMC_NWECYCLE); | ||
79 | config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ; | ||
80 | } | ||
81 | |||
82 | void sam9_smc_read_mode(int id, int cs, | ||
83 | struct sam9_smc_config *config) | ||
84 | { | ||
85 | sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config); | ||
86 | } | ||
87 | |||
88 | static void sam9_smc_cs_read(void __iomem *base, | ||
89 | struct sam9_smc_config *config) | ||
90 | { | ||
91 | u32 val; | ||
92 | |||
93 | /* Setup register */ | ||
94 | val = __raw_readl(base + AT91_SMC_SETUP); | ||
95 | |||
96 | config->nwe_setup = val & AT91_SMC_NWESETUP; | ||
97 | config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8; | ||
98 | config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16; | ||
99 | config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24; | ||
100 | |||
101 | /* Pulse register */ | ||
102 | val = __raw_readl(base + AT91_SMC_PULSE); | ||
103 | |||
104 | config->nwe_setup = val & AT91_SMC_NWEPULSE; | ||
105 | config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8; | ||
106 | config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16; | ||
107 | config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24; | ||
108 | |||
109 | /* Cycle register */ | ||
110 | val = __raw_readl(base + AT91_SMC_CYCLE); | ||
111 | |||
112 | config->write_cycle = val & AT91_SMC_NWECYCLE; | ||
113 | config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16; | ||
114 | |||
115 | /* Mode register */ | ||
116 | sam9_smc_cs_read_mode(base, config); | ||
117 | } | ||
118 | |||
119 | void sam9_smc_read(int id, int cs, struct sam9_smc_config *config) | ||
120 | { | ||
121 | sam9_smc_cs_read(AT91_SMC_CS(id, cs), config); | ||
122 | } | ||
123 | |||
58 | void __init at91sam9_ioremap_smc(int id, u32 addr) | 124 | void __init at91sam9_ioremap_smc(int id, u32 addr) |
59 | { | 125 | { |
60 | if (id > 1) { | 126 | if (id > 1) { |
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h index 039c5ce17aec..3e52dcd4a59f 100644 --- a/arch/arm/mach-at91/sam9_smc.h +++ b/arch/arm/mach-at91/sam9_smc.h | |||
@@ -8,27 +8,4 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | struct sam9_smc_config { | ||
12 | /* Setup register */ | ||
13 | u8 ncs_read_setup; | ||
14 | u8 nrd_setup; | ||
15 | u8 ncs_write_setup; | ||
16 | u8 nwe_setup; | ||
17 | |||
18 | /* Pulse register */ | ||
19 | u8 ncs_read_pulse; | ||
20 | u8 nrd_pulse; | ||
21 | u8 ncs_write_pulse; | ||
22 | u8 nwe_pulse; | ||
23 | |||
24 | /* Cycle register */ | ||
25 | u16 read_cycle; | ||
26 | u16 write_cycle; | ||
27 | |||
28 | /* Mode register */ | ||
29 | u32 mode; | ||
30 | u8 tdf_cycles:4; | ||
31 | }; | ||
32 | |||
33 | extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config); | ||
34 | extern void __init at91sam9_ioremap_smc(int id, u32 addr); | 11 | extern void __init at91sam9_ioremap_smc(int id, u32 addr); |