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authorSrinivas Kandagatla <srinivas.kandagatla@st.com>2014-01-08 07:49:57 -0500
committerSrinivas Kandagatla <srinivas.kandagatla@st.com>2014-03-11 06:02:45 -0400
commit7ec5183a0ab1930b071c3c68a7d3b08e29b8bb78 (patch)
tree1413f4b81e41360eb5ea00ab9c8a056559293f9b
parentbdda8b05273f6b1b746d7cf1c18abec378d7f0e6 (diff)
ARM: STi: STiH415: Add interrupt support for pin controller
This patch adds interrupt support for STiH415 pin controllers. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/stih415-pinctrl.dtsi75
1 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
index e56449d41481..887c5e59c73e 100644
--- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
@@ -7,6 +7,7 @@
7 * publishhed by the Free Software Foundation. 7 * publishhed by the Free Software Foundation.
8 */ 8 */
9#include "st-pincfg.h" 9#include "st-pincfg.h"
10#include <dt-bindings/interrupt-controller/arm-gic.h>
10/ { 11/ {
11 12
12 aliases { 13 aliases {
@@ -45,35 +46,49 @@
45 #size-cells = <1>; 46 #size-cells = <1>;
46 compatible = "st,stih415-sbc-pinctrl"; 47 compatible = "st,stih415-sbc-pinctrl";
47 st,syscfg = <&syscfg_sbc>; 48 st,syscfg = <&syscfg_sbc>;
49 reg = <0xfe61f080 0x4>;
50 reg-names = "irqmux";
51 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
52 interrupts-names = "irqmux";
48 ranges = <0 0xfe610000 0x5000>; 53 ranges = <0 0xfe610000 0x5000>;
49 54
50 PIO0: gpio@fe610000 { 55 PIO0: gpio@fe610000 {
51 gpio-controller; 56 gpio-controller;
52 #gpio-cells = <1>; 57 #gpio-cells = <1>;
58 interrupt-controller;
59 #interrupt-cells = <2>;
53 reg = <0 0x100>; 60 reg = <0 0x100>;
54 st,bank-name = "PIO0"; 61 st,bank-name = "PIO0";
55 }; 62 };
56 PIO1: gpio@fe611000 { 63 PIO1: gpio@fe611000 {
57 gpio-controller; 64 gpio-controller;
58 #gpio-cells = <1>; 65 #gpio-cells = <1>;
66 interrupt-controller;
67 #interrupt-cells = <2>;
59 reg = <0x1000 0x100>; 68 reg = <0x1000 0x100>;
60 st,bank-name = "PIO1"; 69 st,bank-name = "PIO1";
61 }; 70 };
62 PIO2: gpio@fe612000 { 71 PIO2: gpio@fe612000 {
63 gpio-controller; 72 gpio-controller;
64 #gpio-cells = <1>; 73 #gpio-cells = <1>;
74 interrupt-controller;
75 #interrupt-cells = <2>;
65 reg = <0x2000 0x100>; 76 reg = <0x2000 0x100>;
66 st,bank-name = "PIO2"; 77 st,bank-name = "PIO2";
67 }; 78 };
68 PIO3: gpio@fe613000 { 79 PIO3: gpio@fe613000 {
69 gpio-controller; 80 gpio-controller;
70 #gpio-cells = <1>; 81 #gpio-cells = <1>;
82 interrupt-controller;
83 #interrupt-cells = <2>;
71 reg = <0x3000 0x100>; 84 reg = <0x3000 0x100>;
72 st,bank-name = "PIO3"; 85 st,bank-name = "PIO3";
73 }; 86 };
74 PIO4: gpio@fe614000 { 87 PIO4: gpio@fe614000 {
75 gpio-controller; 88 gpio-controller;
76 #gpio-cells = <1>; 89 #gpio-cells = <1>;
90 interrupt-controller;
91 #interrupt-cells = <2>;
77 reg = <0x4000 0x100>; 92 reg = <0x4000 0x100>;
78 st,bank-name = "PIO4"; 93 st,bank-name = "PIO4";
79 }; 94 };
@@ -111,53 +126,73 @@
111 #size-cells = <1>; 126 #size-cells = <1>;
112 compatible = "st,stih415-front-pinctrl"; 127 compatible = "st,stih415-front-pinctrl";
113 st,syscfg = <&syscfg_front>; 128 st,syscfg = <&syscfg_front>;
129 reg = <0xfee0f080 0x4>;
130 reg-names = "irqmux";
131 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
132 interrupts-names = "irqmux";
114 ranges = <0 0xfee00000 0x8000>; 133 ranges = <0 0xfee00000 0x8000>;
115 134
116 PIO5: gpio@fee00000 { 135 PIO5: gpio@fee00000 {
117 gpio-controller; 136 gpio-controller;
118 #gpio-cells = <1>; 137 #gpio-cells = <1>;
138 interrupt-controller;
139 #interrupt-cells = <2>;
119 reg = <0 0x100>; 140 reg = <0 0x100>;
120 st,bank-name = "PIO5"; 141 st,bank-name = "PIO5";
121 }; 142 };
122 PIO6: gpio@fee01000 { 143 PIO6: gpio@fee01000 {
123 gpio-controller; 144 gpio-controller;
124 #gpio-cells = <1>; 145 #gpio-cells = <1>;
146 interrupt-controller;
147 #interrupt-cells = <2>;
125 reg = <0x1000 0x100>; 148 reg = <0x1000 0x100>;
126 st,bank-name = "PIO6"; 149 st,bank-name = "PIO6";
127 }; 150 };
128 PIO7: gpio@fee02000 { 151 PIO7: gpio@fee02000 {
129 gpio-controller; 152 gpio-controller;
130 #gpio-cells = <1>; 153 #gpio-cells = <1>;
154 interrupt-controller;
155 #interrupt-cells = <2>;
131 reg = <0x2000 0x100>; 156 reg = <0x2000 0x100>;
132 st,bank-name = "PIO7"; 157 st,bank-name = "PIO7";
133 }; 158 };
134 PIO8: gpio@fee03000 { 159 PIO8: gpio@fee03000 {
135 gpio-controller; 160 gpio-controller;
136 #gpio-cells = <1>; 161 #gpio-cells = <1>;
162 interrupt-controller;
163 #interrupt-cells = <2>;
137 reg = <0x3000 0x100>; 164 reg = <0x3000 0x100>;
138 st,bank-name = "PIO8"; 165 st,bank-name = "PIO8";
139 }; 166 };
140 PIO9: gpio@fee04000 { 167 PIO9: gpio@fee04000 {
141 gpio-controller; 168 gpio-controller;
142 #gpio-cells = <1>; 169 #gpio-cells = <1>;
170 interrupt-controller;
171 #interrupt-cells = <2>;
143 reg = <0x4000 0x100>; 172 reg = <0x4000 0x100>;
144 st,bank-name = "PIO9"; 173 st,bank-name = "PIO9";
145 }; 174 };
146 PIO10: gpio@fee05000 { 175 PIO10: gpio@fee05000 {
147 gpio-controller; 176 gpio-controller;
148 #gpio-cells = <1>; 177 #gpio-cells = <1>;
178 interrupt-controller;
179 #interrupt-cells = <2>;
149 reg = <0x5000 0x100>; 180 reg = <0x5000 0x100>;
150 st,bank-name = "PIO10"; 181 st,bank-name = "PIO10";
151 }; 182 };
152 PIO11: gpio@fee06000 { 183 PIO11: gpio@fee06000 {
153 gpio-controller; 184 gpio-controller;
154 #gpio-cells = <1>; 185 #gpio-cells = <1>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
155 reg = <0x6000 0x100>; 188 reg = <0x6000 0x100>;
156 st,bank-name = "PIO11"; 189 st,bank-name = "PIO11";
157 }; 190 };
158 PIO12: gpio@fee07000 { 191 PIO12: gpio@fee07000 {
159 gpio-controller; 192 gpio-controller;
160 #gpio-cells = <1>; 193 #gpio-cells = <1>;
194 interrupt-controller;
195 #interrupt-cells = <2>;
161 reg = <0x7000 0x100>; 196 reg = <0x7000 0x100>;
162 st,bank-name = "PIO12"; 197 st,bank-name = "PIO12";
163 }; 198 };
@@ -186,41 +221,57 @@
186 #size-cells = <1>; 221 #size-cells = <1>;
187 compatible = "st,stih415-rear-pinctrl"; 222 compatible = "st,stih415-rear-pinctrl";
188 st,syscfg = <&syscfg_rear>; 223 st,syscfg = <&syscfg_rear>;
224 reg = <0xfe82f080 0x4>;
225 reg-names = "irqmux";
226 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
227 interrupts-names = "irqmux";
189 ranges = <0 0xfe820000 0x8000>; 228 ranges = <0 0xfe820000 0x8000>;
190 229
191 PIO13: gpio@fe820000 { 230 PIO13: gpio@fe820000 {
192 gpio-controller; 231 gpio-controller;
193 #gpio-cells = <1>; 232 #gpio-cells = <1>;
233 interrupt-controller;
234 #interrupt-cells = <2>;
194 reg = <0 0x100>; 235 reg = <0 0x100>;
195 st,bank-name = "PIO13"; 236 st,bank-name = "PIO13";
196 }; 237 };
197 PIO14: gpio@fe821000 { 238 PIO14: gpio@fe821000 {
198 gpio-controller; 239 gpio-controller;
199 #gpio-cells = <1>; 240 #gpio-cells = <1>;
241 interrupt-controller;
242 #interrupt-cells = <2>;
200 reg = <0x1000 0x100>; 243 reg = <0x1000 0x100>;
201 st,bank-name = "PIO14"; 244 st,bank-name = "PIO14";
202 }; 245 };
203 PIO15: gpio@fe822000 { 246 PIO15: gpio@fe822000 {
204 gpio-controller; 247 gpio-controller;
205 #gpio-cells = <1>; 248 #gpio-cells = <1>;
249 interrupt-controller;
250 #interrupt-cells = <2>;
206 reg = <0x2000 0x100>; 251 reg = <0x2000 0x100>;
207 st,bank-name = "PIO15"; 252 st,bank-name = "PIO15";
208 }; 253 };
209 PIO16: gpio@fe823000 { 254 PIO16: gpio@fe823000 {
210 gpio-controller; 255 gpio-controller;
211 #gpio-cells = <1>; 256 #gpio-cells = <1>;
257 interrupt-controller;
258 #interrupt-cells = <2>;
212 reg = <0x3000 0x100>; 259 reg = <0x3000 0x100>;
213 st,bank-name = "PIO16"; 260 st,bank-name = "PIO16";
214 }; 261 };
215 PIO17: gpio@fe824000 { 262 PIO17: gpio@fe824000 {
216 gpio-controller; 263 gpio-controller;
217 #gpio-cells = <1>; 264 #gpio-cells = <1>;
265 interrupt-controller;
266 #interrupt-cells = <2>;
218 reg = <0x4000 0x100>; 267 reg = <0x4000 0x100>;
219 st,bank-name = "PIO17"; 268 st,bank-name = "PIO17";
220 }; 269 };
221 PIO18: gpio@fe825000 { 270 PIO18: gpio@fe825000 {
222 gpio-controller; 271 gpio-controller;
223 #gpio-cells = <1>; 272 #gpio-cells = <1>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
224 reg = <0x5000 0x100>; 275 reg = <0x5000 0x100>;
225 st,bank-name = "PIO18"; 276 st,bank-name = "PIO18";
226 }; 277 };
@@ -240,23 +291,33 @@
240 #size-cells = <1>; 291 #size-cells = <1>;
241 compatible = "st,stih415-left-pinctrl"; 292 compatible = "st,stih415-left-pinctrl";
242 st,syscfg = <&syscfg_left>; 293 st,syscfg = <&syscfg_left>;
294 reg = <0xfd6bf080 0x4>;
295 reg-names = "irqmux";
296 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
297 interrupts-names = "irqmux";
243 ranges = <0 0xfd6b0000 0x3000>; 298 ranges = <0 0xfd6b0000 0x3000>;
244 299
245 PIO100: gpio@fd6b0000 { 300 PIO100: gpio@fd6b0000 {
246 gpio-controller; 301 gpio-controller;
247 #gpio-cells = <1>; 302 #gpio-cells = <1>;
303 interrupt-controller;
304 #interrupt-cells = <2>;
248 reg = <0 0x100>; 305 reg = <0 0x100>;
249 st,bank-name = "PIO100"; 306 st,bank-name = "PIO100";
250 }; 307 };
251 PIO101: gpio@fd6b1000 { 308 PIO101: gpio@fd6b1000 {
252 gpio-controller; 309 gpio-controller;
253 #gpio-cells = <1>; 310 #gpio-cells = <1>;
311 interrupt-controller;
312 #interrupt-cells = <2>;
254 reg = <0x1000 0x100>; 313 reg = <0x1000 0x100>;
255 st,bank-name = "PIO101"; 314 st,bank-name = "PIO101";
256 }; 315 };
257 PIO102: gpio@fd6b2000 { 316 PIO102: gpio@fd6b2000 {
258 gpio-controller; 317 gpio-controller;
259 #gpio-cells = <1>; 318 #gpio-cells = <1>;
319 interrupt-controller;
320 #interrupt-cells = <2>;
260 reg = <0x2000 0x100>; 321 reg = <0x2000 0x100>;
261 st,bank-name = "PIO102"; 322 st,bank-name = "PIO102";
262 }; 323 };
@@ -267,35 +328,49 @@
267 #size-cells = <1>; 328 #size-cells = <1>;
268 compatible = "st,stih415-right-pinctrl"; 329 compatible = "st,stih415-right-pinctrl";
269 st,syscfg = <&syscfg_right>; 330 st,syscfg = <&syscfg_right>;
331 reg = <0xfd33f080 0x4>;
332 reg-names = "irqmux";
333 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
334 interrupts-names = "irqmux";
270 ranges = <0 0xfd330000 0x5000>; 335 ranges = <0 0xfd330000 0x5000>;
271 336
272 PIO103: gpio@fd330000 { 337 PIO103: gpio@fd330000 {
273 gpio-controller; 338 gpio-controller;
274 #gpio-cells = <1>; 339 #gpio-cells = <1>;
340 interrupt-controller;
341 #interrupt-cells = <2>;
275 reg = <0 0x100>; 342 reg = <0 0x100>;
276 st,bank-name = "PIO103"; 343 st,bank-name = "PIO103";
277 }; 344 };
278 PIO104: gpio@fd331000 { 345 PIO104: gpio@fd331000 {
279 gpio-controller; 346 gpio-controller;
280 #gpio-cells = <1>; 347 #gpio-cells = <1>;
348 interrupt-controller;
349 #interrupt-cells = <2>;
281 reg = <0x1000 0x100>; 350 reg = <0x1000 0x100>;
282 st,bank-name = "PIO104"; 351 st,bank-name = "PIO104";
283 }; 352 };
284 PIO105: gpio@fd332000 { 353 PIO105: gpio@fd332000 {
285 gpio-controller; 354 gpio-controller;
286 #gpio-cells = <1>; 355 #gpio-cells = <1>;
356 interrupt-controller;
357 #interrupt-cells = <2>;
287 reg = <0x2000 0x100>; 358 reg = <0x2000 0x100>;
288 st,bank-name = "PIO105"; 359 st,bank-name = "PIO105";
289 }; 360 };
290 PIO106: gpio@fd333000 { 361 PIO106: gpio@fd333000 {
291 gpio-controller; 362 gpio-controller;
292 #gpio-cells = <1>; 363 #gpio-cells = <1>;
364 interrupt-controller;
365 #interrupt-cells = <2>;
293 reg = <0x3000 0x100>; 366 reg = <0x3000 0x100>;
294 st,bank-name = "PIO106"; 367 st,bank-name = "PIO106";
295 }; 368 };
296 PIO107: gpio@fd334000 { 369 PIO107: gpio@fd334000 {
297 gpio-controller; 370 gpio-controller;
298 #gpio-cells = <1>; 371 #gpio-cells = <1>;
372 interrupt-controller;
373 #interrupt-cells = <2>;
299 reg = <0x4000 0x100>; 374 reg = <0x4000 0x100>;
300 st,bank-name = "PIO107"; 375 st,bank-name = "PIO107";
301 }; 376 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 07:25:06 -0400