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authorSrinivas Kandagatla <srinivas.kandagatla@st.com>2014-01-08 07:47:52 -0500
committerSrinivas Kandagatla <srinivas.kandagatla@st.com>2014-03-11 06:02:33 -0400
commitbdda8b05273f6b1b746d7cf1c18abec378d7f0e6 (patch)
tree3805250c7e26b9cb33bbe5a0ca51d1c09c4035e9
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
ARM: STi: STiH416: Add interrupt support for pin controller
This patch adds interrupt support for STiH416 pin controllers. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/stih416-pinctrl.dtsi81
1 files changed, 81 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index b29ff4ba542c..8863c38d35b8 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -8,6 +8,7 @@
8 * publishhed by the Free Software Foundation. 8 * publishhed by the Free Software Foundation.
9 */ 9 */
10#include "st-pincfg.h" 10#include "st-pincfg.h"
11#include <dt-bindings/interrupt-controller/arm-gic.h>
11/ { 12/ {
12 13
13 aliases { 14 aliases {
@@ -49,41 +50,57 @@
49 #size-cells = <1>; 50 #size-cells = <1>;
50 compatible = "st,stih416-sbc-pinctrl"; 51 compatible = "st,stih416-sbc-pinctrl";
51 st,syscfg = <&syscfg_sbc>; 52 st,syscfg = <&syscfg_sbc>;
53 reg = <0xfe61f080 0x4>;
54 reg-names = "irqmux";
55 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
56 interrupts-names = "irqmux";
52 ranges = <0 0xfe610000 0x6000>; 57 ranges = <0 0xfe610000 0x6000>;
53 58
54 PIO0: gpio@fe610000 { 59 PIO0: gpio@fe610000 {
55 gpio-controller; 60 gpio-controller;
56 #gpio-cells = <1>; 61 #gpio-cells = <1>;
62 interrupt-controller;
63 #interrupt-cells = <2>;
57 reg = <0 0x100>; 64 reg = <0 0x100>;
58 st,bank-name = "PIO0"; 65 st,bank-name = "PIO0";
59 }; 66 };
60 PIO1: gpio@fe611000 { 67 PIO1: gpio@fe611000 {
61 gpio-controller; 68 gpio-controller;
62 #gpio-cells = <1>; 69 #gpio-cells = <1>;
70 interrupt-controller;
71 #interrupt-cells = <2>;
63 reg = <0x1000 0x100>; 72 reg = <0x1000 0x100>;
64 st,bank-name = "PIO1"; 73 st,bank-name = "PIO1";
65 }; 74 };
66 PIO2: gpio@fe612000 { 75 PIO2: gpio@fe612000 {
67 gpio-controller; 76 gpio-controller;
68 #gpio-cells = <1>; 77 #gpio-cells = <1>;
78 interrupt-controller;
79 #interrupt-cells = <2>;
69 reg = <0x2000 0x100>; 80 reg = <0x2000 0x100>;
70 st,bank-name = "PIO2"; 81 st,bank-name = "PIO2";
71 }; 82 };
72 PIO3: gpio@fe613000 { 83 PIO3: gpio@fe613000 {
73 gpio-controller; 84 gpio-controller;
74 #gpio-cells = <1>; 85 #gpio-cells = <1>;
86 interrupt-controller;
87 #interrupt-cells = <2>;
75 reg = <0x3000 0x100>; 88 reg = <0x3000 0x100>;
76 st,bank-name = "PIO3"; 89 st,bank-name = "PIO3";
77 }; 90 };
78 PIO4: gpio@fe614000 { 91 PIO4: gpio@fe614000 {
79 gpio-controller; 92 gpio-controller;
80 #gpio-cells = <1>; 93 #gpio-cells = <1>;
94 interrupt-controller;
95 #interrupt-cells = <2>;
81 reg = <0x4000 0x100>; 96 reg = <0x4000 0x100>;
82 st,bank-name = "PIO4"; 97 st,bank-name = "PIO4";
83 }; 98 };
84 PIO40: gpio@fe615000 { 99 PIO40: gpio@fe615000 {
85 gpio-controller; 100 gpio-controller;
86 #gpio-cells = <1>; 101 #gpio-cells = <1>;
102 interrupt-controller;
103 #interrupt-cells = <2>;
87 reg = <0x5000 0x100>; 104 reg = <0x5000 0x100>;
88 st,bank-name = "PIO40"; 105 st,bank-name = "PIO40";
89 st,retime-pin-mask = <0x7f>; 106 st,retime-pin-mask = <0x7f>;
@@ -122,65 +139,89 @@
122 #size-cells = <1>; 139 #size-cells = <1>;
123 compatible = "st,stih416-front-pinctrl"; 140 compatible = "st,stih416-front-pinctrl";
124 st,syscfg = <&syscfg_front>; 141 st,syscfg = <&syscfg_front>;
142 reg = <0xfee0f080 0x4>;
143 reg-names = "irqmux";
144 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
145 interrupts-names = "irqmux";
125 ranges = <0 0xfee00000 0x10000>; 146 ranges = <0 0xfee00000 0x10000>;
126 147
127 PIO5: gpio@fee00000 { 148 PIO5: gpio@fee00000 {
128 gpio-controller; 149 gpio-controller;
129 #gpio-cells = <1>; 150 #gpio-cells = <1>;
151 interrupt-controller;
152 #interrupt-cells = <2>;
130 reg = <0 0x100>; 153 reg = <0 0x100>;
131 st,bank-name = "PIO5"; 154 st,bank-name = "PIO5";
132 }; 155 };
133 PIO6: gpio@fee01000 { 156 PIO6: gpio@fee01000 {
134 gpio-controller; 157 gpio-controller;
135 #gpio-cells = <1>; 158 #gpio-cells = <1>;
159 interrupt-controller;
160 #interrupt-cells = <2>;
136 reg = <0x1000 0x100>; 161 reg = <0x1000 0x100>;
137 st,bank-name = "PIO6"; 162 st,bank-name = "PIO6";
138 }; 163 };
139 PIO7: gpio@fee02000 { 164 PIO7: gpio@fee02000 {
140 gpio-controller; 165 gpio-controller;
141 #gpio-cells = <1>; 166 #gpio-cells = <1>;
167 interrupt-controller;
168 #interrupt-cells = <2>;
142 reg = <0x2000 0x100>; 169 reg = <0x2000 0x100>;
143 st,bank-name = "PIO7"; 170 st,bank-name = "PIO7";
144 }; 171 };
145 PIO8: gpio@fee03000 { 172 PIO8: gpio@fee03000 {
146 gpio-controller; 173 gpio-controller;
147 #gpio-cells = <1>; 174 #gpio-cells = <1>;
175 interrupt-controller;
176 #interrupt-cells = <2>;
148 reg = <0x3000 0x100>; 177 reg = <0x3000 0x100>;
149 st,bank-name = "PIO8"; 178 st,bank-name = "PIO8";
150 }; 179 };
151 PIO9: gpio@fee04000 { 180 PIO9: gpio@fee04000 {
152 gpio-controller; 181 gpio-controller;
153 #gpio-cells = <1>; 182 #gpio-cells = <1>;
183 interrupt-controller;
184 #interrupt-cells = <2>;
154 reg = <0x4000 0x100>; 185 reg = <0x4000 0x100>;
155 st,bank-name = "PIO9"; 186 st,bank-name = "PIO9";
156 }; 187 };
157 PIO10: gpio@fee05000 { 188 PIO10: gpio@fee05000 {
158 gpio-controller; 189 gpio-controller;
159 #gpio-cells = <1>; 190 #gpio-cells = <1>;
191 interrupt-controller;
192 #interrupt-cells = <2>;
160 reg = <0x5000 0x100>; 193 reg = <0x5000 0x100>;
161 st,bank-name = "PIO10"; 194 st,bank-name = "PIO10";
162 }; 195 };
163 PIO11: gpio@fee06000 { 196 PIO11: gpio@fee06000 {
164 gpio-controller; 197 gpio-controller;
165 #gpio-cells = <1>; 198 #gpio-cells = <1>;
199 interrupt-controller;
200 #interrupt-cells = <2>;
166 reg = <0x6000 0x100>; 201 reg = <0x6000 0x100>;
167 st,bank-name = "PIO11"; 202 st,bank-name = "PIO11";
168 }; 203 };
169 PIO12: gpio@fee07000 { 204 PIO12: gpio@fee07000 {
170 gpio-controller; 205 gpio-controller;
171 #gpio-cells = <1>; 206 #gpio-cells = <1>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
172 reg = <0x7000 0x100>; 209 reg = <0x7000 0x100>;
173 st,bank-name = "PIO12"; 210 st,bank-name = "PIO12";
174 }; 211 };
175 PIO30: gpio@fee08000 { 212 PIO30: gpio@fee08000 {
176 gpio-controller; 213 gpio-controller;
177 #gpio-cells = <1>; 214 #gpio-cells = <1>;
215 interrupt-controller;
216 #interrupt-cells = <2>;
178 reg = <0x8000 0x100>; 217 reg = <0x8000 0x100>;
179 st,bank-name = "PIO30"; 218 st,bank-name = "PIO30";
180 }; 219 };
181 PIO31: gpio@fee09000 { 220 PIO31: gpio@fee09000 {
182 gpio-controller; 221 gpio-controller;
183 #gpio-cells = <1>; 222 #gpio-cells = <1>;
223 interrupt-controller;
224 #interrupt-cells = <2>;
184 reg = <0x9000 0x100>; 225 reg = <0x9000 0x100>;
185 st,bank-name = "PIO31"; 226 st,bank-name = "PIO31";
186 }; 227 };
@@ -217,41 +258,57 @@
217 #size-cells = <1>; 258 #size-cells = <1>;
218 compatible = "st,stih416-rear-pinctrl"; 259 compatible = "st,stih416-rear-pinctrl";
219 st,syscfg = <&syscfg_rear>; 260 st,syscfg = <&syscfg_rear>;
261 reg = <0xfe82f080 0x4>;
262 reg-names = "irqmux";
263 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
264 interrupts-names = "irqmux";
220 ranges = <0 0xfe820000 0x6000>; 265 ranges = <0 0xfe820000 0x6000>;
221 266
222 PIO13: gpio@fe820000 { 267 PIO13: gpio@fe820000 {
223 gpio-controller; 268 gpio-controller;
224 #gpio-cells = <1>; 269 #gpio-cells = <1>;
270 interrupt-controller;
271 #interrupt-cells = <2>;
225 reg = <0 0x100>; 272 reg = <0 0x100>;
226 st,bank-name = "PIO13"; 273 st,bank-name = "PIO13";
227 }; 274 };
228 PIO14: gpio@fe821000 { 275 PIO14: gpio@fe821000 {
229 gpio-controller; 276 gpio-controller;
230 #gpio-cells = <1>; 277 #gpio-cells = <1>;
278 interrupt-controller;
279 #interrupt-cells = <2>;
231 reg = <0x1000 0x100>; 280 reg = <0x1000 0x100>;
232 st,bank-name = "PIO14"; 281 st,bank-name = "PIO14";
233 }; 282 };
234 PIO15: gpio@fe822000 { 283 PIO15: gpio@fe822000 {
235 gpio-controller; 284 gpio-controller;
236 #gpio-cells = <1>; 285 #gpio-cells = <1>;
286 interrupt-controller;
287 #interrupt-cells = <2>;
237 reg = <0x2000 0x100>; 288 reg = <0x2000 0x100>;
238 st,bank-name = "PIO15"; 289 st,bank-name = "PIO15";
239 }; 290 };
240 PIO16: gpio@fe823000 { 291 PIO16: gpio@fe823000 {
241 gpio-controller; 292 gpio-controller;
242 #gpio-cells = <1>; 293 #gpio-cells = <1>;
294 interrupt-controller;
295 #interrupt-cells = <2>;
243 reg = <0x3000 0x100>; 296 reg = <0x3000 0x100>;
244 st,bank-name = "PIO16"; 297 st,bank-name = "PIO16";
245 }; 298 };
246 PIO17: gpio@fe824000 { 299 PIO17: gpio@fe824000 {
247 gpio-controller; 300 gpio-controller;
248 #gpio-cells = <1>; 301 #gpio-cells = <1>;
302 interrupt-controller;
303 #interrupt-cells = <2>;
249 reg = <0x4000 0x100>; 304 reg = <0x4000 0x100>;
250 st,bank-name = "PIO17"; 305 st,bank-name = "PIO17";
251 }; 306 };
252 PIO18: gpio@fe825000 { 307 PIO18: gpio@fe825000 {
253 gpio-controller; 308 gpio-controller;
254 #gpio-cells = <1>; 309 #gpio-cells = <1>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
255 reg = <0x5000 0x100>; 312 reg = <0x5000 0x100>;
256 st,bank-name = "PIO18"; 313 st,bank-name = "PIO18";
257 st,retime-pin-mask = <0xf>; 314 st,retime-pin-mask = <0xf>;
@@ -272,23 +329,33 @@
272 #size-cells = <1>; 329 #size-cells = <1>;
273 compatible = "st,stih416-fvdp-fe-pinctrl"; 330 compatible = "st,stih416-fvdp-fe-pinctrl";
274 st,syscfg = <&syscfg_fvdp_fe>; 331 st,syscfg = <&syscfg_fvdp_fe>;
332 reg = <0xfd6bf080 0x4>;
333 reg-names = "irqmux";
334 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
335 interrupts-names = "irqmux";
275 ranges = <0 0xfd6b0000 0x3000>; 336 ranges = <0 0xfd6b0000 0x3000>;
276 337
277 PIO100: gpio@fd6b0000 { 338 PIO100: gpio@fd6b0000 {
278 gpio-controller; 339 gpio-controller;
279 #gpio-cells = <1>; 340 #gpio-cells = <1>;
341 interrupt-controller;
342 #interrupt-cells = <2>;
280 reg = <0 0x100>; 343 reg = <0 0x100>;
281 st,bank-name = "PIO100"; 344 st,bank-name = "PIO100";
282 }; 345 };
283 PIO101: gpio@fd6b1000 { 346 PIO101: gpio@fd6b1000 {
284 gpio-controller; 347 gpio-controller;
285 #gpio-cells = <1>; 348 #gpio-cells = <1>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
286 reg = <0x1000 0x100>; 351 reg = <0x1000 0x100>;
287 st,bank-name = "PIO101"; 352 st,bank-name = "PIO101";
288 }; 353 };
289 PIO102: gpio@fd6b2000 { 354 PIO102: gpio@fd6b2000 {
290 gpio-controller; 355 gpio-controller;
291 #gpio-cells = <1>; 356 #gpio-cells = <1>;
357 interrupt-controller;
358 #interrupt-cells = <2>;
292 reg = <0x2000 0x100>; 359 reg = <0x2000 0x100>;
293 st,bank-name = "PIO102"; 360 st,bank-name = "PIO102";
294 }; 361 };
@@ -299,29 +366,41 @@
299 #size-cells = <1>; 366 #size-cells = <1>;
300 compatible = "st,stih416-fvdp-lite-pinctrl"; 367 compatible = "st,stih416-fvdp-lite-pinctrl";
301 st,syscfg = <&syscfg_fvdp_lite>; 368 st,syscfg = <&syscfg_fvdp_lite>;
369 reg = <0xfd33f080 0x4>;
370 reg-names = "irqmux";
371 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
372 interrupts-names = "irqmux";
302 ranges = <0 0xfd330000 0x5000>; 373 ranges = <0 0xfd330000 0x5000>;
303 374
304 PIO103: gpio@fd330000 { 375 PIO103: gpio@fd330000 {
305 gpio-controller; 376 gpio-controller;
306 #gpio-cells = <1>; 377 #gpio-cells = <1>;
378 interrupt-controller;
379 #interrupt-cells = <2>;
307 reg = <0 0x100>; 380 reg = <0 0x100>;
308 st,bank-name = "PIO103"; 381 st,bank-name = "PIO103";
309 }; 382 };
310 PIO104: gpio@fd331000 { 383 PIO104: gpio@fd331000 {
311 gpio-controller; 384 gpio-controller;
312 #gpio-cells = <1>; 385 #gpio-cells = <1>;
386 interrupt-controller;
387 #interrupt-cells = <2>;
313 reg = <0x1000 0x100>; 388 reg = <0x1000 0x100>;
314 st,bank-name = "PIO104"; 389 st,bank-name = "PIO104";
315 }; 390 };
316 PIO105: gpio@fd332000 { 391 PIO105: gpio@fd332000 {
317 gpio-controller; 392 gpio-controller;
318 #gpio-cells = <1>; 393 #gpio-cells = <1>;
394 interrupt-controller;
395 #interrupt-cells = <2>;
319 reg = <0x2000 0x100>; 396 reg = <0x2000 0x100>;
320 st,bank-name = "PIO105"; 397 st,bank-name = "PIO105";
321 }; 398 };
322 PIO106: gpio@fd333000 { 399 PIO106: gpio@fd333000 {
323 gpio-controller; 400 gpio-controller;
324 #gpio-cells = <1>; 401 #gpio-cells = <1>;
402 interrupt-controller;
403 #interrupt-cells = <2>;
325 reg = <0x3000 0x100>; 404 reg = <0x3000 0x100>;
326 st,bank-name = "PIO106"; 405 st,bank-name = "PIO106";
327 }; 406 };
@@ -329,6 +408,8 @@
329 PIO107: gpio@fd334000 { 408 PIO107: gpio@fd334000 {
330 gpio-controller; 409 gpio-controller;
331 #gpio-cells = <1>; 410 #gpio-cells = <1>;
411 interrupt-controller;
412 #interrupt-cells = <2>;
332 reg = <0x4000 0x100>; 413 reg = <0x4000 0x100>;
333 st,bank-name = "PIO107"; 414 st,bank-name = "PIO107";
334 st,retime-pin-mask = <0xf>; 415 st,retime-pin-mask = <0xf>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 13:14:03 -0500