Merge branch 'amd-xgbe-next'

Tom Lendacky says:

====================
amd-xgbe: AMD XGBE driver update 2014-07-25

This patch series is dependent on the following patch that was
applied to the net tree and needs to be applied to the net-next
tree:
  332cfc823d18 - amd-xgbe: Fix error return code in xgbe_probe()

The following series of patches includes fixes and new support in the
driver.

- Device bindings documentation update
- Hardware timestamp support
- 2.5GbE support changes
- Fifo sizes based on active queues/rings
- Phylib driver updates for:
  - Rate change completion check
  - KR training initiation
  - Auto-negotiation results
- Traffic class support, including DCB support

This patch series is based on net-next.

Changes in V2:
  - Remove DBGPR(...., __func__) calls
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

14 files changed, 1631 insertions, 127 deletions

diff --git a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
index d01ed63d3ebb..42409bfe04c4 100644
--- a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
+++ b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
@@ -8,10 +8,16 @@ Required properties:
    - SerDes integration registers (1/2)
    - SerDes integration registers (2/2)
 
+Optional properties:
+- amd,speed-set: Speed capabilities of the device
+    0 - 1GbE and 10GbE (default)
+    1 - 2.5GbE and 10GbE
+
 Example:
         xgbe_phy@e1240800 {
                 compatible = "amd,xgbe-phy-seattle-v1a", "ethernet-phy-ieee802.3-c45";
                 reg = <0 0xe1240800 0 0x00400>,
                       <0 0xe1250000 0 0x00060>,
                       <0 0xe1250080 0 0x00004>;
+                amd,speed-set = <0>;
         };
diff --git a/Documentation/devicetree/bindings/net/amd-xgbe.txt b/Documentation/devicetree/bindings/net/amd-xgbe.txt
index ea0c7908a3b8..41354f730beb 100644
--- a/Documentation/devicetree/bindings/net/amd-xgbe.txt
+++ b/Documentation/devicetree/bindings/net/amd-xgbe.txt
@@ -8,16 +8,21 @@ Required properties:
 - interrupt-parent: Should be the phandle for the interrupt controller
   that services interrupts for this device
 - interrupts: Should contain the amd-xgbe interrupt
-- clocks: Should be the DMA clock for the amd-xgbe device (used for
-  calculating the correct Rx interrupt watchdog timer value on a DMA
-  channel for coalescing)
-- clock-names: Should be the name of the DMA clock, "dma_clk"
+- clocks:
+   - DMA clock for the amd-xgbe device (used for calculating the
+     correct Rx interrupt watchdog timer value on a DMA channel
+     for coalescing)
+   - PTP clock for the amd-xgbe device
+- clock-names: Should be the names of the clocks
+   - "dma_clk" for the DMA clock
+   - "ptp_clk" for the PTP clock
 - phy-handle: See ethernet.txt file in the same directory
 - phy-mode: See ethernet.txt file in the same directory
 
 Optional properties:
 - mac-address: mac address to be assigned to the device. Can be overridden
   by UEFI.
+- dma-coherent: Present if dma operations are coherent
 
 Example:
         xgbe@e0700000 {
@@ -26,8 +31,8 @@ Example:
                       <0 0xe0780000 0 0x80000>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 325 4>;
-                clocks = <&xgbe_clk>;
-                clock-names = "dma_clk";
+                clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
+                clock-names = "dma_clk", "ptp_clk";
                 phy-handle = <&phy>;
                 phy-mode = "xgmii";
                 mac-address = [ 02 a1 a2 a3 a4 a5 ];
diff --git a/drivers/net/ethernet/amd/Kconfig b/drivers/net/ethernet/amd/Kconfig
index 6e314dbba805..8319c99331b0 100644
--- a/drivers/net/ethernet/amd/Kconfig
+++ b/drivers/net/ethernet/amd/Kconfig
@@ -184,6 +184,7 @@ config AMD_XGBE
         select AMD_XGBE_PHY
         select BITREVERSE
         select CRC32
+        select PTP_1588_CLOCK
         ---help---
           This driver supports the AMD 10GbE Ethernet device found on an
           AMD SoC.
@@ -191,4 +192,14 @@ config AMD_XGBE
           To compile this driver as a module, choose M here: the module
           will be called amd-xgbe.
 
+config AMD_XGBE_DCB
+        bool "Data Center Bridging (DCB) support"
+        default n
+        depends on AMD_XGBE && DCB
+        ---help---
+          Say Y here to enable Data Center Bridging (DCB) support in the
+          driver.
+
+          If unsure, say N.
+
 endif # NET_VENDOR_AMD
diff --git a/drivers/net/ethernet/amd/xgbe/Makefile b/drivers/net/ethernet/amd/xgbe/Makefile
index 26cf9af1642f..171a7e68048d 100644
--- a/drivers/net/ethernet/amd/xgbe/Makefile
+++ b/drivers/net/ethernet/amd/xgbe/Makefile
@@ -1,6 +1,8 @@
 obj-$(CONFIG_AMD_XGBE) += amd-xgbe.o
 
 amd-xgbe-objs := xgbe-main.o xgbe-drv.o xgbe-dev.o \
-                 xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o
+                 xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o \
+                 xgbe-ptp.o
 
+amd-xgbe-$(CONFIG_AMD_XGBE_DCB) += xgbe-dcb.o
 amd-xgbe-$(CONFIG_DEBUG_FS) += xgbe-debugfs.o
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
index 7ec80ac7043f..cc25a3a9e7cf 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
@@ -307,11 +307,24 @@
 #define MAC_MACA0LR                     0x0304
 #define MAC_MACA1HR                     0x0308
 #define MAC_MACA1LR                     0x030c
+#define MAC_TSCR                        0x0d00
+#define MAC_SSIR                        0x0d04
+#define MAC_STSR                        0x0d08
+#define MAC_STNR                        0x0d0c
+#define MAC_STSUR                       0x0d10
+#define MAC_STNUR                       0x0d14
+#define MAC_TSAR                        0x0d18
+#define MAC_TSSR                        0x0d20
+#define MAC_TXSNR                       0x0d30
+#define MAC_TXSSR                       0x0d34
 
 #define MAC_QTFCR_INC                   4
 #define MAC_MACA_INC                    4
 #define MAC_HTR_INC                     4
 
+#define MAC_RQC2_INC                    4
+#define MAC_RQC2_Q_PER_REG              4
+
 /* MAC register entry bit positions and sizes */
 #define MAC_HWF0R_ADDMACADRSEL_INDEX    18
 #define MAC_HWF0R_ADDMACADRSEL_WIDTH    5
@@ -351,6 +364,8 @@
 #define MAC_HWF1R_HASHTBLSZ_WIDTH       3
 #define MAC_HWF1R_L3L4FNUM_INDEX        27
 #define MAC_HWF1R_L3L4FNUM_WIDTH        4
+#define MAC_HWF1R_NUMTC_INDEX           21
+#define MAC_HWF1R_NUMTC_WIDTH           3
 #define MAC_HWF1R_RSSEN_INDEX           20
 #define MAC_HWF1R_RSSEN_WIDTH           1