Merge branch 'pci/dead-code' into next

* pci/dead-code:
  PCI: Make local functions static
  PCI: Remove unused alloc_pci_dev()
  PCI: Remove unused pci_renumber_slot()
  PCI: Remove unused pcie_aspm_enabled()
  PCI: Remove unused pci_vpd_truncate()
  PCI: Remove unused ID-Based Ordering support
  PCI: Remove unused Optimized Buffer Flush/Fill support
  PCI: Remove unused Latency Tolerance Reporting support
  PCI: Removed unused parts of Page Request Interface support

Conflicts:
	drivers/pci/pci.c
	include/linux/pci.h

11 files changed, 82 insertions, 530 deletions

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 0857ca981fae..7f8b78c08879 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -381,30 +381,6 @@ int pci_vpd_pci22_init(struct pci_dev *dev)
 }
 
 /**
- * pci_vpd_truncate - Set available Vital Product Data size
- * @dev:        pci device struct
- * @size:       available memory in bytes
- *
- * Adjust size of available VPD area.
- */
-int pci_vpd_truncate(struct pci_dev *dev, size_t size)
-{
-        if (!dev->vpd)
-                return -EINVAL;
-
-        /* limited by the access method */
-        if (size > dev->vpd->len)
-                return -EINVAL;
-
-        dev->vpd->len = size;
-        if (dev->vpd->attr)
-                dev->vpd->attr->size = size;
-
-        return 0;
-}
-EXPORT_SYMBOL(pci_vpd_truncate);
-
-/**
  * pci_cfg_access_lock - Lock PCI config reads/writes
  * @dev:        pci device struct
  *
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index e52d7ffa38b9..a8099d4d0c9d 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -235,27 +235,6 @@ void pci_disable_pri(struct pci_dev *pdev)
 EXPORT_SYMBOL_GPL(pci_disable_pri);
 
 /**
- * pci_pri_enabled - Checks if PRI capability is enabled
- * @pdev: PCI device structure
- *
- * Returns true if PRI is enabled on the device, false otherwise
- */
-bool pci_pri_enabled(struct pci_dev *pdev)
-{
-        u16 control;
-        int pos;
-
-        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
-        if (!pos)
-                return false;
-
-        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
-
-        return (control & PCI_PRI_CTRL_ENABLE) ? true : false;
-}
-EXPORT_SYMBOL_GPL(pci_pri_enabled);
-
-/**
  * pci_reset_pri - Resets device's PRI state
  * @pdev: PCI device structure
  *
@@ -282,67 +261,6 @@ int pci_reset_pri(struct pci_dev *pdev)
         return 0;
 }
 EXPORT_SYMBOL_GPL(pci_reset_pri);
-
-/**
- * pci_pri_stopped - Checks whether the PRI capability is stopped
- * @pdev: PCI device structure
- *
- * Returns true if the PRI capability on the device is disabled and the
- * device has no outstanding PRI requests, false otherwise. The device
- * indicates this via the STOPPED bit in the status register of the
- * capability.
- * The device internal state can be cleared by resetting the PRI state
- * with pci_reset_pri(). This can force the capability into the STOPPED
- * state.
- */
-bool pci_pri_stopped(struct pci_dev *pdev)
-{
-        u16 control, status;
-        int pos;
-
-        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
-        if (!pos)
-                return true;
-
-        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
-        pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
-
-        if (control & PCI_PRI_CTRL_ENABLE)
-                return false;
-
-        return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
-}
-EXPORT_SYMBOL_GPL(pci_pri_stopped);
-
-/**
- * pci_pri_status - Request PRI status of a device
- * @pdev: PCI device structure
- *
- * Returns negative value on failure, status on success. The status can
- * be checked against status-bits. Supported bits are currently:
- * PCI_PRI_STATUS_RF:      Response failure
- * PCI_PRI_STATUS_UPRGI:   Unexpected Page Request Group Index
- * PCI_PRI_STATUS_STOPPED: PRI has stopped
- */
-int pci_pri_status(struct pci_dev *pdev)
-{
-        u16 status, control;
-        int pos;
-
-        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
-        if (!pos)
-                return -EINVAL;
-
-        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
-        pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
-
-        /* Stopped bit is undefined when enable == 1, so clear it */
-        if (control & PCI_PRI_CTRL_ENABLE)
-                status &= ~PCI_PRI_STATUS_STOPPED;
-
-        return status;
-}
-EXPORT_SYMBOL_GPL(pci_pri_status);
 #endif /* CONFIG_PCI_PRI */
 
 #ifdef CONFIG_PCI_PASID
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index ffe6a6b336cf..ccb0925bcd7b 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -43,7 +43,6 @@
 extern bool pciehp_poll_mode;
 extern int pciehp_poll_time;
 extern bool pciehp_debug;
-extern bool pciehp_force;
 
 #define dbg(format, arg...)                                             \
 do {                                                                    \
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 143a389d81fa..53b58debc288 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -41,7 +41,7 @@
 bool pciehp_debug;
 bool pciehp_poll_mode;
 int pciehp_poll_time;
-bool pciehp_force;
+static bool pciehp_force;
 
 #define DRIVER_VERSION  "0.4"
 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 508e560b7d2a..1cbd590cf1d1 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -683,6 +683,28 @@ static int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state)
 }
 
 /**
+ * pci_wakeup - Wake up a PCI device
+ * @pci_dev: Device to handle.
+ * @ign: ignored parameter
+ */
+static int pci_wakeup(struct pci_dev *pci_dev, void *ign)
+{
+        pci_wakeup_event(pci_dev);
+        pm_request_resume(&pci_dev->dev);
+        return 0;
+}
+
+/**
+ * pci_wakeup_bus - Walk given bus and wake up devices on it
+ * @bus: Top bus of the subtree to walk.
+ */
+static void pci_wakeup_bus(struct pci_bus *bus)
+{
+        if (bus)
+                pci_walk_bus(bus, pci_wakeup, NULL);
+}
+
+/**
  * __pci_start_power_transition - Start power transition of a PCI device
  * @dev: PCI device to handle.
  * @state: State to put the device into.
@@ -1110,7 +1132,8 @@ EXPORT_SYMBOL_GPL(pci_store_saved_state);
  * @dev: PCI device that we're dealing with
  * @state: Saved state returned from pci_store_saved_state()
  */
-int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state)
+static int pci_load_saved_state(struct pci_dev *dev,
+                                struct pci_saved_state *state)
 {
         struct pci_cap_saved_data *cap;
 
@@ -1138,7 +1161,6 @@ int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state)
         dev->state_saved = true;
         return 0;
 }
-EXPORT_SYMBOL_GPL(pci_load_saved_state);
 
 /**
  * pci_load_and_free_saved_state - Reload the save state pointed to by state,
@@ -1570,27 +1592,6 @@ void pci_pme_wakeup_bus(struct pci_bus *bus)
                 pci_walk_bus(bus, pci_pme_wakeup, (void *)true);
 }
 
-/**
- * pci_wakeup - Wake up a PCI device
- * @pci_dev: Device to handle.
- * @ign: ignored parameter
- */
-static int pci_wakeup(struct pci_dev *pci_dev, void *ign)
-{
-        pci_wakeup_event(pci_dev);
-        pm_request_resume(&pci_dev->dev);
-        return 0;
-}
-
-/**
- * pci_wakeup_bus - Walk given bus and wake up devices on it
- * @bus: Top bus of the subtree to walk.
- */
-void pci_wakeup_bus(struct pci_bus *bus)
-{
-        if (bus)
-                pci_walk_bus(bus, pci_wakeup, NULL);
-}
 
 /**
  * pci_pme_capable - check the capability of PCI device to generate PME#
@@ -1804,7 +1805,7 @@ int pci_wake_from_d3(struct pci_dev *dev, bool enable)
  * If the platform can't manage @dev, return the deepest state from which it
  * can generate wake events, based on any available PME info.
  */
-pci_power_t pci_target_state(struct pci_dev *dev)
+static pci_power_t pci_target_state(struct pci_dev *dev)
 {
         pci_power_t target_state = PCI_D3hot;
 
@@ -2168,242 +2169,6 @@ void pci_configure_ari(struct pci_dev *dev)
         }
 }
 
-/**
- * pci_enable_ido - enable ID-based Ordering on a device
- * @dev: the PCI device
- * @type: which types of IDO to enable
- *
- * Enable ID-based ordering on @dev.  @type can contain the bits
- * %PCI_EXP_IDO_REQUEST and/or %PCI_EXP_IDO_COMPLETION to indicate
- * which types of transactions are allowed to be re-ordered.
- */
-void pci_enable_ido(struct pci_dev *dev, unsigned long type)
-{
-        u16 ctrl = 0;
-
-        if (type & PCI_EXP_IDO_REQUEST)
-                ctrl |= PCI_EXP_DEVCTL2_IDO_REQ_EN;
-        if (type & PCI_EXP_IDO_COMPLETION)
-                ctrl |= PCI_EXP_DEVCTL2_IDO_CMP_EN;
-        if (ctrl)
-                pcie_capability_set_word(dev, PCI_EXP_DEVCTL2, ctrl);
-}
-EXPORT_SYMBOL(pci_enable_ido);
-
-/**
- * pci_disable_ido - disable ID-based ordering on a device
- * @dev: the PCI device
- * @type: which types of IDO to disable
- */
-void pci_disable_ido(struct pci_dev *dev, unsigned long type)
-{
-        u16 ctrl = 0;
-
-        if (type & PCI_EXP_IDO_REQUEST)
-                ctrl |= PCI_EXP_DEVCTL2_IDO_REQ_EN;
-        if (type & PCI_EXP_IDO_COMPLETION)
-                ctrl |= PCI_EXP_DEVCTL2_IDO_CMP_EN;
-        if (ctrl)
-                pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, ctrl);
-}
-EXPORT_SYMBOL(pci_disable_ido);
-
-/**
- * pci_enable_obff - enable optimized buffer flush/fill
- * @dev: PCI device
- * @type: type of signaling to use
- *
- * Try to enable @type OBFF signaling on @dev.  It will try using WAKE#
- * signaling if possible, falling back to message signaling only if
- * WAKE# isn't supported.  @type should indicate whether the PCIe link
- * be brought out of L0s or L1 to send the message.  It should be either
- * %PCI_EXP_OBFF_SIGNAL_ALWAYS or %PCI_OBFF_SIGNAL_L0.
- *
- * If your device can benefit from receiving all messages, even at the
- * power cost of bringing the link back up from a low power state, use
- * %PCI_EXP_OBFF_SIGNAL_ALWAYS.  Otherwise, use %PCI_OBFF_SIGNAL_L0 (the
- * preferred type).
- *
- * RETURNS:
- * Zero on success, appropriate error number on failure.
- */
-int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
-{
-        u32 cap;
-        u16 ctrl;
-        int ret;
-
-        pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
-        if (!(cap & PCI_EXP_DEVCAP2_OBFF_MASK))
-                return -ENOTSUPP; /* no OBFF support at all */
-
-        /* Make sure the topology supports OBFF as well */
-        if (dev->bus->self) {
-                ret = pci_enable_obff(dev->bus->self, type);
-                if (ret)
-                        return ret;
-        }
-
-        pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &ctrl);
-        if (cap & PCI_EXP_DEVCAP2_OBFF_WAKE)
-                ctrl |= PCI_EXP_DEVCTL2_OBFF_WAKE_EN;
-        else {
-                switch (type) {
-                case PCI_EXP_OBFF_SIGNAL_L0:
-                        if (!(ctrl & PCI_EXP_DEVCTL2_OBFF_WAKE_EN))
-                                ctrl |= PCI_EXP_DEVCTL2_OBFF_MSGA_EN;
-                        break;
-                case PCI_EXP_OBFF_SIGNAL_ALWAYS:
-                        ctrl &= ~PCI_EXP_DEVCTL2_OBFF_WAKE_EN;
-                        ctrl |= PCI_EXP_DEVCTL2_OBFF_MSGB_EN;
-                        break;
-                default:
-                        WARN(1, "bad OBFF signal type\n");
-                        return -ENOTSUPP;
-                }
-        }
-        pcie_capability_write_word(dev, PCI_EXP_DEVCTL2, ctrl);
-
-        return 0;
-}
-EXPORT_SYMBOL(pci_enable_obff);
-
-/**
- * pci_disable_obff - disable optimized buffer flush/fill
- * @dev: PCI device
- *
- * Disable OBFF on @dev.
- */
-void pci_disable_obff(struct pci_dev *dev)
-{
-        pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2,
-                                   PCI_EXP_DEVCTL2_OBFF_WAKE_EN);
-}
-EXPORT_SYMBOL(pci_disable_obff);
-
-/**
- * pci_ltr_supported - check whether a device supports LTR
- * @dev: PCI device
- *
- * RETURNS:
- * True if @dev supports latency tolerance reporting, false otherwise.
- */
-static bool pci_ltr_supported(struct pci_dev *dev)
-{
-        u32 cap;
-
-        pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
-
-        return cap & PCI_EXP_DEVCAP2_LTR;
-}
-
-/**
- * pci_enable_ltr - enable latency tolerance reporting
- * @dev: PCI device
- *
- * Enable LTR on @dev if possible, which means enabling it first on
- * upstream ports.
- *
- * RETURNS:
- * Zero on success, errno on failure.
- */
-int pci_enable_ltr(struct pci_dev *dev)
-{
-        int ret;
-
-        /* Only primary function can enable/disable LTR */
-        if (PCI_FUNC(dev->devfn) != 0)
-                return -EINVAL;
-
-        if (!pci_ltr_supported(dev))
-                return -ENOTSUPP;
-
-        /* Enable upstream ports first */
-        if (dev->bus->self) {
-                ret = pci_enable_ltr(dev->bus->self);
-                if (ret)
-                        return ret;
-        }
-
-        return pcie_capability_set_word(dev, PCI_EXP_DEVCTL2,
-                                        PCI_EXP_DEVCTL2_LTR_EN);
-}
-EXPORT_SYMBOL(pci_enable_ltr);
-
-/**
- * pci_disable_ltr - disable latency tolerance reporting
- * @dev: PCI device
- */
-void pci_disable_ltr(struct pci_dev *dev)
-{
-        /* Only primary function can enable/disable LTR */
-        if (PCI_FUNC(dev->devfn) != 0)
-                return;
-
-        if (!pci_ltr_supported(dev))
-                return;
-
-        pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2,
-                                   PCI_EXP_DEVCTL2_LTR_EN);
-}
-EXPORT_SYMBOL(pci_disable_ltr);
-
-static int __pci_ltr_scale(int *val)
-{
-        int scale = 0;
-
-        while (*val > 1023) {
-                *val = (*val + 31) / 32;
-                scale++;
-        }
-        return scale;
-}
-
-/**
- * pci_set_ltr - set LTR latency values
- * @dev: PCI device
- * @snoop_lat_ns: snoop latency in nanoseconds
- * @nosnoop_lat_ns: nosnoop latency in nanoseconds
- *
- * Figure out the scale and set the LTR values accordingly.
- */
-int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns)
-{
-        int pos, ret, snoop_scale, nosnoop_scale;
-        u16 val;
-
-        if (!pci_ltr_supported(dev))
-                return -ENOTSUPP;
-
-        snoop_scale = __pci_ltr_scale(&snoop_lat_ns);
-        nosnoop_scale = __pci_ltr_scale(&nosnoop_lat_ns);
-
-        if (snoop_lat_ns > PCI_LTR_VALUE_MASK ||
-            nosnoop_lat_ns > PCI_LTR_VALUE_MASK)
-                return -EINVAL;
-
-        if ((snoop_scale > (PCI_LTR_SCALE_MASK >> PCI_LTR_SCALE_SHIFT)) ||
-            (nosnoop_scale > (PCI_LTR_SCALE_MASK >> PCI_LTR_SCALE_SHIFT)))
-                return -EINVAL;
-
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
-        if (!pos)
-                return -ENOTSUPP;
-
-        val = (snoop_scale << PCI_LTR_SCALE_SHIFT) | snoop_lat_ns;
-        ret = pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, val);
-        if (ret != 4)
-                return -EIO;
-
-        val = (nosnoop_scale << PCI_LTR_SCALE_SHIFT) | nosnoop_lat_ns;
-        ret = pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, val);
-        if (ret != 4)
-                return -EIO;
-
-        return 0;
-}
-EXPORT_SYMBOL(pci_set_ltr);
-
 static int pci_acs_enable;
 
 /**
@@ -4482,7 +4247,6 @@ EXPORT_SYMBOL(pci_restore_state);
 EXPORT_SYMBOL(pci_pme_capable);
 EXPORT_SYMBOL(pci_pme_active);
 EXPORT_SYMBOL(pci_wake_from_d3);
-EXPORT_SYMBOL(pci_target_state);
 EXPORT_SYMBOL(pci_prepare_to_sleep);
 EXPORT_SYMBOL(pci_back_from_sleep);
 EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 9c91ecc1301b..4df38df224f4 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -6,7 +6,6 @@
 #define PCI_CFG_SPACE_SIZE      256
 #define PCI_CFG_SPACE_EXP_SIZE  4096
 
-extern const unsigned char pcix_bus_speed[];
 extern const unsigned char pcie_link_speed[];
 
 /* Functions internal to the PCI core code */
@@ -68,7 +67,6 @@ void pci_power_up(struct pci_dev *dev);
 void pci_disable_enabled_device(struct pci_dev *dev);
 int pci_finish_runtime_suspend(struct pci_dev *dev);
 int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
-void pci_wakeup_bus(struct pci_bus *bus);
 void pci_config_pm_runtime_get(struct pci_dev *dev);
 void pci_config_pm_runtime_put(struct pci_dev *dev);
 void pci_pm_init(struct pci_dev *dev);
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index f1272dc54de1..e1e7026b838d 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -984,18 +984,6 @@ void pcie_no_aspm(void)
         }
 }
 
-/**
- * pcie_aspm_enabled - is PCIe ASPM enabled?
- *
- * Returns true if ASPM has not been disabled by the command-line option
- * pcie_aspm=off.
- **/
-int pcie_aspm_enabled(void)
-{
-       return !aspm_disabled;
-}
-EXPORT_SYMBOL(pcie_aspm_enabled);
-
 bool pcie_aspm_support_enabled(void)
 {
         return aspm_support_enabled;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 23cdfac0bdb3..c86c8638d3c4 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -16,7 +16,7 @@
 #define CARDBUS_LATENCY_TIMER   176     /* secondary latency timer */
 #define CARDBUS_RESERVE_BUSNR   3
 
-struct resource busn_resource = {
+static struct resource busn_resource = {
         .name   = "PCI busn",
         .start  = 0,
         .end    = 255,
@@ -518,7 +518,7 @@ static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b)
         return bridge;
 }
 
-const unsigned char pcix_bus_speed[] = {
+static const unsigned char pcix_bus_speed[] = {
         PCI_SPEED_UNKNOWN,              /* 0 */
         PCI_SPEED_66MHz_PCIX,           /* 1 */
         PCI_SPEED_100MHz_PCIX,          /* 2 */
@@ -999,6 +999,60 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev)
                 pdev->is_hotplug_bridge = 1;
 }
 
+
+/**
+ * pci_cfg_space_size - get the configuration space size of the PCI device.
+ * @dev: PCI device
+ *
+ * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
+ * have 4096 bytes.  Even if the device is capable, that doesn't mean we can
+ * access it.  Maybe we don't have a way to generate extended config space
+ * accesses, or the device is behind a reverse Express bridge.  So we try
+ * reading the dword at 0x100 which must either be 0 or a valid extended
+ * capability header.
+ */
+static int pci_cfg_space_size_ext(struct pci_dev *dev)
+{
+        u32 status;
+        int pos = PCI_CFG_SPACE_SIZE;
+
+        if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
+                goto fail;
+        if (status == 0xffffffff)
+                goto fail;
+
+        return PCI_CFG_SPACE_EXP_SIZE;
+
+ fail:
+        return PCI_CFG_SPACE_SIZE;
+}
+
+int pci_cfg_space_size(struct pci_dev *dev)
+{
+        int pos;
+        u32 status;
+        u16 class;
+
+        class = dev->class >> 8;
+        if (class == PCI_CLASS_BRIDGE_HOST)
+                return pci_cfg_space_size_ext(dev);
+
+        if (!pci_is_pcie(dev)) {
+                pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+                if (!pos)
+                        goto fail;
+
+                pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
+                if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
+                        goto fail;
+        }
+
+        return pci_cfg_space_size_ext(dev);
+
+ fail:
+        return PCI_CFG_SPACE_SIZE;
+}
+
 #define LEGACY_IO_RESOURCE      (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
 
 /**
@@ -1190,59 +1244,6 @@ static void pci_release_dev(struct device *dev)
         kfree(pci_dev);
 }
 
-/**
- * pci_cfg_space_size - get the configuration space size of the PCI device.
- * @dev: PCI device
- *
- * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
- * have 4096 bytes.  Even if the device is capable, that doesn't mean we can
- * access it.  Maybe we don't have a way to generate extended config space
- * accesses, or the device is behind a reverse Express bridge.  So we try
- * reading the dword at 0x100 which must either be 0 or a valid extended
- * capability header.
- */
-int pci_cfg_space_size_ext(struct pci_dev *dev)
-{
-        u32 status;
-        int pos = PCI_CFG_SPACE_SIZE;
-
-        if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
-                goto fail;
-        if (status == 0xffffffff)
-                goto fail;
-
-        return PCI_CFG_SPACE_EXP_SIZE;
-
- fail:
-        return PCI_CFG_SPACE_SIZE;
-}
-
-int pci_cfg_space_size(struct pci_dev *dev)
-{
-        int pos;
-        u32 status;
-        u16 class;
-
-        class = dev->class >> 8;
-        if (class == PCI_CLASS_BRIDGE_HOST)
-                return pci_cfg_space_size_ext(dev);
-
-        if (!pci_is_pcie(dev)) {
-                pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
-                if (!pos)
-                        goto fail;
-
-                pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
-                if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
-                        goto fail;
-        }
-
-        return pci_cfg_space_size_ext(dev);
-
- fail:
-        return PCI_CFG_SPACE_SIZE;
-}
-
 struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
 {
         struct pci_dev *dev;
@@ -1259,12 +1260,6 @@ struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pci_alloc_dev);
 
-struct pci_dev *alloc_pci_dev(void)
-{
-        return pci_alloc_dev(NULL);
-}
-EXPORT_SYMBOL(alloc_pci_dev);
-
 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l,
                                  int crs_timeout)
 {
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index 448ca562d1f8..7dd62fa9d0bd 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -320,32 +320,6 @@ err:
 EXPORT_SYMBOL_GPL(pci_create_slot);
 
 /**
- * pci_renumber_slot - update %struct pci_slot -> number
- * @slot: &struct pci_slot to update
- * @slot_nr: new number for slot
- *
- * The primary purpose of this interface is to allow callers who earlier
- * created a placeholder slot in pci_create_slot() by passing a -1 as
- * slot_nr, to update their %struct pci_slot with the correct @slot_nr.
- */
-void pci_renumber_slot(struct pci_slot *slot, int slot_nr)
-{
-        struct pci_slot *tmp;
-
-        down_write(&pci_bus_sem);
-
-        list_for_each_entry(tmp, &slot->bus->slots, list) {
-                WARN_ON(tmp->number == slot_nr);
-                goto out;
-        }
-
-        slot->number = slot_nr;
-out:
-        up_write(&pci_bus_sem);
-}
-EXPORT_SYMBOL_GPL(pci_renumber_slot);
-
-/**
  * pci_destroy_slot - decrement refcount for physical PCI slot
  * @slot: struct pci_slot to decrement
  *
diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h
index 68bcefd7fca0..72031785fe1d 100644
--- a/include/linux/pci-ats.h
+++ b/include/linux/pci-ats.h
@@ -56,10 +56,7 @@ static inline int pci_ats_enabled(struct pci_dev *dev)
 
 int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
 void pci_disable_pri(struct pci_dev *pdev);
-bool pci_pri_enabled(struct pci_dev *pdev);
 int pci_reset_pri(struct pci_dev *pdev);
-bool pci_pri_stopped(struct pci_dev *pdev);
-int pci_pri_status(struct pci_dev *pdev);
 
 #else /* CONFIG_PCI_PRI */
 
@@ -72,25 +69,11 @@ static inline void pci_disable_pri(struct pci_dev *pdev)
 {
 }
 
-static inline bool pci_pri_enabled(struct pci_dev *pdev)
-{
-        return false;
-}
-
 static inline int pci_reset_pri(struct pci_dev *pdev)
 {
         return -ENODEV;
 }
 
-static inline bool pci_pri_stopped(struct pci_dev *pdev)
-{
-        return true;
-}
-
-static inline int pci_pri_status(struct pci_dev *pdev)
-{
-        return -ENODEV;
-}
 #endif /* CONFIG_PCI_PRI */
 
 #ifdef CONFIG_PCI_PASID
diff --git a/include/linux/pci.h b/include/linux/pci.h
index f7d1dcc002fa..eba7764b1586 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -376,7 +376,6 @@ static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
 }
 
 struct pci_dev *pci_alloc_dev(struct pci_bus *bus);
-struct pci_dev * __deprecated alloc_pci_dev(void);
 
 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
@@ -386,8 +385,6 @@ static inline int pci_channel_offline(struct pci_dev *pdev)
         return (pdev->error_state != pci_channel_io_normal);
 }
 
-extern struct resource busn_resource;
-
 struct pci_host_bridge_window {
         struct list_head list;
         struct resource *res;           /* host bridge aperture (CPU address) */
@@ -763,7 +760,6 @@ struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
                                  const char *name,
                                  struct hotplug_slot *hotplug);
 void pci_destroy_slot(struct pci_slot *slot);
-void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
 int pci_scan_slot(struct pci_bus *bus, int devfn);
 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
@@ -974,7 +970,6 @@ void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
 int pci_save_state(struct pci_dev *dev);
 void pci_restore_state(struct pci_dev *dev);
 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
-int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
 int pci_load_and_free_saved_state(struct pci_dev *dev,
                                   struct pci_saved_state **state);
 struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap);
@@ -991,7 +986,6 @@ void pci_pme_active(struct pci_dev *dev, bool enable);
 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
                       bool runtime, bool enable);
 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
-pci_power_t pci_target_state(struct pci_dev *dev);
 int pci_prepare_to_sleep(struct pci_dev *dev);
 int pci_back_from_sleep(struct pci_dev *dev);
 bool pci_dev_run_wake(struct pci_dev *dev);
@@ -1009,22 +1003,6 @@ int pci_save_vc_state(struct pci_dev *dev);
 void pci_restore_vc_state(struct pci_dev *dev);
 void pci_allocate_vc_save_buffers(struct pci_dev *dev);
 
-#define PCI_EXP_IDO_REQUEST     (1<<0)
-#define PCI_EXP_IDO_COMPLETION  (1<<1)
-void pci_enable_ido(struct pci_dev *dev, unsigned long type);
-void pci_disable_ido(struct pci_dev *dev, unsigned long type);
-
-enum pci_obff_signal_type {
-        PCI_EXP_OBFF_SIGNAL_L0 = 0,
-        PCI_EXP_OBFF_SIGNAL_ALWAYS = 1,
-};
-int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
-void pci_disable_obff(struct pci_dev *dev);
-
-int pci_enable_ltr(struct pci_dev *dev);
-void pci_disable_ltr(struct pci_dev *dev);
-int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
-
 /* For use by arch with custom probe code */
 void set_pcie_port_type(struct pci_dev *pdev);
 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
@@ -1037,7 +1015,6 @@ unsigned int pci_rescan_bus(struct pci_bus *bus);
 /* Vital product data routines */
 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
-int pci_vpd_truncate(struct pci_dev *dev, size_t size);
 
 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
@@ -1134,7 +1111,6 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 
 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
                   void *userdata);
-int pci_cfg_space_size_ext(struct pci_dev *dev);
 int pci_cfg_space_size(struct pci_dev *dev);
 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
 void pci_setup_bridge(struct pci_bus *bus);
@@ -1250,10 +1226,8 @@ extern bool pcie_ports_auto;
 #endif
 
 #ifndef CONFIG_PCIEASPM
-static inline int pcie_aspm_enabled(void) { return 0; }
 static inline bool pcie_aspm_support_enabled(void) { return false; }
 #else
-int pcie_aspm_enabled(void);
 bool pcie_aspm_support_enabled(void);
 #endif
 
@@ -1456,23 +1430,6 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
         return 0;
 }
 
-static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
-{
-}
-
-static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
-{
-}
-
-static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
-{
-        return 0;
-}
-
-static inline void pci_disable_obff(struct pci_dev *dev)
-{
-}
-
 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
 {
         return -EIO;