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authorStephen Hemminger <stephen@networkplumber.org>2014-01-10 19:14:48 -0500
committerBjorn Helgaas <bhelgaas@google.com>2014-01-13 13:57:29 -0500
commit0b950f0f3c67e42f18c655a3ab3e36ea192635bb (patch)
tree65094ce9f4b053c0188ad08466da914a0386087d
parente2760c54a4f5131867bf1b35d59169267d35d3d0 (diff)
PCI: Make local functions static
Using 'make namespacecheck' identify code which should be declared static. Checked for users in other driver/archs as well. Compile tested only. This stops exporting the following interfaces to modules: pci_target_state() pci_load_saved_state() [bhelgaas: retained pci_find_next_ext_capability() and pci_cfg_space_size()] Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r--drivers/pci/hotplug/pciehp.h1
-rw-r--r--drivers/pci/hotplug/pciehp_core.c2
-rw-r--r--drivers/pci/pci.c54
-rw-r--r--drivers/pci/pci.h2
-rw-r--r--drivers/pci/probe.c111
-rw-r--r--include/linux/pci.h5
6 files changed, 84 insertions, 91 deletions
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 21e865ded1dc..8de88b052715 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -43,7 +43,6 @@
43extern bool pciehp_poll_mode; 43extern bool pciehp_poll_mode;
44extern int pciehp_poll_time; 44extern int pciehp_poll_time;
45extern bool pciehp_debug; 45extern bool pciehp_debug;
46extern bool pciehp_force;
47 46
48#define dbg(format, arg...) \ 47#define dbg(format, arg...) \
49do { \ 48do { \
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index bbd48bbe4e9b..67cbd3e90ffd 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -41,7 +41,7 @@
41bool pciehp_debug; 41bool pciehp_debug;
42bool pciehp_poll_mode; 42bool pciehp_poll_mode;
43int pciehp_poll_time; 43int pciehp_poll_time;
44bool pciehp_force; 44static bool pciehp_force;
45 45
46#define DRIVER_VERSION "0.4" 46#define DRIVER_VERSION "0.4"
47#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>" 47#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6db2f1a441e9..9ea31080870f 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -657,6 +657,28 @@ static int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state)
657} 657}
658 658
659/** 659/**
660 * pci_wakeup - Wake up a PCI device
661 * @pci_dev: Device to handle.
662 * @ign: ignored parameter
663 */
664static int pci_wakeup(struct pci_dev *pci_dev, void *ign)
665{
666 pci_wakeup_event(pci_dev);
667 pm_request_resume(&pci_dev->dev);
668 return 0;
669}
670
671/**
672 * pci_wakeup_bus - Walk given bus and wake up devices on it
673 * @bus: Top bus of the subtree to walk.
674 */
675static void pci_wakeup_bus(struct pci_bus *bus)
676{
677 if (bus)
678 pci_walk_bus(bus, pci_wakeup, NULL);
679}
680
681/**
660 * __pci_start_power_transition - Start power transition of a PCI device 682 * __pci_start_power_transition - Start power transition of a PCI device
661 * @dev: PCI device to handle. 683 * @dev: PCI device to handle.
662 * @state: State to put the device into. 684 * @state: State to put the device into.
@@ -835,8 +857,8 @@ EXPORT_SYMBOL(pci_choose_state);
835#define PCI_EXP_SAVE_REGS 7 857#define PCI_EXP_SAVE_REGS 7
836 858
837 859
838static struct pci_cap_saved_state *pci_find_saved_cap( 860static struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *pci_dev,
839 struct pci_dev *pci_dev, char cap) 861 char cap)
840{ 862{
841 struct pci_cap_saved_state *tmp; 863 struct pci_cap_saved_state *tmp;
842 864
@@ -1071,7 +1093,8 @@ EXPORT_SYMBOL_GPL(pci_store_saved_state);
1071 * @dev: PCI device that we're dealing with 1093 * @dev: PCI device that we're dealing with
1072 * @state: Saved state returned from pci_store_saved_state() 1094 * @state: Saved state returned from pci_store_saved_state()
1073 */ 1095 */
1074int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state) 1096static int pci_load_saved_state(struct pci_dev *dev,
1097 struct pci_saved_state *state)
1075{ 1098{
1076 struct pci_cap_saved_data *cap; 1099 struct pci_cap_saved_data *cap;
1077 1100
@@ -1099,7 +1122,6 @@ int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state)
1099 dev->state_saved = true; 1122 dev->state_saved = true;
1100 return 0; 1123 return 0;
1101} 1124}
1102EXPORT_SYMBOL_GPL(pci_load_saved_state);
1103 1125
1104/** 1126/**
1105 * pci_load_and_free_saved_state - Reload the save state pointed to by state, 1127 * pci_load_and_free_saved_state - Reload the save state pointed to by state,
@@ -1531,27 +1553,6 @@ void pci_pme_wakeup_bus(struct pci_bus *bus)
1531 pci_walk_bus(bus, pci_pme_wakeup, (void *)true); 1553 pci_walk_bus(bus, pci_pme_wakeup, (void *)true);
1532} 1554}
1533 1555
1534/**
1535 * pci_wakeup - Wake up a PCI device
1536 * @pci_dev: Device to handle.
1537 * @ign: ignored parameter
1538 */
1539static int pci_wakeup(struct pci_dev *pci_dev, void *ign)
1540{
1541 pci_wakeup_event(pci_dev);
1542 pm_request_resume(&pci_dev->dev);
1543 return 0;
1544}
1545
1546/**
1547 * pci_wakeup_bus - Walk given bus and wake up devices on it
1548 * @bus: Top bus of the subtree to walk.
1549 */
1550void pci_wakeup_bus(struct pci_bus *bus)
1551{
1552 if (bus)
1553 pci_walk_bus(bus, pci_wakeup, NULL);
1554}
1555 1556
1556/** 1557/**
1557 * pci_pme_capable - check the capability of PCI device to generate PME# 1558 * pci_pme_capable - check the capability of PCI device to generate PME#
@@ -1765,7 +1766,7 @@ int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1765 * If the platform can't manage @dev, return the deepest state from which it 1766 * If the platform can't manage @dev, return the deepest state from which it
1766 * can generate wake events, based on any available PME info. 1767 * can generate wake events, based on any available PME info.
1767 */ 1768 */
1768pci_power_t pci_target_state(struct pci_dev *dev) 1769static pci_power_t pci_target_state(struct pci_dev *dev)
1769{ 1770{
1770 pci_power_t target_state = PCI_D3hot; 1771 pci_power_t target_state = PCI_D3hot;
1771 1772
@@ -4206,7 +4207,6 @@ EXPORT_SYMBOL(pci_restore_state);
4206EXPORT_SYMBOL(pci_pme_capable); 4207EXPORT_SYMBOL(pci_pme_capable);
4207EXPORT_SYMBOL(pci_pme_active); 4208EXPORT_SYMBOL(pci_pme_active);
4208EXPORT_SYMBOL(pci_wake_from_d3); 4209EXPORT_SYMBOL(pci_wake_from_d3);
4209EXPORT_SYMBOL(pci_target_state);
4210EXPORT_SYMBOL(pci_prepare_to_sleep); 4210EXPORT_SYMBOL(pci_prepare_to_sleep);
4211EXPORT_SYMBOL(pci_back_from_sleep); 4211EXPORT_SYMBOL(pci_back_from_sleep);
4212EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state); 4212EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 9c91ecc1301b..4df38df224f4 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -6,7 +6,6 @@
6#define PCI_CFG_SPACE_SIZE 256 6#define PCI_CFG_SPACE_SIZE 256
7#define PCI_CFG_SPACE_EXP_SIZE 4096 7#define PCI_CFG_SPACE_EXP_SIZE 4096
8 8
9extern const unsigned char pcix_bus_speed[];
10extern const unsigned char pcie_link_speed[]; 9extern const unsigned char pcie_link_speed[];
11 10
12/* Functions internal to the PCI core code */ 11/* Functions internal to the PCI core code */
@@ -68,7 +67,6 @@ void pci_power_up(struct pci_dev *dev);
68void pci_disable_enabled_device(struct pci_dev *dev); 67void pci_disable_enabled_device(struct pci_dev *dev);
69int pci_finish_runtime_suspend(struct pci_dev *dev); 68int pci_finish_runtime_suspend(struct pci_dev *dev);
70int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 69int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
71void pci_wakeup_bus(struct pci_bus *bus);
72void pci_config_pm_runtime_get(struct pci_dev *dev); 70void pci_config_pm_runtime_get(struct pci_dev *dev);
73void pci_config_pm_runtime_put(struct pci_dev *dev); 71void pci_config_pm_runtime_put(struct pci_dev *dev);
74void pci_pm_init(struct pci_dev *dev); 72void pci_pm_init(struct pci_dev *dev);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a4f53b677185..7fef23ba6bc6 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -16,7 +16,7 @@
16#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ 16#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
17#define CARDBUS_RESERVE_BUSNR 3 17#define CARDBUS_RESERVE_BUSNR 3
18 18
19struct resource busn_resource = { 19static struct resource busn_resource = {
20 .name = "PCI busn", 20 .name = "PCI busn",
21 .start = 0, 21 .start = 0,
22 .end = 255, 22 .end = 255,
@@ -518,7 +518,7 @@ static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b)
518 return bridge; 518 return bridge;
519} 519}
520 520
521const unsigned char pcix_bus_speed[] = { 521static const unsigned char pcix_bus_speed[] = {
522 PCI_SPEED_UNKNOWN, /* 0 */ 522 PCI_SPEED_UNKNOWN, /* 0 */
523 PCI_SPEED_66MHz_PCIX, /* 1 */ 523 PCI_SPEED_66MHz_PCIX, /* 1 */
524 PCI_SPEED_100MHz_PCIX, /* 2 */ 524 PCI_SPEED_100MHz_PCIX, /* 2 */
@@ -999,6 +999,60 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev)
999 pdev->is_hotplug_bridge = 1; 999 pdev->is_hotplug_bridge = 1;
1000} 1000}
1001 1001
1002
1003/**
1004 * pci_cfg_space_size - get the configuration space size of the PCI device.
1005 * @dev: PCI device
1006 *
1007 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
1008 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
1009 * access it. Maybe we don't have a way to generate extended config space
1010 * accesses, or the device is behind a reverse Express bridge. So we try
1011 * reading the dword at 0x100 which must either be 0 or a valid extended
1012 * capability header.
1013 */
1014static int pci_cfg_space_size_ext(struct pci_dev *dev)
1015{
1016 u32 status;
1017 int pos = PCI_CFG_SPACE_SIZE;
1018
1019 if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
1020 goto fail;
1021 if (status == 0xffffffff)
1022 goto fail;
1023
1024 return PCI_CFG_SPACE_EXP_SIZE;
1025
1026 fail:
1027 return PCI_CFG_SPACE_SIZE;
1028}
1029
1030int pci_cfg_space_size(struct pci_dev *dev)
1031{
1032 int pos;
1033 u32 status;
1034 u16 class;
1035
1036 class = dev->class >> 8;
1037 if (class == PCI_CLASS_BRIDGE_HOST)
1038 return pci_cfg_space_size_ext(dev);
1039
1040 if (!pci_is_pcie(dev)) {
1041 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
1042 if (!pos)
1043 goto fail;
1044
1045 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
1046 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
1047 goto fail;
1048 }
1049
1050 return pci_cfg_space_size_ext(dev);
1051
1052 fail:
1053 return PCI_CFG_SPACE_SIZE;
1054}
1055
1002#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED) 1056#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
1003 1057
1004/** 1058/**
@@ -1173,59 +1227,6 @@ static void pci_release_dev(struct device *dev)
1173 kfree(pci_dev); 1227 kfree(pci_dev);
1174} 1228}
1175 1229
1176/**
1177 * pci_cfg_space_size - get the configuration space size of the PCI device.
1178 * @dev: PCI device
1179 *
1180 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
1181 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
1182 * access it. Maybe we don't have a way to generate extended config space
1183 * accesses, or the device is behind a reverse Express bridge. So we try
1184 * reading the dword at 0x100 which must either be 0 or a valid extended
1185 * capability header.
1186 */
1187int pci_cfg_space_size_ext(struct pci_dev *dev)
1188{
1189 u32 status;
1190 int pos = PCI_CFG_SPACE_SIZE;
1191
1192 if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
1193 goto fail;
1194 if (status == 0xffffffff)
1195 goto fail;
1196
1197 return PCI_CFG_SPACE_EXP_SIZE;
1198
1199 fail:
1200 return PCI_CFG_SPACE_SIZE;
1201}
1202
1203int pci_cfg_space_size(struct pci_dev *dev)
1204{
1205 int pos;
1206 u32 status;
1207 u16 class;
1208
1209 class = dev->class >> 8;
1210 if (class == PCI_CLASS_BRIDGE_HOST)
1211 return pci_cfg_space_size_ext(dev);
1212
1213 if (!pci_is_pcie(dev)) {
1214 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
1215 if (!pos)
1216 goto fail;
1217
1218 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
1219 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
1220 goto fail;
1221 }
1222
1223 return pci_cfg_space_size_ext(dev);
1224
1225 fail:
1226 return PCI_CFG_SPACE_SIZE;
1227}
1228
1229struct pci_dev *pci_alloc_dev(struct pci_bus *bus) 1230struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
1230{ 1231{
1231 struct pci_dev *dev; 1232 struct pci_dev *dev;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index bd31f51d2c8f..fd440ccd431b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -384,8 +384,6 @@ static inline int pci_channel_offline(struct pci_dev *pdev)
384 return (pdev->error_state != pci_channel_io_normal); 384 return (pdev->error_state != pci_channel_io_normal);
385} 385}
386 386
387extern struct resource busn_resource;
388
389struct pci_host_bridge_window { 387struct pci_host_bridge_window {
390 struct list_head list; 388 struct list_head list;
391 struct resource *res; /* host bridge aperture (CPU address) */ 389 struct resource *res; /* host bridge aperture (CPU address) */
@@ -971,7 +969,6 @@ void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
971int pci_save_state(struct pci_dev *dev); 969int pci_save_state(struct pci_dev *dev);
972void pci_restore_state(struct pci_dev *dev); 970void pci_restore_state(struct pci_dev *dev);
973struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); 971struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
974int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
975int pci_load_and_free_saved_state(struct pci_dev *dev, 972int pci_load_and_free_saved_state(struct pci_dev *dev,
976 struct pci_saved_state **state); 973 struct pci_saved_state **state);
977int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); 974int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
@@ -982,7 +979,6 @@ void pci_pme_active(struct pci_dev *dev, bool enable);
982int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, 979int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
983 bool runtime, bool enable); 980 bool runtime, bool enable);
984int pci_wake_from_d3(struct pci_dev *dev, bool enable); 981int pci_wake_from_d3(struct pci_dev *dev, bool enable);
985pci_power_t pci_target_state(struct pci_dev *dev);
986int pci_prepare_to_sleep(struct pci_dev *dev); 982int pci_prepare_to_sleep(struct pci_dev *dev);
987int pci_back_from_sleep(struct pci_dev *dev); 983int pci_back_from_sleep(struct pci_dev *dev);
988bool pci_dev_run_wake(struct pci_dev *dev); 984bool pci_dev_run_wake(struct pci_dev *dev);
@@ -1095,7 +1091,6 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
1095 1091
1096void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), 1092void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1097 void *userdata); 1093 void *userdata);
1098int pci_cfg_space_size_ext(struct pci_dev *dev);
1099int pci_cfg_space_size(struct pci_dev *dev); 1094int pci_cfg_space_size(struct pci_dev *dev);
1100unsigned char pci_bus_max_busnr(struct pci_bus *bus); 1095unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1101void pci_setup_bridge(struct pci_bus *bus); 1096void pci_setup_bridge(struct pci_bus *bus);