Merge tag 'integrator-pci-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc

From Linus Walleij:

This is a patch series that:
- Pulls the Integrator/AP PCI bridge driver into one file
- Adds full device tree support for it
- Keeps ATAG support around for the time being

* tag 'integrator-pci-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: integrator: basic PCIv3 device tree support
  ARM: integrator: move static ioremapping into PCIv3 driver
  ARM: integrator: move VGA base assignment
  ARM: integrator: remap PCIv3 base dynamically
  ARM: integrator: move V3 register definitions into driver
  ARM: integrator: move PCI base address grab to probe
  ARM: integrator: grab PCI error IRQ in probe()
  ARM: integrator: convert PCIv3 bridge to platform device
  ARM: integrator: merge PCIv3 driver into one file
  ARM: pci: create pci_common_init_dev()
  Documentation/devicetree: add a small note on PCI

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

13 files changed, 575 insertions, 406 deletions

diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
new file mode 100644
index 000000000000..41aeed38926d
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -0,0 +1,9 @@
+PCI bus bridges have standardized Device Tree bindings:
+
+PCI Bus Binding to: IEEE Std 1275-1994
+http://www.openfirmware.org/ofwg/bindings/pci/pci2_1.pdf
+
+And for the interrupt mapping part:
+
+Open Firmware Recommended Practice: Interrupt Mapping
+http://www.openfirmware.org/1275/practice/imap/imap0_9d.pdf
diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
new file mode 100644
index 000000000000..30b364e504ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt
@@ -0,0 +1,15 @@
+V3 Semiconductor V360 EPC PCI bridge
+
+This bridge is found in the ARM Integrator/AP (Application Platform)
+
+Integrator-specific notes:
+
+- syscon: should contain a link to the syscon device node (since
+  on the Integrator, some registers in the syscon are required to
+  operate the V3).
+
+V360 EPC specific notes:
+
+- reg: should contain the base address of the V3 adapter.
+- interrupts: should contain a reference to the V3 error interrupt
+  as routed on the system.
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 6931c4348d24..d247d1003987 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -59,6 +59,7 @@ ste	ST-Ericsson
 stericsson      ST-Ericsson
 ti      Texas Instruments
 toshiba Toshiba Corporation
+v3      V3 Semiconductor
 via     VIA Technologies, Inc.
 wlf     Wolfson Microelectronics
 wm      Wondermedia Technologies, Inc.
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index c9c3fa344647..03f23b7a0ab5 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -39,6 +39,47 @@
                 valid-mask = <0x003fffff>;
         };
 
+        pci: pciv3@62000000 {
+                compatible = "v3,v360epc-pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0x62000000 0x10000>;
+                interrupt-parent = <&pic>;
+                interrupts = <17>; /* Bus error IRQ */
+                ranges = <0x00000000 0 0x61000000 /* config space */
+                        0x61000000 0 0x00100000 /* 16 MiB @ 61000000 */
+                        0x01000000 0 0x60000000 /* I/O space */
+                        0x60000000 0 0x00100000 /* 16 MiB @ 60000000 */
+                        0x02000000 0 0x40000000 /* non-prefectable memory */
+                        0x40000000 0 0x10000000 /* 256 MiB @ 40000000 */
+                        0x42000000 0 0x50000000 /* prefetchable memory */
+                        0x50000000 0 0x10000000>; /* 256 MiB @ 50000000 */
+                interrupt-map-mask = <0xf800 0 0 0x7>;
+                interrupt-map = <
+                /* IDSEL 9 */
+                0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
+                0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
+                0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
+                0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
+                /* IDSEL 10 */
+                0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
+                0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
+                0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
+                0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
+                /* IDSEL 11 */
+                0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
+                0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
+                0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
+                0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
+                /* IDSEL 12 */
+                0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */
+                0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */
+                0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */
+                0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */
+                >;
+        };
+
         fpga {
                 /*
                  * The Integator/AP predates the idea to have magic numbers
diff --git a/arch/arm/include/asm/hardware/pci_v3.h b/arch/arm/include/asm/hardware/pci_v3.h
deleted file mode 100644
index 2811c7e2cfdf..000000000000
--- a/arch/arm/include/asm/hardware/pci_v3.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- *  arch/arm/include/asm/hardware/pci_v3.h
- *
- *  Internal header file PCI V3 chip
- *
- *  Copyright (C) ARM Limited
- *  Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef ASM_ARM_HARDWARE_PCI_V3_H
-#define ASM_ARM_HARDWARE_PCI_V3_H
-
-/* -------------------------------------------------------------------------------
- *  V3 Local Bus to PCI Bridge definitions
- * -------------------------------------------------------------------------------
- *  Registers (these are taken from page 129 of the EPC User's Manual Rev 1.04
- *  All V3 register names are prefaced by V3_ to avoid clashing with any other
- *  PCI definitions.  Their names match the user's manual.
- * 
- *  I'm assuming that I20 is disabled.
- * 
- */
-#define V3_PCI_VENDOR                   0x00000000
-#define V3_PCI_DEVICE                   0x00000002
-#define V3_PCI_CMD                      0x00000004
-#define V3_PCI_STAT                     0x00000006
-#define V3_PCI_CC_REV                   0x00000008
-#define V3_PCI_HDR_CFG                  0x0000000C
-#define V3_PCI_IO_BASE                  0x00000010
-#define V3_PCI_BASE0                    0x00000014
-#define V3_PCI_BASE1                    0x00000018
-#define V3_PCI_SUB_VENDOR               0x0000002C
-#define V3_PCI_SUB_ID                   0x0000002E
-#define V3_PCI_ROM                      0x00000030
-#define V3_PCI_BPARAM                   0x0000003C
-#define V3_PCI_MAP0                     0x00000040
-#define V3_PCI_MAP1                     0x00000044
-#define V3_PCI_INT_STAT                 0x00000048
-#define V3_PCI_INT_CFG                  0x0000004C 
-#define V3_LB_BASE0                     0x00000054
-#define V3_LB_BASE1                     0x00000058
-#define V3_LB_MAP0                      0x0000005E
-#define V3_LB_MAP1                      0x00000062
-#define V3_LB_BASE2                     0x00000064
-#define V3_LB_MAP2                      0x00000066
-#define V3_LB_SIZE                      0x00000068
-#define V3_LB_IO_BASE                   0x0000006E
-#define V3_FIFO_CFG                     0x00000070
-#define V3_FIFO_PRIORITY                0x00000072
-#define V3_FIFO_STAT                    0x00000074
-#define V3_LB_ISTAT                     0x00000076