diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2013-02-28 20:20:55 -0500 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-06-15 16:18:39 -0400 |
| commit | f55b2b56cd37fa8bcfcb75248c27094eaf09e04c (patch) | |
| tree | 6a2c06ee9b692498e823d4b6d6e4716428c3bf61 | |
| parent | ae9daf2d00ee103b257a1f3b4ea9c575b708fe7a (diff) | |
ARM: integrator: basic PCIv3 device tree support
This registers the memory ranges for I/O, non-prefetched and
prefetched memory and configuration space for the PCIv3 bridge
and let us fetch these basic memory resources from the device
tree in the device tree boot path. Remove the stepping stone
platform device. This is an either/or approach - the platform
data path is mutually exclusive to the plain platform data
path and provided addresses from the device tree have to be
correct.
This adds the interrupt-map property to the PCIv3 DTS file
and makes the bridge obtain mappings from the device tree.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt | 15 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/vendor-prefixes.txt | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/integratorap.dts | 41 | ||||
| -rw-r--r-- | arch/arm/mach-integrator/integrator_ap.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-integrator/pci_v3.c | 177 |
5 files changed, 209 insertions, 36 deletions
diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt new file mode 100644 index 000000000000..30b364e504ba --- /dev/null +++ b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt | |||
| @@ -0,0 +1,15 @@ | |||
| 1 | V3 Semiconductor V360 EPC PCI bridge | ||
| 2 | |||
| 3 | This bridge is found in the ARM Integrator/AP (Application Platform) | ||
| 4 | |||
| 5 | Integrator-specific notes: | ||
| 6 | |||
| 7 | - syscon: should contain a link to the syscon device node (since | ||
| 8 | on the Integrator, some registers in the syscon are required to | ||
| 9 | operate the V3). | ||
| 10 | |||
| 11 | V360 EPC specific notes: | ||
| 12 | |||
| 13 | - reg: should contain the base address of the V3 adapter. | ||
| 14 | - interrupts: should contain a reference to the V3 error interrupt | ||
| 15 | as routed on the system. | ||
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 6931c4348d24..d247d1003987 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt | |||
| @@ -59,6 +59,7 @@ ste ST-Ericsson | |||
| 59 | stericsson ST-Ericsson | 59 | stericsson ST-Ericsson |
| 60 | ti Texas Instruments | 60 | ti Texas Instruments |
| 61 | toshiba Toshiba Corporation | 61 | toshiba Toshiba Corporation |
| 62 | v3 V3 Semiconductor | ||
| 62 | via VIA Technologies, Inc. | 63 | via VIA Technologies, Inc. |
| 63 | wlf Wolfson Microelectronics | 64 | wlf Wolfson Microelectronics |
| 64 | wm Wondermedia Technologies, Inc. | 65 | wm Wondermedia Technologies, Inc. |
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts index c9c3fa344647..03f23b7a0ab5 100644 --- a/arch/arm/boot/dts/integratorap.dts +++ b/arch/arm/boot/dts/integratorap.dts | |||
| @@ -39,6 +39,47 @@ | |||
| 39 | valid-mask = <0x003fffff>; | 39 | valid-mask = <0x003fffff>; |
| 40 | }; | 40 | }; |
| 41 | 41 | ||
| 42 | pci: pciv3@62000000 { | ||
| 43 | compatible = "v3,v360epc-pci"; | ||
| 44 | #interrupt-cells = <1>; | ||
| 45 | #size-cells = <2>; | ||
| 46 | #address-cells = <3>; | ||
| 47 | reg = <0x62000000 0x10000>; | ||
| 48 | interrupt-parent = <&pic>; | ||
| 49 | interrupts = <17>; /* Bus error IRQ */ | ||
| 50 | ranges = <0x00000000 0 0x61000000 /* config space */ | ||
| 51 | 0x61000000 0 0x00100000 /* 16 MiB @ 61000000 */ | ||
| 52 | 0x01000000 0 0x60000000 /* I/O space */ | ||
| 53 | 0x60000000 0 0x00100000 /* 16 MiB @ 60000000 */ | ||
| 54 | 0x02000000 0 0x40000000 /* non-prefectable memory */ | ||
| 55 | 0x40000000 0 0x10000000 /* 256 MiB @ 40000000 */ | ||
| 56 | 0x42000000 0 0x50000000 /* prefetchable memory */ | ||
| 57 | 0x50000000 0 0x10000000>; /* 256 MiB @ 50000000 */ | ||
| 58 | interrupt-map-mask = <0xf800 0 0 0x7>; | ||
| 59 | interrupt-map = < | ||
| 60 | /* IDSEL 9 */ | ||
| 61 | 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */ | ||
| 62 | 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */ | ||
| 63 | 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */ | ||
| 64 | 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */ | ||
| 65 | /* IDSEL 10 */ | ||
| 66 | 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */ | ||
| 67 | 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */ | ||
| 68 | 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */ | ||
| 69 | 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */ | ||
| 70 | /* IDSEL 11 */ | ||
| 71 | 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */ | ||
| 72 | 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */ | ||
| 73 | 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */ | ||
| 74 | 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */ | ||
| 75 | /* IDSEL 12 */ | ||
| 76 | 0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */ | ||
| 77 | 0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */ | ||
| 78 | 0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */ | ||
| 79 | 0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */ | ||
| 80 | >; | ||
| 81 | }; | ||
| 82 | |||
| 42 | fpga { | 83 | fpga { |
| 43 | /* | 84 | /* |
| 44 | * The Integator/AP predates the idea to have magic numbers | 85 | * The Integator/AP predates the idea to have magic numbers |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 16f3196efdb4..a5b15c4e8def 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
| @@ -473,15 +473,6 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { | |||
| 473 | { /* sentinel */ }, | 473 | { /* sentinel */ }, |
| 474 | }; | 474 | }; |
| 475 | 475 | ||
| 476 | /* | ||
| 477 | * This is a placeholder that will get deleted when we move the PCI | ||
| 478 | * device over to the device tree. | ||
| 479 | */ | ||
| 480 | static struct platform_device pci_v3_device_of = { | ||
| 481 | .name = "pci-v3", | ||
| 482 | .id = 0, | ||
| 483 | }; | ||
| 484 | |||
| 485 | static void __init ap_init_of(void) | 476 | static void __init ap_init_of(void) |
| 486 | { | 477 | { |
| 487 | unsigned long sc_dec; | 478 | unsigned long sc_dec; |
| @@ -536,8 +527,6 @@ static void __init ap_init_of(void) | |||
| 536 | of_platform_populate(root, of_default_bus_match_table, | 527 | of_platform_populate(root, of_default_bus_match_table, |
| 537 | ap_auxdata_lookup, parent); | 528 | ap_auxdata_lookup, parent); |
| 538 | 529 | ||
| 539 | platform_device_register(&pci_v3_device_of); | ||
| 540 | |||
| 541 | sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); | 530 | sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); |
| 542 | for (i = 0; i < 4; i++) { | 531 | for (i = 0; i < 4; i++) { |
| 543 | struct lm_device *lmdev; | 532 | struct lm_device *lmdev; |
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index a3cefdebd136..a0e069d37e14 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
| @@ -28,6 +28,10 @@ | |||
| 28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
| 29 | #include <linux/io.h> | 29 | #include <linux/io.h> |
| 30 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/of.h> | ||
| 32 | #include <linux/of_address.h> | ||
| 33 | #include <linux/of_irq.h> | ||
| 34 | #include <linux/of_pci.h> | ||
| 31 | #include <video/vga.h> | 35 | #include <video/vga.h> |
| 32 | 36 | ||
| 33 | #include <mach/hardware.h> | 37 | #include <mach/hardware.h> |
| @@ -279,7 +283,12 @@ | |||
| 279 | * the mappings into PCI memory. | 283 | * the mappings into PCI memory. |
| 280 | */ | 284 | */ |
| 281 | 285 | ||
| 286 | /* Filled in by probe */ | ||
| 282 | static void __iomem *pci_v3_base; | 287 | static void __iomem *pci_v3_base; |
| 288 | static struct resource conf_mem; /* FIXME: remap this instead of static map */ | ||
| 289 | static struct resource io_mem; | ||
| 290 | static struct resource non_mem; | ||
| 291 | static struct resource pre_mem; | ||
| 283 | 292 | ||
| 284 | // V3 access routines | 293 | // V3 access routines |
| 285 | #define v3_writeb(o,v) __raw_writeb(v, pci_v3_base + (unsigned int)(o)) | 294 | #define v3_writeb(o,v) __raw_writeb(v, pci_v3_base + (unsigned int)(o)) |
| @@ -423,13 +432,13 @@ static void __iomem *v3_open_config_window(struct pci_bus *bus, | |||
| 423 | * prefetchable), this frees up base1 for re-use by | 432 | * prefetchable), this frees up base1 for re-use by |
| 424 | * configuration memory | 433 | * configuration memory |
| 425 | */ | 434 | */ |
| 426 | v3_writel(V3_LB_BASE0, v3_addr_to_lb_base(PHYS_PCI_MEM_BASE) | | 435 | v3_writel(V3_LB_BASE0, v3_addr_to_lb_base(non_mem.start) | |
| 427 | V3_LB_BASE_ADR_SIZE_512MB | V3_LB_BASE_ENABLE); | 436 | V3_LB_BASE_ADR_SIZE_512MB | V3_LB_BASE_ENABLE); |
| 428 | 437 | ||
| 429 | /* | 438 | /* |
| 430 | * Set up base1/map1 to point into configuration space. | 439 | * Set up base1/map1 to point into configuration space. |
| 431 | */ | 440 | */ |
| 432 | v3_writel(V3_LB_BASE1, v3_addr_to_lb_base(PHYS_PCI_CONFIG_BASE) | | 441 | v3_writel(V3_LB_BASE1, v3_addr_to_lb_base(conf_mem.start) | |
| 433 | V3_LB_BASE_ADR_SIZE_16MB | V3_LB_BASE_ENABLE); | 442 | V3_LB_BASE_ADR_SIZE_16MB | V3_LB_BASE_ENABLE); |
| 434 | v3_writew(V3_LB_MAP1, mapaddress); | 443 | v3_writew(V3_LB_MAP1, mapaddress); |
| 435 | 444 | ||
| @@ -441,7 +450,7 @@ static void v3_close_config_window(void) | |||
| 441 | /* | 450 | /* |
| 442 | * Reassign base1 for use by prefetchable PCI memory | 451 | * Reassign base1 for use by prefetchable PCI memory |
| 443 | */ | 452 | */ |
| 444 | v3_writel(V3_LB_BASE1, v3_addr_to_lb_base(PHYS_PCI_MEM_BASE + SZ_256M) | | 453 | v3_writel(V3_LB_BASE1, v3_addr_to_lb_base(pre_mem.start) | |
| 445 | V3_LB_BASE_ADR_SIZE_256MB | V3_LB_BASE_PREFETCH | | 454 | V3_LB_BASE_ADR_SIZE_256MB | V3_LB_BASE_PREFETCH | |
