drm/i915: Wire up gen2 CRC support

Really simple, and we don't even have working frame numbers.

v2: Actually enable it ...

v3: Review from Ville:
- Unconditionally enable the border in the CRC checksum for
  consistency with gen3+.
- Handle the "none" source to be able to disable the CRC machinery
  again.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 22 insertions, 2 deletions

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e3f09801b64d..9a4f168c9e39 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1947,6 +1947,23 @@ static int display_crc_ctl_open(struct inode *inode, struct file *file)
         return single_open(file, display_crc_ctl_show, dev);
 }
 
+static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source source,
+                                 uint32_t *val)
+{
+        switch (source) {
+        case INTEL_PIPE_CRC_SOURCE_PIPE:
+                *val = PIPE_CRC_ENABLE | PIPE_CRC_INCLUDE_BORDER_I8XX;
+                break;
+        case INTEL_PIPE_CRC_SOURCE_NONE:
+                *val = 0;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
 static int i9xx_pipe_crc_ctl_reg(struct drm_device *dev,
                                  enum intel_pipe_crc_source source,
                                  uint32_t *val)
@@ -2039,7 +2056,7 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
         u32 val;
         int ret;
 
-        if (!(INTEL_INFO(dev)->gen >= 3 && !IS_VALLEYVIEW(dev)))
+        if (IS_VALLEYVIEW(dev))
                 return -ENODEV;
 
         if (pipe_crc->source == source)
@@ -2049,7 +2066,9 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
         if (pipe_crc->source && source)
                 return -EINVAL;
 
-        if (INTEL_INFO(dev)->gen < 5)
+        if (IS_GEN2(dev))
+                ret = i8xx_pipe_crc_ctl_reg(source, &val);
+        else if (INTEL_INFO(dev)->gen < 5)
                 ret = i9xx_pipe_crc_ctl_reg(dev, source, &val);
         else if (IS_GEN5(dev) || IS_GEN6(dev))
                 ret = ilk_pipe_crc_ctl_reg(source, &val);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d0e61f0c34ce..d1fb06a6a3f0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1873,6 +1873,7 @@
 #define   PIPE_CRC_SOURCE_DP_B_G4X      (6 << 28)
 #define   PIPE_CRC_SOURCE_DP_C_G4X      (7 << 28)
 /* gen2 doesn't have source selection bits */
+#define   PIPE_CRC_INCLUDE_BORDER_I8XX  (1 << 30)
 
 #define _PIPE_CRC_RES_1_A_IVB           0x60064
 #define _PIPE_CRC_RES_2_A_IVB           0x60068