diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-16 16:55:59 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-21 12:33:49 -0400 |
commit | 4b79ebf7b2967e6e905e6e12e113a6ce9a86d045 (patch) | |
tree | 5dc7ab58a05b36173d63297159220e09ee457d59 | |
parent | 3d099a05b121727bfa797391ea1da15eb33eac16 (diff) |
drm/i915: Wire up CRC support for gen3/4
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 44 |
1 files changed, 42 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d7ee350fc6a3..e3f09801b64d 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1947,6 +1947,44 @@ static int display_crc_ctl_open(struct inode *inode, struct file *file) | |||
1947 | return single_open(file, display_crc_ctl_show, dev); | 1947 | return single_open(file, display_crc_ctl_show, dev); |
1948 | } | 1948 | } |
1949 | 1949 | ||
1950 | static int i9xx_pipe_crc_ctl_reg(struct drm_device *dev, | ||
1951 | enum intel_pipe_crc_source source, | ||
1952 | uint32_t *val) | ||
1953 | { | ||
1954 | switch (source) { | ||
1955 | case INTEL_PIPE_CRC_SOURCE_PIPE: | ||
1956 | *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_I9XX; | ||
1957 | break; | ||
1958 | case INTEL_PIPE_CRC_SOURCE_TV: | ||
1959 | if (!SUPPORTS_TV(dev)) | ||
1960 | return -EINVAL; | ||
1961 | *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_TV_PRE; | ||
1962 | break; | ||
1963 | case INTEL_PIPE_CRC_SOURCE_DP_B: | ||
1964 | if (!IS_G4X(dev)) | ||
1965 | return -EINVAL; | ||
1966 | *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_B_G4X; | ||
1967 | break; | ||
1968 | case INTEL_PIPE_CRC_SOURCE_DP_C: | ||
1969 | if (!IS_G4X(dev)) | ||
1970 | return -EINVAL; | ||
1971 | *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_G4X; | ||
1972 | break; | ||
1973 | case INTEL_PIPE_CRC_SOURCE_DP_D: | ||
1974 | if (!IS_G4X(dev)) | ||
1975 | return -EINVAL; | ||
1976 | *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_G4X; | ||
1977 | break; | ||
1978 | case INTEL_PIPE_CRC_SOURCE_NONE: | ||
1979 | *val = 0; | ||
1980 | break; | ||
1981 | default: | ||
1982 | return -EINVAL; | ||
1983 | } | ||
1984 | |||
1985 | return 0; | ||
1986 | } | ||
1987 | |||
1950 | static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source source, | 1988 | static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source source, |
1951 | uint32_t *val) | 1989 | uint32_t *val) |
1952 | { | 1990 | { |
@@ -2001,7 +2039,7 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe, | |||
2001 | u32 val; | 2039 | u32 val; |
2002 | int ret; | 2040 | int ret; |
2003 | 2041 | ||
2004 | if (!(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev))) | 2042 | if (!(INTEL_INFO(dev)->gen >= 3 && !IS_VALLEYVIEW(dev))) |
2005 | return -ENODEV; | 2043 | return -ENODEV; |
2006 | 2044 | ||
2007 | if (pipe_crc->source == source) | 2045 | if (pipe_crc->source == source) |
@@ -2011,7 +2049,9 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe, | |||
2011 | if (pipe_crc->source && source) | 2049 | if (pipe_crc->source && source) |
2012 | return -EINVAL; | 2050 | return -EINVAL; |
2013 | 2051 | ||
2014 | if (IS_GEN5(dev) || IS_GEN6(dev)) | 2052 | if (INTEL_INFO(dev)->gen < 5) |
2053 | ret = i9xx_pipe_crc_ctl_reg(dev, source, &val); | ||
2054 | else if (IS_GEN5(dev) || IS_GEN6(dev)) | ||
2015 | ret = ilk_pipe_crc_ctl_reg(source, &val); | 2055 | ret = ilk_pipe_crc_ctl_reg(source, &val); |
2016 | else | 2056 | else |
2017 | ret = ivb_pipe_crc_ctl_reg(source, &val); | 2057 | ret = ivb_pipe_crc_ctl_reg(source, &val); |