[MIPS] Fix "no space between function name and open parenthesis" warnings.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

104 files changed, 845 insertions, 845 deletions

diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 626de44bd888..d15b047d480d 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -184,7 +184,7 @@ static dbdev_tab_t dbdev_tab[] = {
 static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
 
 static dbdev_tab_t *
-find_dbdev_id (u32 id)
+find_dbdev_id(u32 id)
 {
         int i;
         dbdev_tab_t *p;
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index de5447e83849..b8638d293cf9 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -42,7 +42,7 @@ extern void (*flush_cache_all)(void);
 void au1000_restart(char *command)
 {
         /* Set all integrated peripherals to disabled states */
-        extern void board_reset (void);
+        extern void board_reset(void);
         u32 prid = read_c0_prid();
 
         printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 726c340460b6..2556399708ba 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -200,7 +200,7 @@ unsigned long cal_r4koff(void)
                 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
 
                 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
-                au_writel (0, SYS_TOYWRITE);
+                au_writel(0, SYS_TOYWRITE);
                 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
 
                 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index 8b08edb977be..99eafeada518 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -46,7 +46,7 @@
 
 static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 
-void board_reset (void)
+void board_reset(void)
 {
         /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
         bcsr->swreset = 0x0000;
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index e6bdd07cc093..4d7bcfc8cf73 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -60,11 +60,11 @@ void __init prom_init(void)
         prom_envp = (char **) fw_arg2;
 
         /* Set the platform # */
-#if     defined (CONFIG_MIPS_DB1550)
+#if     defined(CONFIG_MIPS_DB1550)
         mips_machtype = MACH_DB1550;
-#elif   defined (CONFIG_MIPS_DB1500)
+#elif   defined(CONFIG_MIPS_DB1500)
         mips_machtype = MACH_DB1500;
-#elif   defined (CONFIG_MIPS_DB1100)
+#elif   defined(CONFIG_MIPS_DB1100)
         mips_machtype = MACH_DB1100;
 #else
         mips_machtype = MACH_DB1000;
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 2c460c116570..abfc4bcddf7a 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -46,7 +46,7 @@
 extern int (*board_pci_idsel)(unsigned int devsel, int assert);
 int    mtx1_pci_idsel(unsigned int devsel, int assert);
 
-void board_reset (void)
+void board_reset(void)
 {
         /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
         au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 0aed89114bfc..5198c4f98b43 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -39,7 +39,7 @@
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1000.h>
 
-void board_reset (void)
+void board_reset(void)
 {
 }
 
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 259ca05860c3..42874a6b31d1 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -39,7 +39,7 @@
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1100.h>
 
-void board_reset (void)
+void board_reset(void)
 {
     /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
     au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index eea2092bde8d..2122515f79d7 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -57,7 +57,7 @@
 extern void _board_init_irq(void);
 extern void (*board_init_irq)(void);
 
-void board_reset (void)
+void board_reset(void)
 {
         bcsr->resets = 0;
         bcsr->system = 0;
@@ -148,7 +148,7 @@ void __init board_setup(void)
 }
 
 int
-board_au1200fb_panel (void)
+board_au1200fb_panel(void)
 {
         BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
         int p;
@@ -160,7 +160,7 @@ board_au1200fb_panel (void)
 }
 
 int
-board_au1200fb_panel_init (void)
+board_au1200fb_panel_init(void)
 {
         /* Apply power */
     BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
@@ -170,7 +170,7 @@ board_au1200fb_panel_init (void)
 }
 
 int
-board_au1200fb_panel_shutdown (void)
+board_au1200fb_panel_shutdown(void)
 {
         /* Remove power */
     BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index a2d850db8902..5446836869d6 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -39,7 +39,7 @@
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1500.h>
 
-void board_reset (void)
+void board_reset(void)
 {
     /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
     au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/au1000/pb1550/board_setup.c
index 05fd27dc24e6..e3cfb0d73180 100644
--- a/arch/mips/au1000/pb1550/board_setup.c
+++ b/arch/mips/au1000/pb1550/board_setup.c
@@ -44,7 +44,7 @@
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-pb1x00/pb1550.h>
 
-void board_reset (void)
+void board_reset(void)
 {
     /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
         au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index ae3d6b19e94d..a9237f41933d 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -39,7 +39,7 @@
 #include <asm/pgtable.h>
 #include <asm/au1000.h>
 
-void board_reset (void)
+void board_reset(void)
 {
         /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
         au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 68be19d1802e..404ca9284b30 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -216,7 +216,7 @@ static int __init excite_platform_init(void)
         titan_writel(0x80021dff, GXCFG);        /* XDMA reset */
         titan_writel(0x00000000, CPXCISRA);
         titan_writel(0x00000000, CPXCISRB);     /* clear pending interrupts */
-#if defined (CONFIG_HIGHMEM)
+#if defined(CONFIG_HIGHMEM)
 #       error change for HIGHMEM support!
 #else
         titan_writel(0x00000000, GXDMADRPFX);   /* buffer address prefix */
@@ -262,12 +262,12 @@ void __init plat_mem_setup(void)
         add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
 
         /* Set up the peripheral address map */
-        *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0;
-        *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0;
-        *(boot_ocd_base + (LKB11 / sizeof (u32))) = 0;
-        *(boot_ocd_base + (LKB12 / sizeof (u32))) = 0;
+        *(boot_ocd_base + (LKB9 / sizeof(u32))) = 0;
+        *(boot_ocd_base + (LKB10 / sizeof(u32))) = 0;
+        *(boot_ocd_base + (LKB11 / sizeof(u32))) = 0;
+        *(boot_ocd_base + (LKB12 / sizeof(u32))) = 0;
         wmb();
-        *(boot_ocd_base + (LKB0 / sizeof (u32))) = EXCITE_PHYS_OCD >> 4;
+        *(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4;
         wmb();
 
         ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);
diff --git a/arch/mips/boot/addinitrd.c b/arch/mips/boot/addinitrd.c
index 8b3033304770..193e4be52e79 100644
--- a/arch/mips/boot/addinitrd.c
+++ b/arch/mips/boot/addinitrd.c
@@ -32,13 +32,13 @@
 
 #define SWAB(a) (swab ? swab32(a) : (a))
 
-void die (char *s)
+void die(char *s)
 {
-        perror (s);
-        exit (1);
+        perror(s);
+        exit(1);
 }
 
-int main (int argc, char *argv[])
+int main(int argc, char *argv[])
 {
         int fd_vmlinux,fd_initrd,fd_outfile;
         FILHDR efile;
@@ -52,18 +52,18 @@ int main (int argc, char *argv[])
         int swab = 0;
 
         if (argc != 4) {
-                printf ("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]);
-                exit (1);
+                printf("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]);
+                exit(1);
         }
 
         if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0)
-                 die ("open vmlinux");
+                 die("open vmlinux");
         if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
-                die ("read file header");
+                die("read file header");
         if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout)
-                die ("read aout header");
+                die("read aout header");
         if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs)
-                die ("read section headers");
+                die("read section headers");
         /*
          * check whether the file is good for us
          */
@@ -82,13 +82,13 @@ int main (int argc, char *argv[])
 
         /* make sure we have an empty data segment for the initrd */
         if (eaout.dsize || esecs[1].s_size) {
-                fprintf (stderr, "Data segment not empty. Giving up!\n");
-                exit (1);
+                fprintf(stderr, "Data segment not empty. Giving up!\n");
+                exit(1);
         }
         if ((fd_initrd = open (argv[2], O_RDONLY)) < 0)
-                die ("open initrd");
+                die("open initrd");
         if (fstat (fd_initrd, &st) < 0)
-                die ("fstat initrd");
+                die("fstat initrd");
         loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)
                         + MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8;
         if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)))
@@ -99,33 +99,33 @@ int main (int argc, char *argv[])
         eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr);
 
         if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC,0666)) < 0)
-                die ("open outfile");
+                die("open outfile");
         if (write (fd_outfile, &efile, sizeof efile) != sizeof efile)
-                die ("write file header");
+                die("write file header");
         if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout)
-                die ("write aout header");
+                die("write aout header");
         if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs)
-                die ("write section headers");
+                die("write section headers");
         /* skip padding */
         if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
-                die ("lseek vmlinux");
+                die("lseek vmlinux");
         if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
-                die ("lseek outfile");
+                die("lseek outfile");
         /* copy text segment */
         cnt = SWAB(eaout.tsize);
         while (cnt) {
                 if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0)
-                        die ("read vmlinux");
+                        die("read vmlinux");
                 if (write (fd_outfile, buf, i) != i)
-                        die ("write vmlinux");
+                        die("write vmlinux");
                 cnt -= i;
         }
         if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header)
-                die ("write initrd header");
+                die("write initrd header");
         while ((i = read (fd_initrd, buf, sizeof buf)) > 0)
                 if (write (fd_outfile, buf, i) != i)
-                        die ("write initrd");
-        close (fd_vmlinux);
-        close (fd_initrd);
+                        die("write initrd");
+        close(fd_vmlinux);
+        close(fd_initrd);
         return 0;
 }
diff --git a/arch/mips/fw/arc/memory.c b/arch/mips/fw/arc/memory.c
index 83d15791ef6a..8b8eea2b6cf6 100644
--- a/arch/mips/fw/arc/memory.c
+++ b/arch/mips/fw/arc/memory.c
@@ -63,7 +63,7 @@ static char *arc_mtypes[8] = {
                                                 : arc_mtypes[a.arc]
 #endif
 
-static inline int memtype_classify_arcs (union linux_memtypes type)
+static inline int memtype_classify_arcs(union linux_memtypes type)
 {
         switch (type.arcs) {
         case arcs_fcontig:
@@ -83,7 +83,7 @@ static inline int memtype_classify_arcs (union linux_memtypes type)
         while(1);                               /* Nuke warning.  */
 }
 
-static inline int memtype_classify_arc (union linux_memtypes type)
+static inline int memtype_classify_arc(union linux_memtypes type)
 {
         switch (type.arc) {
         case arc_free:
@@ -103,7 +103,7 @@ static inline int memtype_classify_arc (union linux_memtypes type)
         while(1);                               /* Nuke warning.  */
 }
 
-static int __init prom_memtype_classify (union linux_memtypes type)
+static int __init prom_memtype_classify(union linux_memtypes type)
 {
         if (prom_flags & PROM_FLAG_ARCS)        /* SGI is ``different'' ... */
                 return memtype_classify_arcs(type);
diff --git a/arch/mips/jazz/reset.c b/arch/mips/jazz/reset.c
index d8ade85060b3..dd889fe86bd1 100644
--- a/arch/mips/jazz/reset.c
+++ b/arch/mips/jazz/reset.c
@@ -49,8 +49,8 @@ void jazz_machine_restart(char *command)
 {
         while(1) {
                 kb_wait();
-                jazz_write_command (0xd1);
+                jazz_write_command(0xd1);
                 kb_wait();
-                jazz_write_output (0x00);
+                jazz_write_output(0x00);
         }
 }
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index 2a7ec08b6bad..cfc7dce78dab 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -74,11 +74,11 @@ void __init plat_mem_setup(void)
         int i;
 
         /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
-        add_wired_entry (0x02000017, 0x03c00017, 0xe0000000, PM_64K);
+        add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
         /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
-        add_wired_entry (0x02400017, 0x02440017, 0xe2000000, PM_16M);
+        add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
         /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
-        add_wired_entry (0x01800017, 0x01000017, 0xe4000000, PM_4M);
+        add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
 
         set_io_port_base(JAZZ_PORT_BASE);
 #ifdef CONFIG_EISA
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 6648fde20b96..af78456d4138 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -29,7 +29,7 @@ static inline void align_mod(const int align, const int mod)
                 ".endr\n\t"
                 ".set   pop"
                 :
-                : GCC_IMM_ASM (align), GCC_IMM_ASM (mod));
+                : GCC_IMM_ASM(align), GCC_IMM_ASM(mod));
 }
 
 static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index cb5623aad552..989d06c3827b 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -733,7 +733,7 @@ static int kgdb_smp_call_kgdb_wait(void)
  * returns 1 if you should skip the instruction at the trap address, 0
  * otherwise.
  */
-void handle_exception (struct gdb_regs *regs)
+void handle_exception(struct gdb_regs *regs)
 {
         int trap;                       /* Trap type */
         int sigval;
@@ -917,7 +917,7 @@ void handle_exception (struct gdb_regs *regs)
                                 && hexToInt(&ptr, &length)) {
                                 if (mem2hex((char *)addr, output_buffer, length, 1))
                                         break;
-                                strcpy (output_buffer, "E03");
+                                strcpy(output_buffer, "E03");
                         } else
                                 strcpy(output_buffer,"E01");
                         break;
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index b6e5bb41b06b..a860b21e63e9 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -329,7 +329,7 @@ static struct resource pic2_io_resource = {
  * driver compatibility reasons interrupts 0 - 15 to be the i8259
  * interrupts even if the hardware uses a different interrupt numbering.
  */
-void __init init_i8259_irqs (void)
+void __init init_i8259_irqs(void)
 {
         int i;
 
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 403d96f99e77..e3b4b547a822 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -203,8 +203,8 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
          * Put the ELF interpreter info on the stack
          */
 #define NEW_AUX_ENT(nr, id, val) \
-          __put_user ((id), sp+(nr*2)); \
-          __put_user ((val), sp+(nr*2+1)); \
+          __put_user((id), sp+(nr*2)); \
+          __put_user((val), sp+(nr*2+1)); \
 
         sp -= 2;
         NEW_AUX_ENT(0, AT_NULL, 0);
@@ -212,17 +212,17 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
         if (exec) {
                 sp -= 11*2;
 
-                NEW_AUX_ENT (0, AT_PHDR, load_addr + exec->e_phoff);
-                NEW_AUX_ENT (1, AT_PHENT, sizeof (struct elf_phdr));
-                NEW_AUX_ENT (2, AT_PHNUM, exec->e_phnum);
-                NEW_AUX_ENT (3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
-                NEW_AUX_ENT (4, AT_BASE, interp_load_addr);
-                NEW_AUX_ENT (5, AT_FLAGS, 0);
-                NEW_AUX_ENT (6, AT_ENTRY, (elf_addr_t) exec->e_entry);
-                NEW_AUX_ENT (7, AT_UID, (elf_addr_t) current->uid);
-                NEW_AUX_ENT (8, AT_EUID, (elf_addr_t) current->euid);
-                NEW_AUX_ENT (9, AT_GID, (elf_addr_t) current->gid);
-                NEW_AUX_ENT (10, AT_EGID, (elf_addr_t) current->egid);
+                NEW_AUX_ENT(0, AT_PHDR, load_addr + exec->e_phoff);
+                NEW_AUX_ENT(1, AT_PHENT, sizeof(struct elf_phdr));
+                NEW_AUX_ENT(2, AT_PHNUM, exec->e_phnum);
+                NEW_AUX_ENT(3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
+                NEW_AUX_ENT(4, AT_BASE, interp_load_addr);
+                NEW_AUX_ENT(5, AT_FLAGS, 0);
+                NEW_AUX_ENT(6, AT_ENTRY, (elf_addr_t) exec->e_entry);
+                NEW_AUX_ENT(7, AT_UID, (elf_addr_t) current->uid);
+                NEW_AUX_ENT(8, AT_EUID, (elf_addr_t) current->euid);
+                NEW_AUX_ENT(9, AT_GID, (elf_addr_t) current->gid);
+                NEW_AUX_ENT(10, AT_EGID, (elf_addr_t) current->egid);
         }
 #undef NEW_AUX_ENT
 
@@ -581,7 +581,7 @@ static void irix_map_prda_page(void)
         struct prda *pp;
 
         down_write(&current->mm->mmap_sem);
-        v =  do_brk (PRDA_ADDRESS, PAGE_SIZE);
+        v =  do_brk(PRDA_ADDRESS, PAGE_SIZE);
         up_write(&current->mm->mmap_sem);
 
         if (v < 0)
@@ -815,7 +815,7 @@ out_free_interp:
         kfree(elf_interpreter);
 out_free_file:
 out_free_ph:
-        kfree (elf_phdata);
+        kfree(elf_phdata);
         goto out;
 }
 
@@ -1232,7 +1232,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
         strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
 
         /* Try to dump the FPU. */
-        prstatus.pr_fpvalid = dump_fpu (regs, &fpu);
+        prstatus.pr_fpvalid = dump_fpu(regs, &fpu);
         if (!prstatus.pr_fpvalid) {
                 numnote--;
         } else {
diff --git a/arch/mips/kernel/irixinv.c b/arch/mips/kernel/irixinv.c
index de8584f62311..cf2dcd3d6a93 100644
--- a/arch/mips/kernel/irixinv.c
+++ b/arch/mips/kernel/irixinv.c
@@ -14,7 +14,7 @@ int inventory_items = 0;
 
 static inventory_t inventory [MAX_INVENTORY];
 
-void add_to_inventory (int class, int type, int controller, int unit, int state)
+void add_to_inventory(int class, int type, int controller, int unit, int state)
 {
         inventory_t *ni = &inventory [inventory_items];
 
@@ -30,7 +30,7 @@ void add_to_inventory (int class, int type, int controller, int unit, int state)
         inventory_items++;
 }
 
-int dump_inventory_to_user (void __user *userbuf, int size)
+int dump_inventory_to_user(void __user *userbuf, int size)
 {
         inventory_t *inv  = &inventory [0];
         inventory_t __user *user = userbuf;
@@ -45,7 +45,7 @@ int dump_inventory_to_user (void __user *userbuf, int size)
                         return -EFAULT;
                 user++;
         }
-        return inventory_items * sizeof (inventory_t);
+        return inventory_items * sizeof(inventory_t);
 }
 
 int __init init_inventory(void)
@@ -55,24 +55,24 @@ int __init init_inventory(void)
          * most likely this will not let just anyone run the X server
          * until we put the right values all over the place
          */
-        add_to_inventory (10, 3, 0, 0, 16400);
-        add_to_inventory (1, 1, 150, -1, 12);
-        add_to_inventory (1, 3, 0, 0, 8976);
-        add_to_inventory (1, 2, 0, 0, 8976);
-        add_to_inventory (4, 8, 0, 0, 2);
-        add_to_inventory (5, 5, 0, 0, 1);
-        add_to_inventory (3, 3, 0, 0, 32768);
-        add_to_inventory (3, 4, 0, 0, 32768);
-        add_to_inventory (3, 8, 0, 0, 524288);
-        add_to_inventory (3, 9, 0, 0, 64);
-        add_to_inventory (3, 1, 0, 0, 67108864);
-        add_to_inventory (12, 3, 0, 0, 16);
-        add_to_inventory (8, 7, 17, 0, 16777472);
-        add_to_inventory (8, 0, 0, 0, 1);
-        add_to_inventory (2, 1, 0, 13, 2);
-        add_to_inventory (2, 2, 0, 2, 0);
-        add_to_inventory (2, 2, 0, 1, 0);
-        add_to_inventory (7, 14, 0, 0, 6);
+        add_to_inventory(10, 3, 0, 0, 16400);
+        add_to_inventory(1, 1, 150, -1, 12);
+        add_to_inventory(1, 3, 0, 0, 8976);
+        add_to_inventory(1, 2, 0, 0, 8976);
+        add_to_inventory(4, 8, 0, 0, 2);
+        add_to_inventory(5, 5, 0, 0, 1);
+        add_to_inventory(3, 3, 0, 0, 32768);
+        add_to_inventory(3, 4, 0, 0, 32768);
+        add_to_inventory(3, 8, 0, 0, 524288);
+        add_to_inventory(3, 9, 0, 0, 64);
+        add_to_inventory(3, 1, 0, 0, 67108864);
+        add_to_inventory(12, 3, 0, 0, 16);
+        add_to_inventory(8, 7, 17, 0, 16777472);
+        add_to_inventory(8, 0, 0, 0, 1);
+        add_to_inventory(2, 1, 0, 13, 2);
+        add_to_inventory(2, 2, 0, 2, 0);
+        add_to_inventory(2, 2, 0, 1, 0);
+        add_to_inventory(7, 14, 0, 0, 6);
 
         return 0;
 }
diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c
index 30f9eb09db3f..2bde200d5ad0 100644
--- a/arch/mips/kernel/irixioctl.c
+++ b/arch/mips/kernel/irixioctl.c
@@ -238,7 +238,7 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
                        current->comm, current->pid, cmd);
                 do_exit(255);
 #else
-                error = sys_ioctl (fd, cmd, arg);
+                error = sys_ioctl(fd, cmd, arg);
 #endif
         }
 
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 1ecdd50bfc60..4edc7e451d91 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -99,7 +99,7 @@ void ll_msc_irq(void)
 }
 
 void
-msc_bind_eic_interrupt (unsigned int irq, unsigned int set)
+msc_bind_eic_interrupt(unsigned int irq, unsigned int set)
 {
         MSCIC_WRITE(MSC01_IC_RAMW,
                     (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF));
@@ -130,7 +130,7 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
 {
         extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset);
 
-        _icctrl_msc = (unsigned long) ioremap (icubase, 0x40000);
+        _icctrl_msc = (unsigned long) ioremap(icubase, 0x40000);
 
         /* Reset interrupt controller - initialises all registers to 0 */
         MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT);
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index cb9a14a1ca5b..1ed176606548 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -118,11 +118,11 @@ struct apsp_table syscall_command_table[] = {
 
 static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3)
 {
-        register long int _num  __asm__ ("$2") = num;
-        register long int _arg0  __asm__ ("$4") = arg0;
-        register long int _arg1  __asm__ ("$5") = arg1;
-        register long int _arg2  __asm__ ("$6") = arg2;
-        register long int _arg3  __asm__ ("$7") = arg3;
+        register long int _num  __asm__("$2") = num;
+        register long int _arg0  __asm__("$4") = arg0;
+        register long int _arg1  __asm__("$5") = arg1;
+        register long int _arg2  __asm__("$6") = arg2;
+        register long int _arg3  __asm__("$7") = arg3;
 
         mm_segment_t old_fs;
 
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 135d9a5fe337..a6de17081cad 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -300,13 +300,13 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
 {
         struct timespec t;
         int ret;
-        mm_segment_t old_fs = get_fs ();
+        mm_segment_t old_fs = get_fs();
 
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         ret = sys_sched_rr_get_interval(pid, (struct timespec __user *)&t);
-        set_fs (old_fs);
+        set_fs(old_fs);
         if (put_user (t.tv_sec, &interval->tv_sec) ||
-            __put_user (t.tv_nsec, &interval->tv_nsec))
+            __put_user(t.tv_nsec, &interval->tv_nsec))
                 return -EFAULT;
         return ret;
 }
@@ -314,7 +314,7 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
 #ifdef CONFIG_SYSVIPC
 
 asmlinkage long
-sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
+sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth)
 {
         int version, err;
 
@@ -373,7 +373,7 @@ sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
 #else
 
 asmlinkage long
-sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
+sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth)
 {
         return -ENOSYS;
 }
@@ -505,7 +505,7 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32)
 
         set_fs(KERNEL_DS);
         err = sys_ustat(dev, (struct ustat __user *)&tmp);
-        set_fs (old_fs);
+        set_fs(old_fs);
 
         if (err)
                 goto out;
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 56750b02ab40..3d6b1ec1f328 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -236,7 +236,7 @@ void mips_mt_set_cpuoptions(void)
         if (oconfig7 != nconfig7) {
                 __asm__ __volatile("sync");
                 write_c0_config7(nconfig7);
-                ehb ();
+                ehb();
                 printk("Config7: 0x%08x\n", read_c0_config7());
         }
 
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index f99bb4085430..11cb264f59ce 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -202,13 +202,13 @@ void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
 #endif
 }
 
-int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs)
+int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
 {
         elf_dump_regs(*regs, task_pt_regs(tsk));
         return 1;
 }
 
-int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr)
+int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
 {
         memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
 
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index bbd57b20b43e..58aa6fec1146 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -54,7 +54,7 @@ void ptrace_disable(struct task_struct *child)
  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  * Registers are sign extended to fill the available space.
  */
-int ptrace_getregs (struct task_struct *child, __s64 __user *data)
+int ptrace_getregs(struct task_struct *child, __s64 __user *data)
 {
         struct pt_regs *regs;
         int i;
@@ -65,13 +65,13 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
         regs = task_pt_regs(child);
 
         for (i = 0; i < 32; i++)
-                __put_user (regs->regs[i], data + i);
-        __put_user (regs->lo, data + EF_LO - EF_R0);
-        __put_user (regs->hi, data + EF_HI - EF_R0);
-        __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
-        __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
-        __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
-        __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
+                __put_user(regs->regs[i], data + i);
+        __put_user(regs->lo, data + EF_LO - EF_R0);
+        __put_user(regs->hi, data + EF_HI - EF_R0);
+        __put_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
+        __put_user(regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
+        __put_user(regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
+        __put_user(regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
 
         return 0;
 }
@@ -81,7 +81,7 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
  * the 64-bit format.  On a 32-bit kernel only the lower order half
  * (according to endianness) will be used.
  */
-int ptrace_setregs (struct task_struct *child, __s64 __user *data)
+int ptrace_setregs(struct task_struct *child, __s64 __user *data)
 {
         struct pt_regs *regs;
         int i;
@@ -92,17 +92,17 @@ int ptrace_setregs (struct task_struct *child, __s64 __user *data)
         regs = task_pt_regs(child);
 
         for (i = 0; i < 32; i++)
-                __get_user (regs->regs[i], data + i);
-        __get_user (regs->lo, data + EF_LO - EF_R0);
-        __get_user (regs->hi, data + EF_HI - EF_R0);
-        __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
+                __get_user(regs->regs[i], data + i);
+        __get_user(regs->lo, data + EF_LO - EF_R0);
+        __get_user(regs->hi, data + EF_HI - EF_R0);
+        __get_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
 
         /* badvaddr, status, and cause may not be written.  */
 
         return 0;
 }
 
-int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
+int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
 {
         int i;
         unsigned int tmp;
@@ -113,13 +113,13 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
         if (tsk_used_math(child)) {
                 fpureg_t *fregs = get_fpu_regs(child);
                 for (i = 0; i < 32; i++)
-                        __put_user (fregs[i], i + (__u64 __user *) data);
+                        __put_user(fregs[i], i + (__u64 __user *) data);
         } else {
                 for (i = 0; i < 32; i++)
-                        __put_user ((__u64) -1, i + (__u64 __user *) data);
+                        __put_user((__u64) -1, i + (__u64 __user *) data);
         }
 
-        __put_user (child->thread.fpu.fcr31, data + 64);
+        __put_user(child->thread.fpu.fcr31, data + 64);
 
         preempt_disable();
         if (cpu_has_fpu) {
@@ -142,12 +142,12 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
                 tmp = 0;
         }
         preempt_enable();
-        __put_user (tmp, data + 65);
+        __put_user(tmp, data + 65);
 
         return 0;
 }
 
-int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
+int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
 {
         fpureg_t *fregs;
         int i;
@@ -158,9 +158,9 @@ int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
         fregs = get_fpu_regs(child);
 
         for (i = 0; i < 32; i++)
-                __get_user (fregs[i], i + (__u64 __user *) data);
+                __get_user(fregs[i], i + (__u64 __user *) data);
 
-        __get_user (child->thread.fpu.fcr31, data + 64);
+        __get_user(child->thread.fpu.fcr31, data + 64);
 
         /* FIR may not be written.  */
 
@@ -390,19 +390,19 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
 
         case PTRACE_GETREGS:
-                ret = ptrace_getregs (child, (__u64 __user *) data);
+                ret = ptrace_getregs(child, (__u64 __user *) data);
                 break;
 
         case PTRACE_SETREGS:
-                ret = ptrace_setregs (child, (__u64 __user *) data);
+                ret = ptrace_setregs(child, (__u64 __user *) data);
                 break;
 
         case PTRACE_GETFPREGS:
-                ret = ptrace_getfpregs (child, (__u32 __user *) data);
+                ret = ptrace_getfpregs(child, (__u32 __user *) data);
                 break;
 
         case PTRACE_SETFPREGS:
-                ret = ptrace_setfpregs (child, (__u32 __user *) data);
+                ret = ptrace_setfpregs(child, (__u32 __user *) data);
                 break;
 
         case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index d9a39c169450..f2bffed94fa3 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -36,11 +36,11 @@
 #include <asm/uaccess.h>
 #include <asm/bootinfo.h>
 
-int ptrace_getregs (struct task_struct *child, __s64 __user *data);
-int ptrace_setregs (struct task_struct *child, __s64 __user *data);
+int ptrace_getregs(struct task_struct *child, __s64 __user *data);
+int ptrace_setregs(struct task_struct *child, __s64 __user *data);
 
-int ptrace_getfpregs (struct task_struct *child, __u32 __user *data);
-int ptrace_setfpregs (struct task_struct *child, __u32 __user *data);
+int ptrace_getfpregs(struct task_struct *child, __u32 __user *data);
+int ptrace_setfpregs(struct task_struct *child, __u32 __user *data);
 
 /*
  * Tracing a 32-bit process with a 64-bit strace and vice versa will not
@@ -346,19 +346,19 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                 }
 
         case PTRACE_GETREGS:
-                ret = ptrace_getregs (child, (__u64 __user *) (__u64) data);
+                ret = ptrace_getregs(child, (__u64 __user *) (__u64) data);
                 break;
 
         case PTRACE_SETREGS:
-                ret = ptrace_setregs (child, (__u64 __user *) (__u64) data);
+                ret = ptrace_setregs(child, (__u64 __user *) (__u64) data);
                 break;
 
         case PTRACE_GETFPREGS:
-                ret = ptrace_getfpregs (child, (__u32 __user *) (__u64) data);
+                ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
                 break;
 
         case PTRACE_SETFPREGS:
-                ret = ptrace_setfpregs (child, (__u32 __user *) (__u64) data);
+                ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
                 break;
 
         case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 64b612a0a622..572c610db1b1 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -261,11 +261,11 @@ static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t __user *ubuf)
         default:
                 __put_sigset_unknown_nsig();
         case 2:
-                err |= __put_user (kbuf->sig[1] >> 32, &ubuf->sig[3]);
-                err |= __put_user (kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]);
+                err |= __put_user(kbuf->sig[1] >> 32, &ubuf->sig[3]);
+                err |= __put_user(kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]);
         case 1:
-                err |= __put_user (kbuf->sig[0] >> 32, &ubuf->sig[1]);
-                err |= __put_user (kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]);
+                err |= __put_user(kbuf->sig[0] >> 32, &ubuf->sig[1]);
+                err |= __put_user(kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]);
         }
 
         return err;
@@ -283,12 +283,12 @@ static inline int get_sigset(sigset_t *kbuf, const compat_sigset_t __user *ubuf)
         default:
                 __get_sigset_unknown_nsig();
         case 2:
-                err |= __get_user (sig[3], &ubuf->sig[3]);
-                err |= __get_user (sig[2], &ubuf->sig[2]);
+                err |= __get_user(sig[3], &ubuf->sig[3]);
+                err |= __get_user(sig[2], &ubuf->sig[2]);
                 kbuf->sig[1] = sig[2] | (sig[3] << 32);
         case 1:
-                err |= __get_user (sig[1], &ubuf->sig[1]);
-                err |= __get_user (sig[0], &ubuf->sig[0]);
+                err |= __get_user(sig[1], &ubuf->sig[1]);
+                err |= __get_user(sig[0], &ubuf->sig[0]);
                 kbuf->sig[0] = sig[0] | (sig[1] << 32);
         }
 
@@ -412,10 +412,10 @@ asmlinkage int sys32_sigaltstack(nabi_no_regargs struct pt_regs regs)
                         return -EFAULT;
         }
 
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         ret = do_sigaltstack(uss ? (stack_t __user *)&kss : NULL,
                              uoss ? (stack_t __user *)&koss : NULL, usp);
-        set_fs (old_fs);
+        set_fs(old_fs);
 
         if (!ret && uoss) {
                 if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss)))
@@ -559,9 +559,9 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
         /* It is more difficult to avoid calling this function than to
            call it and ignore errors.  */
         old_fs = get_fs();
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]);
-        set_fs (old_fs);
+        set_fs(old_fs);
 
         /*
          * Don't let your children do this ...
@@ -746,11 +746,11 @@ asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set,
         if (set && get_sigset(&new_set, set))
                 return -EFAULT;
 
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         ret = sys_rt_sigprocmask(how, set ? (sigset_t __user *)&new_set : NULL,
                                  oset ? (sigset_t __user *)&old_set : NULL,
                                  sigsetsize);
-        set_fs (old_fs);
+        set_fs(old_fs);
 
         if (!ret && oset && put_sigset(&old_set, oset))
                 return -EFAULT;
@@ -765,9 +765,9 @@ asmlinkage int sys32_rt_sigpending(compat_sigset_t __user *uset,
         sigset_t set;
         mm_segment_t old_fs = get_fs();
 
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         ret = sys_rt_sigpending((sigset_t __user *)&set, sigsetsize);
-        set_fs (old_fs);
+        set_fs(old_fs);
 
         if (!ret && put_sigset(&set, uset))
                 return -EFAULT;
@@ -781,12 +781,12 @@ asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *
         int ret;
         mm_segment_t old_fs = get_fs();
 
-        if (copy_from_user (&info, uinfo, 3*sizeof(int)) ||
-            copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE))
+        if (copy_from_user(&info, uinfo, 3*sizeof(int)) ||
+            copy_from_user(info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE))
                 return -EFAULT;
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         ret = sys_rt_sigqueueinfo(pid, sig, (siginfo_t __user *)&info);
-        set_fs (old_fs);
+        set_fs(old_fs);
         return ret;
 }
 
@@ -801,10 +801,10 @@ sys32_waitid(int which, compat_pid_t pid,
         mm_segment_t old_fs = get_fs();
 
         info.si_signo = 0;
-        set_fs (KERNEL_DS);
+        set_fs(KERNEL_DS);
         ret = sys_waitid(which, pid, (siginfo_t __user *) &info, options,
                          uru ? (struct rusage __user *) &ru : NULL);
-        set_fs (old_fs);
+        set_fs(old_fs);
 
         if (ret < 0 || info.si_signo == 0)
                 return ret;
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index eb7e05926ebe..bb277e82d421 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -88,7 +88,7 @@ struct rt_sigframe_n32 {
 
 #endif  /* !ICACHE_REFILLS_WORKAROUND_WAR */
 
-extern void sigset_from_compat (sigset_t *set, compat_sigset_t *compat);
+extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat);
 
 asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
 {
@@ -105,7 +105,7 @@ asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
         unewset = (compat_sigset_t __user *) regs.regs[4];
         if (copy_from_user(&uset, unewset, sizeof(uset)))
                 return -EFAULT;
-        sigset_from_compat (&newset, &uset);
+        sigset_from_compat(&newset, &uset);
         sigdelsetmask(&newset, ~_BLOCKABLE);
 
         spin_lock_irq(&current->sighand->siglock);
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 05dcce416325..94e210cc6cb6 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -353,7 +353,7 @@ void core_send_ipi(int cpu, unsigned int action)
         unsigned long flags;
         int vpflags;
 
-        local_irq_save (flags);
+        local_irq_save(flags);
 
         vpflags = dvpe();       /* cant access the other CPU's registers whilst MVPE enabled */
 
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 4d1ac9692dcd..770182887c5b 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -372,7 +372,7 @@ void mipsmt_prepare_cpus(void)
         cpu++;
 
         /* Report on boot-time options */
-        mips_mt_set_cpuoptions ();
+        mips_mt_set_cpuoptions();
         if (vpelimit > 0)
                 printk("Limit of %d VPEs set\n", vpelimit);
         if (tclimit > 0)
@@ -572,7 +572,7 @@ void smtc_init_secondary(void)
         if (((read_c0_tcbind() & TCBIND_CURTC) != 0) &&
             ((read_c0_tcbind() & TCBIND_CURVPE)
             != cpu_data[smp_processor_id() - 1].vpe_id)){
-                write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
+                write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
         }
 
         local_irq_enable();
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 7c800ec3ff55..ef2c6360d052 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -314,8 +314,8 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
  *
  * This is really horribly ugly.
  */
-asmlinkage int sys_ipc (unsigned int call, int first, int second,
-                        unsigned long third, void __user *ptr, long fifth)
+asmlinkage int sys_ipc(unsigned int call, int first, int second,
+                       unsigned long third, void __user *ptr, long fifth)
 {
         int version, ret;
 
@@ -324,26 +324,26 @@ asmlinkage int sys_ipc (unsigned int call, int first, int second,
 
         switch (call) {
         case SEMOP:
-                return sys_semtimedop (first, (struct sembuf __user *)ptr,
-                                       second, NULL);
+                return sys_semtimedop(first, (struct sembuf __user *)ptr,
+                                      second, NULL);
         case SEMTIMEDOP:
-                return sys_semtimedop (first, (struct sembuf __user *)ptr,
-                                       second,
-                                       (const struct timespec __user *)fifth);
+                return sys_semtimedop(first, (struct sembuf __user *)ptr,
+                                      second,
+                                      (const struct timespec __user *)fifth);
         case SEMGET:
-                return sys_semget (first, second, third);
+                return sys_semget(first, second, third);
         case SEMCTL: {
                 union semun fourth;
                 if (!ptr)
                         return -EINVAL;
                 if (get_user(fourth.__pad, (void __user *__user *) ptr))
                         return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
+                return sys_semctl(first, second, third, fourth);
         }
 
         case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                   second, third);
+                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
+                                  second, third);
         case MSGRCV:
                 switch (version) {
                 case 0: {
@@ -353,45 +353,45 @@ asmlinkage int sys_ipc (unsigned int call, int first, int second,
 
                         if (copy_from_user(&tmp,
                                            (struct ipc_kludge __user *) ptr,
-                                           sizeof (tmp)))
+                                           sizeof(tmp)))
                                 return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
+                        return sys_msgrcv(first, tmp.msgp, second,
+                                          tmp.msgtyp, third);
                 }
                 default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
+                        return sys_msgrcv(first,
+                                          (struct msgbuf __user *) ptr,
+                                          second, fifth, third);
                 }
         case MSGGET:
-                return sys_msgget ((key_t) first, second);
+                return sys_msgget((key_t) first, second);
         case MSGCTL:
-                return sys_msgctl (first, second,
-                                   (struct msqid_ds __user *) ptr);
+                return sys_msgctl(first, second,
+                                  (struct msqid_ds __user *) ptr);
 
         case SHMAT:
                 switch (version) {
                 default: {
                         unsigned long raddr;
-                        ret = do_shmat (first, (char __user *) ptr, second,
-                                        &raddr);
+                        ret = do_shmat(first, (char __user *) ptr, second,
+                                       &raddr);
                         if (ret)
                                 return ret;
-                        return put_user (raddr, (unsigned long __user *) third);
+                        return put_user(raddr, (unsigned long __user *) third);
                 }
                 case 1: /* iBCS2 emulator entry point */
                         if (!segment_eq(get_fs(), get_ds()))
                                 return -EINVAL;
-                        return do_shmat (first, (char __user *) ptr, second,
-                                         (unsigned long *) third);
+                        return do_shmat(first, (char __user *) ptr, second,
+                                        (unsigned long *) third);
                 }
         case SHMDT:
-                return sys_shmdt ((char __user *)ptr);
+                return sys_shmdt((char __user *)ptr);
         case SHMGET:
-                return sys_shmget (first, second, third);
+                return sys_shmget(first, second, third);
         case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
+                return sys_shmctl(first, second,
+                                  (struct shmid_ds __user *) ptr);
         default:
                 return -ENOSYS;
         }
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index 93a148486f88..b50239574c95 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -486,10 +486,10 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
 
                 switch (arg1) {
                 case SGI_INV_SIZEOF:
-                        retval = sizeof (inventory_t);
+                        retval = sizeof(inventory_t);
                         break;
                 case SGI_INV_READ:
-                        retval = dump_inventory_to_user (buffer, count);
+                        retval = dump_inventory_to_user(buffer, count);
                         break;
                 default:
                         retval = -EINVAL;
@@ -1042,9 +1042,9 @@ asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
                         long max_size = offset + len;
 
                         if (max_size > file->f_path.dentry->d_inode->i_size) {
-                                old_pos = sys_lseek (fd, max_size - 1, 0);
-                                sys_write (fd, (void __user *) "", 1);
-                                sys_lseek (fd, old_pos, 0);
+                                old_pos = sys_lseek(fd, max_size - 1, 0);
+                                sys_write(fd, (void __user *) "", 1);
+                                sys_lseek(fd, old_pos, 0);
                         }
                 }
         }
@@ -1176,7 +1176,7 @@ static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
         ub.st_ctime1  = stat->atime.tv_nsec;
         ub.st_blksize = stat->blksize;
         ub.st_blocks  = stat->blocks;
-        strcpy (ub.st_fstype, "efs");
+        strcpy(ub.st_fstype, "efs");
 
         return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
 }
@@ -1208,7 +1208,7 @@ static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
         ks.st_nlink = (u32) stat->nlink;
         ks.st_uid = (s32) stat->uid;
         ks.st_gid = (s32) stat->gid;
-        ks.st_rdev = sysv_encode_dev (stat->rdev);
+        ks.st_rdev = sysv_encode_dev(stat->rdev);
         ks.st_pad2[0] = ks.st_pad2[1] = 0;
         ks.st_size = (long long) stat->size;
         ks.st_pad3 = 0;
@@ -1527,9 +1527,9 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
                         long max_size = off2 + len;
 
                         if (max_size > file->f_path.dentry->d_inode->i_size) {
-                                old_pos = sys_lseek (fd, max_size - 1, 0);
-                                sys_write (fd, (void __user *) "", 1);
-                                sys_lseek (fd, old_pos, 0);
+                                old_pos = sys_lseek(fd, max_size - 1, 0);
+                                sys_write(fd, (void __user *) "", 1);
+                                sys_lseek(fd, old_pos, 0);
                         }
                 }
         }
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 369a5f9ad268..5892491b40eb 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -149,7 +149,7 @@ EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
  * Possibly handle a performance counter interrupt.
  * Return true if the timer interrupt should not be checked
  */
-static inline int handle_perf_irq (int r2)
+static inline int handle_perf_irq(int r2)
 {
         /*
          * The performance counter overflow interrupt may be shared with the
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index ac762d8d802d..b3e408b54c24 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -627,7 +627,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
                 lose_fpu(1);
 
                 /* Run the emulator */
-                sig = fpu_emulator_cop1Handler (regs, &current->thread.fpu, 1);
+                sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1);
 
                 /*
                  * We can't allow the emulated instruction to leave any of
@@ -1165,11 +1165,11 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 
         if (cpu_has_veic) {
                 if (board_bind_eic_interrupt)
-                        board_bind_eic_interrupt (n, srs);
+                        board_bind_eic_interrupt(n, srs);
         } else if (cpu_has_vint) {
                 /* SRSMap is only defined if shadow sets are implemented */
                 if (mips_srs_max() > 1)
-                        change_c0_srsmap (0xf << n*4, srs << n*4);
+                        change_c0_srsmap(0xf << n*4, srs << n*4);
         }
 
         if (srs == 0) {
@@ -1198,10 +1198,10 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
                          * Sigh... panicing won't help as the console
                          * is probably not configured :(
                          */
-                        panic ("VECTORSPACING too small");
+                        panic("VECTORSPACING too small");
                 }
 
-                memcpy (b, &except_vec_vi, handler_len);
+                memcpy(b, &except_vec_vi, handler_len);
 #ifdef CONFIG_MIPS_MT_SMTC
                 BUG_ON(n > 7);  /* Vector index %d exceeds SMTC maximum. */
 
@@ -1370,9 +1370,9 @@ void __init per_cpu_trap_init(void)
 #endif /* CONFIG_MIPS_MT_SMTC */
 
         if (cpu_has_veic || cpu_has_vint) {
-                write_c0_ebase (ebase);
+                write_c0_ebase(ebase);
                 /* Setting vector spacing enables EI/VI mode  */
-                change_c0_intctl (0x3e0, VECTORSPACING);
+                change_c0_intctl(0x3e0, VECTORSPACING);
         }
         if (cpu_has_divec) {
                 if (cpu_has_mipsmt) {
@@ -1390,8 +1390,8 @@ void __init per_cpu_trap_init(void)
          *  o read IntCtl.IPPCI to determine the performance counter interrupt
          */
         if (cpu_has_mips_r2) {
-                cp0_compare_irq = (read_c0_intctl () >> 29) & 7;
-                cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7;
+                cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
+                cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
                 if (cp0_perfcount_irq == cp0_compare_irq)
                         cp0_perfcount_irq = -1;
         } else {
@@ -1429,7 +1429,7 @@ void __init per_cpu_trap_init(void)
 }
 
 /* Install CPU exception handler */
-void __init set_handler (unsigned long offset, void *addr, unsigned long size)
+void __init set_handler(unsigned long offset, void *addr, unsigned long size)
 {
         memcpy((void *)(ebase + offset), addr, size);
         flush_icache_range(ebase + offset, ebase + offset + size);
@@ -1439,7 +1439,7 @@ static char panic_null_cerr[] __initdata =
         "Trying to set NULL cache error exception handler";
 
 /* Install uncached CPU exception handler */
-void __init set_uncached_handler (unsigned long offset, void *addr, unsigned long size)
+void __init set_uncached_handler(unsigned long offset, void *addr, unsigned long size)
 {
 #ifdef CONFIG_32BIT
         unsigned long uncached_ebase = KSEG1ADDR(ebase);
@@ -1470,7 +1470,7 @@ void __init trap_init(void)
         unsigned long i;
 
         if (cpu_has_veic || cpu_has_vint)
-                ebase = (unsigned long) alloc_bootmem_low_pages (0x200 + VECTORSPACING*64);
+                ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
         else
                 ebase = CAC_BASE;
 
@@ -1496,7 +1496,7 @@ void __init trap_init(void)
          * destination.
          */
         if (cpu_has_ejtag && board_ejtag_handler_setup)
-                board_ejtag_handler_setup ();
+                board_ejtag_handler_setup();
 
         /*
          * Only some CPUs have the watch exceptions.
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index d34b1fb3665d..c327b21bca81 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -481,7 +481,7 @@ fault:
         if (fixup_exception(regs))
                 return;
 
-        die_if_kernel ("Unhandled kernel unaligned access", regs);
+        die_if_kernel("Unhandled kernel unaligned access", regs);
         send_sig(SIGSEGV, current, 1);
 
         return;
diff --git a/arch/mips/lib/ucmpdi2.c b/arch/mips/lib/ucmpdi2.c
index e2ff6072b5a3..b33d8569bcb0 100644
--- a/arch/mips/lib/ucmpdi2.c
+++ b/arch/mips/lib/ucmpdi2.c
@@ -2,7 +2,7 @@
 
 #include "libgcc.h"
 
-word_type __ucmpdi2 (unsigned long long a, unsigned long long b)
+word_type __ucmpdi2(unsigned long long a, unsigned long long b)
 {
         const DWunion au = {.ll = a};
         const DWunion bu = {.ll = b};
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 17419e11ecad..c44e9cc2b19c 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -549,16 +549,16 @@ static const unsigned char cmptab[8] = {
  */
 
 #define DEF3OP(name, p, f1, f2, f3) \
-static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
+static ieee754##p fpemu_##p##_##name(ieee754##p r, ieee754##p s, \
     ieee754##p t) \
 { \
         struct _ieee754_csr ieee754_csr_save; \
-        s = f1 (s, t); \
+        s = f1(s, t); \
         ieee754_csr_save = ieee754_csr; \
-        s = f2 (s, r); \
+        s = f2(s, r); \
         ieee754_csr_save.cx |= ieee754_csr.cx; \
         ieee754_csr_save.sx |= ieee754_csr.sx; \
-        s = f3 (s); \
+        s = f3(s); \
         ieee754_csr.cx |= ieee754_csr_save.cx; \
         ieee754_csr.sx |= ieee754_csr_save.sx; \
         return s; \
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 3c692abc2553..6fb29c3ff62d 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -112,7 +112,7 @@ static inline void atlas_hw0_irqdispatch(void)
 
 static inline int clz(unsigned long x)
 {
-        __asm__ (
+        __asm__(
         "       .set    push                                    \n"
         "       .set    mips32                                  \n"
         "       clz     %0, %1                                  \n"
@@ -194,7 +194,7 @@ asmlinkage void plat_irq_dispatch(void)
                 spurious_interrupt();
 }
 
-static inline void init_atlas_irqs (int base)
+static inline void init_atlas_irqs(int base)
 {
         int i;
 
@@ -249,21 +249,21 @@ void __init arch_init_irq(void)
         case MIPS_REVISION_CORID_CORE_24K:
         case MIPS_REVISION_CORID_CORE_EMUL_MSC:
                 if (cpu_has_veic)
-                        init_msc_irqs (MSC01E_INT_BASE, MSC01E_INT_BASE,
-                                       msc_eicirqmap, msc_nr_eicirqs);
+                        init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
+                                      msc_eicirqmap, msc_nr_eicirqs);
                 else
-                        init_msc_irqs (MSC01E_INT_BASE, MSC01C_INT_BASE,
-                                       msc_irqmap, msc_nr_irqs);
+                        init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
+                                      msc_irqmap, msc_nr_irqs);
         }
 
         if (cpu_has_veic) {
-                set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
-                setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
+                set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
+                setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
         } else if (cpu_has_vint) {
-                set_vi_handler (MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
+                set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
 #ifdef CONFIG_MIPS_MT_SMTC
-                setup_irq_smtc (MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
-                                &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
+                setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
+                               &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
 #else /* Not SMTC */
                 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
 #endif /* CONFIG_MIPS_MT_SMTC */
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index 86bfc0548164..e405d112a067 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -55,7 +55,7 @@ void __init plat_mem_setup(void)
 
         ioport_resource.end = 0x7fffffff;
 
-        serial_init ();
+        serial_init();
 
 #ifdef CONFIG_KGDB
         kgdb_config();
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index e2c7147fedf7..30f1f54cb68b 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -166,15 +166,15 @@ static void __init console_config(void)
                         bits = '8';
                 if (flow == '\0')
                         flow = 'r';
-                sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
-                strcat (prom_getcmdline(), console_string);
+                sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
+                strcat(prom_getcmdline(), console_string);
                 pr_info("Config serial console:%s\n", console_string);
         }
 }
 #endif
 
 #ifdef CONFIG_KGDB
-void __init kgdb_config (void)
+void __init kgdb_config(void)
 {
         extern int (*generic_putDebugChar)(char);
         extern char (*generic_getDebugChar)(void);
@@ -218,7 +218,7 @@ void __init kgdb_config (void)
                 {
                         char *s;
                         for (s = "Please connect GDB to this port\r\n"; *s; )
-                                generic_putDebugChar (*s++);
+                                generic_putDebugChar(*s++);
                 }
 
                 /* Breakpoint is invoked after interrupts are initialised */
@@ -226,7 +226,7 @@ void __init kgdb_config (void)
 }
 #endif
 
-void __init mips_nmi_setup (void)
+void __init mips_nmi_setup(void)
 {
         void *base;
         extern char except_vec_nmi;
@@ -238,7 +238,7 @@ void __init mips_nmi_setup (void)
         flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
 }
 
-void __init mips_ejtag_setup (void)
+void __init mips_ejtag_setup(void)
 {
         void *base;
         extern char except_vec_ejtag_debug;
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index ae39953da2c4..dc272c188233 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -125,7 +125,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
         return &mdesc[0];
 }
 
-static int __init prom_memtype_classify (unsigned int type)
+static int __init prom_memtype_classify(unsigned int type)
 {
         switch (type) {
         case yamon_free:
@@ -158,7 +158,7 @@ void __init prom_meminit(void)
                 long type;
                 unsigned long base, size;
 
-                type = prom_memtype_classify (p->type);
+                type = prom_memtype_classify(p->type);
                 base = p->base;
                 size = p->size;
 
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index c9852206890a..b9743190609a 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -239,5 +239,5 @@ void __init mips_pcibios_init(void)
         iomem_resource.end &= 0xfffffffffULL;                   /* 64 GB */
         ioport_resource.end = controller->io_resource->end;
 
-        register_pci_controller (controller);
+        register_pci_controller(controller);
 }
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 4fab3b2e8736..1d00b778ff1e 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -134,7 +134,7 @@ void __init plat_time_init(void)
         /* Set Data mode - binary. */
         CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
 
-        est_freq = estimate_cpu_frequency ();
+        est_freq = estimate_cpu_frequency();
 
         printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
                (est_freq%1000000)*100/1000000);
@@ -166,7 +166,7 @@ void __init plat_perf_setup(void)
 
 #ifdef MSC01E_INT_BASE
         if (cpu_has_veic) {
-                set_vi_handler (MSC01E_INT_PERFCTR, mips_perf_dispatch);
+                set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
                 cp0_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
         } else
 #endif
@@ -183,7 +183,7 @@ void __init plat_timer_setup(struct irqaction *irq)
 {
 #ifdef MSC01E_INT_BASE
         if (cpu_has_veic) {
-                set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch);
+                set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
                 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
         }
         else
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index b73f21823c5e..8232392750a8 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -178,7 +178,7 @@ static void corehi_irqdispatch(void)
 
 static inline int clz(unsigned long x)
 {
-        __asm__ (
+        __asm__(
         "       .set    push                                    \n"
         "       .set    mips32                                  \n"
         "       clz     %0, %1                                  \n"
@@ -303,32 +303,32 @@ void __init arch_init_irq(void)
         case MIPS_REVISION_SCON_SOCIT:
         case MIPS_REVISION_SCON_ROCIT:
                 if (cpu_has_veic)
-                        init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
+                        init_msc_irqs(MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
                 else
-                        init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
+                        init_msc_irqs(MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
                 break;
 
         case MIPS_REVISION_SCON_SOCITSC:
         case MIPS_REVISION_SCON_SOCITSCP:
                 if (cpu_has_veic)
-                        init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
+                        init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
                 else
-                        init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
+                        init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
         }
 
         if (cpu_has_veic) {
-                set_vi_handler (MSC01E_INT_I8259A, malta_hw0_irqdispatch);
-                set_vi_handler (MSC01E_INT_COREHI, corehi_irqdispatch);
-                setup_irq (MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
-                setup_irq (MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
+                set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
+                set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch);
+                setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
+                setup_irq(MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
         }
         else if (cpu_has_vint) {
-                set_vi_handler (MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
-                set_vi_handler (MIPSCPU_INT_COREHI, corehi_irqdispatch);
+                set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
+                set_vi_handler(MIPSCPU_INT_COREHI, corehi_irqdispatch);
 #ifdef CONFIG_MIPS_MT_SMTC
-                setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
+                setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
                         (0x100 << MIPSCPU_INT_I8259A));
-                setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
+                setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
                         &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
                 /*
                  * Temporary hack to ensure that the subsidiary device
@@ -343,12 +343,12 @@ void __init arch_init_irq(void)
                                 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
                 }
 #else /* Not SMTC */
-                setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
-                setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
+                setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
+                setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
 #endif /* CONFIG_MIPS_MT_SMTC */
         }
         else {
-                setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
-                setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
+                setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
+                setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
         }
 }
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index a5a5a43a1984..e243d5efcb38 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -99,7 +99,7 @@ void __init plat_mem_setup(void)
         enable_dma(4);
 
 #ifdef CONFIG_KGDB
-        kgdb_config ();
+        kgdb_config();
 #endif
 
         if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
@@ -108,7 +108,7 @@ void __init plat_mem_setup(void)
                 argptr = prom_getcmdline();
                 if (strstr(argptr, "debug")) {
                         BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
-                        printk ("Enabled Bonito debug mode\n");
+                        printk("Enabled Bonito debug mode\n");
                 }
                 else
                         BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
@@ -159,14 +159,14 @@ void __init plat_mem_setup(void)
                 if (pciclock != 33 && !strstr (argptr, "idebus=")) {
                         printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock);
                         argptr += strlen(argptr);
-                        sprintf (argptr, " idebus=%d", pciclock);
+                        sprintf(argptr, " idebus=%d", pciclock);
                         if (pciclock < 20 || pciclock > 66)
-                                printk ("WARNING: IDE timing calculations will be incorrect\n");
+                                printk("WARNING: IDE timing calculations will be incorrect\n");
                 }
         }
 #endif
 #ifdef CONFIG_BLK_DEV_FD
-        fd_activate ();
+        fd_activate();
 #endif
 #ifdef CONFIG_VT
 #if defined(CONFIG_VGA_CONSOLE)
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index 9ca0f82f1360..ec6dd194c14a 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -31,7 +31,7 @@
 
 static inline int clz(unsigned long x)
 {
-        __asm__ (
+        __asm__(
         "       .set    push                                    \n"
         "       .set    mips32                                  \n"
         "       clz     %0, %1                                  \n"
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index fad58972f3ac..1fb61b852304 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -49,7 +49,7 @@ void __init plat_mem_setup(void)
 {
         ioport_resource.end = 0x7fffffff;
 
-        serial_init ();
+        serial_init();
 
         mips_reboot_setup();
 }
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
index 5cbc3509ab52..46067ad542dc 100644
--- a/arch/mips/mipssim/sim_int.c
+++ b/arch/mips/mipssim/sim_int.c
@@ -25,7 +25,7 @@
 
 static inline int clz(unsigned long x)
 {
-        __asm__ (
+        __asm__(
         "       .set    push                                    \n"
         "       .set    mips32                                  \n"
         "       clz     %0, %1                                  \n"
diff --git a/arch/mips/mipssim/sim_mem.c b/arch/mips/mipssim/sim_mem.c
index 2312483eb838..953d836a7713 100644
--- a/arch/mips/mipssim/sim_mem.c
+++ b/arch/mips/mipssim/sim_mem.c
@@ -69,7 +69,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
         return &mdesc[0];
 }
 
-static int __init prom_memtype_classify (unsigned int type)
+static int __init prom_memtype_classify(unsigned int type)
 {
         switch (type) {
         case simmem_free:
@@ -90,7 +90,7 @@ void __init prom_meminit(void)
                 long type;
                 unsigned long base, size;
 
-                type = prom_memtype_classify (p->type);
+                type = prom_memtype_classify(p->type);
                 base = p->base;
                 size = p->size;
 
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index 3625f7d49035..e7fa0d1078a3 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -84,7 +84,7 @@ void __init plat_time_init(void)
         /* Set Data mode - binary. */
         CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
 
-        est_freq = estimate_cpu_frequency ();
+        est_freq = estimate_cpu_frequency();
 
         printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,
                (est_freq % 1000000) * 100 / 1000000);
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 59868a1edf66..c55312f6fd3a 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -121,7 +121,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end)
         write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
 
         for (i = 0; i < size; i += 0x080) {
-                asm (   "sb\t$0, 0x000(%0)\n\t"
+                asm(    "sb\t$0, 0x000(%0)\n\t"
                         "sb\t$0, 0x004(%0)\n\t"
                         "sb\t$0, 0x008(%0)\n\t"
                         "sb\t$0, 0x00c(%0)\n\t"
@@ -178,7 +178,7 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
         write_c0_status((ST0_ISC|flags)&~ST0_IEC);
 
         for (i = 0; i < size; i += 0x080) {
-                asm (   "sb\t$0, 0x000(%0)\n\t"
+                asm(    "sb\t$0, 0x000(%0)\n\t"
                         "sb\t$0, 0x004(%0)\n\t"
                         "sb\t$0, 0x008(%0)\n\t"
                         "sb\t$0, 0x00c(%0)\n\t"
@@ -217,8 +217,8 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
         write_c0_status(flags);
 }
 
-static inline unsigned long get_phys_page (unsigned long addr,
-                                           struct mm_struct *mm)
+static inline unsigned long get_phys_page(unsigned long addr,
+                                          struct mm_struct *mm)
 {
         pgd_t *pgd;
         pud_t *pud;
@@ -281,13 +281,13 @@ static void r3k_flush_cache_sigtramp(unsigned long addr)
         write_c0_status(flags&~ST0_IEC);
 
         /* Fill the TLB to avoid an exception with caches isolated. */
-        asm (   "lw\t$0, 0x000(%0)\n\t"
+        asm(    "lw\t$0, 0x000(%0)\n\t"
                 "lw\t$0, 0x004(%0)\n\t"
                 : : "r" (addr) );
 
         write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
 
-        asm (   "sb\t$0, 0x000(%0)\n\t"
+        asm(    "sb\t$0, 0x000(%0)\n\t"
                 "sb\t$0, 0x004(%0)\n\t"
                 : : "r" (addr) );
 
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 42b50964c644..c13170bc675c 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -102,7 +102,7 @@ static inline int __init mips_sc_probe(void)
 
 int __init mips_sc_init(void)
 {
-        int found = mips_sc_probe ();
+        int found = mips_sc_probe();
         if (found) {
                 mips_sc_enable();
                 bcops = &mips_sc_ops;
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index dcd6913dc1ff..74ae0348cc92 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -491,7 +491,7 @@ void __init tlb_init(void)
                         int wired = current_cpu_data.tlbsize - ntlb;
                         write_c0_wired(wired);
                         write_c0_index(wired-1);
-                        printk ("Restricting TLB to %d entries\n", ntlb);
+                        printk("Restricting TLB to %d entries\n", ntlb);
                 } else
                         printk("Ignoring invalid argument ntlb=%d\n", ntlb);
         }
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 6383000422ab..423bc2c473df 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -118,7 +118,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
 
 /* Program all of the registers in preparation for enabling profiling.  */
 
-static void mipsxx_cpu_setup (void *args)
+static void mipsxx_cpu_setup(void *args)
 {
         unsigned int counters = op_model_mipsxx_ops.num_counters;
 
diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c
index d29040a56aea..a45d3202894f 100644
--- a/arch/mips/oprofile/op_model_rm9000.c
+++ b/arch/mips/oprofile/op_model_rm9000.c
@@ -60,7 +60,7 @@ static void rm9000_reg_setup(struct op_counter_config *ctr)
 
 /* Program all of the registers in preparation for enabling profiling.  */
 
-static void rm9000_cpu_setup (void *args)
+static void rm9000_cpu_setup(void *args)
 {
         uint64_t perfcount;
 
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 45224fd2c7ba..506e883a8c71 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -77,12 +77,12 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
  * code, but it is better than nothing...
  */
 
-static void atlas_saa9730_base_fixup (struct pci_dev *pdev)
+static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
 {
         extern void *saa9730_base;
         if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
-                (void) pci_read_config_dword (pdev, 0x14, (u32 *)&saa9730_base);
-        printk ("saa9730_base = %x\n", saa9730_base);
+                (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
+        printk("saa9730_base = %x\n", saa9730_base);
 }
 
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 7932dfe5eb9b..6b29904acf45 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -112,7 +112,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
                 first_cfg = 0;
                 pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
                 if (!pci_cfg_vm)
-                        panic (KERN_ERR "PCI unable to get vm area\n");
+                        panic(KERN_ERR "PCI unable to get vm area\n");
                 pci_cfg_wired_entry = read_c0_wired();
                 add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K);
                 last_entryLo0  = last_entryLo1 = 0xffffffff;
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index fa2d2c60f797..97ed25b92edf 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
 
         switch (size) {
         case 1:
-                outb (val, PCIMT_CONFIG_DATA + (reg & 3));
+                outb(val, PCIMT_CONFIG_DATA + (reg & 3));
                 break;
         case 2:
-                outw (val, PCIMT_CONFIG_DATA + (reg & 2));
+                outw(val, PCIMT_CONFIG_DATA + (reg & 2));
                 break;
         case 4:
-                outl (val, PCIMT_CONFIG_DATA);
+                outl(val, PCIMT_CONFIG_DATA);
                 break;
         }
 
@@ -93,7 +93,7 @@ static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int r
         if ((devfn > 255) || (reg > 255) || (busno > 255))
                 return PCIBIOS_BAD_REGISTER_NUMBER;
 
-        outl ((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8);
+        outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8);
         return PCIBIOS_SUCCESSFUL;
 }
 
@@ -108,12 +108,12 @@ static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg,
          * we don't do it, we will get a data bus error
          */
         if (bus->number == 0) {
-                pcit_set_config_address (0, 0, 0x68);
-                outl (inl (0xcfc) | 0xc0000000, 0xcfc);
+                pcit_set_config_address(0, 0, 0x68);
+                outl(inl(0xcfc) | 0xc0000000, 0xcfc);
                 if ((res = pcit_set_config_address(0, devfn, 0)))
                         return res;
-                outl (0xffffffff, 0xcfc);
-                pcit_set_config_address (0, 0, 0x68);
+                outl(0xffffffff, 0xcfc);
+                pcit_set_config_address(0, 0, 0x68);
                 if (inl(0xcfc) & 0x100000)
                         return PCIBIOS_DEVICE_NOT_FOUND;
         }
@@ -144,13 +144,13 @@ static int pcit_write(struct pci_bus *bus, unsigned int devfn, int reg,
 
         switch (size) {
         case 1:
-                outb (val, PCIMT_CONFIG_DATA + (reg & 3));
+                outb(val, PCIMT_CONFIG_DATA + (reg & 3));
                 break;
         case 2:
-                outw (val, PCIMT_CONFIG_DATA + (reg & 2));
+                outw(val, PCIMT_CONFIG_DATA + (reg & 2));
                 break;
         case 4:
-                outl (val, PCIMT_CONFIG_DATA);
+                outl(val, PCIMT_CONFIG_DATA);
                 break;
         }
 
diff --git a/arch/mips/philips/pnx8550/common/proc.c b/arch/mips/philips/pnx8550/common/proc.c
index 92311e95b700..416f834784bc 100644
--- a/arch/mips/philips/pnx8550/common/proc.c
+++ b/arch/mips/philips/pnx8550/common/proc.c
@@ -27,7 +27,7 @@
 #include <uart.h>
 
 
-static int pnx8550_timers_read (char* page, char** start, off_t offset, int count, int* eof, void* data)
+static int pnx8550_timers_read(char* page, char** start, off_t offset, int count, int* eof, void* data)
 {
         int len = 0;
         int configPR = read_c0_config7();
@@ -48,7 +48,7 @@ static int pnx8550_timers_read (char* page, char** start, off_t offset, int coun
         return len;
 }
 
-static int pnx8550_registers_read (char* page, char** start, off_t offset, int count, int* eof, void* data)
+static int pnx8550_registers_read(char* page, char** start, off_t offset, int count, int* eof, void* data)
 {
         int len = 0;
 
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_usb.c b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
index 21f9c70b6923..f7ca4f582331 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_usb.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
@@ -58,7 +58,7 @@ static struct platform_device msp_usbhost_device = {
                 .dma_mask = &msp_usbhost_dma_mask,
                 .coherent_dma_mask = DMA_32BIT_MASK,
         },
-        .num_resources  = ARRAY_SIZE (msp_usbhost_resources),
+        .num_resources  = ARRAY_SIZE(msp_usbhost_resources),
         .resource       = msp_usbhost_resources,
 };
 #endif /* CONFIG_USB_EHCI_HCD */
@@ -86,7 +86,7 @@ static struct platform_device msp_usbdev_device = {
                 .dma_mask = &msp_usbdev_dma_mask,
                 .coherent_dma_mask = DMA_32BIT_MASK,
         },
-        .num_resources  = ARRAY_SIZE (msp_usbdev_resources),
+        .num_resources  = ARRAY_SIZE(msp_usbdev_resources),
         .resource       = msp_usbdev_resources,
 };
 #endif /* CONFIG_USB_GADGET */
@@ -129,7 +129,7 @@ static int __init msp_usb_setup(void)
                 ppfinit("platform add USB HOST done %s.\n",
                             msp_devs[0]->name);
 
-                result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs));
+                result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
 #endif /* CONFIG_USB_EHCI_HCD */
         }
 #if defined(CONFIG_USB_GADGET)
@@ -139,7 +139,7 @@ static int __init msp_usb_setup(void)
                 ppfinit("platform add USB DEVICE done %s.\n",
                             msp_devs[0]->name);
 
-                result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs));
+                result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
         }
 #endif /* CONFIG_USB_GADGET */
 #endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */
diff --git a/arch/mips/qemu/q-firmware.c b/arch/mips/qemu/q-firmware.c
index fb2a8673a6bf..c2239b417587 100644
--- a/arch/mips/qemu/q-firmware.c
+++ b/arch/mips/qemu/q-firmware.c
@@ -10,7 +10,7 @@ void __init prom_init(void)
         cmdline = (int *) (CKSEG0 + (0x10 << 20) - 260);
         if (*cmdline == 0x12345678) {
                 if (*(char *)(cmdline + 1))
-                        strcpy (arcs_cmdline, (char *)(cmdline + 1));
+                        strcpy(arcs_cmdline, (char *)(cmdline + 1));
                 add_memory_region(0x0<<20, cmdline[-1], BOOT_MEM_RAM);
         } else {
                 add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM);
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index 6b6e97b90c6e..26854fb11e7c 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -55,7 +55,7 @@ static char __init *decode_eisa_sig(unsigned long addr)
         int i;
 
         for (i = 0; i < 4; i++) {
-                sig[i] = inb (addr + i);
+                sig[i] = inb(addr + i);
 
                 if (!i && (sig[0] & 0x80))
                         return NULL;
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index f199da7e49cf..f6d9bf4b26e7 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -344,6 +344,6 @@ void __init arch_init_irq(void)
 
 #ifdef CONFIG_EISA
         if (ip22_is_fullhouse())        /* Only Indigo-2 has EISA stuff */
-                ip22_eisa_init ();
+                ip22_eisa_init();
 #endif
 }
diff --git a/arch/mips/sgi-ip32/crime.c b/arch/mips/sgi-ip32/crime.c
index bff508704d03..563c614ad021 100644
--- a/arch/mips/sgi-ip32/crime.c
+++ b/arch/mips/sgi-ip32/crime.c
@@ -35,8 +35,8 @@ void __init crime_init(void)
         id = crime->id;
         rev = id & CRIME_ID_REV;
         id = (id & CRIME_ID_IDBITS) >> 4;
-        printk (KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
-                id, rev, field, (unsigned long) CRIME_BASE);
+        printk(KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
+               id, rev, field, (unsigned long) CRIME_BASE);
 }
 
 irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
@@ -96,7 +96,7 @@ irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
         unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
 
         addr <<= 2;
-        printk ("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
+        printk("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
         crime->cpu_error_stat = 0;
 
         return IRQ_HANDLED;
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 002095b364a3..7f4b793c3df3 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -148,7 +148,7 @@ static void disable_cpu_irq(unsigned int irq)
 static void end_cpu_irq(unsigned int irq)
 {
         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                enable_cpu_irq (irq);
+                enable_cpu_irq(irq);
 }
 
 static struct irq_chip ip32_cpu_interrupt = {
@@ -289,11 +289,11 @@ static struct irq_chip ip32_macepci_interrupt = {
 
 static unsigned long maceisa_mask;
 
-static void enable_maceisa_irq (unsigned int irq)
+static void enable_maceisa_irq(unsigned int irq)
 {
         unsigned int crime_int = 0;
 
-        DBG ("maceisa enable: %u\n", irq);
+        DBG("maceisa enable: %u\n", irq);
 
         switch (irq) {
         case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
@@ -306,7 +306,7 @@ static void enable_maceisa_irq (unsigned int irq)
                 crime_int = MACE_SUPERIO_INT;
                 break;
         }
-        DBG ("crime_int %08x enabled\n", crime_int);
+        DBG("crime_int %08x enabled\n", crime_int);
         crime_mask |= crime_int;
         crime->imask = crime_mask;
         maceisa_mask |= 1 << (irq - 33);
@@ -397,15 +397,15 @@ static struct irq_chip ip32_mace_interrupt = {
 
 static void ip32_unknown_interrupt(void)
 {
-        printk ("Unknown interrupt occurred!\n");
-        printk ("cp0_status: %08x\n", read_c0_status());
-        printk ("cp0_cause: %08x\n", read_c0_cause());
-        printk ("CRIME intr mask: %016lx\n", crime->imask);
-        printk ("CRIME intr status: %016lx\n", crime->istat);
-        printk ("CRIME hardware intr register: %016lx\n", crime->hard_int);
-        printk ("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask);
-        printk ("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat);
-        printk ("MACE PCI control register: %08x\n", mace->pci.control);
+        printk("Unknown interrupt occurred!\n");
+        printk("cp0_status: %08x\n", read_c0_status());
+        printk("cp0_cause: %08x\n", read_c0_cause());
+        printk("CRIME intr mask: %016lx\n", crime->imask);
+        printk("CRIME intr status: %016lx\n", crime->istat);
+        printk("CRIME hardware intr register: %016lx\n", crime->hard_int);
+        printk("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask);
+        printk("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat);
+        printk("MACE PCI control register: %08x\n", mace->pci.control);
 
         printk("Register dump:\n");
         show_regs(get_irq_regs());
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c
index 849d392a0013..ca93ecf825ae 100644
--- a/arch/mips/sgi-ip32/ip32-memory.c
+++ b/arch/mips/sgi-ip32/ip32-memory.c
@@ -19,7 +19,7 @@
 
 extern void crime_init(void);
 
-void __init prom_meminit (void)
+void __init prom_meminit(void)
 {
         u64 base, size;
         int bank;
@@ -38,7 +38,7 @@ void __init prom_meminit (void)
 
                 printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n",
                         bank, base, size >> 20);
-                add_memory_region (base, size, BOOT_MEM_RAM);
+                add_memory_region(base, size, BOOT_MEM_RAM);
         }
 }
 
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 4fcdaa8ba514..63b444eaf01e 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -276,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
         sbp.next_tb_sample = 0;
         filp->f_pos = 0;
 
-        err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
-                           DEVNAME " trace freeze", &sbp);
+        err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
+                          DEVNAME " trace freeze", &sbp);
         if (err)
                 return -EBUSY;
 
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index acc9ba76c1a9..b74607599971 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -127,7 +127,7 @@ static u32 a20r_ack_hwint(void)
 {
         u32 status = read_c0_status();
 
-        write_c0_status (status | 0x00010000);
+        write_c0_status(status | 0x00010000);
         asm volatile(
         "       .set    push                    \n"
         "       .set    noat                    \n"
@@ -195,7 +195,7 @@ static void a20r_hwint(void)
         u32 cause, status;
         int irq;
 
-        clear_c0_status (IE_IRQ0);
+        clear_c0_status(IE_IRQ0);
         status = a20r_ack_hwint();
         cause = read_c0_cause();
 
@@ -213,7 +213,7 @@ void __init sni_a20r_irq_init(void)
                 set_irq_chip(i, &a20r_irq_type);
         sni_hwint = a20r_hwint;
         change_c0_status(ST0_IM, IE_IRQ0);
-        setup_irq (SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
+        setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
 }
 
 void sni_a20r_init(void)
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 25cf646329ae..39bb15f1f2a6 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -284,9 +284,9 @@ static void sni_pcimt_hwint(void)
         u32 pending = read_c0_cause() & read_c0_status();
 
         if (pending & C_IRQ5)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
         else if (pending & C_IRQ4)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 6);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 6);
         else if (pending & C_IRQ3)
                 pcimt_hwint3();
         else if (pending & C_IRQ1)
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 3361bdd240e6..416f397c768b 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -188,8 +188,8 @@ static void pcit_hwint1(void)
         irq = ffs((pending >> 16) & 0x7f);
 
         if (likely(irq > 0))
-                do_IRQ (irq + SNI_PCIT_INT_START - 1);
-        set_c0_status (IE_IRQ1);
+                do_IRQ(irq + SNI_PCIT_INT_START - 1);
+        set_c0_status(IE_IRQ1);
 }
 
 static void pcit_hwint0(void)
@@ -201,8 +201,8 @@ static void pcit_hwint0(void)
         irq = ffs((pending >> 16) & 0x3f);
 
         if (likely(irq > 0))
-                do_IRQ (irq + SNI_PCIT_INT_START - 1);
-        set_c0_status (IE_IRQ0);
+                do_IRQ(irq + SNI_PCIT_INT_START - 1);
+        set_c0_status(IE_IRQ0);
 }
 
 static void sni_pcit_hwint(void)
@@ -212,11 +212,11 @@ static void sni_pcit_hwint(void)
         if (pending & C_IRQ1)
                 pcit_hwint1();
         else if (pending & C_IRQ2)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 4);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 4);
         else if (pending & C_IRQ3)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 5);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 5);
         else if (pending & C_IRQ5)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
 }
 
 static void sni_pcit_hwint_cplus(void)
@@ -226,13 +226,13 @@ static void sni_pcit_hwint_cplus(void)
         if (pending & C_IRQ0)
                 pcit_hwint0();
         else if (pending & C_IRQ1)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 3);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 3);
         else if (pending & C_IRQ2)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 4);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 4);
         else if (pending & C_IRQ3)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 5);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 5);
         else if (pending & C_IRQ5)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
 }
 
 void __init sni_pcit_irq_init(void)
@@ -245,7 +245,7 @@ void __init sni_pcit_irq_init(void)
         *(volatile u32 *)SNI_PCIT_INT_REG = 0;
         sni_hwint = sni_pcit_hwint;
         change_c0_status(ST0_IM, IE_IRQ1);
-        setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq);
+        setup_irq(SNI_PCIT_INT_START + 6, &sni_isa_irq);
 }
 
 void __init sni_pcit_cplus_irq_init(void)
@@ -258,7 +258,7 @@ void __init sni_pcit_cplus_irq_init(void)
         *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
         sni_hwint = sni_pcit_hwint_cplus;
         change_c0_status(ST0_IM, IE_IRQ0);
-        setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
+        setup_irq(MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
 }
 
 void __init sni_pcit_init(void)
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 94f115c6b2e0..67b061eef6cd 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -162,16 +162,16 @@ static void sni_rm200_hwint(void)
         int irq;
 
         if (pending & C_IRQ5)
-                do_IRQ (MIPS_CPU_IRQ_BASE + 7);
+                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
         else if (pending & C_IRQ0) {
-                clear_c0_status (IE_IRQ0);
+                clear_c0_status(IE_IRQ0);
                 mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f;
                 stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14;
                 irq = ffs(stat & mask & 0x1f);
 
                 if (likely(irq > 0))
-                        do_IRQ (irq + SNI_RM200_INT_START - 1);
-                set_c0_status (IE_IRQ0);
+                        do_IRQ(irq + SNI_RM200_INT_START - 1);
+                set_c0_status(IE_IRQ0);
         }
 }
 
@@ -187,7 +187,7 @@ void __init sni_rm200_irq_init(void)
                 set_irq_chip(i, &rm200_irq_type);
         sni_hwint = sni_rm200_hwint;
         change_c0_status(ST0_IM, IE_IRQ0);
-        setup_irq (SNI_RM200_INT_START + 0, &sni_isa_irq);
+        setup_irq(SNI_RM200_INT_START + 0, &sni_isa_irq);
 }
 
 void __init sni_rm200_init(void)
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 883e35ea4e82..e8b26bdee24c 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -106,11 +106,11 @@ static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev)
          * need to do it here, otherwise we get screen corruption
          * on older Cirrus chips
          */
-        pci_read_config_word (dev, PCI_COMMAND, &cmd);
+        pci_read_config_word(dev, PCI_COMMAND, &cmd);
         if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
                 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
-                vga_wseq (NULL, CL_SEQR6, 0x12);        /* unlock all extension registers */
-                vga_wseq (NULL, CL_SEQRF, 0x18);
+                vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
+                vga_wseq(NULL, CL_SEQRF, 0x18);
         }
 }
 
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
index db544a6e23f3..11eddd43458d 100644
--- a/arch/mips/sni/sniprom.c
+++ b/arch/mips/sni/sniprom.c
@@ -45,7 +45,7 @@ void prom_putchar(char c)
 static char *(*__prom_getenv)(char *)     = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
 static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
 
-char *prom_getenv (char *s)
+char *prom_getenv(char *s)
 {
         return __prom_getenv(s);
 }
@@ -131,9 +131,9 @@ static void __init sni_console_setup(void)
         int port;
         static char options[8];
 
-        cdev = prom_getenv ("console_dev");
+        cdev = prom_getenv("console_dev");
         if (strncmp (cdev, "tty", 3) == 0) {
-                ctype = prom_getenv ("console");
+                ctype = prom_getenv("console");
                 switch (*ctype) {
                 default:
                 case 'l':
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 153f065434ea..b80877349d38 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -44,23 +44,23 @@ static __init unsigned long dosample(void)
         volatile u8 msb, lsb;
 
         /* Start the counter. */
-        outb_p (0x34, 0x43);
+        outb_p(0x34, 0x43);
         outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40);
-        outb (SNI_8254_TCSAMP_COUNTER >> 8, 0x40);
+        outb(SNI_8254_TCSAMP_COUNTER >> 8, 0x40);
 
         /* Get initial counter invariant */
         ct0 = read_c0_count();
 
         /* Latch and spin until top byte of counter0 is zero */
         do {
-                outb (0x00, 0x43);
-                lsb = inb (0x40);
-                msb = inb (0x40);
+                outb(0x00, 0x43);
+                lsb = inb(0x40);
+                msb = inb(0x40);
                 ct1 = read_c0_count();
         } while (msb);
 
         /* Stop the counter. */
-        outb (0x38, 0x43);
+        outb(0x38, 0x43);
         /*
          * Return the difference, this is how far the r4k counter increments
          * for every 1/HZ seconds. We round off the nearest 1 MHz of master
@@ -137,7 +137,7 @@ void __init plat_timer_setup(struct irqaction *irq)
         case SNI_BRD_10NEW:
         case SNI_BRD_TOWER_OASIC:
         case SNI_BRD_MINITOWER:
-                sni_a20r_timer_setup (irq);
+                sni_a20r_timer_setup(irq);
                 break;
 
         case SNI_BRD_PCI_TOWER:
@@ -146,7 +146,7 @@ void __init plat_timer_setup(struct irqaction *irq)
         case SNI_BRD_PCI_DESKTOP:
         case SNI_BRD_PCI_TOWER_CPLUS:
         case SNI_BRD_PCI_MTOWER_CPLUS:
-                sni_cpu_timer_setup (irq);
+                sni_cpu_timer_setup(irq);
                 break;
         }
 }
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index c5f20df780e9..7a881755800f 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -56,27 +56,27 @@
  * Temporary until all gas have MT ASE support
  */
         .macro  DMT     reg=0
-        .word   (0x41600bc1 | (\reg << 16))
+        .word   0x41600bc1 | (\reg << 16)
         .endm
 
         .macro  EMT     reg=0
-        .word   (0x41600be1 | (\reg << 16))
+        .word   0x41600be1 | (\reg << 16)
         .endm
 
         .macro  DVPE    reg=0
-        .word   (0x41600001 | (\reg << 16))
+        .word   0x41600001 | (\reg << 16)
         .endm
 
         .macro  EVPE    reg=0
-        .word   (0x41600021 | (\reg << 16))
+        .word   0x41600021 | (\reg << 16)
         .endm
 
         .macro  MFTR    rt=0, rd=0, u=0, sel=0
-         .word  (0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel))
+         .word  0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
         .endm
 
         .macro  MTTR    rt=0, rd=0, u=0, sel=0
-         .word  (0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel))
+         .word  0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
         .endm
 
 #endif /* _ASM_ASMMACRO_H */
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 148bc79557f1..899357a72ac4 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -19,14 +19,14 @@
 #include <asm/sgidefs.h>
 #include <asm/war.h>
 
-#if (_MIPS_SZLONG == 32)
+#if _MIPS_SZLONG == 32
 #define SZLONG_LOG 5
 #define SZLONG_MASK 31UL
 #define __LL            "ll     "
 #define __SC            "sc     "
 #define __INS           "ins    "
 #define __EXT           "ext    "
-#elif (_MIPS_SZLONG == 64)
+#elif _MIPS_SZLONG == 64
 #define SZLONG_LOG 6
 #define SZLONG_MASK 63UL
 #define __LL            "lld    "
@@ -461,7 +461,7 @@ static inline int __ilog2(unsigned long x)
         int lz;
 
         if (sizeof(x) == 4) {
-                __asm__ (
+                __asm__(
                 "       .set    push                                    \n"
                 "       .set    mips32                                  \n"
                 "       clz     %0, %1                                  \n"
@@ -474,7 +474,7 @@ static inline int __ilog2(unsigned long x)
 
         BUG_ON(sizeof(x) != 8);
 
-        __asm__ (
+        __asm__(
         "       .set    push                                            \n"
         "       .set    mips64                                          \n"
         "       dclz    %0, %1                                          \n"
@@ -508,7 +508,7 @@ static inline unsigned long __ffs(unsigned long word)
  */
 static inline int fls(int word)
 {
-        __asm__ ("clz %0, %1" : "=r" (word) : "r" (word));
+        __asm__("clz %0, %1" : "=r" (word) : "r" (word));
 
         return 32 - word;
 }
@@ -516,7 +516,7 @@ static inline int fls(int word)
 #if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPS64)
 static inline int fls64(__u64 word)
 {
-        __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word));
+        __asm__("dclz %0, %1" : "=r" (word) : "r" (word));
 
         return 64 - word;
 }
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index eee83cbdf2b0..fe7dc2d59b69 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -65,9 +65,9 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
 
 #endif /* __GNUC__ */
 
-#if defined (__MIPSEB__)
+#if defined(__MIPSEB__)
 #  include <linux/byteorder/big_endian.h>
-#elif defined (__MIPSEL__)
+#elif defined(__MIPSEL__)
 #  include <linux/byteorder/little_endian.h>
 #else
 #  error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index e7d95d48177d..766f91ad5cd3 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -319,7 +319,7 @@ do {									\
 struct task_struct;
 
 extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
-extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
+extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
 extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
 
 #define ELF_CORE_COPY_REGS(elf_regs, regs)                      \
diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h
index 02c8a13fc894..f27b96cfac2e 100644
--- a/include/asm-mips/fixmap.h
+++ b/include/asm-mips/fixmap.h
@@ -60,8 +60,8 @@ enum fixed_addresses {
         __end_of_fixed_addresses
 };
 
-extern void __set_fixmap (enum fixed_addresses idx,
-                                        unsigned long phys, pgprot_t flags);
+extern void __set_fixmap(enum fixed_addresses idx,
+                         unsigned long phys, pgprot_t flags);
 
 #define set_fixmap(idx, phys) \
                 __set_fixmap(idx, phys, PAGE_KERNEL)
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index b623882bce19..3e7e30d4f418 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -75,7 +75,7 @@
 }
 
 static inline int
-futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
+futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
 {
         int op = (encoded_op >> 28) & 7;
         int cmp = (encoded_op >> 24) & 15;
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
index 92d90f75a636..cc88aed23f0f 100644
--- a/include/asm-mips/inventory.h
+++ b/include/asm-mips/inventory.h
@@ -17,8 +17,8 @@ typedef struct inventory_s {
 
 extern int inventory_items;
 
-extern void add_to_inventory (int class, int type, int controller, int unit, int state);
-extern int dump_inventory_to_user (void __user *userbuf, int size);
+extern void add_to_inventory(int class, int type, int controller, int unit, int state);
+extern int dump_inventory_to_user(void __user *userbuf, int size);
 extern int __init init_inventory(void);
 
 #endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/irqflags.h b/include/asm-mips/irqflags.h
index e459fa05db83..881e8866501d 100644
--- a/include/asm-mips/irqflags.h
+++ b/include/asm-mips/irqflags.h
@@ -16,7 +16,7 @@
 #include <linux/compiler.h>
 #include <asm/hazards.h>
 
-__asm__ (
+__asm__(
         "       .macro  raw_local_irq_enable                            \n"
         "       .set    push                                            \n"
         "       .set    reorder                                         \n"
@@ -65,7 +65,7 @@ static inline void raw_local_irq_enable(void)
  *
  * Workaround: mask EXL bit of the result or place a nop before mfc0.
  */
-__asm__ (
+__asm__(
         "       .macro  raw_local_irq_disable\n"
         "       .set    push                                            \n"
         "       .set    noat                                            \n"
@@ -96,7 +96,7 @@ static inline void raw_local_irq_disable(void)
                 : "memory");
 }
 
-__asm__ (
+__asm__(
         "       .macro  raw_local_save_flags flags                      \n"
         "       .set    push                                            \n"
         "       .set    reorder                                         \n"
@@ -113,7 +113,7 @@ __asm__ __volatile__(							\
         "raw_local_save_flags %0"                                       \
         : "=r" (x))
 
-__asm__ (
+__asm__(
         "       .macro  raw_local_irq_save result                       \n"
         "       .set    push                                            \n"
         "       .set    reorder                                         \n"
@@ -145,7 +145,7 @@ __asm__ __volatile__(							\
         : /* no inputs */                                               \
         : "memory")
 
-__asm__ (
+__asm__(
         "       .macro  raw_local_irq_restore flags                     \n"
         "       .set    push                                            \n"
         "       .set    noreorder                                       \n"
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 58fca8a5a9a6..10f613f23c33 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -951,25 +951,25 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 /* Programmable Counters 0 and 1 */
 #define SYS_BASE                   0xB1900000
 #define SYS_COUNTER_CNTRL          (SYS_BASE + 0x14)
-  #define SYS_CNTRL_E1S            (1<<23)
-  #define SYS_CNTRL_T1S            (1<<20)
-  #define SYS_CNTRL_M21            (1<<19)
-  #define SYS_CNTRL_M11            (1<<18)
-  #define SYS_CNTRL_M01            (1<<17)
-  #define SYS_CNTRL_C1S            (1<<16)
-  #define SYS_CNTRL_BP             (1<<14)
-  #define SYS_CNTRL_EN1            (1<<13)
-  #define SYS_CNTRL_BT1            (1<<12)
-  #define SYS_CNTRL_EN0            (1<<11)
-  #define SYS_CNTRL_BT0            (1<<10)
-  #define SYS_CNTRL_E0             (1<<8)
-  #define SYS_CNTRL_E0S            (1<<7)
-  #define SYS_CNTRL_32S            (1<<5)
-  #define SYS_CNTRL_T0S            (1<<4)
-  #define SYS_CNTRL_M20            (1<<3)
-  #define SYS_CNTRL_M10            (1<<2)
-  #define SYS_CNTRL_M00            (1<<1)
-  #define SYS_CNTRL_C0S            (1<<0)
+#  define SYS_CNTRL_E1S            (1<<23)
+#  define SYS_CNTRL_T1S            (1<<20)
+#  define SYS_CNTRL_M21            (1<<19)
+#  define SYS_CNTRL_M11            (1<<18)
+#  define SYS_CNTRL_M01            (1<<17)
+#  define SYS_CNTRL_C1S            (1<<16)
+#  define SYS_CNTRL_BP             (1<<14)
+#  define SYS_CNTRL_EN1            (1<<13)
+#  define SYS_CNTRL_BT1            (1<<12)
+#  define SYS_CNTRL_EN0            (1<<11)
+#  define SYS_CNTRL_BT0            (1<<10)
+#  define SYS_CNTRL_E0             (1<<8)
+#  define SYS_CNTRL_E0S            (1<<7)
+#  define SYS_CNTRL_32S            (1<<5)
+#  define SYS_CNTRL_T0S            (1<<4)
+#  define SYS_CNTRL_M20            (1<<3)
+#  define SYS_CNTRL_M10            (1<<2)
+#  define SYS_CNTRL_M00            (1<<1)
+#  define SYS_CNTRL_C0S            (1<<0)
 
 /* Programmable Counter 0 Registers */
 #define SYS_TOYTRIM                 (SYS_BASE + 0)
@@ -989,34 +989,34 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 
 /* I2S Controller */
 #define I2S_DATA                    0xB1000000
-  #define I2S_DATA_MASK        (0xffffff)
+#  define I2S_DATA_MASK        (0xffffff)
 #define I2S_CONFIG                0xB1000004
-  #define I2S_CONFIG_XU        (1<<25)
-  #define I2S_CONFIG_XO        (1<<24)
-  #define I2S_CONFIG_RU        (1<<23)
-  #define I2S_CONFIG_RO        (1<<22)
-  #define I2S_CONFIG_TR        (1<<21)
-  #define I2S_CONFIG_TE        (1<<20)
-  #define I2S_CONFIG_TF        (1<<19)
-  #define I2S_CONFIG_RR        (1<<18)
-  #define I2S_CONFIG_RE        (1<<17)
-  #define I2S_CONFIG_RF        (1<<16)
-  #define I2S_CONFIG_PD        (1<<11)
-  #define I2S_CONFIG_LB        (1<<10)
-  #define I2S_CONFIG_IC        (1<<9)
-  #define I2S_CONFIG_FM_BIT    7
-  #define I2S_CONFIG_FM_MASK     (0x3 << I2S_CONFIG_FM_BIT)
-    #define I2S_CONFIG_FM_I2S    (0x0 << I2S_CONFIG_FM_BIT)
-    #define I2S_CONFIG_FM_LJ     (0x1 << I2S_CONFIG_FM_BIT)
-    #define I2S_CONFIG_FM_RJ     (0x2 << I2S_CONFIG_FM_BIT)
-  #define I2S_CONFIG_TN        (1<<6)
-  #define I2S_CONFIG_RN        (1<<5)
-  #define I2S_CONFIG_SZ_BIT    0
-  #define I2S_CONFIG_SZ_MASK     (0x1F << I2S_CONFIG_SZ_BIT)
+#  define I2S_CONFIG_XU        (1<<25)
+#  define I2S_CONFIG_XO        (1<<24)
+#  define I2S_CONFIG_RU        (1<<23)
+#  define I2S_CONFIG_RO        (1<<22)
+#  define I2S_CONFIG_TR        (1<<21)
+#  define I2S_CONFIG_TE        (1<<20)
+#  define I2S_CONFIG_TF        (1<<19)
+#  define I2S_CONFIG_RR        (1<<18)
+#  define I2S_CONFIG_RE        (1<<17)
+#  define I2S_CONFIG_RF        (1<<16)
+#  define I2S_CONFIG_PD        (1<<11)
+#  define I2S_CONFIG_LB        (1<<10)
+#  define I2S_CONFIG_IC        (1<<9)
+#  define I2S_CONFIG_FM_BIT    7
+#  define I2S_CONFIG_FM_MASK     (0x3 << I2S_CONFIG_FM_BIT)
+#    define I2S_CONFIG_FM_I2S    (0x0 << I2S_CONFIG_FM_BIT)
+#    define I2S_CONFIG_FM_LJ     (0x1 << I2S_CONFIG_FM_BIT)
+#    define I2S_CONFIG_FM_RJ     (0x2 << I2S_CONFIG_FM_BIT)
+#  define I2S_CONFIG_TN        (1<<6)
+#  define I2S_CONFIG_RN        (1<<5)
+#  define I2S_CONFIG_SZ_BIT    0
+#  define I2S_CONFIG_SZ_MASK     (0x1F << I2S_CONFIG_SZ_BIT)
 
 #define I2S_CONTROL                0xB1000008
-  #define I2S_CONTROL_D         (1<<1)
-  #define I2S_CONTROL_CE        (1<<0)
+#  define I2S_CONTROL_D         (1<<1)
+#  define I2S_CONTROL_CE        (1<<0)
 
 /* USB Host Controller */
 #ifndef USB_OHCI_LEN
@@ -1034,38 +1034,38 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 #define USBD_EP5RD                0xB0200014
 #define USBD_INTEN                0xB0200018
 #define USBD_INTSTAT              0xB020001C
-  #define USBDEV_INT_SOF       (1<<12)
-  #define USBDEV_INT_HF_BIT    6
-  #define USBDEV_INT_HF_MASK   (0x3f << USBDEV_INT_HF_BIT)
-  #define USBDEV_INT_CMPLT_BIT  0
-  #define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
+#  define USBDEV_INT_SOF       (1<<12)
+#  define USBDEV_INT_HF_BIT    6
+#  define USBDEV_INT_HF_MASK   (0x3f << USBDEV_INT_HF_BIT)
+#  define USBDEV_INT_CMPLT_BIT  0
+#  define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
 #define USBD_CONFIG               0xB0200020
 #define USBD_EP0CS                0xB0200024
 #define USBD_EP2CS                0xB0200028
 #define USBD_EP3CS                0xB020002C
 #define USBD_EP4CS                0xB0200030
 #define USBD_EP5CS                0xB0200034
-  #define USBDEV_CS_SU         (1<<14)
-  #define USBDEV_CS_NAK        (1<<13)
-  #define USBDEV_CS_ACK        (1<<12)
-  #define USBDEV_CS_BUSY       (1<<11)
-  #define USBDEV_CS_TSIZE_BIT  1
-  #define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT)
-  #define USBDEV_CS_STALL      (1<<0)
+#  define USBDEV_CS_SU         (1<<14)
+#  define USBDEV_CS_NAK        (1<<13)
+#  define USBDEV_CS_ACK        (1<<12)
+#  define USBDEV_CS_BUSY       (1<<11)
+#  define USBDEV_CS_TSIZE_BIT  1
+#  define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT)
+#  define USBDEV_CS_STALL      (1<<0)
 #define USBD_EP0RDSTAT            0xB0200040
 #define USBD_EP0WRSTAT            0xB0200044
 #define USBD_EP2WRSTAT            0xB0200048
 #define USBD_EP3WRSTAT            0xB020004C
 #define USBD_EP4RDSTAT            0xB0200050
 #define USBD_EP5RDSTAT            0xB0200054
-  #define USBDEV_FSTAT_FLUSH     (1<<6)
-  #define USBDEV_FSTAT_UF        (1<<5)
-  #define USBDEV_FSTAT_OF        (1<<4)
-  #define USBDEV_FSTAT_FCNT_BIT  0
-  #define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT)
+#  define USBDEV_FSTAT_FLUSH     (1<<6)
+#  define USBDEV_FSTAT_UF        (1<<5)
+#  define USBDEV_FSTAT_OF        (1<<4)
+#  define USBDEV_FSTAT_FCNT_BIT  0
+#  define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT)
 #define USBD_ENABLE               0xB0200058
-  #define USBDEV_ENABLE (1<<1)
-  #define USBDEV_CE     (1<<0)
+#  define USBDEV_ENABLE (1<<1)
+#  define USBDEV_CE     (1<<0)
 
 #endif /* !CONFIG_SOC_AU1200 */
 
@@ -1073,55 +1073,55 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 
 /* 4 byte offsets from AU1000_ETH_BASE */
 #define MAC_CONTROL                     0x0
-  #define MAC_RX_ENABLE               (1<<2)
-  #define MAC_TX_ENABLE               (1<<3)
-  #define MAC_DEF_CHECK               (1<<5)
-  #define MAC_SET_BL(X)       (((X)&0x3)<<6)
-  #define MAC_AUTO_PAD                (1<<8)
-  #define MAC_DISABLE_RETRY          (1<<10)
-  #define MAC_DISABLE_BCAST          (1<<11)
-  #define MAC_LATE_COL               (1<<12)
-  #define MAC_HASH_MODE              (1<<13)
-  #define MAC_HASH_ONLY              (1<<15)
-  #define MAC_PASS_ALL               (1<<16)
-  #define MAC_INVERSE_FILTER         (1<<17)
-  #define MAC_PROMISCUOUS            (1<<18)
-  #define MAC_PASS_ALL_MULTI         (1<<19)
-  #define MAC_FULL_DUPLEX            (1<<20)
-  #define MAC_NORMAL_MODE                 0
-  #define MAC_INT_LOOPBACK           (1<<21)
-  #define MAC_EXT_LOOPBACK           (1<<22)
-  #define MAC_DISABLE_RX_OWN         (1<<23)
-  #define MAC_BIG_ENDIAN             (1<<30)
-  #define MAC_RX_ALL                 (1<<31)
+#  define MAC_RX_ENABLE               (1<<2)
+#  define MAC_TX_ENABLE               (1<<3)
+#  define MAC_DEF_CHECK               (1<<5)
+#  define MAC_SET_BL(X)       (((X)&0x3)<<6)
+#  define MAC_AUTO_PAD                (1<<8)
+#  define MAC_DISABLE_RETRY          (1<<10)
+#  define MAC_DISABLE_BCAST          (1<<11)
+#  define MAC_LATE_COL               (1<<12)
+#  define MAC_HASH_MODE              (1<<13)
+#  define MAC_HASH_ONLY              (1<<15)
+#  define MAC_PASS_ALL               (1<<16)
+#  define MAC_INVERSE_FILTER         (1<<17)
+#  define MAC_PROMISCUOUS            (1<<18)
+#  define MAC_PASS_ALL_MULTI         (1<<19)
+#  define MAC_FULL_DUPLEX            (1<<20)
+#  define MAC_NORMAL_MODE                 0
+#  define MAC_INT_LOOPBACK           (1<<21)
+#  define MAC_EXT_LOOPBACK           (1<<22)
+#  define MAC_DISABLE_RX_OWN         (1<<23)
+#  define MAC_BIG_ENDIAN             (1<<30)
+#  define MAC_RX_ALL                 (1<<31)
 #define MAC_ADDRESS_HIGH                0x4
 #define MAC_ADDRESS_LOW                 0x8
 #define MAC_MCAST_HIGH                  0xC
 #define MAC_MCAST_LOW                  0x10
 #define MAC_MII_CNTRL                  0x14
-  #define MAC_MII_BUSY                (1<<0)
-  #define MAC_MII_READ                     0
-  #define MAC_MII_WRITE               (1<<1)
-  #define MAC_SET_MII_SELECT_REG(X)   (((X)&0x1f)<<6)
-  #define MAC_SET_MII_SELECT_PHY(X)   (((X)&0x1f)<<11)
+#  define MAC_MII_BUSY                (1<<0)
+#  define MAC_MII_READ                     0
+#  define MAC_MII_WRITE               (1<<1)
+#  define MAC_SET_MII_SELECT_REG(X)   (((X)&0x1f)<<6)
+#  define MAC_SET_MII_SELECT_PHY(X)   (((X)&0x1f)<<11)
 #define MAC_MII_DATA                   0x18
 #define MAC_FLOW_CNTRL                 0x1C
-  #define MAC_FLOW_CNTRL_BUSY         (1<<0)
-  #define MAC_FLOW_CNTRL_ENABLE       (1<<1)
-  #define MAC_PASS_CONTROL            (1<<2)
-  #define MAC_SET_PAUSE(X)        (((X)&0xffff)<<16)
+#  define MAC_FLOW_CNTRL_BUSY         (1<<0)
+#  define MAC_FLOW_CNTRL_ENABLE       (1<<1)
+#  define MAC_PASS_CONTROL            (1<<2)
+#  define MAC_SET_PAUSE(X)        (((X)&0xffff)<<16)
 #define MAC_VLAN1_TAG                  0x20
 #define MAC_VLAN2_TAG                  0x24
 
 /* Ethernet Controller Enable */
 
-  #define MAC_EN_CLOCK_ENABLE         (1<<0)
-  #define MAC_EN_RESET0               (1<<1)
-  #define MAC_EN_TOSS                 (0<<2)
-  #define MAC_EN_CACHEABLE            (1<<3)
-  #define MAC_EN_RESET1               (1<<4)
-  #define MAC_EN_RESET2               (1<<5)
-  #define MAC_DMA_RESET               (1<<6)
+#  define MAC_EN_CLOCK_ENABLE         (1<<0)
+#  define MAC_EN_RESET0               (1<<1)
+#  define MAC_EN_TOSS                 (0<<2)
+#  define MAC_EN_CACHEABLE            (1<<3)
+#  define MAC_EN_RESET1               (1<<4)
+#  define MAC_EN_RESET2               (1<<5)
+#  define MAC_DMA_RESET               (1<<6)
 
 /* Ethernet Controller DMA Channels */
 
@@ -1129,22 +1129,22 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 #define MAC1_TX_DMA_ADDR         0xB4004200
 /* offsets from MAC_TX_RING_ADDR address */
 #define MAC_TX_BUFF0_STATUS             0x0
-  #define TX_FRAME_ABORTED            (1<<0)
-  #define TX_JAB_TIMEOUT              (1<<1)
-  #define TX_NO_CARRIER               (1<<2)
-  #define TX_LOSS_CARRIER             (1<<3)
-  #define TX_EXC_DEF                  (1<<4)
-  #define TX_LATE_COLL_ABORT          (1<<5)
-  #define TX_EXC_COLL                 (1<<6)
-  #define TX_UNDERRUN                 (1<<7)
-  #define TX_DEFERRED                 (1<<8)
-  #define TX_LATE_COLL                (1<<9)
-  #define TX_COLL_CNT_MASK         (0xF<<10)
-  #define TX_PKT_RETRY               (1<<31)
+#  define TX_FRAME_ABORTED            (1<<0)
+#  define TX_JAB_TIMEOUT              (1<<1)
+#  define TX_NO_CARRIER               (1<<2)
+#  define TX_LOSS_CARRIER             (1<<3)
+#  define TX_EXC_DEF                  (1<<4)
+#  define TX_LATE_COLL_ABORT          (1<<5)
+#  define TX_EXC_COLL                 (1<<6)
+#  define TX_UNDERRUN                 (1<<7)
+#  define TX_DEFERRED                 (1<<8)
+#  define TX_LATE_COLL                (1<<9)
+#  define TX_COLL_CNT_MASK         (0xF<<10)
+#  define TX_PKT_RETRY               (1<<31)
 #define MAC_TX_BUFF0_ADDR                0x4
-  #define TX_DMA_ENABLE               (1<<0)
-  #define TX_T_DONE                   (1<<1)
-  #define TX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
+#  define TX_DMA_ENABLE               (1<<0)
+#  define TX_T_DONE                   (1<<1)
+#  define TX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
 #define MAC_TX_BUFF0_LEN                 0x8
 #define MAC_TX_BUFF1_STATUS             0x10
 #define MAC_TX_BUFF1_ADDR               0x14
@@ -1160,34 +1160,34 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 #define MAC1_RX_DMA_ADDR         0xB4004300
 /* offsets from MAC_RX_RING_ADDR */
 #define MAC_RX_BUFF0_STATUS              0x0
-  #define RX_FRAME_LEN_MASK           0x3fff
-  #define RX_WDOG_TIMER              (1<<14)
-  #define RX_RUNT                    (1<<15)
-  #define RX_OVERLEN                 (1<<16)
-  #define RX_COLL                    (1<<17)
-  #define RX_ETHER                   (1<<18)
-  #define RX_MII_ERROR               (1<<19)
-  #define RX_DRIBBLING               (1<<20)
-  #define RX_CRC_ERROR               (1<<21)
-  #define RX_VLAN1                   (1<<22)
-  #define RX_VLAN2                   (1<<23)
-  #define RX_LEN_ERROR               (1<<24)
-  #define RX_CNTRL_FRAME             (1<<25)
-  #define RX_U_CNTRL_FRAME           (1<<26)
-  #define RX_MCAST_FRAME             (1<<27)
-  #define RX_BCAST_FRAME             (1<<28)
-  #define RX_FILTER_FAIL             (1<<29)
-  #define RX_PACKET_FILTER           (1<<30)
-  #define RX_MISSED_FRAME            (1<<31)
-
-  #define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN |  \
+#  define RX_FRAME_LEN_MASK           0x3fff
+#  define RX_WDOG_TIMER              (1<<14)
+#  define RX_RUNT                    (1<<15)
+#  define RX_OVERLEN                 (1<<16)
+#  define RX_COLL                    (1<<17)
+#  define RX_ETHER                   (1<<18)
+#  define RX_MII_ERROR               (1<<19)
+#  define RX_DRIBBLING               (1<<20)
+#  define RX_CRC_ERROR               (1<<21)
+#  define RX_VLAN1                   (1<<22)
+#  define RX_VLAN2                   (1<<23)
+#  define RX_LEN_ERROR               (1<<24)
+#  define RX_CNTRL_FRAME             (1<<25)
+#  define RX_U_CNTRL_FRAME           (1<<26)
+#  define RX_MCAST_FRAME             (1<<27)
+#  define RX_BCAST_FRAME             (1<<28)
+#  define RX_FILTER_FAIL             (1<<29)
+#  define RX_PACKET_FILTER           (1<<30)
+#  define RX_MISSED_FRAME            (1<<31)
+
+#  define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN |  \
                     RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
                     RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
 #define MAC_RX_BUFF0_ADDR                0x4
-  #define RX_DMA_ENABLE               (1<<0)
-  #define RX_T_DONE                   (1<<1)
-  #define RX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
-  #define RX_SET_BUFF_ADDR(X)     ((X)&0xffffffc0)
+#  define RX_DMA_ENABLE               (1<<0)
+#  define RX_T_DONE                   (1<<1)
+#  define RX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
+#  define RX_SET_BUFF_ADDR(X)     ((X)&0xffffffc0)
 #define MAC_RX_BUFF1_STATUS              0x10
 #define MAC_RX_BUFF1_ADDR                0x14
 #define MAC_RX_BUFF2_STATUS              0x20
@@ -1298,44 +1298,44 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 
 /* SSIO */
 #define SSI0_STATUS                0xB1600000
-  #define SSI_STATUS_BF              (1<<4)
-  #define SSI_STATUS_OF              (1<<3)
-  #define SSI_STATUS_UF              (1<<2)
-  #define SSI_STATUS_D               (1<<1)
-  #define SSI_STATUS_B               (1<<0)
+#  define SSI_STATUS_BF              (1<<4)
+#  define SSI_STATUS_OF              (1<<3)
+#  define SSI_STATUS_UF              (1<<2)
+#  define SSI_STATUS_D               (1<<1)
+#  define SSI_STATUS_B               (1<<0)
 #define SSI0_INT                   0xB1600004
-  #define SSI_INT_OI                 (1<<3)
-  #define SSI_INT_UI                 (1<<2)
-  #define SSI_INT_DI                 (1<<1)
+#  define SSI_INT_OI                 (1<<3)
+#  define SSI_INT_UI                 (1<<2)
+#  define SSI_INT_DI                 (1<<1)
 #define SSI0_INT_ENABLE            0xB1600008
-  #define SSI_INTE_OIE               (1<<3)
-  #define SSI_INTE_UIE               (1<<2)
-  #define SSI_INTE_DIE               (1<<1)
+#  define SSI_INTE_OIE               (1<<3)
+#  define SSI_INTE_UIE               (1<<2)
+#  define SSI_INTE_DIE               (1<<1)
 #define SSI0_CONFIG                0xB1600020
-  #define SSI_CONFIG_AO              (1<<24)
-  #define SSI_CONFIG_DO              (1<<23)
-  #define SSI_CONFIG_ALEN_BIT        20
-    #define SSI_CONFIG_ALEN_MASK       (0x7<<20)
-  #define SSI_CONFIG_DLEN_BIT        16
-    #define SSI_CONFIG_DLEN_MASK       (0x7<<16)
-  #define SSI_CONFIG_DD              (1<<11)
-  #define SSI_CONFIG_AD              (1<<10)
-  #define SSI_CONFIG_BM_BIT          8
-    #define SSI_CONFIG_BM_MASK         (0x3<<8)
-  #define SSI_CONFIG_CE              (1<<7)
-  #define SSI_CONFIG_DP              (1<<6)
-  #define SSI_CONFIG_DL              (1<<5)
-  #define SSI_CONFIG_EP              (1<<4)
+#  define SSI_CONFIG_AO              (1<<24)
+#  define SSI_CONFIG_DO              (1<<23)
+#  define SSI_CONFIG_ALEN_BIT        20
+#    define SSI_CONFIG_ALEN_MASK       (0x7<<20)
+#  define SSI_CONFIG_DLEN_BIT        16
+#    define SSI_CONFIG_DLEN_MASK       (0x7<<16)
+#  define SSI_CONFIG_DD              (1<<11)
+#  define SSI_CONFIG_AD              (1<<10)
+#  define SSI_CONFIG_BM_BIT          8
+#    define SSI_CONFIG_BM_MASK         (0x3<<8)
+#  define SSI_CONFIG_CE              (1<<7)
+#  define SSI_CONFIG_DP              (1<<6)
+#  define SSI_CONFIG_DL              (1<<5)
+#  define SSI_CONFIG_EP              (1<<4)
 #define SSI0_ADATA                 0xB1600024
-  #define SSI_AD_D                   (1<<24)
-  #define SSI_AD_ADDR_BIT            16
-    #define SSI_AD_ADDR_MASK           (0xff<<16)
-  #define SSI_AD_DATA_BIT            0
-    #define SSI_AD_DATA_MASK           (0xfff<<0)
+#  define SSI_AD_D                   (1<<24)
+#  define SSI_AD_ADDR_BIT            16
+#    define SSI_AD_ADDR_MASK           (0xff<<16)
+#  define SSI_AD_DATA_BIT            0
+#    define SSI_AD_DATA_MASK           (0xfff<<0)
 #define SSI0_CLKDIV                0xB1600028
 #define SSI0_CONTROL               0xB1600100
-  #define SSI_CONTROL_CD             (1<<1)
-  #define SSI_CONTROL_E              (1<<0)
+#  define SSI_CONTROL_CD             (1<<1)
+#  define SSI_CONTROL_E              (1<<0)
 
 /* SSI1 */
 #define SSI1_STATUS                0xB1680000
@@ -1401,75 +1401,75 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 #define IR_RING_ADDR_CMPR         (IRDA_BASE+0x14)
 #define IR_INT_CLEAR              (IRDA_BASE+0x18)
 #define IR_CONFIG_1               (IRDA_BASE+0x20)
-  #define IR_RX_INVERT_LED        (1<<0)
-  #define IR_TX_INVERT_LED        (1<<1)
-  #define IR_ST                   (1<<2)
-  #define IR_SF                   (1<<3)
-  #define IR_SIR                  (1<<4)
-  #define IR_MIR                  (1<<5)
-  #define IR_FIR                  (1<<6)
-  #define IR_16CRC                (1<<7)
-  #define IR_TD                   (1<<8)
-  #define IR_RX_ALL               (1<<9)
-  #define IR_DMA_ENABLE           (1<<10)
-  #define IR_RX_ENABLE            (1<<11)
-  #define IR_TX_ENABLE            (1<<12)
-  #define IR_LOOPBACK             (1<<14)
-  #define IR_SIR_MODE             (IR_SIR | IR_DMA_ENABLE | \
+#  define IR_RX_INVERT_LED        (1<<0)
+#  define IR_TX_INVERT_LED        (1<<1)
+#  define IR_ST                   (1<<2)
+#  define IR_SF                   (1<<3)
+#  define IR_SIR                  (1<<4)
+#  define IR_MIR                  (1<<5)
+#  define IR_FIR                  (1<<6)
+#  define IR_16CRC                (1<<7)
+#  define IR_TD                   (1<<8)
+#  define IR_RX_ALL               (1<<9)
+#  define IR_DMA_ENABLE           (1<<10)
+#  define IR_RX_ENABLE            (1<<11)
+#  define IR_TX_ENABLE            (1<<12)
+#  define IR_LOOPBACK             (1<<14)
+#  define IR_SIR_MODE             (IR_SIR | IR_DMA_ENABLE | \
                                    IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
 #define IR_SIR_FLAGS              (IRDA_BASE+0x24)
 #define IR_ENABLE                 (IRDA_BASE+0x28)
-  #define IR_RX_STATUS            (1<<9)
-  #define IR_TX_STATUS            (1<<10)
+#  define IR_RX_STATUS            (1<<9)
+#  define IR_TX_STATUS            (1<<10)
 #define IR_READ_PHY_CONFIG        (IRDA_BASE+0x2C)
 #define IR_WRITE_PHY_CONFIG       (IRDA_BASE+0x30)
 #define IR_MAX_PKT_LEN            (IRDA_BASE+0x34)
 #define IR_RX_BYTE_CNT            (IRDA_BASE+0x38)
 #define IR_CONFIG_2               (IRDA_BASE+0x3C)
-  #define IR_MODE_INV             (1<<0)
-  #define IR_ONE_PIN              (1<<1)
+#  define IR_MODE_INV             (1<<0)
+#  define IR_ONE_PIN              (1<<1)
 #define IR_INTERFACE_CONFIG       (IRDA_BASE+0x40)
 
 /* GPIO */
 #define SYS_PINFUNC               0xB190002C
-  #define SYS_PF_USB                    (1<<15) /* 2nd USB device/host */
-  #define SYS_PF_U3                     (1<<14) /* GPIO23/U3TXD */
-  #define SYS_PF_U2                     (1<<13) /* GPIO22/U2TXD */
-  #define SYS_PF_U1                     (1<<12) /* GPIO21/U1TXD */
-  #define SYS_PF_SRC                    (1<<11) /* GPIO6/SROMCKE */
-  #define SYS_PF_CK5                    (1<<10) /* GPIO3/CLK5 */
-  #define SYS_PF_CK4                    (1<<9)  /* GPIO2/CLK4 */
-  #define SYS_PF_IRF                    (1<<8)  /* GPIO15/IRFIRSEL */
-  #define SYS_PF_UR3                    (1<<7)  /* GPIO[14:9]/UART3 */
-  #define SYS_PF_I2D                    (1<<6)  /* GPIO8/I2SDI */
-  #define SYS_PF_I2S                    (1<<5)  /* I2S/GPIO[29:31] */
-  #define SYS_PF_NI2                    (1<<4)  /* NI2/GPIO[24:28] */
-  #define SYS_PF_U0                     (1<<3)  /* U0TXD/GPIO20 */
-  #define SYS_PF_RD                     (1<<2)  /* IRTXD/GPIO19 */
-  #define SYS_PF_A97                    (1<<1)  /* AC97/SSL1 */
-  #define SYS_PF_S0                     (1<<0)  /* SSI_0/GPIO[16:18] */
+#  define SYS_PF_USB                    (1<<15) /* 2nd USB device/host */
+#  define SYS_PF_U3                     (1<<14) /* GPIO23/U3TXD */
+#  define SYS_PF_U2                     (1<<13) /* GPIO22/U2TXD */
+#  define SYS_PF_U1                     (1<<12) /* GPIO21/U1TXD */
+#  define SYS_PF_SRC                    (1<<11) /* GPIO6/SROMCKE */
+#  define SYS_PF_CK5                    (1<<10) /* GPIO3/CLK5 */
+#  define SYS_PF_CK4                    (1<<9)  /* GPIO2/CLK4 */
+#  define SYS_PF_IRF                    (1<<8)  /* GPIO15/IRFIRSEL */
+#  define SYS_PF_UR3                    (1<<7)  /* GPIO[14:9]/UART3 */
+#  define SYS_PF_I2D                    (1<<6)  /* GPIO8/I2SDI */
+#  define SYS_PF_I2S                    (1<<5)  /* I2S/GPIO[29:31] */
+#  define SYS_PF_NI2                    (1<<4)  /* NI2/GPIO[24:28] */
+#  define SYS_PF_U0                     (1<<3)  /* U0TXD/GPIO20 */
+#  define SYS_PF_RD                     (1<<2)  /* IRTXD/GPIO19 */
+#  define SYS_PF_A97                    (1<<1)  /* AC97/SSL1 */
+#  define SYS_PF_S0                     (1<<0)  /* SSI_0/GPIO[16:18] */
 
 /* Au1100 Only */
-  #define SYS_PF_PC                     (1<<18) /* PCMCIA/GPIO[207:204] */
-  #define SYS_PF_LCD                    (1<<17) /* extern lcd/GPIO[203:200] */
-  #define SYS_PF_CS                     (1<<16) /* EXTCLK0/32khz to gpio2 */
-  #define SYS_PF_EX0                    (1<<9)  /* gpio2/clock */
+#  define SYS_PF_PC                     (1<<18) /* PCMCIA/GPIO[207:204] */
+#  define SYS_PF_LCD                    (1<<17) /* extern lcd/GPIO[203:200] */
+#  define SYS_PF_CS                     (1<<16) /* EXTCLK0/32khz to gpio2 */
+#  define SYS_PF_EX0                    (1<<9)  /* gpio2/clock */
 
 /* Au1550 Only.  Redefines lots of pins */
-  #define SYS_PF_PSC2_MASK              (7 << 17)
-  #define SYS_PF_PSC2_AC97              (0)
-  #define SYS_PF_PSC2_SPI               (0)
-  #define SYS_PF_PSC2_I2S               (1 << 17)
-  #define SYS_PF_PSC2_SMBUS             (3 << 17)
-  #define SYS_PF_PSC2_GPIO              (7 << 17)
-  #define SYS_PF_PSC3_MASK              (7 << 20)
-  #define SYS_PF_PSC3_AC97              (0)
-  #define SYS_PF_PSC3_SPI               (0)
-  #define SYS_PF_PSC3_I2S               (1 << 20)
-  #define SYS_PF_PSC3_SMBUS             (3 << 20)
-  #define SYS_PF_PSC3_GPIO              (7 << 20)
-  #define SYS_PF_PSC1_S1                (1 << 1)
-  #define SYS_PF_MUST_BE_SET            ((1 << 5) | (1 << 2))
+#  define SYS_PF_PSC2_MASK              (7 << 17)
+#  define SYS_PF_PSC2_AC97              (0)
+#  define SYS_PF_PSC2_SPI               (0)
+#  define SYS_PF_PSC2_I2S               (1 << 17)
+#  define SYS_PF_PSC2_SMBUS             (3 << 17)
+#  define SYS_PF_PSC2_GPIO              (7 << 17)
+#  define SYS_PF_PSC3_MASK              (7 << 20)
+#  define SYS_PF_PSC3_AC97              (0)
+#  define SYS_PF_PSC3_SPI               (0)
+#  define SYS_PF_PSC3_I2S               (1 << 20)
+#  define SYS_PF_PSC3_SMBUS             (3 << 20)
+#  define SYS_PF_PSC3_GPIO              (7 << 20)
+#  define SYS_PF_PSC1_S1                (1 << 1)
+#  define SYS_PF_MUST_BE_SET            ((1 << 5) | (1 << 2))
 
 /* Au1200 Only */
 #ifdef CONFIG_SOC_AU1200
@@ -1530,104 +1530,104 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 
 /* Clock Controller */
 #define SYS_FREQCTRL0             0xB1900020
-  #define SYS_FC_FRDIV2_BIT         22
-  #define SYS_FC_FRDIV2_MASK        (0xff << SYS_FC_FRDIV2_BIT)
-  #define SYS_FC_FE2                (1<<21)
-  #define SYS_FC_FS2                (1<<20)
-  #define SYS_FC_FRDIV1_BIT         12
-  #define SYS_FC_FRDIV1_MASK        (0xff << SYS_FC_FRDIV1_BIT)
-  #define SYS_FC_FE1                (1<<11)
-  #define SYS_FC_FS1                (1<<10)
-  #define SYS_FC_FRDIV0_BIT         2
-  #define SYS_FC_FRDIV0_MASK        (0xff << SYS_FC_FRDIV0_BIT)
-  #define SYS_FC_FE0                (1<<1)
-  #define SYS_FC_FS0                (1<<0)
+#  define SYS_FC_FRDIV2_BIT         22
+#  define SYS_FC_FRDIV2_MASK        (0xff << SYS_FC_FRDIV2_BIT)
+#  define SYS_FC_FE2                (1<<21)
+#  define SYS_FC_FS2                (1<<20)
+#  define SYS_FC_FRDIV1_BIT         12
+#  define SYS_FC_FRDIV1_MASK        (0xff << SYS_FC_FRDIV1_BIT)
+#  define SYS_FC_FE1                (1<<11)
+#  define SYS_FC_FS1                (1<<10)
+#  define SYS_FC_FRDIV0_BIT         2
+#  define SYS_FC_FRDIV0_MASK        (0xff << SYS_FC_FRDIV0_BIT)
+#  define SYS_FC_FE0                (1<<1)
+#  define SYS_FC_FS0                (1<<0)
 #define SYS_FREQCTRL1             0xB1900024
-  #define SYS_FC_FRDIV5_BIT         22
-  #define SYS_FC_FRDIV5_MASK        (0xff << SYS_FC_FRDIV5_BIT)
-  #define SYS_FC_FE5                (1<<21)
-  #define SYS_FC_FS5                (1<<20)
-  #define SYS_FC_FRDIV4_BIT         12
-  #define SYS_FC_FRDIV4_MASK        (0xff << SYS_FC_FRDIV4_BIT)
-  #define SYS_FC_FE4                (1<<11)
-  #define SYS_FC_FS4                (1<<10)
-  #define SYS_FC_FRDIV3_BIT         2
-  #define SYS_FC_FRDIV3_MASK        (0xff << SYS_FC_FRDIV3_BIT)
-  #define SYS_FC_FE3                (1<<1)
-  #define SYS_FC_FS3                (1<<0)
+#  define SYS_FC_FRDIV5_BIT         22
+#  define SYS_FC_FRDIV5_MASK        (0xff << SYS_FC_FRDIV5_BIT)
+#  define SYS_FC_FE5                (1<<21)
+#  define SYS_FC_FS5                (1<<20)
+#  define SYS_FC_FRDIV4_BIT         12
+#  define SYS_FC_FRDIV4_MASK        (0xff << SYS_FC_FRDIV4_BIT)
+#  define SYS_FC_FE4                (1<<11)
+#  define SYS_FC_FS4                (1<<10)
+#  define SYS_FC_FRDIV3_BIT         2
+#  define SYS_FC_FRDIV3_MASK        (0xff << SYS_FC_FRDIV3_BIT)
+#  define SYS_FC_FE3                (1<<1)
+#  define SYS_FC_FS3                (1<<0)
 #define SYS_CLKSRC                0xB1900028
-  #define SYS_CS_ME1_BIT            27
-  #define SYS_CS_ME1_MASK           (0x7<<SYS_CS_ME1_BIT)
-  #define SYS_CS_DE1                (1<<26)
-  #define SYS_CS_CE1                (1<<25)
-  #define SYS_CS_ME0_BIT            22
-  #define SYS_CS_ME0_MASK           (0x7<<SYS_CS_ME0_BIT)
-  #define SYS_CS_DE0                (1<<21)
-  #define SYS_CS_CE0                (1<<20)
-  #define SYS_CS_MI2_BIT            17
-  #define SYS_CS_MI2_MASK           (0x7<<SYS_CS_MI2_BIT)
-  #define SYS_CS_DI2                (1<<16)
-  #define SYS_CS_CI2                (1<<15)
+#  define SYS_CS_ME1_BIT            27
+#  define SYS_CS_ME1_MASK           (0x7<<SYS_CS_ME1_BIT)
+#  define SYS_CS_DE1                (1<<26)
+#  define SYS_CS_CE1                (1<<25)
+#  define SYS_CS_ME0_BIT            22
+#  define SYS_CS_ME0_MASK           (0x7<<SYS_CS_ME0_BIT)
+#  define SYS_CS_DE0                (1<<21)
+#  define SYS_CS_CE0                (1<<20)
+#  define SYS_CS_MI2_BIT            17
+#  define SYS_CS_MI2_MASK           (0x7<<SYS_CS_MI2_BIT)
+#  define SYS_CS_DI2                (1<<16)
+#  define SYS_CS_CI2                (1<<15)
 #ifdef CONFIG_SOC_AU1100
-  #define SYS_CS_ML_BIT             7
-  #define SYS_CS_ML_MASK            (0x7<<SYS_CS_ML_BIT)
-  #define SYS_CS_DL                 (1<<6)
-  #define SYS_CS_CL                 (1<<5)
+#  define SYS_CS_ML_BIT             7
+#  define SYS_CS_ML_MASK            (0x7<<SYS_CS_ML_BIT)
+#  define SYS_CS_DL                 (1<<6)
+#  define SYS_CS_CL                 (1<<5)
 #else
-  #define SYS_CS_MUH_BIT            12
-  #define SYS_CS_MUH_MASK           (0x7<<SYS_CS_MUH_BIT)
-  #define SYS_CS_DUH                (1<<11)
-  #define SYS_CS_CUH                (1<<10)
-  #define SYS_CS_MUD_BIT            7
-  #define SYS_CS_MUD_MASK           (0x7<<SYS_CS_MUD_BIT)
-  #define SYS_CS_DUD                (1<<6)
-  #define SYS_CS_CUD                (1<<5)
+#  define SYS_CS_MUH_BIT            12
+#  define SYS_CS_MUH_MASK           (0x7<<SYS_CS_MUH_BIT)
+#  define SYS_CS_DUH                (1<<11)
+#  define SYS_CS_CUH                (1<<10)
+#  define SYS_CS_MUD_BIT            7
+#  define SYS_CS_MUD_MASK           (0x7<<SYS_CS_MUD_BIT)
+#  define SYS_CS_DUD                (1<<6)
+#  define SYS_CS_CUD                (1<<5)
 #endif
-  #define SYS_CS_MIR_BIT            2
-  #define SYS_CS_MIR_MASK           (0x7<<SYS_CS_MIR_BIT)
-  #define SYS_CS_DIR                (1<<1)
-  #define SYS_CS_CIR                (1<<0)
-
-  #define SYS_CS_MUX_AUX            0x1
-  #define SYS_CS_MUX_FQ0            0x2
-  #define SYS_CS_MUX_FQ1            0x3
-  #define SYS_CS_MUX_FQ2            0x4
-  #define SYS_CS_MUX_FQ3            0x5
-  #define SYS_CS_MUX_FQ4            0x6
-  #define SYS_CS_MUX_FQ5            0x7
+#  define SYS_CS_MIR_BIT            2
+#  define SYS_CS_MIR_MASK           (0x7<<SYS_CS_MIR_BIT)
+#  define SYS_CS_DIR                (1<<1)
+#  define SYS_CS_CIR                (1<<0)
+
+#  define SYS_CS_MUX_AUX            0x1
+#  define SYS_CS_MUX_FQ0            0x2
+#  define SYS_CS_MUX_FQ1            0x3
+#  define SYS_CS_MUX_FQ2            0x4
+#  define SYS_CS_MUX_FQ3            0x5
+#  define SYS_CS_MUX_FQ4            0x6
+#  define SYS_CS_MUX_FQ5            0x7
 #define SYS_CPUPLL                0xB1900060
 #define SYS_AUXPLL                0xB1900064
 
 /* AC97 Controller */
 #define AC97C_CONFIG              0xB0000000
-  #define AC97C_RECV_SLOTS_BIT  13
-  #define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT)
-  #define AC97C_XMIT_SLOTS_BIT  3
-  #define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT)
-  #define AC97C_SG              (1<<2)
-  #define AC97C_SYNC            (1<<1)
-  #define AC97C_RESET           (1<<0)
+#  define AC97C_RECV_SLOTS_BIT  13
+#  define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT)
+#  define AC97C_XMIT_SLOTS_BIT  3
+#  define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT)
+#  define AC97C_SG              (1<<2)
+#  define AC97C_SYNC            (1<<1)
+#  define AC97C_RESET           (1<<0)
 #define AC97C_STATUS              0xB0000004
-  #define AC97C_XU              (1<<11)
-  #define AC97C_XO              (1<<10)
-  #define AC97C_RU              (1<<9)
-  #define AC97C_RO              (1<<8)
-  #define AC97C_READY           (1<<7)
-  #define AC97C_CP              (1<<6)
-  #define AC97C_TR              (1<<5)
-  #define AC97C_TE              (1<<4)
-  #define AC97C_TF              (1<<3)
-  #define AC97C_RR              (1<<2)
-  #define AC97C_RE              (1<<1)
-  #define AC97C_RF              (1<<0)
+#  define AC97C_XU              (1<<11)
+#  define AC97C_XO              (1<<10)
+#  define AC97C_RU              (1<<9)
+#  define AC97C_RO              (1<<8)
+#  define AC97C_READY           (1<<7)
+#  define AC97C_CP              (1<<6)
+#  define AC97C_TR              (1<<5)
+#  define AC97C_TE              (1<<4)
+#  define AC97C_TF              (1<<3)
+#  define AC97C_RR              (1<<2)
+#  define AC97C_RE              (1<<1)
+#  define AC97C_RF              (1<<0)
 #define AC97C_DATA                0xB0000008
 #define AC97C_CMD                 0xB000000C
-  #define AC97C_WD_BIT          16
-  #define AC97C_READ            (1<<7)
-  #define AC97C_INDEX_MASK      0x7f
+#  define AC97C_WD_BIT          16
+#  define AC97C_READ            (1<<7)
+#  define AC97C_INDEX_MASK      0x7f
 #define AC97C_CNTRL               0xB0000010
-  #define AC97C_RS              (1<<1)
-  #define AC97C_CE              (1<<0)
+#  define AC97C_RS              (1<<1)
+#  define AC97C_CE              (1<<0)
 
 
 /* Secure Digital (SD) Controller */
@@ -1636,12 +1636,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
 #define SD1_XMIT_FIFO   0xB0680000
 #define SD1_RECV_FIFO   0xB0680004
 
-#if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
+#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
 /* Au1500 PCI Controller */
 #define Au1500_CFG_BASE           0xB4005000 // virtual, kseg0 addr
 #define Au1500_PCI_CMEM           (Au1500_CFG_BASE + 0)
 #define Au1500_PCI_CFG            (Au1500_CFG_BASE + 4)
-  #define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27))
+#  define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27))
 #define Au1500_PCI_B2BMASK_CCH    (Au1500_CFG_BASE + 8)
 #define Au1500_PCI_B2B0_VID       (Au1500_CFG_BASE + 0xC)
 #define Au1500_PCI_B2B1_ID        (Au1500_CFG_BASE + 0x10)
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index 4663e8b415c9..aef0edbfe4c6 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -136,7 +136,7 @@ void auide_outl(u32 addr, unsigned long port);
 void auide_outsw(unsigned long port, void *addr, u32 count);
 void auide_outsl(unsigned long port, void *addr, u32 count);
 static void auide_tune_drive(ide_drive_t *drive, byte pio);
-static int auide_tune_chipset (ide_drive_t *drive, u8 speed);
+static int auide_tune_chipset(ide_drive_t *drive, u8 speed);
 static int auide_ddma_init( _auide_hwif *auide );
 static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif);
 int __init auide_probe(void);
diff --git a/include/asm-mips/mach-ip32/kmalloc.h b/include/asm-mips/mach-ip32/kmalloc.h
index f6198a21fba1..b1e0be60f720 100644
--- a/include/asm-mips/mach-ip32/kmalloc.h
+++ b/include/asm-mips/mach-ip32/kmalloc.h
@@ -2,7 +2,7 @@
 #define __ASM_MACH_IP32_KMALLOC_H
 
 
-#if defined(CONFIG_CPU_R5000) || defined (CONFIG_CPU_RM7000)
+#if defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_RM7000)
 #define ARCH_KMALLOC_MINALIGN   32
 #else
 #define ARCH_KMALLOC_MINALIGN   128
diff --git a/include/asm-mips/mach-pb1x00/pb1000.h b/include/asm-mips/mach-pb1x00/pb1000.h
index 50c1e413a688..b52e0e7ee3fb 100644
--- a/include/asm-mips/mach-pb1x00/pb1000.h
+++ b/include/asm-mips/mach-pb1x00/pb1000.h
@@ -32,38 +32,38 @@
 #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
 
 #define PB1000_PCR     0xBE000000
-  #define PCR_SLOT_0_VPP0  (1<<0)
-  #define PCR_SLOT_0_VPP1  (1<<1)
-  #define PCR_SLOT_0_VCC0  (1<<2)
-  #define PCR_SLOT_0_VCC1  (1<<3)
-  #define PCR_SLOT_0_RST   (1<<4)
-
-  #define PCR_SLOT_1_VPP0  (1<<8)
-  #define PCR_SLOT_1_VPP1  (1<<9)
-  #define PCR_SLOT_1_VCC0  (1<<10)
-  #define PCR_SLOT_1_VCC1  (1<<11)
-  #define PCR_SLOT_1_RST   (1<<12)
+#  define PCR_SLOT_0_VPP0  (1<<0)
+#  define PCR_SLOT_0_VPP1  (1<<1)
+#  define PCR_SLOT_0_VCC0  (1<<2)
+#  define PCR_SLOT_0_VCC1  (1<<3)
+#  define PCR_SLOT_0_RST   (1<<4)
+
+#  define PCR_SLOT_1_VPP0  (1<<8)
+#  define PCR_SLOT_1_VPP1  (1<<9)
+#  define PCR_SLOT_1_VCC0  (1<<10)
+#  define PCR_SLOT_1_VCC1  (1<<11)
+#  define PCR_SLOT_1_RST   (1<<12)
 
 #define PB1000_MDR     0xBE000004
-  #define MDR_PI        (1<<5)  /* pcmcia int latch  */
-  #define MDR_EPI      (1<<14)  /* enable pcmcia int */
-  #define MDR_CPI      (1<<15)  /* clear pcmcia int  */
+#  define MDR_PI        (1<<5)  /* pcmcia int latch  */
+#  define MDR_EPI      (1<<14)  /* enable pcmcia int */
+#  define MDR_CPI      (1<<15)  /* clear pcmcia int  */
 
 #define PB1000_ACR1    0xBE000008
-  #define ACR1_SLOT_0_CD1    (1<<0)  /* card detect 1     */
-  #define ACR1_SLOT_0_CD2    (1<<1)  /* card detect 2     */
-  #define ACR1_SLOT_0_READY  (1<<2)  /* ready             */
-  #define ACR1_SLOT_0_STATUS (1<<3)  /* status change     */
-  #define ACR1_SLOT_0_VS1    (1<<4)  /* voltage sense 1   */
-  #define ACR1_SLOT_0_VS2    (1<<5)  /* voltage sense 2   */
-  #define ACR1_SLOT_0_INPACK (1<<6)  /* inpack pin status */
-  #define ACR1_SLOT_1_CD1    (1<<8)  /* card detect 1     */
-  #define ACR1_SLOT_1_CD2    (1<<9)  /* card detect 2     */
-  #define ACR1_SLOT_1_READY  (1<<10) /* ready             */
-  #define ACR1_SLOT_1_STATUS (1<<11) /* status change     */
-  #define ACR1_SLOT_1_VS1    (1<<12) /* voltage sense 1   */
-  #define ACR1_SLOT_1_VS2    (1<<13) /* voltage sense 2   */
-  #define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */
+#  define ACR1_SLOT_0_CD1    (1<<0)  /* card detect 1     */
+#  define ACR1_SLOT_0_CD2    (1<<1)  /* card detect 2     */
+#  define ACR1_SLOT_0_READY  (1<<2)  /* ready             */
+#  define ACR1_SLOT_0_STATUS (1<<3)  /* status change     */
+#  define ACR1_SLOT_0_VS1    (1<<4)  /* voltage sense 1   */
+#  define ACR1_SLOT_0_VS2    (1<<5)  /* voltage sense 2   */
+#  define ACR1_SLOT_0_INPACK (1<<6)  /* inpack pin status */
+#  define ACR1_SLOT_1_CD1    (1<<8)  /* card detect 1     */
+#  define ACR1_SLOT_1_CD2    (1<<9)  /* card detect 2     */
+#  define ACR1_SLOT_1_READY  (1<<10) /* ready             */
+#  define ACR1_SLOT_1_STATUS (1<<11) /* status change     */
+#  define ACR1_SLOT_1_VS1    (1<<12) /* voltage sense 1   */
+#  define ACR1_SLOT_1_VS2    (1<<13) /* voltage sense 2   */
+#  define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */
 
 #define CPLD_AUX0      0xBE00000C
 #define CPLD_AUX1      0xBE000010
diff --git a/include/asm-mips/mach-pb1x00/pb1100.h b/include/asm-mips/mach-pb1x00/pb1100.h
index 4c5a1cd01841..63aa3926b297 100644
--- a/include/asm-mips/mach-pb1x00/pb1100.h
+++ b/include/asm-mips/mach-pb1x00/pb1100.h
@@ -29,44 +29,44 @@
 
 #define PB1100_IDENT          0xAE000000
 #define BOARD_STATUS_REG      0xAE000004
-  #define PB1100_ROM_SEL         (1<<15)
-  #define PB1100_ROM_SIZ         (1<<14)
-  #define PB1100_SWAP_BOOT       (1<<13)
-  #define PB1100_FLASH_WP        (1<<12)
-  #define PB1100_ROM_H_STS       (1<<11)
-  #define PB1100_ROM_L_STS       (1<<10)
-  #define PB1100_FLASH_H_STS      (1<<9)
-  #define PB1100_FLASH_L_STS      (1<<8)
-  #define PB1100_SRAM_SIZ         (1<<7)
-  #define PB1100_TSC_BUSY         (1<<6)
-  #define PB1100_PCMCIA_VS_MASK   (3<<4)
-  #define PB1100_RS232_CD         (1<<3)
-  #define PB1100_RS232_CTS        (1<<2)
-  #define PB1100_RS232_DSR        (1<<1)
-  #define PB1100_RS232_RI         (1<<0)
+#  define PB1100_ROM_SEL         (1<<15)
+#  define PB1100_ROM_SIZ         (1<<14)
+#  define PB1100_SWAP_BOOT       (1<<13)
+#  define PB1100_FLASH_WP        (1<<12)
+#  define PB1100_ROM_H_STS       (1<<11)
+#  define PB1100_ROM_L_STS       (1<<10)
+#  define PB1100_FLASH_H_STS      (1<<9)
+#  define PB1100_FLASH_L_STS      (1<<8)
+#  define PB1100_SRAM_SIZ         (1<<7)
+#  define PB1100_TSC_BUSY         (1<<6)
+#  define PB1100_PCMCIA_VS_MASK   (3<<4)
+#  define PB1100_RS232_CD         (1<<3)
+#  define PB1100_RS232_CTS        (1<<2)
+#  define PB1100_RS232_DSR        (1<<1)
+#  define PB1100_RS232_RI         (1<<0)
 
 #define PB1100_IRDA_RS232     0xAE00000C
-  #define PB1100_IRDA_FULL       (0<<14) /* full power */
-  #define PB1100_IRDA_SHUTDOWN   (1<<14)
-  #define PB1100_IRDA_TT         (2<<14) /* 2/3 power */
-  #define PB1100_IRDA_OT         (3<<14) /* 1/3 power */
-  #define PB1100_IRDA_FIR        (1<<13)
+#  define PB1100_IRDA_FULL       (0<<14) /* full power */
+#  define PB1100_IRDA_SHUTDOWN   (1<<14)
+#  define PB1100_IRDA_TT         (2<<14) /* 2/3 power */
+#  define PB1100_IRDA_OT         (3<<14) /* 1/3 power */
+#  define PB1100_IRDA_FIR        (1<<13)
 
 #define PCMCIA_BOARD_REG     0xAE000010
-  #define PB1100_SD_WP1_RO       (1<<15) /* read only */
-  #define PB1100_SD_WP0_RO       (1<<14) /* read only */
-  #define PB1100_SD_PWR1         (1<<11) /* applies power to SD1 */
-  #define PB1100_SD_PWR0         (1<<10) /* applies power to SD0 */
-  #define PB1100_SEL_SD_CONN1     (1<<9)
-  #define PB1100_SEL_SD_CONN0     (1<<8)
-  #define PC_DEASSERT_RST         (1<<7)
-  #define PC_DRV_EN               (1<<4)
+#  define PB1100_SD_WP1_RO       (1<<15) /* read only */
+#  define PB1100_SD_WP0_RO       (1<<14) /* read only */
+#  define PB1100_SD_PWR1         (1<<11) /* applies power to SD1 */
+#  define PB1100_SD_PWR0         (1<<10) /* applies power to SD0 */
+#  define PB1100_SEL_SD_CONN1     (1<<9)
+#  define PB1100_SEL_SD_CONN0     (1<<8)
+#  define PC_DEASSERT_RST         (1<<7)
+#  define PC_DRV_EN               (1<<4)
 
 #define PB1100_G_CONTROL      0xAE000014 /* graphics control */
 
 #define PB1100_RST_VDDI       0xAE00001C
-  #define PB1100_SOFT_RESET      (1<<15) /* clear to reset the board */
-  #define PB1100_VDDI_MASK        (0x1F)
+#  define PB1100_SOFT_RESET      (1<<15) /* clear to reset the board */
+#  define PB1100_VDDI_MASK        (0x1F)
 
 #define PB1100_LEDS           0xAE000018
 
diff --git a/include/asm-mips/mach-pnx8550/kernel-entry-init.h b/include/asm-mips/mach-pnx8550/kernel-entry-init.h
index 57102fa9da51..982079f410b5 100644
--- a/include/asm-mips/mach-pnx8550/kernel-entry-init.h
+++ b/include/asm-mips/mach-pnx8550/kernel-entry-init.h
@@ -200,10 +200,10 @@ pr4450_instr_cache_invalidated:
 
         icache_invd_loop:
         /* 9 == register t1 */
-        .word   (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
-                (0 * ICACHE_SET_SIZE))  /* invalidate inst cache WAY0 */
-        .word   (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
-                (1 * ICACHE_SET_SIZE))  /* invalidate inst cache WAY1 */
+        .word   CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
+                (0 * ICACHE_SET_SIZE)  /* invalidate inst cache WAY0 */
+        .word   CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
+                (1 * ICACHE_SET_SIZE)  /* invalidate inst cache WAY1 */
 
         addiu   t1, t1, ICACHE_LINE_SIZE    /* T1 = next cache line index */
         bne     t2, zero, icache_invd_loop /* T2 = 0 if all sets invalidated */
@@ -235,14 +235,14 @@ pr4450_instr_cache_invalidated:
 
         dcache_wbinvd_loop:
         /* 9 == register t1 */
-        .word   (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
-                (0 * DCACHE_SET_SIZE))  /* writeback/invalidate WAY0 */
-        .word   (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
-                (1 * DCACHE_SET_SIZE))  /* writeback/invalidate WAY1 */
-        .word   (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
-                (2 * DCACHE_SET_SIZE))  /* writeback/invalidate WAY2 */
-        .word   (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
-                (3 * DCACHE_SET_SIZE))  /* writeback/invalidate WAY3 */
+        .word   CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
+                (0 * DCACHE_SET_SIZE)  /* writeback/invalidate WAY0 */
+        .word   CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
+                (1 * DCACHE_SET_SIZE)  /* writeback/invalidate WAY1 */
+        .word   CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
+                (2 * DCACHE_SET_SIZE)  /* writeback/invalidate WAY2 */
+        .word   CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
+                (3 * DCACHE_SET_SIZE)  /* writeback/invalidate WAY3 */
 
         addiu   t1, t1, DCACHE_LINE_SIZE  /* T1 = next data cache line index */
         bne     t2, zero, dcache_wbinvd_loop /* T2 = 0 when wbinvd entire cache */
diff --git a/include/asm-mips/parport.h b/include/asm-mips/parport.h
index a742e04e82de..f52656826cce 100644
--- a/include/asm-mips/parport.h
+++ b/include/asm-mips/parport.h
@@ -6,10 +6,10 @@
 #ifndef _ASM_PARPORT_H
 #define _ASM_PARPORT_H
 
-static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
-static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
+static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma);
+static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma)
 {
-        return parport_pc_find_isa_ports (autoirq, autodma);
+        return parport_pc_find_isa_ports(autoirq, autodma);
 }
 
 #endif /* _ASM_PARPORT_H */
diff --git a/include/asm-mips/prctl.h b/include/asm-mips/prctl.h
index 4aaaff670361..8121a9a75bfd 100644
--- a/include/asm-mips/prctl.h
+++ b/include/asm-mips/prctl.h
@@ -36,6 +36,6 @@ struct prda {
 
 #define t_sys           prda_sys
 
-ptrdiff_t prctl (int op, int v1, int v2);
+ptrdiff_t prctl(int op, int v1, int v2);
 
 #endif
diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h
index 3d6aa7c7ea81..ea2413c58e78 100644
--- a/include/asm-mips/semaphore.h
+++ b/include/asm-mips/semaphore.h
@@ -51,18 +51,18 @@ struct semaphore {
 #define DECLARE_MUTEX(name)             __DECLARE_SEMAPHORE_GENERIC(name, 1)
 #define DECLARE_MUTEX_LOCKED(name)      __DECLARE_SEMAPHORE_GENERIC(name, 0)
 
-static inline void sema_init (struct semaphore *sem, int val)
+static inline void sema_init(struct semaphore *sem, int val)
 {
         atomic_set(&sem->count, val);
         init_waitqueue_head(&sem->wait);
 }
 
-static inline void init_MUTEX (struct semaphore *sem)
+static inline void init_MUTEX(struct semaphore *sem)
 {
         sema_init(sem, 1);
 }
 
-static inline void init_MUTEX_LOCKED (struct semaphore *sem)
+static inline void init_MUTEX_LOCKED(struct semaphore *sem)
 {
         sema_init(sem, 0);
 }
diff --git a/include/asm-mips/sim.h b/include/asm-mips/sim.h
index 67c4fe52bb42..0cd719fabb51 100644
--- a/include/asm-mips/sim.h
+++ b/include/asm-mips/sim.h
@@ -18,7 +18,7 @@
 #ifdef CONFIG_32BIT
 
 #define save_static_function(symbol)                                    \
-__asm__ (                                                               \
+__asm__(                                                                \
         ".text\n\t"                                                     \
         ".globl\t" #symbol "\n\t"                                       \
         ".align\t2\n\t"                                                 \
@@ -46,7 +46,7 @@ __asm__ (								\
 #ifdef CONFIG_64BIT
 
 #define save_static_function(symbol)                                    \
-__asm__ (                                                               \
+__asm__(                                                                \
         ".text\n\t"                                                     \
         ".globl\t" #symbol "\n\t"                                       \
         ".align\t2\n\t"                                                 \
diff --git a/include/asm-mips/sn/addrs.h b/include/asm-mips/sn/addrs.h
index 8fa0af6b68d2..6aa086868249 100644
--- a/include/asm-mips/sn/addrs.h
+++ b/include/asm-mips/sn/addrs.h
@@ -50,7 +50,7 @@
 #define TO_NODE_ADDRSPACE(_pa)  (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK)
 
 #define CHANGE_ADDR_NASID(_pa, _nasid)  \
-                ((UINT64_CAST (_pa) & ~NASID_MASK) | \
+                ((UINT64_CAST(_pa) & ~NASID_MASK) | \
                  (UINT64_CAST(_nasid) <<  NASID_SHFT))
 
 
@@ -75,7 +75,7 @@
 
 
 #define RAW_NODE_SWIN_BASE(nasid, widget)                               \
-        (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
+        (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
 
 #define WIDGETID_GET(addr)      ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff))
 
@@ -192,21 +192,21 @@
 #define BDDIR_ENTRY_LO(_pa)     ((HSPEC_BASE +                                \
                                   NODE_ADDRSPACE_SIZE * 3 / 4 +               \
                                   0x200)                                    | \
-                                 UINT64_CAST (_pa)       & NASID_MASK       | \
-                                 UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK  | \
-                                 UINT64_CAST (_pa) >> 3 & 0x1f << 4)
+                                 UINT64_CAST(_pa)        & NASID_MASK       | \
+                                 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK  | \
+                                 UINT64_CAST(_pa) >> 3 & 0x1f << 4)
 
 #define BDDIR_ENTRY_HI(_pa)     ((HSPEC_BASE +                                \
                                   NODE_ADDRSPACE_SIZE * 3 / 4 +               \
                                   0x208)                                    | \
-                                 UINT64_CAST (_pa)       & NASID_MASK       | \
-                                 UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK  | \
-                                 UINT64_CAST (_pa) >> 3 & 0x1f << 4)
+                                 UINT64_CAST(_pa)        & NASID_MASK       | \
+                                 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK  | \
+                                 UINT64_CAST(_pa) >> 3 & 0x1f << 4)
 
 #define BDPRT_ENTRY(_pa, _rgn)  ((HSPEC_BASE +                                \
                                   NODE_ADDRSPACE_SIZE * 3 / 4)              | \
-                                 UINT64_CAST (_pa)       & NASID_MASK       | \
-                                 UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK  | \
+                                 UINT64_CAST(_pa)        & NASID_MASK       | \
+                                 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK  | \
                                  (_rgn) << 3)
 #define BDPRT_ENTRY_ADDR(_pa,_rgn) (BDPRT_ENTRY((_pa),(_rgn)))
 #define BDPRT_ENTRY_S(_pa,_rgn,_val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn))=(_val))
@@ -214,9 +214,9 @@
 
 #define BDECC_ENTRY(_pa)        ((HSPEC_BASE +                                \
                                   NODE_ADDRSPACE_SIZE / 2)                  | \
-                                 UINT64_CAST (_pa)       & NASID_MASK       | \
-                                 UINT64_CAST (_pa) >> 2 & BDECC_UPPER_MASK  | \
-                                 UINT64_CAST (_pa) >> 3 & 3)
+                                 UINT64_CAST(_pa)        & NASID_MASK       | \
+                                 UINT64_CAST(_pa) >> 2 & BDECC_UPPER_MASK  | \
+                                 UINT64_CAST(_pa) >> 3 & 3)
 
 /*
  * Macro to convert a back door directory or protection address into the
@@ -225,16 +225,16 @@
 #define BDADDR_IS_DIR(_ba)      ((UINT64_CAST  (_ba) & 0x200) != 0)
 #define BDADDR_IS_PRT(_ba)      ((UINT64_CAST  (_ba) & 0x200) == 0)
 
-#define BDDIR_TO_MEM(_ba)       (UINT64_CAST  (_ba) & NASID_MASK            | \
-                                 (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2  | \
-                                 (UINT64_CAST (_ba) & 0x1f << 4) << 3)
+#define BDDIR_TO_MEM(_ba)       (UINT64_CAST (_ba) & NASID_MASK            | \
+                                 (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2  | \
+                                 (UINT64_CAST(_ba) & 0x1f << 4) << 3)
 
-#define BDPRT_TO_MEM(_ba)       (UINT64_CAST  (_ba) & NASID_MASK            | \
-                                 (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2)
+#define BDPRT_TO_MEM(_ba)       (UINT64_CAST (_ba) & NASID_MASK     | \
+                                 (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2)
 
-#define BDECC_TO_MEM(_ba)       (UINT64_CAST  (_ba) & NASID_MASK            | \
-                                 (UINT64_CAST (_ba) & BDECC_UPPER_MASK)<<2  | \
-                                 (UINT64_CAST (_ba) & 3) << 3)
+#define BDECC_TO_MEM(_ba)       (UINT64_CAST (_ba) & NASID_MASK     | \
+                                 (UINT64_CAST(_ba) & BDECC_UPPER_MASK)<<2  | \
+                                 (UINT64_CAST(_ba) & 3) << 3)
 #endif /* CONFIG_SGI_IP27 */
 
 
@@ -282,7 +282,7 @@
  * the base of the register space.
  */
 #define HUB_REG_PTR(_base, _off)        \
-        (HUBREG_CAST ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
+        (HUBREG_CAST((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
 
 #define HUB_REG_PTR_L(_base, _off)      \
         HUB_L(HUB_REG_PTR((_base), (_off)))
diff --git a/include/asm-mips/sn/io.h b/include/asm-mips/sn/io.h
index ab2fa8cd2627..24c6775fbb0f 100644
--- a/include/asm-mips/sn/io.h
+++ b/include/asm-mips/sn/io.h
@@ -9,7 +9,7 @@
 #ifndef _ASM_SN_IO_H
 #define _ASM_SN_IO_H
 
-#if defined (CONFIG_SGI_IP27)
+#if defined(CONFIG_SGI_IP27)
 #include <asm/sn/sn0/hubio.h>
 #endif
 
diff --git a/include/asm-mips/sn/kldir.h b/include/asm-mips/sn/kldir.h
index 0573cbffc104..1327e12e9645 100644
--- a/include/asm-mips/sn/kldir.h
+++ b/include/asm-mips/sn/kldir.h
@@ -140,7 +140,7 @@
  */
 #define SYMMON_STACK_SIZE               0x8000
 
-#if defined (PROM)
+#if defined(PROM)
 
 /*
  * These defines are prom version dependent.  No code other than the IP27
diff --git a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
index 9e8cc52910f6..b06190093bbc 100644
--- a/include/asm-mips/sn/sn0/addrs.h
+++ b/include/asm-mips/sn/sn0/addrs.h
@@ -91,7 +91,7 @@
         : RAW_NODE_SWIN_BASE(nasid, widget))
 #else /* __ASSEMBLY__ */
 #define NODE_SWIN_BASE(nasid, widget) \
-     (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
+     (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
 #endif /* __ASSEMBLY__ */
 
 /*
@@ -106,7 +106,7 @@
 #define BWIN_WIDGET_MASK        0x7
 #define NODE_BWIN_BASE0(nasid)  (NODE_IO_BASE(nasid) + BWIN_SIZE)
 #define NODE_BWIN_BASE(nasid, bigwin)   (NODE_BWIN_BASE0(nasid) +       \
-                        (UINT64_CAST (bigwin) << BWIN_SIZE_BITS))
+                        (UINT64_CAST(bigwin) << BWIN_SIZE_BITS))
 
 #define BWIN_WIDGETADDR(addr)   ((addr) & BWIN_SIZEMASK)
 #define BWIN_WINDOWNUM(addr)    (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
@@ -259,7 +259,7 @@
  * CACHE_ERR_SP_PTR could either contain an address to the stack, or
  * the stack could start at CACHE_ERR_SP_PTR
  */
-#if defined (HUB_ERR_STS_WAR)
+#if defined(HUB_ERR_STS_WAR)
 #define CACHE_ERR_EFRAME        0x480
 #else /* HUB_ERR_STS_WAR */
 #define CACHE_ERR_EFRAME        0x400
@@ -275,7 +275,7 @@
 
 #define _ARCSPROM
 
-#if defined (HUB_ERR_STS_WAR)
+#if defined(HUB_ERR_STS_WAR)
 
 #define ERR_STS_WAR_REGISTER    IIO_IIBUSERR
 #define ERR_STS_WAR_ADDR        LOCAL_HUB_ADDR(IIO_IIBUSERR)
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index ddaf36a1e389..4d43dbb7f8b8 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -194,17 +194,17 @@ extern unsigned int sni_brd_type;
 #define PCIMT_INT_ACKNOWLEDGE   0xba000000
 
 /* board specific init functions */
-extern void sni_a20r_init (void);
-extern void sni_pcit_init (void);
-extern void sni_rm200_init (void);
-extern void sni_pcimt_init (void);
+extern void sni_a20r_init(void);
+extern void sni_pcit_init(void);
+extern void sni_rm200_init(void);
+extern void sni_pcimt_init(void);
 
 /* board specific irq init functions */
-extern void sni_a20r_irq_init (void);
-extern void sni_pcit_irq_init (void);
-extern void sni_pcit_cplus_irq_init (void);
-extern void sni_rm200_irq_init (void);
-extern void sni_pcimt_irq_init (void);
+extern void sni_a20r_irq_init(void);
+extern void sni_pcit_irq_init(void);
+extern void sni_pcit_cplus_irq_init(void);
+extern void sni_rm200_irq_init(void);
+extern void sni_pcimt_irq_init(void);
 
 /* timer inits */
 extern void sni_cpu_time_init(void);
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 480b574e2483..862f161e88b6 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -195,11 +195,11 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
 
 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 
-extern void set_handler (unsigned long offset, void *addr, unsigned long len);
-extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len);
+extern void set_handler(unsigned long offset, void *addr, unsigned long len);
+extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len);
 
 typedef void (*vi_handler_t)(void);
-extern void *set_vi_handler (int n, vi_handler_t addr);
+extern void *set_vi_handler(int n, vi_handler_t addr);
 
 extern void *set_except_vector(int n, void *addr);
 extern unsigned long ebase;
diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h
index b80de8e0fbbd..87c68ae76ff8 100644
--- a/include/asm-mips/timex.h
+++ b/include/asm-mips/timex.h
@@ -48,7 +48,7 @@
 
 typedef unsigned int cycles_t;
 
-static inline cycles_t get_cycles (void)
+static inline cycles_t get_cycles(void)
 {
         return read_c0_count();
 }
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index b25511787ee0..017dfb0d75c3 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -391,9 +391,9 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
 
 #define __invoke_copy_to_user(to,from,n)                                \
 ({                                                                      \
-        register void __user *__cu_to_r __asm__ ("$4");                 \
-        register const void *__cu_from_r __asm__ ("$5");                \
-        register long __cu_len_r __asm__ ("$6");                        \
+        register void __user *__cu_to_r __asm__("$4");                  \
+        register const void *__cu_from_r __asm__("$5");                 \
+        register long __cu_len_r __asm__("$6");                         \
                                                                         \
         __cu_to_r = (to);                                               \
         __cu_from_r = (from);                                           \
@@ -495,9 +495,9 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
 
 #define __invoke_copy_from_user(to,from,n)                              \
 ({                                                                      \
-        register void *__cu_to_r __asm__ ("$4");                        \
-        register const void __user *__cu_from_r __asm__ ("$5");         \
-        register long __cu_len_r __asm__ ("$6");                        \
+        register void *__cu_to_r __asm__("$4");                         \
+        register const void __user *__cu_from_r __asm__("$5");          \
+        register long __cu_len_r __asm__("$6");                         \
                                                                         \
         __cu_to_r = (to);                                               \
         __cu_from_r = (from);                                           \
@@ -518,9 +518,9 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
 
 #define __invoke_copy_from_user_inatomic(to,from,n)                     \
 ({                                                                      \
-        register void *__cu_to_r __asm__ ("$4");                        \
-        register const void __user *__cu_from_r __asm__ ("$5");         \
-        register long __cu_len_r __asm__ ("$6");                        \
+        register void *__cu_to_r __asm__("$4");                         \
+        register const void __user *__cu_from_r __asm__("$5");          \
+        register long __cu_len_r __asm__("$6");                         \
                                                                         \
         __cu_to_r = (to);                                               \
         __cu_from_r = (from);                                           \