aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSergey Ryazanov <ryazanov.s.a@gmail.com>2014-08-29 22:06:26 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:44:50 -0500
commit490a0ece6c9d7c39c1e6b523ee488f1c913aace7 (patch)
treee885344d1c3fea6a759c3e5d0bc3608b07e23f98
parentc4a305374bbf36414515d2ae00d588c67051e67d (diff)
MIPS: pci-ar7{1x, 24}x: remove odd locking in PCI config space access code
Caller (generic PCI code) already do proper locking so no need to add another one here. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Cc: Gabor Juhos <juhosg@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/7602/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/pci/pci-ar71xx.c13
-rw-r--r--arch/mips/pci/pci-ar724x.c23
2 files changed, 0 insertions, 36 deletions
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
index d471a26dd5f8..2b534aea20e4 100644
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -50,7 +50,6 @@
50 50
51struct ar71xx_pci_controller { 51struct ar71xx_pci_controller {
52 void __iomem *cfg_base; 52 void __iomem *cfg_base;
53 spinlock_t lock;
54 int irq; 53 int irq;
55 int irq_base; 54 int irq_base;
56 struct pci_controller pci_ctrl; 55 struct pci_controller pci_ctrl;
@@ -182,7 +181,6 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
182{ 181{
183 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); 182 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
184 void __iomem *base = apc->cfg_base; 183 void __iomem *base = apc->cfg_base;
185 unsigned long flags;
186 u32 data; 184 u32 data;
187 int err; 185 int err;
188 int ret; 186 int ret;
@@ -190,8 +188,6 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
190 ret = PCIBIOS_SUCCESSFUL; 188 ret = PCIBIOS_SUCCESSFUL;
191 data = ~0; 189 data = ~0;
192 190
193 spin_lock_irqsave(&apc->lock, flags);
194
195 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, 191 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
196 AR71XX_PCI_CFG_CMD_READ); 192 AR71XX_PCI_CFG_CMD_READ);
197 if (err) 193 if (err)
@@ -199,8 +195,6 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
199 else 195 else
200 data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA); 196 data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);
201 197
202 spin_unlock_irqrestore(&apc->lock, flags);
203
204 *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7]; 198 *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7];
205 199
206 return ret; 200 return ret;
@@ -211,15 +205,12 @@ static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
211{ 205{
212 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); 206 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
213 void __iomem *base = apc->cfg_base; 207 void __iomem *base = apc->cfg_base;
214 unsigned long flags;
215 int err; 208 int err;
216 int ret; 209 int ret;
217 210
218 value = value << (8 * (where & 3)); 211 value = value << (8 * (where & 3));
219 ret = PCIBIOS_SUCCESSFUL; 212 ret = PCIBIOS_SUCCESSFUL;
220 213
221 spin_lock_irqsave(&apc->lock, flags);
222
223 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, 214 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
224 AR71XX_PCI_CFG_CMD_WRITE); 215 AR71XX_PCI_CFG_CMD_WRITE);
225 if (err) 216 if (err)
@@ -227,8 +218,6 @@ static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
227 else 218 else
228 __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA); 219 __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA);
229 220
230 spin_unlock_irqrestore(&apc->lock, flags);
231
232 return ret; 221 return ret;
233} 222}
234 223
@@ -360,8 +349,6 @@ static int ar71xx_pci_probe(struct platform_device *pdev)
360 if (!apc) 349 if (!apc)
361 return -ENOMEM; 350 return -ENOMEM;
362 351
363 spin_lock_init(&apc->lock);
364
365 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base"); 352 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
366 apc->cfg_base = devm_ioremap_resource(&pdev->dev, res); 353 apc->cfg_base = devm_ioremap_resource(&pdev->dev, res);
367 if (IS_ERR(apc->cfg_base)) 354 if (IS_ERR(apc->cfg_base))
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 785b2659b519..b7a6fcbb8852 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -9,7 +9,6 @@
9 * by the Free Software Foundation. 9 * by the Free Software Foundation.
10 */ 10 */
11 11
12#include <linux/spinlock.h>
13#include <linux/irq.h> 12#include <linux/irq.h>
14#include <linux/pci.h> 13#include <linux/pci.h>
15#include <linux/module.h> 14#include <linux/module.h>
@@ -48,8 +47,6 @@ struct ar724x_pci_controller {
48 bool bar0_is_cached; 47 bool bar0_is_cached;
49 u32 bar0_value; 48 u32 bar0_value;
50 49
51 spinlock_t lock;
52
53 struct pci_controller pci_controller; 50 struct pci_controller pci_controller;
54 struct resource io_res; 51 struct resource io_res;
55 struct resource mem_res; 52 struct resource mem_res;
@@ -75,7 +72,6 @@ pci_bus_to_ar724x_controller(struct pci_bus *bus)
75static int ar724x_pci_local_write(struct ar724x_pci_controller *apc, 72static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
76 int where, int size, u32 value) 73 int where, int size, u32 value)
77{ 74{
78 unsigned long flags;
79 void __iomem *base; 75 void __iomem *base;
80 u32 data; 76 u32 data;
81 int s; 77 int s;
@@ -86,8 +82,6 @@ static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
86 return PCIBIOS_DEVICE_NOT_FOUND; 82 return PCIBIOS_DEVICE_NOT_FOUND;
87 83
88 base = apc->crp_base; 84 base = apc->crp_base;
89
90 spin_lock_irqsave(&apc->lock, flags);
91 data = __raw_readl(base + (where & ~3)); 85 data = __raw_readl(base + (where & ~3));
92 86
93 switch (size) { 87 switch (size) {
@@ -105,14 +99,12 @@ static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
105 data = value; 99 data = value;
106 break; 100 break;
107 default: 101 default:
108 spin_unlock_irqrestore(&apc->lock, flags);
109 return PCIBIOS_BAD_REGISTER_NUMBER; 102 return PCIBIOS_BAD_REGISTER_NUMBER;
110 } 103 }
111 104
112 __raw_writel(data, base + (where & ~3)); 105 __raw_writel(data, base + (where & ~3));
113 /* flush write */ 106 /* flush write */
114 __raw_readl(base + (where & ~3)); 107 __raw_readl(base + (where & ~3));
115 spin_unlock_irqrestore(&apc->lock, flags);
116 108
117 return PCIBIOS_SUCCESSFUL; 109 return PCIBIOS_SUCCESSFUL;
118} 110}
@@ -121,7 +113,6 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
121 int size, uint32_t *value) 113 int size, uint32_t *value)
122{ 114{
123 struct ar724x_pci_controller *apc; 115 struct ar724x_pci_controller *apc;
124 unsigned long flags;
125 void __iomem *base; 116 void __iomem *base;
126 u32 data; 117 u32 data;
127 118
@@ -133,8 +124,6 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
133 return PCIBIOS_DEVICE_NOT_FOUND; 124 return PCIBIOS_DEVICE_NOT_FOUND;
134 125
135 base = apc->devcfg_base; 126 base = apc->devcfg_base;
136
137 spin_lock_irqsave(&apc->lock, flags);
138 data = __raw_readl(base + (where & ~3)); 127 data = __raw_readl(base + (where & ~3));
139 128
140 switch (size) { 129 switch (size) {
@@ -153,13 +142,9 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
153 case 4: 142 case 4:
154 break; 143 break;
155 default: 144 default:
156 spin_unlock_irqrestore(&apc->lock, flags);
157
158 return PCIBIOS_BAD_REGISTER_NUMBER; 145 return PCIBIOS_BAD_REGISTER_NUMBER;
159 } 146 }
160 147
161 spin_unlock_irqrestore(&apc->lock, flags);
162
163 if (where == PCI_BASE_ADDRESS_0 && size == 4 && 148 if (where == PCI_BASE_ADDRESS_0 && size == 4 &&
164 apc->bar0_is_cached) { 149 apc->bar0_is_cached) {
165 /* use the cached value */ 150 /* use the cached value */
@@ -175,7 +160,6 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
175 int size, uint32_t value) 160 int size, uint32_t value)
176{ 161{
177 struct ar724x_pci_controller *apc; 162 struct ar724x_pci_controller *apc;
178 unsigned long flags;
179 void __iomem *base; 163 void __iomem *base;
180 u32 data; 164 u32 data;
181 int s; 165 int s;
@@ -209,8 +193,6 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
209 } 193 }
210 194
211 base = apc->devcfg_base; 195 base = apc->devcfg_base;
212
213 spin_lock_irqsave(&apc->lock, flags);
214 data = __raw_readl(base + (where & ~3)); 196 data = __raw_readl(base + (where & ~3));
215 197
216 switch (size) { 198 switch (size) {
@@ -228,15 +210,12 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
228 data = value; 210 data = value;
229 break; 211 break;
230 default: 212 default:
231 spin_unlock_irqrestore(&apc->lock, flags);
232
233 return PCIBIOS_BAD_REGISTER_NUMBER; 213 return PCIBIOS_BAD_REGISTER_NUMBER;
234 } 214 }
235 215
236 __raw_writel(data, base + (where & ~3)); 216 __raw_writel(data, base + (where & ~3));
237 /* flush write */ 217 /* flush write */
238 __raw_readl(base + (where & ~3)); 218 __raw_readl(base + (where & ~3));
239 spin_unlock_irqrestore(&apc->lock, flags);
240 219
241 return PCIBIOS_SUCCESSFUL; 220 return PCIBIOS_SUCCESSFUL;
242} 221}
@@ -380,8 +359,6 @@ static int ar724x_pci_probe(struct platform_device *pdev)
380 if (apc->irq < 0) 359 if (apc->irq < 0)
381 return -EINVAL; 360 return -EINVAL;
382 361
383 spin_lock_init(&apc->lock);
384
385 res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); 362 res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
386 if (!res) 363 if (!res)
387 return -EINVAL; 364 return -EINVAL;