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path: root/arch/mips/pci/pci-ar71xx.c
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Diffstat (limited to 'arch/mips/pci/pci-ar71xx.c')
-rw-r--r--arch/mips/pci/pci-ar71xx.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
index d471a26dd5f8..2b534aea20e4 100644
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -50,7 +50,6 @@
50 50
51struct ar71xx_pci_controller { 51struct ar71xx_pci_controller {
52 void __iomem *cfg_base; 52 void __iomem *cfg_base;
53 spinlock_t lock;
54 int irq; 53 int irq;
55 int irq_base; 54 int irq_base;
56 struct pci_controller pci_ctrl; 55 struct pci_controller pci_ctrl;
@@ -182,7 +181,6 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
182{ 181{
183 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); 182 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
184 void __iomem *base = apc->cfg_base; 183 void __iomem *base = apc->cfg_base;
185 unsigned long flags;
186 u32 data; 184 u32 data;
187 int err; 185 int err;
188 int ret; 186 int ret;
@@ -190,8 +188,6 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
190 ret = PCIBIOS_SUCCESSFUL; 188 ret = PCIBIOS_SUCCESSFUL;
191 data = ~0; 189 data = ~0;
192 190
193 spin_lock_irqsave(&apc->lock, flags);
194
195 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, 191 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
196 AR71XX_PCI_CFG_CMD_READ); 192 AR71XX_PCI_CFG_CMD_READ);
197 if (err) 193 if (err)
@@ -199,8 +195,6 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
199 else 195 else
200 data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA); 196 data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);
201 197
202 spin_unlock_irqrestore(&apc->lock, flags);
203
204 *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7]; 198 *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7];
205 199
206 return ret; 200 return ret;
@@ -211,15 +205,12 @@ static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
211{ 205{
212 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); 206 struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus);
213 void __iomem *base = apc->cfg_base; 207 void __iomem *base = apc->cfg_base;
214 unsigned long flags;
215 int err; 208 int err;
216 int ret; 209 int ret;
217 210
218 value = value << (8 * (where & 3)); 211 value = value << (8 * (where & 3));
219 ret = PCIBIOS_SUCCESSFUL; 212 ret = PCIBIOS_SUCCESSFUL;
220 213
221 spin_lock_irqsave(&apc->lock, flags);
222
223 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, 214 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
224 AR71XX_PCI_CFG_CMD_WRITE); 215 AR71XX_PCI_CFG_CMD_WRITE);
225 if (err) 216 if (err)
@@ -227,8 +218,6 @@ static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
227 else 218 else
228 __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA); 219 __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA);
229 220
230 spin_unlock_irqrestore(&apc->lock, flags);
231
232 return ret; 221 return ret;
233} 222}
234 223
@@ -360,8 +349,6 @@ static int ar71xx_pci_probe(struct platform_device *pdev)
360 if (!apc) 349 if (!apc)
361 return -ENOMEM; 350 return -ENOMEM;
362 351
363 spin_lock_init(&apc->lock);
364
365 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base"); 352 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
366 apc->cfg_base = devm_ioremap_resource(&pdev->dev, res); 353 apc->cfg_base = devm_ioremap_resource(&pdev->dev, res);
367 if (IS_ERR(apc->cfg_base)) 354 if (IS_ERR(apc->cfg_base))