diff options
| author | Jiang Liu <jiang.liu@huawei.com> | 2012-07-24 05:20:33 -0400 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-08-23 12:11:16 -0400 |
| commit | 479e0d485eaab452cf248cd1a9520015023b35b2 (patch) | |
| tree | 648ad71d7bd2838678f66d055fcaae654b5e4ddc | |
| parent | 532c5f69e223ec846511fa4a14fa1fc8bca142a2 (diff) | |
rtl8192e: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify rtl8192e driver.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/rtl_pci.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c index ddadcc3e4e7c..5abbee37cdca 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c | |||
| @@ -31,12 +31,10 @@ static void rtl8192_parse_pci_configuration(struct pci_dev *pdev, | |||
| 31 | struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev); | 31 | struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev); |
| 32 | 32 | ||
| 33 | u8 tmp; | 33 | u8 tmp; |
| 34 | int pos; | 34 | u16 LinkCtrlReg; |
| 35 | u8 LinkCtrlReg; | ||
| 36 | 35 | ||
| 37 | pos = pci_find_capability(priv->pdev, PCI_CAP_ID_EXP); | 36 | pcie_capability_read_word(priv->pdev, PCI_EXP_LNKCTL, &LinkCtrlReg); |
| 38 | pci_read_config_byte(priv->pdev, pos + PCI_EXP_LNKCTL, &LinkCtrlReg); | 37 | priv->NdisAdapter.LinkCtrlReg = (u8)LinkCtrlReg; |
| 39 | priv->NdisAdapter.LinkCtrlReg = LinkCtrlReg; | ||
| 40 | 38 | ||
| 41 | RT_TRACE(COMP_INIT, "Link Control Register =%x\n", | 39 | RT_TRACE(COMP_INIT, "Link Control Register =%x\n", |
| 42 | priv->NdisAdapter.LinkCtrlReg); | 40 | priv->NdisAdapter.LinkCtrlReg); |
