Merge branch 'master' of git://dev.phrozen.org/mips-next into mips-for-linux-next

24 files changed, 1045 insertions, 251 deletions

diff --git a/Documentation/devicetree/bindings/spi/spi-octeon.txt b/Documentation/devicetree/bindings/spi/spi-octeon.txt
new file mode 100644
index 000000000000..431add192342
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-octeon.txt
@@ -0,0 +1,33 @@
+Cavium, Inc. OCTEON SOC SPI master controller.
+
+Required properties:
+- compatible : "cavium,octeon-3010-spi"
+- reg : The register base for the controller.
+- interrupts : One interrupt, used by the controller.
+- #address-cells : <1>, as required by generic SPI binding.
+- #size-cells : <0>, also as required by generic SPI binding.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+        spi@1070000001000 {
+                compatible = "cavium,octeon-3010-spi";
+                reg = <0x10700 0x00001000 0x0 0x100>;
+                interrupts = <0 58>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                eeprom@0 {
+                        compatible = "st,m95256", "atmel,at25";
+                        reg = <0>;
+                        spi-max-frequency = <5000000>;
+                        spi-cpha;
+                        spi-cpol;
+
+                        pagesize = <64>;
+                        size = <32768>;
+                        address-width = <16>;
+                };
+        };
+
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index bbd193b9dfbb..4cd538b42a3f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -844,6 +844,7 @@ config NLM_XLP_BOARD
         select ZONE_DMA if 64BIT
         select SYNC_R4K
         select SYS_HAS_EARLY_PRINTK
+        select USE_OF
         help
           This board is based on Netlogic XLP Processor.
           Say Y here if you have a XLP based board.
@@ -1892,6 +1893,18 @@ config SIBYTE_DMA_PAGEOPS
 config CPU_HAS_PREFETCH
         bool
 
+config CPU_GENERIC_DUMP_TLB
+        bool
+        default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
+
+config CPU_R4K_FPU
+        bool
+        default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
+
+config CPU_R4K_CACHE_TLB
+        bool
+        default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
+
 choice
         prompt "MIPS MT options"
 
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index 18e051ad18a5..da24c2bd9b7c 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -56,8 +56,8 @@ static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
 #define is_ext_irq_cascaded     0
 #define ext_irq_start           0
 #define ext_irq_end             0
-#define ext_irq_count           0
-#define ext_irq_cfg_reg1        0
+#define ext_irq_count           4
+#define ext_irq_cfg_reg1        PERF_EXTIRQ_CFG_REG_6345
 #define ext_irq_cfg_reg2        0
 #endif
 #ifdef CONFIG_BCM63XX_CPU_6348
@@ -143,11 +143,15 @@ static void bcm63xx_init_irq(void)
                 irq_stat_addr += PERF_IRQSTAT_6338_REG;
                 irq_mask_addr += PERF_IRQMASK_6338_REG;
                 irq_bits = 32;
+                ext_irq_count = 4;
+                ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
                 break;
         case BCM6345_CPU_ID:
                 irq_stat_addr += PERF_IRQSTAT_6345_REG;
                 irq_mask_addr += PERF_IRQMASK_6345_REG;
                 irq_bits = 32;
+                ext_irq_count = 4;
+                ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
                 break;
         case BCM6348_CPU_ID:
                 irq_stat_addr += PERF_IRQSTAT_6348_REG;
@@ -434,7 +438,8 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
         reg = bcm_perf_readl(regaddr);
         irq %= 4;
 
-        if (BCMCPU_IS_6348()) {
+        switch (bcm63xx_get_cpu_id()) {
+        case BCM6348_CPU_ID:
                 if (levelsense)
                         reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
                 else
@@ -447,9 +452,13 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
                         reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
                 else
                         reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
-        }
+                break;
 
-        if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
+        case BCM6328_CPU_ID:
+        case BCM6338_CPU_ID:
+        case BCM6345_CPU_ID:
+        case BCM6358_CPU_ID:
+        case BCM6368_CPU_ID:
                 if (levelsense)
                         reg |= EXTIRQ_CFG_LEVELSENSE(irq);
                 else
@@ -462,6 +471,9 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
                         reg |= EXTIRQ_CFG_BOTHEDGE(irq);
                 else
                         reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+                break;
+        default:
+                BUG();
         }
 
         bcm_perf_writel(reg, regaddr);
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 0e74a13639cd..314231be788c 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -74,6 +74,9 @@ void bcm63xx_machine_reboot(void)
         case BCM6338_CPU_ID:
                 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
                 break;
+        case BCM6345_CPU_ID:
+                perf_regs[0] = PER