diff options
author | Stephen Warren <swarren@nvidia.com> | 2013-11-15 14:22:53 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-12-16 16:09:17 -0500 |
commit | 2f5a913eb59496e37c64449dfdcd66b0bef90630 (patch) | |
tree | 1e9e390518896b78bca527bc58539334e887e16f | |
parent | f71e4f034a57b0203d91aa7c805a12c75f476dab (diff) |
ARM: tegra: add APB DMA controller to Tegra124 DT
Instantiate the APB DMA controller in the Tegra124 DT, and add all
DMA-related properties to other DT nodes that rely on (reference) the
DMA controller's node.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 4ed6a3a8e2de..9a8b5b8d8397 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi | |||
@@ -56,6 +56,47 @@ | |||
56 | interrupt-controller; | 56 | interrupt-controller; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | apbdma: dma@60020000 { | ||
60 | compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma"; | ||
61 | reg = <0x60020000 0x1400>; | ||
62 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, | ||
63 | <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, | ||
64 | <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, | ||
65 | <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, | ||
66 | <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, | ||
67 | <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, | ||
68 | <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, | ||
69 | <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, | ||
70 | <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, | ||
71 | <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, | ||
72 | <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, | ||
73 | <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, | ||
74 | <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, | ||
75 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | ||
76 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, | ||
77 | <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, | ||
78 | <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, | ||
79 | <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, | ||
80 | <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, | ||
81 | <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, | ||
82 | <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, | ||
83 | <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, | ||
84 | <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, | ||
85 | <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, | ||
86 | <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, | ||
87 | <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, | ||
88 | <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, | ||
89 | <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, | ||
90 | <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, | ||
91 | <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, | ||
92 | <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, | ||
93 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | ||
94 | clocks = <&tegra_car TEGRA124_CLK_APBDMA>; | ||
95 | resets = <&tegra_car 34>; | ||
96 | reset-names = "dma"; | ||
97 | #dma-cells = <1>; | ||
98 | }; | ||
99 | |||
59 | /* | 100 | /* |
60 | * There are two serial driver i.e. 8250 based simple serial | 101 | * There are two serial driver i.e. 8250 based simple serial |
61 | * driver and APB DMA based serial driver for higher baudrate | 102 | * driver and APB DMA based serial driver for higher baudrate |
@@ -72,6 +113,8 @@ | |||
72 | clocks = <&tegra_car TEGRA124_CLK_UARTA>; | 113 | clocks = <&tegra_car TEGRA124_CLK_UARTA>; |
73 | resets = <&tegra_car 6>; | 114 | resets = <&tegra_car 6>; |
74 | reset-names = "serial"; | 115 | reset-names = "serial"; |
116 | dmas = <&apbdma 8>, <&apbdma 8>; | ||
117 | dma-names = "rx", "tx"; | ||
75 | status = "disabled"; | 118 | status = "disabled"; |
76 | }; | 119 | }; |
77 | 120 | ||
@@ -83,6 +126,8 @@ | |||
83 | clocks = <&tegra_car TEGRA124_CLK_UARTB>; | 126 | clocks = <&tegra_car TEGRA124_CLK_UARTB>; |
84 | resets = <&tegra_car 7>; | 127 | resets = <&tegra_car 7>; |
85 | reset-names = "serial"; | 128 | reset-names = "serial"; |
129 | dmas = <&apbdma 9>, <&apbdma 9>; | ||
130 | dma-names = "rx", "tx"; | ||
86 | status = "disabled"; | 131 | status = "disabled"; |
87 | }; | 132 | }; |
88 | 133 | ||
@@ -94,6 +139,8 @@ | |||
94 | clocks = <&tegra_car TEGRA124_CLK_UARTC>; | 139 | clocks = <&tegra_car TEGRA124_CLK_UARTC>; |
95 | resets = <&tegra_car 55>; | 140 | resets = <&tegra_car 55>; |
96 | reset-names = "serial"; | 141 | reset-names = "serial"; |
142 | dmas = <&apbdma 10>, <&apbdma 10>; | ||
143 | dma-names = "rx", "tx"; | ||
97 | status = "disabled"; | 144 | status = "disabled"; |
98 | }; | 145 | }; |
99 | 146 | ||
@@ -105,6 +152,8 @@ | |||
105 | clocks = <&tegra_car TEGRA124_CLK_UARTD>; | 152 | clocks = <&tegra_car TEGRA124_CLK_UARTD>; |
106 | resets = <&tegra_car 65>; | 153 | resets = <&tegra_car 65>; |
107 | reset-names = "serial"; | 154 | reset-names = "serial"; |
155 | dmas = <&apbdma 19>, <&apbdma 19>; | ||
156 | dma-names = "rx", "tx"; | ||
108 | status = "disabled"; | 157 | status = "disabled"; |
109 | }; | 158 | }; |
110 | 159 | ||
@@ -116,6 +165,8 @@ | |||
116 | clocks = <&tegra_car TEGRA124_CLK_UARTE>; | 165 | clocks = <&tegra_car TEGRA124_CLK_UARTE>; |
117 | resets = <&tegra_car 66>; | 166 | resets = <&tegra_car 66>; |
118 | reset-names = "serial"; | 167 | reset-names = "serial"; |
168 | dmas = <&apbdma 20>, <&apbdma 20>; | ||
169 | dma-names = "rx", "tx"; | ||
119 | status = "disabled"; | 170 | status = "disabled"; |
120 | }; | 171 | }; |
121 | 172 | ||