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-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_mac.c176
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mac.c203
-rw-r--r--drivers/net/wireless/ath/ath9k/hw-ops.h58
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h22
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h1
6 files changed, 0 insertions, 472 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_mac.c b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
index cb86c957708..f7d8e516a2a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
@@ -270,35 +270,6 @@ ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
270 | SM(i->rtscts_rate, AR_RTSCTSRate); 270 | SM(i->rtscts_rate, AR_RTSCTSRate);
271} 271}
272 272
273static void ar9002_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
274 bool is_firstseg, bool is_lastseg,
275 const void *ds0, dma_addr_t buf_addr,
276 unsigned int qcu)
277{
278 struct ar5416_desc *ads = AR5416DESC(ds);
279
280 ads->ds_data = buf_addr;
281
282 if (is_firstseg) {
283 ads->ds_ctl1 |= seglen | (is_lastseg ? 0 : AR_TxMore);
284 } else if (is_lastseg) {
285 ads->ds_ctl0 = 0;
286 ads->ds_ctl1 = seglen;
287 ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
288 ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
289 } else {
290 ads->ds_ctl0 = 0;
291 ads->ds_ctl1 = seglen | AR_TxMore;
292 ads->ds_ctl2 = 0;
293 ads->ds_ctl3 = 0;
294 }
295 ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
296 ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
297 ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
298 ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
299 ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
300}
301
302static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds, 273static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
303 struct ath_tx_status *ts) 274 struct ath_tx_status *ts)
304{ 275{
@@ -371,145 +342,6 @@ static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
371 return 0; 342 return 0;
372} 343}
373 344
374static void ar9002_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
375 u32 pktLen, enum ath9k_pkt_type type,
376 u32 txPower, u8 keyIx,
377 enum ath9k_key_type keyType, u32 flags)
378{
379 struct ar5416_desc *ads = AR5416DESC(ds);
380
381 if (txPower > 63)
382 txPower = 63;
383
384 ads->ds_ctl0 = (pktLen & AR_FrameLen)
385 | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
386 | SM(txPower, AR_XmitPower)
387 | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
388 | (flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
389 | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0);
390
391 ads->ds_ctl1 =
392 (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
393 | SM(type, AR_FrameType)
394 | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
395 | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
396 | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
397
398 ads->ds_ctl6 = SM(keyType, AR_EncrType);
399
400 if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
401 ads->ds_ctl8 = 0;
402 ads->ds_ctl9 = 0;
403 ads->ds_ctl10 = 0;
404 ads->ds_ctl11 = 0;
405 }
406}
407
408static void ar9002_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
409{
410 struct ar5416_desc *ads = AR5416DESC(ds);
411
412 if (val)
413 ads->ds_ctl0 |= AR_ClrDestMask;
414 else
415 ads->ds_ctl0 &= ~AR_ClrDestMask;
416}
417
418static void ar9002_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
419 void *lastds,
420 u32 durUpdateEn, u32 rtsctsRate,
421 u32 rtsctsDuration,
422 struct ath9k_11n_rate_series series[],
423 u32 nseries, u32 flags)
424{
425 struct ar5416_desc *ads = AR5416DESC(ds);
426 struct ar5416_desc *last_ads = AR5416DESC(lastds);
427 u32 ds_ctl0;
428
429 if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
430 ds_ctl0 = ads->ds_ctl0;
431
432 if (flags & ATH9K_TXDESC_RTSENA) {
433 ds_ctl0 &= ~AR_CTSEnable;
434 ds_ctl0 |= AR_RTSEnable;
435 } else {
436 ds_ctl0 &= ~AR_RTSEnable;
437 ds_ctl0 |= AR_CTSEnable;
438 }
439
440 ads->ds_ctl0 = ds_ctl0;
441 } else {
442 ads->ds_ctl0 =
443 (ads->ds_ctl0 & ~(AR_RTSEnable | AR_CTSEnable));
444 }
445
446 ads->ds_ctl2 = set11nTries(series, 0)
447 | set11nTries(series, 1)
448 | set11nTries(series, 2)
449 | set11nTries(series, 3)
450 | (durUpdateEn ? AR_DurUpdateEna : 0)
451 | SM(0, AR_BurstDur);
452
453 ads->ds_ctl3 = set11nRate(series, 0)
454 | set11nRate(series, 1)
455 | set11nRate(series, 2)
456 | set11nRate(series, 3);
457
458 ads->ds_ctl4 = set11nPktDurRTSCTS(series, 0)
459 | set11nPktDurRTSCTS(series, 1);
460
461 ads->ds_ctl5 = set11nPktDurRTSCTS(series, 2)
462 | set11nPktDurRTSCTS(series, 3);
463
464 ads->ds_ctl7 = set11nRateFlags(series, 0)
465 | set11nRateFlags(series, 1)
466 | set11nRateFlags(series, 2)
467 | set11nRateFlags(series, 3)
468 | SM(rtsctsRate, AR_RTSCTSRate);
469 last_ads->ds_ctl2 = ads->ds_ctl2;
470 last_ads->ds_ctl3 = ads->ds_ctl3;
471}
472
473static void ar9002_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
474 u32 aggrLen)
475{
476 struct ar5416_desc *ads = AR5416DESC(ds);
477
478 ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
479 ads->ds_ctl6 &= ~AR_AggrLen;
480 ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
481}
482
483static void ar9002_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
484 u32 numDelims)
485{
486 struct ar5416_desc *ads = AR5416DESC(ds);
487 unsigned int ctl6;
488
489 ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
490
491 ctl6 = ads->ds_ctl6;
492 ctl6 &= ~AR_PadDelim;
493 ctl6 |= SM(numDelims, AR_PadDelim);
494 ads->ds_ctl6 = ctl6;
495}
496
497static void ar9002_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
498{
499 struct ar5416_desc *ads = AR5416DESC(ds);
500
501 ads->ds_ctl1 |= AR_IsAggr;
502 ads->ds_ctl1 &= ~AR_MoreAggr;
503 ads->ds_ctl6 &= ~AR_PadDelim;
504}
505
506static void ar9002_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
507{
508 struct ar5416_desc *ads = AR5416DESC(ds);
509
510 ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
511}
512
513void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, 345void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
514 u32 size, u32 flags) 346 u32 size, u32 flags)
515{ 347{
@@ -534,13 +366,5 @@ void ar9002_hw_attach_mac_ops(struct ath_hw *ah)
534 ops->set_desc_link = ar9002_hw_set_desc_link; 366 ops->set_desc_link = ar9002_hw_set_desc_link;
535 ops->get_isr = ar9002_hw_get_isr; 367 ops->get_isr = ar9002_hw_get_isr;
536 ops->set_txdesc = ar9002_set_txdesc; 368 ops->set_txdesc = ar9002_set_txdesc;
537 ops->fill_txdesc = ar9002_hw_fill_txdesc;
538 ops->proc_txdesc = ar9002_hw_proc_txdesc; 369 ops->proc_txdesc = ar9002_hw_proc_txdesc;
539 ops->set11n_txdesc = ar9002_hw_set11n_txdesc;
540 ops->set11n_ratescenario = ar9002_hw_set11n_ratescenario;
541 ops->set11n_aggr_first = ar9002_hw_set11n_aggr_first;
542 ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle;
543 ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last;
544 ops->clr11n_aggr = ar9002_hw_clr11n_aggr;
545 ops->set_clrdmask = ar9002_hw_set_clrdmask;
546} 370}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
index e3382d5013c..6cabc85bf61 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
@@ -311,46 +311,6 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
311 return true; 311 return true;
312} 312}
313 313
314static void ar9003_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
315 bool is_firstseg, bool is_lastseg,
316 const void *ds0, dma_addr_t buf_addr,
317 unsigned int qcu)
318{
319 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
320 unsigned int descid = 0;
321
322 ads->info = (ATHEROS_VENDOR_ID << AR_DescId_S) |
323 (1 << AR_TxRxDesc_S) |
324 (1 << AR_CtrlStat_S) |
325 (qcu << AR_TxQcuNum_S) | 0x17;
326
327 ads->data0 = buf_addr;
328 ads->data1 = 0;
329 ads->data2 = 0;
330 ads->data3 = 0;
331
332 ads->ctl3 = (seglen << AR_BufLen_S);
333 ads->ctl3 &= AR_BufLen;
334
335 /* Fill in pointer checksum and descriptor id */
336 ads->ctl10 = (descid << AR_TxDescId_S);
337
338 if (is_firstseg) {
339 ads->ctl12 |= (is_lastseg ? 0 : AR_TxMore);
340 } else if (is_lastseg) {
341 ads->ctl11 = 0;
342 ads->ctl12 = 0;
343 ads->ctl13 = AR9003TXC_CONST(ds0)->ctl13;
344 ads->ctl14 = AR9003TXC_CONST(ds0)->ctl14;
345 } else {
346 /* XXX Intermediate descriptor in a multi-descriptor frame.*/
347 ads->ctl11 = 0;
348 ads->ctl12 = AR_TxMore;
349 ads->ctl13 = 0;
350 ads->ctl14 = 0;
351 }
352}
353
354static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds, 314static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
355 struct ath_tx_status *ts) 315 struct ath_tx_status *ts)
356{ 316{
@@ -435,161 +395,6 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
435 return 0; 395 return 0;
436} 396}
437 397
438static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
439 u32 pktlen, enum ath9k_pkt_type type, u32 txpower,
440 u8 keyIx, enum ath9k_key_type keyType, u32 flags)
441{
442 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
443
444 if (txpower > ah->txpower_limit)
445 txpower = ah->txpower_limit;
446
447 if (txpower > 63)
448 txpower = 63;
449
450 ads->ctl11 = (pktlen & AR_FrameLen)
451 | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
452 | SM(txpower, AR_XmitPower)
453 | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
454 | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
455 | (flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0);
456
457 ads->ctl12 =
458 (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
459 | SM(type, AR_FrameType)
460 | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
461 | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
462 | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
463
464 ads->ctl17 = SM(keyType, AR_EncrType) |
465 (flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
466 ads->ctl18 = 0;
467 ads->ctl19 = AR_Not_Sounding;
468
469 ads->ctl20 = 0;
470 ads->ctl21 = 0;
471 ads->ctl22 = 0;
472}
473
474static void ar9003_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
475{
476 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
477
478 if (val)
479 ads->ctl11 |= AR_ClrDestMask;
480 else
481 ads->ctl11 &= ~AR_ClrDestMask;
482}
483
484static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
485 void *lastds,
486 u32 durUpdateEn, u32 rtsctsRate,
487 u32 rtsctsDuration,
488 struct ath9k_11n_rate_series series[],
489 u32 nseries, u32 flags)
490{
491 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
492 struct ar9003_txc *last_ads = (struct ar9003_txc *) lastds;
493 u_int32_t ctl11;
494
495 if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
496 ctl11 = ads->ctl11;
497
498 if (flags & ATH9K_TXDESC_RTSENA) {
499 ctl11 &= ~AR_CTSEnable;
500 ctl11 |= AR_RTSEnable;
501 } else {
502 ctl11 &= ~AR_RTSEnable;
503 ctl11 |= AR_CTSEnable;
504 }
505
506 ads->ctl11 = ctl11;
507 } else {
508 ads->ctl11 = (ads->ctl11 & ~(AR_RTSEnable | AR_CTSEnable));
509 }
510
511 ads->ctl13 = set11nTries(series, 0)
512 | set11nTries(series, 1)
513 | set11nTries(series, 2)
514 | set11nTries(series, 3)
515 | (durUpdateEn ? AR_DurUpdateEna : 0)
516 | SM(0, AR_BurstDur);
517
518 ads->ctl14 = set11nRate(series, 0)
519 | set11nRate(series, 1)
520 | set11nRate(series, 2)
521 | set11nRate(series, 3);
522
523 ads->ctl15 = set11nPktDurRTSCTS(series, 0)
524 | set11nPktDurRTSCTS(series, 1);
525
526 ads->ctl16 = set11nPktDurRTSCTS(series, 2)
527 | set11nPktDurRTSCTS(series, 3);
528
529 ads->ctl18 = set11nRateFlags(series, 0)
530 | set11nRateFlags(series, 1)
531 | set11nRateFlags(series, 2)
532 | set11nRateFlags(series, 3)
533 | SM(rtsctsRate, AR_RTSCTSRate);
534 ads->ctl19 = AR_Not_Sounding;
535
536 last_ads->ctl13 = ads->ctl13;
537 last_ads->ctl14 = ads->ctl14;
538}
539
540static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
541 u32 aggrLen)
542{
543 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
544
545 ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
546
547 ads->ctl17 &= ~AR_AggrLen;
548 ads->ctl17 |= SM(aggrLen, AR_AggrLen);
549}
550
551static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
552 u32 numDelims)
553{
554 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
555 unsigned int ctl17;
556
557 ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
558
559 /*
560 * We use a stack variable to manipulate ctl6 to reduce uncached
561 * read modify, modfiy, write.
562 */
563 ctl17 = ads->ctl17;
564 ctl17 &= ~AR_PadDelim;
565 ctl17 |= SM(numDelims, AR_PadDelim);
566 ads->ctl17 = ctl17;
567}
568
569static void ar9003_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
570{
571 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
572
573 ads->ctl12 |= AR_IsAggr;
574 ads->ctl12 &= ~AR_MoreAggr;
575 ads->ctl17 &= ~AR_PadDelim;
576}
577
578static void ar9003_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
579{
580 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
581
582 ads->ctl12 &= (~AR_IsAggr & ~AR_MoreAggr);
583}
584
585void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains)
586{
587 struct ar9003_txc *ads = ds;
588
589 ads->ctl12 |= SM(chains, AR_PAPRDChainMask);
590}
591EXPORT_SYMBOL(ar9003_hw_set_paprd_txdesc);
592
593void ar9003_hw_attach_mac_ops(struct ath_hw *hw) 398void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
594{ 399{
595 struct ath_hw_ops *ops = ath9k_hw_ops(hw); 400 struct ath_hw_ops *ops = ath9k_hw_ops(hw);
@@ -598,15 +403,7 @@ void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
598 ops->set_desc_link = ar9003_hw_set_desc_link; 403 ops->set_desc_link = ar9003_hw_set_desc_link;
599 ops->get_isr = ar9003_hw_get_isr; 404 ops->get_isr = ar9003_hw_get_isr;
600 ops->set_txdesc = ar9003_set_txdesc; 405 ops->set_txdesc = ar9003_set_txdesc;
601 ops->fill_txdesc = ar9003_hw_fill_txdesc;
602 ops->proc_txdesc = ar9003_hw_proc_txdesc; 406 ops->proc_txdesc = ar9003_hw_proc_txdesc;
603 ops->set11n_txdesc = ar9003_hw_set11n_txdesc;
604 ops->set11n_ratescenario = ar9003_hw_set11n_ratescenario;
605 ops->set11n_aggr_first = ar9003_hw_set11n_aggr_first;
606 ops->set11n_aggr_middle = ar9003_hw_set11n_aggr_middle;
607 ops->set11n_aggr_last = ar9003_hw_set11n_aggr_last;
608 ops->clr11n_aggr = ar9003_hw_clr11n_aggr;
609 ops->set_clrdmask = ar9003_hw_set_clrdmask;
610} 407}
611 408
612void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size) 409void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h
index 5310f961650..41f4bf363d3 100644
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
@@ -60,70 +60,12 @@ static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
60 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i); 60 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
61} 61}
62 62
63static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
64 bool is_firstseg, bool is_lastseg,
65 const void *ds0, dma_addr_t buf_addr,
66 unsigned int qcu)
67{
68 ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
69 ds0, buf_addr, qcu);
70}
71
72static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, 63static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
73 struct ath_tx_status *ts) 64 struct ath_tx_status *ts)
74{ 65{
75 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); 66 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
76} 67}
77 68
78static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
79 u32 pktLen, enum ath9k_pkt_type type,
80 u32 txPower, u32 keyIx,
81 enum ath9k_key_type keyType,
82 u32 flags)
83{
84 ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
85 keyType, flags);
86}
87
88static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
89 void *lastds,
90 u32 durUpdateEn, u32 rtsctsRate,
91 u32 rtsctsDuration,
92 struct ath9k_11n_rate_series series[],
93 u32 nseries, u32 flags)
94{
95 ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
96 rtsctsRate, rtsctsDuration, series,
97 nseries, flags);
98}
99
100static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
101 u32 aggrLen)
102{
103 ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
104}
105
106static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
107 u32 numDelims)
108{
109 ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
110}
111
112static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
113{
114 ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
115}
116
117static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
118{
119 ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
120}
121
122static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
123{
124 ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
125}
126
127static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, 69static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
128 struct ath_hw_antcomb_conf *antconf) 70 struct ath_hw_antcomb_conf *antconf)
129{ 71{
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 0efe0134ff4..bf38e2fc8f7 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -618,30 +618,8 @@ struct ath_hw_ops {
618 bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked); 618 bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
619 void (*set_txdesc)(struct ath_hw *ah, void *ds, 619 void (*set_txdesc)(struct ath_hw *ah, void *ds,
620 struct ath_tx_info *i); 620 struct ath_tx_info *i);
621 void (*fill_txdesc)(struct ath_hw *ah, void *ds, u32 seglen,
622 bool is_firstseg, bool is_is_lastseg,
623 const void *ds0, dma_addr_t buf_addr,
624 unsigned int qcu);
625 int (*proc_txdesc)(struct ath_hw *ah, void *ds, 621 int (*proc_txdesc)(struct ath_hw *ah, void *ds,
626 struct ath_tx_status *ts); 622 struct ath_tx_status *ts);
627 void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
628 u32 pktLen, enum ath9k_pkt_type type,
629 u32 txPower, u8 keyIx,
630 enum ath9k_key_type keyType,
631 u32 flags);
632 void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
633 void *lastds,
634 u32 durUpdateEn, u32 rtsctsRate,
635 u32 rtsctsDuration,
636 struct ath9k_11n_rate_series series[],
637 u32 nseries, u32 flags);
638 void (*set11n_aggr_first)(struct ath_hw *ah, void *ds,
639 u32 aggrLen);
640 void (*set11n_aggr_middle)(struct ath_hw *ah, void *ds,
641 u32 numDelims);
642 void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
643 void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
644 void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val);
645 void (*antdiv_comb_conf_get)(struct ath_hw *ah, 623 void (*antdiv_comb_conf_get)(struct ath_hw *ah,
646 struct ath_hw_antcomb_conf *antconf); 624 struct ath_hw_antcomb_conf *antconf);
647 void (*antdiv_comb_conf_set)(struct ath_hw *ah, 625 void (*antdiv_comb_conf_set)(struct ath_hw *ah,
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 7ce9b320f0d..786587ac40a 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -62,18 +62,6 @@ void ath9k_hw_txstart(struct ath_hw *ah, u32 q)
62} 62}
63EXPORT_SYMBOL(ath9k_hw_txstart); 63EXPORT_SYMBOL(ath9k_hw_txstart);
64 64
65void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds)
66{
67 struct ar5416_desc *ads = AR5416DESC(ds);
68
69 ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
70 ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
71 ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
72 ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
73 ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
74}
75EXPORT_SYMBOL(ath9k_hw_cleartxdesc);
76
77u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q) 65u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
78{ 66{
79 u32 npend; 67 u32 npend;
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index ca71bb4ae91..ac5a1d265d3 100644
--- a/drivers/net/wireless/ath/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
@@ -712,7 +712,6 @@ enum ath9k_int;
712u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q); 712u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q);
713void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp); 713void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp);
714void ath9k_hw_txstart(struct ath_hw *ah, u32 q); 714void ath9k_hw_txstart(struct ath_hw *ah, u32 q);
715void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds);
716u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q); 715u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q);
717bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel); 716bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel);
718bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q); 717bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q);
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-23 09:36:08 -0400