348 files changed, 4465 insertions, 17810 deletions

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index babc2b826c5..ff9177c8f64 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -4,8 +4,6 @@ config SUPERH
         select CLKDEV_LOOKUP
         select HAVE_IDE if HAS_IOPORT
         select HAVE_MEMBLOCK
-        select HAVE_MEMBLOCK_NODE_MAP
-        select ARCH_DISCARD_MEMBLOCK
         select HAVE_OPROFILE
         select HAVE_GENERIC_DMA_COHERENT
         select HAVE_ARCH_TRACEHOOK
@@ -13,33 +11,21 @@ config SUPERH
         select HAVE_DMA_ATTRS
         select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
-        select HAVE_DEBUG_BUGVERBOSE
-        select ARCH_HAVE_CUSTOM_GPIO_H
         select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
         select PERF_USE_VMALLOC
-        select HAVE_DEBUG_KMEMLEAK
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_BZIP2
         select HAVE_KERNEL_LZMA
         select HAVE_KERNEL_XZ
         select HAVE_KERNEL_LZO
-        select HAVE_UID16
-        select ARCH_WANT_IPC_PARSE_VERSION
         select HAVE_SYSCALL_TRACEPOINTS
         select HAVE_REGS_AND_STACK_ACCESS_API
         select HAVE_GENERIC_HARDIRQS
-        select MAY_HAVE_SPARSE_IRQ
+        select HAVE_SPARSE_IRQ
         select IRQ_FORCED_THREADING
         select RTC_LIB
         select GENERIC_ATOMIC64
         select GENERIC_IRQ_SHOW
-        select GENERIC_SMP_IDLE_THREAD
-        select GENERIC_CLOCKEVENTS
-        select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
-        select GENERIC_STRNCPY_FROM_USER
-        select GENERIC_STRNLEN_USER
-        select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
-        select MODULES_USE_ELF_RELA
         help
           The SuperH is a RISC processor targeted for use in embedded systems
           and consumer electronics; it was also used in the Sega Dreamcast
@@ -56,7 +42,6 @@ config SUPERH32
         select HAVE_DYNAMIC_FTRACE
         select HAVE_FUNCTION_TRACE_MCOUNT_TEST
         select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
-        select ARCH_WANT_IPC_PARSE_VERSION
         select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_ARCH_KGDB
         select HAVE_HW_BREAKPOINT
@@ -67,7 +52,6 @@ config SUPERH32
 
 config SUPERH64
         def_bool ARCH = "sh64"
-        select KALLSYMS
 
 config ARCH_DEFCONFIG
         string
@@ -100,10 +84,27 @@ config GENERIC_GPIO
 config GENERIC_CALIBRATE_DELAY
         bool
 
+config GENERIC_IOMAP
+        bool
+
+config GENERIC_CLOCKEVENTS
+        def_bool y
+
+config GENERIC_CLOCKEVENTS_BROADCAST
+        bool
+
+config GENERIC_CMOS_UPDATE
+        def_bool y
+        depends on SH_SH03 || SH_DREAMCAST
+
 config GENERIC_LOCKBREAK
         def_bool y
         depends on SMP && PREEMPT
 
+config SYS_SUPPORTS_PM
+        bool
+        depends on !SMP
+
 config ARCH_SUSPEND_POSSIBLE
         def_bool n
 
@@ -156,17 +157,16 @@ config ARCH_NO_VIRT_TO_BUS
 config ARCH_HAS_DEFAULT_IDLE
         def_bool y
 
+config ARCH_HAS_CPU_IDLE_WAIT
+        def_bool y
+
 config NO_IOPORT
         def_bool !PCI
-        depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \
-                   !SH_HP6XX && !SH_SOLUTION_ENGINE
+        depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN
 
 config IO_TRAPPED
         bool
 
-config SWAP_IO_SPACE
-        bool
-
 config DMA_COHERENT
         bool
 
@@ -290,20 +290,6 @@ config CPU_SUBTYPE_SH7263
         select SYS_SUPPORTS_CMT
         select SYS_SUPPORTS_MTU2
 
-config CPU_SUBTYPE_SH7264
-        bool "Support SH7264 processor"
-        select CPU_SH2A
-        select CPU_HAS_FPU
-        select SYS_SUPPORTS_CMT
-        select SYS_SUPPORTS_MTU2
-
-config CPU_SUBTYPE_SH7269
-        bool "Support SH7269 processor"
-        select CPU_SH2A
-        select CPU_HAS_FPU
-        select SYS_SUPPORTS_CMT
-        select SYS_SUPPORTS_MTU2
-
 config CPU_SUBTYPE_MXG
         bool "Support MX-G processor"
         select CPU_SH2A
@@ -443,16 +429,6 @@ config CPU_SUBTYPE_SH7724
         help
           Select SH7724 if you have an SH-MobileR2R CPU.
 
-config CPU_SUBTYPE_SH7734
-        bool "Support SH7734 processor"
-        select CPU_SH4A
-        select CPU_SHX2
-        select ARCH_WANT_OPTIONAL_GPIOLIB
-        select USB_ARCH_HAS_OHCI
-        select USB_ARCH_HAS_EHCI
-        help
-          Select SH7734 if you have a SH4A SH7734 CPU.
-
 config CPU_SUBTYPE_SH7757
         bool "Support SH7757 processor"
         select CPU_SH4A
@@ -610,9 +586,9 @@ config SH_CLK_CPG
 config SH_CLK_CPG_LEGACY
         depends on SH_CLK_CPG
         def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
-                      !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
-                      !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
-                      !CPU_SUBTYPE_SH7269
+                      !CPU_SHX3 && !CPU_SUBTYPE_SH7757
+
+source "kernel/time/Kconfig"
 
 endmenu
 
@@ -673,7 +649,7 @@ config CRASH_DUMP
           a specially reserved region and then later executed after
           a crash by kdump/kexec. The crash dump kernel must be compiled
           to a memory address not used by the main kernel using
-          PHYSICAL_START.
+          MEMORY_START.
 
           For more details see Documentation/kdump/kdump.txt
 
@@ -684,17 +660,6 @@ config KEXEC_JUMP
           Jump between original kernel and kexeced kernel and invoke
           code via KEXEC
 
-config PHYSICAL_START
-        hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
-        default MEMORY_START
-        ---help---
-          This gives the physical address where the kernel is loaded
-          and is ordinarily the same as MEMORY_START.
-
-          Different values are primarily used in the case of kexec on panic
-          where the fail safe kernel needs to run at a different address
-          than the panic-ed kernel.
-
 config SECCOMP
         bool "Enable seccomp to safely compute untrusted bytecode"
         depends on PROC_FS
@@ -711,20 +676,6 @@ config SECCOMP
 
           If unsure, say N.
 
-config CC_STACKPROTECTOR
-        bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
-        depends on SUPERH32 && EXPERIMENTAL
-        help
-          This option turns on the -fstack-protector GCC feature. This
-          feature puts, at the beginning of functions, a canary value on
-          the stack just before the return address, and validates
-          the value just before actually returning.  Stack based buffer
-          overflows (that need to overwrite this return address) now also
-          overwrite the canary, which gets detected and the attack is then
-          neutralized via a kernel panic.
-
-          This feature requires gcc version 4.2 or above.
-
 config SMP
         bool "Symmetric multi-processing support"
         depends on SYS_SUPPORTS_SMP
@@ -902,8 +853,6 @@ config PCI
         bool "PCI support"
         depends on SYS_SUPPORTS_PCI
         select PCI_DOMAINS
-        select GENERIC_PCI_IOMAP
-        select NO_GENERIC_PCI_IOPORT_MAP
         help
           Find out whether you have a PCI motherboard. PCI is the name of a
           bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index 770ff2d5b94..ddf096c7d8b 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -1,7 +1,7 @@
 menu "Processor features"
 
 choice
-        prompt "Endianness selection" 
+        prompt "Endianess selection" 
         default CPU_LITTLE_ENDIAN
         help
           Some SuperH machines can be configured for either little or big
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 5f2bb4242c0..c1d5a820b1a 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -61,7 +61,6 @@ config DUMP_CODE
 config DWARF_UNWINDER
         bool "Enable the DWARF unwinder for stacktraces"
         select FRAME_POINTER
-        depends on SUPERH32
         default n
         help
           Enabling this option will make stacktraces more accurate, at
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index aed701c7b11..99385d0b3f3 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -9,12 +9,6 @@
 # License.  See the file "COPYING" in the main directory of this archive
 # for more details.
 #
-ifneq ($(SUBARCH),$(ARCH))
-  ifeq ($(CROSS_COMPILE),)
-    CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux-  $(UTS_MACHINE)-linux-gnu-  $(UTS_MACHINE)-unknown-linux-gnu-)
-  endif
-endif
-
 isa-y                                   := any
 isa-$(CONFIG_SH_DSP)                    := sh
 isa-$(CONFIG_CPU_SH2)                   := sh2
@@ -86,7 +80,6 @@ defaultimage-$(CONFIG_SH_RSK)			:= uImage
 defaultimage-$(CONFIG_SH_URQUELL)               := uImage
 defaultimage-$(CONFIG_SH_MIGOR)                 := uImage
 defaultimage-$(CONFIG_SH_AP325RXA)              := uImage
-defaultimage-$(CONFIG_SH_SH7757LCR)             := uImage
 defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE)  := uImage
 defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE)  := vmlinux
 defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE)  := vmlinux
@@ -112,19 +105,25 @@ LDFLAGS_vmlinux		+= --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
 KBUILD_DEFCONFIG        := cayman_defconfig
 endif
 
+ifneq ($(SUBARCH),$(ARCH))
+  ifeq ($(CROSS_COMPILE),)
+    CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux-  $(UTS_MACHINE)-linux-gnu-  $(UTS_MACHINE)-unknown-linux-gnu-)
+  endif
+endif
+
 ifdef CONFIG_CPU_LITTLE_ENDIAN
 ld-bfd                  := elf32-$(UTS_MACHINE)-linux
-LDFLAGS_vmlinux         += --defsym jiffies=jiffies_64 --oformat $(ld-bfd)
+LDFLAGS_vmlinux         += --defsym 'jiffies=jiffies_64' --oformat $(ld-bfd)
 LDFLAGS                 += -EL
 else
 ld-bfd                  := elf32-$(UTS_MACHINE)big-linux
-LDFLAGS_vmlinux         += --defsym jiffies=jiffies_64+4 --oformat $(ld-bfd)
+LDFLAGS_vmlinux         += --defsym 'jiffies=jiffies_64+4' --oformat $(ld-bfd)
 LDFLAGS                 += -EB
 endif
 
 export ld-bfd BITS
 
-head-y  := arch/sh/kernel/head_$(BITS).o
+head-y  := arch/sh/kernel/init_task.o arch/sh/kernel/head_$(BITS).o
 
 core-y                          += arch/sh/kernel/ arch/sh/mm/ arch/sh/boards/
 core-$(CONFIG_SH_FPU_EMU)       += arch/sh/math-emu/
@@ -199,10 +198,6 @@ ifeq ($(CONFIG_DWARF_UNWINDER),y)
   KBUILD_CFLAGS += -fasynchronous-unwind-tables
 endif
 
-ifeq ($(CONFIG_CC_STACKPROTECTOR),y)
-  KBUILD_CFLAGS += -fstack-protector
-endif
-
 libs-$(CONFIG_SUPERH32)         := arch/sh/lib/ $(libs-y)
 libs-$(CONFIG_SUPERH64)         := arch/sh/lib64/ $(libs-y)
 
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index fb5805745ac..d893411022d 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -44,8 +44,6 @@ config SH_7721_SOLUTION_ENGINE
 config SH_7722_SOLUTION_ENGINE
         bool "SolutionEngine7722"
         select SOLUTION_ENGINE
-        select GENERIC_IRQ_CHIP
-        select IRQ_DOMAIN
         depends on CPU_SUBTYPE_SH7722
         help
           Select 7722 SolutionEngine if configuring for a Hitachi SH772
@@ -56,8 +54,6 @@ config SH_7724_SOLUTION_ENGINE
         select SOLUTION_ENGINE
         depends on CPU_SUBTYPE_SH7724
         select ARCH_REQUIRE_GPIOLIB
-        select SND_SOC_AK4642 if SND_SIMPLE_CARD
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           Select 7724 SolutionEngine if configuring for a Hitachi SH7724
           evaluation board.
@@ -83,8 +79,6 @@ config SH_7780_SOLUTION_ENGINE
 config SH_7343_SOLUTION_ENGINE
         bool "SolutionEngine7343"
         select SOLUTION_ENGINE
-        select GENERIC_IRQ_CHIP
-        select IRQ_DOMAIN
         depends on CPU_SUBTYPE_SH7343
         help
           Select 7343 SolutionEngine if configuring for a Hitachi
@@ -139,9 +133,7 @@ config SH_RTS7751R2D
 
 config SH_RSK
         bool "Renesas Starter Kit"
-        depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 || \
-          CPU_SUBTYPE_SH7264 || CPU_SUBTYPE_SH7269
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
+        depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203
         help
          Select this option if configuring for any of the RSK+ MCU
          evaluation platforms.
@@ -161,7 +153,6 @@ config SH_SDK7786
         select NO_IOPORT if !PCI
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select HAVE_SRAM_POOL
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           Select SDK7786 if configuring for a Renesas Technology Europe
           SH7786-65nm board.
@@ -176,7 +167,6 @@ config SH_SH7757LCR
         bool "SH7757LCR"
         depends on CPU_SUBTYPE_SH7757
         select ARCH_REQUIRE_GPIOLIB
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
 
 config SH_SH7785LCR
         bool "SH7785LCR"
@@ -210,7 +200,6 @@ config SH_MIGOR
         bool "Migo-R"
         depends on CPU_SUBTYPE_SH7722
         select ARCH_REQUIRE_GPIOLIB
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           Select Migo-R if configuring for the SH7722 Migo-R platform
           by Renesas System Solutions Asia Pte. Ltd.
@@ -219,7 +208,6 @@ config SH_AP325RXA
         bool "AP-325RXA"
         depends on CPU_SUBTYPE_SH7723
         select ARCH_REQUIRE_GPIOLIB
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           Renesas "AP-325RXA" support.
           Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
@@ -228,7 +216,6 @@ config SH_KFR2R09
         bool "KFR2R09"
         depends on CPU_SUBTYPE_SH7724
         select ARCH_REQUIRE_GPIOLIB
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           "Kit For R2R for 2009" support.
 
@@ -236,8 +223,6 @@ config SH_ECOVEC
         bool "EcoVec"
         depends on CPU_SUBTYPE_SH7724
         select ARCH_REQUIRE_GPIOLIB
-        select SND_SOC_DA7210 if SND_SIMPLE_CARD
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           Renesas "R0P7724LC0011/21RL (EcoVec)" support.
 
@@ -307,13 +292,11 @@ config SH_X3PROTO
         bool "SH-X3 Prototype board"
         depends on CPU_SUBTYPE_SHX3
         select NO_IOPORT if !PCI
-        select IRQ_DOMAIN
 
 config SH_MAGIC_PANEL_R2
         bool "Magic Panel R2"
         depends on CPU_SUBTYPE_SH7720
         select ARCH_REQUIRE_GPIOLIB
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         help
           Select Magic Panel R2 if configuring for Magic Panel R2.
 
@@ -325,7 +308,6 @@ config SH_CAYMAN
 config SH_POLARIS
         bool "SMSC Polaris"
         select CPU_HAS_IPR_IRQ
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         depends on CPU_SUBTYPE_SH7709
         help
           Select if configuring for an SMSC Polaris development board
@@ -333,7 +315,6 @@ config SH_POLARIS
 config SH_SH2007
         bool "SH-2007 board"
         select NO_IOPORT
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         depends on CPU_SUBTYPE_SH7780
         help
           SH-2007 is a single-board computer based around SH7780 chip
@@ -345,7 +326,6 @@ config SH_SH2007
 config SH_APSH4A3A
         bool "AP-SH4A-3A"
         select SH_ALPHA_BOARD
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         depends on CPU_SUBTYPE_SH7785
         help
           Select AP-SH4A-3A if configuring for an ALPHAPROJECT AP-SH4A-3A.
@@ -354,11 +334,12 @@ config SH_APSH4AD0A
         bool "AP-SH4AD-0A"
         select SH_ALPHA_BOARD
         select SYS_SUPPORTS_PCI
-        select REGULATOR_FIXED_VOLTAGE if REGULATOR
         depends on CPU_SUBTYPE_SH7786
         help
           Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
 
+endmenu
+
 source "arch/sh/boards/mach-r2d/Kconfig"
 source "arch/sh/boards/mach-highlander/Kconfig"
 source "arch/sh/boards/mach-sdk7780/Kconfig"
@@ -378,5 +359,3 @@ config SH_MAGIC_PANEL_R2_VERSION
 endmenu
 
 endif
-
-endmenu
diff --git a/arch/sh/boards/board-apsh4a3a.c b/arch/sh/boards/board-apsh4a3a.c
index 0a39c241628..2823619c600 100644
--- a/arch/sh/boards/board-apsh4a3a.c
+++ b/arch/sh/boards/board-apsh4a3a.c
@@ -13,8 +13,6 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/mtd/physmap.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/irq.h>
 #include <linux/clk.h>
@@ -68,12 +66,6 @@ static struct platform_device nor_flash_device = {
         .resource       = nor_flash_resources,
 };
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
 static struct resource smsc911x_resources[] = {
         [0] = {
                 .name           = "smsc911x-memory",
@@ -113,8 +105,6 @@ static struct platform_device *apsh4a3a_devices[] __initdata = {
 
 static int __init apsh4a3a_devices_setup(void)
 {
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
         return platform_add_devices(apsh4a3a_devices,
                                     ARRAY_SIZE(apsh4a3a_devices));
 }
diff --git a/arch/sh/boards/board-apsh4ad0a.c b/arch/sh/boards/board-apsh4ad0a.c
index 92eac3a9918..b4d6292a924 100644
--- a/arch/sh/boards/board-apsh4ad0a.c
+++ b/arch/sh/boards/board-apsh4ad0a.c
@@ -12,20 +12,12 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/irq.h>
 #include <linux/clk.h>
 #include <asm/machvec.h>
 #include <asm/sizes.h>
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
 static struct resource smsc911x_resources[] = {
         [0] = {
                 .name           = "smsc911x-memory",
@@ -64,8 +56,6 @@ static struct platform_device *apsh4ad0a_devices[] __initdata = {
 
 static int __init apsh4ad0a_devices_setup(void)
 {
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
         return platform_add_devices(apsh4ad0a_devices,
                                     ARRAY_SIZE(apsh4ad0a_devices));
 }
diff --git a/arch/sh/boards/board-edosk7705.c b/arch/sh/boards/board-edosk7705.c
index 5e24c17bbda..541d8a28103 100644
--- a/arch/sh/boards/board-edosk7705.c
+++ b/arch/sh/boards/board-edosk7705.c
@@ -13,7 +13,6 @@
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/smc91x.h>
-#include <linux/sh_intc.h>
 #include <asm/machvec.h>
 #include <asm/sizes.h>
 
@@ -21,7 +20,7 @@
 #define SMC_IO_OFFSET   0x300
 #define SMC_IOADDR      (SMC_IOBASE + SMC_IO_OFFSET)
 
-#define ETHERNET_IRQ    evt2irq(0x320)
+#define ETHERNET_IRQ    0x09
 
 static void __init sh_edosk7705_init_irq(void)
 {
@@ -74,5 +73,6 @@ device_initcall(init_edosk7705_devices);
  */
 static struct sh_machine_vector mv_edosk7705 __initmv = {
         .mv_name                = "EDOSK7705",
+        .mv_nr_irqs             = 80,
         .mv_init_irq            = sh_edosk7705_init_irq,
 };
diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c
index bab5b951390..e9656a2cc4c 100644
--- a/arch/sh/boards/board-edosk7760.c
+++ b/arch/sh/boards/board-edosk7760.c
@@ -23,7 +23,6 @@
 #include <linux/platform_device.h>
 #include <linux/smc91x.h>
 #include <linux/interrupt.h>
-#include <linux/sh_intc.h>
 #include <linux/i2c.h>
 #include <linux/mtd/physmap.h>
 #include <asm/machvec.h>
@@ -41,6 +40,8 @@
 #define SMC_IO_OFFSET   0x300
 #define SMC_IOADDR      (SMC_IOBASE + SMC_IO_OFFSET)
 
+#define ETHERNET_IRQ    5
+
 /* NOR flash */
 static struct mtd_partition edosk7760_nor_flash_partitions[] = {
         {
@@ -98,8 +99,8 @@ static struct resource sh7760_i2c1_res[] = {
                 .end    = SH7760_I2C1_MMIOEND,
                 .flags  = IORESOURCE_MEM,
         },{
-                .start  = evt2irq(0x9e0),
-                .end    = evt2irq(0x9e0),
+                .start  = SH7760_I2C1_IRQ,
+                .end    = SH7760_I2C1_IRQ,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -121,8 +122,8 @@ static struct resource sh7760_i2c0_res[] = {
                 .end    = SH7760_I2C0_MMIOEND,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = evt2irq(0x9c0),
-                .end    = evt2irq(0x9c0),
+                .start  = SH7760_I2C0_IRQ,
+                .end    = SH7760_I2C0_IRQ,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -149,8 +150,8 @@ static struct resource smc91x_res[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x2a0),
-                .end    = evt2irq(0x2a0),
+                .start  = ETHERNET_IRQ,
+                .end    = ETHERNET_IRQ,
                 .flags  = IORESOURCE_IRQ ,
         }
 };
@@ -188,4 +189,5 @@ device_initcall(init_edosk7760_devices);
  */
 struct sh_machine_vector mv_edosk7760 __initmv = {
         .mv_name        = "EDOSK7760",
+        .mv_nr_irqs     = 128,
 };
diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
index d71a0bcf814..9da92ac3653 100644
--- a/arch/sh/boards/board-espt.c
+++ b/arch/sh/boards/board-espt.c
@@ -1,5 +1,5 @@
 /*
- * Data Technology Inc. ESPT-GIGA board support
+ * Data Technology Inc. ESPT-GIGA board suport
  *
  * Copyright (C) 2008, 2009 Renesas Solutions Corp.
  * Copyright (C) 2008, 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
@@ -13,10 +13,9 @@
 #include <linux/interrupt.h>
 #include <linux/mtd/physmap.h>
 #include <linux/io.h>
-#include <linux/sh_eth.h>
-#include <linux/sh_intc.h>
 #include <asm/machvec.h>
 #include <asm/sizes.h>
+#include <asm/sh_eth.h>
 
 /* NOR Flash */
 static struct mtd_partition espt_nor_flash_partitions[] = {
@@ -72,7 +71,7 @@ static struct resource sh_eth_resources[] = {
                 .flags  = IORESOURCE_MEM,
         }, {
 
-                .start  = evt2irq(0x920),   /* irq number */
+                .start  = 57,   /* irq number */
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 20500858b56..93f5039099b 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -14,26 +14,20 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/map.h>
-#include <linux/sh_intc.h>
 #include <mach/magicpanelr2.h>
 #include <asm/heartbeat.h>
 #include <cpu/sh7720.h>
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
 #define LAN9115_READY   (__raw_readl(0xA8000084UL) & 0x00000001UL)
 
+/* Prefer cmdline over RedBoot */
+static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
+
 /* Wait until reset finished. Timeout is 100ms. */
 static int __init ethernet_reset_finished(void)
 {
@@ -254,8 +248,8 @@ static struct resource smsc911x_resources[] = {
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
-                .start          = evt2irq(0x660),
-                .end            = evt2irq(0x660),
+                .start          = 35,
+                .end            = 35,
                 .flags          = IORESOURCE_IRQ,
         },
 };
@@ -299,6 +293,8 @@ static struct platform_device heartbeat_device = {
         .resource       = heartbeat_resources,
 };
 
+static struct mtd_partition *parsed_partitions;
+
 static struct mtd_partition mpr2_partitions[] = {
         /* Reserved for bootloader, read-only */
         {
@@ -322,8 +318,6 @@ static struct mtd_partition mpr2_partitions[] = {
 };
 
 static struct physmap_flash_data flash_data = {
-        .parts          = mpr2_partitions,
-        .nr_parts       = ARRAY_SIZE(mpr2_partitions),
         .width          = 2,
 };
 
@@ -343,6 +337,32 @@ static struct platform_device flash_device = {
         },
 };
 
+static struct mtd_info *flash_mtd;
+
+static struct map_info mpr2_flash_map = {
+        .name = "Magic Panel R2 Flash",
+        .size = 0x2000000UL,
+        .bankwidth = 2,
+};
+
+static void __init set_mtd_partitions(void)
+{
+        int nr_parts = 0;
+
+        simple_map_init(&mpr2_flash_map);
+        flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map);
+        nr_parts = parse_mtd_partitions(flash_mtd, probes,
+                                        &parsed_partitions, 0);
+        /* If there is no partition table, used the hard coded table */
+        if (nr_parts <= 0) {
+                flash_data.parts = mpr2_partitions;
+                flash_data.nr_parts = ARRAY_SIZE(mpr2_partitions);
+        } else {
+                flash_data.nr_parts = nr_parts;
+                flash_data.parts = parsed_partitions;
+        }
+}
+
 /*
  * Add all resources to the platform_device
  */
@@ -356,8 +376,7 @@ static struct platform_device *mpr2_devices[] __initdata = {
 
 static int __init mpr2_devices_setup(void)
 {
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
+        set_mtd_partitions();
         return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices));
 }
 device_initcall(mpr2_devices_setup);
@@ -369,17 +388,17 @@ static void __init init_mpr2_IRQ(void)
 {
         plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */
 
-        irq_set_irq_type(evt2irq(0x600), IRQ_TYPE_LEVEL_LOW);    /* IRQ0 CAN1 */
-        irq_set_irq_type(evt2irq(0x620), IRQ_TYPE_LEVEL_LOW);    /* IRQ1 CAN2 */
-        irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW);    /* IRQ2 CAN3 */
-        irq_set_irq_type(evt2irq(0x660), IRQ_TYPE_LEVEL_LOW);    /* IRQ3 SMSC9115 */
-        irq_set_irq_type(evt2irq(0x680), IRQ_TYPE_EDGE_RISING);  /* IRQ4 touchscreen */
-        irq_set_irq_type(evt2irq(0x6a0), IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
-
-        intc_set_priority(evt2irq(0x600), 13);          /* IRQ0 CAN1 */
-        intc_set_priority(evt2irq(0x620), 13);          /* IRQ0 CAN2 */
-        intc_set_priority(evt2irq(0x640), 13);          /* IRQ0 CAN3 */
-        intc_set_priority(evt2irq(0x660), 6);           /* IRQ3 SMSC9115 */
+        irq_set_irq_type(32, IRQ_TYPE_LEVEL_LOW);    /* IRQ0 CAN1 */
+        irq_set_irq_type(33, IRQ_TYPE_LEVEL_LOW);    /* IRQ1 CAN2 */
+        irq_set_irq_type(34, IRQ_TYPE_LEVEL_LOW);    /* IRQ2 CAN3 */
+        irq_set_irq_type(35, IRQ_TYPE_LEVEL_LOW);    /* IRQ3 SMSC9115 */
+        irq_set_irq_type(36, IRQ_TYPE_EDGE_RISING);  /* IRQ4 touchscreen */
+        irq_set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
+
+        intc_set_priority(32, 13);              /* IRQ0 CAN1 */
+        intc_set_priority(33, 13);              /* IRQ0 CAN2 */
+        intc_set_priority(34, 13);              /* IRQ0 CAN3 */
+        intc_set_priority(35, 6);               /* IRQ3 SMSC9115 */
 }
 
 /*
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 37a08d09472..594866356c2 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -1,5 +1,5 @@
 /*
- * June 2006 Steve Glendinning <steve.glendinning@shawell.net>
+ * June 2006 steve.glendinning@smsc.com
  *
  * Polaris-specific resource declaration
  *
@@ -9,8 +9,6 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/io.h>
 #include <asm/irq.h>
@@ -24,12 +22,6 @@
 #define AREA5_WAIT_CTRL (0x1C00)
 #define WAIT_STATES_10  (0x7)
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
-};
-
 static struct resource smsc911x_resources[] = {
         [0] = {
                 .name           = "smsc911x-memory",
@@ -96,8 +88,6 @@ static int __init polaris_initialise(void)
 
         printk(KERN_INFO "Configuring Polaris external bus\n");
 
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
         /* Configure area 5 with 2 wait states */
         wcr = __raw_readw(WCR2);
         wcr &= (~AREA5_WAIT_CTRL);
@@ -151,5 +141,6 @@ static void __init init_polaris_irq(void)
 
 static struct sh_machine_vector mv_polaris __initmv = {
         .mv_name                = "Polaris",
+        .mv_nr_irqs             = 61,
         .mv_init_irq            = init_polaris_irq,
 };
diff --git a/arch/sh/boards/board-secureedge5410.c b/arch/sh/boards/board-secureedge5410.c
index 98b36205aa7..f968f17891a 100644
--- a/arch/sh/boards/board-secureedge5410.c
+++ b/arch/sh/boards/board-secureedge5410.c
@@ -41,7 +41,8 @@ static int __init eraseconfig_init(void)
         printk("SnapGear: EraseConfig init\n");
 
         /* Setup "EraseConfig" switch on external IRQ 0 */
-        if (request_irq(irq, eraseconfig_interrupt, 0, "Erase Config", NULL))
+        if (request_irq(irq, eraseconfig_interrupt, IRQF_DISABLED,
+                                "Erase Config", NULL))
                 printk("SnapGear: failed to register IRQ%d for Reset witch\n",
                                 irq);
         else
@@ -71,5 +72,6 @@ static void __init init_snapgear_IRQ(void)
  */
 static struct sh_machine_vector mv_snapgear __initmv = {
         .mv_name                = "SnapGear SecureEdge5410",
+        .mv_nr_irqs             = 72,
         .mv_init_irq            = init_snapgear_IRQ,
 };
diff --git a/arch/sh/boards/board-sh2007.c b/arch/sh/boards/board-sh2007.c
index 1980bb7e578..b90b78f6a82 100644
--- a/arch/sh/boards/board-sh2007.c
+++ b/arch/sh/boards/board-sh2007.c
@@ -6,8 +6,6 @@
  */
 #include <linux/init.h>
 #include <linux/irq.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
@@ -15,14 +13,6 @@
 #include <asm/machvec.h>
 #include <mach/sh2007.h>
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
-        REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
-};
-
 struct smsc911x_platform_config smc911x_info = {
         .flags          = SMSC911X_USE_32BIT,
         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
@@ -108,8 +98,6 @@ static struct platform_device *sh2007_devices[] __initdata = {
 
 static int __init sh2007_io_init(void)
 {
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
         platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices));
         return 0;
 }
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 41f86702eb9..fa2a208ec6c 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -12,18 +12,14 @@
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
 #include <linux/irq.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/io.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
 #include <linux/mmc/sh_mobile_sdhi.h>
-#include <linux/sh_eth.h>
-#include <linux/sh_intc.h>
-#include <linux/usb/renesas_usbhs.h>
 #include <cpu/sh7757.h>
+#include <asm/sh_eth.h>
 #include <asm/heartbeat.h>
 
 static struct resource heartbeat_resource = {
@@ -54,9 +50,9 @@ static struct platform_device heartbeat_device = {
 #define GBECONT         0xffc10100
 #define GBECONT_RMII1   BIT(17)
 #define GBECONT_RMII0   BIT(16)
-static void sh7757_eth_set_mdio_gate(void *addr)
+static void sh7757_eth_set_mdio_gate(unsigned long addr)
 {
-        if (((unsigned long)addr & 0x00000fff) < 0x0800)
+        if ((addr & 0x00000fff) < 0x0800)
                 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
         else
                 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
@@ -68,8 +64,8 @@ static struct resource sh_eth0_resources[] = {
                 .end    = 0xfef001ff,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = evt2irq(0xc80),
-                .end    = evt2irq(0xc80),
+                .start  = 84,
+                .end    = 84,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -97,8 +93,8 @@ static struct resource sh_eth1_resources[] = {
                 .end    = 0xfef009ff,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = evt2irq(0xc80),
-                .end    = evt2irq(0xc80),
+                .start  = 84,
+                .end    = 84,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -120,9 +116,9 @@ static struct platform_device sh7757_eth1_device = {
         },
 };
 
-static void sh7757_eth_giga_set_mdio_gate(void *addr)
+static void sh7757_eth_giga_set_mdio_gate(unsigned long addr)
 {
-        if (((unsigned long)addr & 0x00000fff) < 0x0800) {
+        if ((addr & 0x00000fff) < 0x0800) {
                 gpio_set_value(GPIO_PTT4, 1);
                 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
         } else {
@@ -142,8 +138,8 @@ static struct resource sh_eth_giga0_resources[] = {
                 .end    = 0xfee01fff,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = evt2irq(0x2960),
-                .end    = evt2irq(0x2960),
+                .start  = 315,
+                .end    = 315,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -172,13 +168,8 @@ static struct resource sh_eth_giga1_resources[] = {
                 .end    = 0xfee00fff,
                 .flags  = IORESOURCE_MEM,
         }, {
-                /* TSU */
-                .start  = 0xfee01800,
-                .end    = 0xfee01fff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = evt2irq(0x2980),
-                .end    = evt2irq(0x2980),
+                .start  = 316,
+                .end    = 316,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -201,15 +192,6 @@ static struct platform_device sh7757_eth_giga1_device = {
         },
 };
 
-/* Fixed 3.3V regulator to be used by SDHI0, MMCIF */
-static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
-};
-
 /* SH_MMCIF */
 static struct resource sh_mmcif_resources[] = {
         [0] = {
@@ -218,22 +200,25 @@ static struct resource sh_mmcif_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x1c60),
+                .start  = 211,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = evt2irq(0x1c80),
+                .start  = 212,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
+static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
+        .chan_priv_tx   = SHDMA_SLAVE_MMCIF_TX,
+        .chan_priv_rx   = SHDMA_SLAVE_MMCIF_RX,
+};
+
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
+        .dma            = &sh7757lcr_mmcif_dma,
         .sup_pclk       = 0x0f,
-        .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
-                          MMC_CAP_NONREMOVABLE,
+        .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
         .ocr            = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
-        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device sh_mmcif_device = {
@@ -260,7 +245,7 @@ static struct resource sdhi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -275,43 +260,6 @@ static struct platform_device sdhi_device = {
         },
 };
 
-static int usbhs0_get_id(struct platform_device *pdev)
-{
-        return USBHS_GADGET;
-}
-
-static struct renesas_usbhs_platform_info usb0_data = {
-        .platform_callback = {
-                .get_id = usbhs0_get_id,
-        },
-        .driver_param = {
-                .buswait_bwait = 5,
-        }
-};
-
-static struct resource usb0_resources[] = {
-        [0] = {
-                .start  = 0xfe450000,
-                .end    = 0xfe4501ff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x840),
-                .end    = evt2irq(0x840),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device usb0_device = {
-        .name           = "renesas_usbhs",
-        .id             = 0,
-        .dev = {
-                .platform_data          = &usb0_data,
-        },
-        .num_resources  = ARRAY_SIZE(usb0_resources),
-        .resource       = usb0_resources,
-};
-
 static struct platform_device *sh7757lcr_devices[] __initdata = {
         &heartbeat_device,
         &sh7757_eth0_device,
@@ -320,7 +268,6 @@ static struct platform_device *sh7757lcr_devices[] __initdata = {
         &sh7757_eth_giga1_device,
         &sh_mmcif_device,
         &sdhi_device,
-        &usb0_device,
 };
 
 static struct flash_platform_data spi_flash_data = {
@@ -340,9 +287,6 @@ static struct spi_board_info spi_board_info[] = {
 
 static int __init sh7757lcr_devices_setup(void)
 {
-        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-
         /* RGMII (PTA) */
         gpio_request(GPIO_FN_ET0_MDC, NULL);
         gpio_request(GPIO_FN_ET0_MDIO, NULL);
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 2c4771ee84c..d879848f3cd 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -20,7 +20,6 @@
 #include <linux/i2c-pca-platform.h>
 #include <linux/i2c-algo-pca.h>
 #include <linux/usb/r8a66597.h>
-#include <linux/sh_intc.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/clk.h>
@@ -29,7 +28,6 @@
 #include <cpu/sh7785.h>
 #include <asm/heartbeat.h>
 #include <asm/clock.h>
-#include <asm/bl_bit.h>
 
 /*
  * NOTE: This board has 2 physical memory maps.
@@ -106,8 +104,8 @@ static struct resource r8a66597_usb_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x240),
-                .end    = evt2irq(0x240),
+                .start  = 2,
+                .end    = 2,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -136,7 +134,7 @@ static struct resource sm501_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [2]     = {
-                .start  = evt2irq(0x340),
+                .start  = 10,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -224,8 +222,8 @@ static struct resource i2c_proto_resources[] = {
                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
         },
         [1] = {
-                .start  = evt2irq(0x380),
-                .end    = evt2irq(0x380),
+                .start  = 12,
+                .end    = 12,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -237,8 +235,8 @@ static struct resource i2c_resources[] = {
                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
         },
         [1] = {
-                .start  = evt2irq(0x380),
-                .end    = evt2irq(0x380),
+                .start  = 12,
+                .end    = 12,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index b52abcc5259..24e3316c5c1 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -20,7 +20,6 @@
 #include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/clk.h>
-#include <linux/sh_intc.h>
 #include <mach/urquell.h>
 #include <cpu/sh7786.h>
 #include <asm/heartbeat.h>
@@ -79,7 +78,7 @@ static struct resource smc91x_eth_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x360),
+                .start  = 11,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 5620e33c18a..d3626575891 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -20,12 +20,8 @@
 #include <linux/mtd/sh_flctl.h>
 #include <linux/delay.h>
 #include <linux/i2c.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/gpio.h>
-#include <linux/videodev2.h>
-#include <linux/sh_intc.h>
 #include <media/ov772x.h>
 #include <media/soc_camera.h>
 #include <media/soc_camera_platform.h>
@@ -36,12 +32,6 @@
 #include <asm/suspend.h>
 #include <cpu/sh7723.h>
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
 static struct smsc911x_platform_config smsc911x_config = {
         .phy_interface  = PHY_INTERFACE_MODE_MII,
         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
@@ -56,8 +46,8 @@ static struct resource smsc9118_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x660),
-                .end    = evt2irq(0x660),
+                .start  = 35,
+                .end    = 35,
                 .flags  = IORESOURCE_IRQ,
         }
 };
@@ -166,7 +156,7 @@ static struct platform_device nand_flash_device = {
 #define PORT_DRVCRA     0xA405018A
 #define PORT_DRVCRB     0xA405018C
 
-static int ap320_wvga_set_brightness(int brightness)
+static int ap320_wvga_set_brightness(void *board_data, int brightness)
 {
         if (brightness) {
                 gpio_set_value(GPIO_PTS3, 0);
@@ -175,11 +165,16 @@ static int ap320_wvga_set_brightness(int brightness)
                 __raw_writew(0, FPGA_BKLREG);
                 gpio_set_value(GPIO_PTS3, 1);
         }
-
+        
         return 0;
 }
 
-static void ap320_wvga_power_on(void)
+static int ap320_wvga_get_brightness(void *board_data)
+{
+        return gpio_get_value(GPIO_PTS3);
+}
+
+static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
 {
         msleep(100);
 
@@ -187,7 +182,7 @@ static void ap320_wvga_power_on(void)
         __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
 }
 
-static void ap320_wvga_power_off(void)
+static void ap320_wvga_power_off(void *board_data)
 {
         /* ASD AP-320/325 LCD OFF */
         __raw_writew(0, FPGA_LCDREG);
@@ -212,21 +207,24 @@ static struct sh_mobile_lcdc_info lcdc_info = {
         .clock_source = LCDC_CLK_EXTERNAL,
         .ch[0] = {
                 .chan = LCDC_CHAN_MAINLCD,
-                .fourcc = V4L2_PIX_FMT_RGB565,
+                .bpp = 16,
                 .interface_type = RGB18,
                 .clock_divider = 1,
-                .lcd_modes = ap325rxa_lcdc_modes,
-                .num_modes = ARRAY_SIZE(ap325rxa_lcdc_modes),
-                .panel_cfg = {
-                        .width = 152,   /* 7.0 inch */
+                .lcd_cfg = ap325rxa_lcdc_modes,
+                .num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
+                .lcd_size_cfg = { /* 7.0 inch */
+                        .width = 152,
                         .height = 91,
+                },
+                .board_cfg = {
                         .display_on = ap320_wvga_power_on,
                         .display_off = ap320_wvga_power_off,
+                        .set_brightness = ap320_wvga_set_brightness,
+                        .get_brightness = ap320_wvga_get_brightness,
                 },
                 .bl_info = {
                         .name = "sh_mobile_lcdc_bl",
                         .max_brightness = 1,
-                        .set_brightness = ap320_wvga_set_brightness,
                 },
         }
 };
@@ -239,7 +237,7 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x580),
+                .start  = 28,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -251,6 +249,9 @@ static struct platform_device lcdc_device = {
         .dev            = {
                 .platform_data  = &lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 static void camera_power(int val)
@@ -344,10 +345,9 @@ static struct soc_camera_platform_info camera_info = {
                 .width = 640,
                 .height = 480,
         },
-        .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
-        V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
-        V4L2_MBUS_DATA_ACTIVE_HIGH,
-        .mbus_type = V4L2_MBUS_PARALLEL,
+        .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
+        SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
+        SOCAM_DATA_ACTIVE_HIGH,
         .set_capture = camera_set_capture,
 };
 
@@ -407,7 +407,7 @@ static struct resource ceu_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x880),
+                .start  = 52,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -423,15 +423,9 @@ static struct platform_device ceu_device = {
         .dev            = {
                 .platform_data  = &sh_mobile_ceu_info,
         },
-};
-
-/* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */
-static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
+        .archdata = {
+                .hwblk_id = HWBLK_CEU,
+        },
 };
 
 static struct resource sdhi0_cn3_resources[] = {
@@ -442,7 +436,7 @@ static struct resource sdhi0_cn3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe80),
+                .start  = 100,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -459,6 +453,9 @@ static struct platform_device sdhi0_cn3_device = {
         .dev = {
                 .platform_data = &sdhi0_cn3_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI0,
+        },
 };
 
 static struct resource sdhi1_cn7_resources[] = {
@@ -469,7 +466,7 @@ static struct resource sdhi1_cn7_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4e0),
+                .start  = 23,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -486,6 +483,9 @@ static struct platform_device sdhi1_cn7_device = {
         .dev = {
                 .platform_data = &sdhi1_cn7_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI1,
+        },
 };
 
 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
@@ -501,7 +501,8 @@ static struct i2c_board_info ap325rxa_i2c_camera[] = {
 };
 
 static struct ov772x_camera_info ov7725_info = {
-        .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
+        .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
+                          OV772X_FLAG_8BIT,
         .edgectrl       = OV772X_AUTO_EDGECTRL(0xf, 0),
 };
 
@@ -555,10 +556,6 @@ static int __init ap325rxa_devices_setup(void)
                                         &ap325rxa_sdram_leave_start,
                                         &ap325rxa_sdram_leave_end);
 
-        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-        regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
         /* LD3 and LD4 LEDs */
         gpio_request(GPIO_PTX5, NULL); /* RUN */
         gpio_direction_output(GPIO_PTX5, 1);
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 724e8b7271f..311bcebdbd0 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -46,11 +46,13 @@ static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
 static struct irqaction cayman_action_smsc = {
         .name           = "Cayman SMSC Mux",
         .handler        = cayman_interrupt_smsc,
+        .flags          = IRQF_DISABLED,
 };
 
 static struct irqaction cayman_action_pci2 = {
         .name           = "Cayman PCI2 Mux",
         .handler        = cayman_interrupt_pci2,
+        .flags          = IRQF_DISABLED,
 };
 
 static void enable_cayman_irq(struct irq_data *data)
diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c
index 340fd40b381..e89e8e122a2 100644
--- a/arch/sh/boards/mach-cayman/setup.c
+++ b/arch/sh/boards/mach-cayman/setup.c
@@ -181,6 +181,7 @@ extern void init_cayman_irq(void);
 
 static struct sh_machine_vector mv_cayman __initmv = {
         .mv_name                = "Hitachi Cayman",
+        .mv_nr_irqs             = 64,
         .mv_ioport_map          = cayman_ioport_map,
         .mv_init_irq            = init_cayman_irq,
 };
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index 2789647abeb..f63d323f411 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -8,11 +8,10 @@
  * This file is part of the LinuxDC project (www.linuxdc.org)
  * Released under the terms of the GNU GPL v2.0
  */
+
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/export.h>
-#include <linux/err.h>
+#include <asm/irq.h>
 #include <mach/sysasic.h>
 
 /*
@@ -142,15 +141,26 @@ int systemasic_irq_demux(int irq)
 
 void systemasic_irq_init(void)
 {
-        int irq_base, i;
+        int i, nid = cpu_to_node(boot_cpu_data);
 
-        irq_base = irq_alloc_descs(HW_EVENT_IRQ_BASE, HW_EVENT_IRQ_BASE,
-                                   HW_EVENT_IRQ_MAX - HW_EVENT_IRQ_BASE, -1);
-        if (IS_ERR_VALUE(irq_base)) {
-                pr_err("%s: failed hooking irqs\n", __func__);
-                return;
-        }
+        /* Assign all virtual IRQs to the System ASIC int. handler */
+        for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
+                unsigned int irq;
+
+                irq = create_irq_nr(i, nid);
+                if (unlikely(irq == 0)) {
+                        pr_err("%s: failed hooking irq %d for systemasic\n",
+                               __func__, i);
+                        return;
+                }
+
+                if (unlikely(irq != i)) {
+                        pr_err("%s: got irq %d but wanted %d, bailing.\n",
+                               __func__, irq, i);
+                        destroy_irq(irq);
+                        return;
+                }
 
-        for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
                 irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq);
+        }
 }
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 3fede4556c9..b24d69d509e 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -19,8 +19,6 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/delay.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/usb/r8a66597.h>
 #include <linux/usb/renesas_usbhs.h>
 #include <linux/i2c.h>
@@ -30,17 +28,13 @@
 #include <linux/spi/mmc_spi.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
-#include <linux/sh_eth.h>
-#include <linux/sh_intc.h>
-#include <linux/videodev2.h>
 #include <video/sh_mobile_lcdc.h>
 #include <sound/sh_fsi.h>
-#include <sound/simple_card.h>
 #include <media/sh_mobile_ceu.h>
-#include <media/soc_camera.h>
 #include <media/tw9910.h>
 #include <media/mt9t112.h>
 #include <asm/heartbeat.h>
+#include <asm/sh_eth.h>
 #include <asm/clock.h>
 #include <asm/suspend.h>
 #include <cpu/sh7724.h>
@@ -141,7 +135,7 @@ static struct resource sh_eth_resources[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start = evt2irq(0xd60),
+                .start = 91,
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
         },
 };
@@ -162,6 +156,9 @@ static struct platform_device sh_eth_device = {
         },
         .num_resources = ARRAY_SIZE(sh_eth_resources),
         .resource = sh_eth_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_ETHER,
+        },
 };
 
 /* USB0 host */
@@ -182,8 +179,8 @@ static struct resource usb0_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -218,8 +215,8 @@ static struct resource usb1_common_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa40),
-                .end    = evt2irq(0xa40),
+                .start  = 66,
+                .end    = 66,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -244,25 +241,13 @@ static int usbhs_get_id(struct platform_device *pdev)
         return gpio_get_value(GPIO_PTB3);
 }
 
-static void usbhs_phy_reset(struct platform_device *pdev)
-{
-        /* enable vbus if HOST */
-        if (!gpio_get_value(GPIO_PTB3))
-                gpio_set_value(GPIO_PTB5, 1);
-}
-
 static struct renesas_usbhs_platform_info usbhs_info = {
         .platform_callback = {
                 .get_id         = usbhs_get_id,
-                .phy_reset      = usbhs_phy_reset,
         },
         .driver_param = {
                 .buswait_bwait          = 4,
                 .detection_delay        = 5,
-                .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
-                .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
-                .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
-                .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
         },
 };
 
@@ -273,8 +258,8 @@ static struct resource usbhs_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa40),
-                .end    = evt2irq(0xa40),
+                .start  = 66,
+                .end    = 66,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -289,6 +274,9 @@ static struct platform_device usbhs_device = {
         },
         .num_resources  = ARRAY_SIZE(usbhs_resources),
         .resource       = usbhs_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USB1,
+        },
 };
 
 /* LCDC */
@@ -322,26 +310,34 @@ static const struct fb_videomode ecovec_dvi_modes[] = {
         },
 };
 
-static int ecovec24_set_brightness(int brightness)
+static int ecovec24_set_brightness(void *board_data, int brightness)
 {
         gpio_set_value(GPIO_PTR1, brightness);
 
         return 0;
 }
 
+static int ecovec24_get_brightness(void *board_data)
+{
+        return gpio_get_value(GPIO_PTR1);
+}
+
 static struct sh_mobile_lcdc_info lcdc_info = {
         .ch[0] = {
                 .interface_type = RGB18,
                 .chan = LCDC_CHAN_MAINLCD,
-                .fourcc = V4L2_PIX_FMT_RGB565,
-                .panel_cfg = { /* 7.0 inch */
+                .bpp = 16,
+                .lcd_size_cfg = { /* 7.0 inch */
                         .width = 152,
                         .height = 91,
                 },
+                .board_cfg = {
+                        .set_brightness = ecovec24_set_brightness,
+                        .get_brightness = ecovec24_get_brightness,
+                },
                 .bl_info = {
                         .name = "sh_mobile_lcdc_bl",
                         .max_brightness = 1,
-                        .set_brightness = ecovec24_set_brightness,
                 },
         }
 };
@@ -354,7 +350,7 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf40),
+                .start  = 106,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -366,6 +362,9 @@ static struct platform_device lcdc_device = {
         .dev            = {
                 .platform_data  = &lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 /* CEU0 */
@@ -381,7 +380,7 @@ static struct resource ceu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x880),
+                .start  = 52,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -397,6 +396,9 @@ static struct platform_device ceu0_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu0_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU0,
+        },
 };
 
 /* CEU1 */
@@ -412,7 +414,7 @@ static struct resource ceu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x9e0),
+                .start  = 63,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -428,6 +430,9 @@ static struct platform_device ceu1_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu1_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU1,
+        },
 };
 
 /* I2C device */
@@ -443,7 +448,7 @@ static struct i2c_board_info i2c1_devices[] = {
         },
         {
                 I2C_BOARD_INFO("lis3lv02d", 0x1c),
-                .irq = evt2irq(0x620),
+                .irq = 33,
         }
 };
 
@@ -469,7 +474,7 @@ static struct resource keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xbe0),
+                .start  = 79,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -482,11 +487,13 @@ static struct platform_device keysc_device = {
         .dev    = {
                 .platform_data  = &keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 /* TouchScreen */
-#define IRQ0 evt2irq(0x600)
-
+#define IRQ0 32
 static int ts_get_pendown_state(void)
 {
         int val = 0;
@@ -522,101 +529,18 @@ static struct i2c_board_info ts_i2c_clients = {
         .irq            = IRQ0,
 };
 
-static struct regulator_consumer_supply cn12_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
-};
-
-static struct regulator_init_data cn12_power_init_data = {
-        .constraints = {
-                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(cn12_power_consumers),
-        .consumer_supplies      = cn12_power_consumers,
-};
-
-static struct fixed_voltage_config cn12_power_info = {
-        .supply_name = "CN12 SD/MMC Vdd",
-        .microvolts = 3300000,
-        .gpio = GPIO_PTB7,
-        .enable_high = 1,
-        .init_data = &cn12_power_init_data,
-};
-
-static struct platform_device cn12_power = {
-        .name = "reg-fixed-voltage",
-        .id   = 0,
-        .dev  = {
-                .platform_data = &cn12_power_info,
-        },
-};
-
 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
 /* SDHI0 */
-static struct regulator_consumer_supply sdhi0_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-};
-
-static struct regulator_init_data sdhi0_power_init_data = {
-        .constraints = {
-                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(sdhi0_power_consumers),
-        .consumer_supplies      = sdhi0_power_consumers,
-};
-
-static struct fixed_voltage_config sdhi0_power_info = {
-        .supply_name = "CN11 SD/MMC Vdd",
-        .microvolts = 3300000,
-        .gpio = GPIO_PTB6,
-        .enable_high = 1,
-        .init_data = &sdhi0_power_init_data,
-};
-
-static struct platform_device sdhi0_power = {
-        .name = "reg-fixed-voltage",
-        .id   = 1,
-        .dev  = {
-                .platform_data = &sdhi0_power_info,
-        },
-};
-
 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
 {
-        static int power_gpio = -EINVAL;
-
-        if (power_gpio < 0) {
-                int ret = gpio_request(GPIO_PTB6, NULL);
-                if (!ret) {
-                        power_gpio = GPIO_PTB6;
-                        gpio_direction_output(power_gpio, 0);
-                }
-        }
-
-        /*
-         * Toggle the GPIO regardless, whether we managed to grab it above or
-         * the fixed regulator driver did.
-         */
         gpio_set_value(GPIO_PTB6, state);
 }
 
-static int sdhi0_get_cd(struct platform_device *pdev)
-{
-        return !gpio_get_value(GPIO_PTY7);
-}
-
 static struct sh_mobile_sdhi_info sdhi0_info = {
         .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
         .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
         .set_pwr        = sdhi0_set_pwr,
-        .tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
-                          MMC_CAP_NEEDS_POLL,
-        .get_cd         = sdhi0_get_cd,
+        .tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
 };
 
 static struct resource sdhi0_resources[] = {
@@ -627,7 +551,7 @@ static struct resource sdhi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe80),
+                .start  = 100,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -640,41 +564,23 @@ static struct platform_device sdhi0_device = {
         .dev    = {
                 .platform_data  = &sdhi0_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI0,
+        },
 };
 
-static void cn12_set_pwr(struct platform_device *pdev, int state)
-{
-        static int power_gpio = -EINVAL;
-
-        if (power_gpio < 0) {
-                int ret = gpio_request(GPIO_PTB7, NULL);
-                if (!ret) {
-                        power_gpio = GPIO_PTB7;
-                        gpio_direction_output(power_gpio, 0);
-                }
-        }
-
-        /*
-         * Toggle the GPIO regardless, whether we managed to grab it above or
-         * the fixed regulator driver did.
-         */
-        gpio_set_value(GPIO_PTB7, state);
-}
-
 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
 /* SDHI1 */
-static int sdhi1_get_cd(struct platform_device *pdev)
+static void sdhi1_set_pwr(struct platform_device *pdev, int state)
 {
-        return !gpio_get_value(GPIO_PTW7);
+        gpio_set_value(GPIO_PTB7, state);
 }
 
 static struct sh_mobile_sdhi_info sdhi1_info = {
         .dma_slave_tx   = SHDMA_SLAVE_SDHI1_TX,
         .dma_slave_rx   = SHDMA_SLAVE_SDHI1_RX,
-        .tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
-                          MMC_CAP_NEEDS_POLL,
-        .set_pwr        = cn12_set_pwr,
-        .get_cd         = sdhi1_get_cd,
+        .tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
+        .set_pwr        = sdhi1_set_pwr,
 };
 
 static struct resource sdhi1_resources[] = {
@@ -685,7 +591,7 @@ static struct resource sdhi1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4e0),
+                .start  = 23,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -698,6 +604,9 @@ static struct platform_device sdhi1_device = {
         .dev    = {
                 .platform_data  = &sdhi1_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI1,
+        },
 };
 #endif /* CONFIG_MMC_SH_MMCIF */
 
@@ -750,7 +659,7 @@ static struct resource msiof0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xc80),
+                .start  = 84,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -763,6 +672,9 @@ static struct platform_device msiof0_device = {
         },
         .num_resources  = ARRAY_SIZE(msiof0_resources),
         .resource       = msiof0_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_MSIOF0,
+        },
 };
 
 #endif
@@ -878,9 +790,7 @@ static struct platform_device camera_devices[] = {
 
 /* FSI */
 static struct sh_fsi_platform_info fsi_info = {
-        .port_b = {
-                .flags = SH_FSI_BRS_INV,
-        },
+        .portb_flags = SH_FSI_BRS_INV,
 };
 
 static struct resource fsi_resources[] = {
@@ -891,7 +801,7 @@ static struct resource fsi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf80),
+                .start  = 108,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -904,32 +814,11 @@ static struct platform_device fsi_device = {
         .dev    = {
                 .platform_data  = &fsi_info,
         },
-};
-
-static struct asoc_simple_dai_init_info fsi_da7210_init_info = {
-        .fmt            = SND_SOC_DAIFMT_I2S,
-        .codec_daifmt   = SND_SOC_DAIFMT_CBM_CFM,
-        .cpu_daifmt     = SND_SOC_DAIFMT_CBS_CFS,
-};
-
-static struct asoc_simple_card_info fsi_da7210_info = {
-        .name           = "DA7210",
-        .card           = "FSIB-DA7210",
-        .cpu_dai        = "fsib-dai",
-        .codec          = "da7210.0-001a",
-        .platform       = "sh_fsi.0",
-        .codec_dai      = "da7210-hifi",
-        .init           = &fsi_da7210_init_info,
-};
-
-static struct platform_device fsi_da7210_device = {
-        .name   = "asoc-simple-card",
-        .dev    = {
-                .platform_data  = &fsi_da7210_info,
+        .archdata = {
+                .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
         },
 };
 
-
 /* IrDA */
 static struct resource irda_resources[] = {
         [0] = {
@@ -939,7 +828,7 @@ static struct resource irda_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -976,7 +865,7 @@ static struct resource sh_vou_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x8e0),
+                .start  = 55,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -989,13 +878,21 @@ static struct platform_device vou_device = {
         .dev            = {
                 .platform_data  = &sh_vou_pdata,
         },
+        .archdata       = {
+                .hwblk_id       = HWBLK_VOU,
+        },
 };
 
 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
 /* SH_MMCIF */
+static void mmcif_set_pwr(struct platform_device *pdev, int state)
+{
+        gpio_set_value(GPIO_PTB7, state);
+}
+
 static void mmcif_down_pwr(struct platform_device *pdev)
 {
-        cn12_set_pwr(pdev, 0);
+        gpio_set_value(GPIO_PTB7, 0);
 }
 
 static struct resource sh_mmcif_resources[] = {
@@ -1007,18 +904,18 @@ static struct resource sh_mmcif_resources[] = {
         },
         [1] = {
                 /* MMC2I */
-                .start  = evt2irq(0x5a0),
+                .start  = 29,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
                 /* MMC3I */
-                .start  = evt2irq(0x5c0),
+                .start  = 30,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
-        .set_pwr        = cn12_set_pwr,
+        .set_pwr        = mmcif_set_pwr,
         .down_pwr       = mmcif_down_pwr,
         .sup_pclk       = 0, /* SH7724: Max Pclk/2 */
         .caps           = MMC_CAP_4_BIT_DATA |
@@ -1035,6 +932,9 @@ static struct platform_device sh_mmcif_device = {
         },
         .num_resources  = ARRAY_SIZE(sh_mmcif_resources),
         .resource       = sh_mmcif_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_MMC,
+        },
 };
 #endif
 
@@ -1049,9 +949,7 @@ static struct platform_device *ecovec_devices[] __initdata = {
         &ceu0_device,
         &ceu1_device,
         &keysc_device,
-        &cn12_power,
 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
-        &sdhi0_power,
         &sdhi0_device,
 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
         &sdhi1_device,
@@ -1063,7 +961,6 @@ static struct platform_device *ecovec_devices[] __initdata = {
         &camera_devices[1],
         &camera_devices[2],
         &fsi_device,
-        &fsi_da7210_device,
         &irda_device,
         &vou_device,
 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
@@ -1134,7 +1031,6 @@ extern char ecovec24_sdram_leave_end;
 static int __init arch_setup(void)
 {
         struct clk *clk;
-        bool cn12_enabled = false;
 
         /* register board specific self-refresh code */
         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
@@ -1250,8 +1146,8 @@ static int __init arch_setup(void)
                 /* DVI */
                 lcdc_info.clock_source                  = LCDC_CLK_EXTERNAL;
                 lcdc_info.ch[0].clock_divider           = 1;
-                lcdc_info.ch[0].lcd_modes               = ecovec_dvi_modes;
-                lcdc_info.ch[0].num_modes               = ARRAY_SIZE(ecovec_dvi_modes);
+                lcdc_info.ch[0].lcd_cfg                 = ecovec_dvi_modes;
+                lcdc_info.ch[0].num_cfg                 = ARRAY_SIZE(ecovec_dvi_modes);
 
                 gpio_set_value(GPIO_PTA2, 1);
                 gpio_set_value(GPIO_PTU1, 1);
@@ -1259,8 +1155,8 @@ static int __init arch_setup(void)
                 /* Panel */
                 lcdc_info.clock_source                  = LCDC_CLK_PERIPHERAL;
                 lcdc_info.ch[0].clock_divider           = 2;
-                lcdc_info.ch[0].lcd_modes               = ecovec_lcd_modes;
-                lcdc_info.ch[0].num_modes               = ARRAY_SIZE(ecovec_lcd_modes);
+                lcdc_info.ch[0].lcd_cfg                 = ecovec_lcd_modes;
+                lcdc_info.ch[0].num_cfg                 = ARRAY_SIZE(ecovec_lcd_modes);
 
                 gpio_set_value(GPIO_PTR1, 1);
 
@@ -1335,13 +1231,9 @@ static int __init arch_setup(void)
         gpio_direction_input(GPIO_PTR5);
         gpio_direction_input(GPIO_PTR6);
 
-        /* SD-card slot CN11 */
-        /* Card-detect, used on CN11, either with SDHI0 or with SPI */
-        gpio_request(GPIO_PTY7, NULL);
-        gpio_direction_input(GPIO_PTY7);
-
 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
         /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
+        gpio_request(GPIO_FN_SDHI0CD,  NULL);
         gpio_request(GPIO_FN_SDHI0WP,  NULL);
         gpio_request(GPIO_FN_SDHI0CMD, NULL);
         gpio_request(GPIO_FN_SDHI0CLK, NULL);
@@ -1349,6 +1241,25 @@ static int __init arch_setup(void)
         gpio_request(GPIO_FN_SDHI0D2,  NULL);
         gpio_request(GPIO_FN_SDHI0D1,  NULL);
         gpio_request(GPIO_FN_SDHI0D0,  NULL);
+        gpio_request(GPIO_PTB6, NULL);
+        gpio_direction_output(GPIO_PTB6, 0);
+
+#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
+        /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
+        gpio_request(GPIO_FN_SDHI1CD,  NULL);
+        gpio_request(GPIO_FN_SDHI1WP,  NULL);
+        gpio_request(GPIO_FN_SDHI1CMD, NULL);
+        gpio_request(GPIO_FN_SDHI1CLK, NULL);
+        gpio_request(GPIO_FN_SDHI1D3,  NULL);
+        gpio_request(GPIO_FN_SDHI1D2,  NULL);
+        gpio_request(GPIO_FN_SDHI1D1,  NULL);
+        gpio_request(GPIO_FN_SDHI1D0,  NULL);
+        gpio_request(GPIO_PTB7, NULL);
+        gpio_direction_output(GPIO_PTB7, 0);
+
+        /* I/O buffer drive ability is high for SDHI1 */
+        __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
+#endif /* CONFIG_MMC_SH_MMCIF */
 #else
         /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
         gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
@@ -1360,47 +1271,12 @@ static int __init arch_setup(void)
         gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
         gpio_request(GPIO_PTY6, NULL); /* write protect */
         gpio_direction_input(GPIO_PTY6);
+        gpio_request(GPIO_PTY7, NULL); /* card detect */
+        gpio_direction_input(GPIO_PTY7);
 
         spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
 #endif
 
-        /* MMC/SD-card slot CN12 */
-#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
-        /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
-        gpio_request(GPIO_FN_MMC_D7, NULL);
-        gpio_request(GPIO_FN_MMC_D6, NULL);
-        gpio_request(GPIO_FN_MMC_D5, NULL);
-        gpio_request(GPIO_FN_MMC_D4, NULL);
-        gpio_request(GPIO_FN_MMC_D3, NULL);
-        gpio_request(GPIO_FN_MMC_D2, NULL);
-        gpio_request(GPIO_FN_MMC_D1, NULL);
-        gpio_request(GPIO_FN_MMC_D0, NULL);
-        gpio_request(GPIO_FN_MMC_CLK, NULL);
-        gpio_request(GPIO_FN_MMC_CMD, NULL);
-
-        cn12_enabled = true;
-#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
-        /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
-        gpio_request(GPIO_FN_SDHI1WP,  NULL);
-        gpio_request(GPIO_FN_SDHI1CMD, NULL);
-        gpio_request(GPIO_FN_SDHI1CLK, NULL);
-        gpio_request(GPIO_FN_SDHI1D3,  NULL);
-        gpio_request(GPIO_FN_SDHI1D2,  NULL);
-        gpio_request(GPIO_FN_SDHI1D1,  NULL);
-        gpio_request(GPIO_FN_SDHI1D0,  NULL);
-
-        /* Card-detect, used on CN12 with SDHI1 */
-        gpio_request(GPIO_PTW7, NULL);
-        gpio_direction_input(GPIO_PTW7);
-
-        cn12_enabled = true;
-#endif
-
-        if (cn12_enabled)
-                /* I/O buffer drive ability is high for CN12 */
-                __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
-                             IODRIVEA);
-
         /* enable Video */
         gpio_request(GPIO_PTU2, NULL);
         gpio_direction_output(GPIO_PTU2, 1);
@@ -1459,6 +1335,25 @@ static int __init arch_setup(void)
         gpio_request(GPIO_PTU5, NULL);
         gpio_direction_output(GPIO_PTU5, 0);
 
+#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
+        /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
+        gpio_request(GPIO_FN_MMC_D7, NULL);
+        gpio_request(GPIO_FN_MMC_D6, NULL);
+        gpio_request(GPIO_FN_MMC_D5, NULL);
+        gpio_request(GPIO_FN_MMC_D4, NULL);
+        gpio_request(GPIO_FN_MMC_D3, NULL);
+        gpio_request(GPIO_FN_MMC_D2, NULL);
+        gpio_request(GPIO_FN_MMC_D1, NULL);
+        gpio_request(GPIO_FN_MMC_D0, NULL);
+        gpio_request(GPIO_FN_MMC_CLK, NULL);
+        gpio_request(GPIO_FN_MMC_CMD, NULL);
+        gpio_request(GPIO_PTB7, NULL);
+        gpio_direction_output(GPIO_PTB7, 0);
+
+        /* I/O buffer drive ability is high for MMCIF */
+        __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
+#endif
+
         /* enable I2C device */
         i2c_register_board_info(0, i2c0_devices,
                                 ARRAY_SIZE(i2c0_devices));
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 4a52590fe3d..74b8db1b74a 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -322,7 +322,7 @@ static void ivdr_clk_disable(struct clk *clk)
         __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
 }
 
-static struct sh_clk_ops ivdr_clk_ops = {
+static struct clk_ops ivdr_clk_ops = {
         .enable         = ivdr_clk_enable,
         .disable        = ivdr_clk_disable,
 };
diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
index 865d8d6e823..b49535c0ddd 100644
--- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
@@ -86,7 +86,7 @@ static int __init hp6x0_apm_init(void)
         int ret;
 
         ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt,
-                          0, MODNAME, NULL);
+                          IRQF_DISABLED, MODNAME, NULL);
         if (unlikely(ret < 0)) {
                 printk(KERN_ERR MODNAME ": IRQ %d request failed\n",
                        HP680_BTN_IRQ);
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index 8b50cf763c0..adc9b4bba82 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -14,7 +14,6 @@
 #include <linux/gfp.h>
 #include <asm/io.h>
 #include <asm/hd64461.h>
-#include <asm/bl_bit.h>
 #include <mach/hp6xx.h>
 #include <cpu/dac.h>
 #include <asm/freq.h>
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index 05797b33f68..8c9add5f4cf 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/irq.h>
-#include <linux/sh_intc.h>
 #include <sound/sh_dac_audio.h>
 #include <asm/hd64461.h>
 #include <asm/io.h>
@@ -36,7 +35,7 @@ static struct resource cf_ide_resources[] = {
                 .flags = IORESOURCE_MEM,
         },
         [2] = {
-                .start = evt2irq(0xba0),
+                .start = 77,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -169,6 +168,8 @@ device_initcall(hp6xx_devices_setup);
 static struct sh_machine_vector mv_hp6xx __initmv = {
         .mv_name = "hp6xx",
         .mv_setup = hp6xx_setup,
+        /* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */
+        .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,
         /* Enable IRQ0 -> IRQ3 in IRQ_MODE */
         .mv_init_irq = hp6xx_init_irq,
 };
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
index c6205033262..25e145fb708 100644
--- a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -251,7 +251,8 @@ static void display_on(void *sohandle,
         write_memory_start(sohandle, so);
 }
 
-int kfr2r09_lcd_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
+int kfr2r09_lcd_setup(void *board_data, void *sohandle,
+                      struct sh_mobile_lcdc_sys_bus_ops *so)
 {
         /* power on */
         gpio_set_value(GPIO_PTF4, 0);  /* PROTECT/ -> L */
@@ -272,7 +273,8 @@ int kfr2r09_lcd_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
         return 0;
 }
 
-void kfr2r09_lcd_start(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
+void kfr2r09_lcd_start(void *board_data, void *sohandle,
+                       struct sh_mobile_lcdc_sys_bus_ops *so)
 {
         write_memory_start(sohandle, so);
 }
@@ -283,7 +285,7 @@ void kfr2r09_lcd_start(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
 #define MAIN_MLED4      0x40
 #define MAIN_MSW        0x80
 
-int kfr2r09_lcd_set_brightness(int brightness)
+static int kfr2r09_lcd_backlight(int on)
 {
         struct i2c_adapter *a;
         struct i2c_msg msg;
@@ -295,7 +297,7 @@ int kfr2r09_lcd_set_brightness(int brightness)
                 return -ENODEV;
 
         buf[0] = 0x00;
-        if (brightness)
+        if (on)
                 buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
         else
                 buf[1] = 0;
@@ -309,7 +311,7 @@ int kfr2r09_lcd_set_brightness(int brightness)
                 return -ENODEV;
 
         buf[0] = 0x01;
-        if (brightness)
+        if (on)
                 buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
         else
                 buf[1] = 0;
@@ -324,3 +326,13 @@ int kfr2r09_lcd_set_brightness(int brightness)
 
         return 0;
 }
+
+void kfr2r09_lcd_on(void *board_data, struct fb_info *info)
+{
+        kfr2r09_lcd_backlight(1);
+}
+
+void kfr2r09_lcd_off(void *board_data)
+{
+        kfr2r09_lcd_backlight(0);
+}
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index ab502f12ef5..f65271a8d07 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -21,11 +21,7 @@
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/i2c.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/usb/r8a66597.h>
-#include <linux/videodev2.h>
-#include <linux/sh_intc.h>
 #include <media/rj54n1cb0c.h>
 #include <media/soc_camera.h>
 #include <media/sh_mobile_ceu.h>
@@ -113,7 +109,7 @@ static struct resource kfr2r09_sh_keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xbe0),
+                .start  = 79,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -126,6 +122,9 @@ static struct platform_device kfr2r09_sh_keysc_device = {
         .dev    = {
                 .platform_data  = &kfr2r09_sh_keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 static const struct fb_videomode kfr2r09_lcdc_modes[] = {
@@ -147,22 +146,21 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
         .clock_source = LCDC_CLK_BUS,
         .ch[0] = {
                 .chan = LCDC_CHAN_MAINLCD,
-                .fourcc = V4L2_PIX_FMT_RGB565,
+                .bpp = 16,
                 .interface_type = SYS18,
                 .clock_divider = 6,
                 .flags = LCDC_FLAGS_DWPOL,
-                .lcd_modes = kfr2r09_lcdc_modes,
-                .num_modes = ARRAY_SIZE(kfr2r09_lcdc_modes),
-                .panel_cfg = {
+                .lcd_cfg = kfr2r09_lcdc_modes,
+                .num_cfg = ARRAY_SIZE(kfr2r09_lcdc_modes),
+                .lcd_size_cfg = {
                         .width = 35,
                         .height = 58,
+                },
+                .board_cfg = {
                         .setup_sys = kfr2r09_lcd_setup,
                         .start_transfer = kfr2r09_lcd_start,
-                },
-                .bl_info = {
-                        .name = "sh_mobile_lcdc_bl",
-                        .max_brightness = 1,
-                        .set_brightness = kfr2r09_lcd_set_brightness,
+                        .display_on = kfr2r09_lcd_on,
+                        .display_off = kfr2r09_lcd_off,
                 },
                 .sys_bus_cfg = {
                         .ldmt2r = 0x07010904,
@@ -181,7 +179,7 @@ static struct resource kfr2r09_sh_lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf40),
+                .start  = 106,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -193,6 +191,9 @@ static struct platform_device kfr2r09_sh_lcdc_device = {
         .dev    = {
                 .platform_data  = &kfr2r09_sh_lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
@@ -206,8 +207,8 @@ static struct resource kfr2r09_usb0_gadget_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -236,8 +237,8 @@ static struct resource kfr2r09_ceu_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x880),
-                .end    = evt2irq(0x880),
+                .start  = 52,
+                .end  = 52,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -253,6 +254,9 @@ static struct platform_device kfr2r09_ceu_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU0,
+        },
 };
 
 static struct i2c_board_info kfr2r09_i2c_camera = {
@@ -346,13 +350,6 @@ static struct platform_device kfr2r09_camera = {
         },
 };
 
-/* Fixed 3.3V regulator to be used by SDHI0 */
-static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-};
-
 static struct resource kfr2r09_sh_sdhi0_resources[] = {
         [0] = {
                 .name   = "SDHI0",
@@ -361,7 +358,7 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe80),
+                .start  = 100,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -380,6 +377,9 @@ static struct platform_device kfr2r09_sh_sdhi0_device = {
         .dev = {
                 .platform_data  = &sh7724_sdhi0_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI0,
+        },
 };
 
 static struct platform_device *kfr2r09_devices[] __initdata = {
@@ -535,9 +535,6 @@ static int __init kfr2r09_devices_setup(void)
                                         &kfr2r09_sdram_leave_start,
                                         &kfr2r09_sdram_leave_end);
 
-        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-
         /* enable SCIF1 serial port for YC401 console support */
         gpio_request(GPIO_FN_SCIF1_RXD, NULL);
         gpio_request(GPIO_FN_SCIF1_TXD, NULL);
diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c
index 6660622aa45..79b4e0d77b7 100644
--- a/arch/sh/boards/mach-lboxre2/setup.c
+++ b/arch/sh/boards/mach-lboxre2/setup.c
@@ -79,5 +79,6 @@ device_initcall(lboxre2_devices_setup);
  */
 static struct sh_machine_vector mv_lboxre2 __initmv = {
         .mv_name                = "L-BOX RE2",
+        .mv_nr_irqs             = 72,
         .mv_init_irq            = init_lboxre2_IRQ,
 };
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index 9a8aff33961..4fb00369f0e 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <asm/system.h>
 #include <asm/io.h>
 #include <mach/microdev.h>
 
diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c
index 6c66ee4d842..d8a747291e0 100644
--- a/arch/sh/boards/mach-microdev/setup.c
+++ b/arch/sh/boards/mach-microdev/setup.c
@@ -194,6 +194,7 @@ device_initcall(microdev_devices_setup);
  */
 static struct sh_machine_vector mv_sh4202_microdev __initmv = {
         .mv_name                = "SH4-202 MicroDev",
+        .mv_nr_irqs             = 72,
         .mv_ioport_map          = microdev_ioport_map,
         .mv_init_irq            = init_microdev_irq,
 };
diff --git a/arch/sh/boards/mach-migor/lcd_qvga.c b/arch/sh/boards/mach-migor/lcd_qvga.c
index 8bccd345b69..de9014a8a93 100644
--- a/arch/sh/boards/mach-migor/lcd_qvga.c
+++ b/arch/sh/boards/mach-migor/lcd_qvga.c
@@ -113,7 +113,8 @@ static const unsigned short magic3_data[] = {
         0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061,
 };
 
-int migor_lcd_qvga_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
+int migor_lcd_qvga_setup(void *board_data, void *sohandle,
+                         struct sh_mobile_lcdc_sys_bus_ops *so)
 {
         unsigned long xres = 320;
         unsigned long yres = 240;
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 8b73194ed2c..2d4c9c8c666 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -17,18 +17,13 @@
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
 #include <linux/i2c.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smc91x.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/gpio.h>
-#include <linux/videodev2.h>
-#include <linux/sh_intc.h>
 #include <video/sh_mobile_lcdc.h>
 #include <media/sh_mobile_ceu.h>
 #include <media/ov772x.h>
-#include <media/soc_camera.h>
 #include <media/tw9910.h>
 #include <asm/clock.h>
 #include <asm/machvec.h>
@@ -57,7 +52,7 @@ static struct resource smc91x_eth_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x600), /* IRQ0 */
+                .start  = 32, /* IRQ0 */
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
         },
 };
@@ -91,7 +86,7 @@ static struct resource sh_keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xbe0),
+                .start  = 79,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -104,6 +99,9 @@ static struct platform_device sh_keysc_device = {
         .dev    = {
                 .platform_data  = &sh_keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 static struct mtd_partition migor_nor_flash_partitions[] =
@@ -190,6 +188,7 @@ static struct platform_nand_data migor_nand_flash_data = {
                 .partitions = migor_nand_flash_partitions,
                 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
                 .chip_delay = 20,
+                .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
         },
         .ctrl = {
                 .dev_ready = migor_nand_flash_ready,
@@ -245,12 +244,12 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
         .clock_source = LCDC_CLK_BUS,
         .ch[0] = {
                 .chan = LCDC_CHAN_MAINLCD,
-                .fourcc = V4L2_PIX_FMT_RGB565,
+                .bpp = 16,
                 .interface_type = RGB16,
                 .clock_divider = 2,
-                .lcd_modes = migor_lcd_modes,
-                .num_modes = ARRAY_SIZE(migor_lcd_modes),
-                .panel_cfg = { /* 7.0 inch */
+                .lcd_cfg = migor_lcd_modes,
+                .num_cfg = ARRAY_SIZE(migor_lcd_modes),
+                .lcd_size_cfg = { /* 7.0 inch */
                         .width = 152,
                         .height = 91,
                 },
@@ -259,14 +258,16 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
         .clock_source = LCDC_CLK_PERIPHERAL,
         .ch[0] = {
                 .chan = LCDC_CHAN_MAINLCD,
-                .fourcc = V4L2_PIX_FMT_RGB565,
+                .bpp = 16,
                 .interface_type = SYS16A,
                 .clock_divider = 10,
-                .lcd_modes = migor_lcd_modes,
-                .num_modes = ARRAY_SIZE(migor_lcd_modes),
-                .panel_cfg = {
-                        .width = 49,    /* 2.4 inch */
+                .lcd_cfg = migor_lcd_modes,
+                .num_cfg = ARRAY_SIZE(migor_lcd_modes),
+                .lcd_size_cfg = { /* 2.4 inch */
+                        .width = 49,
                         .height = 37,
+                },
+                .board_cfg = {
                         .setup_sys = migor_lcd_qvga_setup,
                 },
                 .sys_bus_cfg = {
@@ -287,7 +288,7 @@ static struct resource migor_lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x580),
+                .start  = 28,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -299,6 +300,9 @@ static struct platform_device migor_lcdc_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 static struct clk *camera_clk;
@@ -370,7 +374,7 @@ static struct resource migor_ceu_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x880),
+                .start  = 52,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -386,13 +390,9 @@ static struct platform_device migor_ceu_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu_info,
         },
-};
-
-/* Fixed 3.3V regulator to be used by SDHI0 */
-static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
+        .archdata = {
+                .hwblk_id = HWBLK_CEU,
+        },
 };
 
 static struct resource sdhi_cn9_resources[] = {
@@ -403,7 +403,7 @@ static struct resource sdhi_cn9_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe80),
+                .start  = 100,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -421,6 +421,9 @@ static struct platform_device sdhi_cn9_device = {
         .dev = {
                 .platform_data  = &sh7724_sdhi_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI,
+        },
 };
 
 static struct i2c_board_info migor_i2c_devices[] = {
@@ -429,7 +432,7 @@ static struct i2c_board_info migor_i2c_devices[] = {
         },
         {
                 I2C_BOARD_INFO("migor_ts", 0x51),
-                .irq = evt2irq(0x6c0), /* IRQ6 */
+                .irq = 38, /* IRQ6 */
         },
         {
                 I2C_BOARD_INFO("wm8978", 0x1a),
@@ -445,7 +448,9 @@ static struct i2c_board_info migor_i2c_camera[] = {
         },
 };
 
-static struct ov772x_camera_info ov7725_info;
+static struct ov772x_camera_info ov7725_info = {
+        .flags          = OV772X_FLAG_8BIT,
+};
 
 static struct soc_camera_link ov7725_link = {
         .power          = ov7725_power,
@@ -507,10 +512,6 @@ static int __init migor_devices_setup(void)
                                         &migor_sdram_enter_end,
                                         &migor_sdram_leave_start,
                                         &migor_sdram_leave_end);
-
-        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-
         /* Let D11 LED show STATUS0 */
         gpio_request(GPIO_FN_STATUS0, NULL);
 
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
index 458a11ffd02..aeff3b04220 100644
--- a/arch/sh/boards/mach-rsk/Kconfig
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -13,16 +13,6 @@ config SH_RSK7203
         select ARCH_REQUIRE_GPIOLIB
         depends on CPU_SUBTYPE_SH7203
 
-config SH_RSK7264
-        bool "RSK2+SH7264"
-        select ARCH_REQUIRE_GPIOLIB
-        depends on CPU_SUBTYPE_SH7264
-
-config SH_RSK7269
-        bool "RSK2+SH7269"
-        select ARCH_REQUIRE_GPIOLIB
-        depends on CPU_SUBTYPE_SH7269
-
 endchoice
 
 endif
diff --git a/arch/sh/boards/mach-rsk/Makefile b/arch/sh/boards/mach-rsk/Makefile
index 6a4e1b538a6..498da75ce38 100644
--- a/arch/sh/boards/mach-rsk/Makefile
+++ b/arch/sh/boards/mach-rsk/Makefile
@@ -1,4 +1,2 @@
 obj-y                           := setup.o
 obj-$(CONFIG_SH_RSK7203)        += devices-rsk7203.o
-obj-$(CONFIG_SH_RSK7264)        += devices-rsk7264.o
-obj-$(CONFIG_SH_RSK7269)        += devices-rsk7269.o
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7264.c b/arch/sh/boards/mach-rsk/devices-rsk7264.c
deleted file mode 100644
index 7251e37a842..00000000000
--- a/arch/sh/boards/mach-rsk/devices-rsk7264.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * RSK+SH7264 Support.
- *
- * Copyright (C) 2012 Renesas Electronics Europe
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/input.h>
-#include <linux/smsc911x.h>
-#include <asm/machvec.h>
-#include <asm/io.h>
-
-static struct smsc911x_platform_config smsc911x_config = {
-        .phy_interface  = PHY_INTERFACE_MODE_MII,
-        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
-        .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
-        .flags          = SMSC911X_USE_16BIT | SMSC911X_SWAP_FIFO,
-};
-
-static struct resource smsc911x_resources[] = {
-        [0] = {
-                .start          = 0x28000000,
-                .end            = 0x280000ff,
-                .flags          = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start          = 65,
-                .end            = 65,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device smsc911x_device = {
-        .name           = "smsc911x",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(smsc911x_resources),
-        .resource       = smsc911x_resources,
-        .dev            = {
-                .platform_data = &smsc911x_config,
-        },
-};
-
-static struct platform_device *rsk7264_devices[] __initdata = {
-        &smsc911x_device,
-};
-
-static int __init rsk7264_devices_setup(void)
-{
-        return platform_add_devices(rsk7264_devices,
-                                    ARRAY_SIZE(rsk7264_devices));
-}
-device_initcall(rsk7264_devices_setup);
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7269.c b/arch/sh/boards/mach-rsk/devices-rsk7269.c
deleted file mode 100644
index 4a544591d6f..00000000000
--- a/arch/sh/boards/mach-rsk/devices-rsk7269.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * RSK+SH7269 Support
- *
- * Copyright (C) 2012  Renesas Electronics Europe Ltd
- * Copyright (C) 2012  Phil Edworthy
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/input.h>
-#include <linux/smsc911x.h>
-#include <linux/gpio.h>
-#include <asm/machvec.h>
-#include <asm/io.h>
-
-static struct smsc911x_platform_config smsc911x_config = {
-        .phy_interface  = PHY_INTERFACE_MODE_MII,
-        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
-        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
-        .flags          = SMSC911X_USE_16BIT | SMSC911X_SWAP_FIFO,
-};
-
-static struct resource smsc911x_resources[] = {
-        [0] = {
-                .start          = 0x24000000,
-                .end            = 0x240000ff,
-                .flags          = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start          = 85,
-                .end            = 85,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device smsc911x_device = {
-        .name           = "smsc911x",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(smsc911x_resources),
-        .resource       = smsc911x_resources,
-        .dev            = {
-                .platform_data = &smsc911x_config,
-        },
-};
-
-static struct platform_device *rsk7269_devices[] __initdata = {
-        &smsc911x_device,
-};
-
-static int __init rsk7269_devices_setup(void)
-{
-        return platform_add_devices(rsk7269_devices,
-                                    ARRAY_SIZE(rsk7269_devices));
-}
-device_initcall(rsk7269_devices_setup);
diff --git a/arch/sh/boards/mach-rsk/setup.c b/arch/sh/boards/mach-rsk/setup.c
index 2685ea03b06..a5c0df785bf 100644
--- a/arch/sh/boards/mach-rsk/setup.c
+++ b/arch/sh/boards/mach-rsk/setup.c
@@ -15,20 +15,12 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
+#ifdef CONFIG_MTD
 #include <linux/mtd/map.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
+#endif
 #include <asm/machvec.h>
 #include <asm/io.h>
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
-static const char *part_probes[] = { "cmdlinepart", NULL };
-
 static struct mtd_partition rsk_partitions[] = {
         {
                 .name           = "Bootloader",
@@ -47,10 +39,9 @@ static struct mtd_partition rsk_partitions[] = {
 };
 
 static struct physmap_flash_data flash_data = {
-        .parts                  = rsk_partitions,
-        .nr_parts               = ARRAY_SIZE(rsk_partitions),
-        .width                  = 2,
-        .part_probe_types       = part_probes,
+        .parts          = rsk_partitions,
+        .nr_parts       = ARRAY_SIZE(rsk_partitions),
+        .width          = 2,
 };
 
 static struct resource flash_resource = {
@@ -69,14 +60,44 @@ static struct platform_device flash_device = {
         },
 };
 
+#ifdef CONFIG_MTD
+static const char *probes[] = { "cmdlinepart", NULL };
+
+static struct map_info rsk_flash_map = {
+        .name           = "RSK+ Flash",
+        .size           = 0x400000,
+        .bankwidth      = 2,
+};
+
+static struct mtd_info *flash_mtd;
+
+static struct mtd_partition *parsed_partitions;
+
+static void __init set_mtd_partitions(void)
+{
+        int nr_parts = 0;
+
+        simple_map_init(&rsk_flash_map);
+        flash_mtd = do_map_probe("cfi_probe", &rsk_flash_map);
+        nr_parts = parse_mtd_partitions(flash_mtd, probes,
+                                        &parsed_partitions, 0);
+        /* If there is no partition table, used the hard coded table */
+        if (nr_parts > 0) {
+                flash_data.nr_parts = nr_parts;
+                flash_data.parts = parsed_partitions;
+        }
+}
+#else
+static inline void set_mtd_partitions(void) {}
+#endif
+
 static struct platform_device *rsk_devices[] __initdata = {
         &flash_device,
 };
 
 static int __init rsk_devices_setup(void)
 {
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
+        set_mtd_partitions();
         return platform_add_devices(rsk_devices,
                                     ARRAY_SIZE(rsk_devices));
 }
diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c
index 2241659c329..4da38db4b5f 100644
--- a/arch/sh/boards/mach-sdk7780/setup.c
+++ b/arch/sh/boards/mach-sdk7780/setup.c
@@ -94,6 +94,7 @@ static void __init sdk7780_setup(char **cmdline_p)
 static struct sh_machine_vector mv_se7780 __initmv = {
         .mv_name        = "Renesas SDK7780-R3" ,
         .mv_setup               = sdk7780_setup,
+        .mv_nr_irqs             = 111,
         .mv_init_irq    = init_sdk7780_IRQ,
 };
 
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index c29268bfd34..486d1ac3694 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -11,8 +11,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smsc911x.h>
 #include <linux/i2c.h>
 #include <linux/irq.h>
@@ -40,12 +38,6 @@ static struct platform_device heartbeat_device = {
         .resource       = &heartbeat_resource,
 };
 
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
 static struct resource smsc911x_resources[] = {
         [0] = {
                 .name           = "smsc911x-memory",
@@ -175,7 +167,7 @@ static void sdk7786_pcie_clk_disable(struct clk *clk)
         fpga_write_reg(fpga_read_reg(PCIECR) & ~PCIECR_CLKEN, PCIECR);
 }
 
-static struct sh_clk_ops sdk7786_pcie_clk_ops = {
+static struct clk_ops sdk7786_pcie_clk_ops = {
         .enable         = sdk7786_pcie_clk_enable,
         .disable        = sdk7786_pcie_clk_disable,
 };
@@ -244,8 +236,6 @@ static void __init sdk7786_setup(char **cmdline_p)
 {
         pr_info("Renesas Technology Europe SDK7786 support:\n");
 
-        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
         sdk7786_fpga_init();
         sdk7786_nmi_init();
 
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index 68883ec9568..8ab8330e3fd 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -90,6 +90,7 @@ static int se7206_mode_pins(void)
 
 static struct sh_machine_vector mv_se __initmv = {
         .mv_name                = "SolutionEngine",
+        .mv_nr_irqs             = 256,
         .mv_init_irq            = init_se7206_IRQ,
         .mv_mode_pins           = se7206_mode_pins,
 };
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index 7646bf0486c..fd45ffc4834 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -1,129 +1,86 @@
 /*
- * Hitachi UL SolutionEngine 7343 FPGA IRQ Support.
+ * linux/arch/sh/boards/se/7343/irq.c
  *
  * Copyright (C) 2008  Yoshihiro Shimoda
- * Copyright (C) 2012  Paul Mundt
  *
- * Based on linux/arch/sh/boards/se/7343/irq.c
+ * Based on linux/arch/sh/boards/se/7722/irq.c
  * Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#define DRV_NAME "SE7343-FPGA"
-#define pr_fmt(fmt) DRV_NAME ": " fmt
-
-#define irq_reg_readl   ioread16
-#define irq_reg_writel  iowrite16
-
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/irqdomain.h>
 #include <linux/io.h>
-#include <asm/sizes.h>
 #include <mach-se/mach/se7343.h>
 
-#define PA_CPLD_BASE_ADDR       0x11400000
-#define PA_CPLD_ST_REG          0x08    /* CPLD Interrupt status register */
-#define PA_CPLD_IMSK_REG        0x0a    /* CPLD Interrupt mask register */
-
-static void __iomem *se7343_irq_regs;
-struct irq_domain *se7343_irq_domain;
+unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
 
-static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
+static void disable_se7343_irq(struct irq_data *data)
 {
-        struct irq_data *data = irq_get_irq_data(irq);
-        struct irq_chip *chip = irq_data_get_irq_chip(data);
-        unsigned long mask;
-        int bit;
-
-        chip->irq_mask_ack(data);
-
-        mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG);
-
-        for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR)
-                generic_handle_irq(irq_linear_revmap(se7343_irq_domain, bit));
+        unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
+        __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
+}
 
-        chip->irq_unmask(data);
+static void enable_se7343_irq(struct irq_data *data)
+{
+        unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
+        __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
 }
 
-static void __init se7343_domain_init(void)
+static struct irq_chip se7343_irq_chip __read_mostly = {
+        .name           = "SE7343-FPGA",
+        .irq_mask       = disable_se7343_irq,
+        .irq_unmask     = enable_se7343_irq,
+};
+
+static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        int i;
+        unsigned short intv = __raw_readw(PA_CPLD_ST);
+        unsigned int ext_irq = 0;
 
-        se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,
-                                                  &irq_domain_simple_ops, NULL);
-        if (unlikely(!se7343_irq_domain)) {
-                printk("Failed to get IRQ domain\n");
-                return;
-        }
+        intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
 
-        for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
-                int irq = irq_create_mapping(se7343_irq_domain, i);
+        for (; intv; intv >>= 1, ext_irq++) {
+                if (!(intv & 1))
+                        continue;
 
-                if (unlikely(irq == 0)) {
-                        printk("Failed to allocate IRQ %d\n", i);
-                        return;
-                }
+                generic_handle_irq(se7343_fpga_irq[ext_irq]);
         }
 }
 
-static void __init se7343_gc_init(void)
+/*
+ * Initialize IRQ setting
+ */
+void __init init_7343se_IRQ(void)
 {
-        struct irq_chip_generic *gc;
-        struct irq_chip_type *ct;
-        unsigned int irq_base;
-
-        irq_base = irq_linear_revmap(se7343_irq_domain, 0);
+        int i, irq;
 
-        gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
-                                    handle_level_irq);
-        if (unlikely(!gc))
-                return;
+        __raw_writew(0, PA_CPLD_IMSK);  /* disable all irqs */
+        __raw_writew(0x2000, 0xb03fffec);       /* mrshpc irq enable */
 
-        ct = gc->chip_types;
-        ct->chip.irq_mask = irq_gc_mask_set_bit;
-        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
+        for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
+                irq = create_irq();
+                if (irq < 0)
+                        return;
+                se7343_fpga_irq[i] = irq;
 
-        ct->regs.mask = PA_CPLD_IMSK_REG;
+                irq_set_chip_and_handler_name(se7343_fpga_irq[i],
+                                              &se7343_irq_chip,
+                                              handle_level_irq,
+                                              "level");
 
-        irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR),
-                               IRQ_GC_INIT_MASK_CACHE,
-                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
+                irq_set_chip_data(se7343_fpga_irq[i], (void *)i);
+        }
 
         irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
         irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
-
         irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
         irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
-
         irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
         irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
-
         irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
         irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
 }
-
-/*
- * Initialize IRQ setting
- */
-void __init init_7343se_IRQ(void)
-{
-        se7343_irq_regs = ioremap(PA_CPLD_BASE_ADDR, SZ_16);
-        if (unlikely(!se7343_irq_regs)) {
-                pr_err("Failed to remap CPLD\n");
-                return;
-        }
-
-        /*
-         * All FPGA IRQs disabled by default
-         */
-        iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG);
-
-        __raw_writew(0x2000, 0xb03fffec);       /* mrshpc irq enable */
-
-        se7343_domain_init();
-        se7343_gc_init();
-}
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 8ce4f2a202a..d2370af56d7 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -5,7 +5,6 @@
 #include <linux/serial_reg.h>
 #include <linux/usb/isp116x.h>
 #include <linux/delay.h>
-#include <linux/irqdomain.h>
 #include <asm/machvec.h>
 #include <mach-se/mach/se7343.h>
 #include <asm/heartbeat.h>
@@ -146,12 +145,11 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
 static int __init sh7343se_devices_setup(void)
 {
         /* Wire-up dynamic vectors */
-        serial_platform_data[0].irq = irq_find_mapping(se7343_irq_domain,
-                                                       SE7343_FPGA_IRQ_UARTA);
-        serial_platform_data[1].irq = irq_find_mapping(se7343_irq_domain,
-                                                       SE7343_FPGA_IRQ_UARTB);
+        serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA];
+        serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB];
+
         usb_resources[2].start = usb_resources[2].end =
-                irq_find_mapping(se7343_irq_domain, SE7343_FPGA_IRQ_USB);
+                se7343_fpga_irq[SE7343_FPGA_IRQ_USB];
 
         return platform_add_devices(sh7343se_platform_devices,
                                     ARRAY_SIZE(sh7343se_platform_devices));
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 9759d6ba7ff..31330c65c0c 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -184,5 +184,16 @@ device_initcall(se_devices_setup);
 static struct sh_machine_vector mv_se __initmv = {
         .mv_name                = "SolutionEngine",
         .mv_setup               = smsc_setup,
+#if defined(CONFIG_CPU_SH4)
+        .mv_nr_irqs             = 48,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
+        .mv_nr_irqs             = 32,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
+        .mv_nr_irqs             = 61,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
+        .mv_nr_irqs             = 86,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
+        .mv_nr_irqs             = 104,
+#endif
         .mv_init_irq            = init_se_IRQ,
 };
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index a0b3dba34eb..7416ad7ee53 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -92,5 +92,6 @@ static void __init se7721_setup(char **cmdline_p)
 struct sh_machine_vector mv_se7721 __initmv = {
         .mv_name                = "Solution Engine 7721",
         .mv_setup               = se7721_setup,
+        .mv_nr_irqs             = 109,
         .mv_init_irq            = init_se7721_IRQ,
 };
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index f5e2af1bf04..aac92f21ebd 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -1,96 +1,79 @@
 /*
- * Hitachi UL SolutionEngine 7722 FPGA IRQ Support.
+ * linux/arch/sh/boards/se/7722/irq.c
  *
  * Copyright (C) 2007  Nobuhiro Iwamatsu
- * Copyright (C) 2012  Paul Mundt
+ *
+ * Hitachi UL SolutionEngine 7722 Support.
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#define DRV_NAME "SE7722-FPGA"
-#define pr_fmt(fmt) DRV_NAME ": " fmt
-
-#define irq_reg_readl   ioread16
-#define irq_reg_writel  iowrite16
-
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/irqdomain.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <asm/sizes.h>
+#include <asm/irq.h>
+#include <asm/io.h>
 #include <mach-se/mach/se7722.h>
 
-#define IRQ01_BASE_ADDR 0x11800000
-#define IRQ01_MODE_REG  0
-#define IRQ01_STS_REG   4
-#define IRQ01_MASK_REG  8
+unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
 
-static void __iomem *se7722_irq_regs;
-struct irq_domain *se7722_irq_domain;
-
-static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
+static void disable_se7722_irq(struct irq_data *data)
 {
-        struct irq_data *data = irq_get_irq_data(irq);
-        struct irq_chip *chip = irq_data_get_irq_chip(data);
-        unsigned long mask;
-        int bit;
-
-        chip->irq_mask_ack(data);
-
-        mask = ioread16(se7722_irq_regs + IRQ01_STS_REG);
-
-        for_each_set_bit(bit, &mask, SE7722_FPGA_IRQ_NR)
-                generic_handle_irq(irq_linear_revmap(se7722_irq_domain, bit));
+        unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
+        __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
+}
 
-        chip->irq_unmask(data);
+static void enable_se7722_irq(struct irq_data *data)
+{
+        unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
+        __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
 }
 
-static void __init se7722_domain_init(void)
+static struct irq_chip se7722_irq_chip __read_mostly = {
+        .name           = "SE7722-FPGA",
+        .irq_mask       = disable_se7722_irq,
+        .irq_unmask     = enable_se7722_irq,
+};
+
+static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        int i;
+        unsigned short intv = __raw_readw(IRQ01_STS);
+        unsigned int ext_irq = 0;
 
-        se7722_irq_domain = irq_domain_add_linear(NULL, SE7722_FPGA_IRQ_NR,
-                                                  &irq_domain_simple_ops, NULL);
-        if (unlikely(!se7722_irq_domain)) {
-                printk("Failed to get IRQ domain\n");
-                return;
-        }
+        intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
 
-        for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
-                int irq = irq_create_mapping(se7722_irq_domain, i);
+        for (; intv; intv >>= 1, ext_irq++) {
+                if (!(intv & 1))
+                        continue;
 
-                if (unlikely(irq == 0)) {
-                        printk("Failed to allocate IRQ %d\n", i);
-                        return;
-                }
+                generic_handle_irq(se7722_fpga_irq[ext_irq]);
         }
 }
 
-static void __init se7722_gc_init(void)
+/*
+ * Initialize IRQ setting
+ */
+void __init init_se7722_IRQ(void)
 {
-        struct irq_chip_generic *gc;
-        struct irq_chip_type *ct;
-        unsigned int irq_base;
-
-        irq_base = irq_linear_revmap(se7722_irq_domain, 0);
+        int i, irq;
 
-        gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,
-                                    handle_level_irq);
-        if (unlikely(!gc))
-                return;
+        __raw_writew(0, IRQ01_MASK);       /* disable all irqs */
+        __raw_writew(0x2000, 0xb03fffec);  /* mrshpc irq enable */
 
-        ct = gc->chip_types;
-        ct->chip.irq_mask = irq_gc_mask_set_bit;
-        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
+        for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
+                irq = create_irq();
+                if (irq < 0)
+                        return;
+                se7722_fpga_irq[i] = irq;
 
-        ct->regs.mask = IRQ01_MASK_REG;
+                irq_set_chip_and_handler_name(se7722_fpga_irq[i],
+                                              &se7722_irq_chip,
+                                              handle_level_irq,
+                                              "level");
 
-        irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR),
-                               IRQ_GC_INIT_MASK_CACHE,
-                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
+                irq_set_chip_data(se7722_fpga_irq[i], (void *)i);
+        }
 
         irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux);
         irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
@@ -98,25 +81,3 @@ static void __init se7722_gc_init(void)
         irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux);
         irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
 }
-
-/*
- * Initialize FPGA IRQs
- */
-void __init init_se7722_IRQ(void)
-{
-        se7722_irq_regs = ioremap(IRQ01_BASE_ADDR, SZ_16);
-        if (unlikely(!se7722_irq_regs)) {
-                printk("Failed to remap IRQ01 regs\n");
-                return;
-        }
-
-        /*
-         * All FPGA IRQs disabled by default
-         */
-        iowrite16(0, se7722_irq_regs + IRQ01_MASK_REG);
-
-        __raw_writew(0x2000, 0xb03fffec);  /* mrshpc irq enable */
-
-        se7722_domain_init();
-        se7722_gc_init();
-}
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index e04e2bc4698..80a4e571b31 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -2,7 +2,6 @@
  * linux/arch/sh/boards/se/7722/setup.c
  *
  * Copyright (C) 2007 Nobuhiro Iwamatsu
- * Copyright (C) 2012 Paul Mundt
  *
  * Hitachi UL SolutionEngine 7722 Support.
  *
@@ -16,9 +15,7 @@
 #include <linux/ata_platform.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
-#include <linux/irqdomain.h>
 #include <linux/smc91x.h>
-#include <linux/sh_intc.h>
 #include <mach-se/mach/se7722.h>
 #include <mach-se/mach/mrshpc.h>
 #include <asm/machvec.h>
@@ -117,7 +114,7 @@ static struct resource sh_keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xbe0),
+                .start  = 79,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -130,6 +127,9 @@ static struct platform_device sh_keysc_device = {
         .dev    = {
                 .platform_data  = &sh_keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 static struct platform_device *se7722_devices[] __initdata = {
@@ -145,10 +145,10 @@ static int __init se7722_devices_setup(void)
 
         /* Wire-up dynamic vectors */
         cf_ide_resources[2].start = cf_ide_resources[2].end =
-                irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
+                se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0];
 
         smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
-                irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
+                se7722_fpga_irq[SE7722_FPGA_IRQ_SMC];
 
         return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
 }
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index 5d1d3ec9a6c..c6342ce7768 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -17,10 +17,8 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/export.h>
-#include <linux/topology.h>
-#include <linux/io.h>
-#include <linux/err.h>
+#include <asm/irq.h>
+#include <asm/io.h>
 #include <mach-se/mach/se7724.h>
 
 struct fpga_irq {
@@ -113,7 +111,7 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
  */
 void __init init_se7724_IRQ(void)
 {
-        int irq_base, i;
+        int i, nid = cpu_to_node(boot_cpu_data);
 
         __raw_writew(0xffff, IRQ0_MR);  /* mask all */
         __raw_writew(0xffff, IRQ1_MR);  /* mask all */
@@ -123,16 +121,28 @@ void __init init_se7724_IRQ(void)
         __raw_writew(0x0000, IRQ2_SR);  /* clear irq */
         __raw_writew(0x002a, IRQ_MODE); /* set irq type */
 
-        irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE,
-                                   SE7724_FPGA_IRQ_NR, numa_node_id());
-        if (IS_ERR_VALUE(irq_base)) {
-                pr_err("%s: failed hooking irqs for FPGA\n", __func__);
-                return;
-        }
+        for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) {
+                int irq, wanted;
+
+                wanted = SE7724_FPGA_IRQ_BASE + i;
+
+                irq = create_irq_nr(wanted, nid);
+                if (unlikely(irq == 0)) {
+                        pr_err("%s: failed hooking irq %d for FPGA\n",
+                               __func__, wanted);
+                        return;
+                }
 
-        for (i = 0; i < SE7724_FPGA_IRQ_NR; i++)
-                irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip,
+                if (unlikely(irq != wanted)) {
+                        pr_err("%s: got irq %d but wanted %d, bailing.\n",
+                               __func__, irq, wanted);
+                        destroy_irq(irq);
+                        return;
+                }
+
+                irq_set_chip_and_handler_name(irq, &se7724_irq_chip,
                                               handle_level_irq, "level");
+        }
 
         irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux);
         irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 35f6efa3ac0..d00756728bd 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -18,22 +18,17 @@
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/mtd/physmap.h>
 #include <linux/delay.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 #include <linux/smc91x.h>
 #include <linux/gpio.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/usb/r8a66597.h>
-#include <linux/sh_eth.h>
-#include <linux/sh_intc.h>
-#include <linux/videodev2.h>
 #include <video/sh_mobile_lcdc.h>
 #include <media/sh_mobile_ceu.h>
 #include <sound/sh_fsi.h>
-#include <sound/simple_card.h>
 #include <asm/io.h>
 #include <asm/heartbeat.h>
+#include <asm/sh_eth.h>
 #include <asm/clock.h>
 #include <asm/suspend.h>
 #include <cpu/sh7724.h>
@@ -184,12 +179,14 @@ static struct sh_mobile_lcdc_info lcdc_info = {
         .clock_source = LCDC_CLK_EXTERNAL,
         .ch[0] = {
                 .chan = LCDC_CHAN_MAINLCD,
-                .fourcc = V4L2_PIX_FMT_RGB565,
+                .bpp = 16,
                 .clock_divider = 1,
-                .panel_cfg = { /* 7.0 inch */
+                .lcd_size_cfg = { /* 7.0 inch */
                         .width = 152,
                         .height = 91,
                 },
+                .board_cfg = {
+                },
         }
 };
 
@@ -201,7 +198,7 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf40),
+                .start  = 106,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -213,6 +210,9 @@ static struct platform_device lcdc_device = {
         .dev            = {
                 .platform_data  = &lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 /* CEU0 */
@@ -228,7 +228,7 @@ static struct resource ceu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x880),
+                .start  = 52,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -244,6 +244,9 @@ static struct platform_device ceu0_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu0_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU0,
+        },
 };
 
 /* CEU1 */
@@ -259,7 +262,7 @@ static struct resource ceu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x9e0),
+                .start  = 63,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
@@ -275,14 +278,15 @@ static struct platform_device ceu1_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu1_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU1,
+        },
 };
 
 /* FSI */
 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 static struct sh_fsi_platform_info fsi_info = {
-        .port_a = {
-                .flags = SH_FSI_BRS_INV,
-        },
+        .porta_flags = SH_FSI_BRS_INV,
 };
 
 static struct resource fsi_resources[] = {
@@ -293,7 +297,7 @@ static struct resource fsi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf80),
+                .start  = 108,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -306,30 +310,13 @@ static struct platform_device fsi_device = {
         .dev    = {
                 .platform_data  = &fsi_info,
         },
-};
-
-static struct asoc_simple_dai_init_info fsi2_ak4642_init_info = {
-        .fmt            = SND_SOC_DAIFMT_LEFT_J,
-        .codec_daifmt   = SND_SOC_DAIFMT_CBM_CFM,
-        .cpu_daifmt     = SND_SOC_DAIFMT_CBS_CFS,
-        .sysclk         = 11289600,
-};
-
-static struct asoc_simple_card_info fsi_ak4642_info = {
-        .name           = "AK4642",
-        .card           = "FSIA-AK4642",
-        .cpu_dai        = "fsia-dai",
-        .codec          = "ak4642-codec.0-0012",
-        .platform       = "sh_fsi.0",
-        .codec_dai      = "ak4642-hifi",
-        .init           = &fsi2_ak4642_init_info,
+        .archdata = {
+                .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
+        },
 };
 
 static struct platform_device fsi_ak4642_device = {
-        .name   = "asoc-simple-card",
-        .dev    = {
-                .platform_data  = &fsi_ak4642_info,
-        },
+        .name           = "sh_fsi_a_ak4642",
 };
 
 /* KEYSC in SoC (Needs SW33-2 set to ON) */
@@ -355,7 +342,7 @@ static struct resource keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xbe0),
+                .start  = 79,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -368,6 +355,9 @@ static struct platform_device keysc_device = {
         .dev    = {
                 .platform_data  = &keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 /* SH Eth */
@@ -378,7 +368,7 @@ static struct resource sh_eth_resources[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start = evt2irq(0xd60),
+                .start = 91,
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
         },
 };
@@ -396,6 +386,9 @@ static struct platform_device sh_eth_device = {
         },
         .num_resources = ARRAY_SIZE(sh_eth_resources),
         .resource = sh_eth_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_ETHER,
+        },
 };
 
 static struct r8a66597_platdata sh7724_usb0_host_data = {
@@ -409,8 +402,8 @@ static struct resource sh7724_usb0_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -425,6 +418,9 @@ static struct platform_device sh7724_usb0_host_device = {
         },
         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
         .resource       = sh7724_usb0_host_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USB0,
+        },
 };
 
 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
@@ -438,8 +434,8 @@ static struct resource sh7724_usb1_gadget_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa40),
-                .end    = evt2irq(0xa40),
+                .start  = 66,
+                .end    = 66,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -456,15 +452,6 @@ static struct platform_device sh7724_usb1_gadget_device = {
         .resource       = sh7724_usb1_gadget_resources,
 };
 
-/* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
-static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-{
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
-        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
-};
-
 static struct resource sdhi0_cn7_resources[] = {
         [0] = {
                 .name   = "SDHI0",
@@ -473,7 +460,7 @@ static struct resource sdhi0_cn7_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe80),
+                .start  = 100,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -492,6 +479,9 @@ static struct platform_device sdhi0_cn7_device = {
         .dev = {
                 .platform_data  = &sh7724_sdhi0_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI0,
+        },
 };
 
 static struct resource sdhi1_cn8_resources[] = {
@@ -502,7 +492,7 @@ static struct resource sdhi1_cn8_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4e0),
+                .start  = 23,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -521,6 +511,9 @@ static struct platform_device sdhi1_cn8_device = {
         .dev = {
                 .platform_data  = &sh7724_sdhi1_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_SDHI1,
+        },
 };
 
 /* IrDA */
@@ -532,7 +525,7 @@ static struct resource irda_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -570,7 +563,7 @@ static struct resource sh_vou_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x8e0),
+                .start  = 55,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -583,6 +576,9 @@ static struct platform_device vou_device = {
         .dev            = {
                 .platform_data  = &sh_vou_pdata,
         },
+        .archdata       = {
+                .hwblk_id       = HWBLK_VOU,
+        },
 };
 
 static struct platform_device *ms7724se_devices[] __initdata = {
@@ -616,7 +612,6 @@ static struct i2c_board_info i2c0_devices[] = {
 #define EEPROM_DATA 0xBA20600C
 #define EEPROM_STAT 0xBA206010
 #define EEPROM_STRT 0xBA206014
-
 static int __init sh_eth_is_eeprom_ready(void)
 {
         int t = 10000;
@@ -673,6 +668,7 @@ extern char ms7724se_sdram_enter_end;
 extern char ms7724se_sdram_leave_start;
 extern char ms7724se_sdram_leave_end;
 
+
 static int __init arch_setup(void)
 {
         /* enable I2C device */
@@ -695,10 +691,6 @@ static int __init devices_setup(void)
                                         &ms7724se_sdram_enter_end,
                                         &ms7724se_sdram_leave_start,
                                         &ms7724se_sdram_leave_end);
-
-        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-
         /* Reset Release */
         fpga_out = __raw_readw(FPGA_OUT);
         /* bit4: NTSC_PDN, bit5: NTSC_RESET */
@@ -913,12 +905,12 @@ static int __init devices_setup(void)
 
         if (sw & SW41_B) {
                 /* 720p */
-                lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
-                lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
+                lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
+                lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
         } else {
                 /* VGA */
-                lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
-                lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
+                lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
+                lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
         }
 
         if (sw & SW41_A) {
@@ -953,4 +945,5 @@ device_initcall(devices_setup);
 static struct sh_machine_vector mv_ms7724se __initmv = {
         .mv_name        = "ms7724se",
         .mv_init_irq    = init_se7724_IRQ,
+        .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 };
diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c
index 820f4e7ba0d..4ed60c5e221 100644
--- a/arch/sh/boards/mach-se/7751/setup.c
+++ b/arch/sh/boards/mach-se/7751/setup.c
@@ -55,5 +55,6 @@ device_initcall(se7751_devices_setup);
  */
 static struct sh_machine_vector mv_7751se __initmv = {
         .mv_name                = "7751 SolutionEngine",
+        .mv_nr_irqs             = 72,
         .mv_init_irq            = init_7751se_IRQ,
 };
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
index ae5a1d84fdf..6f7c207138e 100644
--- a/arch/sh/boards/mach-se/7780/setup.c
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -110,5 +110,6 @@ static void __init se7780_setup(char **cmdline_p)
 static struct sh_machine_vector mv_se7780 __initmv = {
         .mv_name                = "Solution Engine 7780" ,
         .mv_setup               = se7780_setup ,
+        .mv_nr_irqs             = 111 ,
         .mv_init_irq            = init_se7780_IRQ,
 };
diff --git a/arch/sh/boards/mach-se/board-se7619.c b/arch/sh/boards/mach-se/board-se7619.c
index 958bcd7aacc..82b6d4a5dc0 100644
--- a/arch/sh/boards/mach-se/board-se7619.c
+++ b/arch/sh/boards/mach-se/board-se7619.c
@@ -22,5 +22,6 @@ static int se7619_mode_pins(void)
 
 static struct sh_machine_vector mv_se __initmv = {
         .mv_name                = "SolutionEngine",
+        .mv_nr_irqs             = 108,
         .mv_mode_pins           = se7619_mode_pins,
 };
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index f582dab5934..d4f79b2a651 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -101,5 +101,6 @@ device_initcall(sh03_devices_setup);
 static struct sh_machine_vector mv_sh03 __initmv = {
         .mv_name                = "Interface (CTP/PCI-SH03)",
         .mv_setup               = sh03_setup,
+        .mv_nr_irqs             = 48,
         .mv_init_irq            = init_sh03_IRQ,
 };
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index b7c75298dfb..f3d828f133e 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -17,9 +17,8 @@
 #include <linux/mtd/physmap.h>
 #include <linux/fb.h>
 #include <linux/io.h>
-#include <linux/sh_eth.h>
-#include <linux/sh_intc.h>
 #include <mach/sh7763rdp.h>
+#include <asm/sh_eth.h>
 #include <asm/sh7760fb.h>
 
 /* NOR Flash */
@@ -68,7 +67,7 @@ static struct platform_device sh7763rdp_nor_flash_device = {
  * SH-Ether
  *
  * SH Ether of SH7763 has multi IRQ handling.
- * (0x920,0x940,0x960 -> 0x920)
+ * (57,58,59 -> 57)
  */
 static struct resource sh_eth_resources[] = {
         {
@@ -80,7 +79,7 @@ static struct resource sh_eth_resources[] = {
                 .end    = 0xFEE01FFF,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = evt2irq(0x920),   /* irq number */
+                .start  = 57,   /* irq number */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -214,5 +213,6 @@ static void __init sh7763rdp_setup(char **cmdline_p)
 static struct sh_machine_vector mv_sh7763rdp __initmv = {
         .mv_name = "sh7763drp",
         .mv_setup = sh7763rdp_setup,
+        .mv_nr_irqs = 112,
         .mv_init_irq = init_sh7763rdp_IRQ,
 };
diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c
index 3ea65e9b56e..f33b2b57019 100644
--- a/arch/sh/boards/mach-x3proto/gpio.c
+++ b/arch/sh/boards/mach-x3proto/gpio.c
@@ -3,7 +3,7 @@
  *
  * Renesas SH-X3 Prototype Baseboard GPIO Support.
  *
- * Copyright (C) 2010 - 2012  Paul Mundt
+ * Copyright (C) 2010  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -17,7 +17,6 @@
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
-#include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <mach/ilsel.h>
 #include <mach/hardware.h>
@@ -27,7 +26,7 @@
 #define KEYDETR 0xb81c0004
 
 static DEFINE_SPINLOCK(x3proto_gpio_lock);
-static struct irq_domain *x3proto_irq_domain;
+static unsigned int x3proto_gpio_irq_map[NR_BASEBOARD_GPIOS] = { 0, };
 
 static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
 {
@@ -50,14 +49,7 @@ static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio)
 
 static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 {
-        int virq;
-
-        if (gpio < chip->ngpio)
-                virq = irq_create_mapping(x3proto_irq_domain, gpio);
-        else
-                virq = -ENXIO;
-
-        return virq;
+        return x3proto_gpio_irq_map[gpio];
 }
 
 static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -70,8 +62,9 @@ static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
         chip->irq_mask_ack(data);
 
         mask = __raw_readw(KEYDETR);
+
         for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
-                generic_handle_irq(irq_linear_revmap(x3proto_irq_domain, pin));
+                generic_handle_irq(x3proto_gpio_to_irq(NULL, pin));
 
         chip->irq_unmask(data);
 }
@@ -85,23 +78,10 @@ struct gpio_chip x3proto_gpio_chip = {
         .ngpio                  = NR_BASEBOARD_GPIOS,
 };
 
-static int x3proto_gpio_irq_map(struct irq_domain *domain, unsigned int virq,
-                                irq_hw_number_t hwirq)
-{
-        irq_set_chip_and_handler_name(virq, &dummy_irq_chip, handle_simple_irq,
-                                      "gpio");
-
-        return 0;
-}
-
-static struct irq_domain_ops x3proto_gpio_irq_ops = {
-        .map    = x3proto_gpio_irq_map,
-        .xlate  = irq_domain_xlate_twocell,
-};
-
 int __init x3proto_gpio_setup(void)
 {
-        int ilsel, ret;
+        int ilsel;
+        int ret, i;
 
         ilsel = ilsel_enable(ILSEL_KEY);
         if (unlikely(ilsel < 0))
@@ -111,10 +91,21 @@ int __init x3proto_gpio_setup(void)
         if (unlikely(ret))
                 goto err_gpio;
 
-        x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,
-                                                   &x3proto_gpio_irq_ops, NULL);
-        if (unlikely(!x3proto_irq_domain))
-                goto err_irq;
+        for (i = 0; i < NR_BASEBOARD_GPIOS; i++) {
+                unsigned long flags;
+                int irq = create_irq();
+
+                if (unlikely(irq < 0)) {
+                        ret = -EINVAL;
+                        goto err_irq;
+                }
+
+                spin_lock_irqsave(&x3proto_gpio_lock, flags);
+                x3proto_gpio_irq_map[i] = irq;
+                irq_set_chip_and_handler_name(irq, &dummy_irq_chip,
+                                              handle_simple_irq, "gpio");
+                spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
+        }
 
         pr_info("registering '%s' support, handling GPIOs %u -> %u, "
                 "bound to IRQ %u\n",
@@ -128,6 +119,10 @@ int __init x3proto_gpio_setup(void)
         return 0;
 
 err_irq:
+        for (; i >= 0; --i)
+                if (x3proto_gpio_irq_map[i])
+                        destroy_irq(x3proto_gpio_irq_map[i]);
+
         ret = gpiochip_remove(&x3proto_gpio_chip);
         if (unlikely(ret))
                 pr_err("Failed deregistering GPIO\n");
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 58592dfa5cb..ba515d80024 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -8,6 +8,8 @@
 # Copyright (C) 1999 Stuart Menefy
 #
 
+MKIMAGE := $(srctree)/scripts/mkuboot.sh
+
 #
 # Assign safe dummy values if these variables are not defined,
 # in order to suppress error message.
@@ -17,7 +19,6 @@ CONFIG_MEMORY_START	?= 0x0c000000
 CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
 CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
 CONFIG_ENTRY_OFFSET     ?= 0x00001000
-CONFIG_PHYSICAL_START   ?= $(CONFIG_MEMORY_START)
 
 suffix-y := bin
 suffix-$(CONFIG_KERNEL_GZIP)    := gz
@@ -47,7 +48,7 @@ $(obj)/romimage/vmlinux: $(obj)/zImage FORCE
         $(Q)$(MAKE) $(build)=$(obj)/romimage $@
 
 KERNEL_MEMORY   := $(shell /bin/bash -c 'printf "0x%08x" \
-                     $$[$(CONFIG_PHYSICAL_START) & 0x1fffffff]')
+                     $$[$(CONFIG_MEMORY_START) & 0x1fffffff]')
 
 KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
@@ -59,8 +60,10 @@ KERNEL_ENTRY	:= $(shell /bin/bash -c 'printf "0x%08x" \
                         $(KERNEL_MEMORY) + \
                         $(CONFIG_ZERO_PAGE_OFFSET) + $(CONFIG_ENTRY_OFFSET)]')
 
-UIMAGE_LOADADDR = $(KERNEL_LOAD)
-UIMAGE_ENTRYADDR = $(KERNEL_ENTRY)
+quiet_cmd_uimage = UIMAGE  $@
+      cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
+                   -C $(2) -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
+                   -n 'Linux-$(KERNELRELEASE)' -d $< $@
 
 $(obj)/vmlinux.bin: vmlinux FORCE
         $(call if_changed,objcopy)
@@ -111,5 +114,4 @@ $(obj)/uImage: $(obj)/uImage.$(suffix-y)
         @echo '  Image $@ is ready'
 
 export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
-       CONFIG_PHYSICAL_START CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET \
-       KERNEL_MEMORY suffix-y
+       CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index e9735616bdc..eb4ea4d44d5 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -73,7 +73,10 @@ static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
 
 int __init setup_hd64461(void)
 {
-        int irq_base, i;
+        int i, nid = cpu_to_node(boot_cpu_data);
+
+        if (!MACH_HD64461)
+                return 0;
 
         printk(KERN_INFO
                "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
@@ -86,15 +89,27 @@ int __init setup_hd64461(void)
 #endif
         __raw_writew(0xffff, HD64461_NIMR);
 
-        irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1);
-        if (IS_ERR_VALUE(irq_base)) {
-                pr_err("%s: failed hooking irqs for HD64461\n", __func__);
-                return irq_base;
-        }
-
-        for (i = 0; i < 16; i++)
-                irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip,
+        /*  IRQ 80 -> 95 belongs to HD64461  */
+        for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
+                unsigned int irq;
+
+                irq = create_irq_nr(i, nid);
+                if (unlikely(irq == 0)) {
+                        pr_err("%s: failed hooking irq %d for HD64461\n",
+                               __func__, i);
+                        return -EBUSY;
+                }
+
+                if (unlikely(irq != i)) {
+                        pr_err("%s: got irq %d but wanted %d, bailing.\n",
+                               __func__, irq, i);
+                        destroy_irq(irq);
+                        return -EINVAL;
+                }
+
+                irq_set_chip_and_handler(i, &hd64461_irq_chip,
                                          handle_level_irq);
+        }
 
         irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
         irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/configs/apsh4ad0a_defconfig b/arch/sh/configs/apsh4ad0a_defconfig
index 95ae23fcfdd..e7583484cc0 100644
--- a/arch/sh/configs/apsh4ad0a_defconfig
+++ b/arch/sh/configs/apsh4ad0a_defconfig
@@ -11,7 +11,7 @@ CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEMCG=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
 CONFIG_BLK_CGROUP=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index c6c2becdc8a..911e30c9abf 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -112,7 +112,7 @@ CONFIG_USB_MON=y
 CONFIG_USB_R8A66597_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_FILE_STORAGE=m
 CONFIG_MMC=y
 CONFIG_MMC_SPI=y
 CONFIG_MMC_SDHI=y
diff --git a/arch/sh/configs/rsk7264_defconfig b/arch/sh/configs/rsk7264_defconfig
deleted file mode 100644
index 1600426224c..00000000000
--- a/arch/sh/configs/rsk7264_defconfig
+++ /dev/null
@@ -1,80 +0,0 @@
-CONFIG_LOCALVERSION="uClinux RSK2+SH7264"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_COUNTERS=y
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_SLAB=y
-CONFIG_MMAP_ALLOW_UNINITIALIZED=y
-CONFIG_PROFILING=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_CPU_SUBTYPE_SH7264=y
-CONFIG_MEMORY_START=0x0c000000
-CONFIG_FLATMEM_MANUAL=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_SH_RSK=y
-# CONFIG_SH_TIMER_MTU2 is not set
-CONFIG_BINFMT_FLAT=y
-CONFIG_NET=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC911X=y
-CONFIG_SMSC_PHY=y
-CONFIG_INPUT_FF_MEMLESS=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HWMON is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_R8A66597_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_LIBUSUAL=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_VFAT_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_FTRACE is not set
diff --git a/arch/sh/configs/rsk7269_defconfig b/arch/sh/configs/rsk7269_defconfig
deleted file mode 100644
index 9f062b5837d..00000000000
--- a/arch/sh/configs/rsk7269_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_EMBEDDED=y
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_SLAB=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_CPU_SUBTYPE_SH7269=y
-CONFIG_MEMORY_START=0x0c000000
-CONFIG_MEMORY_SIZE=0x02000000
-CONFIG_FLATMEM_MANUAL=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_SH_RSK=y
-# CONFIG_SH_TIMER_MTU2 is not set
-CONFIG_SH_PCLK_FREQ=66700000
-CONFIG_BINFMT_FLAT=y
-CONFIG_NET=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FW_LOADER is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-CONFIG_SMSC911X=y
-CONFIG_SMSC_PHY=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_HWMON is not set
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_R8A66597_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_LIBUSUAL=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_VFAT_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_FTRACE is not set
diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig
index 76a76a295d7..8a7dd7b59c5 100644
--- a/arch/sh/configs/sdk7786_defconfig
+++ b/arch/sh/configs/sdk7786_defconfig
@@ -18,8 +18,8 @@ CONFIG_CPUSETS=y
 # CONFIG_PROC_PID_CPUSET is not set
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEMCG=y
-CONFIG_CGROUP_MEMCG_SWAP=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_RT_GROUP_SCHED=y
 CONFIG_BLK_CGROUP=y
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig
index 6bc30ab9fd1..72c3fad7383 100644
--- a/arch/sh/configs/se7206_defconfig
+++ b/arch/sh/configs/se7206_defconfig
@@ -11,7 +11,7 @@ CONFIG_CGROUP_DEBUG=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEMCG=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
 CONFIG_RELAY=y
 CONFIG_NAMESPACES=y
 CONFIG_UTS_NS=y
diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig
index 1faa788aeca..ed35093e375 100644
--- a/arch/sh/configs/se7724_defconfig
+++ b/arch/sh/configs/se7724_defconfig
@@ -109,7 +109,7 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
 CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_FILE_STORAGE=m
 CONFIG_USB_G_SERIAL=m
 CONFIG_MMC=y
 CONFIG_MMC_SPI=y
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
index 9bdcf72ec06..7b9c696ac5e 100644
--- a/arch/sh/configs/sh7785lcr_32bit_defconfig
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -5,7 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
-CONFIG_PERF_EVENTS=y
+CONFIG_PERF_COUNTERS=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig
index cd6c519f8fa..6bb41303689 100644
--- a/arch/sh/configs/shx3_defconfig
+++ b/arch/sh/configs/shx3_defconfig
@@ -13,7 +13,7 @@ CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEMCG=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
 CONFIG_RELAY=y
 CONFIG_NAMESPACES=y
 CONFIG_UTS_NS=y
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
index d7f89be9f47..8bfa4d056d7 100644
--- a/arch/sh/configs/urquell_defconfig
+++ b/arch/sh/configs/urquell_defconfig
@@ -15,8 +15,8 @@ CONFIG_CPUSETS=y
 # CONFIG_PROC_PID_CPUSET is not set
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEMCG=y
-CONFIG_CGROUP_MEMCG_SWAP=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_RT_GROUP_SCHED=y
 CONFIG_BLK_DEV_INITRD=y
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index cfd5b90a862..4d58eb0973d 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -40,6 +40,23 @@ config NR_ONCHIP_DMA_CHANNELS
           DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
           SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
 
+config NR_DMA_CHANNELS_BOOL
+        depends on SH_DMA
+        bool "Override default number of maximum DMA channels"
+        help
+          This allows you to forcibly update the maximum number of supported
+          DMA channels for a given board. If this is unset, this will default
+          to the number of channels that the on-chip DMAC has.
+
+config NR_DMA_CHANNELS
+        int "Maximum number of DMA channels"
+        depends on SH_DMA && NR_DMA_CHANNELS_BOOL
+        default NR_ONCHIP_DMA_CHANNELS
+        help
+          This allows you to specify the maximum number of DMA channels to
+          support. Setting this to a higher value allows for cascading DMACs
+          with additional channels.
+
 config SH_DMABRG
         bool "SH7760 DMABRG support"
         depends on CPU_SUBTYPE_SH7760
diff --git a/arch/sh/drivers/dma/dma-g2.c b/arch/sh/drivers/dma/dma-g2.c
index e1ab6eb3c04..af7bb589c2c 100644
--- a/arch/sh/drivers/dma/dma-g2.c
+++ b/arch/sh/drivers/dma/dma-g2.c
@@ -170,7 +170,7 @@ static int __init g2_dma_init(void)
 {
         int ret;
 
-        ret = request_irq(HW_EVENT_G2_DMA, g2_dma_interrupt, 0,
+        ret = request_irq(HW_EVENT_G2_DMA, g2_dma_interrupt, IRQF_DISABLED,
                           "g2 DMA handler", &g2_dma_info);
         if (unlikely(ret))
                 return -EINVAL;
@@ -181,14 +181,14 @@ static int __init g2_dma_init(void)
 
         ret = register_dmac(&g2_dma_info);
         if (unlikely(ret != 0))
-                free_irq(HW_EVENT_G2_DMA, &g2_dma_info);
+                free_irq(HW_EVENT_G2_DMA, 0);
 
         return ret;
 }
 
 static void __exit g2_dma_exit(void)
 {
-        free_irq(HW_EVENT_G2_DMA, &g2_dma_info);
+        free_irq(HW_EVENT_G2_DMA, 0);
         unregister_dmac(&g2_dma_info);
 }
 
diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c
index 706a3434af7..3cee58e7f1e 100644
--- a/arch/sh/drivers/dma/dma-pvr2.c
+++ b/arch/sh/drivers/dma/dma-pvr2.c
@@ -70,6 +70,7 @@ static int pvr2_xfer_dma(struct dma_channel *chan)
 static struct irqaction pvr2_dma_irq = {
         .name           = "pvr2 DMA handler",
         .handler        = pvr2_dma_interrupt,
+        .flags          = IRQF_DISABLED,
 };
 
 static struct dma_ops pvr2_dma_ops = {
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index b2256562314..827208781ed 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -14,72 +14,35 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
-#include <linux/io.h>
 #include <mach-dreamcast/mach/dma.h>
 #include <asm/dma.h>
-#include <asm/dma-register.h>
-#include <cpu/dma-register.h>
-#include <cpu/dma.h>
+#include <asm/io.h>
+#include <asm/dma-sh.h>
 
-/*
- * Define the default configuration for dual address memory-memory transfer.
- * The 0x400 value represents auto-request, external->external.
- */
-#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
-
-static unsigned long dma_find_base(unsigned int chan)
-{
-        unsigned long base = SH_DMAC_BASE0;
-
-#ifdef SH_DMAC_BASE1
-        if (chan >= 6)
-                base = SH_DMAC_BASE1;
-#endif
-
-        return base;
-}
-
-static unsigned long dma_base_addr(unsigned int chan)
-{
-        unsigned long base = dma_find_base(chan);
-
-        /* Normalize offset calculation */
-        if (chan >= 9)
-                chan -= 6;
-        if (chan >= 4)
-                base += 0x10;
-
-        return base + (chan * 0x10);
-}
-
-#ifdef CONFIG_SH_DMA_IRQ_MULTI
-static inline unsigned int get_dmte_irq(unsigned int chan)
-{
-        return chan >= 6 ? DMTE6_IRQ : DMTE0_IRQ;
-}
+#if defined(DMAE1_IRQ)
+#define NR_DMAE         2
 #else
-
-static unsigned int dmte_irq_map[] = {
-        DMTE0_IRQ, DMTE0_IRQ + 1, DMTE0_IRQ + 2, DMTE0_IRQ + 3,
-
-#ifdef DMTE4_IRQ
-        DMTE4_IRQ, DMTE4_IRQ + 1,
-#endif
-
-#ifdef DMTE6_IRQ
-        DMTE6_IRQ, DMTE6_IRQ + 1,
+#define NR_DMAE         1
 #endif
 
-#ifdef DMTE8_IRQ
-        DMTE8_IRQ, DMTE9_IRQ, DMTE10_IRQ, DMTE11_IRQ,
-#endif
+static const char *dmae_name[] = {
+        "DMAC Address Error0", "DMAC Address Error1"
 };
 
 static inline unsigned int get_dmte_irq(unsigned int chan)
 {
-        return dmte_irq_map[chan];
-}
+        unsigned int irq = 0;
+        if (chan < ARRAY_SIZE(dmte_irq_map))
+                irq = dmte_irq_map[chan];
+
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        if (irq > DMTE6_IRQ)
+                return DMTE6_IRQ;
+        return DMTE0_IRQ;
+#else
+        return irq;
 #endif
+}
 
 /*
  * We determine the correct shift size based off of the CHCR transmit size
@@ -90,10 +53,9 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
  * iterations to complete the transfer.
  */
 static unsigned int ts_shift[] = TS_SHIFT;
-
 static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
 {
-        u32 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR);
+        u32 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) |
                 ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT);
 
@@ -111,13 +73,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
         struct dma_channel *chan = dev_id;
         u32 chcr;
 
-        chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
 
         if (!(chcr & CHCR_TE))
                 return IRQ_NONE;
 
         chcr &= ~(CHCR_IE | CHCR_DE);
-        __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         wake_up(&chan->wait_queue);
 
@@ -129,8 +91,13 @@ static int sh_dmac_request_dma(struct dma_channel *chan)
         if (unlikely(!(chan->flags & DMA_TEI_CAPABLE)))
                 return 0;
 
-        return request_irq(get_dmte_irq(chan->chan), dma_tei, IRQF_SHARED,
-                           chan->dev_id, chan);
+        return request_irq(get_dmte_irq(chan->chan), dma_tei,
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+                                IRQF_SHARED,
+#else
+                                IRQF_DISABLED,
+#endif
+                                chan->dev_id, chan);
 }
 
 static void sh_dmac_free_dma(struct dma_channel *chan)
@@ -151,7 +118,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
                 chan->flags &= ~DMA_TEI_CAPABLE;
         }
 
-        __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         chan->flags |= DMA_CONFIGURED;
         return 0;
@@ -162,13 +129,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
         int irq;
         u32 chcr;
 
-        chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         chcr |= CHCR_DE;
 
         if (chan->flags & DMA_TEI_CAPABLE)
                 chcr |= CHCR_IE;
 
-        __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         if (chan->flags & DMA_TEI_CAPABLE) {
                 irq = get_dmte_irq(chan->chan);
@@ -186,9 +153,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
                 disable_irq(irq);
         }
 
-        chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
-        __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 }
 
 static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -219,13 +186,13 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
          */
         if (chan->sar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                __raw_writel(chan->sar, (dma_base_addr(chan->chan) + SAR));
+                __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR));
         if (chan->dar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR));
+                __raw_writel(chan->dar, (dma_base_addr[chan->chan] + DAR));
 
         __raw_writel(chan->count >> calc_xmit_shift(chan),
-                (dma_base_addr(chan->chan) + TCR));
+                (dma_base_addr[chan->chan] + TCR));
 
         sh_dmac_enable_dma(chan);
 
@@ -234,32 +201,13 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
 
 static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 {
-        if (!(__raw_readl(dma_base_addr(chan->chan) + CHCR) & CHCR_DE))
+        if (!(__raw_readl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
                 return 0;
 
-        return __raw_readl(dma_base_addr(chan->chan) + TCR)
+        return __raw_readl(dma_base_addr[chan->chan] + TCR)
                  << calc_xmit_shift(chan);
 }
 
-/*
- * DMAOR handling
- */
-#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
-    defined(CONFIG_CPU_SUBTYPE_SH7724)  || \
-    defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
-    defined(CONFIG_CPU_SUBTYPE_SH7785)
-#define NR_DMAOR        2
-#else
-#define NR_DMAOR        1
-#endif
-
-/*
- * DMAOR bases are broken out amongst channel groups. DMAOR0 manages
- * channels 0 - 5, DMAOR1 6 - 11 (optional).
- */
-#define dmaor_read_reg(n)               __raw_readw(dma_find_base((n)*6))
-#define dmaor_write_reg(n, data)        __raw_writew(data, dma_find_base(n)*6)
-
 static inline int dmaor_reset(int no)
 {
         unsigned long dmaor = dmaor_read_reg(no);
@@ -280,86 +228,36 @@ static inline int dmaor_reset(int no)
         return 0;
 }
 
-/*
- * DMAE handling
- */
-#ifdef CONFIG_CPU_SH4
-
-#if defined(DMAE1_IRQ)
-#define NR_DMAE         2
-#else
-#define NR_DMAE         1
-#endif
-
-static const char *dmae_name[] = {
-        "DMAC Address Error0",
-        "DMAC Address Error1"
-};
-
-#ifdef CONFIG_SH_DMA_IRQ_MULTI
-static inline unsigned int get_dma_error_irq(int n)
-{
-        return get_dmte_irq(n * 6);
-}
-#else
-
-static unsigned int dmae_irq_map[] = {
-        DMAE0_IRQ,
-
-#ifdef DMAE1_IRQ
-        DMAE1_IRQ,
-#endif
-};
-
-static inline unsigned int get_dma_error_irq(int n)
-{
-        return dmae_irq_map[n];
-}
-#endif
-
+#if defined(CONFIG_CPU_SH4)
 static irqreturn_t dma_err(int irq, void *dummy)
 {
-        int i;
-
-        for (i = 0; i < NR_DMAOR; i++)
-                dmaor_reset(i);
-
-        disable_irq(irq);
-
-        return IRQ_HANDLED;
-}
-
-static int dmae_irq_init(void)
-{
-        int n;
-
-        for (n = 0; n < NR_DMAE; n++) {
-                int i = request_irq(get_dma_error_irq(n), dma_err,
-                                    IRQF_SHARED, dmae_name[n], (void *)dmae_name[n]);
-                if (unlikely(i < 0)) {
-                        printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);
-                        return i;
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        int cnt = 0;
+        switch (irq) {
+#if defined(DMTE6_IRQ) && defined(DMAE1_IRQ)
+        case DMTE6_IRQ:
+                cnt++;
+#endif
+        case DMTE0_IRQ:
+                if (dmaor_read_reg(cnt) & (DMAOR_NMIF | DMAOR_AE)) {
+                        disable_irq(irq);
+                        /* DMA multi and error IRQ */
+                        return IRQ_HANDLED;
                 }
+        default:
+                return IRQ_NONE;
         }
-
-        return 0;
-}
-
-static void dmae_irq_free(void)
-{
-        int n;
-
-        for (n = 0; n < NR_DMAE; n++)
-                free_irq(get_dma_error_irq(n), NULL);
-}
 #else
-static inline int dmae_irq_init(void)
-{
-        return 0;
-}
+        dmaor_reset(0);
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+                defined(CONFIG_CPU_SUBTYPE_SH7780)      || \
+                defined(CONFIG_CPU_SUBTYPE_SH7785)
+        dmaor_reset(1);
+#endif
+        disable_irq(irq);
 
-static void dmae_irq_free(void)
-{
+        return IRQ_HANDLED;
+#endif
 }
 #endif
 
@@ -378,34 +276,72 @@ static struct dma_info sh_dmac_info = {
         .flags          = DMAC_CHANNELS_TEI_CAPABLE,
 };
 
+#ifdef CONFIG_CPU_SH4
+static unsigned int get_dma_error_irq(int n)
+{
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        return (n == 0) ? get_dmte_irq(0) : get_dmte_irq(6);
+#else
+        return (n == 0) ? DMAE0_IRQ :
+#if defined(DMAE1_IRQ)
+                                DMAE1_IRQ;
+#else
+                                -1;
+#endif
+#endif
+}
+#endif
+
 static int __init sh_dmac_init(void)
 {
         struct dma_info *info = &sh_dmac_info;
-        int i, rc;
+        int i;
 
-        /*
-         * Initialize DMAE, for parts that support it.
-         */
-        rc = dmae_irq_init();
-        if (unlikely(rc != 0))
-                return rc;
+#ifdef CONFIG_CPU_SH4
+        int n;
+
+        for (n = 0; n < NR_DMAE; n++) {
+                i = request_irq(get_dma_error_irq(n), dma_err,
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+                                IRQF_SHARED,
+#else
+                                IRQF_DISABLED,
+#endif
+                                dmae_name[n], (void *)dmae_name[n]);
+                if (unlikely(i < 0)) {
+                        printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);
+                        return i;
+                }
+        }
+#endif /* CONFIG_CPU_SH4 */
 
         /*
          * Initialize DMAOR, and clean up any error flags that may have
          * been set.
          */
-        for (i = 0; i < NR_DMAOR; i++) {
-                rc = dmaor_reset(i);
-                if (unlikely(rc != 0))
-                        return rc;
-        }
+        i = dmaor_reset(0);
+        if (unlikely(i != 0))
+                return i;
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+                defined(CONFIG_CPU_SUBTYPE_SH7780)      || \
+                defined(CONFIG_CPU_SUBTYPE_SH7785)
+        i = dmaor_reset(1);
+        if (unlikely(i != 0))
+                return i;
+#endif
 
         return register_dmac(info);
 }
 
 static void __exit sh_dmac_exit(void)
 {
-        dmae_irq_free();
+#ifdef CONFIG_CPU_SH4
+        int n;
+
+        for (n = 0; n < NR_DMAE; n++) {
+                free_irq(get_dma_error_irq(n), (void *)dmae_name[n]);
+        }
+#endif /* CONFIG_CPU_SH4 */
         unregister_dmac(&sh_dmac_info);
 }
 
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
index 4b15feda54b..1ee631d3725 100644
--- a/arch/sh/drivers/dma/dma-sysfs.c
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -11,25 +11,23 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/stat.h>
-#include <linux/device.h>
+#include <linux/sysdev.h>
 #include <linux/platform_device.h>
 #include <linux/err.h>
 #include <linux/string.h>
 #include <asm/dma.h>
 
-static struct bus_type dma_subsys = {
+static struct sysdev_class dma_sysclass = {
         .name = "dma",
-        .dev_name = "dma",
 };
 
-static ssize_t dma_show_devices(struct device *dev,
-                                struct device_attribute *attr, char *buf)
+static ssize_t dma_show_devices(struct sys_device *dev,
+                                struct sysdev_attribute *attr, char *buf)
 {
         ssize_t len = 0;
         int i;
 
-        for (i = 0; i < 16; i++) {
+        for (i = 0; i < MAX_DMA_CHANNELS; i++) {
                 struct dma_info *info = get_dma_info(i);
                 struct dma_channel *channel = get_dma_channel(i);
 
@@ -44,29 +42,29 @@ static ssize_t dma_show_devices(struct device *dev,
         return len;
 }
 
-static DEVICE_ATTR(devices, S_IRUGO, dma_show_devices, NULL);
+static SYSDEV_ATTR(devices, S_IRUGO, dma_show_devices, NULL);
 
-static int __init dma_subsys_init(void)
+static int __init dma_sysclass_init(void)
 {
         int ret;
 
-        ret = subsys_system_register(&dma_subsys, NULL);
+        ret = sysdev_class_register(&dma_sysclass);
         if (unlikely(ret))
                 return ret;
 
-        return device_create_file(dma_subsys.dev_root, &dev_attr_devices);
+        return sysfs_create_file(&dma_sysclass.kset.kobj, &attr_devices.attr);
 }
-postcore_initcall(dma_subsys_init);
+postcore_initcall(dma_sysclass_init);
 
-static ssize_t dma_show_dev_id(struct device *dev,
-                                struct device_attribute *attr, char *buf)
+static ssize_t dma_show_dev_id(struct sys_device *dev,
+                                struct sysdev_attribute *attr, char *buf)
 {
         struct dma_channel *channel = to_dma_channel(dev);
         return sprintf(buf, "%s\n", channel->dev_id);
 }
 
-static ssize_t dma_store_dev_id(struct device *dev,
-                                struct device_attribute *attr,
+static ssize_t dma_store_dev_id(struct sys_device *dev,
+                                struct sysdev_attribute *attr,
                                 const char *buf, size_t count)
 {
         struct dma_channel *channel = to_dma_channel(dev);
@@ -74,10 +72,10 @@ static ssize_t dma_store_dev_id(struct device *dev,
         return count;
 }
 
-static DEVICE_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id);
+static SYSDEV_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id);
 
-static ssize_t dma_store_config(struct device *dev,
-                                struct device_attribute *attr,
+static ssize_t dma_store_config(struct sys_device *dev,
+                                struct sysdev_attribute *attr,
                                 const char *buf, size_t count)
 {
         struct dma_channel *channel = to_dma_channel(dev);
@@ -89,17 +87,17 @@ static ssize_t dma_store_config(struct device *dev,
         return count;
 }
 
-static DEVICE_ATTR(config, S_IWUSR, NULL, dma_store_config);
+static SYSDEV_ATTR(config, S_IWUSR, NULL, dma_store_config);
 
-static ssize_t dma_show_mode(struct device *dev,
-                                struct device_attribute *attr, char *buf)
+static ssize_t dma_show_mode(struct sys_device *dev,
+                                struct sysdev_attribute *attr, char *buf)
 {
         struct dma_channel *channel = to_dma_channel(dev);
         return sprintf(buf, "0x%08x\n", channel->mode);
 }
 
-static ssize_t dma_store_mode(struct device *dev,
-                              struct device_attribute *attr,
+static ssize_t dma_store_mode(struct sys_device *dev,
+                              struct sysdev_attribute *attr,
                               const char *buf, size_t count)
 {
         struct dma_channel *channel = to_dma_channel(dev);
@@ -107,38 +105,38 @@ static ssize_t dma_store_mode(struct device *dev,
         return count;
 }
 
-static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode);
+static SYSDEV_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode);
 
 #define dma_ro_attr(field, fmt)                                         \
-static ssize_t dma_show_##field(struct device *dev,             \
-                                struct device_attribute *attr, char *buf)\
+static ssize_t dma_show_##field(struct sys_device *dev,                 \
+                                struct sysdev_attribute *attr, char *buf)\
 {                                                                       \
         struct dma_channel *channel = to_dma_channel(dev);              \
         return sprintf(buf, fmt, channel->field);                       \
 }                                                                       \
-static DEVICE_ATTR(field, S_IRUGO, dma_show_##field, NULL);
+static SYSDEV_ATTR(field, S_IRUGO, dma_show_##field, NULL);
 
 dma_ro_attr(count, "0x%08x\n");
 dma_ro_attr(flags, "0x%08lx\n");
 
 int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info)
 {
-        struct device *dev = &chan->dev;
+        struct sys_device *dev = &chan->dev;
         char name[16];
         int ret;
 
         dev->id  = chan->vchan;
-        dev->bus = &dma_subsys;
+        dev->cls = &dma_sysclass;
 
-        ret = device_register(dev);
+        ret = sysdev_register(dev);
         if (ret)
                 return ret;
 
-        ret |= device_create_file(dev, &dev_attr_dev_id);
-        ret |= device_create_file(dev, &dev_attr_count);
-        ret |= device_create_file(dev, &dev_attr_mode);
-        ret |= device_create_file(dev, &dev_attr_flags);
-        ret |= device_create_file(dev, &dev_attr_config);
+        ret |= sysdev_create_file(dev, &attr_dev_id);
+        ret |= sysdev_create_file(dev, &attr_count);
+        ret |= sysdev_create_file(dev, &attr_mode);
+        ret |= sysdev_create_file(dev, &attr_flags);
+        ret |= sysdev_create_file(dev, &attr_config);
 
         if (unlikely(ret)) {
                 dev_err(&info->pdev->dev, "Failed creating attrs\n");
@@ -151,17 +149,17 @@ int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info)
 
 void dma_remove_sysfs_files(struct dma_channel *chan, struct dma_info *info)
 {
-        struct device *dev = &chan->dev;
+        struct sys_device *dev = &chan->dev;
         char name[16];
 
-        device_remove_file(dev, &dev_attr_dev_id);
-        device_remove_file(dev, &dev_attr_count);
-        device_remove_file(dev, &dev_attr_mode);
-        device_remove_file(dev, &dev_attr_flags);
-        device_remove_file(dev, &dev_attr_config);
+        sysdev_remove_file(dev, &attr_dev_id);
+        sysdev_remove_file(dev, &attr_count);
+        sysdev_remove_file(dev, &attr_mode);
+        sysdev_remove_file(dev, &attr_flags);
+        sysdev_remove_file(dev, &attr_config);
 
         snprintf(name, sizeof(name), "dma%d", chan->chan);
         sysfs_remove_link(&info->pdev->dev.kobj, name);
 
-        device_unregister(dev);
+        sysdev_unregister(dev);
 }
diff --git a/arch/sh/drivers/dma/dmabrg.c b/arch/sh/drivers/dma/dmabrg.c
index c0dd904483c..6ab9c4a1543 100644
--- a/arch/sh/drivers/dma/dmabrg.c
+++ b/arch/sh/drivers/dma/dmabrg.c
@@ -174,23 +174,23 @@ static int __init dmabrg_init(void)
         or = __raw_readl(DMAOR);
         __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR);
 
-        ret = request_irq(DMABRGI0, dmabrg_irq, 0,
+        ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED,
                         "DMABRG USB address error", NULL);
         if (ret)
                 goto out0;
 
-        ret = request_irq(DMABRGI1, dmabrg_irq, 0,
+        ret = request_irq(DMABRGI1, dmabrg_irq, IRQF_DISABLED,
                         "DMABRG Transfer End", NULL);
         if (ret)
                 goto out1;
 
-        ret = request_irq(DMABRGI2, dmabrg_irq, 0,
+        ret = request_irq(DMABRGI2, dmabrg_irq, IRQF_DISABLED,
                         "DMABRG Transfer Half", NULL);
         if (ret == 0)
                 return ret;
 
-        free_irq(DMABRGI1, NULL);
-out1:   free_irq(DMABRGI0, NULL);
+        free_irq(DMABRGI1, 0);
+out1:   free_irq(DMABRGI0, 0);
 out0:   kfree(dmabrg_handlers);
         return ret;
 }
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index d6cde700e31..edeea8960c3 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -28,7 +28,7 @@
 #include <asm/irq.h>
 #include <mach/pci.h>
 
-static void gapspci_fixup_resources(struct pci_dev *dev)
+static void __init gapspci_fixup_resources(struct pci_dev *dev)
 {
         struct pci_channel *p = dev->sysdata;
 
diff --git a/arch/sh/drivers/pci/fixups-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c
index db5b40a98e6..ecb1d106063 100644
--- a/arch/sh/drivers/pci/fixups-landisk.c
+++ b/arch/sh/drivers/pci/fixups-landisk.c
@@ -14,7 +14,6 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/pci.h>
-#include <linux/sh_intc.h>
 #include "pci-sh4.h"
 
 #define PCIMCR_MRSET_OFF        0xBFFFFFFF
@@ -28,7 +27,7 @@ int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
          * slot2: pin1-4 = irq7,8,5,6
          * slot3: pin1-4 = irq8,5,6,7
          */
-        int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0);
+        int irq = ((slot + pin - 1) & 0x3) + 5;
 
         if ((slot | (pin - 1)) > 0x3) {
                 printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index 57ed3f09d0c..f9370dce0b7 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -12,10 +12,13 @@
  */
 #include <linux/pci.h>
 #include <linux/io.h>
-#include <linux/sh_intc.h>
 #include "pci-sh4.h"
 
+static char irq_tab[] __initdata = {
+        65, 66, 67, 68,
+};
+
 int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
-        return evt2irq(0xa20) + slot;
+        return irq_tab[slot];
 }
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
index c0a015ae6ec..0b8472501b8 100644
--- a/arch/sh/drivers/pci/fixups-sdk7780.c
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -13,28 +13,18 @@
  */
 #include <linux/pci.h>
 #include <linux/io.h>
-#include <linux/sh_intc.h>
 #include "pci-sh4.h"
 
-#define IRQ_INTA        evt2irq(0xa20)
-#define IRQ_INTB        evt2irq(0xa40)
-#define IRQ_INTC        evt2irq(0xa60)
-#define IRQ_INTD        evt2irq(0xa80)
-
 /* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
 static char sdk7780_irq_tab[4][16] __initdata = {
         /* INTA */
-        { IRQ_INTA, IRQ_INTD, IRQ_INTC, IRQ_INTD, -1, -1, -1, -1, -1, -1,
-          -1, -1, -1, -1, -1, -1 },
+        { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
         /* INTB */
-        { IRQ_INTB, IRQ_INTA, -1, IRQ_INTA, -1, -1, -1, -1, -1, -1, -1, -1,
-          -1, -1, -1, -1 },
+        { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
         /* INTC */
-        { IRQ_INTC, IRQ_INTB, -1, IRQ_INTB, -1, -1, -1, -1, -1, -1, -1, -1,
-          -1, -1, -1, -1 },
+        { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
         /* INTD */
-        { IRQ_INTD, IRQ_INTC, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-          -1, -1, -1 },
+        { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
 };
 
 int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
diff --git a/arch/sh/drivers/pci/fixups-sdk7786.c b/arch/sh/drivers/pci/fixups-sdk7786.c
index 36eb6fc3c18..0e18ee33255 100644
--- a/arch/sh/drivers/pci/fixups-sdk7786.c
+++ b/arch/sh/drivers/pci/fixups-sdk7786.c
@@ -23,9 +23,9 @@
  * Misconfigurations can be detected through the FPGA via the slot
  * resistors to determine card presence. Hotplug remains unsupported.
  */
-static unsigned int slot4en __initdata;
+static unsigned int slot4en __devinitdata;
 
-char *__init pcibios_setup(char *str)
+char *__devinit pcibios_setup(char *str)
 {
         if (strcmp(str, "slot4en") == 0) {
                 slot4en = 1;
diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c
index 84a88ca9200..2ec146c3fa4 100644
--- a/arch/sh/drivers/pci/fixups-se7751.c
+++ b/arch/sh/drivers/pci/fixups-se7751.c
@@ -4,14 +4,13 @@
 #include <linux/delay.h>
 #include <linux/pci.h>
 #include <linux/io.h>
-#include <linux/sh_intc.h>
 #include "pci-sh4.h"
 
 int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin)
 {
         switch (slot) {
-        case 0: return evt2irq(0x3a0);
-        case 1: return evt2irq(0x3a0);  /* AMD Ethernet controller */
+        case 0: return 13;
+        case 1: return 13;      /* AMD Ethernet controller */
         case 2: return -1;
         case 3: return -1;
         case 4: return -1;
diff --git a/arch/sh/drivers/pci/fixups-sh03.c b/arch/sh/drivers/pci/fixups-sh03.c
index 16207bef9f5..1615e590616 100644
--- a/arch/sh/drivers/pci/fixups-sh03.c
+++ b/arch/sh/drivers/pci/fixups-sh03.c
@@ -2,7 +2,6 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/pci.h>
-#include <linux/sh_intc.h>
 
 int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
@@ -10,21 +9,21 @@ int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 
         if (dev->bus->number == 0) {
                 switch (slot) {
-                case 4: return evt2irq(0x2a0);  /* eth0       */
-                case 8: return evt2irq(0x2a0);  /* eth1       */
-                case 6: return evt2irq(0x240);  /* PCI bridge */
+                case 4: return 5;       /* eth0       */
+                case 8: return 5;       /* eth1       */
+                case 6: return 2;       /* PCI bridge */
                 default:
                         printk(KERN_ERR "PCI: Bad IRQ mapping request "
                                         "for slot %d\n", slot);
-                        return evt2irq(0x240);
+                        return 2;
                 }
         } else {
                 switch (pin) {
-                case 0:   irq =  evt2irq(0x240); break;
-                case 1:   irq =  evt2irq(0x240); break;
-                case 2:   irq =  evt2irq(0x240); break;
-                case 3:   irq =  evt2irq(0x240); break;
-                case 4:   irq =  evt2irq(0x240); break;
+                case 0:   irq =  2; break;
+                case 1:   irq =  2; break;
+                case 2:   irq =  2; break;
+                case 3:   irq =  2; break;
+                case 4:   irq =  2; break;
                 default:  irq = -1; break;
                 }
         }
diff --git a/arch/sh/drivers/pci/fixups-snapgear.c b/arch/sh/drivers/pci/fixups-snapgear.c
index 6e33ba4cd07..4a093c648d1 100644
--- a/arch/sh/drivers/pci/fixups-snapgear.c
+++ b/arch/sh/drivers/pci/fixups-snapgear.c
@@ -16,7 +16,6 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/pci.h>
-#include <linux/sh_intc.h>
 #include "pci-sh4.h"
 
 int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
@@ -25,11 +24,11 @@ int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 
         switch (slot) {
         case 8:  /* the PCI bridge */ break;
-        case 11: irq = evt2irq(0x300); break; /* USB    */
-        case 12: irq = evt2irq(0x360); break; /* PCMCIA */
-        case 13: irq = evt2irq(0x2a0); break; /* eth0   */
-        case 14: irq = evt2irq(0x300); break; /* eth1   */
-        case 15: irq = evt2irq(0x360); break; /* safenet (unused) */
+        case 11: irq = 8;  break; /* USB    */
+        case 12: irq = 11; break; /* PCMCIA */
+        case 13: irq = 5;  break; /* eth0   */
+        case 14: irq = 8;  break; /* eth1   */
+        case 15: irq = 11; break; /* safenet (unused) */
         }
 
         printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
index 16c1e721bf5..0bf296c7879 100644
--- a/arch/sh/drivers/pci/pci-sh5.c
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -107,13 +107,13 @@ static int __init sh5pci_init(void)
         u32 uval;
 
         if (request_irq(IRQ_ERR, pcish5_err_irq,
-                        0, "PCI Error",NULL) < 0) {
+                        IRQF_DISABLED, "PCI Error",NULL) < 0) {
                 printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n");
                 return -EINVAL;
         }
 
         if (request_irq(IRQ_SERR, pcish5_serr_irq,
-                        0, "PCI SERR interrupt", NULL) < 0) {
+                        IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) {
                 printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n");
                 return -EINVAL;
         }
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 5a6dab6e27d..edb7cca1488 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -21,13 +21,6 @@
 #include <asm/mmu.h>
 #include <asm/sizes.h>
 
-#if defined(CONFIG_CPU_BIG_ENDIAN)
-# define PCICR_ENDIANNESS SH4_PCICR_BSWP
-#else
-# define PCICR_ENDIANNESS 0
-#endif
-
-
 static struct resource sh7785_pci_resources[] = {
         {
                 .name   = "PCI IO",
@@ -81,7 +74,7 @@ struct pci_errors {
         { SH4_PCIINT_MLCK,      "master lock error" },
         { SH4_PCIINT_TABT,      "target-target abort" },
         { SH4_PCIINT_TRET,      "target retry time out" },
-        { SH4_PCIINT_MFDE,      "master function disable error" },
+        { SH4_PCIINT_MFDE,      "master function disable erorr" },
         { SH4_PCIINT_PRTY,      "address parity error" },
         { SH4_PCIINT_SERR,      "SERR" },
         { SH4_PCIINT_TWDP,      "data parity error for target write" },
@@ -179,7 +172,7 @@ static int __init sh7780_pci_setup_irqs(struct pci_channel *hose)
                      PCI_STATUS_SIG_TARGET_ABORT | \
                      PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS);
 
-        ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, 0,
+        ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, IRQF_DISABLED,
                           "PCI SERR interrupt", hose);
         if (unlikely(ret)) {
                 printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n");
@@ -261,7 +254,7 @@ static int __init sh7780_pci_init(void)
         __raw_writel(PCIECR_ENBL, PCIECR);
 
         /* Reset */
-        __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST | PCICR_ENDIANNESS,
+        __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST,
                      chan->reg_base + SH4_PCICR);
 
         /*
@@ -297,8 +290,7 @@ static int __init sh7780_pci_init(void)
          * Now throw it in to register initialization mode and
          * start the real work.
          */
-        __raw_writel(SH4_PCICR_PREFIX | PCICR_ENDIANNESS,
-                     chan->reg_base + SH4_PCICR);
+        __raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR);
 
         memphys = __pa(memory_start);
         memsize = roundup_pow_of_two(memory_end - memory_start);
@@ -388,8 +380,7 @@ static int __init sh7780_pci_init(void)
          * Initialization mode complete, release the control register and
          * enable round robin mode to stop device overruns/starvation.
          */
-        __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO |
-                     PCICR_ENDIANNESS,
+        __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO,
                      chan->reg_base + SH4_PCICR);
 
         ret = register_pci_controller(chan);
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 102f5d58b03..194231cb5a7 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -20,7 +20,6 @@
 #include <linux/io.h>
 #include <linux/mutex.h>
 #include <linux/spinlock.h>
-#include <linux/export.h>
 
 unsigned long PCIBIOS_MIN_IO = 0x0000;
 unsigned long PCIBIOS_MIN_MEM = 0;
@@ -32,34 +31,19 @@ static struct pci_channel *hose_head, **hose_tail = &hose_head;
 
 static int pci_initialized;
 
-static void pcibios_scanbus(struct pci_channel *hose)
+static void __devinit pcibios_scanbus(struct pci_channel *hose)
 {
         static int next_busno;
         static int need_domain_info;
-        LIST_HEAD(resources);
-        struct resource *res;
-        resource_size_t offset;
-        int i;
         struct pci_bus *bus;
 
-        for (i = 0; i < hose->nr_resources; i++) {
-                res = hose->resources + i;
-                offset = 0;
-                if (res->flags & IORESOURCE_IO)
-                        offset = hose->io_offset;
-                else if (res->flags & IORESOURCE_MEM)
-                        offset = hose->mem_offset;
-                pci_add_resource_offset(&resources, res, offset);
-        }
-
-        bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
-                                &resources);
+        bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
         hose->bus = bus;
 
         need_domain_info = need_domain_info || hose->index;
         hose->need_domain_info = need_domain_info;
         if (bus) {
-                next_busno = bus->busn_res.end + 1;
+                next_busno = bus->subordinate + 1;
                 /* Don't allow 8-bit bus number overflow inside the hose -
                    reserve some space for bridges. */
                 if (next_busno > 224) {
@@ -70,8 +54,6 @@ static void pcibios_scanbus(struct pci_channel *hose)
                 pci_bus_size_bridges(bus);
                 pci_bus_assign_resources(bus);
                 pci_enable_bridges(bus);
-        } else {
-                pci_free_resource_list(&resources);
         }
 }
 
@@ -82,7 +64,7 @@ static void pcibios_scanbus(struct pci_channel *hose)
 DEFINE_RAW_SPINLOCK(pci_config_lock);
 static DEFINE_MUTEX(pci_scan_mutex);
 
-int register_pci_controller(struct pci_channel *hose)
+int __devinit register_pci_controller(struct pci_channel *hose)
 {
         int i;
 
@@ -152,12 +134,50 @@ static int __init pcibios_init(void)
 }
 subsys_initcall(pcibios_init);
 
+static void pcibios_fixup_device_resources(struct pci_dev *dev,
+        struct pci_bus *bus)
+{
+        /* Update device resources.  */
+        struct pci_channel *hose = bus->sysdata;
+        unsigned long offset = 0;
+        int i;
+
+        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                if (!dev->resource[i].start)
+                        continue;
+                if (dev->resource[i].flags & IORESOURCE_IO)
+                        offset = hose->io_offset;
+                else if (dev->resource[i].flags & IORESOURCE_MEM)
+                        offset = hose->mem_offset;
+
+                dev->resource[i].start += offset;
+                dev->resource[i].end += offset;
+        }
+}
+
 /*
  *  Called after each bus is probed, but before its children
  *  are examined.
  */
-void pcibios_fixup_bus(struct pci_bus *bus)
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
+        struct pci_dev *dev = bus->self;
+        struct list_head *ln;
+        struct pci_channel *hose = bus->sysdata;
+
+        if (!dev) {
+                int i;
+
+                for (i = 0; i < hose->nr_resources; i++)
+                        bus->resource[i] = hose->resources + i;
+        }
+
+        for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
+                dev = pci_dev_b(ln);
+
+                if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
+                        pcibios_fixup_device_resources(dev, bus);
+        }
 }
 
 /*
@@ -187,11 +207,72 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
         return start;
 }
 
+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+                             struct resource *res)
+{
+        struct pci_channel *hose = dev->sysdata;
+        unsigned long offset = 0;
+
+        if (res->flags & IORESOURCE_IO)
+                offset = hose->io_offset;
+        else if (res->flags & IORESOURCE_MEM)
+                offset = hose->mem_offset;
+
+        region->start = res->start - offset;
+        region->end = res->end - offset;
+}
+
+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                             struct pci_bus_region *region)
+{
+        struct pci_channel *hose = dev->sysdata;
+        unsigned long offset = 0;
+
+        if (res->flags & IORESOURCE_IO)
+                offset = hose->io_offset;
+        else if (res->flags & IORESOURCE_MEM)
+                offset = hose->mem_offset;
+
+        res->start = region->start + offset;
+        res->end = region->end + offset;
+}
+
 int pcibios_enable_device(struct pci_dev *dev, int mask)
 {
         return pci_enable_resources(dev, mask);
 }
 
+/*
+ *  If we set up a device for bus mastering, we need to check and set
+ *  the latency timer as it may not be properly set.
+ */
+static unsigned int pcibios_max_latency = 255;
+
+void pcibios_set_master(struct pci_dev *dev)
+{
+        u8 lat;
+        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
+        if (lat < 16)
+                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
+        else if (lat > pcibios_max_latency)
+                lat = pcibios_max_latency;
+        else
+                return;
+        printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
+               pci_name(dev), lat);
+        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
+}
+
+void __init pcibios_update_irq(struct pci_dev *dev, int irq)
+{
+        pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+}
+
+char * __devinit __weak pcibios_setup(char *str)
+{
+        return str;
+}
+
 static void __init
 pcibios_bus_report_status_early(struct pci_channel *hose,
                                 int top_bus, int current_bus,
@@ -295,8 +376,8 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 
 #ifndef CONFIG_GENERIC_IOMAP
 
-void __iomem *__pci_ioport_map(struct pci_dev *dev,
-                               unsigned long port, unsigned int nr)
+static void __iomem *ioport_map_pci(struct pci_dev *dev,
+                                    unsigned long port, unsigned int nr)
 {
         struct pci_channel *chan = dev->sysdata;
 
@@ -311,6 +392,29 @@ void __iomem *__pci_ioport_map(struct pci_dev *dev,
         return (void __iomem *)(chan->io_map_base + port);
 }
 
+void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
+{
+        resource_size_t start = pci_resource_start(dev, bar);
+        resource_size_t len = pci_resource_len(dev, bar);
+        unsigned long flags = pci_resource_flags(dev, bar);
+
+        if (unlikely(!len || !start))
+                return NULL;
+        if (maxlen && len > maxlen)
+                len = maxlen;
+
+        if (flags & IORESOURCE_IO)
+                return ioport_map_pci(dev, start, len);
+        if (flags & IORESOURCE_MEM) {
+                if (flags & IORESOURCE_CACHEABLE)
+                        return ioremap(start, len);
+                return ioremap_nocache(start, len);
+        }
+
+        return NULL;
+}
+EXPORT_SYMBOL(pci_iomap);
+
 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
 {
         iounmap(addr);
@@ -319,5 +423,9 @@ EXPORT_SYMBOL(pci_iounmap);
 
 #endif /* CONFIG_GENERIC_IOMAP */
 
+#ifdef CONFIG_HOTPLUG
+EXPORT_SYMBOL(pcibios_resource_to_bus);
+EXPORT_SYMBOL(pcibios_bus_to_resource);
 EXPORT_SYMBOL(PCIBIOS_MIN_IO);
 EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
+#endif
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index c2c85f6cd73..4df27c4fbf9 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -18,7 +18,6 @@
 #include <linux/slab.h>
 #include <linux/clk.h>
 #include <linux/sh_clk.h>
-#include <linux/sh_intc.h>
 #include "pcie-sh7786.h"
 #include <asm/sizes.h>
 
@@ -132,7 +131,7 @@ static struct clk fixed_pciexclkp = {
         .rate = 100000000,      /* 100 MHz reference clock */
 };
 
-static void sh7786_pci_fixup(struct pci_dev *dev)
+static void __devinit sh7786_pci_fixup(struct pci_dev *dev)
 {
         /*
          * Prevent enumeration of root complex resources.
@@ -239,7 +238,7 @@ static int __init pcie_clk_init(struct sh7786_pcie_port *port)
         clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR);
         clk->enable_bit = BITS_CKE;
 
-        ret = sh_clk_mstp_register(clk, 1);
+        ret = sh_clk_mstp32_register(clk, 1);
         if (unlikely(ret < 0))
                 goto err_phy;
 
@@ -469,7 +468,7 @@ static int __init pcie_init(struct sh7786_pcie_port *port)
 
 int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
-        return evt2irq(0xae0);
+        return 71;
 }
 
 static int __init sh7786_pcie_core_init(void)
diff --git a/arch/sh/drivers/push-switch.c b/arch/sh/drivers/push-switch.c
index 5bfb341cc5c..afc24556572 100644
--- a/arch/sh/drivers/push-switch.c
+++ b/arch/sh/drivers/push-switch.c
@@ -63,7 +63,7 @@ static int switch_drv_probe(struct platform_device *pdev)
         BUG_ON(!psw_info);
 
         ret = request_irq(irq, psw_info->irq_handler,
-                          psw_info->irq_flags,
+                          IRQF_DISABLED | psw_info->irq_flags,
                           psw_info->name ? psw_info->name : DRV_NAME, pdev);
         if (unlikely(ret < 0))
                 goto err;
@@ -107,7 +107,7 @@ static int switch_drv_remove(struct platform_device *pdev)
                 device_remove_file(&pdev->dev, &dev_attr_switch);
 
         platform_set_drvdata(pdev, NULL);
-        flush_work(&psw->work);
+        flush_work_sync(&psw->work);
         del_timer_sync(&psw->debounce);
         free_irq(irq, pdev);
 
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 280bea9e5e2..7beb42322f6 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,36 +1,11 @@
+include include/asm-generic/Kbuild.asm
 
-generic-y += bitsperlong.h
-generic-y += cputime.h
-generic-y += current.h
-generic-y += delay.h
-generic-y += div64.h
-generic-y += emergency-restart.h
-generic-y += errno.h
-generic-y += exec.h
-generic-y += fcntl.h
-generic-y += ioctl.h
-generic-y += ipcbuf.h
-generic-y += irq_regs.h
-generic-y += kvm_para.h
-generic-y += local.h
-generic-y += local64.h
-generic-y += param.h
-generic-y += parport.h
-generic-y += percpu.h
-generic-y += poll.h
-generic-y += mman.h
-generic-y += msgbuf.h
-generic-y += resource.h
-generic-y += scatterlist.h
-generic-y += sembuf.h
-generic-y += serial.h
-generic-y += shmbuf.h
-generic-y += siginfo.h
-generic-y += sizes.h
-generic-y += socket.h
-generic-y += statfs.h
-generic-y += termbits.h
-generic-y += termios.h
-generic-y += trace_clock.h
-generic-y += ucontext.h
-generic-y += xor.h
+header-y += cachectl.h
+header-y += cpu-features.h
+header-y += hw_breakpoint.h
+header-y += posix_types_32.h
+header-y += posix_types_64.h
+header-y += ptrace_32.h
+header-y += ptrace_64.h
+header-y += unistd_32.h
+header-y += unistd_64.h
diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h
index 9f7c56609e5..467d9415a32 100644
--- a/arch/sh/include/asm/atomic-irq.h
+++ b/arch/sh/include/asm/atomic-irq.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_SH_ATOMIC_IRQ_H
 #define __ASM_SH_ATOMIC_IRQ_H
 
-#include <linux/irqflags.h>
-
 /*
  * To get proper branch prediction for the main line, we must branch
  * forward to code at the end of this object's .text section, then
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index f4c1c20bcdf..63a27dbc952 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -9,9 +9,9 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
-#include <asm/cmpxchg.h>
+#include <asm/system.h>
 
-#define ATOMIC_INIT(i)  { (i) }
+#define ATOMIC_INIT(i)  ( (atomic_t) { (i) } )
 
 #define atomic_read(v)          (*(volatile int *)&(v)->counter)
 #define atomic_set(v,i)         ((v)->counter = (i))
diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h
deleted file mode 100644
index 72c103dae30..00000000000
--- a/arch/sh/include/asm/barrier.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (C) 1999, 2000  Niibe Yutaka  &  Kaz Kojima
- * Copyright (C) 2002 Paul Mundt
- */
-#ifndef __ASM_SH_BARRIER_H
-#define __ASM_SH_BARRIER_H
-
-#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
-#include <asm/cache_insns.h>
-#endif
-
-/*
- * A brief note on ctrl_barrier(), the control register write barrier.
- *
- * Legacy SH cores typically require a sequence of 8 nops after
- * modification of a control register in order for the changes to take
- * effect. On newer cores (like the sh4a and sh5) this is accomplished
- * with icbi.
- *
- * Also note that on sh4a in the icbi case we can forego a synco for the
- * write barrier, as it's not necessary for control registers.
- *
- * Historically we have only done this type of barrier for the MMUCR, but
- * it's also necessary for the CCR, so we make it generic here instead.
- */
-#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
-#define mb()            __asm__ __volatile__ ("synco": : :"memory")
-#define rmb()           mb()
-#define wmb()           __asm__ __volatile__ ("synco": : :"memory")
-#define ctrl_barrier()  __icbi(PAGE_OFFSET)
-#define read_barrier_depends()  do { } while(0)
-#else
-#define mb()            __asm__ __volatile__ ("": : :"memory")
-#define rmb()           mb()
-#define wmb()           __asm__ __volatile__ ("": : :"memory")
-#define ctrl_barrier()  __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop")
-#define read_barrier_depends()  do { } while(0)
-#endif
-
-#ifdef CONFIG_SMP
-#define smp_mb()        mb()
-#define smp_rmb()       rmb()
-#define smp_wmb()       wmb()
-#define smp_read_barrier_depends()      read_barrier_depends()
-#else
-#define smp_mb()        barrier()
-#define smp_rmb()       barrier()
-#define smp_wmb()       barrier()
-#define smp_read_barrier_depends()      do { } while(0)
-#endif
-
-#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
-
-#endif /* __ASM_SH_BARRIER_H */
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index ea8706d94f0..90fa3e48b4d 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -7,6 +7,7 @@
 #error only <linux/bitops.h> can be included directly
 #endif
 
+#include <asm/system.h>
 /* For __swab32 */
 #include <asm/byteorder.h>
 
diff --git a/arch/sh/include/asm/bl_bit.h b/arch/sh/include/asm/bl_bit.h
deleted file mode 100644
index 06e4163c674..00000000000
--- a/arch/sh/include/asm/bl_bit.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef __ASM_SH_BL_BIT_H
-#define __ASM_SH_BL_BIT_H
-
-#ifdef CONFIG_SUPERH32
-# include <asm/bl_bit_32.h>
-#else
-# include <asm/bl_bit_64.h>
-#endif
-
-#endif /* __ASM_SH_BL_BIT_H */
diff --git a/arch/sh/include/asm/bl_bit_32.h b/arch/sh/include/asm/bl_bit_32.h
deleted file mode 100644
index fd21eee6214..00000000000
--- a/arch/sh/include/asm/bl_bit_32.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef __ASM_SH_BL_BIT_32_H
-#define __ASM_SH_BL_BIT_32_H
-
-static inline void set_bl_bit(void)
-{
-        unsigned long __dummy0, __dummy1;
-
-        __asm__ __volatile__ (
-                "stc    sr, %0\n\t"
-                "or     %2, %0\n\t"
-                "and    %3, %0\n\t"
-                "ldc    %0, sr\n\t"
-                : "=&r" (__dummy0), "=r" (__dummy1)
-                : "r" (0x10000000), "r" (0xffffff0f)
-                : "memory"
-        );
-}
-
-static inline void clear_bl_bit(void)
-{
-        unsigned long __dummy0, __dummy1;
-
-        __asm__ __volatile__ (
-                "stc    sr, %0\n\t"
-                "and    %2, %0\n\t"
-                "ldc    %0, sr\n\t"
-                : "=&r" (__dummy0), "=r" (__dummy1)
-                : "1" (~0x10000000)
-                : "memory"
-        );
-}
-
-#endif /* __ASM_SH_BL_BIT_32_H */
diff --git a/arch/sh/include/asm/bl_bit_64.h b/arch/sh/include/asm/bl_bit_64.h
deleted file mode 100644
index 6cc8711af43..00000000000
--- a/arch/sh/include/asm/bl_bit_64.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003  Paul Mundt
- * Copyright (C) 2004  Richard Curnow
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_SH_BL_BIT_64_H
-#define __ASM_SH_BL_BIT_64_H
-
-#include <asm/processor.h>
-
-#define SR_BL_LL        0x0000000010000000LL
-
-static inline void set_bl_bit(void)
-{
-        unsigned long long __dummy0, __dummy1 = SR_BL_LL;
-
-        __asm__ __volatile__("getcon    " __SR ", %0\n\t"
-                             "or        %0, %1, %0\n\t"
-                             "putcon    %0, " __SR "\n\t"
-                             : "=&r" (__dummy0)
-                             : "r" (__dummy1));
-
-}
-
-static inline void clear_bl_bit(void)
-{
-        unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
-
-        __asm__ __volatile__("getcon    " __SR ", %0\n\t"
-                             "and       %0, %1, %0\n\t"
-                             "putcon    %0, " __SR "\n\t"
-                             : "=&r" (__dummy0)
-                             : "r" (__dummy1));
-}
-
-#endif /* __ASM_SH_BL_BIT_64_H */
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h
index dcf27807542..6323f864d11 100644
--- a/arch/sh/include/asm/bug.h
+++ b/arch/sh/include/asm/bug.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_SH_BUG_H
 #define __ASM_SH_BUG_H
 
-#include <linux/linkage.h>
-
 #define TRAPA_BUG_OPCODE        0xc33e  /* trapa #0x3e */
 #define BUGFLAG_UNWINDER        (1 << 1)
 
@@ -109,11 +107,4 @@ do {							\
 
 #include <asm-generic/bug.h>
 
-struct pt_regs;
-
-/* arch/sh/kernel/traps.c */
-extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
-extern void die_if_kernel(const char *str, struct pt_regs *regs, long err);
-extern void die_if_no_fixup(const char *str, struct pt_regs *regs, long err);
-
 #endif /* __ASM_SH_BUG_H */
diff --git a/arch/sh/include/asm/cache_insns.h b/arch/sh/include/asm/cache_insns.h
deleted file mode 100644
index 355cb06b7a3..00000000000
--- a/arch/sh/include/asm/cache_insns.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef __ASM_SH_CACHE_INSNS_H
-#define __ASM_SH_CACHE_INSNS_H
-
-
-#ifdef CONFIG_SUPERH32
-# include <asm/cache_insns_32.h>
-#else
-# include <asm/cache_insns_64.h>
-#endif
-
-#endif /* __ASM_SH_CACHE_INSNS_H */
diff --git a/arch/sh/include/asm/cache_insns_32.h b/arch/sh/include/asm/cache_insns_32.h
deleted file mode 100644
index b92fe541609..00000000000
--- a/arch/sh/include/asm/cache_insns_32.h
+++ /dev/null
@@ -1,21 +0,0 @@
-#ifndef __ASM_SH_CACHE_INSNS_32_H
-#define __ASM_SH_CACHE_INSNS_32_H
-
-#include <linux/types.h>
-
-#if defined(CONFIG_CPU_SH4A)
-#define __icbi(addr)    __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
-#else
-#define __icbi(addr)    mb()
-#endif
-
-#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
-#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
-#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
-
-static inline reg_size_t register_align(void *val)
-{
-        return (unsigned long)(signed long)val;
-}
-
-#endif /* __ASM_SH_CACHE_INSNS_32_H */
diff --git a/arch/sh/include/asm/cache_insns_64.h b/arch/sh/include/asm/cache_insns_64.h
deleted file mode 100644
index 70b6357eaf1..00000000000
--- a/arch/sh/include/asm/cache_insns_64.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003  Paul Mundt
- * Copyright (C) 2004  Richard Curnow
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_SH_CACHE_INSNS_64_H
-#define __ASM_SH_CACHE_INSNS_64_H
-
-#define __icbi(addr)    __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
-#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
-#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
-#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
-
-static inline reg_size_t register_align(void *val)
-{
-        return (unsigned long long)(signed long long)(signed long)val;
-}
-
-#endif /* __ASM_SH_CACHE_INSNS_64_H */
diff --git a/arch/sh/include/asm/checksum.h b/arch/sh/include/asm/checksum.h
index 34ae2620452..fc26d1f4b59 100644
--- a/arch/sh/include/asm/checksum.h
+++ b/arch/sh/include/asm/checksum.h
@@ -1,5 +1,5 @@
 #ifdef CONFIG_SUPERH32
-# include <asm/checksum_32.h>
+# include "checksum_32.h"
 #else
 # include <asm-generic/checksum.h>
 #endif
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 0390a07e7e3..803d4c7f09d 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -4,7 +4,7 @@
 #include <linux/sh_clk.h>
 
 /* Should be defined by processor-specific code */
-void __deprecated arch_init_clk_ops(struct sh_clk_ops **, int type);
+void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
 int __init arch_clk_init(void);
 
 /* arch/sh/kernel/cpu/clock-cpg.c */
diff --git a/arch/sh/include/asm/cmpxchg-irq.h b/arch/sh/include/asm/cmpxchg-irq.h
index bd11f630414..43049ec0554 100644
--- a/arch/sh/include/asm/cmpxchg-irq.h
+++ b/arch/sh/include/asm/cmpxchg-irq.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_SH_CMPXCHG_IRQ_H
 #define __ASM_SH_CMPXCHG_IRQ_H
 
-#include <linux/irqflags.h>
-
 static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
 {
         unsigned long flags, retval;
diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h
deleted file mode 100644
index f6bd1406b89..00000000000
--- a/arch/sh/include/asm/cmpxchg.h
+++ /dev/null
@@ -1,70 +0,0 @@
-#ifndef __ASM_SH_CMPXCHG_H
-#define __ASM_SH_CMPXCHG_H
-
-/*
- * Atomic operations that C can't guarantee us.  Useful for
- * resource counting etc..
- */
-
-#include <linux/compiler.h>
-#include <linux/types.h>
-
-#if defined(CONFIG_GUSA_RB)
-#include <asm/cmpxchg-grb.h>
-#elif defined(CONFIG_CPU_SH4A)
-#include <asm/cmpxchg-llsc.h>
-#else
-#include <asm/cmpxchg-irq.h>
-#endif
-
-extern void __xchg_called_with_bad_pointer(void);
-
-#define __xchg(ptr, x, size)                            \
-({                                                      \
-        unsigned long __xchg__res;                      \
-        volatile void *__xchg_ptr = (ptr);              \
-        switch (size) {                                 \
-        case 4:                                         \
-                __xchg__res = xchg_u32(__xchg_ptr, x);  \
-                break;                                  \
-        case 1:                                         \
-                __xchg__res = xchg_u8(__xchg_ptr, x);   \
-                break;                                  \
-        default:                                        \
-                __xchg_called_with_bad_pointer();       \
-                __xchg__res = x;                        \
-                break;                                  \
-        }                                               \
-                                                        \
-        __xchg__res;                                    \
-})
-
-#define xchg(ptr,x)     \
-        ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr))))
-
-/* This function doesn't exist, so you'll get a linker error
- * if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
-                unsigned long new, int size)
-{
-        switch (size) {
-        case 4:
-                return __cmpxchg_u32(ptr, old, new);
-        }
-        __cmpxchg_called_with_bad_pointer();
-        return old;
-}
-
-#define cmpxchg(ptr,o,n)                                                 \
-  ({                                                                     \
-     __typeof__(*(ptr)) _o_ = (o);                                       \
-     __typeof__(*(ptr)) _n_ = (n);                                       \
-     (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,           \
-                                    (unsigned long)_n_, sizeof(*(ptr))); \
-  })
-
-#endif /* __ASM_SH_CMPXCHG_H */
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h
index 071bcb4d4bf..b16debfe8c1 100644
--- a/arch/sh/include/asm/device.h
+++ b/arch/sh/include/asm/device.h
@@ -3,10 +3,9 @@
  *
  * This file is released under the GPLv2
  */
-#ifndef __ASM_SH_DEVICE_H
-#define __ASM_SH_DEVICE_H
 
-#include <asm-generic/device.h>
+struct dev_archdata {
+};
 
 struct platform_device;
 /* allocate contiguous memory chunk and fill in struct resource */
@@ -15,4 +14,15 @@ int platform_resource_setup_memory(struct platform_device *pdev,
 
 void plat_early_device_setup(void);
 
-#endif /* __ASM_SH_DEVICE_H */
+#define PDEV_ARCHDATA_FLAG_INIT 0
+#define PDEV_ARCHDATA_FLAG_IDLE 1
+#define PDEV_ARCHDATA_FLAG_SUSP 2
+
+struct pdev_archdata {
+        int hwblk_id;
+#ifdef CONFIG_PM_RUNTIME
+        unsigned long flags;
+        struct list_head entry;
+        struct mutex mutex;
+#endif
+};
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index b437f2c780b..1a73c3e759a 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -46,38 +46,31 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
         struct dma_map_ops *ops = get_dma_ops(dev);
 
-        debug_dma_mapping_error(dev, dma_addr);
         if (ops->mapping_error)
                 return ops->mapping_error(dev, dma_addr);
 
         return dma_addr == 0;
 }
 
-#define dma_alloc_coherent(d,s,h,f)     dma_alloc_attrs(d,s,h,f,NULL)
-
-static inline void *dma_alloc_attrs(struct device *dev, size_t size,
-                                    dma_addr_t *dma_handle, gfp_t gfp,
-                                    struct dma_attrs *attrs)
+static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t gfp)
 {
         struct dma_map_ops *ops = get_dma_ops(dev);
         void *memory;
 
         if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
                 return memory;
-        if (!ops->alloc)
+        if (!ops->alloc_coherent)
                 return NULL;
 
-        memory = ops->alloc(dev, size, dma_handle, gfp, attrs);
+        memory = ops->alloc_coherent(dev, size, dma_handle, gfp);
         debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
 
         return memory;
 }
 
-#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
-
-static inline void dma_free_attrs(struct device *dev, size_t size,
-                                  void *vaddr, dma_addr_t dma_handle,
-                                  struct dma_attrs *attrs)
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *vaddr, dma_addr_t dma_handle)
 {
         struct dma_map_ops *ops = get_dma_ops(dev);
 
@@ -85,16 +78,14 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
                 return;
 
         debug_dma_free_coherent(dev, size, vaddr, dma_handle);
-        if (ops->free)
-                ops->free(dev, size, vaddr, dma_handle, attrs);
+        if (ops->free_coherent)
+                ops->free_coherent(dev, size, vaddr, dma_handle);
 }
 
 /* arch/sh/mm/consistent.c */
 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
-                                        dma_addr_t *dma_addr, gfp_t flag,
-                                        struct dma_attrs *attrs);
+                                        dma_addr_t *dma_addr, gfp_t flag);
 extern void dma_generic_free_coherent(struct device *dev, size_t size,
-                                      void *vaddr, dma_addr_t dma_handle,
-                                      struct dma_attrs *attrs);
+                                      void *vaddr, dma_addr_t dma_handle);
 
 #endif /* __ASM_SH_DMA_MAPPING_H */
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h
index fb6e4f7b00a..07373a07409 100644
--- a/arch/sh/include/asm/dma.h
+++ b/arch/sh/include/asm/dma.h
@@ -14,9 +14,18 @@
 #include <linux/spinlock.h>
 #include <linux/wait.h>
 #include <linux/sched.h>
-#include <linux/device.h>
+#include <linux/sysdev.h>
+#include <cpu/dma.h>
 #include <asm-generic/dma.h>
 
+#ifdef CONFIG_NR_DMA_CHANNELS
+#  define MAX_DMA_CHANNELS      (CONFIG_NR_DMA_CHANNELS)
+#elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS)
+#  define MAX_DMA_CHANNELS      (CONFIG_NR_ONCHIP_DMA_CHANNELS)
+#else
+#  define MAX_DMA_CHANNELS      0
+#endif
+
 /*
  * Read and write modes can mean drastically different things depending on the
  * channel configuration. Consult your DMAC documentation and module
@@ -82,7 +91,7 @@ struct dma_channel {
 
         wait_queue_head_t wait_queue;
 
-        struct device dev;
+        struct sys_device dev;
         void *priv_data;
 };
 
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index 37924afa8d8..f38112be67d 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -183,8 +183,7 @@ do {									\
 } while (0)
 #endif
 
-#define SET_PERSONALITY(ex) \
-        set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK)))
+#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
 
 #ifdef CONFIG_VSYSCALL
 /* vDSO has arch_setup_additional_pages */
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index cbe0186b679..bd7e79a1265 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -96,7 +96,7 @@ extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);
 #ifdef CONFIG_SUPERH32
 #define FIXADDR_TOP     (P4SEG - PAGE_SIZE)
 #else
-#define FIXADDR_TOP     ((unsigned long)(-PAGE_SIZE))
+#define FIXADDR_TOP     (0xff000000 - PAGE_SIZE)
 #endif
 #define FIXADDR_SIZE    (__end_of_fixed_addresses << PAGE_SHIFT)
 #define FIXADDR_START   (FIXADDR_TOP - FIXADDR_SIZE)
diff --git a/arch/sh/include/asm/futex-irq.h b/arch/sh/include/asm/futex-irq.h
index 63d33129ea2..6cb9f193a95 100644
--- a/arch/sh/include/asm/futex-irq.h
+++ b/arch/sh/include/asm/futex-irq.h
@@ -1,6 +1,7 @@
 #ifndef __ASM_SH_FUTEX_IRQ_H
 #define __ASM_SH_FUTEX_IRQ_H
 
+#include <asm/system.h>
 
 static inline int atomic_futex_op_xchg_set(int oparg, u32 __user *uaddr,
                                            int *oldval)
diff --git a/arch/sh/include/asm/hugetlb.h b/arch/sh/include/asm/hugetlb.h
index b3808c7d67b..967068fb79a 100644
--- a/arch/sh/include/asm/hugetlb.h
+++ b/arch/sh/include/asm/hugetlb.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_SH_HUGETLB_H
 #define _ASM_SH_HUGETLB_H
 
-#include <asm/cacheflush.h>
 #include <asm/page.h>
 
 
@@ -90,9 +89,4 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
-static inline void arch_clear_hugepage_flags(struct page *page)
-{
-        clear_bit(PG_dcache_clean, &page->flags);
-}
-
 #endif /* _ASM_SH_HUGETLB_H */
diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h
index ec9ad593c3d..89890f61a7b 100644
--- a/arch/sh/include/asm/hw_breakpoint.h
+++ b/arch/sh/include/asm/hw_breakpoint.h
@@ -1,8 +1,7 @@
 #ifndef __ASM_SH_HW_BREAKPOINT_H
 #define __ASM_SH_HW_BREAKPOINT_H
 
-#include <uapi/asm/hw_breakpoint.h>
-
+#ifdef __KERNEL__
 #define __ARCH_HW_BREAKPOINT_H
 
 #include <linux/kdebug.h>
@@ -67,4 +66,5 @@ extern int register_sh_ubc(struct sh_ubc *);
 
 extern struct pmu perf_ops_bp;
 
+#endif /* __KERNEL__ */
 #endif /* __ASM_SH_HW_BREAKPOINT_H */
diff --git a/arch/sh/include/asm/i2c-sh7760.h b/arch/sh/include/asm/i2c-sh7760.h
index 69fee1239b0..24182116711 100644
--- a/arch/sh/include/asm/i2c-sh7760.h
+++ b/arch/sh/include/asm/i2c-sh7760.h
@@ -9,9 +9,11 @@
 
 #define SH7760_I2C0_MMIO        0xFE140000
 #define SH7760_I2C0_MMIOEND     0xFE14003B
+#define SH7760_I2C0_IRQ         62
 
 #define SH7760_I2C1_MMIO        0xFE150000
 #define SH7760_I2C1_MMIOEND     0xFE15003B
+#define SH7760_I2C1_IRQ         63
 
 struct sh7760_i2c_platdata {
         unsigned int speed_khz;
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 629db2ad791..28c5aa58bb4 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -14,6 +14,7 @@
  */
 #include <linux/errno.h>
 #include <asm/cache.h>
+#include <asm/system.h>
 #include <asm/addrspace.h>
 #include <asm/machvec.h>
 #include <asm/pgtable.h>
@@ -23,7 +24,6 @@
 #define __IO_PREFIX     generic
 #include <asm/io_generic.h>
 #include <asm/io_trapped.h>
-#include <mach/mangle-port.h>
 
 #define __raw_writeb(v,a)       (__chk_io_ptr(a), *(volatile u8  __force *)(a) = (v))
 #define __raw_writew(v,a)       (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
@@ -35,15 +35,21 @@
 #define __raw_readl(a)          (__chk_io_ptr(a), *(volatile u32 __force *)(a))
 #define __raw_readq(a)          (__chk_io_ptr(a), *(volatile u64 __force *)(a))
 
-#define readb_relaxed(c)        ({ u8  __v = ioswabb(__raw_readb(c)); __v; })
-#define readw_relaxed(c)        ({ u16 __v = ioswabw(__raw_readw(c)); __v; })
-#define readl_relaxed(c)        ({ u32 __v = ioswabl(__raw_readl(c)); __v; })
-#define readq_relaxed(c)        ({ u64 __v = ioswabq(__raw_readq(c)); __v; })
-
-#define writeb_relaxed(v,c)     ((void)__raw_writeb((__force  u8)ioswabb(v),c))
-#define writew_relaxed(v,c)     ((void)__raw_writew((__force u16)ioswabw(v),c))
-#define writel_relaxed(v,c)     ((void)__raw_writel((__force u32)ioswabl(v),c))
-#define writeq_relaxed(v,c)     ((void)__raw_writeq((__force u64)ioswabq(v),c))
+#define readb_relaxed(c)        ({ u8  __v = __raw_readb(c); __v; })
+#define readw_relaxed(c)        ({ u16 __v = le16_to_cpu((__force __le16) \
+                                        __raw_readw(c)); __v; })
+#define readl_relaxed(c)        ({ u32 __v = le32_to_cpu((__force __le32) \
+                                        __raw_readl(c)); __v; })
+#define readq_relaxed(c)        ({ u64 __v = le64_to_cpu((__force __le64) \
+                                        __raw_readq(c)); __v; })
+
+#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,c))
+#define writew_relaxed(v,c)     ((void)__raw_writew((__force u16) \
+                                        cpu_to_le16(v),c))
+#define writel_relaxed(v,c)     ((void)__raw_writel((__force u32) \
+                                        cpu_to_le32(v),c))
+#define writeq_relaxed(v,c)     ((void)__raw_writeq((__force u64) \
+                                        cpu_to_le64(v),c))
 
 #define readb(a)                ({ u8  r_ = readb_relaxed(a); rmb(); r_; })
 #define readw(a)                ({ u16 r_ = readw_relaxed(a); rmb(); r_; })
@@ -134,7 +140,7 @@ __BUILD_MEMORY_STRING(__raw_, q, u64)
  * load/store instructions. sh_io_port_base is the virtual address to
  * which all ports are being mapped.
  */
-extern unsigned long sh_io_port_base;
+extern const unsigned long sh_io_port_base;
 
 static inline void __set_io_port_base(unsigned long pbase)
 {
@@ -218,13 +224,8 @@ __BUILD_IOPORT_STRING(w, u16)
 __BUILD_IOPORT_STRING(l, u32)
 __BUILD_IOPORT_STRING(q, u64)
 
-#else /* !CONFIG_HAS_IOPORT */
-
-#include <asm/io_noioport.h>
-
 #endif
 
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /* synco on SH-4A, otherwise a nop */
@@ -382,7 +383,7 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
 #define xlate_dev_kmem_ptr(p)   p
 
 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
-int valid_phys_addr_range(phys_addr_t addr, size_t size);
+int valid_phys_addr_range(unsigned long addr, size_t size);
 int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
 
 #endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/io_noioport.h b/arch/sh/include/asm/io_noioport.h
deleted file mode 100644
index 4d48f1436a6..00000000000
--- a/arch/sh/include/asm/io_noioport.h
+++ /dev/null
@@ -1,52 +0,0 @@
-#ifndef __ASM_SH_IO_NOIOPORT_H
-#define __ASM_SH_IO_NOIOPORT_H
-
-static inline u8 inb(unsigned long addr)
-{
-        BUG();
-        return -1;
-}
-
-static inline u16 inw(unsigned long addr)
-{
-        BUG();
-        return -1;
-}
-
-static inline u32 inl(unsigned long addr)
-{
-        BUG();
-        return -1;
-}
-
-static inline void outb(unsigned char x, unsigned long port)
-{
-        BUG();
-}
-
-static inline void outw(unsigned short x, unsigned long port)
-{
-        BUG();
-}
-
-static inline void outl(unsigned int x, unsigned long port)
-{
-        BUG();
-}
-
-#define inb_p(addr)     inb(addr)
-#define inw_p(addr)     inw(addr)
-#define inl_p(addr)     inl(addr)
-#define outb_p(x, addr) outb((x), (addr))
-#define outw_p(x, addr) outw((x), (addr))
-#define outl_p(x, addr) outl((x), (addr))
-
-#define insb(a, b, c)   BUG()
-#define insw(a, b, c)   BUG()
-#define insl(a, b, c)   BUG()
-
-#define outsb(a, b, c)  BUG()
-#define outsw(a, b, c)  BUG()
-#define outsl(a, b, c)  BUG()
-
-#endif /* __ASM_SH_IO_NOIOPORT_H */
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 0e4f532e473..45d08b6a5ef 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -5,15 +5,12 @@
 #include <asm/machvec.h>
 
 /*
- * Only legacy non-sparseirq platforms have to set a reasonably sane
- * value here. sparseirq platforms allocate their irq_descs on the fly,
- * so will expand automatically based on the number of registered IRQs.
+ * A sane default based on a reasonable vector table size, platforms are
+ * advised to cap this at the hard limit that they're interested in
+ * through the machvec.
  */
-#ifdef CONFIG_SPARSE_IRQ
-# define NR_IRQS                8
-#else
-# define NR_IRQS                512
-#endif
+#define NR_IRQS                 512
+#define NR_IRQS_LEGACY          8       /* Legacy external IRQ0-7 */
 
 /*
  * This is a special IRQ number for indicating that no IRQ has been
@@ -24,6 +21,17 @@
 #define NO_IRQ_IGNORE           ((unsigned int)-1)
 
 /*
+ * Convert back and forth between INTEVT and IRQ values.
+ */
+#ifdef CONFIG_CPU_HAS_INTEVT
+#define evt2irq(evt)            (((evt) >> 5) - 16)
+#define irq2evt(irq)            (((irq) + 16) << 5)
+#else
+#define evt2irq(evt)            (evt)
+#define irq2evt(irq)            (irq)
+#endif
+
+/*
  * Simple Mask Register Support
  */
 extern void make_maskreg_irq(unsigned int irq);
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h
index 8d6a831e7ba..5f6d2e9ccb7 100644
--- a/arch/sh/include/asm/kdebug.h
+++ b/arch/sh/include/asm/kdebug.h
@@ -10,8 +10,4 @@ enum die_val {
         DIE_SSTEP,
 };
 
-/* arch/sh/kernel/dumpstack.c */
-extern void printk_address(unsigned long address, int reliable);
-extern void dump_mem(const char *str, unsigned long bottom, unsigned long top);
-
 #endif /* __ASM_SH_KDEBUG_H */
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h
index 9e7d2d1b03e..f3613952d1a 100644
--- a/arch/sh/include/asm/kgdb.h
+++ b/arch/sh/include/asm/kgdb.h
@@ -4,6 +4,18 @@
 #include <asm/cacheflush.h>
 #include <asm/ptrace.h>
 
+/* Same as pt_regs but has vbr in place of syscall_nr */
+struct kgdb_regs {
+        unsigned long regs[16];
+        unsigned long pc;
+        unsigned long pr;
+        unsigned long sr;
+        unsigned long gbr;
+        unsigned long mach;
+        unsigned long macl;
+        unsigned long vbr;
+};
+
 enum regnames {
         GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7,
         GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15,
@@ -11,27 +23,17 @@ enum regnames {
         GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR,
 };
 
-#define _GP_REGS        16
-#define _EXTRA_REGS     7
-#define GDB_SIZEOF_REG  sizeof(u32)
-
-#define DBG_MAX_REG_NUM (_GP_REGS + _EXTRA_REGS)
-#define NUMREGBYTES     (DBG_MAX_REG_NUM * sizeof(GDB_SIZEOF_REG))
+#define NUMREGBYTES    ((GDB_VBR + 1) * 4)
 
 static inline void arch_kgdb_breakpoint(void)
 {
         __asm__ __volatile__ ("trapa #0x3c\n");
 }
 
-#define BREAK_INSTR_SIZE        2
-#define BUFMAX                  2048
-
-#ifdef CONFIG_SMP
-# define CACHE_FLUSH_IS_SAFE    0
-#else
-# define CACHE_FLUSH_IS_SAFE    1
-#endif
+#define BUFMAX                 2048
 
+#define CACHE_FLUSH_IS_SAFE     1
+#define BREAK_INSTR_SIZE        2
 #define GDB_ADJUSTS_BREAK_OFFSET
 
 #endif /* __ASM_SH_KGDB_H */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index eb9c20d971d..57c5c3d0f39 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -17,6 +17,7 @@
 struct sh_machine_vector {
         void (*mv_setup)(char **cmdline_p);
         const char *mv_name;
+        int mv_nr_irqs;
 
         int (*mv_irq_demux)(int irq);
         void (*mv_init_irq)(void);
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 21c5088788d..384c7471a37 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -46,9 +46,9 @@
 #define MMU_VPN_MASK    0xfffff000
 
 #if defined(CONFIG_SUPERH32)
-#include <asm/mmu_context_32.h>
+#include "mmu_context_32.h"
 #else
-#include <asm/mmu_context_64.h>
+#include "mmu_context_64.h"
 #endif
 
 /*
diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h
index 81300d8b544..b7927de86f9 100644
--- a/arch/sh/include/asm/module.h
+++ b/arch/sh/include/asm/module.h
@@ -1,13 +1,21 @@
 #ifndef _ASM_SH_MODULE_H
 #define _ASM_SH_MODULE_H
 
-#include <asm-generic/module.h>
-
-#ifdef CONFIG_DWARF_UNWINDER
 struct mod_arch_specific {
+#ifdef CONFIG_DWARF_UNWINDER
         struct list_head fde_list;
         struct list_head cie_list;
+#endif
 };
+
+#ifdef CONFIG_64BIT
+#define Elf_Shdr Elf64_Shdr
+#define Elf_Sym Elf64_Sym
+#define Elf_Ehdr Elf64_Ehdr
+#else
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Ehdr Elf32_Ehdr
 #endif
 
 #ifdef CONFIG_CPU_LITTLE_ENDIAN
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 15d970328f7..abcc4dcc2d9 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -113,16 +113,6 @@ typedef struct page *pgtable_t;
 #define __MEMORY_SIZE           CONFIG_MEMORY_SIZE
 
 /*
- * PHYSICAL_OFFSET is the offset in physical memory where the base
- * of the kernel is loaded.
- */
-#ifdef CONFIG_PHYSICAL_START
-#define PHYSICAL_OFFSET (CONFIG_PHYSICAL_START - __MEMORY_START)
-#else
-#define PHYSICAL_OFFSET 0
-#endif
-
-/*
  * PAGE_OFFSET is the virtual address of the start of kernel address
  * space.
  */
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index bff96c2e7d2..cb21e2399dc 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -114,6 +114,12 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 /* Board-specific fixup routines. */
 int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
+        struct pci_bus_region *region, struct resource *res);
+
+extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                                    struct pci_bus_region *region);
+
 #define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
 
 static inline int pci_proc_domain(struct pci_bus *bus)
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index dda8c82601b..42cb9dd5216 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -87,6 +87,9 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
 #define pte_unmap(pte)          do { } while (0)
 
 #ifndef __ASSEMBLY__
+#define IOBASE_VADDR    0xff000000
+#define IOBASE_END      0xffffffff
+
 /*
  * PTEL coherent flags.
  * See Chapter 17 ST50 CPU Core Volume 1, Architecture.
diff --git a/arch/sh/include/asm/posix_types.h b/arch/sh/include/asm/posix_types.h
index 1aa781079b1..4eeb723aee7 100644
--- a/arch/sh/include/asm/posix_types.h
+++ b/arch/sh/include/asm/posix_types.h
@@ -1,5 +1,13 @@
+#ifdef __KERNEL__
 # ifdef CONFIG_SUPERH32
-#  include <asm/posix_types_32.h>
+#  include "posix_types_32.h"
 # else
-#  include <asm/posix_types_64.h>
+#  include "posix_types_64.h"
 # endif
+#else
+# ifdef __SH5__
+#  include "posix_types_64.h"
+# else
+#  include "posix_types_32.h"
+# endif
+#endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 5448f9bbf4a..9c7bdfcaebb 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -18,8 +18,7 @@ enum cpu_type {
         CPU_SH7619,
 
         /* SH-2A types */
-        CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269,
-        CPU_MXG,
+        CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
 
         /* SH-3 types */
         CPU_SH7705, CPU_SH7706, CPU_SH7707,
@@ -33,7 +32,7 @@ enum cpu_type {
 
         /* SH-4A types */
         CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
-        CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SH7734, CPU_SHX3,
+        CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
 
         /* SH4AL-DSP types */
         CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372,
@@ -86,6 +85,10 @@ struct sh_cpuinfo {
         struct tlb_info itlb;
         struct tlb_info dtlb;
 
+#ifdef CONFIG_SMP
+        struct task_struct *idle;
+#endif
+
         unsigned int phys_bits;
         unsigned long flags;
 } __attribute__ ((aligned(L1_CACHE_BYTES)));
@@ -98,9 +101,6 @@ extern struct sh_cpuinfo cpu_data[];
 #define cpu_sleep()     __asm__ __volatile__ ("sleep" : : : "memory")
 #define cpu_relax()     barrier()
 
-void default_idle(void);
-void stop_this_cpu(void *);
-
 /* Forward decl */
 struct seq_operations;
 struct task_struct;
@@ -161,23 +161,12 @@ int vsyscall_init(void);
 #define vsyscall_init() do { } while (0)
 #endif
 
-/*
- * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks.
- */
-#ifdef CONFIG_CPU_SH2A
-extern unsigned int instruction_size(unsigned int insn);
-#elif defined(CONFIG_SUPERH32)
-#define instruction_size(insn)  (2)
-#else
-#define instruction_size(insn)  (4)
-#endif
-
 #endif /* __ASSEMBLY__ */
 
 #ifdef CONFIG_SUPERH32
-# include <asm/processor_32.h>
+# include "processor_32.h"
 #else
-# include <asm/processor_64.h>
+# include "processor_64.h"
 #endif
 
 #endif /* __ASM_SH_PROCESSOR_H */
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index b1320d55ca3..900f8d72ffe 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -126,6 +126,14 @@ extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned lo
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
 
+/* Prepare to copy thread state - unlazy all lazy status */
+void prepare_to_copy(struct task_struct *tsk);
+
+/*
+ * create a kernel thread without removing it from tasklists
+ */
+extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
 /* Copy and release all segment info associated with a VM */
 #define copy_segments(p, mm)    do { } while(0)
 #define release_segments(mm)    do { } while(0)
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 1ee8946f095..e25c4c7d6b6 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -121,6 +121,7 @@ struct thread_struct {
            NULL for a kernel thread. */
         struct pt_regs *uregs;
 
+        unsigned long trap_no, error_code;
         unsigned long address;
         /* Hardware debugging registers may come here */
 
@@ -137,6 +138,8 @@ struct thread_struct {
         .pc             = 0,                    \
         .kregs          = &fake_swapper_regs,   \
         .uregs          = NULL,                 \
+        .trap_no        = 0,                    \
+        .error_code     = 0,                    \
         .address        = 0,                    \
         .flags          = 0,                    \
 }
@@ -159,11 +162,17 @@ struct mm_struct;
 
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
+/*
+ * create a kernel thread without removing it from tasklists
+ */
+extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
 
 /* Copy and release all segment info associated with a VM */
 #define copy_segments(p, mm)    do { } while (0)
 #define release_segments(mm)    do { } while (0)
 #define forget_segments()       do { } while (0)
+#define prepare_to_copy(tsk)    do { } while (0)
 /*
  * FPU lazy state save handling.
  */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 2506c7db76b..2d3679b2447 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -1,16 +1,43 @@
+#ifndef __ASM_SH_PTRACE_H
+#define __ASM_SH_PTRACE_H
+
 /*
  * Copyright (C) 1999, 2000  Niibe Yutaka
  */
-#ifndef __ASM_SH_PTRACE_H
-#define __ASM_SH_PTRACE_H
 
+#define PTRACE_GETREGS          12      /* General registers */
+#define PTRACE_SETREGS          13
+
+#define PTRACE_GETFPREGS        14      /* FPU registers */
+#define PTRACE_SETFPREGS        15
+
+#define PTRACE_GETFDPIC         31      /* get the ELF fdpic loadmap address */
+
+#define PTRACE_GETFDPIC_EXEC    0       /* [addr] request the executable loadmap */
+#define PTRACE_GETFDPIC_INTERP  1       /* [addr] request the interpreter loadmap */
+
+#define PTRACE_GETDSPREGS       55      /* DSP registers */
+#define PTRACE_SETDSPREGS       56
+
+#define PT_TEXT_END_ADDR        240
+#define PT_TEXT_ADDR            244     /* &(struct user)->start_code */
+#define PT_DATA_ADDR            248     /* &(struct user)->start_data */
+#define PT_TEXT_LEN             252
+
+#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
+#include "ptrace_64.h"
+#else
+#include "ptrace_32.h"
+#endif
+
+#ifdef __KERNEL__
 
 #include <linux/stringify.h>
 #include <linux/stddef.h>
 #include <linux/thread_info.h>
 #include <asm/addrspace.h>
 #include <asm/page.h>
-#include <uapi/asm/ptrace.h>
+#include <asm/system.h>
 
 #define user_mode(regs)                 (((regs)->sr & 0x40000000)==0)
 #define kernel_stack_pointer(_regs)     ((unsigned long)(_regs)->regs[15])
@@ -114,4 +141,6 @@ static inline unsigned long profile_pc(struct pt_regs *regs)
 #define profile_pc profile_pc
 
 #include <asm-generic/ptrace.h>
+#endif /* __KERNEL__ */
+
 #endif /* __ASM_SH_PTRACE_H */
diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h
index 1dd4480c536..6c2239cca1a 100644
--- a/arch/sh/include/asm/ptrace_32.h
+++ b/arch/sh/include/asm/ptrace_32.h
@@ -1,13 +1,83 @@
 #ifndef __ASM_SH_PTRACE_32_H
 #define __ASM_SH_PTRACE_32_H
 
-#include <uapi/asm/ptrace_32.h>
+/*
+ * GCC defines register number like this:
+ * -----------------------------
+ *       0 - 15 are integer registers
+ *      17 - 22 are control/special registers
+ *      24 - 39 fp registers
+ *      40 - 47 xd registers
+ *      48 -    fpscr register
+ * -----------------------------
+ *
+ * We follows above, except:
+ *      16 --- program counter (PC)
+ *      22 --- syscall #
+ *      23 --- floating point communication register
+ */
+#define REG_REG0         0
+#define REG_REG15       15
 
+#define REG_PC          16
+
+#define REG_PR          17
+#define REG_SR          18
+#define REG_GBR         19
+#define REG_MACH        20
+#define REG_MACL        21
+
+#define REG_SYSCALL     22
+
+#define REG_FPREG0      23
+#define REG_FPREG15     38
+#define REG_XFREG0      39
+#define REG_XFREG15     54
+
+#define REG_FPSCR       55
+#define REG_FPUL        56
+
+/*
+ * This struct defines the way the registers are stored on the
+ * kernel stack during a system call or other kernel entry.
+ */
+struct pt_regs {
+        unsigned long regs[16];
+        unsigned long pc;
+        unsigned long pr;
+        unsigned long sr;
+        unsigned long gbr;
+        unsigned long mach;
+        unsigned long macl;
+        long tra;
+};
+
+/*
+ * This struct defines the way the DSP registers are stored on the
+ * kernel stack during a system call or other kernel entry.
+ */
+struct pt_dspregs {
+        unsigned long   a1;
+        unsigned long   a0g;
+        unsigned long   a1g;
+        unsigned long   m0;
+        unsigned long   m1;
+        unsigned long   a0;
+        unsigned long   x0;
+        unsigned long   x1;
+        unsigned long   y0;
+        unsigned long   y1;
+        unsigned long   dsr;
+        unsigned long   rs;
+        unsigned long   re;
+        unsigned long   mod;
+};
+
+#ifdef __KERNEL__
 
 #define MAX_REG_OFFSET          offsetof(struct pt_regs, tra)
-static inline long regs_return_value(struct pt_regs *regs)
-{
-        return regs->regs[0];
-}
+#define regs_return_value(_regs)        ((_regs)->regs[0])
+
+#endif /* __KERNEL__ */
 
 #endif /* __ASM_SH_PTRACE_32_H */
diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h
index 97f4b5660f2..bf9be7764d6 100644
--- a/arch/sh/include/asm/ptrace_64.h
+++ b/arch/sh/include/asm/ptrace_64.h
@@ -1,13 +1,20 @@
 #ifndef __ASM_SH_PTRACE_64_H
 #define __ASM_SH_PTRACE_64_H
 
-#include <uapi/asm/ptrace_64.h>
+struct pt_regs {
+        unsigned long long pc;
+        unsigned long long sr;
+        long long syscall_nr;
+        unsigned long long regs[63];
+        unsigned long long tregs[8];
+        unsigned long long pad[2];
+};
 
+#ifdef __KERNEL__
 
 #define MAX_REG_OFFSET          offsetof(struct pt_regs, tregs[7])
-static inline long regs_return_value(struct pt_regs *regs)
-{
-        return regs->regs[3];
-}
+#define regs_return_value(_regs)        ((_regs)->regs[3])
+
+#endif /* __KERNEL__ */
 
 #endif /* __ASM_SH_PTRACE_64_H */
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 1b6199740e9..4a5350037c8 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -6,6 +6,7 @@
 extern long __nosave_begin, __nosave_end;
 extern long __machvec_start, __machvec_end;
 extern char __uncached_start, __uncached_end;
+extern char _ebss[];
 extern char __start_eh_frame[], __stop_eh_frame[];
 
 #endif /* __ASM_SH_SECTIONS_H */
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index 99238108e7a..01fa17a3d75 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -1,8 +1,9 @@
 #ifndef _SH_SETUP_H
 #define _SH_SETUP_H
 
-#include <uapi/asm/setup.h>
+#include <asm-generic/setup.h>
 
+#ifdef __KERNEL__
 /*
  * This is set up by the setup-routine at boot-time
  */
@@ -19,6 +20,7 @@
 
 void sh_mv_setup(void);
 void check_for_initrd(void);
-void per_cpu_trap_init(void);
+
+#endif /* __KERNEL__ */
 
 #endif /* _SH_SETUP_H */
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
index 580b7ac228b..1d95c78808d 100644
--- a/arch/sh/include/asm/siu.h
+++ b/arch/sh/include/asm/siu.h
@@ -14,6 +14,7 @@
 struct device;
 
 struct siu_platform {
+        struct device *dma_dev;
         unsigned int dma_slave_tx_a;
         unsigned int dma_slave_rx_a;
         unsigned int dma_slave_tx_b;
diff --git a/arch/sh/include/asm/stackprotector.h b/arch/sh/include/asm/stackprotector.h
deleted file mode 100644
index d9df3a76847..00000000000
--- a/arch/sh/include/asm/stackprotector.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef __ASM_SH_STACKPROTECTOR_H
-#define __ASM_SH_STACKPROTECTOR_H
-
-#include <linux/random.h>
-#include <linux/version.h>
-
-extern unsigned long __stack_chk_guard;
-
-/*
- * Initialize the stackprotector canary value.
- *
- * NOTE: this must only be called from functions that never return,
- * and it must always be inlined.
- */
-static __always_inline void boot_init_stack_canary(void)
-{
-        unsigned long canary;
-
-        /* Try to get a semi random initial value. */
-        get_random_bytes(&canary, sizeof(canary));
-        canary ^= LINUX_VERSION_CODE;
-
-        current->stack_canary = canary;
-        __stack_chk_guard = current->stack_canary;
-}
-
-#endif /* __ASM_SH_STACKPROTECTOR_H */
diff --git a/arch/sh/include/asm/string.h b/arch/sh/include/asm/string.h
index 114011fa08a..8c1ea21dc0a 100644
--- a/arch/sh/include/asm/string.h
+++ b/arch/sh/include/asm/string.h
@@ -1,5 +1,5 @@
 #ifdef CONFIG_SUPERH32
-# include <asm/string_32.h>
+# include "string_32.h"
 #else
-# include <asm/string_64.h>
+# include "string_64.h"
 #endif
diff --git a/arch/sh/include/asm/switch_to.h b/arch/sh/include/asm/switch_to.h
deleted file mode 100644
index bcd722fc834..00000000000
--- a/arch/sh/include/asm/switch_to.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003  Paul Mundt
- * Copyright (C) 2004  Richard Curnow
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_SH_SWITCH_TO_H
-#define __ASM_SH_SWITCH_TO_H
-
-#ifdef CONFIG_SUPERH32
-# include <asm/switch_to_32.h>
-#else
-# include <asm/switch_to_64.h>
-#endif
-
-#endif /* __ASM_SH_SWITCH_TO_H */
diff --git a/arch/sh/include/asm/switch_to_32.h b/arch/sh/include/asm/switch_to_32.h
deleted file mode 100644
index 0c065513e7a..00000000000
--- a/arch/sh/include/asm/switch_to_32.h
+++ /dev/null
@@ -1,134 +0,0 @@
-#ifndef __ASM_SH_SWITCH_TO_32_H
-#define __ASM_SH_SWITCH_TO_32_H
-
-#ifdef CONFIG_SH_DSP
-
-#define is_dsp_enabled(tsk)                                             \
-        (!!(tsk->thread.dsp_status.status & SR_DSP))
-
-#define __restore_dsp(tsk)                                              \
-do {                                                                    \
-        register u32 *__ts2 __asm__ ("r2") =                            \
-                        (u32 *)&tsk->thread.dsp_status;                 \
-        __asm__ __volatile__ (                                          \
-                ".balign 4\n\t"                                         \
-                "movs.l @r2+, a0\n\t"                                   \
-                "movs.l @r2+, a1\n\t"                                   \
-                "movs.l @r2+, a0g\n\t"                                  \
-                "movs.l @r2+, a1g\n\t"                                  \
-                "movs.l @r2+, m0\n\t"                                   \
-                "movs.l @r2+, m1\n\t"                                   \
-                "movs.l @r2+, x0\n\t"                                   \
-                "movs.l @r2+, x1\n\t"                                   \
-                "movs.l @r2+, y0\n\t"                                   \
-                "movs.l @r2+, y1\n\t"                                   \
-                "lds.l  @r2+, dsr\n\t"                                  \
-                "ldc.l  @r2+, rs\n\t"                                   \
-                "ldc.l  @r2+, re\n\t"                                   \
-                "ldc.l  @r2+, mod\n\t"                                  \
-                : : "r" (__ts2));                                       \
-} while (0)
-
-#define __save_dsp(tsk)                                                 \
-do {                                                                    \
-        register u32 *__ts2 __asm__ ("r2") =                            \
-                        (u32 *)&tsk->thread.dsp_status + 14;            \
-                                                                        \
-        __asm__ __volatile__ (                                          \
-                ".balign 4\n\t"                                         \
-                "stc.l  mod, @-r2\n\t"                                  \
-                "stc.l  re, @-r2\n\t"                                   \
-                "stc.l  rs, @-r2\n\t"                                   \
-                "sts.l  dsr, @-r2\n\t"                                  \
-                "movs.l y1, @-r2\n\t"                                   \
-                "movs.l y0, @-r2\n\t"                                   \
-                "movs.l x1, @-r2\n\t"                                   \
-                "movs.l x0, @-r2\n\t"                                   \
-                "movs.l m1, @-r2\n\t"                                   \
-                "movs.l m0, @-r2\n\t"                                   \
-                "movs.l a1g, @-r2\n\t"                                  \
-                "movs.l a0g, @-r2\n\t"                                  \
-                "movs.l a1, @-r2\n\t"                                   \
-                "movs.l a0, @-r2\n\t"                                   \
-                : : "r" (__ts2));                                       \
-} while (0)
-
-#else
-
-#define is_dsp_enabled(tsk)     (0)
-#define __save_dsp(tsk)         do { } while (0)
-#define __restore_dsp(tsk)      do { } while (0)
-#endif
-
-struct task_struct *__switch_to(struct task_struct *prev,
-                                struct task_struct *next);
-
-/*
- *      switch_to() should switch tasks to task nr n, first
- */
-#define switch_to(prev, next, last)                             \
-do {                                                            \
-        register u32 *__ts1 __asm__ ("r1");                     \
-        register u32 *__ts2 __asm__ ("r2");                     \
-        register u32 *__ts4 __asm__ ("r4");                     \
-        register u32 *__ts5 __asm__ ("r5");                     \
-        register u32 *__ts6 __asm__ ("r6");                     \
-        register u32 __ts7 __asm__ ("r7");                      \
-        struct task_struct *__last;                             \
-                                                                \
-        if (is_dsp_enabled(prev))                               \
-                __save_dsp(prev);                               \
-                                                                \
-        __ts1 = (u32 *)&prev->thread.sp;                        \
-        __ts2 = (u32 *)&prev->thread.pc;                        \
-        __ts4 = (u32 *)prev;                                    \
-        __ts5 = (u32 *)next;                                    \
-        __ts6 = (u32 *)&next->thread.sp;                        \
-        __ts7 = next->thread.pc;                                \
-                                                                \
-        __asm__ __volatile__ (                                  \
-                ".balign 4\n\t"                                 \
-                "stc.l  gbr, @-r15\n\t"                         \
-                "sts.l  pr, @-r15\n\t"                          \
-                "mov.l  r8, @-r15\n\t"                          \
-                "mov.l  r9, @-r15\n\t"                          \
-                "mov.l  r10, @-r15\n\t"                         \
-                "mov.l  r11, @-r15\n\t"                         \
-                "mov.l  r12, @-r15\n\t"                         \
-                "mov.l  r13, @-r15\n\t"                         \
-                "mov.l  r14, @-r15\n\t"                         \
-                "mov.l  r15, @r1\t! save SP\n\t"                \
-                "mov.l  @r6, r15\t! change to new stack\n\t"    \
-                "mova   1f, %0\n\t"                             \
-                "mov.l  %0, @r2\t! save PC\n\t"                 \
-                "mov.l  2f, %0\n\t"                             \
-                "jmp    @%0\t! call __switch_to\n\t"            \
-                " lds   r7, pr\t!  with return to new PC\n\t"   \
-                ".balign        4\n"                            \
-                "2:\n\t"                                        \
-                ".long  __switch_to\n"                          \
-                "1:\n\t"                                        \
-                "mov.l  @r15+, r14\n\t"                         \
-                "mov.l  @r15+, r13\n\t"                         \
-                "mov.l  @r15+, r12\n\t"                         \
-                "mov.l  @r15+, r11\n\t"                         \
-                "mov.l  @r15+, r10\n\t"                         \
-                "mov.l  @r15+, r9\n\t"                          \
-                "mov.l  @r15+, r8\n\t"                          \
-                "lds.l  @r15+, pr\n\t"                          \
-                "ldc.l  @r15+, gbr\n\t"                         \
-                : "=z" (__last)                                 \
-                : "r" (__ts1), "r" (__ts2), "r" (__ts4),        \
-                  "r" (__ts5), "r" (__ts6), "r" (__ts7)         \
-                : "r3", "t");                                   \
-                                                                \
-        last = __last;                                          \
-} while (0)
-
-#define finish_arch_switch(prev)                                \
-do {                                                            \
-        if (is_dsp_enabled(prev))                               \
-                __restore_dsp(prev);                            \
-} while (0)
-
-#endif /* __ASM_SH_SWITCH_TO_32_H */
diff --git a/arch/sh/include/asm/switch_to_64.h b/arch/sh/include/asm/switch_to_64.h
deleted file mode 100644
index ba3129d6bc2..00000000000
--- a/arch/sh/include/asm/switch_to_64.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003  Paul Mundt
- * Copyright (C) 2004  Richard Curnow
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_SH_SWITCH_TO_64_H
-#define __ASM_SH_SWITCH_TO_64_H
-
-struct thread_struct;
-struct task_struct;
-
-/*
- *      switch_to() should switch tasks to task nr n, first
- */
-struct task_struct *sh64_switch_to(struct task_struct *prev,
-                                   struct thread_struct *prev_thread,
-                                   struct task_struct *next,
-                                   struct thread_struct *next_thread);
-
-#define switch_to(prev,next,last)                               \
-do {                                                            \
-        if (last_task_used_math != next) {                      \
-                struct pt_regs *regs = next->thread.uregs;      \
-                if (regs) regs->sr |= SR_FD;                    \
-        }                                                       \
-        last = sh64_switch_to(prev, &prev->thread, next,        \
-                              &next->thread);                   \
-} while (0)
-
-
-#endif /* __ASM_SH_SWITCH_TO_64_H */
diff --git a/arch/sh/include/asm/syscall.h b/arch/sh/include/asm/syscall.h
index 847128da6ea..aa7777bdc37 100644
--- a/arch/sh/include/asm/syscall.h
+++ b/arch/sh/include/asm/syscall.h
@@ -4,9 +4,9 @@
 extern const unsigned long sys_call_table[];
 
 #ifdef CONFIG_SUPERH32
-# include <asm/syscall_32.h>
+# include "syscall_32.h"
 #else
-# include <asm/syscall_64.h>
+# include "syscall_64.h"
 #endif
 
 #endif /* __ASM_SH_SYSCALL_H */
diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h
index 3dbfef06f6b..507725af2e5 100644
--- a/arch/sh/include/asm/syscalls.h
+++ b/arch/sh/include/asm/syscalls.h
@@ -11,9 +11,9 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
                           unsigned long fd, unsigned long pgoff);
 
 #ifdef CONFIG_SUPERH32
-# include <asm/syscalls_32.h>
+# include "syscalls_32.h"
 #else
-# include <asm/syscalls_64.h>
+# include "syscalls_64.h"
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/syscalls_32.h b/arch/sh/include/asm/syscalls_32.h
index cc25485996b..ae717e3c26d 100644
--- a/arch/sh/include/asm/syscalls_32.h
+++ b/arch/sh/include/asm/syscalls_32.h
@@ -9,7 +9,23 @@
 
 struct pt_regs;
 
-asmlinkage int sys_sigsuspend(old_sigset_t mask);
+asmlinkage int sys_fork(unsigned long r4, unsigned long r5,
+                        unsigned long r6, unsigned long r7,
+                        struct pt_regs __regs);
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+                         unsigned long parent_tidptr,
+                         unsigned long child_tidptr,
+                         struct pt_regs __regs);
+asmlinkage int sys_vfork(unsigned long r4, unsigned long r5,
+                         unsigned long r6, unsigned long r7,
+                         struct pt_regs __regs);
+asmlinkage int sys_execve(const char __user *ufilename,
+                          const char __user *const __user *uargv,
+                          const char __user *const __user *uenvp,
+                          unsigned long r7, struct pt_regs __regs);
+asmlinkage int sys_sigsuspend(old_sigset_t mask, unsigned long r5,
+                              unsigned long r6, unsigned long r7,
+                              struct pt_regs __regs);
 asmlinkage int sys_sigaction(int sig, const struct old_sigaction __user *act,
                              struct old_sigaction __user *oact);
 asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
diff --git a/arch/sh/include/asm/syscalls_64.h b/arch/sh/include/asm/syscalls_64.h
index d62e8eb22f7..ee519f41d95 100644
--- a/arch/sh/include/asm/syscalls_64.h
+++ b/arch/sh/include/asm/syscalls_64.h
@@ -9,6 +9,23 @@
 
 struct pt_regs;
 
+asmlinkage int sys_fork(unsigned long r2, unsigned long r3,
+                        unsigned long r4, unsigned long r5,
+                        unsigned long r6, unsigned long r7,
+                        struct pt_regs *pregs);
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+                         unsigned long r4, unsigned long r5,
+                         unsigned long r6, unsigned long r7,
+                         struct pt_regs *pregs);
+asmlinkage int sys_vfork(unsigned long r2, unsigned long r3,
+                         unsigned long r4, unsigned long r5,
+                         unsigned long r6, unsigned long r7,
+                         struct pt_regs *pregs);
+asmlinkage int sys_execve(const char *ufilename, char **uargv,
+                          char **uenvp, unsigned long r5,
+                          unsigned long r6, unsigned long r7,
+                          struct pt_regs *pregs);
+
 /* Misc syscall related bits */
 asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs);
 asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index 7d5ac4e4848..ea2d5089de1 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -10,18 +10,8 @@
  *  - Incorporating suggestions made by Linus Torvalds and Dave Miller
  */
 #ifdef __KERNEL__
-
 #include <asm/page.h>
 
-/*
- * Page fault error code bits
- */
-#define FAULT_CODE_WRITE        (1 << 0)        /* write access */
-#define FAULT_CODE_INITIAL      (1 << 1)        /* initial page write */
-#define FAULT_CODE_ITLB         (1 << 2)        /* ITLB miss */
-#define FAULT_CODE_PROT         (1 << 3)        /* protection fault */
-#define FAULT_CODE_USER         (1 << 4)        /* user-mode access */
-
 #ifndef __ASSEMBLY__
 #include <asm/processor.h>
 
@@ -98,23 +88,29 @@ static inline struct thread_info *current_thread_info(void)
         return ti;
 }
 
+/* thread information allocation */
+#if THREAD_SHIFT >= PAGE_SHIFT
+
 #define THREAD_SIZE_ORDER       (THREAD_SHIFT - PAGE_SHIFT)
 
+#endif
+
+extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node);
+extern void free_thread_info(struct thread_info *ti);
 extern void arch_task_cache_init(void);
+#define arch_task_cache_init arch_task_cache_init
 extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
-extern void arch_release_task_struct(struct task_struct *tsk);
 extern void init_thread_xstate(void);
 
+#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
+
 #endif /* __ASSEMBLY__ */
 
 /*
- * Thread information flags
- *
- * - Limited to 24 bits, upper byte used for fault code encoding.
- *
- * - _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or
- *   we blow the tst immediate size constraints and need to fix up
- *   arch/sh/kernel/entry-common.S.
+ * thread information flags
+ * - these are process state flags that various assembly files may need to access
+ * - pending work-to-be-done flags are in LSW
+ * - other flags in MSW
  */
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
 #define TIF_SIGPENDING          1       /* signal pending */
@@ -126,6 +122,7 @@ extern void init_thread_xstate(void);
 #define TIF_SYSCALL_TRACEPOINT  8       /* for ftrace syscall instrumentation */
 #define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
+#define TIF_FREEZE              19      /* Freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
@@ -136,6 +133,13 @@ extern void init_thread_xstate(void);
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
+#define _TIF_FREEZE             (1 << TIF_FREEZE)
+
+/*
+ * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we
+ * blow the tst immediate size constraints and need to fix up
+ * arch/sh/kernel/entry-common.S.
+ */
 
 /* work to do in syscall trace */
 #define _TIF_WORK_SYSCALL_MASK  (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
@@ -163,52 +167,13 @@ extern void init_thread_xstate(void);
 #define TS_USEDFPU              0x0002  /* FPU used by this task this quantum */
 
 #ifndef __ASSEMBLY__
-
 #define HAVE_SET_RESTORE_SIGMASK        1
 static inline void set_restore_sigmask(void)
 {
         struct thread_info *ti = current_thread_info();
         ti->status |= TS_RESTORE_SIGMASK;
-        WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags));
+        set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags);
 }
-
-#define TI_FLAG_FAULT_CODE_SHIFT        24
-
-/*
- * Additional thread flag encoding
- */
-static inline void set_thread_fault_code(unsigned int val)
-{
-        struct thread_info *ti = current_thread_info();
-        ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
-                | (val << TI_FLAG_FAULT_CODE_SHIFT);
-}
-
-static inline unsigned int get_thread_fault_code(void)
-{
-        struct thread_info *ti = current_thread_info();
-        return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT;
-}
-
-static inline void clear_restore_sigmask(void)
-{
-        current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
-}
-static inline bool test_restore_sigmask(void)
-{
-        return current_thread_info()->status & TS_RESTORE_SIGMASK;
-}
-static inline bool test_and_clear_restore_sigmask(void)
-{
-        struct thread_info *ti = current_thread_info();
-        if (!(ti->status & TS_RESTORE_SIGMASK))
-                return false;
-        ti->status &= ~TS_RESTORE_SIGMASK;
-        return true;
-}
-
-#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
-
 #endif  /* !__ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index e61d43d9f68..ec88bfcdf7c 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -2,7 +2,7 @@
 #define __ASM_SH_TLB_H
 
 #ifdef CONFIG_SUPERH64
-# include <asm/tlb_64.h>
+# include "tlb_64.h"
 #endif
 
 #ifndef __ASSEMBLY__
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index b0a282d65f6..88e734069fa 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -3,6 +3,31 @@
 
 #ifdef CONFIG_NUMA
 
+/* sched_domains SD_NODE_INIT for sh machines */
+#define SD_NODE_INIT (struct sched_domain) {            \
+        .parent                 = NULL,                 \
+        .child                  = NULL,                 \
+        .groups                 = NULL,                 \
+        .min_interval           = 8,                    \
+        .max_interval           = 32,                   \
+        .busy_factor            = 32,                   \
+        .imbalance_pct          = 125,                  \
+        .cache_nice_tries       = 2,                    \
+        .busy_idx               = 3,                    \
+        .idle_idx               = 2,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 0,                    \
+        .forkexec_idx           = 0,                    \
+        .flags                  = SD_LOAD_BALANCE       \
+                                | SD_BALANCE_FORK       \
+                                | SD_BALANCE_EXEC       \
+                                | SD_BALANCE_NEWIDLE    \
+                                | SD_SERIALIZE,         \
+        .last_balance           = jiffies,              \
+        .balance_interval       = 1,                    \
+        .nr_balance_failed      = 0,                    \
+}
+
 #define cpu_to_node(cpu)        ((void)(cpu),0)
 #define parent_node(node)       ((void)(node),0)
 
diff --git a/arch/sh/include/asm/traps.h b/arch/sh/include/asm/traps.h
deleted file mode 100644
index 9cc149a0dbd..00000000000
--- a/arch/sh/include/asm/traps.h
+++ /dev/null
@@ -1,21 +0,0 @@
-#ifndef __ASM_SH_TRAPS_H
-#define __ASM_SH_TRAPS_H
-
-#include <linux/compiler.h>
-
-#ifdef CONFIG_SUPERH32
-# include <asm/traps_32.h>
-#else
-# include <asm/traps_64.h>
-#endif
-
-BUILD_TRAP_HANDLER(address_error);
-BUILD_TRAP_HANDLER(debug);
-BUILD_TRAP_HANDLER(bug);
-BUILD_TRAP_HANDLER(breakpoint);
-BUILD_TRAP_HANDLER(singlestep);
-BUILD_TRAP_HANDLER(fpu_error);
-BUILD_TRAP_HANDLER(fpu_state_restore);
-BUILD_TRAP_HANDLER(nmi);
-
-#endif /* __ASM_SH_TRAPS_H */
diff --git a/arch/sh/include/asm/traps_32.h b/arch/sh/include/asm/traps_32.h
deleted file mode 100644
index cfd55ff9dff..00000000000
--- a/arch/sh/include/asm/traps_32.h
+++ /dev/null
@@ -1,68 +0,0 @@
-#ifndef __ASM_SH_TRAPS_32_H
-#define __ASM_SH_TRAPS_32_H
-
-#include <linux/types.h>
-#include <asm/mmu.h>
-
-#ifdef CONFIG_CPU_HAS_SR_RB
-#define lookup_exception_vector()       \
-({                                      \
-        unsigned long _vec;             \
-                                        \
-        __asm__ __volatile__ (          \
-                "stc r2_bank, %0\n\t"   \
-                : "=r" (_vec)           \
-        );                              \
-                                        \
-        _vec;                           \
-})
-#else
-#define lookup_exception_vector()       \
-({                                      \
-        unsigned long _vec;             \
-        __asm__ __volatile__ (          \
-                "mov r4, %0\n\t"        \
-                : "=r" (_vec)           \
-        );                              \
-                                        \
-        _vec;                           \
-})
-#endif
-
-static inline void trigger_address_error(void)
-{
-        __asm__ __volatile__ (
-                "ldc %0, sr\n\t"
-                "mov.l @%1, %0"
-                :
-                : "r" (0x10000000), "r" (0x80000001)
-        );
-}
-
-asmlinkage void do_address_error(struct pt_regs *regs,
-                                 unsigned long writeaccess,
-                                 unsigned long address);
-asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
-                                unsigned long r6, unsigned long r7,
-                                struct pt_regs __regs);
-asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
-                                unsigned long r6, unsigned long r7,
-                                struct pt_regs __regs);
-asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
-                                unsigned long r6, unsigned long r7,
-                                struct pt_regs __regs);
-asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
-                                   unsigned long r6, unsigned long r7,
-                                   struct pt_regs __regs);
-
-#define BUILD_TRAP_HANDLER(name)                                        \
-asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \
-                                    unsigned long r6, unsigned long r7, \
-                                    struct pt_regs __regs)
-
-#define TRAP_HANDLER_DECL                               \
-        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);  \
-        unsigned int vec = regs->tra;                   \
-        (void)vec;
-
-#endif /* __ASM_SH_TRAPS_32_H */
diff --git a/arch/sh/include/asm/traps_64.h b/arch/sh/include/asm/traps_64.h
deleted file mode 100644
index ef5eff91944..00000000000
--- a/arch/sh/include/asm/traps_64.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003  Paul Mundt
- * Copyright (C) 2004  Richard Curnow
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_SH_TRAPS_64_H
-#define __ASM_SH_TRAPS_64_H
-
-#include <cpu/registers.h>
-
-extern void phys_stext(void);
-
-#define lookup_exception_vector()               \
-({                                              \
-        unsigned long _vec;                     \
-                                                \
-        __asm__ __volatile__ (                  \
-                "getcon " __EXPEVT ", %0\n\t"   \
-                : "=r" (_vec)                   \
-        );                                      \
-                                                \
-        _vec;                                   \
-})
-
-static inline void trigger_address_error(void)
-{
-        phys_stext();
-}
-
-#define BUILD_TRAP_HANDLER(name)        \
-asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
-#define TRAP_HANDLER_DECL
-
-#endif /* __ASM_SH_TRAPS_64_H */
diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h
index 6a31053fa5e..f8421f7ad63 100644
--- a/arch/sh/include/asm/types.h
+++ b/arch/sh/include/asm/types.h
@@ -1,11 +1,12 @@
 #ifndef __ASM_SH_TYPES_H
 #define __ASM_SH_TYPES_H
 
-#include <uapi/asm/types.h>
+#include <asm-generic/types.h>
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
+#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
 #ifdef CONFIG_SUPERH32
@@ -17,4 +18,6 @@ typedef u64 reg_size_t;
 #endif
 
 #endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+
 #endif /* __ASM_SH_TYPES_H */
diff --git a/arch/sh/include/asm/uaccess.h b/arch/sh/include/asm/uaccess.h
index 9486376605f..075848f43b6 100644
--- a/arch/sh/include/asm/uaccess.h
+++ b/arch/sh/include/asm/uaccess.h
@@ -25,8 +25,6 @@
         (__chk_user_ptr(addr),          \
          __access_ok((unsigned long __force)(addr), (size)))
 
-#define user_addr_max() (current_thread_info()->addr_limit.seg)
-
 /*
  * Uh, these should become the main single-value transfer routines ...
  * They automatically use the right size if we just have the right
@@ -97,16 +95,11 @@ struct __large_struct { unsigned long buf[100]; };
 })
 
 #ifdef CONFIG_SUPERH32
-# include <asm/uaccess_32.h>
+# include "uaccess_32.h"
 #else
-# include <asm/uaccess_64.h>
+# include "uaccess_64.h"
 #endif
 
-extern long strncpy_from_user(char *dest, const char __user *src, long count);
-
-extern __must_check long strlen_user(const char __user *str);
-extern __must_check long strnlen_user(const char __user *str, long n);
-
 /* Generic arbitrary sized copy.  */
 /* Return the number of bytes NOT copied */
 __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
@@ -144,6 +137,37 @@ __kernel_size_t __clear_user(void *addr, __kernel_size_t size);
         __cl_size;                                                      \
 })
 
+/**
+ * strncpy_from_user: - Copy a NUL terminated string from userspace.
+ * @dst:   Destination address, in kernel space.  This buffer must be at
+ *         least @count bytes long.
+ * @src:   Source address, in user space.
+ * @count: Maximum number of bytes to copy, including the trailing NUL.
+ *
+ * Copies a NUL-terminated string from userspace to kernel space.
+ *
+ * On success, returns the length of the string (not including the trailing
+ * NUL).
+ *
+ * If access to userspace fails, returns -EFAULT (some data may have been
+ * copied).
+ *
+ * If @count is smaller than the length of the string, copies @count bytes
+ * and returns @count.
+ */
+#define strncpy_from_user(dest,src,count)                               \
+({                                                                      \
+        unsigned long __sfu_src = (unsigned long)(src);                 \
+        int __sfu_count = (int)(count);                                 \
+        long __sfu_res = -EFAULT;                                       \
+                                                                        \
+        if (__access_ok(__sfu_src, __sfu_count))                        \
+                __sfu_res = __strncpy_from_user((unsigned long)(dest),  \
+                                __sfu_src, __sfu_count);                \
+                                                                        \
+        __sfu_res;                                                      \
+})
+
 static inline unsigned long
 copy_from_user(void *to, const void __user *from, unsigned long n)
 {
@@ -168,6 +192,43 @@ copy_to_user(void __user *to, const void *from, unsigned long n)
         return __copy_size;
 }
 
+/**
+ * strnlen_user: - Get the size of a string in user space.
+ * @s: The string to measure.
+ * @n: The maximum valid length
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * Get the size of a NUL-terminated string in user space.
+ *
+ * Returns the size of the string INCLUDING the terminating NUL.
+ * On exception, returns 0.
+ * If the string is too long, returns a value greater than @n.
+ */
+static inline long strnlen_user(const char __user *s, long n)
+{
+        if (!__addr_ok(s))
+                return 0;
+        else
+                return __strnlen_user(s, n);
+}
+
+/**
+ * strlen_user: - Get the size of a string in user space.
+ * @str: The string to measure.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * Get the size of a NUL-terminated string in user space.
+ *
+ * Returns the size of the string INCLUDING the terminating NUL.
+ * On exception, returns 0.
+ *
+ * If there is a limit on the length of a valid string, you may wish to
+ * consider using strnlen_user() instead.
+ */
+#define strlen_user(str)        strnlen_user(str, ~0UL >> 1)
+
 /*
  * The exception table consists of pairs of addresses: the first is the
  * address of an instruction that is allowed to fault, and the second is
@@ -193,19 +254,5 @@ int fixup_exception(struct pt_regs *regs);
 unsigned long search_exception_table(unsigned long addr);
 const struct exception_table_entry *search_exception_tables(unsigned long addr);
 
-extern void *set_exception_table_vec(unsigned int vec, void *handler);
-
-static inline void *set_exception_table_evt(unsigned int evt, void *handler)
-{
-        return set_exception_table_vec(evt >> 5, handler);
-}
-
-struct mem_access {
-        unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt);
-        unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt);
-};
-
-int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
-                            struct mem_access *ma, int, unsigned long address);
 
 #endif /* __ASM_SH_UACCESS_H */
diff --git a/arch/sh/include/asm/uaccess_32.h b/arch/sh/include/asm/uaccess_32.h
index c0de7ee35ab..ae0d24f6653 100644
--- a/arch/sh/include/asm/uaccess_32.h
+++ b/arch/sh/include/asm/uaccess_32.h
@@ -170,4 +170,79 @@ __asm__ __volatile__( \
 
 extern void __put_user_unknown(void);
 
+static inline int
+__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count)
+{
+        __kernel_size_t res;
+        unsigned long __dummy, _d, _s, _c;
+
+        __asm__ __volatile__(
+                "9:\n"
+                "mov.b  @%2+, %1\n\t"
+                "cmp/eq #0, %1\n\t"
+                "bt/s   2f\n"
+                "1:\n"
+                "mov.b  %1, @%3\n\t"
+                "dt     %4\n\t"
+                "bf/s   9b\n\t"
+                " add   #1, %3\n\t"
+                "2:\n\t"
+                "sub    %4, %0\n"
+                "3:\n"
+                ".section .fixup,\"ax\"\n"
+                "4:\n\t"
+                "mov.l  5f, %1\n\t"
+                "jmp    @%1\n\t"
+                " mov   %9, %0\n\t"
+                ".balign 4\n"
+                "5:     .long 3b\n"
+                ".previous\n"
+                ".section __ex_table,\"a\"\n"
+                "       .balign 4\n"
+                "       .long 9b,4b\n"
+                ".previous"
+                : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d), "=r"(_c)
+                : "0" (__count), "2" (__src), "3" (__dest), "4" (__count),
+                  "i" (-EFAULT)
+                : "memory", "t");
+
+        return res;
+}
+
+/*
+ * Return the size of a string (including the ending 0 even when we have
+ * exceeded the maximum string length).
+ */
+static inline long __strnlen_user(const char __user *__s, long __n)
+{
+        unsigned long res;
+        unsigned long __dummy;
+
+        __asm__ __volatile__(
+                "1:\t"
+                "mov.b  @(%0,%3), %1\n\t"
+                "cmp/eq %4, %0\n\t"
+                "bt/s   2f\n\t"
+                " add   #1, %0\n\t"
+                "tst    %1, %1\n\t"
+                "bf     1b\n\t"
+                "2:\n"
+                ".section .fixup,\"ax\"\n"
+                "3:\n\t"
+                "mov.l  4f, %1\n\t"
+                "jmp    @%1\n\t"
+                " mov   #0, %0\n"
+                ".balign 4\n"
+                "4:     .long 2b\n"
+                ".previous\n"
+                ".section __ex_table,\"a\"\n"
+                "       .balign 4\n"
+                "       .long 1b,3b\n"
+                ".previous"
+                : "=z" (res), "=&r" (__dummy)
+                : "0" (0), "r" (__s), "r" (__n)
+                : "t");
+        return res;
+}
+
 #endif /* __ASM_SH_UACCESS_32_H */
diff --git a/arch/sh/include/asm/uaccess_64.h b/arch/sh/include/asm/uaccess_64.h
index 2e07e0f40c6..56fd20b8cdc 100644
--- a/arch/sh/include/asm/uaccess_64.h
+++ b/arch/sh/include/asm/uaccess_64.h
@@ -84,4 +84,8 @@ extern long __put_user_asm_l(void *, long);
 extern long __put_user_asm_q(void *, long);
 extern void __put_user_unknown(void);
 
+extern long __strnlen_user(const char *__s, long __n);
+extern int __strncpy_from_user(unsigned long __dest,
+               unsigned long __user __src, int __count);
+
 #endif /* __ASM_SH_UACCESS_64_H */
diff --git a/arch/sh/include/asm/unistd.h b/arch/sh/include/asm/unistd.h
index 012004ed333..65be656ead7 100644
--- a/arch/sh/include/asm/unistd.h
+++ b/arch/sh/include/asm/unistd.h
@@ -1,43 +1,13 @@
+#ifdef __KERNEL__
 # ifdef CONFIG_SUPERH32
-#  include <asm/unistd_32.h>
+#  include "unistd_32.h"
 # else
-#  include <asm/unistd_64.h>
+#  include "unistd_64.h"
 # endif
-
-# define __ARCH_WANT_SYS_RT_SIGSUSPEND
-# define __ARCH_WANT_OLD_READDIR
-# define __ARCH_WANT_OLD_STAT
-# define __ARCH_WANT_STAT64
-# define __ARCH_WANT_SYS_ALARM
-# define __ARCH_WANT_SYS_GETHOSTNAME
-# define __ARCH_WANT_SYS_IPC
-# define __ARCH_WANT_SYS_PAUSE
-# define __ARCH_WANT_SYS_SGETMASK
-# define __ARCH_WANT_SYS_SIGNAL
-# define __ARCH_WANT_SYS_TIME
-# define __ARCH_WANT_SYS_UTIME
-# define __ARCH_WANT_SYS_WAITPID
-# define __ARCH_WANT_SYS_SOCKETCALL
-# define __ARCH_WANT_SYS_FADVISE64
-# define __ARCH_WANT_SYS_GETPGRP
-# define __ARCH_WANT_SYS_LLSEEK
-# define __ARCH_WANT_SYS_NICE
-# define __ARCH_WANT_SYS_OLD_GETRLIMIT
-# define __ARCH_WANT_SYS_OLD_UNAME
-# define __ARCH_WANT_SYS_OLDUMOUNT
-# define __ARCH_WANT_SYS_SIGPENDING
-# define __ARCH_WANT_SYS_SIGPROCMASK
-# define __ARCH_WANT_SYS_RT_SIGACTION
-# define __ARCH_WANT_SYS_FORK
-# define __ARCH_WANT_SYS_VFORK
-# define __ARCH_WANT_SYS_CLONE
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-# define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#include <uapi/asm/unistd.h>
+#else
+# ifdef __SH5__
+#  include "unistd_64.h"
+# else
+#  include "unistd_32.h"
+# endif
+#endif
diff --git a/arch/sh/include/asm/word-at-a-time.h b/arch/sh/include/asm/word-at-a-time.h
deleted file mode 100644
index 6e38953ff7f..00000000000
--- a/arch/sh/include/asm/word-at-a-time.h
+++ /dev/null
@@ -1,53 +0,0 @@
-#ifndef __ASM_SH_WORD_AT_A_TIME_H
-#define __ASM_SH_WORD_AT_A_TIME_H
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
-# include <asm-generic/word-at-a-time.h>
-#else
-/*
- * Little-endian version cribbed from x86.
- */
-struct word_at_a_time {
-        const unsigned long one_bits, high_bits;
-};
-
-#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }
-
-/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */
-static inline long count_masked_bytes(long mask)
-{
-        /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */
-        long a = (0x0ff0001+mask) >> 23;
-        /* Fix the 1 for 00 case */
-        return a & mask;
-}
-
-/* Return nonzero if it has a zero */
-static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
-{
-        unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits;
-        *bits = mask;
-        return mask;
-}
-
-static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
-{
-        return bits;
-}
-
-static inline unsigned long create_zero_mask(unsigned long bits)
-{
-        bits = (bits - 1) & ~bits;
-        return bits >> 7;
-}
-
-/* The mask we created is directly usable as a bytemask */
-#define zero_bytemask(mask) (mask)
-
-static inline unsigned long find_zero(unsigned long mask)
-{
-        return count_masked_bytes(mask);
-}
-#endif
-
-#endif
diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7264.h b/arch/sh/include/cpu-sh2a/cpu/sh7264.h
deleted file mode 100644
index 4d1ef6d74bd..00000000000
--- a/arch/sh/include/cpu-sh2a/cpu/sh7264.h
+++ /dev/null
@@ -1,176 +0,0 @@
-#ifndef __ASM_SH7264_H__
-#define __ASM_SH7264_H__
-
-enum {
-        /* Port A */
-        GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0,
-
-        /* Port B */
-        GPIO_PB22, GPIO_PB21, GPIO_PB20,
-        GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16,
-        GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12,
-        GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8,
-        GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,
-        GPIO_PB3, GPIO_PB2, GPIO_PB1,
-
-        /* Port C */
-        GPIO_PC10, GPIO_PC9, GPIO_PC8,
-        GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,
-        GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,
-
-        /* Port D */
-        GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12,
-        GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8,
-        GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,
-        GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
-
-        /* Port E */
-        GPIO_PE5, GPIO_PE4,
-        GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0,
-
-        /* Port F */
-        GPIO_PF12,
-        GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8,
-        GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
-        GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
-
-        /* Port G */
-        GPIO_PG24,
-        GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20,
-        GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16,
-        GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12,
-        GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8,
-        GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,
-        GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,
-
-        /* Port H */
-        GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,
-        GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,
-
-        /* Port I - not on device */
-
-        /* Port J */
-        GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8,
-        GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,
-        GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,
-
-        /* Port K */
-        GPIO_PK11, GPIO_PK10, GPIO_PK9, GPIO_PK8,
-        GPIO_PK7, GPIO_PK6, GPIO_PK5, GPIO_PK4,
-        GPIO_PK3, GPIO_PK2, GPIO_PK1, GPIO_PK0,
-
-        /* INTC: IRQ and PINT on PB/PD/PE */
-        GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG,
-        GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG,
-
-        GPIO_FN_IRQ7_PC, GPIO_FN_IRQ6_PC, GPIO_FN_IRQ5_PC, GPIO_FN_IRQ4_PC,
-        GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ,
-        GPIO_FN_IRQ3_PE, GPIO_FN_IRQ2_PE, GPIO_FN_IRQ1_PE, GPIO_FN_IRQ0_PE,
-
-        /* WDT */
-        GPIO_FN_WDTOVF,
-
-        /* CAN */
-        GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,
-        GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1,
-
-        /* DMAC */
-        GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0,
-        GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1,
-
-        /* ADC */
-        GPIO_FN_ADTRG,
-
-        /* BSC */
-
-        GPIO_FN_A25, GPIO_FN_A24,
-        GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20,
-        GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16,
-        GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12,
-        GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8,
-        GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4,
-        GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0,
-        GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,
-        GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,
-        GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4,
-        GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0,
-
-        GPIO_FN_BS,
-        GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0,
-        GPIO_FN_CS6CE1B, GPIO_FN_CS5CE1A,
-        GPIO_FN_CE2A, GPIO_FN_CE2B,
-        GPIO_FN_RD, GPIO_FN_RDWR,
-        GPIO_FN_ICIOWRAH, GPIO_FN_ICIORD,
-        GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML,
-        GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE,
-        GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK,
-        GPIO_FN_IOIS16,
-
-        /* TMU */
-        GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A,
-        GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A,
-        GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A,
-        GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
-        GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,
-
-        /* SSU */
-        GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
-        GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
-        GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
-        GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,
-
-        /* SCIF */
-        GPIO_FN_SCK0, GPIO_FN_SCK1, GPIO_FN_SCK2, GPIO_FN_SCK3,
-        GPIO_FN_RXD0, GPIO_FN_RXD1, GPIO_FN_RXD2, GPIO_FN_RXD3,
-        GPIO_FN_TXD0, GPIO_FN_TXD1, GPIO_FN_TXD2, GPIO_FN_TXD3,
-        GPIO_FN_RXD4, GPIO_FN_RXD5, GPIO_FN_RXD6, GPIO_FN_RXD7,
-        GPIO_FN_TXD4, GPIO_FN_TXD5, GPIO_FN_TXD6, GPIO_FN_TXD7,
-        GPIO_FN_RTS1, GPIO_FN_RTS3, GPIO_FN_CTS1, GPIO_FN_CTS3,
-
-        /* RSPI */
-        GPIO_FN_RSPCK0, GPIO_FN_MOSI0,
-        GPIO_FN_MISO0_PF12, GPIO_FN_MISO1,
-        GPIO_FN_SSL00,
-        GPIO_FN_RSPCK1, GPIO_FN_MOSI1,
-        GPIO_FN_MISO1_PG19, GPIO_FN_SSL10,
-
-        /* IIC3 */
-        GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2,
-        GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0,
-
-        /* SSI */
-        GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0,
-        GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3,
-        GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3,
-        GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3,
-        GPIO_FN_AUDIO_CLK,
-
-        /* SIOF */
-        GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK,
-
-        /* SPDIF */
-        GPIO_FN_SPDIF_IN,
-        GPIO_FN_SPDIF_OUT,
-
-        /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
-        GPIO_FN_FCE,
-        GPIO_FN_FRB,
-
-        /* VDC3 */
-        GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC,
-        GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6, GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4,
-        GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2, GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0,
-        GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK,
-        GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE,
-        GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,
-        GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,
-        GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,
-        GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,
-        GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,
-        GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,
-        GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,
-        GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,
-        GPIO_FN_LCD_M_DISP,
-};
-
-#endif /* __ASM_SH7264_H__ */
diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/arch/sh/include/cpu-sh2a/cpu/sh7269.h
deleted file mode 100644
index 2a0ca8780f0..00000000000
--- a/arch/sh/include/cpu-sh2a/cpu/sh7269.h
+++ /dev/null
@@ -1,213 +0,0 @@
-#ifndef __ASM_SH7269_H__
-#define __ASM_SH7269_H__
-
-enum {
-        /* Port A */
-        GPIO_PA1, GPIO_PA0,
-
-        /* Port B */
-        GPIO_PB22, GPIO_PB21, GPIO_PB20,
-        GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16,
-        GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12,
-        GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8,
-        GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,
-        GPIO_PB3, GPIO_PB2, GPIO_PB1,
-
-        /* Port C */
-        GPIO_PC8,
-        GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,
-        GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,
-
-        /* Port D */
-        GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12,
-        GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8,
-        GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,
-        GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
-
-        /* Port E */
-        GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4,
-        GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0,
-
-        /* Port F */
-        GPIO_PF23, GPIO_PF22, GPIO_PF21, GPIO_PF20,
-        GPIO_PF19, GPIO_PF18, GPIO_PF17, GPIO_PF16,
-        GPIO_PF15, GPIO_PF14, GPIO_PF13, GPIO_PF12,
-        GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8,
-        GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
-        GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
-
-        /* Port G */
-        GPIO_PG27, GPIO_PG26, GPIO_PG25, GPIO_PG24,
-        GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20,
-        GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16,
-        GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12,
-        GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8,
-        GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,
-        GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,
-
-        /* Port H */
-        GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,
-        GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,
-
-        /* Port I - not on device */
-
-        /* Port J */
-        GPIO_PJ31, GPIO_PJ30, GPIO_PJ29, GPIO_PJ28,
-        GPIO_PJ27, GPIO_PJ26, GPIO_PJ25, GPIO_PJ24,
-        GPIO_PJ23, GPIO_PJ22, GPIO_PJ21, GPIO_PJ20,
-        GPIO_PJ19, GPIO_PJ18, GPIO_PJ17, GPIO_PJ16,
-        GPIO_PJ15, GPIO_PJ14, GPIO_PJ13, GPIO_PJ12,
-        GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8,
-        GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,
-        GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,
-
-        /* INTC: IRQ and PINT */
-        GPIO_FN_IRQ7_PG, GPIO_FN_IRQ6_PG, GPIO_FN_IRQ5_PG, GPIO_FN_IRQ4_PG,
-        GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PG, GPIO_FN_IRQ0_PG,
-        GPIO_FN_IRQ7_PF, GPIO_FN_IRQ6_PF, GPIO_FN_IRQ5_PF, GPIO_FN_IRQ4_PF,
-        GPIO_FN_IRQ3_PJ, GPIO_FN_IRQ2_PJ, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ,
-        GPIO_FN_IRQ1_PC, GPIO_FN_IRQ0_PC,
-
-        GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG,
-        GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG, GPIO_FN_PINT0_PG,
-        GPIO_FN_PINT7_PH, GPIO_FN_PINT6_PH, GPIO_FN_PINT5_PH, GPIO_FN_PINT4_PH,
-        GPIO_FN_PINT3_PH, GPIO_FN_PINT2_PH, GPIO_FN_PINT1_PH, GPIO_FN_PINT0_PH,
-        GPIO_FN_PINT7_PJ, GPIO_FN_PINT6_PJ, GPIO_FN_PINT5_PJ, GPIO_FN_PINT4_PJ,
-        GPIO_FN_PINT3_PJ, GPIO_FN_PINT2_PJ, GPIO_FN_PINT1_PJ, GPIO_FN_PINT0_PJ,
-
-        /* WDT */
-        GPIO_FN_WDTOVF,
-
-        /* CAN */
-        GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,
-        GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, GPIO_FN_CRX0_CRX1_CRX2,
-
-        /* DMAC */
-        GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0,
-        GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1,
-
-        /* ADC */
-        GPIO_FN_ADTRG,
-
-        /* BSC */
-        GPIO_FN_A25, GPIO_FN_A24,
-        GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20,
-        GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16,
-        GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12,
-        GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8,
-        GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4,
-        GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0,
-        GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,
-        GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,
-        GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4,
-        GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0,
-
-        GPIO_FN_BS,
-        GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0,
-        GPIO_FN_CS5CE1A,
-        GPIO_FN_CE2A, GPIO_FN_CE2B,
-        GPIO_FN_RD, GPIO_FN_RDWR,
-        GPIO_FN_WE3ICIOWRAHDQMUU, GPIO_FN_WE2ICIORDDQMUL,
-        GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML,
-        GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE,
-        GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK,
-        GPIO_FN_IOIS16,
-
-        /* TMU */
-        GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A,
-        GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A,
-        GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A,
-        GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
-        GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,
-
-        /* SSU */
-        GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
-        GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
-        GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
-        GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,
-
-        /* SCIF */
-        GPIO_FN_SCK0, GPIO_FN_RXD0, GPIO_FN_TXD0,
-        GPIO_FN_SCK1, GPIO_FN_RXD1, GPIO_FN_TXD1, GPIO_FN_RTS1, GPIO_FN_CTS1,
-        GPIO_FN_SCK2, GPIO_FN_RXD2, GPIO_FN_TXD2,
-        GPIO_FN_SCK3, GPIO_FN_RXD3, GPIO_FN_TXD3,
-        GPIO_FN_SCK4, GPIO_FN_RXD4, GPIO_FN_TXD4,
-        GPIO_FN_SCK5, GPIO_FN_RXD5, GPIO_FN_TXD5, GPIO_FN_RTS5, GPIO_FN_CTS5,
-        GPIO_FN_SCK6, GPIO_FN_RXD6, GPIO_FN_TXD6,
-        GPIO_FN_SCK7, GPIO_FN_RXD7, GPIO_FN_TXD7, GPIO_FN_RTS7, GPIO_FN_CTS7,
-
-        /* RSPI */
-        GPIO_FN_MISO0_PJ19, GPIO_FN_MISO0_PB20,
-        GPIO_FN_MOSI0_PJ18, GPIO_FN_MOSI0_PB19,
-        GPIO_FN_SSL00_PJ17, GPIO_FN_SSL00_PB18,
-        GPIO_FN_RSPCK0_PJ16, GPIO_FN_RSPCK0_PB17,
-        GPIO_FN_RSPCK1, GPIO_FN_MOSI1,
-        GPIO_FN_MISO1, GPIO_FN_SSL10,
-
-        /* IIC3 */
-        GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2,
-        GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0,
-
-        /* SSI */
-        GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0,
-        GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3,
-        GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3,
-        GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3,
-        GPIO_FN_AUDIO_CLK,
-        GPIO_FN_AUDIO_XOUT,
-
-        /* SIOF */
-        GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK,
-
-        /* SPDIF */
-        GPIO_FN_SPDIF_IN,
-        GPIO_FN_SPDIF_OUT,
-
-        /* NANDFMC  */ /* NOTE Controller is not available in boot mode 0 */
-        GPIO_FN_FCE,
-        GPIO_FN_FRB,
-
-        /* VDC */
-        GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC,
-        GPIO_FN_DV_DATA23, GPIO_FN_DV_DATA22,
-        GPIO_FN_DV_DATA21, GPIO_FN_DV_DATA20,
-        GPIO_FN_DV_DATA19, GPIO_FN_DV_DATA18,
-        GPIO_FN_DV_DATA17, GPIO_FN_DV_DATA16,
-        GPIO_FN_DV_DATA15, GPIO_FN_DV_DATA14,
-        GPIO_FN_DV_DATA13, GPIO_FN_DV_DATA12,
-        GPIO_FN_DV_DATA11, GPIO_FN_DV_DATA10,
-        GPIO_FN_DV_DATA9, GPIO_FN_DV_DATA8,
-        GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6,
-        GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4,
-        GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2,
-        GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0,
-        GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK,
-        GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE,
-        GPIO_FN_LCD_DATA23_PG23, GPIO_FN_LCD_DATA22_PG22,
-        GPIO_FN_LCD_DATA21_PG21, GPIO_FN_LCD_DATA20_PG20,
-        GPIO_FN_LCD_DATA19_PG19, GPIO_FN_LCD_DATA18_PG18,
-        GPIO_FN_LCD_DATA17_PG17, GPIO_FN_LCD_DATA16_PG16,
-        GPIO_FN_LCD_DATA15_PG15, GPIO_FN_LCD_DATA14_PG14,
-        GPIO_FN_LCD_DATA13_PG13, GPIO_FN_LCD_DATA12_PG12,
-        GPIO_FN_LCD_DATA11_PG11, GPIO_FN_LCD_DATA10_PG10,
-        GPIO_FN_LCD_DATA9_PG9, GPIO_FN_LCD_DATA8_PG8,
-        GPIO_FN_LCD_DATA7_PG7, GPIO_FN_LCD_DATA6_PG6,
-        GPIO_FN_LCD_DATA5_PG5, GPIO_FN_LCD_DATA4_PG4,
-        GPIO_FN_LCD_DATA3_PG3, GPIO_FN_LCD_DATA2_PG2,
-        GPIO_FN_LCD_DATA1_PG1, GPIO_FN_LCD_DATA0_PG0,
-        GPIO_FN_LCD_DATA23_PJ23, GPIO_FN_LCD_DATA22_PJ22,
-        GPIO_FN_LCD_DATA21_PJ21, GPIO_FN_LCD_DATA20_PJ20,
-        GPIO_FN_LCD_DATA19_PJ19, GPIO_FN_LCD_DATA18_PJ18,
-        GPIO_FN_LCD_DATA17_PJ17, GPIO_FN_LCD_DATA16_PJ16,
-        GPIO_FN_LCD_DATA15_PJ15, GPIO_FN_LCD_DATA14_PJ14,
-        GPIO_FN_LCD_DATA13_PJ13, GPIO_FN_LCD_DATA12_PJ12,
-        GPIO_FN_LCD_DATA11_PJ11, GPIO_FN_LCD_DATA10_PJ10,
-        GPIO_FN_LCD_DATA9_PJ9, GPIO_FN_LCD_DATA8_PJ8,
-        GPIO_FN_LCD_DATA7_PJ7, GPIO_FN_LCD_DATA6_PJ6,
-        GPIO_FN_LCD_DATA5_PJ5, GPIO_FN_LCD_DATA4_PJ4,
-        GPIO_FN_LCD_DATA3_PJ3, GPIO_FN_LCD_DATA2_PJ2,
-        GPIO_FN_LCD_DATA1_PJ1, GPIO_FN_LCD_DATA0_PJ0,
-        GPIO_FN_LCD_M_DISP,
-};
-
-#endif /* __ASM_SH7269_H__ */
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h
index bccb4144a5e..24e28b91c9d 100644
--- a/arch/sh/include/cpu-sh3/cpu/dma.h
+++ b/arch/sh/include/cpu-sh3/cpu/dma.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_CPU_SH3_DMA_H
 #define __ASM_CPU_SH3_DMA_H
 
-#include <linux/sh_intc.h>
-
 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
     defined(CONFIG_CPU_SUBTYPE_SH7721) || \
     defined(CONFIG_CPU_SUBTYPE_SH7710) || \
@@ -12,7 +10,14 @@
 #define SH_DMAC_BASE0   0xa4000020
 #endif
 
-#define DMTE0_IRQ       evt2irq(0x800)
-#define DMTE4_IRQ       evt2irq(0xb80)
+#define DMTE0_IRQ       48
+#define DMTE4_IRQ       76
+
+/* Definitions for the SuperH DMAC */
+#define TM_BURST        0x00000020
+#define TS_8            0x00000000
+#define TS_16           0x00000008
+#define TS_32           0x00000010
+#define TS_128          0x00000018
 
 #endif /* __ASM_CPU_SH3_DMA_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h
index 02788b6a03b..18fa80aba15 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-register.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h
@@ -16,29 +16,45 @@
 
 #define DMAOR_INIT      DMAOR_DME
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7343)
+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7730)
 #define CHCR_TS_LOW_MASK        0x00000018
 #define CHCR_TS_LOW_SHIFT       3
 #define CHCR_TS_HIGH_MASK       0
 #define CHCR_TS_HIGH_SHIFT      0
 #elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7723) || \
         defined(CONFIG_CPU_SUBTYPE_SH7724) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7730) || \
         defined(CONFIG_CPU_SUBTYPE_SH7786)
 #define CHCR_TS_LOW_MASK        0x00000018
 #define CHCR_TS_LOW_SHIFT       3
 #define CHCR_TS_HIGH_MASK       0x00300000
 #define CHCR_TS_HIGH_SHIFT      (20 - 2)        /* 2 bits for shifted low TS */
-#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7763) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7764) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7780) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7785)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7764)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
 #define CHCR_TS_LOW_MASK        0x00000018
 #define CHCR_TS_LOW_SHIFT       3
 #define CHCR_TS_HIGH_MASK       0x00100000
 #define CHCR_TS_HIGH_SHIFT      (20 - 2)        /* 2 bits for shifted low TS */
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#else /* SH7785 */
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
 #endif
 
 /* Transmit sizes and respective CHCR register values */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h
index a520eb21962..ca747e93c2e 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma.h
@@ -1,17 +1,32 @@
 #ifndef __ASM_CPU_SH4_DMA_H
 #define __ASM_CPU_SH4_DMA_H
 
-#include <linux/sh_intc.h>
+/* SH7751/7760/7780 DMA IRQ sources */
 
+#ifdef CONFIG_CPU_SH4A
+
+#include <cpu/dma-sh4a.h>
+
+#else /* CONFIG_CPU_SH4A */
 /*
  * SH7750/SH7751/SH7760
  */
-#define DMTE0_IRQ       evt2irq(0x640)
-#define DMTE4_IRQ       evt2irq(0x780)
-#define DMTE6_IRQ       evt2irq(0x7c0)
-#define DMAE0_IRQ       evt2irq(0x6c0)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMTE6_IRQ       46
+#define DMAE0_IRQ       38
 
 #define SH_DMAC_BASE0   0xffa00000
 #define SH_DMAC_BASE1   0xffa00070
+/* Definitions for the SuperH DMAC */
+#define TM_BURST        0x00000080
+#define TS_8            0x00000010
+#define TS_16           0x00000020
+#define TS_32           0x00000030
+#define TS_64           0x00000000
+
+#define DMAOR_COD       0x00000008
+
+#endif
 
 #endif /* __ASM_CPU_SH4_DMA_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h
index 1631fc238e6..cffd25ed024 100644
--- a/arch/sh/include/cpu-sh4/cpu/freq.h
+++ b/arch/sh/include/cpu-sh4/cpu/freq.h
@@ -47,11 +47,6 @@
 #define MSTPCR1                 0xa4150034
 #define MSTPCR2                 0xa4150038
 
-#elif defined(CONFIG_CPU_SUBTYPE_SH7734)
-#define FRQCR0                  0xffc80000
-#define FRQCR2                  0xffc80008
-#define FRQMR1                  0xffc80014
-#define FRQMR2                  0xffc80018
 #elif defined(CONFIG_CPU_SUBTYPE_SH7785)
 #define FRQCR0                  0xffc80000
 #define FRQCR1                  0xffc80004
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h
index 3bb74e534d0..bd0622788d6 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7722.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h
@@ -222,11 +222,14 @@ enum {
 };
 
 enum {
-        HWBLK_URAM, HWBLK_XYMEM,
-        HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL,
-        HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_IIC, HWBLK_RTC,
-        HWBLK_SDHI, HWBLK_KEYSC,
-        HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU,
+        HWBLK_UNKNOWN = 0,
+        HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM,
+        HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI,
+        HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL,
+        HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO,
+        HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC,
+        HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC,
+        HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU,
         HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU,
         HWBLK_LCDC,
         HWBLK_NR,
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7723.h b/arch/sh/include/cpu-sh4/cpu/sh7723.h
index 6fae50cb1e9..9b36fae7232 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7723.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7723.h
@@ -266,9 +266,10 @@ enum {
 };
 
 enum {
+        HWBLK_UNKNOWN = 0,
         HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_L2C, HWBLK_ILMEM, HWBLK_FPU,
         HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
-        HWBLK_HUDI, HWBLK_UBC,
+        HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, HWBLK_SUBC,
         HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
         HWBLK_FLCTL,
         HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2,
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 38859f96d4e..cbc47e6bcab 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -268,9 +268,10 @@ enum {
 };
 
 enum {
+        HWBLK_UNKNOWN = 0,
         HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_RSMEM, HWBLK_ILMEM, HWBLK_L2C,
         HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
-        HWBLK_HUDI, HWBLK_UBC,
+        HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC,
         HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
         HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SCIF3,
         HWBLK_SCIF4, HWBLK_SCIF5, HWBLK_MSIOF0, HWBLK_MSIOF1,
@@ -313,6 +314,5 @@ enum {
 
 extern struct clk sh7724_fsimcka_clk;
 extern struct clk sh7724_fsimckb_clk;
-extern struct clk sh7724_dv_clki;
 
 #endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7734.h b/arch/sh/include/cpu-sh4/cpu/sh7734.h
deleted file mode 100644
index 2fb9a7b71b4..00000000000
--- a/arch/sh/include/cpu-sh4/cpu/sh7734.h
+++ /dev/null
@@ -1,306 +0,0 @@
-#ifndef __ASM_SH7734_H__
-#define __ASM_SH7734_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
- */
-enum {
-        GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
-        GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
-        GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
-        GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
-        GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
-        GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
-        GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
-        GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
-
-        GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
-        GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
-        GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
-        GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
-        GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
-        GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
-        GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,
-        GPIO_GP_1_28, GPIO_GP_1_29, GPIO_GP_1_30, GPIO_GP_1_31,
-
-        GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
-        GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
-        GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
-        GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
-        GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
-        GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
-        GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
-        GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,
-
-        GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
-        GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
-        GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
-        GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
-        GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
-        GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
-        GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
-        GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
-
-        GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
-        GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
-        GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
-        GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
-        GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
-        GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
-        GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
-        GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
-
-        GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
-        GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
-        GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
-
-        GPIO_FN_CLKOUT, GPIO_FN_BS, GPIO_FN_CS0, GPIO_FN_EX_CS0, GPIO_FN_RD,
-                GPIO_FN_WE0, GPIO_FN_WE1,
-
-        GPIO_FN_SCL0, GPIO_FN_PENC0, GPIO_FN_USB_OVC0,
-
-        GPIO_FN_IRQ2_B, GPIO_FN_IRQ3_B,
-
-        /* IPSR0 */
-        GPIO_FN_A15, GPIO_FN_ST0_VCO_CLKIN, GPIO_FN_LCD_DATA15_A,
-                GPIO_FN_TIOC3D_C,
-        GPIO_FN_A14, GPIO_FN_LCD_DATA14_A, GPIO_FN_TIOC3C_C,
-        GPIO_FN_A13, GPIO_FN_LCD_DATA13_A, GPIO_FN_TIOC3B_C,
-        GPIO_FN_A12, GPIO_FN_LCD_DATA12_A, GPIO_FN_TIOC3A_C,
-        GPIO_FN_A11, GPIO_FN_ST0_D7, GPIO_FN_LCD_DATA11_A,
-                GPIO_FN_TIOC2B_C,
-        GPIO_FN_A10, GPIO_FN_ST0_D6, GPIO_FN_LCD_DATA10_A,
-                GPIO_FN_TIOC2A_C,
-        GPIO_FN_A9, GPIO_FN_ST0_D5, GPIO_FN_LCD_DATA9_A,
-                GPIO_FN_TIOC1B_C,
-        GPIO_FN_A8, GPIO_FN_ST0_D4, GPIO_FN_LCD_DATA8_A,
-                GPIO_FN_TIOC1A_C,
-        GPIO_FN_A7, GPIO_FN_ST0_D3, GPIO_FN_LCD_DATA7_A, GPIO_FN_TIOC0D_C,
-        GPIO_FN_A6, GPIO_FN_ST0_D2, GPIO_FN_LCD_DATA6_A, GPIO_FN_TIOC0C_C,
-        GPIO_FN_A5, GPIO_FN_ST0_D1, GPIO_FN_LCD_DATA5_A, GPIO_FN_TIOC0B_C,
-        GPIO_FN_A4, GPIO_FN_ST0_D0, GPIO_FN_LCD_DATA4_A, GPIO_FN_TIOC0A_C,
-        GPIO_FN_A3, GPIO_FN_ST0_VLD, GPIO_FN_LCD_DATA3_A, GPIO_FN_TCLKD_C,
-        GPIO_FN_A2, GPIO_FN_ST0_SYC, GPIO_FN_LCD_DATA2_A, GPIO_FN_TCLKC_C,
-        GPIO_FN_A1, GPIO_FN_ST0_REQ, GPIO_FN_LCD_DATA1_A, GPIO_FN_TCLKB_C,
-        GPIO_FN_A0, GPIO_FN_ST0_CLKIN, GPIO_FN_LCD_DATA0_A, GPIO_FN_TCLKA_C,
-
-        /* IPSR1 */
-        GPIO_FN_D3, GPIO_FN_SD0_DAT3_A, GPIO_FN_MMC_D3_A, GPIO_FN_ST1_D6,
-                GPIO_FN_FD3_A,
-        GPIO_FN_D2, GPIO_FN_SD0_DAT2_A, GPIO_FN_MMC_D2_A, GPIO_FN_ST1_D5,
-                GPIO_FN_FD2_A,
-        GPIO_FN_D1, GPIO_FN_SD0_DAT1_A, GPIO_FN_MMC_D1_A, GPIO_FN_ST1_D4,
-                GPIO_FN_FD1_A,
-        GPIO_FN_D0, GPIO_FN_SD0_DAT0_A, GPIO_FN_MMC_D0_A, GPIO_FN_ST1_D3,
-                GPIO_FN_FD0_A,
-        GPIO_FN_A25, GPIO_FN_TX2_D, GPIO_FN_ST1_D2,
-        GPIO_FN_A24, GPIO_FN_RX2_D, GPIO_FN_ST1_D1,
-        GPIO_FN_A23, GPIO_FN_ST1_D0, GPIO_FN_LCD_M_DISP_A,
-        GPIO_FN_A22, GPIO_FN_ST1_VLD, GPIO_FN_LCD_VEPWC_A,
-        GPIO_FN_A21, GPIO_FN_ST1_SYC, GPIO_FN_LCD_VCPWC_A,
-        GPIO_FN_A20, GPIO_FN_ST1_REQ, GPIO_FN_LCD_FLM_A,
-        GPIO_FN_A19, GPIO_FN_ST1_CLKIN, GPIO_FN_LCD_CLK_A, GPIO_FN_TIOC4D_C,
-        GPIO_FN_A18, GPIO_FN_ST1_PWM, GPIO_FN_LCD_CL2_A, GPIO_FN_TIOC4C_C,
-        GPIO_FN_A17, GPIO_FN_ST1_VCO_CLKIN, GPIO_FN_LCD_CL1_A, GPIO_FN_TIOC4B_C,
-        GPIO_FN_A16, GPIO_FN_ST0_PWM, GPIO_FN_LCD_DON_A, GPIO_FN_TIOC4A_C,
-
-        /* IPSR2 */
-        GPIO_FN_D14, GPIO_FN_TX2_B, GPIO_FN_FSE_A, GPIO_FN_ET0_TX_CLK_B,
-        GPIO_FN_D13, GPIO_FN_RX2_B, GPIO_FN_FRB_A,      GPIO_FN_ET0_ETXD6_B,
-        GPIO_FN_D12, GPIO_FN_FWE_A, GPIO_FN_ET0_ETXD5_B,
-        GPIO_FN_D11, GPIO_FN_RSPI_MISO_A, GPIO_FN_QMI_QIO1_A,
-                GPIO_FN_FRE_A, GPIO_FN_ET0_ETXD3_B,
-        GPIO_FN_D10, GPIO_FN_RSPI_MOSI_A, GPIO_FN_QMO_QIO0_A,
-                GPIO_FN_FALE_A, GPIO_FN_ET0_ETXD2_B,
-        GPIO_FN_D9, GPIO_FN_SD0_CMD_A, GPIO_FN_MMC_CMD_A, GPIO_FN_QIO3_A,
-                GPIO_FN_FCLE_A, GPIO_FN_ET0_ETXD1_B,
-        GPIO_FN_D8, GPIO_FN_SD0_CLK_A, GPIO_FN_MMC_CLK_A, GPIO_FN_QIO2_A,
-                GPIO_FN_FCE_A, GPIO_FN_ET0_GTX_CLK_B,
-        GPIO_FN_D7, GPIO_FN_RSPI_SSL_A, GPIO_FN_MMC_D7_A, GPIO_FN_QSSL_A,
-                GPIO_FN_FD7_A,
-        GPIO_FN_D6, GPIO_FN_RSPI_RSPCK_A, GPIO_FN_MMC_D6_A, GPIO_FN_QSPCLK_A,
-                GPIO_FN_FD6_A,
-        GPIO_FN_D5, GPIO_FN_SD0_WP_A, GPIO_FN_MMC_D5_A, GPIO_FN_FD5_A,
-        GPIO_FN_D4, GPIO_FN_SD0_CD_A, GPIO_FN_MMC_D4_A, GPIO_FN_ST1_D7,
-                GPIO_FN_FD4_A,
-
-        /* IPSR3 */
-        GPIO_FN_DRACK0, GPIO_FN_SD1_DAT2_A, GPIO_FN_ATAG, GPIO_FN_TCLK1_A,
-                GPIO_FN_ET0_ETXD7,
-        GPIO_FN_EX_WAIT2, GPIO_FN_SD1_DAT1_A, GPIO_FN_DACK2, GPIO_FN_CAN1_RX_C,
-                GPIO_FN_ET0_MAGIC_C, GPIO_FN_ET0_ETXD6_A,
-        GPIO_FN_EX_WAIT1, GPIO_FN_SD1_DAT0_A, GPIO_FN_DREQ2, GPIO_FN_CAN1_TX_C,
-                GPIO_FN_ET0_LINK_C, GPIO_FN_ET0_ETXD5_A,
-        GPIO_FN_EX_WAIT0, GPIO_FN_TCLK1_B,
-        GPIO_FN_RD_WR, GPIO_FN_TCLK0,
-        GPIO_FN_EX_CS5, GPIO_FN_SD1_CMD_A, GPIO_FN_ATADIR, GPIO_FN_QSSL_B,
-                GPIO_FN_ET0_ETXD3_A,
-        GPIO_FN_EX_CS4, GPIO_FN_SD1_WP_A, GPIO_FN_ATAWR, GPIO_FN_QMI_QIO1_B,
-                GPIO_FN_ET0_ETXD2_A,
-        GPIO_FN_EX_CS3, GPIO_FN_SD1_CD_A, GPIO_FN_ATARD, GPIO_FN_QMO_QIO0_B,
-                GPIO_FN_ET0_ETXD1_A,
-        GPIO_FN_EX_CS2, GPIO_FN_TX3_B, GPIO_FN_ATACS1, GPIO_FN_QSPCLK_B,
-                GPIO_FN_ET0_GTX_CLK_A,
-        GPIO_FN_EX_CS1, GPIO_FN_RX3_B, GPIO_FN_ATACS0, GPIO_FN_QIO2_B,
-                GPIO_FN_ET0_ETXD0,
-        GPIO_FN_CS1_A26, GPIO_FN_QIO3_B,
-        GPIO_FN_D15, GPIO_FN_SCK2_B,
-
-        /* IPSR4 */
-        GPIO_FN_SCK2_A, GPIO_FN_VI0_G3,
-        GPIO_FN_RTS1_B, GPIO_FN_VI0_G2,
-        GPIO_FN_CTS1_B, GPIO_FN_VI0_DATA7_VI0_G1,
-        GPIO_FN_TX1_B, GPIO_FN_VI0_DATA6_VI0_G0, GPIO_FN_ET0_PHY_INT_A,
-        GPIO_FN_RX1_B, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_ET0_MAGIC_A,
-        GPIO_FN_SCK1_B, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ET0_LINK_A,
-        GPIO_FN_RTS0_B, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ET0_MDIO_A,
-        GPIO_FN_CTS0_B, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_RMII0_MDIO_A,
-                GPIO_FN_ET0_MDC,
-        GPIO_FN_HTX0_A, GPIO_FN_TX1_A, GPIO_FN_VI0_DATA1_VI0_B1,
-                GPIO_FN_RMII0_MDC_A, GPIO_FN_ET0_COL,
-        GPIO_FN_HRX0_A, GPIO_FN_RX1_A, GPIO_FN_VI0_DATA0_VI0_B0,
-                GPIO_FN_RMII0_CRS_DV_A, GPIO_FN_ET0_CRS,
-        GPIO_FN_HSCK0_A, GPIO_FN_SCK1_A, GPIO_FN_VI0_VSYNC,
-                GPIO_FN_RMII0_RX_ER_A, GPIO_FN_ET0_RX_ER,
-        GPIO_FN_HRTS0_A, GPIO_FN_RTS1_A, GPIO_FN_VI0_HSYNC,
-                GPIO_FN_RMII0_TXD_EN_A, GPIO_FN_ET0_RX_DV,
-        GPIO_FN_HCTS0_A, GPIO_FN_CTS1_A, GPIO_FN_VI0_FIELD,
-                GPIO_FN_RMII0_RXD1_A, GPIO_FN_ET0_ERXD7,
-
-        /* IPSR5 */
-        GPIO_FN_SD2_CLK_A, GPIO_FN_RX2_A, GPIO_FN_VI0_G4, GPIO_FN_ET0_RX_CLK_B,
-        GPIO_FN_SD2_CMD_A, GPIO_FN_TX2_A, GPIO_FN_VI0_G5, GPIO_FN_ET0_ERXD2_B,
-        GPIO_FN_SD2_DAT0_A, GPIO_FN_RX3_A, GPIO_FN_VI0_R0, GPIO_FN_ET0_ERXD3_B,
-        GPIO_FN_SD2_DAT1_A, GPIO_FN_TX3_A, GPIO_FN_VI0_R1, GPIO_FN_ET0_MDIO_B,
-        GPIO_FN_SD2_DAT2_A, GPIO_FN_RX4_A, GPIO_FN_VI0_R2, GPIO_FN_ET0_LINK_B,
-        GPIO_FN_SD2_DAT3_A, GPIO_FN_TX4_A, GPIO_FN_VI0_R3, GPIO_FN_ET0_MAGIC_B,
-        GPIO_FN_SD2_CD_A, GPIO_FN_RX5_A, GPIO_FN_VI0_R4, GPIO_FN_ET0_PHY_INT_B,
-        GPIO_FN_SD2_WP_A, GPIO_FN_TX5_A, GPIO_FN_VI0_R5,
-        GPIO_FN_REF125CK, GPIO_FN_ADTRG, GPIO_FN_RX5_C,
-        GPIO_FN_REF50CK, GPIO_FN_CTS1_E, GPIO_FN_HCTS0_D,
-
-        /* IPSR6 */
-        GPIO_FN_DU0_DR0, GPIO_FN_SCIF_CLK_B, GPIO_FN_HRX0_D, GPIO_FN_IETX_A,
-                GPIO_FN_TCLKA_A, GPIO_FN_HIFD00,
-        GPIO_FN_DU0_DR1, GPIO_FN_SCK0_B, GPIO_FN_HTX0_D, GPIO_FN_IERX_A,
-                GPIO_FN_TCLKB_A, GPIO_FN_HIFD01,
-        GPIO_FN_DU0_DR2, GPIO_FN_RX0_B, GPIO_FN_TCLKC_A, GPIO_FN_HIFD02,
-        GPIO_FN_DU0_DR3, GPIO_FN_TX0_B, GPIO_FN_TCLKD_A, GPIO_FN_HIFD03,
-        GPIO_FN_DU0_DR4, GPIO_FN_CTS0_C, GPIO_FN_TIOC0A_A, GPIO_FN_HIFD04,
-        GPIO_FN_DU0_DR5, GPIO_FN_RTS0_C, GPIO_FN_TIOC0B_A, GPIO_FN_HIFD05,
-        GPIO_FN_DU0_DR6, GPIO_FN_SCK1_C, GPIO_FN_TIOC0C_A, GPIO_FN_HIFD06,
-        GPIO_FN_DU0_DR7, GPIO_FN_RX1_C, GPIO_FN_TIOC0D_A, GPIO_FN_HIFD07,
-        GPIO_FN_DU0_DG0, GPIO_FN_TX1_C, GPIO_FN_HSCK0_D, GPIO_FN_IECLK_A,
-                GPIO_FN_TIOC1A_A, GPIO_FN_HIFD08,
-        GPIO_FN_DU0_DG1, GPIO_FN_CTS1_C, GPIO_FN_HRTS0_D, GPIO_FN_TIOC1B_A,
-                GPIO_FN_HIFD09,
-
-        /* IPSR7 */
-        GPIO_FN_DU0_DG2, GPIO_FN_RTS1_C, GPIO_FN_RMII0_MDC_B, GPIO_FN_TIOC2A_A,
-                GPIO_FN_HIFD10,
-        GPIO_FN_DU0_DG3, GPIO_FN_SCK2_C, GPIO_FN_RMII0_MDIO_B, GPIO_FN_TIOC2B_A,
-                GPIO_FN_HIFD11,
-        GPIO_FN_DU0_DG4, GPIO_FN_RX2_C, GPIO_FN_RMII0_CRS_DV_B,
-                GPIO_FN_TIOC3A_A, GPIO_FN_HIFD12,
-        GPIO_FN_DU0_DG5, GPIO_FN_TX2_C, GPIO_FN_RMII0_RX_ER_B,
-                GPIO_FN_TIOC3B_A, GPIO_FN_HIFD13,
-        GPIO_FN_DU0_DG6, GPIO_FN_RX3_C, GPIO_FN_RMII0_RXD0_B,
-                GPIO_FN_TIOC3C_A, GPIO_FN_HIFD14,
-        GPIO_FN_DU0_DG7, GPIO_FN_TX3_C, GPIO_FN_RMII0_RXD1_B,
-                GPIO_FN_TIOC3D_A, GPIO_FN_HIFD15,
-        GPIO_FN_DU0_DB0, GPIO_FN_RX4_C, GPIO_FN_RMII0_TXD_EN_B,
-                GPIO_FN_TIOC4A_A, GPIO_FN_HIFCS,
-        GPIO_FN_DU0_DB1, GPIO_FN_TX4_C, GPIO_FN_RMII0_TXD0_B,
-                GPIO_FN_TIOC4B_A, GPIO_FN_HIFRS,
-        GPIO_FN_DU0_DB2, GPIO_FN_RX5_B, GPIO_FN_RMII0_TXD1_B,
-                GPIO_FN_TIOC4C_A, GPIO_FN_HIFWR,
-        GPIO_FN_DU0_DB3, GPIO_FN_TX5_B, GPIO_FN_TIOC4D_A, GPIO_FN_HIFRD,
-        GPIO_FN_DU0_DB4, GPIO_FN_HIFINT,
-
-        /* IPSR8 */
-        GPIO_FN_DU0_DB5, GPIO_FN_HIFDREQ,
-        GPIO_FN_DU0_DB6, GPIO_FN_HIFRDY,
-        GPIO_FN_DU0_DB7, GPIO_FN_SSI_SCK0_B, GPIO_FN_HIFEBL_B,
-        GPIO_FN_DU0_DOTCLKIN, GPIO_FN_HSPI_CS0_C, GPIO_FN_SSI_WS0_B,
-        GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_HSPI_CLK0_C, GPIO_FN_SSI_SDATA0_B,
-        GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_HSPI_TX0_C, GPIO_FN_SSI_SCK1_B,
-        GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_HSPI_RX0_C, GPIO_FN_SSI_WS1_B,
-        GPIO_FN_DU0_EXODDF_DU0_ODDF, GPIO_FN_CAN0_RX_B, GPIO_FN_HSCK0_B,
-                GPIO_FN_SSI_SDATA1_B,
-        GPIO_FN_DU0_DISP, GPIO_FN_CAN0_TX_B, GPIO_FN_HRX0_B,
-                GPIO_FN_AUDIO_CLKA_B,
-        GPIO_FN_DU0_CDE, GPIO_FN_HTX0_B, GPIO_FN_AUDIO_CLKB_B,
-                GPIO_FN_LCD_VCPWC_B,
-        GPIO_FN_IRQ0_A, GPIO_FN_HSPI_TX_B, GPIO_FN_RX3_E, GPIO_FN_ET0_ERXD0,
-        GPIO_FN_IRQ1_A, GPIO_FN_HSPI_RX_B, GPIO_FN_TX3_E, GPIO_FN_ET0_ERXD1,
-        GPIO_FN_IRQ2_A, GPIO_FN_CTS0_A, GPIO_FN_HCTS0_B, GPIO_FN_ET0_ERXD2_A,
-        GPIO_FN_IRQ3_A, GPIO_FN_RTS0_A, GPIO_FN_HRTS0_B, GPIO_FN_ET0_ERXD3_A,
-
-        /* IPSR9 */
-        GPIO_FN_VI1_CLK_A, GPIO_FN_FD0_B, GPIO_FN_LCD_DATA0_B,
-        GPIO_FN_VI1_0_A, GPIO_FN_FD1_B, GPIO_FN_LCD_DATA1_B,
-        GPIO_FN_VI1_1_A, GPIO_FN_FD2_B, GPIO_FN_LCD_DATA2_B,
-        GPIO_FN_VI1_2_A, GPIO_FN_FD3_B, GPIO_FN_LCD_DATA3_B,
-        GPIO_FN_VI1_3_A, GPIO_FN_FD4_B, GPIO_FN_LCD_DATA4_B,
-        GPIO_FN_VI1_4_A, GPIO_FN_FD5_B, GPIO_FN_LCD_DATA5_B,
-        GPIO_FN_VI1_5_A, GPIO_FN_FD6_B, GPIO_FN_LCD_DATA6_B,
-        GPIO_FN_VI1_6_A, GPIO_FN_FD7_B, GPIO_FN_LCD_DATA7_B,
-        GPIO_FN_VI1_7_A, GPIO_FN_FCE_B, GPIO_FN_LCD_DATA8_B,
-        GPIO_FN_SSI_SCK0_A, GPIO_FN_TIOC1A_B, GPIO_FN_LCD_DATA9_B,
-        GPIO_FN_SSI_WS0_A, GPIO_FN_TIOC1B_B, GPIO_FN_LCD_DATA10_B,
-        GPIO_FN_SSI_SDATA0_A, GPIO_FN_VI1_0_B, GPIO_FN_TIOC2A_B,
-                GPIO_FN_LCD_DATA11_B,
-        GPIO_FN_SSI_SCK1_A, GPIO_FN_VI1_1_B, GPIO_FN_TIOC2B_B,
-                GPIO_FN_LCD_DATA12_B,
-        GPIO_FN_SSI_WS1_A, GPIO_FN_VI1_2_B, GPIO_FN_LCD_DATA13_B,
-        GPIO_FN_SSI_SDATA1_A, GPIO_FN_VI1_3_B, GPIO_FN_LCD_DATA14_B,
-
-        /* IPSR10 */
-        GPIO_FN_SSI_SCK23, GPIO_FN_VI1_4_B, GPIO_FN_RX1_D, GPIO_FN_FCLE_B,
-                GPIO_FN_LCD_DATA15_B,
-        GPIO_FN_SSI_WS23, GPIO_FN_VI1_5_B, GPIO_FN_TX1_D, GPIO_FN_HSCK0_C,
-                GPIO_FN_FALE_B, GPIO_FN_LCD_DON_B,
-        GPIO_FN_SSI_SDATA2, GPIO_FN_VI1_6_B, GPIO_FN_HRX0_C, GPIO_FN_FRE_B,
-                GPIO_FN_LCD_CL1_B,
-        GPIO_FN_SSI_SDATA3, GPIO_FN_VI1_7_B, GPIO_FN_HTX0_C, GPIO_FN_FWE_B,
-                GPIO_FN_LCD_CL2_B,
-        GPIO_FN_AUDIO_CLKA_A, GPIO_FN_VI1_CLK_B, GPIO_FN_SCK1_D,
-                GPIO_FN_IECLK_B, GPIO_FN_LCD_FLM_B,
-        GPIO_FN_AUDIO_CLKB_A, GPIO_FN_LCD_CLK_B,
-        GPIO_FN_AUDIO_CLKC, GPIO_FN_SCK1_E, GPIO_FN_HCTS0_C, GPIO_FN_FRB_B,
-                GPIO_FN_LCD_VEPWC_B,
-        GPIO_FN_AUDIO_CLKOUT, GPIO_FN_TX1_E, GPIO_FN_HRTS0_C, GPIO_FN_FSE_B,
-                GPIO_FN_LCD_M_DISP_B,
-        GPIO_FN_CAN_CLK_A, GPIO_FN_RX4_D,
-        GPIO_FN_CAN0_TX_A, GPIO_FN_TX4_D, GPIO_FN_MLB_CLK,
-        GPIO_FN_CAN1_RX_A, GPIO_FN_IRQ1_B,
-        GPIO_FN_CAN0_RX_A, GPIO_FN_IRQ0_B, GPIO_FN_MLB_SIG,
-        GPIO_FN_CAN1_TX_A, GPIO_FN_TX5_C, GPIO_FN_MLB_DAT,
-
-        /* IPSR11 */
-        GPIO_FN_SCL1, GPIO_FN_SCIF_CLK_C,
-        GPIO_FN_SDA1, GPIO_FN_RX1_E,
-        GPIO_FN_SDA0, GPIO_FN_HIFEBL_A,
-        GPIO_FN_SDSELF, GPIO_FN_RTS1_E,
-        GPIO_FN_SCIF_CLK_A, GPIO_FN_HSPI_CLK_A, GPIO_FN_VI0_CLK,
-                GPIO_FN_RMII0_TXD0_A, GPIO_FN_ET0_ERXD4,
-        GPIO_FN_SCK0_A, GPIO_FN_HSPI_CS_A, GPIO_FN_VI0_CLKENB,
-                GPIO_FN_RMII0_TXD1_A, GPIO_FN_ET0_ERXD5,
-        GPIO_FN_RX0_A, GPIO_FN_HSPI_RX_A, GPIO_FN_RMII0_RXD0_A,
-                GPIO_FN_ET0_ERXD6,
-        GPIO_FN_TX0_A, GPIO_FN_HSPI_TX_A,
-        GPIO_FN_PENC1, GPIO_FN_TX3_D, GPIO_FN_CAN1_TX_B, GPIO_FN_TX5_D,
-                GPIO_FN_IETX_B,
-        GPIO_FN_USB_OVC1, GPIO_FN_RX3_D, GPIO_FN_CAN1_RX_B, GPIO_FN_RX5_D,
-                GPIO_FN_IERX_B,
-        GPIO_FN_DREQ0, GPIO_FN_SD1_CLK_A, GPIO_FN_ET0_TX_EN,
-        GPIO_FN_DACK0, GPIO_FN_SD1_DAT3_A, GPIO_FN_ET0_TX_ER,
-        GPIO_FN_DREQ1, GPIO_FN_HSPI_CLK_B, GPIO_FN_RX4_B, GPIO_FN_ET0_PHY_INT_C,
-                GPIO_FN_ET0_TX_CLK_A,
-        GPIO_FN_DACK1, GPIO_FN_HSPI_CS_B, GPIO_FN_TX4_B, GPIO_FN_ET0_RX_CLK_A,
-        GPIO_FN_PRESETOUT, GPIO_FN_ST_CLKOUT,
-
-};
-
-#endif /* __ASM_SH7734_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h
index 5340f3bc186..41f9f8b9db7 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7757.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h
@@ -283,7 +283,5 @@ enum {
         SHDMA_SLAVE_RIIC8_RX,
         SHDMA_SLAVE_RIIC9_TX,
         SHDMA_SLAVE_RIIC9_RX,
-        SHDMA_SLAVE_RSPI_TX,
-        SHDMA_SLAVE_RSPI_RX,
 };
 #endif /* __ASM_SH7757_H__ */
diff --git a/arch/sh/include/cpu-sh4a/cpu/dma.h b/arch/sh/include/cpu-sh4a/cpu/dma.h
deleted file mode 100644
index 89afb650ce2..00000000000
--- a/arch/sh/include/cpu-sh4a/cpu/dma.h
+++ /dev/null
@@ -1,72 +0,0 @@
-#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
-#define __ASM_SH_CPU_SH4_DMA_SH7780_H
-
-#include <linux/sh_intc.h>
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7730)
-#define DMTE0_IRQ       evt2irq(0x800)
-#define DMTE4_IRQ       evt2irq(0xb80)
-#define DMAE0_IRQ       evt2irq(0xbc0)  /* DMA Error IRQ*/
-#define SH_DMAC_BASE0   0xFE008020
-#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
-#define DMTE0_IRQ       evt2irq(0x800)
-#define DMTE4_IRQ       evt2irq(0xb80)
-#define DMAE0_IRQ       evt2irq(0xbc0)  /* DMA Error IRQ*/
-#define SH_DMAC_BASE0   0xFE008020
-#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
-        defined(CONFIG_CPU_SUBTYPE_SH7764)
-#define DMTE0_IRQ       evt2irq(0x640)
-#define DMTE4_IRQ       evt2irq(0x780)
-#define DMAE0_IRQ       evt2irq(0x6c0)
-#define SH_DMAC_BASE0   0xFF608020
-#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
-#define DMTE0_IRQ       evt2irq(0x800)  /* DMAC0A*/
-#define DMTE4_IRQ       evt2irq(0xb80)  /* DMAC0B */
-#define DMTE6_IRQ       evt2irq(0x700)
-#define DMTE8_IRQ       evt2irq(0x740)  /* DMAC1A */
-#define DMTE9_IRQ       evt2irq(0x760)
-#define DMTE10_IRQ      evt2irq(0xb00)  /* DMAC1B */
-#define DMTE11_IRQ      evt2irq(0xb20)
-#define DMAE0_IRQ       evt2irq(0xbc0)  /* DMA Error IRQ*/
-#define DMAE1_IRQ       evt2irq(0xb40)  /* DMA Error IRQ*/
-#define SH_DMAC_BASE0   0xFE008020
-#define SH_DMAC_BASE1   0xFDC08020
-#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
-#define DMTE0_IRQ       evt2irq(0x800)  /* DMAC0A*/
-#define DMTE4_IRQ       evt2irq(0xb80)  /* DMAC0B */
-#define DMTE6_IRQ       evt2irq(0x700)
-#define DMTE8_IRQ       evt2irq(0x740)  /* DMAC1A */
-#define DMTE9_IRQ       evt2irq(0x760)
-#define DMTE10_IRQ      evt2irq(0xb00)  /* DMAC1B */
-#define DMTE11_IRQ      evt2irq(0xb20)
-#define DMAE0_IRQ       evt2irq(0xbc0)  /* DMA Error IRQ*/
-#define DMAE1_IRQ       evt2irq(0xb40)  /* DMA Error IRQ*/
-#define SH_DMAC_BASE0   0xFE008020
-#define SH_DMAC_BASE1   0xFDC08020
-#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
-#define DMTE0_IRQ       evt2irq(0x640)
-#define DMTE4_IRQ       evt2irq(0x780)
-#define DMTE6_IRQ       evt2irq(0x7c0)
-#define DMTE8_IRQ       evt2irq(0xd80)
-#define DMTE9_IRQ       evt2irq(0xda0)
-#define DMTE10_IRQ      evt2irq(0xdc0)
-#define DMTE11_IRQ      evt2irq(0xde0)
-#define DMAE0_IRQ       evt2irq(0x6c0)  /* DMA Error IRQ */
-#define SH_DMAC_BASE0   0xFC808020
-#define SH_DMAC_BASE1   0xFC818020
-#else /* SH7785 */
-#define DMTE0_IRQ       evt2irq(0x620)
-#define DMTE4_IRQ       evt2irq(0x6a0)
-#define DMTE6_IRQ       evt2irq(0x880)
-#define DMTE8_IRQ       evt2irq(0x8c0)
-#define DMTE9_IRQ       evt2irq(0x8e0)
-#define DMTE10_IRQ      evt2irq(0x900)
-#define DMTE11_IRQ      evt2irq(0x920)
-#define DMAE0_IRQ       evt2irq(0x6e0)  /* DMA Error IRQ0 */
-#define DMAE1_IRQ       evt2irq(0x940)  /* DMA Error IRQ1 */
-#define SH_DMAC_BASE0   0xFC808020
-#define SH_DMAC_BASE1   0xFCC08020
-#endif
-
-#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/mach-common/mach/hp6xx.h b/arch/sh/include/mach-common/mach/hp6xx.h
index 6aaaf8596e6..bcc301ac12f 100644
--- a/arch/sh/include/mach-common/mach/hp6xx.h
+++ b/arch/sh/include/mach-common/mach/hp6xx.h
@@ -9,11 +9,10 @@
  * for more details.
  *
  */
-#include <linux/sh_intc.h>
 
-#define HP680_BTN_IRQ           evt2irq(0x600)  /* IRQ0_IRQ */
-#define HP680_TS_IRQ            evt2irq(0x660)  /* IRQ3_IRQ */
-#define HP680_HD64461_IRQ       evt2irq(0x680)  /* IRQ4_IRQ */
+#define HP680_BTN_IRQ           32      /* IRQ0_IRQ */
+#define HP680_TS_IRQ            35      /* IRQ3_IRQ */
+#define HP680_HD64461_IRQ       36      /* IRQ4_IRQ */
 
 #define DAC_LCD_BRIGHTNESS      0
 #define DAC_SPEAKER_VOLUME      1
diff --git a/arch/sh/include/mach-common/mach/lboxre2.h b/arch/sh/include/mach-common/mach/lboxre2.h
index 3a4dcc5c74e..e6d16050492 100644
--- a/arch/sh/include/mach-common/mach/lboxre2.h
+++ b/arch/sh/include/mach-common/mach/lboxre2.h
@@ -11,14 +11,13 @@
  * for more details.
  *
  */
-#include <linux/sh_intc.h>
 
-#define IRQ_CF1         evt2irq(0x320)  /* CF1 */
-#define IRQ_CF0         evt2irq(0x340)  /* CF0 */
-#define IRQ_INTD        evt2irq(0x360)  /* INTD */
-#define IRQ_ETH1        evt2irq(0x380)  /* Ether1 */
-#define IRQ_ETH0        evt2irq(0x3a0)  /* Ether0 */
-#define IRQ_INTA        evt2irq(0x3c0)  /* INTA */
+#define IRQ_CF1         9       /* CF1 */
+#define IRQ_CF0         10      /* CF0 */
+#define IRQ_INTD        11      /* INTD */
+#define IRQ_ETH1        12      /* Ether1 */
+#define IRQ_ETH0        13      /* Ether0 */
+#define IRQ_INTA        14      /* INTA */
 
 void init_lboxre2_IRQ(void);
 
diff --git a/arch/sh/include/mach-common/mach/mangle-port.h b/arch/sh/include/mach-common/mach/mangle-port.h
deleted file mode 100644
index 4ca1769a0f1..00000000000
--- a/arch/sh/include/mach-common/mach/mangle-port.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * SH version cribbed from the MIPS copy:
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003, 2004 Ralf Baechle
- */
-#ifndef __MACH_COMMON_MANGLE_PORT_H
-#define __MACH_COMMON_MANGLE_PORT_H
-
-/*
- * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
- * less sane hardware forces software to fiddle with this...
- *
- * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
- * you can't have the numerical value of data and byte addresses within
- * multibyte quantities both preserved at the same time.  Hence two
- * variations of functions: non-prefixed ones that preserve the value
- * and prefixed ones that preserve byte addresses.  The latters are
- * typically used for moving raw data between a peripheral and memory (cf.
- * string I/O functions), hence the "__mem_" prefix.
- */
-#if defined(CONFIG_SWAP_IO_SPACE)
-
-# define ioswabb(x)             (x)
-# define __mem_ioswabb(x)       (x)
-# define ioswabw(x)             le16_to_cpu(x)
-# define __mem_ioswabw(x)       (x)
-# define ioswabl(x)             le32_to_cpu(x)
-# define __mem_ioswabl(x)       (x)
-# define ioswabq(x)             le64_to_cpu(x)
-# define __mem_ioswabq(x)       (x)
-
-#else
-
-# define ioswabb(x)             (x)
-# define __mem_ioswabb(x)       (x)
-# define ioswabw(x)             (x)
-# define __mem_ioswabw(x)       cpu_to_le16(x)
-# define ioswabl(x)             (x)
-# define __mem_ioswabl(x)       cpu_to_le32(x)
-# define ioswabq(x)             (x)
-# define __mem_ioswabq(x)       cpu_to_le32(x)
-
-#endif
-
-#endif /* __MACH_COMMON_MANGLE_PORT_H */
diff --git a/arch/sh/include/mach-common/mach/sdk7780.h b/arch/sh/include/mach-common/mach/sdk7780.h
index ce64e02e9b5..697dc865f21 100644
--- a/arch/sh/include/mach-common/mach/sdk7780.h
+++ b/arch/sh/include/mach-common/mach/sdk7780.h
@@ -11,7 +11,6 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#include <linux/sh_intc.h>
 #include <asm/addrspace.h>
 
 /* Box specific addresses.  */
@@ -68,9 +67,9 @@
 
 #define SDK7780_NR_IRL                  15
 /* IDE/ATA interrupt */
-#define IRQ_CFCARD                      evt2irq(0x3c0)
+#define IRQ_CFCARD                              14
 /* SMC interrupt */
-#define IRQ_ETHERNET                    evt2irq(0x2c0)
+#define IRQ_ETHERNET                    6
 
 
 /* arch/sh/boards/renesas/sdk7780/irq.c */
diff --git a/arch/sh/include/mach-common/mach/titan.h b/arch/sh/include/mach-common/mach/titan.h
index fa3cd801cf2..4a674d27cbb 100644
--- a/arch/sh/include/mach-common/mach/titan.h
+++ b/arch/sh/include/mach-common/mach/titan.h
@@ -4,16 +4,14 @@
 #ifndef _ASM_SH_TITAN_H
 #define _ASM_SH_TITAN_H
 
-#include <linux/sh_intc.h>
-
 #define __IO_PREFIX titan
 #include <asm/io_generic.h>
 
 /* IRQ assignments */
-#define TITAN_IRQ_WAN           evt2irq(0x240)  /* eth0 (WAN) */
-#define TITAN_IRQ_LAN           evt2irq(0x2a0)  /* eth1 (LAN) */
-#define TITAN_IRQ_MPCIA         evt2irq(0x300)  /* mPCI A */
-#define TITAN_IRQ_MPCIB         evt2irq(0x360)  /* mPCI B */
-#define TITAN_IRQ_USB           evt2irq(0x360)  /* USB */
+#define TITAN_IRQ_WAN           2       /* eth0 (WAN) */
+#define TITAN_IRQ_LAN           5       /* eth1 (LAN) */
+#define TITAN_IRQ_MPCIA         8       /* mPCI A */
+#define TITAN_IRQ_MPCIB         11      /* mPCI B */
+#define TITAN_IRQ_USB           11      /* USB */
 
 #endif /* __ASM_SH_TITAN_H */
diff --git a/arch/sh/include/mach-dreamcast/mach/dma.h b/arch/sh/include/mach-dreamcast/mach/dma.h
index 1dbfdf701c9..ddd68e78870 100644
--- a/arch/sh/include/mach-dreamcast/mach/dma.h
+++ b/arch/sh/include/mach-dreamcast/mach/dma.h
@@ -11,7 +11,9 @@
 #define __ASM_SH_DREAMCAST_DMA_H
 
 /* Number of DMA channels */
+#define ONCHIP_NR_DMA_CHANNELS  4
 #define G2_NR_DMA_CHANNELS      4
+#define PVR2_NR_DMA_CHANNELS    1
 
 /* Channels for cascading */
 #define PVR2_CASCADE_CHAN       2
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h
index 60f3e8af05f..d63ef51ec18 100644
--- a/arch/sh/include/mach-ecovec24/mach/romimage.h
+++ b/arch/sh/include/mach-ecovec24/mach/romimage.h
@@ -6,7 +6,7 @@
  */
 
 #include <asm/romimage-macros.h>
-#include <mach/partner-jet-setup.txt>
+#include "partner-jet-setup.txt"
 
         /* execute icbi after enabling cache */
         mov.l   1f, r0
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
index c20c9e5f5ea..07e635b0e04 100644
--- a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
+++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
@@ -4,19 +4,21 @@
 #include <video/sh_mobile_lcdc.h>
 
 #if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE)
-int kfr2r09_lcd_set_brightness(int brightness);
-int kfr2r09_lcd_setup(void *sys_ops_handle,
+void kfr2r09_lcd_on(void *board_data, struct fb_info *info);
+void kfr2r09_lcd_off(void *board_data);
+int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
                       struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
-void kfr2r09_lcd_start(void *sys_ops_handle,
+void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
                        struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
 #else
-static int kfr2r09_lcd_set_brightness(int brightness) {}
-static int kfr2r09_lcd_setup(void *sys_ops_handle,
+static void kfr2r09_lcd_on(void *board_data) {}
+static void kfr2r09_lcd_off(void *board_data) {}
+static int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
                                 struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
 {
         return -ENODEV;
 }
-static void kfr2r09_lcd_start(void *sys_ops_handle,
+static void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
                                 struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
 {
 }
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h
index 1afae21ced5..7a883167c84 100644
--- a/arch/sh/include/mach-kfr2r09/mach/romimage.h
+++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h
@@ -6,7 +6,7 @@
  */
 
 #include <asm/romimage-macros.h>
-#include <mach/partner-jet-setup.txt>
+#include "partner-jet-setup.txt"
 
         /* execute icbi after enabling cache */
         mov.l   1f, r0
diff --git a/arch/sh/include/mach-landisk/mach/iodata_landisk.h b/arch/sh/include/mach-landisk/mach/iodata_landisk.h
index ceeea48cc7a..f432773a957 100644
--- a/arch/sh/include/mach-landisk/mach/iodata_landisk.h
+++ b/arch/sh/include/mach-landisk/mach/iodata_landisk.h
@@ -8,7 +8,6 @@
  *
  * IO-DATA LANDISK support
  */
-#include <linux/sh_intc.h>
 
 /* Box specific addresses.  */
 
@@ -26,15 +25,15 @@
 #define PA_PIDE_OFFSET  0x40            /* CF IDE Offset */
 #define PA_SIDE_OFFSET  0x40            /* HDD IDE Offset */
 
-#define IRQ_PCIINTA     evt2irq(0x2a0)  /* PCI INTA IRQ */
-#define IRQ_PCIINTB     evt2irq(0x2c0)  /* PCI INTB IRQ */
-#define IRQ_PCIINTC     evt2irq(0x2e0)  /* PCI INTC IRQ */
-#define IRQ_PCIINTD     evt2irq(0x300)  /* PCI INTD IRQ */
-#define IRQ_ATA         evt2irq(0x320)  /* ATA IRQ */
-#define IRQ_FATA        evt2irq(0x340)  /* FATA IRQ */
-#define IRQ_POWER       evt2irq(0x360)  /* Power Switch IRQ */
-#define IRQ_BUTTON      evt2irq(0x380)  /* USL-5P Button IRQ */
-#define IRQ_FAULT       evt2irq(0x3a0)  /* USL-5P Fault  IRQ */
+#define IRQ_PCIINTA     5               /* PCI INTA IRQ */
+#define IRQ_PCIINTB     6               /* PCI INTB IRQ */
+#define IRQ_PCIINTC     7               /* PCI INTC IRQ */
+#define IRQ_PCIINTD     8               /* PCI INTD IRQ */
+#define IRQ_ATA         9               /* ATA IRQ */
+#define IRQ_FATA        10              /* FATA IRQ */
+#define IRQ_POWER       11              /* Power Switch IRQ */
+#define IRQ_BUTTON      12              /* USL-5P Button IRQ */
+#define IRQ_FAULT       13              /* USL-5P Fault  IRQ */
 
 void init_landisk_IRQ(void);
 
diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h
index 7de7bb74c29..42fccf93412 100644
--- a/arch/sh/include/mach-migor/mach/migor.h
+++ b/arch/sh/include/mach-migor/mach/migor.h
@@ -9,7 +9,7 @@
 
 #include <video/sh_mobile_lcdc.h>
 
-int migor_lcd_qvga_setup(void *sys_ops_handle,
+int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
                          struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
 
 #endif /* __ASM_SH_MIGOR_H */
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h
index 8a6d44b4987..14be91c5a2f 100644
--- a/arch/sh/include/mach-se/mach/se.h
+++ b/arch/sh/include/mach-se/mach/se.h
@@ -8,7 +8,6 @@
  *
  * Hitachi SolutionEngine support
  */
-#include <linux/sh_intc.h>
 
 /* Box specific addresses.  */
 
@@ -83,16 +82,16 @@
 #define INTC_IPRD       0xa4000018UL
 #define INTC_IPRE       0xa400001aUL
 
-#define IRQ0_IRQ        evt2irq(0x600)
-#define IRQ1_IRQ        evt2irq(0x620)
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
 #endif
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
-#define IRQ_STNIC       evt2irq(0x380)
-#define IRQ_CFCARD      evt2irq(0x3c0)
+#define IRQ_STNIC       12
+#define IRQ_CFCARD      14
 #else
-#define IRQ_STNIC       evt2irq(0x340)
-#define IRQ_CFCARD      evt2irq(0x2e0)
+#define IRQ_STNIC       10
+#define IRQ_CFCARD      7
 #endif
 
 /* SH Ether support (SH7710/SH7712) */
@@ -106,9 +105,9 @@
 # define PHY_ID 0x01
 #endif
 /* Ether IRQ */
-#define SH_ETH0_IRQ     evt2irq(0xc00)
-#define SH_ETH1_IRQ     evt2irq(0xc20)
-#define SH_TSU_IRQ      evt2irq(0xc40)
+#define SH_ETH0_IRQ     80
+#define SH_ETH1_IRQ     81
+#define SH_TSU_IRQ      82
 
 void init_se_IRQ(void);
 
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 542521c970c..8d8170d6cc4 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -8,7 +8,6 @@
  *
  * SH-Mobile SolutionEngine 7343 support
  */
-#include <linux/sh_intc.h>
 
 /* Box specific addresses.  */
 
@@ -50,6 +49,9 @@
 #define PA_LED          0xb0C00000      /* LED */
 #define LED_SHIFT       0
 #define PA_DIPSW        0xb0900000      /* Dip switch 31 */
+#define PA_CPLD_MODESET 0xb1400004      /* CPLD Mode set register */
+#define PA_CPLD_ST      0xb1400008      /* CPLD Interrupt status register */
+#define PA_CPLD_IMSK    0xb140000a      /* CPLD Interrupt mask register */
 /* Area 5 */
 #define PA_EXT5         0x14000000
 #define PA_EXT5_SIZE    0x04000000
@@ -116,10 +118,10 @@
 #define FPGA_IN         0xb1400000
 #define FPGA_OUT        0xb1400002
 
-#define IRQ0_IRQ        evt2irq(0x600)
-#define IRQ1_IRQ        evt2irq(0x620)
-#define IRQ4_IRQ        evt2irq(0x680)
-#define IRQ5_IRQ        evt2irq(0x6a0)
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
+#define IRQ4_IRQ        36
+#define IRQ5_IRQ        37
 
 #define SE7343_FPGA_IRQ_MRSHPC0 0
 #define SE7343_FPGA_IRQ_MRSHPC1 1
@@ -132,10 +134,8 @@
 
 #define SE7343_FPGA_IRQ_NR      12
 
-struct irq_domain;
-
 /* arch/sh/boards/se/7343/irq.c */
-extern struct irq_domain *se7343_irq_domain;
+extern unsigned int se7343_fpga_irq[];
 
 void init_7343se_IRQ(void);
 
diff --git a/arch/sh/include/mach-se/mach/se7721.h b/arch/sh/include/mach-se/mach/se7721.h
index eabd0538de4..b957f604119 100644
--- a/arch/sh/include/mach-se/mach/se7721.h
+++ b/arch/sh/include/mach-se/mach/se7721.h
@@ -11,8 +11,6 @@
 
 #ifndef __ASM_SH_SE7721_H
 #define __ASM_SH_SE7721_H
-
-#include <linux/sh_intc.h>
 #include <asm/addrspace.h>
 
 /* Box specific addresses. */
@@ -51,9 +49,9 @@
 #define MRSHPC_PCIC_INFO        (PA_MRSHPC + 30)
 
 #define PA_LED          0xB6800000      /* 8bit LED */
-#define PA_FPGA         0xB7000000      /* FPGA base address */
+#define PA_FPGA         0xB7000000      /* FPGA base address */
 
-#define MRSHPC_IRQ0     evt2irq(0x340)
+#define MRSHPC_IRQ0     10
 
 #define FPGA_ILSR1      (PA_FPGA + 0x02)
 #define FPGA_ILSR2      (PA_FPGA + 0x03)
diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h
index 637e7ac753f..16505bfb8a9 100644
--- a/arch/sh/include/mach-se/mach/se7722.h
+++ b/arch/sh/include/mach-se/mach/se7722.h
@@ -13,7 +13,6 @@
  * for more details.
  *
  */
-#include <linux/sh_intc.h>
 #include <asm/addrspace.h>
 
 /* Box specific addresses.  */
@@ -32,7 +31,7 @@
 
 #define PA_PERIPHERAL   0xB0000000
 
-#define PA_PCIC         PA_PERIPHERAL           /* MR-SHPC-01 PCMCIA */
+#define PA_PCIC         PA_PERIPHERAL                   /* MR-SHPC-01 PCMCIA */
 #define PA_MRSHPC       (PA_PERIPHERAL + 0x003fffe0)    /* MR-SHPC-01 PCMCIA controller */
 #define PA_MRSHPC_MW1   (PA_PERIPHERAL + 0x00400000)    /* MR-SHPC-01 memory window base */
 #define PA_MRSHPC_MW2   (PA_PERIPHERAL + 0x00500000)    /* MR-SHPC-01 attribute window base */
@@ -52,7 +51,7 @@
 #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
 
 #define PA_LED          (PA_PERIPHERAL + 0x00800000)    /* 8bit LED */
-#define PA_FPGA         (PA_PERIPHERAL + 0x01800000)    /* FPGA base address */
+#define PA_FPGA         (PA_PERIPHERAL + 0x01800000)    /* FPGA base address */
 
 #define PA_LAN          (PA_AREA6_IO + 0)               /* SMC LAN91C111 */
 /* GPIO */
@@ -78,8 +77,14 @@
 #define PORT_HIZCRC     0xA405015CUL
 
 /* IRQ */
-#define IRQ0_IRQ        evt2irq(0x600)
-#define IRQ1_IRQ        evt2irq(0x620)
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
+
+#define IRQ01_MODE      0xb1800000
+#define IRQ01_STS       0xb1800004
+#define IRQ01_MASK      0xb1800008
+
+/* Bits in IRQ01_* registers */
 
 #define SE7722_FPGA_IRQ_USB     0 /* IRQ0 */
 #define SE7722_FPGA_IRQ_SMC     1 /* IRQ0 */
@@ -89,10 +94,8 @@
 #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */
 #define SE7722_FPGA_IRQ_NR      6
 
-struct irq_domain;
-
 /* arch/sh/boards/se/7722/irq.c */
-extern struct irq_domain *se7722_irq_domain;
+extern unsigned int se7722_fpga_irq[];
 
 void init_se7722_IRQ(void);
 
diff --git a/arch/sh/include/mach-se/mach/se7724.h b/arch/sh/include/mach-se/mach/se7724.h
index be842dd1ca0..29514a39d0f 100644
--- a/arch/sh/include/mach-se/mach/se7724.h
+++ b/arch/sh/include/mach-se/mach/se7724.h
@@ -18,7 +18,6 @@
  * for more details.
  *
  */
-#include <linux/sh_intc.h>
 #include <asm/addrspace.h>
 
 /* SH Eth */
@@ -36,9 +35,9 @@
 #define IRQ2_MR         (0xba200028)
 
 /* IRQ */
-#define IRQ0_IRQ        evt2irq(0x600)
-#define IRQ1_IRQ        evt2irq(0x620)
-#define IRQ2_IRQ        evt2irq(0x640)
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
+#define IRQ2_IRQ        34
 
 /* Bits in IRQ012 registers */
 #define SE7724_FPGA_IRQ_BASE    220
diff --git a/arch/sh/include/mach-se/mach/se7751.h b/arch/sh/include/mach-se/mach/se7751.h
index 271871793d5..b36792ac5d6 100644
--- a/arch/sh/include/mach-se/mach/se7751.h
+++ b/arch/sh/include/mach-se/mach/se7751.h
@@ -11,7 +11,6 @@
  * Modified for 7751 Solution Engine by
  * Ian da Silva and Jeremy Siegel, 2001.
  */
-#include <linux/sh_intc.h>
 
 /* Box specific addresses.  */
 
@@ -64,7 +63,7 @@
 #define BCR_ILCRF       (PA_BCR + 10)
 #define BCR_ILCRG       (PA_BCR + 12)
 
-#define IRQ_79C973      evt2irq(0x3a0)
+#define IRQ_79C973      13
 
 void init_7751se_IRQ(void);
 
diff --git a/arch/sh/include/mach-se/mach/se7780.h b/arch/sh/include/mach-se/mach/se7780.h
index bde357cf81b..40e9b41458c 100644
--- a/arch/sh/include/mach-se/mach/se7780.h
+++ b/arch/sh/include/mach-se/mach/se7780.h
@@ -12,7 +12,6 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#include <linux/sh_intc.h>
 #include <asm/addrspace.h>
 
 /* Box specific addresses.  */
@@ -81,13 +80,13 @@
 #define IRQPOS_PCCPW            (0 * 4)
 
 /* IDE interrupt */
-#define IRQ_IDE0                evt2irq(0xa60) /* iVDR */
+#define IRQ_IDE0                67 /* iVDR */
 
 /* SMC interrupt */
-#define SMC_IRQ                 evt2irq(0x300)
+#define SMC_IRQ                 8
 
 /* SM501 interrupt */
-#define SM501_IRQ               evt2irq(0x200)
+#define SM501_IRQ               0
 
 /* interrupt pin */
 #define IRQPIN_EXTINT1          0 /* IRQ0 pin */
diff --git a/arch/sh/include/uapi/asm/Kbuild b/arch/sh/include/uapi/asm/Kbuild
deleted file mode 100644
index 60613ae7851..00000000000
--- a/arch/sh/include/uapi/asm/Kbuild
+++ /dev/null
@@ -1,25 +0,0 @@
-# UAPI Header export list
-include include/uapi/asm-generic/Kbuild.asm
-
-header-y += auxvec.h
-header-y += byteorder.h
-header-y += cachectl.h
-header-y += cpu-features.h
-header-y += hw_breakpoint.h
-header-y += ioctls.h
-header-y += posix_types.h
-header-y += posix_types_32.h
-header-y += posix_types_64.h
-header-y += ptrace.h
-header-y += ptrace_32.h
-header-y += ptrace_64.h
-header-y += setup.h
-header-y += sigcontext.h
-header-y += signal.h
-header-y += sockios.h
-header-y += stat.h
-header-y += swab.h
-header-y += types.h
-header-y += unistd.h
-header-y += unistd_32.h
-header-y += unistd_64.h
diff --git a/arch/sh/include/uapi/asm/auxvec.h b/arch/sh/include/uapi/asm/auxvec.h
deleted file mode 100644
index 8bcc51af936..00000000000
--- a/arch/sh/include/uapi/asm/auxvec.h
+++ /dev/null
@@ -1,38 +0,0 @@
-#ifndef __ASM_SH_AUXVEC_H
-#define __ASM_SH_AUXVEC_H
-
-/*
- * Architecture-neutral AT_ values in 0-17, leave some room
- * for more of them.
- */
-
-/*
- * This entry gives some information about the FPU initialization
- * performed by the kernel.
- */
-#define AT_FPUCW                18      /* Used FPU control word.  */
-
-#if defined(CONFIG_VSYSCALL) || !defined(__KERNEL__)
-/*
- * Only define this in the vsyscall case, the entry point to
- * the vsyscall page gets placed here. The kernel will attempt
- * to build a gate VMA we don't care about otherwise..
- */
-#define AT_SYSINFO_EHDR         33
-#endif
-
-/*
- * More complete cache descriptions than AT_[DIU]CACHEBSIZE.  If the
- * value is -1, then the cache doesn't exist.  Otherwise:
- *
- *    bit 0-3:    Cache set-associativity; 0 means fully associative.
- *    bit 4-7:    Log2 of cacheline size.
- *    bit 8-31:   Size of the entire cache >> 8.
- */
-#define AT_L1I_CACHESHAPE       34
-#define AT_L1D_CACHESHAPE       35
-#define AT_L2_CACHESHAPE        36
-
-#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
-
-#endif /* __ASM_SH_AUXVEC_H */
diff --git a/arch/sh/include/uapi/asm/byteorder.h b/arch/sh/include/uapi/asm/byteorder.h
deleted file mode 100644
index db2f5d7cb17..00000000000
--- a/arch/sh/include/uapi/asm/byteorder.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef __ASM_SH_BYTEORDER_H
-#define __ASM_SH_BYTEORDER_H
-
-#ifdef __LITTLE_ENDIAN__
-#include <linux/byteorder/little_endian.h>
-#else
-#include <linux/byteorder/big_endian.h>
-#endif
-
-#endif /* __ASM_SH_BYTEORDER_H */
diff --git a/arch/sh/include/uapi/asm/cachectl.h b/arch/sh/include/uapi/asm/cachectl.h
deleted file mode 100644
index 6ffb4b7a212..00000000000
--- a/arch/sh/include/uapi/asm/cachectl.h
+++ /dev/null
@@ -1,19 +0,0 @@
-#ifndef _SH_CACHECTL_H
-#define _SH_CACHECTL_H
-
-/* Definitions for the cacheflush system call.  */
-
-#define CACHEFLUSH_D_INVAL      0x1     /* invalidate (without write back) */
-#define CACHEFLUSH_D_WB         0x2     /* write back (without invalidate) */
-#define CACHEFLUSH_D_PURGE      0x3     /* writeback and invalidate */
-
-#define CACHEFLUSH_I            0x4
-
-/*
- * Options for cacheflush system call
- */
-#define ICACHE  CACHEFLUSH_I            /* flush instruction cache */
-#define DCACHE  CACHEFLUSH_D_PURGE      /* writeback and flush data cache */
-#define BCACHE  (ICACHE|DCACHE)         /* flush both caches */
-
-#endif /* _SH_CACHECTL_H */
diff --git a/arch/sh/include/uapi/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h
deleted file mode 100644
index 694abe490ed..00000000000
--- a/arch/sh/include/uapi/asm/cpu-features.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __ASM_SH_CPU_FEATURES_H
-#define __ASM_SH_CPU_FEATURES_H
-
-/*
- * Processor flags
- *
- * Note: When adding a new flag, keep cpu_flags[] in
- * arch/sh/kernel/setup.c in sync so symbolic name
- * mapping of the processor flags has a chance of being
- * reasonably accurate.
- *
- * These flags are also available through the ELF
- * auxiliary vector as AT_HWCAP.
- */
-#define CPU_HAS_FPU             0x0001  /* Hardware FPU support */
-#define CPU_HAS_P2_FLUSH_BUG    0x0002  /* Need to flush the cache in P2 area */
-#define CPU_HAS_MMU_PAGE_ASSOC  0x0004  /* SH3: TLB way selection bit support */
-#define CPU_HAS_DSP             0x0008  /* SH-DSP: DSP support */
-#define CPU_HAS_PERF_COUNTER    0x0010  /* Hardware performance counters */
-#define CPU_HAS_PTEA            0x0020  /* PTEA register */
-#define CPU_HAS_LLSC            0x0040  /* movli.l/movco.l */
-#define CPU_HAS_L2_CACHE        0x0080  /* Secondary cache / URAM */
-#define CPU_HAS_OP32            0x0100  /* 32-bit instruction support */
-#define CPU_HAS_PTEAEX          0x0200  /* PTE ASID Extension support */
-
-#endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/include/uapi/asm/hw_breakpoint.h b/arch/sh/include/uapi/asm/hw_breakpoint.h
deleted file mode 100644
index ae5704fa77a..00000000000
--- a/arch/sh/include/uapi/asm/hw_breakpoint.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * There isn't anything here anymore, but the file must not be empty or patch
- * will delete it.
- */
diff --git a/arch/sh/include/uapi/asm/ioctls.h b/arch/sh/include/uapi/asm/ioctls.h
deleted file mode 100644
index 34224107976..00000000000
--- a/arch/sh/include/uapi/asm/ioctls.h
+++ /dev/null
@@ -1,110 +0,0 @@
-#ifndef __ASM_SH_IOCTLS_H
-#define __ASM_SH_IOCTLS_H
-
-#include <asm/ioctl.h>
-
-#define FIOCLEX         _IO('f', 1)
-#define FIONCLEX        _IO('f', 2)
-#define FIOASYNC        _IOW('f', 125, int)
-#define FIONBIO         _IOW('f', 126, int)
-#define FIONREAD        _IOR('f', 127, int)
-#define TIOCINQ         FIONREAD
-#define FIOQSIZE        _IOR('f', 128, loff_t)
-
-#define TCGETS          0x5401
-#define TCSETS          0x5402
-#define TCSETSW         0x5403
-#define TCSETSF         0x5404
-
-#define TCGETA          0x80127417      /* _IOR('t', 23, struct termio) */
-#define TCSETA          0x40127418      /* _IOW('t', 24, struct termio) */
-#define TCSETAW         0x40127419      /* _IOW('t', 25, struct termio) */
-#define TCSETAF         0x4012741C      /* _IOW('t', 28, struct termio) */
-
-#define TCSBRK          _IO('t', 29)
-#define TCXONC          _IO('t', 30)
-#define TCFLSH          _IO('t', 31)
-
-#define TIOCSWINSZ      0x40087467      /* _IOW('t', 103, struct winsize) */
-#define TIOCGWINSZ      0x80087468      /* _IOR('t', 104, struct winsize) */
-#define TIOCSTART       _IO('t', 110)           /* start output, like ^Q */
-#define TIOCSTOP        _IO('t', 111)           /* stop output, like ^S */
-#define TIOCOUTQ        _IOR('t', 115, int)     /* output queue size */
-
-#define TIOCSPGRP       _IOW('t', 118, int)
-#define TIOCGPGRP       _IOR('t', 119, int)
-
-#define TIOCEXCL        _IO('T', 12) /* 0x540C */
-#define TIOCNXCL        _IO('T', 13) /* 0x540D */
-#define TIOCSCTTY       _IO('T', 14) /* 0x540E */
-
-#define TIOCSTI         _IOW('T', 18, char) /* 0x5412 */
-#define TIOCMGET        _IOR('T', 21, unsigned int) /* 0x5415 */
-#define TIOCMBIS        _IOW('T', 22, unsigned int) /* 0x5416 */
-#define TIOCMBIC        _IOW('T', 23, unsigned int) /* 0x5417 */
-#define TIOCMSET        _IOW('T', 24, unsigned int) /* 0x5418 */
-# define TIOCM_LE       0x001
-# define TIOCM_DTR      0x002
-# define TIOCM_RTS      0x004
-# define TIOCM_ST       0x008
-# define TIOCM_SR       0x010
-# define TIOCM_CTS      0x020
-# define TIOCM_CAR      0x040
-# define TIOCM_RNG      0x080
-# define TIOCM_DSR      0x100
-# define TIOCM_CD       TIOCM_CAR
-# define TIOCM_RI       TIOCM_RNG
-
-#define TIOCGSOFTCAR    _IOR('T', 25, unsigned int) /* 0x5419 */
-#define TIOCSSOFTCAR    _IOW('T', 26, unsigned int) /* 0x541A */
-#define TIOCLINUX       _IOW('T', 28, char) /* 0x541C */
-#define TIOCCONS        _IO('T', 29) /* 0x541D */
-#define TIOCGSERIAL     0x803C541E      /* _IOR('T', 30, struct serial_struct) 0x541E */
-#define TIOCSSERIAL     0x403C541F      /* _IOW('T', 31, struct serial_struct) 0x541F */
-#define TIOCPKT         _IOW('T', 32, int) /* 0x5420 */
-# define TIOCPKT_DATA            0
-# define TIOCPKT_FLUSHREAD       1
-# define TIOCPKT_FLUSHWRITE      2
-# define TIOCPKT_STOP            4
-# define TIOCPKT_START           8
-# define TIOCPKT_NOSTOP         16
-# define TIOCPKT_DOSTOP         32
-# define TIOCPKT_IOCTL          64
-
-
-#define TIOCNOTTY       _IO('T', 34) /* 0x5422 */
-#define TIOCSETD        _IOW('T', 35, int) /* 0x5423 */
-#define TIOCGETD        _IOR('T', 36, int) /* 0x5424 */
-#define TCSBRKP         _IOW('T', 37, int) /* 0x5425 */ /* Needed for POSIX tcsendbreak() */
-#define TIOCSBRK        _IO('T', 39) /* 0x5427 */ /* BSD compatibility */
-#define TIOCCBRK        _IO('T', 40) /* 0x5428 */ /* BSD compatibility */
-#define TIOCGSID        _IOR('T', 41, pid_t) /* 0x5429 */ /* Return the session ID of FD */
-#define TCGETS2         _IOR('T', 42, struct termios2)
-#define TCSETS2         _IOW('T', 43, struct termios2)
-#define TCSETSW2        _IOW('T', 44, struct termios2)
-#define TCSETSF2        _IOW('T', 45, struct termios2)
-#define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
-#define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
-#define TIOCGDEV        _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
-#define TIOCSIG         _IOW('T',0x36, int)  /* Generate signal on Pty slave */
-#define TIOCVHANGUP     _IO('T', 0x37)
-#define TIOCGPKT        _IOR('T', 0x38, int) /* Get packet mode state */
-#define TIOCGPTLCK      _IOR('T', 0x39, int) /* Get Pty lock state */
-#define TIOCGEXCL       _IOR('T', 0x40, int) /* Get exclusive mode state */
-
-#define TIOCSERCONFIG   _IO('T', 83) /* 0x5453 */
-#define TIOCSERGWILD    _IOR('T', 84,  int) /* 0x5454 */
-#define TIOCSERSWILD    _IOW('T', 85,  int) /* 0x5455 */
-#define TIOCGLCKTRMIOS  0x5456
-#define TIOCSLCKTRMIOS  0x5457
-#define TIOCSERGSTRUCT  0x80d85458      /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */
-#define TIOCSERGETLSR   _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */
-  /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-# define TIOCSER_TEMT    0x01   /* Transmitter physically empty */
-#define TIOCSERGETMULTI 0x80A8545A      /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */
-#define TIOCSERSETMULTI 0x40A8545B      /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */
-
-#define TIOCMIWAIT      _IO('T', 92) /* 0x545C */       /* wait for a change on serial input line(s) */
-#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
-
-#endif /* __ASM_SH_IOCTLS_H */
diff --git a/arch/sh/include/uapi/asm/posix_types.h b/arch/sh/include/uapi/asm/posix_types.h
deleted file mode 100644
index dc55e5adfe1..00000000000
--- a/arch/sh/include/uapi/asm/posix_types.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __KERNEL__
-# ifdef __SH5__
-#  include <asm/posix_types_64.h>
-# else
-#  include <asm/posix_types_32.h>
-# endif
-#endif /* __KERNEL__ */
diff --git a/arch/sh/include/uapi/asm/posix_types_32.h b/arch/sh/include/uapi/asm/posix_types_32.h
deleted file mode 100644
index ba0bdc423b0..00000000000
--- a/arch/sh/include/uapi/asm/posix_types_32.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __ASM_SH_POSIX_TYPES_32_H
-#define __ASM_SH_POSIX_TYPES_32_H
-
-typedef unsigned short  __kernel_mode_t;
-#define __kernel_mode_t __kernel_mode_t
-typedef unsigned short  __kernel_ipc_pid_t;
-#define __kernel_ipc_pid_t __kernel_ipc_pid_t
-typedef unsigned short  __kernel_uid_t;
-#define __kernel_uid_t __kernel_uid_t
-typedef unsigned short  __kernel_gid_t;
-#define __kernel_gid_t __kernel_gid_t
-
-typedef unsigned short  __kernel_old_uid_t;
-#define __kernel_old_uid_t __kernel_old_uid_t
-typedef unsigned short  __kernel_old_gid_t;
-#define __kernel_old_gid_t __kernel_old_gid_t
-typedef unsigned short  __kernel_old_dev_t;
-#define __kernel_old_dev_t __kernel_old_dev_t
-
-#include <asm-generic/posix_types.h>
-
-#endif /* __ASM_SH_POSIX_TYPES_32_H */
diff --git a/arch/sh/include/uapi/asm/posix_types_64.h b/arch/sh/include/uapi/asm/posix_types_64.h
deleted file mode 100644
index 244f7e950e1..00000000000
--- a/arch/sh/include/uapi/asm/posix_types_64.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef __ASM_SH_POSIX_TYPES_64_H
-#define __ASM_SH_POSIX_TYPES_64_H
-
-typedef unsigned short  __kernel_mode_t;
-#define __kernel_mode_t __kernel_mode_t
-typedef unsigned short  __kernel_ipc_pid_t;
-#define __kernel_ipc_pid_t __kernel_ipc_pid_t
-typedef unsigned short  __kernel_uid_t;
-#define __kernel_uid_t __kernel_uid_t
-typedef unsigned short  __kernel_gid_t;
-#define __kernel_gid_t __kernel_gid_t
-typedef long unsigned int       __kernel_size_t;
-#define __kernel_size_t __kernel_size_t
-typedef int             __kernel_ssize_t;
-#define __kernel_ssize_t __kernel_ssize_t
-typedef int             __kernel_ptrdiff_t;
-#define __kernel_ptrdiff_t __kernel_ptrdiff_t
-
-typedef unsigned short  __kernel_old_uid_t;
-#define __kernel_old_uid_t __kernel_old_uid_t
-typedef unsigned short  __kernel_old_gid_t;
-#define __kernel_old_gid_t __kernel_old_gid_t
-typedef unsigned short  __kernel_old_dev_t;
-#define __kernel_old_dev_t __kernel_old_dev_t
-
-#include <asm-generic/posix_types.h>
-
-#endif /* __ASM_SH_POSIX_TYPES_64_H */
diff --git a/arch/sh/include/uapi/asm/ptrace.h b/arch/sh/include/uapi/asm/ptrace.h
deleted file mode 100644
index 8b8c5aca9c2..00000000000
--- a/arch/sh/include/uapi/asm/ptrace.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) 1999, 2000  Niibe Yutaka
- */
-#ifndef _UAPI__ASM_SH_PTRACE_H
-#define _UAPI__ASM_SH_PTRACE_H
-
-
-#define PTRACE_GETREGS          12      /* General registers */
-#define PTRACE_SETREGS          13
-
-#define PTRACE_GETFPREGS        14      /* FPU registers */
-#define PTRACE_SETFPREGS        15
-
-#define PTRACE_GETFDPIC         31      /* get the ELF fdpic loadmap address */
-
-#define PTRACE_GETFDPIC_EXEC    0       /* [addr] request the executable loadmap */
-#define PTRACE_GETFDPIC_INTERP  1       /* [addr] request the interpreter loadmap */
-
-#define PTRACE_GETDSPREGS       55      /* DSP registers */
-#define PTRACE_SETDSPREGS       56
-
-#define PT_TEXT_END_ADDR        240
-#define PT_TEXT_ADDR            244     /* &(struct user)->start_code */
-#define PT_DATA_ADDR            248     /* &(struct user)->start_data */
-#define PT_TEXT_LEN             252
-
-#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
-#include <asm/ptrace_64.h>
-#else
-#include <asm/ptrace_32.h>
-#endif
-
-
-#endif /* _UAPI__ASM_SH_PTRACE_H */
diff --git a/arch/sh/include/uapi/asm/ptrace_32.h b/arch/sh/include/uapi/asm/ptrace_32.h
deleted file mode 100644
index 926e0cefc2b..00000000000
--- a/arch/sh/include/uapi/asm/ptrace_32.h
+++ /dev/null
@@ -1,77 +0,0 @@
-#ifndef _UAPI__ASM_SH_PTRACE_32_H
-#define _UAPI__ASM_SH_PTRACE_32_H
-
-/*
- * GCC defines register number like this:
- * -----------------------------
- *       0 - 15 are integer registers
- *      17 - 22 are control/special registers
- *      24 - 39 fp registers
- *      40 - 47 xd registers
- *      48 -    fpscr register
- * -----------------------------
- *
- * We follows above, except:
- *      16 --- program counter (PC)
- *      22 --- syscall #
- *      23 --- floating point communication register
- */
-#define REG_REG0         0
-#define REG_REG15       15
-
-#define REG_PC          16
-
-#define REG_PR          17
-#define REG_SR          18
-#define REG_GBR         19
-#define REG_MACH        20
-#define REG_MACL        21
-
-#define REG_SYSCALL     22
-
-#define REG_FPREG0      23
-#define REG_FPREG15     38
-#define REG_XFREG0      39
-#define REG_XFREG15     54
-
-#define REG_FPSCR       55
-#define REG_FPUL        56
-
-/*
- * This struct defines the way the registers are stored on the
- * kernel stack during a system call or other kernel entry.
- */
-struct pt_regs {
-        unsigned long regs[16];
-        unsigned long pc;
-        unsigned long pr;
-        unsigned long sr;
-        unsigned long gbr;
-        unsigned long mach;
-        unsigned long macl;
-        long tra;
-};
-
-/*
- * This struct defines the way the DSP registers are stored on the
- * kernel stack during a system call or other kernel entry.
- */
-struct pt_dspregs {
-        unsigned long   a1;
-        unsigned long   a0g;
-        unsigned long   a1g;
-        unsigned long   m0;
-        unsigned long   m1;
-        unsigned long   a0;
-        unsigned long   x0;
-        unsigned long   x1;
-        unsigned long   y0;
-        unsigned long   y1;
-        unsigned long   dsr;
-        unsigned long   rs;
-        unsigned long   re;
-        unsigned long   mod;
-};
-
-
-#endif /* _UAPI__ASM_SH_PTRACE_32_H */
diff --git a/arch/sh/include/uapi/asm/ptrace_64.h b/arch/sh/include/uapi/asm/ptrace_64.h
deleted file mode 100644
index 0e52ee83e94..00000000000
--- a/arch/sh/include/uapi/asm/ptrace_64.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef _UAPI__ASM_SH_PTRACE_64_H
-#define _UAPI__ASM_SH_PTRACE_64_H
-
-struct pt_regs {
-        unsigned long long pc;
-        unsigned long long sr;
-        long long syscall_nr;
-        unsigned long long regs[63];
-        unsigned long long tregs[8];
-        unsigned long long pad[2];
-};
-
-
-#endif /* _UAPI__ASM_SH_PTRACE_64_H */
diff --git a/arch/sh/include/uapi/asm/setup.h b/arch/sh/include/uapi/asm/setup.h
deleted file mode 100644
index 552df83f1a4..00000000000
--- a/arch/sh/include/uapi/asm/setup.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/setup.h>
diff --git a/arch/sh/include/uapi/asm/sigcontext.h b/arch/sh/include/uapi/asm/sigcontext.h
deleted file mode 100644
index 8ce1435bc0b..00000000000
--- a/arch/sh/include/uapi/asm/sigcontext.h
+++ /dev/null
@@ -1,40 +0,0 @@
-#ifndef __ASM_SH_SIGCONTEXT_H
-#define __ASM_SH_SIGCONTEXT_H
-
-struct sigcontext {
-        unsigned long   oldmask;
-
-#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
-        /* CPU registers */
-        unsigned long long sc_regs[63];
-        unsigned long long sc_tregs[8];
-        unsigned long long sc_pc;
-        unsigned long long sc_sr;
-
-        /* FPU registers */
-        unsigned long long sc_fpregs[32];
-        unsigned int sc_fpscr;
-        unsigned int sc_fpvalid;
-#else
-        /* CPU registers */
-        unsigned long sc_regs[16];
-        unsigned long sc_pc;
-        unsigned long sc_pr;
-        unsigned long sc_sr;
-        unsigned long sc_gbr;
-        unsigned long sc_mach;
-        unsigned long sc_macl;
-
-#if defined(__SH4__) || defined(CONFIG_CPU_SH4) || \
-    defined(__SH2A__) || defined(CONFIG_CPU_SH2A)
-        /* FPU registers */
-        unsigned long sc_fpregs[16];
-        unsigned long sc_xfpregs[16];
-        unsigned int sc_fpscr;
-        unsigned int sc_fpul;
-        unsigned int sc_ownedfp;
-#endif
-#endif
-};
-
-#endif /* __ASM_SH_SIGCONTEXT_H */
diff --git a/arch/sh/include/uapi/asm/signal.h b/arch/sh/include/uapi/asm/signal.h
deleted file mode 100644
index 9ac530a90bc..00000000000
--- a/arch/sh/include/uapi/asm/signal.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef __ASM_SH_SIGNAL_H
-#define __ASM_SH_SIGNAL_H
-
-#define SA_RESTORER     0x04000000
-
-#include <asm-generic/signal.h>
-
-struct old_sigaction {
-        __sighandler_t sa_handler;
-        old_sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-};
-
-#endif /* __ASM_SH_SIGNAL_H */
diff --git a/arch/sh/include/uapi/asm/sockios.h b/arch/sh/include/uapi/asm/sockios.h
deleted file mode 100644
index cf8b96b1f9a..00000000000
--- a/arch/sh/include/uapi/asm/sockios.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_SH_SOCKIOS_H
-#define __ASM_SH_SOCKIOS_H
-
-/* Socket-level I/O control calls. */
-#define FIOGETOWN       _IOR('f', 123, int)
-#define FIOSETOWN       _IOW('f', 124, int)
-
-#define SIOCATMARK      _IOR('s', 7, int)
-#define SIOCSPGRP       _IOW('s', 8, pid_t)
-#define SIOCGPGRP       _IOR('s', 9, pid_t)
-
-#define SIOCGSTAMP      _IOR('s', 100, struct timeval) /* Get stamp (timeval) */
-#define SIOCGSTAMPNS    _IOR('s', 101, struct timespec) /* Get stamp (timespec) */
-#endif /* __ASM_SH_SOCKIOS_H */
diff --git a/arch/sh/include/uapi/asm/stat.h b/arch/sh/include/uapi/asm/stat.h
deleted file mode 100644
index e1810cc6e3d..00000000000
--- a/arch/sh/include/uapi/asm/stat.h
+++ /dev/null
@@ -1,138 +0,0 @@
-#ifndef __ASM_SH_STAT_H
-#define __ASM_SH_STAT_H
-
-struct __old_kernel_stat {
-        unsigned short st_dev;
-        unsigned short st_ino;
-        unsigned short st_mode;
-        unsigned short st_nlink;
-        unsigned short st_uid;
-        unsigned short st_gid;
-        unsigned short st_rdev;
-        unsigned long  st_size;
-        unsigned long  st_atime;
-        unsigned long  st_mtime;
-        unsigned long  st_ctime;
-};
-
-#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
-struct stat {
-        unsigned short st_dev;
-        unsigned short __pad1;
-        unsigned long st_ino;
-        unsigned short st_mode;
-        unsigned short st_nlink;
-        unsigned short st_uid;
-        unsigned short st_gid;
-        unsigned short st_rdev;
-        unsigned short __pad2;
-        unsigned long  st_size;
-        unsigned long  st_blksize;
-        unsigned long  st_blocks;
-        unsigned long  st_atime;
-        unsigned long  st_atime_nsec;
-        unsigned long  st_mtime;
-        unsigned long  st_mtime_nsec;
-        unsigned long  st_ctime;
-        unsigned long  st_ctime_nsec;
-        unsigned long  __unused4;
-        unsigned long  __unused5;
-};
-
-/* This matches struct stat64 in glibc2.1, hence the absolutely
- * insane amounts of padding around dev_t's.
- */
-struct stat64 {
-        unsigned short  st_dev;
-        unsigned char   __pad0[10];
-
-        unsigned long   st_ino;
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-
-        unsigned long   st_uid;
-        unsigned long   st_gid;
-
-        unsigned short  st_rdev;
-        unsigned char   __pad3[10];
-
-        long long       st_size;
-        unsigned long   st_blksize;
-
-        unsigned long   st_blocks;      /* Number 512-byte blocks allocated. */
-        unsigned long   __pad4;         /* future possible st_blocks high bits */
-
-        unsigned long   st_atime;
-        unsigned long   st_atime_nsec;
-
-        unsigned long   st_mtime;
-        unsigned long   st_mtime_nsec;
-
-        unsigned long   st_ctime;
-        unsigned long   st_ctime_nsec;  /* will be high 32 bits of ctime someday */
-
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-#else
-struct stat {
-        unsigned long  st_dev;
-        unsigned long  st_ino;
-        unsigned short st_mode;
-        unsigned short st_nlink;
-        unsigned short st_uid;
-        unsigned short st_gid;
-        unsigned long  st_rdev;
-        unsigned long  st_size;
-        unsigned long  st_blksize;
-        unsigned long  st_blocks;
-        unsigned long  st_atime;
-        unsigned long  st_atime_nsec;
-        unsigned long  st_mtime;
-        unsigned long  st_mtime_nsec;
-        unsigned long  st_ctime;
-        unsigned long  st_ctime_nsec;
-        unsigned long  __unused4;
-        unsigned long  __unused5;
-};
-
-/* This matches struct stat64 in glibc2.1, hence the absolutely
- * insane amounts of padding around dev_t's.
- */
-struct stat64 {
-        unsigned long long      st_dev;
-        unsigned char   __pad0[4];
-
-#define STAT64_HAS_BROKEN_ST_INO        1
-        unsigned long   __st_ino;
-
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-
-        unsigned long   st_uid;
-        unsigned long   st_gid;
-
-        unsigned long long      st_rdev;
-        unsigned char   __pad3[4];
-
-        long long       st_size;
-        unsigned long   st_blksize;
-
-        unsigned long long      st_blocks;      /* Number 512-byte blocks allocated. */
-
-        unsigned long   st_atime;
-        unsigned long   st_atime_nsec;
-
-        unsigned long   st_mtime;
-        unsigned long   st_mtime_nsec;
-
-        unsigned long   st_ctime;
-        unsigned long   st_ctime_nsec;
-
-        unsigned long long      st_ino;
-};
-
-#define STAT_HAVE_NSEC 1
-#endif
-
-#endif /* __ASM_SH_STAT_H */
diff --git a/arch/sh/include/uapi/asm/swab.h b/arch/sh/include/uapi/asm/swab.h
deleted file mode 100644
index 1cd09767a7a..00000000000
--- a/arch/sh/include/uapi/asm/swab.h
+++ /dev/null
@@ -1,59 +0,0 @@
-#ifndef __ASM_SH_SWAB_H
-#define __ASM_SH_SWAB_H
-
-/*
- * Copyright (C) 1999  Niibe Yutaka
- * Copyright (C) 2000, 2001  Paolo Alberelli
- */
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <asm-generic/swab.h>
-
-static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
-{
-        __asm__(
-#ifdef __SH5__
-                "byterev        %1, %0\n\t"
-                "shari          %0, 32, %0"
-#else
-                "swap.b         %1, %0\n\t"
-                "swap.w         %0, %0\n\t"
-                "swap.b         %0, %0"
-#endif
-                : "=r" (x)
-                : "r" (x));
-
-        return x;
-}
-#define __arch_swab32 __arch_swab32
-
-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
-{
-        __asm__(
-#ifdef __SH5__
-                "byterev        %1, %0\n\t"
-                "shari          %0, 32, %0"
-#else
-                "swap.b         %1, %0"
-#endif
-                : "=r" (x)
-                :  "r" (x));
-
-        return x;
-}
-#define __arch_swab16 __arch_swab16
-
-static inline __u64 __arch_swab64(__u64 val)
-{
-        union {
-                struct { __u32 a,b; } s;
-                __u64 u;
-        } v, w;
-        v.u = val;
-        w.s.b = __arch_swab32(v.s.a);
-        w.s.a = __arch_swab32(v.s.b);
-        return w.u;
-}
-#define __arch_swab64 __arch_swab64
-
-#endif /* __ASM_SH_SWAB_H */
diff --git a/arch/sh/include/uapi/asm/types.h b/arch/sh/include/uapi/asm/types.h
deleted file mode 100644
index b9e79bc580d..00000000000
--- a/arch/sh/include/uapi/asm/types.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/types.h>
diff --git a/arch/sh/include/uapi/asm/unistd.h b/arch/sh/include/uapi/asm/unistd.h
deleted file mode 100644
index eeef88dd53c..00000000000
--- a/arch/sh/include/uapi/asm/unistd.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __KERNEL__
-# ifdef __SH5__
-#  include <asm/unistd_64.h>
-# else
-#  include <asm/unistd_32.h>
-# endif
-#endif
diff --git a/arch/sh/include/uapi/asm/unistd_32.h b/arch/sh/include/uapi/asm/unistd_32.h
deleted file mode 100644
index 9e465f246dc..00000000000
--- a/arch/sh/include/uapi/asm/unistd_32.h
+++ /dev/null
@@ -1,385 +0,0 @@
-#ifndef __ASM_SH_UNISTD_32_H
-#define __ASM_SH_UNISTD_32_H
-
-/*
- * Copyright (C) 1999  Niibe Yutaka
- */
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall      0
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_waitpid              7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_time                13
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_lchown              16
-                                 /* 17 was sys_break */
-#define __NR_oldstat             18
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_setuid              23
-#define __NR_getuid              24
-#define __NR_stime               25
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_oldfstat            28
-#define __NR_pause               29
-#define __NR_utime               30
-                                 /* 31 was sys_stty */
-                                 /* 32 was sys_gtty */
-#define __NR_access              33
-#define __NR_nice                34
-                                 /* 35 was sys_ftime */
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-                                 /* 44 was sys_prof */
-#define __NR_brk                 45
-#define __NR_setgid              46
-#define __NR_getgid              47
-#define __NR_signal              48
-#define __NR_geteuid             49
-#define __NR_getegid             50
-#define __NR_acct                51
-#define __NR_umount2             52
-                                 /* 53 was sys_lock */
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-                                 /* 56 was sys_mpx */
-#define __NR_setpgid             57
-                                 /* 58 was sys_ulimit */
-                                 /* 59 was sys_olduname */
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sgetmask            68
-#define __NR_ssetmask            69
-#define __NR_setreuid            70
-#define __NR_setregid            71
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrlimit           76     /* Back compatible 2Gig limited rlimit */
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_getgroups           80
-#define __NR_setgroups           81
-                                 /* 82 was sys_oldselect */
-#define __NR_symlink             83
-#define __NR_oldlstat            84
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_fchown              95
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-                                 /* 98 was sys_profil */
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-                                /* 101 was sys_ioperm */
-#define __NR_socketcall         102
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_olduname           109
-                                /* 110 was sys_iopl */
-#define __NR_vhangup            111
-                                /* 112 was sys_idle */
-                                /* 113 was sys_vm86old */
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_cacheflush         123
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-                                /* 127 was sys_create_module */
-#define __NR_init_module        128
-#define __NR_delete_module      129
-                                /* 130 was sys_get_kernel_syms */
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-                                /* 137 was sys_afs_syscall */
-#define __NR_setfsuid           138
-#define __NR_setfsgid           139
-#define __NR__llseek            140
-#define __NR_getdents           141
-#define __NR__newselect         142
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_setresuid          164
-#define __NR_getresuid          165
-                                /* 166 was sys_vm86 */
-                                /* 167 was sys_query_module */
-#define __NR_poll               168
-#define __NR_nfsservctl         169
-#define __NR_setresgid          170
-#define __NR_getresgid          171
-#define __NR_prctl              172
-#define __NR_rt_sigreturn       173
-#define __NR_rt_sigaction       174
-#define __NR_rt_sigprocmask     175
-#define __NR_rt_sigpending      176
-#define __NR_rt_sigtimedwait    177
-#define __NR_rt_sigqueueinfo    178
-#define __NR_rt_sigsuspend      179
-#define __NR_pread64            180
-#define __NR_pwrite64           181
-#define __NR_chown              182
-#define __NR_getcwd             183
-#define __NR_capget             184
-#define __NR_capset             185
-#define __NR_sigaltstack        186
-#define __NR_sendfile           187
-                                /* 188 reserved for sys_getpmsg */
-                                /* 189 reserved for sys_putpmsg */
-#define __NR_vfork              190
-#define __NR_ugetrlimit         191     /* SuS compliant getrlimit */
-#define __NR_mmap2              192
-#define __NR_truncate64         193
-#define __NR_ftruncate64        194
-#define __NR_stat64             195
-#define __NR_lstat64            196
-#define __NR_fstat64            197
-#define __NR_lchown32           198
-#define __NR_getuid32           199
-#define __NR_getgid32           200
-#define __NR_geteuid32          201
-#define __NR_getegid32          202
-#define __NR_setreuid32         203
-#define __NR_setregid32         204
-#define __NR_getgroups32        205
-#define __NR_setgroups32        206
-#define __NR_fchown32           207
-#define __NR_setresuid32        208
-#define __NR_getresuid32        209
-#define __NR_setresgid32        210
-#define __NR_getresgid32        211
-#define __NR_chown32            212
-#define __NR_setuid32           213
-#define __NR_setgid32           214
-#define __NR_setfsuid32         215
-#define __NR_setfsgid32         216
-#define __NR_pivot_root         217
-#define __NR_mincore            218
-#define __NR_madvise            219
-#define __NR_getdents64         220
-#define __NR_fcntl64            221
-                                /* 222 is reserved for tux */
-                                /* 223 is unused */
-#define __NR_gettid             224
-#define __NR_readahead          225
-#define __NR_setxattr           226
-#define __NR_lsetxattr          227
-#define __NR_fsetxattr          228
-#define __NR_getxattr           229
-#define __NR_lgetxattr          230
-#define __NR_fgetxattr          231
-#define __NR_listxattr          232
-#define __NR_llistxattr         233
-#define __NR_flistxattr         234
-#define __NR_removexattr        235
-#define __NR_lremovexattr       236
-#define __NR_fremovexattr       237
-#define __NR_tkill              238
-#define __NR_sendfile64         239
-#define __NR_futex              240
-#define __NR_sched_setaffinity  241
-#define __NR_sched_getaffinity  242
-                                /* 243 is reserved for set_thread_area */
-                                /* 244 is reserved for get_thread_area */
-#define __NR_io_setup           245
-#define __NR_io_destroy         246
-#define __NR_io_getevents       247
-#define __NR_io_submit          248
-#define __NR_io_cancel          249
-#define __NR_fadvise64          250
-                                /* 251 is unused */
-#define __NR_exit_group         252
-#define __NR_lookup_dcookie     253
-#define __NR_epoll_create       254
-#define __NR_epoll_ctl          255
-#define __NR_epoll_wait         256
-#define __NR_remap_file_pages   257
-#define __NR_set_tid_address    258
-#define __NR_timer_create       259
-#define __NR_timer_settime      (__NR_timer_create+1)
-#define __NR_timer_gettime      (__NR_timer_create+2)
-#define __NR_timer_getoverrun   (__NR_timer_create+3)
-#define __NR_timer_delete       (__NR_timer_create+4)
-#define __NR_clock_settime      (__NR_timer_create+5)
-#define __NR_clock_gettime      (__NR_timer_create+6)
-#define __NR_clock_getres       (__NR_timer_create+7)
-#define __NR_clock_nanosleep    (__NR_timer_create+8)
-#define __NR_statfs64           268
-#define __NR_fstatfs64          269
-#define __NR_tgkill             270
-#define __NR_utimes             271
-#define __NR_fadvise64_64       272
-                                /* 273 is reserved for vserver */
-#define __NR_mbind              274
-#define __NR_get_mempolicy      275
-#define __NR_set_mempolicy      276
-#define __NR_mq_open            277
-#define __NR_mq_unlink          (__NR_mq_open+1)
-#define __NR_mq_timedsend       (__NR_mq_open+2)
-#define __NR_mq_timedreceive    (__NR_mq_open+3)
-#define __NR_mq_notify          (__NR_mq_open+4)
-#define __NR_mq_getsetattr      (__NR_mq_open+5)
-#define __NR_kexec_load         283
-#define __NR_waitid             284
-#define __NR_add_key            285
-#define __NR_request_key        286
-#define __NR_keyctl             287
-#define __NR_ioprio_set         288
-#define __NR_ioprio_get         289
-#define __NR_inotify_init       290
-#define __NR_inotify_add_watch  291
-#define __NR_inotify_rm_watch   292
-                                /* 293 is unused */
-#define __NR_migrate_pages      294
-#define __NR_openat             295
-#define __NR_mkdirat            296
-#define __NR_mknodat            297
-#define __NR_fchownat           298
-#define __NR_futimesat          299
-#define __NR_fstatat64          300
-#define __NR_unlinkat           301
-#define __NR_renameat           302
-#define __NR_linkat             303
-#define __NR_symlinkat          304
-#define __NR_readlinkat         305
-#define __NR_fchmodat           306
-#define __NR_faccessat          307
-#define __NR_pselect6           308
-#define __NR_ppoll              309
-#define __NR_unshare            310
-#define __NR_set_robust_list    311
-#define __NR_get_robust_list    312
-#define __NR_splice             313
-#define __NR_sync_file_range    314
-#define __NR_tee                315
-#define __NR_vmsplice           316
-#define __NR_move_pages         317
-#define __NR_getcpu             318
-#define __NR_epoll_pwait        319
-#define __NR_utimensat          320
-#define __NR_signalfd           321
-#define __NR_timerfd_create     322
-#define __NR_eventfd            323
-#define __NR_fallocate          324
-#define __NR_timerfd_settime    325
-#define __NR_timerfd_gettime    326
-#define __NR_signalfd4          327
-#define __NR_eventfd2           328
-#define __NR_epoll_create1      329
-#define __NR_dup3               330
-#define __NR_pipe2              331
-#define __NR_inotify_init1      332
-#define __NR_preadv             333
-#define __NR_pwritev            334
-#define __NR_rt_tgsigqueueinfo  335
-#define __NR_perf_event_open    336
-#define __NR_fanotify_init      337
-#define __NR_fanotify_mark      338
-#define __NR_prlimit64          339
-
-/* Non-multiplexed socket family */
-#define __NR_socket             340
-#define __NR_bind               341
-#define __NR_connect            342
-#define __NR_listen             343
-#define __NR_accept             344
-#define __NR_getsockname        345
-#define __NR_getpeername        346
-#define __NR_socketpair         347
-#define __NR_send               348
-#define __NR_sendto             349
-#define __NR_recv               350
-#define __NR_recvfrom           351
-#define __NR_shutdown           352
-#define __NR_setsockopt         353
-#define __NR_getsockopt         354
-#define __NR_sendmsg            355
-#define __NR_recvmsg            356
-#define __NR_recvmmsg           357
-#define __NR_accept4            358
-#define __NR_name_to_handle_at  359
-#define __NR_open_by_handle_at  360
-#define __NR_clock_adjtime      361
-#define __NR_syncfs             362
-#define __NR_sendmmsg           363
-#define __NR_setns              364
-#define __NR_process_vm_readv   365
-#define __NR_process_vm_writev  366
-#define __NR_kcmp               367
-
-#define NR_syscalls 368
-
-#endif /* __ASM_SH_UNISTD_32_H */
diff --git a/arch/sh/include/uapi/asm/unistd_64.h b/arch/sh/include/uapi/asm/unistd_64.h
deleted file mode 100644
index 8e3a2edd284..00000000000
--- a/arch/sh/include/uapi/asm/unistd_64.h
+++ /dev/null
@@ -1,405 +0,0 @@
-#ifndef __ASM_SH_UNISTD_64_H
-#define __ASM_SH_UNISTD_64_H
-
-/*
- * include/asm-sh/unistd_64.h
- *
- * This file contains the system call numbers.
- *
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003 - 2007 Paul Mundt
- * Copyright (C) 2004  Sean McGoogan
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#define __NR_restart_syscall      0
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_waitpid              7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_time                13
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_lchown              16
-                                 /* 17 was sys_break */
-#define __NR_oldstat             18
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_setuid              23
-#define __NR_getuid              24
-#define __NR_stime               25
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_oldfstat            28
-#define __NR_pause               29
-#define __NR_utime               30
-                                 /* 31 was sys_stty */
-                                 /* 32 was sys_gtty */
-#define __NR_access              33
-#define __NR_nice                34
-                                 /* 35 was sys_ftime */
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-                                 /* 44 was sys_prof */
-#define __NR_brk                 45
-#define __NR_setgid              46
-#define __NR_getgid              47
-#define __NR_signal              48
-#define __NR_geteuid             49
-#define __NR_getegid             50
-#define __NR_acct                51
-#define __NR_umount2             52
-                                 /* 53 was sys_lock */
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-                                 /* 56 was sys_mpx */
-#define __NR_setpgid             57
-                                 /* 58 was sys_ulimit */
-                                 /* 59 was sys_olduname */
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sgetmask            68
-#define __NR_ssetmask            69
-#define __NR_setreuid            70
-#define __NR_setregid            71
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrlimit           76     /* Back compatible 2Gig limited rlimit */
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_getgroups           80
-#define __NR_setgroups           81
-                                 /* 82 was sys_select */
-#define __NR_symlink             83
-#define __NR_oldlstat            84
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_fchown              95
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-                                 /* 98 was sys_profil */
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-                                /* 101 was sys_ioperm */
-#define __NR_socketcall         102     /* old implementation of socket systemcall */
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_olduname           109
-                                /* 110 was sys_iopl */
-#define __NR_vhangup            111
-                                /* 112 was sys_idle */
-                                /* 113 was sys_vm86old */
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_cacheflush         123
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-                                /* 127 was sys_create_module */
-#define __NR_init_module        128
-#define __NR_delete_module      129
-                                /* 130 was sys_get_kernel_syms */
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-                                /* 137 was sys_afs_syscall */
-#define __NR_setfsuid           138
-#define __NR_setfsgid           139
-#define __NR__llseek            140
-#define __NR_getdents           141
-#define __NR__newselect         142
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_setresuid          164
-#define __NR_getresuid          165
-                                /* 166 was sys_vm86 */
-                                /* 167 was sys_query_module */
-#define __NR_poll               168
-#define __NR_nfsservctl         169
-#define __NR_setresgid          170
-#define __NR_getresgid          171
-#define __NR_prctl              172
-#define __NR_rt_sigreturn       173
-#define __NR_rt_sigaction       174
-#define __NR_rt_sigprocmask     175
-#define __NR_rt_sigpending      176
-#define __NR_rt_sigtimedwait    177
-#define __NR_rt_sigqueueinfo    178
-#define __NR_rt_sigsuspend      179
-#define __NR_pread64            180
-#define __NR_pwrite64           181
-#define __NR_chown              182
-#define __NR_getcwd             183
-#define __NR_capget             184
-#define __NR_capset             185
-#define __NR_sigaltstack        186
-#define __NR_sendfile           187
-                                /* 188 reserved for getpmsg */
-                                /* 189 reserved for putpmsg */
-#define __NR_vfork              190
-#define __NR_ugetrlimit         191     /* SuS compliant getrlimit */
-#define __NR_mmap2              192
-#define __NR_truncate64         193
-#define __NR_ftruncate64        194
-#define __NR_stat64             195
-#define __NR_lstat64            196
-#define __NR_fstat64            197
-#define __NR_lchown32           198
-#define __NR_getuid32           199
-#define __NR_getgid32           200
-#define __NR_geteuid32          201
-#define __NR_getegid32          202
-#define __NR_setreuid32         203
-#define __NR_setregid32         204
-#define __NR_getgroups32        205
-#define __NR_setgroups32        206
-#define __NR_fchown32           207
-#define __NR_setresuid32        208
-#define __NR_getresuid32        209
-#define __NR_setresgid32        210
-#define __NR_getresgid32        211
-#define __NR_chown32            212
-#define __NR_setuid32           213
-#define __NR_setgid32           214
-#define __NR_setfsuid32         215
-#define __NR_setfsgid32         216
-#define __NR_pivot_root         217
-#define __NR_mincore            218
-#define __NR_madvise            219
-
-/* Non-multiplexed socket family */
-#define __NR_socket             220
-#define __NR_bind               221
-#define __NR_connect            222
-#define __NR_listen             223
-#define __NR_accept             224
-#define __NR_getsockname        225
-#define __NR_getpeername        226
-#define __NR_socketpair         227
-#define __NR_send               228
-#define __NR_sendto             229
-#define __NR_recv               230
-#define __NR_recvfrom           231
-#define __NR_shutdown           232
-#define __NR_setsockopt         233
-#define __NR_getsockopt         234
-#define __NR_sendmsg            235
-#define __NR_recvmsg            236
-
-/* Non-multiplexed IPC family */
-#define __NR_semop              237
-#define __NR_semget             238
-#define __NR_semctl             239
-#define __NR_msgsnd             240
-#define __NR_msgrcv             241
-#define __NR_msgget             242
-#define __NR_msgctl             243
-#define __NR_shmat              244
-#define __NR_shmdt              245
-#define __NR_shmget             246
-#define __NR_shmctl             247
-
-#define __NR_getdents64         248
-#define __NR_fcntl64            249
-                                /* 250 is reserved for tux */
-                                /* 251 is unused */
-#define __NR_gettid             252
-#define __NR_readahead          253
-#define __NR_setxattr           254
-#define __NR_lsetxattr          255
-#define __NR_fsetxattr          256
-#define __NR_getxattr           257
-#define __NR_lgetxattr          258
-#define __NR_fgetxattr          269
-#define __NR_listxattr          260
-#define __NR_llistxattr         261
-#define __NR_flistxattr         262
-#define __NR_removexattr        263
-#define __NR_lremovexattr       264
-#define __NR_fremovexattr       265
-#define __NR_tkill              266
-#define __NR_sendfile64         267
-#define __NR_futex              268
-#define __NR_sched_setaffinity  269
-#define __NR_sched_getaffinity  270
-                                /* 271 is reserved for set_thread_area */
-                                /* 272 is reserved for get_thread_area */
-#define __NR_io_setup           273
-#define __NR_io_destroy         274
-#define __NR_io_getevents       275
-#define __NR_io_submit          276
-#define __NR_io_cancel          277
-#define __NR_fadvise64          278
-                                /* 279 is unused */
-#define __NR_exit_group         280
-
-#define __NR_lookup_dcookie     281
-#define __NR_epoll_create       282
-#define __NR_epoll_ctl          283
-#define __NR_epoll_wait         284
-#define __NR_remap_file_pages   285
-#define __NR_set_tid_address    286
-#define __NR_timer_create       287
-#define __NR_timer_settime      (__NR_timer_create+1)
-#define __NR_timer_gettime      (__NR_timer_create+2)
-#define __NR_timer_getoverrun   (__NR_timer_create+3)
-#define __NR_timer_delete       (__NR_timer_create+4)
-#define __NR_clock_settime      (__NR_timer_create+5)
-#define __NR_clock_gettime      (__NR_timer_create+6)
-#define __NR_clock_getres       (__NR_timer_create+7)
-#define __NR_clock_nanosleep    (__NR_timer_create+8)
-#define __NR_statfs64           296
-#define __NR_fstatfs64          297
-#define __NR_tgkill             298
-#define __NR_utimes             299
-#define __NR_fadvise64_64       300
-                                /* 301 is reserved for vserver */
-                                /* 302 is reserved for mbind */
-                                /* 303 is reserved for get_mempolicy */
-                                /* 304 is reserved for set_mempolicy */
-#define __NR_mq_open            305
-#define __NR_mq_unlink          (__NR_mq_open+1)
-#define __NR_mq_timedsend       (__NR_mq_open+2)
-#define __NR_mq_timedreceive    (__NR_mq_open+3)
-#define __NR_mq_notify          (__NR_mq_open+4)
-#define __NR_mq_getsetattr      (__NR_mq_open+5)
-                                /* 311 is reserved for kexec */
-#define __NR_waitid             312
-#define __NR_add_key            313
-#define __NR_request_key        314
-#define __NR_keyctl             315
-#define __NR_ioprio_set         316
-#define __NR_ioprio_get         317
-#define __NR_inotify_init       318
-#define __NR_inotify_add_watch  319
-#define __NR_inotify_rm_watch   320
-                                /* 321 is unused */
-#define __NR_migrate_pages      322
-#define __NR_openat             323
-#define __NR_mkdirat            324
-#define __NR_mknodat            325
-#define __NR_fchownat           326
-#define __NR_futimesat          327
-#define __NR_fstatat64          328
-#define __NR_unlinkat           329
-#define __NR_renameat           330
-#define __NR_linkat             331
-#define __NR_symlinkat          332
-#define __NR_readlinkat         333
-#define __NR_fchmodat           334
-#define __NR_faccessat          335
-#define __NR_pselect6           336
-#define __NR_ppoll              337
-#define __NR_unshare            338
-#define __NR_set_robust_list    339
-#define __NR_get_robust_list    340
-#define __NR_splice             341
-#define __NR_sync_file_range    342
-#define __NR_tee                343
-#define __NR_vmsplice           344
-#define __NR_move_pages         345
-#define __NR_getcpu             346
-#define __NR_epoll_pwait        347
-#define __NR_utimensat          348
-#define __NR_signalfd           349
-#define __NR_timerfd_create     350
-#define __NR_eventfd            351
-#define __NR_fallocate          352
-#define __NR_timerfd_settime    353
-#define __NR_timerfd_gettime    354
-#define __NR_signalfd4          355
-#define __NR_eventfd2           356
-#define __NR_epoll_create1      357
-#define __NR_dup3               358
-#define __NR_pipe2              359
-#define __NR_inotify_init1      360
-#define __NR_preadv             361
-#define __NR_pwritev            362
-#define __NR_rt_tgsigqueueinfo  363
-#define __NR_perf_event_open    364
-#define __NR_recvmmsg           365
-#define __NR_accept4            366
-#define __NR_fanotify_init      367
-#define __NR_fanotify_mark      368
-#define __NR_prlimit64          369
-#define __NR_name_to_handle_at  370
-#define __NR_open_by_handle_at  371
-#define __NR_clock_adjtime      372
-#define __NR_syncfs             373
-#define __NR_sendmmsg           374
-#define __NR_setns              375
-#define __NR_process_vm_readv   376
-#define __NR_process_vm_writev  377
-#define __NR_kcmp               378
-
-#define NR_syscalls 379
-
-#endif /* __ASM_SH_UNISTD_64_H */
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index f259b37874e..77f7ae1d464 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the Linux/SuperH kernel.
 #
 
-extra-y := head_$(BITS).o vmlinux.lds
+extra-y := head_$(BITS).o init_task.o vmlinux.lds
 
 ifdef CONFIG_FUNCTION_TRACER
 # Do not profile debug and lowlevel utilities
@@ -16,7 +16,7 @@ obj-y	:= debugtraps.o dma-nommu.o dumpstack.o 		\
            machvec.o nmi_debug.o process.o                              \
            process_$(BITS).o ptrace.o ptrace_$(BITS).o                  \
            reboot.o return_address.o                                    \
-           setup.o signal_$(BITS).o sys_sh.o                            \
+           setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o            \
            syscalls_$(BITS).o time.o topology.o traps.o                 \
            traps_$(BITS).o unwinder.o
 
@@ -25,7 +25,6 @@ obj-y				+= iomap.o
 obj-$(CONFIG_HAS_IOPORT)        += ioport.o
 endif
 
-obj-$(CONFIG_SUPERH32)          += sys_sh32.o
 obj-y                           += cpu/
 obj-$(CONFIG_VSYSCALL)          += vsyscall/
 obj-$(CONFIG_SMP)               += smp.o
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index fa58bfd30d8..ae95935d93c 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -18,4 +18,4 @@ obj-$(CONFIG_ARCH_SHMOBILE)	+= shmobile/
 obj-$(CONFIG_SH_ADC)            += adc.o
 obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
 
-obj-y   += irq/ init.o clock.o fpu.o proc.o
+obj-y   += irq/ init.o clock.o fpu.o hwblk.o proc.o
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c
index f8f7af51c12..7f1b70cace3 100644
--- a/arch/sh/kernel/cpu/fpu.c
+++ b/arch/sh/kernel/cpu/fpu.c
@@ -2,7 +2,6 @@
 #include <linux/slab.h>
 #include <asm/processor.h>
 #include <asm/fpu.h>
-#include <asm/traps.h>
 
 int init_fpu(struct task_struct *tsk)
 {
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 61a07dafcd4..fac742e514e 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -18,13 +18,13 @@
 #include <asm/processor.h>
 #include <asm/uaccess.h>
 #include <asm/page.h>
+#include <asm/system.h>
 #include <asm/cacheflush.h>
 #include <asm/cache.h>
 #include <asm/elf.h>
 #include <asm/io.h>
 #include <asm/smp.h>
 #include <asm/sh_bios.h>
-#include <asm/setup.h>
 
 #ifdef CONFIG_SH_FPU
 #define cpu_has_fpu     1
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
index e7f1745bd12..39b6a24c159 100644
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -19,6 +19,7 @@
 #include <linux/cache.h>
 #include <linux/irq.h>
 #include <linux/bitmap.h>
+#include <asm/system.h>
 #include <asm/irq.h>
 
 /* Bitmap of IRQ masked */
diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c
index 9e6624c9108..f47be8727b3 100644
--- a/arch/sh/kernel/cpu/proc.c
+++ b/arch/sh/kernel/cpu/proc.c
@@ -7,7 +7,6 @@
 static const char *cpu_name[] = {
         [CPU_SH7201]    = "SH7201",
         [CPU_SH7203]    = "SH7203",     [CPU_SH7263]    = "SH7263",
-        [CPU_SH7264]    = "SH7264",     [CPU_SH7269]    = "SH7269",
         [CPU_SH7206]    = "SH7206",     [CPU_SH7619]    = "SH7619",
         [CPU_SH7705]    = "SH7705",     [CPU_SH7706]    = "SH7706",
         [CPU_SH7707]    = "SH7707",     [CPU_SH7708]    = "SH7708",
@@ -26,8 +25,7 @@ static const char *cpu_name[] = {
         [CPU_SH5_101]   = "SH5-101",    [CPU_SH5_103]   = "SH5-103",
         [CPU_MXG]       = "MX-G",       [CPU_SH7723]    = "SH7723",
         [CPU_SH7366]    = "SH7366",     [CPU_SH7724]    = "SH7724",
-        [CPU_SH7372]    = "SH7372",     [CPU_SH7734]    = "SH7734",
-        [CPU_SH_NONE]   = "Unknown"
+        [CPU_SH7372]    = "SH7372",     [CPU_SH_NONE]   = "Unknown"
 };
 
 const char *get_cpu_subtype(struct sh_cpuinfo *c)
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index e80252ae5bc..5b7f12e58a8 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -28,7 +28,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
-static struct sh_clk_ops sh7619_master_clk_ops = {
+static struct clk_ops sh7619_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -38,7 +38,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7619_module_clk_ops = {
+static struct clk_ops sh7619_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -47,22 +47,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
-static struct sh_clk_ops sh7619_bus_clk_ops = {
+static struct clk_ops sh7619_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static struct sh_clk_ops sh7619_cpu_clk_ops = {
+static struct clk_ops sh7619_cpu_clk_ops = {
         .recalc         = followparent_recalc,
 };
 
-static struct sh_clk_ops *sh7619_clk_ops[] = {
+static struct clk_ops *sh7619_clk_ops[] = {
         &sh7619_master_clk_ops,
         &sh7619_module_clk_ops,
         &sh7619_bus_clk_ops,
         &sh7619_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
             test_mode_pin(MODE_PIN2 | MODE_PIN1))
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index e0b740c831c..0f8befccf9f 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -65,7 +65,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(88),
+        .irqs           = { 88, 88, 88, 88 },
 };
 
 static struct platform_device scif0_device = {
@@ -82,7 +82,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(92),
+        .irqs           = { 92, 92, 92, 92 },
 };
 
 static struct platform_device scif1_device = {
@@ -99,7 +99,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(96),
+        .irqs           = { 96, 96, 96, 96 },
 };
 
 static struct platform_device scif2_device = {
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 7fdc102d0dd..45f85c77ef7 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -11,14 +11,10 @@ obj-$(CONFIG_SH_FPU)	+= fpu.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7201)        += setup-sh7201.o clock-sh7201.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7203)        += setup-sh7203.o clock-sh7203.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7263)        += setup-sh7203.o clock-sh7203.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7264)        += setup-sh7264.o clock-sh7264.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7206)        += setup-sh7206.o clock-sh7206.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7269)        += setup-sh7269.o clock-sh7269.o
 obj-$(CONFIG_CPU_SUBTYPE_MXG)           += setup-mxg.o clock-sh7206.o
 
 # Pinmux setup
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7203)     := pinmux-sh7203.o
-pinmux-$(CONFIG_CPU_SUBTYPE_SH7264)     := pinmux-sh7264.o
-pinmux-$(CONFIG_CPU_SUBTYPE_SH7269)     := pinmux-sh7269.o
 
 obj-$(CONFIG_GENERIC_GPIO)      += $(pinmux-y)
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 532a36c7232..1174e2d96c0 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
                pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
-static struct sh_clk_ops sh7201_master_clk_ops = {
+static struct clk_ops sh7201_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -40,7 +40,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7201_module_clk_ops = {
+static struct clk_ops sh7201_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -50,7 +50,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7201_bus_clk_ops = {
+static struct clk_ops sh7201_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -60,18 +60,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7201_cpu_clk_ops = {
+static struct clk_ops sh7201_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7201_clk_ops[] = {
+static struct clk_ops *sh7201_clk_ops[] = {
         &sh7201_master_clk_ops,
         &sh7201_module_clk_ops,
         &sh7201_bus_clk_ops,
         &sh7201_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
                 pll2_mult = 1;
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 529f719b6e3..95a008e8b73 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -32,7 +32,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;
 }
 
-static struct sh_clk_ops sh7203_master_clk_ops = {
+static struct clk_ops sh7203_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7203_module_clk_ops = {
+static struct clk_ops sh7203_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -52,22 +52,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx-2];
 }
 
-static struct sh_clk_ops sh7203_bus_clk_ops = {
+static struct clk_ops sh7203_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static struct sh_clk_ops sh7203_cpu_clk_ops = {
+static struct clk_ops sh7203_cpu_clk_ops = {
         .recalc         = followparent_recalc,
 };
 
-static struct sh_clk_ops *sh7203_clk_ops[] = {
+static struct clk_ops *sh7203_clk_ops[] = {
         &sh7203_master_clk_ops,
         &sh7203_module_clk_ops,
         &sh7203_bus_clk_ops,
         &sh7203_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (test_mode_pin(MODE_PIN1))
                 pll2_mult = 4;
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index 17778983467..3c314d7cd6e 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
-static struct sh_clk_ops sh7206_master_clk_ops = {
+static struct clk_ops sh7206_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -39,7 +39,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7206_module_clk_ops = {
+static struct clk_ops sh7206_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -48,7 +48,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
-static struct sh_clk_ops sh7206_bus_clk_ops = {
+static struct clk_ops sh7206_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -58,18 +58,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7206_cpu_clk_ops = {
+static struct clk_ops sh7206_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7206_clk_ops[] = {
+static struct clk_ops *sh7206_clk_ops[] = {
         &sh7206_master_clk_ops,
         &sh7206_module_clk_ops,
         &sh7206_bus_clk_ops,
         &sh7206_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0))
                 pll2_mult = 1;
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7264.c b/arch/sh/kernel/cpu/sh2a/clock-sh7264.c
deleted file mode 100644
index fdf585c9528..00000000000
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7264.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * arch/sh/kernel/cpu/sh2a/clock-sh7264.c
- *
- * SH7264 clock framework support
- *
- * Copyright (C) 2012  Phil Edworthy
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/clkdev.h>
-#include <asm/clock.h>
-
-/* SH7264 registers */
-#define FRQCR           0xfffe0010
-#define STBCR3          0xfffe0408
-#define STBCR4          0xfffe040c
-#define STBCR5          0xfffe0410
-#define STBCR6          0xfffe0414
-#define STBCR7          0xfffe0418
-#define STBCR8          0xfffe041c
-
-static const unsigned int pll1rate[] = {8, 12};
-
-static unsigned int pll1_div;
-
-/* Fixed 32 KHz root clock for RTC */
-static struct clk r_clk = {
-        .rate           = 32768,
-};
-
-/*
- * Default rate for the root input clock, reset this with clk_set_rate()
- * from the platform code.
- */
-static struct clk extal_clk = {
-        .rate           = 18000000,
-};
-
-static unsigned long pll_recalc(struct clk *clk)
-{
-        unsigned long rate = clk->parent->rate / pll1_div;
-        return rate * pll1rate[(__raw_readw(FRQCR) >> 8) & 1];
-}
-
-static struct sh_clk_ops pll_clk_ops = {
-        .recalc         = pll_recalc,
-};
-
-static struct clk pll_clk = {
-        .ops            = &pll_clk_ops,
-        .parent         = &extal_clk,
-        .flags          = CLK_ENABLE_ON_INIT,
-};
-
-struct clk *main_clks[] = {
-        &r_clk,
-        &extal_clk,
-        &pll_clk,
-};
-
-static int div2[] = { 1, 2, 3, 4, 6, 8, 12 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
-        .divisors = div2,
-        .nr_divisors = ARRAY_SIZE(div2),
-};
-
-static struct clk_div4_table div4_table = {
-        .div_mult_table = &div4_div_mult_table,
-};
-
-enum { DIV4_I, DIV4_P,
-       DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
-  SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
-
-/* The mask field specifies the div2 entries that are valid */
-struct clk div4_clks[DIV4_NR] = {
-        [DIV4_I] = DIV4(FRQCR, 4, 0x7,  CLK_ENABLE_REG_16BIT
-                                        | CLK_ENABLE_ON_INIT),
-        [DIV4_P] = DIV4(FRQCR, 0, 0x78, CLK_ENABLE_REG_16BIT),
-};
-
-enum {  MSTP77, MSTP74, MSTP72,
-        MSTP60,
-        MSTP35, MSTP34, MSTP33, MSTP32, MSTP30,
-        MSTP_NR };
-
-static struct clk mstp_clks[MSTP_NR] = {
-        [MSTP77] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */
-        [MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */
-        [MSTP72] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */
-        [MSTP60] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR6, 0, 0), /* USB */
-        [MSTP35] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */
-        [MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
-        [MSTP33] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */
-        [MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */
-        [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0),  /* RTC */
-};
-
-static struct clk_lookup lookups[] = {
-        /* main clocks */
-        CLKDEV_CON_ID("rclk", &r_clk),
-        CLKDEV_CON_ID("extal", &extal_clk),
-        CLKDEV_CON_ID("pll_clk", &pll_clk),
-
-        /* DIV4 clocks */
-        CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
-        CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
-
-        /* MSTP clocks */
-        CLKDEV_CON_ID("sci_ick", &mstp_clks[MSTP77]),
-        CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]),
-        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
-        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]),
-        CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
-        CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP33]),
-        CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
-        CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
-};
-
-int __init arch_clk_init(void)
-{
-        int k, ret = 0;
-
-        if (test_mode_pin(MODE_PIN0)) {
-                if (test_mode_pin(MODE_PIN1))
-                        pll1_div = 3;
-                else
-                        pll1_div = 4;
-        } else
-                pll1_div = 1;
-
-        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
-                ret = clk_register(main_clks[k]);
-
-        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
-        if (!ret)
-                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
-        if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
-        return ret;
-}
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7269.c b/arch/sh/kernel/cpu/sh2a/clock-sh7269.c
deleted file mode 100644
index 6b787620de9..00000000000
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7269.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * arch/sh/kernel/cpu/sh2a/clock-sh7269.c
- *
- * SH7269 clock framework support
- *
- * Copyright (C) 2012  Phil Edworthy
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/clkdev.h>
-#include <asm/clock.h>
-
-/* SH7269 registers */
-#define FRQCR           0xfffe0010
-#define STBCR3          0xfffe0408
-#define STBCR4          0xfffe040c
-#define STBCR5          0xfffe0410
-#define STBCR6          0xfffe0414
-#define STBCR7          0xfffe0418
-
-#define PLL_RATE 20
-
-/* Fixed 32 KHz root clock for RTC */
-static struct clk r_clk = {
-        .rate           = 32768,
-};
-
-/*
- * Default rate for the root input clock, reset this with clk_set_rate()
- * from the platform code.
- */
-static struct clk extal_clk = {
-        .rate           = 13340000,
-};
-
-static unsigned long pll_recalc(struct clk *clk)
-{
-        return clk->parent->rate * PLL_RATE;
-}
-
-static struct sh_clk_ops pll_clk_ops = {
-        .recalc         = pll_recalc,
-};
-
-static struct clk pll_clk = {
-        .ops            = &pll_clk_ops,
-        .parent         = &extal_clk,
-        .flags          = CLK_ENABLE_ON_INIT,
-};
-
-static unsigned long peripheral0_recalc(struct clk *clk)
-{
-        return clk->parent->rate / 8;
-}
-
-static struct sh_clk_ops peripheral0_clk_ops = {
-        .recalc         = peripheral0_recalc,
-};
-
-static struct clk peripheral0_clk = {
-        .ops            = &peripheral0_clk_ops,
-        .parent         = &pll_clk,
-        .flags          = CLK_ENABLE_ON_INIT,
-};
-
-static unsigned long peripheral1_recalc(struct clk *clk)
-{
-        return clk->parent->rate / 4;
-}
-
-static struct sh_clk_ops peripheral1_clk_ops = {
-        .recalc         = peripheral1_recalc,
-};
-
-static struct clk peripheral1_clk = {
-        .ops            = &peripheral1_clk_ops,
-        .parent         = &pll_clk,
-        .flags          = CLK_ENABLE_ON_INIT,
-};
-
-struct clk *main_clks[] = {
-        &r_clk,
-        &extal_clk,
-        &pll_clk,
-        &peripheral0_clk,
-        &peripheral1_clk,
-};
-
-static int div2[] = { 1, 2, 0, 4 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
-        .divisors = div2,
-        .nr_divisors = ARRAY_SIZE(div2),
-};
-
-static struct clk_div4_table div4_table = {
-        .div_mult_table = &div4_div_mult_table,
-};
-
-enum { DIV4_I, DIV4_B,
-       DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
-  SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
-
-/* The mask field specifies the div2 entries that are valid */
-struct clk div4_clks[DIV4_NR] = {
-        [DIV4_I]  = DIV4(FRQCR, 8, 0xB, CLK_ENABLE_REG_16BIT
-                                        | CLK_ENABLE_ON_INIT),
-        [DIV4_B]  = DIV4(FRQCR, 4, 0xA, CLK_ENABLE_REG_16BIT
-                                        | CLK_ENABLE_ON_INIT),
-};
-
-enum { MSTP72,
-        MSTP60,
-        MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
-        MSTP35, MSTP32, MSTP30,
-        MSTP_NR };
-
-static struct clk mstp_clks[MSTP_NR] = {
-        [MSTP72] = SH_CLK_MSTP8(&peripheral0_clk, STBCR7, 2, 0), /* CMT */
-        [MSTP60] = SH_CLK_MSTP8(&peripheral1_clk, STBCR6, 0, 0), /* USB */
-        [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
-        [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
-        [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
-        [MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */
-        [MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */
-        [MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */
-        [MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */
-        [MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
-        [MSTP35] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 5, 0), /* MTU2 */
-        [MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */
-        [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
-};
-
-static struct clk_lookup lookups[] = {
-        /* main clocks */
-        CLKDEV_CON_ID("rclk", &r_clk),
-        CLKDEV_CON_ID("extal", &extal_clk),
-        CLKDEV_CON_ID("pll_clk", &pll_clk),
-        CLKDEV_CON_ID("peripheral_clk", &peripheral1_clk),
-
-        /* DIV4 clocks */
-        CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
-        CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
-
-        /* MSTP clocks */
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
-        CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]),
-        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
-        CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]),
-        CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
-        CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
-};
-
-int __init arch_clk_init(void)
-{
-        int k, ret = 0;
-
-        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
-                ret = clk_register(main_clks[k]);
-
-        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
-        if (!ret)
-                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
-        if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
-        return ret;
-}
diff --git a/arch/sh/kernel/cpu/sh2a/ex.S b/arch/sh/kernel/cpu/sh2a/ex.S
index 4568066700c..3ead9e63965 100644
--- a/arch/sh/kernel/cpu/sh2a/ex.S
+++ b/arch/sh/kernel/cpu/sh2a/ex.S
@@ -66,7 +66,6 @@ vector	=	0
         .long   exception_entry0 + vector * 6
 vector  =       vector + 1
         .endr
-vector  =       0
         .rept   256
         .long   exception_entry1 + vector * 6
 vector  =       vector + 1
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 98bbaa447c9..488d24e0cdf 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -14,7 +14,6 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/fpu.h>
-#include <asm/traps.h>
 
 /* The PR (precision) bit in the FP Status Register must be clear when
  * an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh2a/opcode_helper.c b/arch/sh/kernel/cpu/sh2a/opcode_helper.c
index 72aa61c81e4..9704b7926d8 100644
--- a/arch/sh/kernel/cpu/sh2a/opcode_helper.c
+++ b/arch/sh/kernel/cpu/sh2a/opcode_helper.c
@@ -10,6 +10,7 @@
  * for more details.
  */
 #include <linux/kernel.h>
+#include <asm/system.h>
 
 /*
  * Instructions on SH are generally fixed at 16-bits, however, SH-2A
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
deleted file mode 100644
index b055b55d6f2..00000000000
--- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
+++ /dev/null
@@ -1,2136 +0,0 @@
-/*
- * SH7264 Pinmux
- *
- *  Copyright (C) 2012  Renesas Electronics Europe Ltd
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <cpu/sh7264.h>
-
-enum {
-        PINMUX_RESERVED = 0,
-
-        PINMUX_DATA_BEGIN,
-        /* Port A */
-        PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
-        /* Port B */
-        PB22_DATA, PB21_DATA, PB20_DATA,
-        PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,
-        PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
-        PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
-        PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
-        PB3_DATA, PB2_DATA, PB1_DATA,
-        /* Port C */
-        PC10_DATA, PC9_DATA, PC8_DATA,
-        PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
-        PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
-        /* Port D */
-        PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
-        PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
-        PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
-        PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
-        /* Port E */
-        PE5_DATA, PE4_DATA,
-        PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
-        /* Port F */
-        PF12_DATA,
-        PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
-        PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
-        PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
-        /* Port G */
-        PG24_DATA,
-        PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
-        PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,
-        PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
-        PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
-        PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
-        PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
-        /* Port H */
-        /* NOTE - Port H does not have a Data Register, but PH Data is
-           connected to PH Port Register */
-        PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
-        PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
-        /* Port I - not on device */
-        /* Port J */
-        PJ12_DATA,
-        PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
-        PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
-        PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
-        /* Port K */
-        PK12_DATA,
-        PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,
-        PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
-        PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
-        PINMUX_DATA_END,
-
-        PINMUX_INPUT_BEGIN,
-        FORCE_IN,
-        /* Port A */
-        PA3_IN, PA2_IN, PA1_IN, PA0_IN,
-        /* Port B */
-        PB22_IN, PB21_IN, PB20_IN,
-        PB19_IN, PB18_IN, PB17_IN, PB16_IN,
-        PB15_IN, PB14_IN, PB13_IN, PB12_IN,
-        PB11_IN, PB10_IN, PB9_IN, PB8_IN,
-        PB7_IN, PB6_IN, PB5_IN, PB4_IN,
-        PB3_IN, PB2_IN, PB1_IN,
-        /* Port C */
-        PC10_IN, PC9_IN, PC8_IN,
-        PC7_IN, PC6_IN, PC5_IN, PC4_IN,
-        PC3_IN, PC2_IN, PC1_IN, PC0_IN,
-        /* Port D */
-        PD15_IN, PD14_IN, PD13_IN, PD12_IN,
-        PD11_IN, PD10_IN, PD9_IN, PD8_IN,
-        PD7_IN, PD6_IN, PD5_IN, PD4_IN,
-        PD3_IN, PD2_IN, PD1_IN, PD0_IN,
-        /* Port E */
-        PE5_IN, PE4_IN,
-        PE3_IN, PE2_IN, PE1_IN, PE0_IN,
-        /* Port F */
-        PF12_IN,
-        PF11_IN, PF10_IN, PF9_IN, PF8_IN,
-        PF7_IN, PF6_IN, PF5_IN, PF4_IN,
-        PF3_IN, PF2_IN, PF1_IN, PF0_IN,
-        /* Port G */
-        PG24_IN,
-        PG23_IN, PG22_IN, PG21_IN, PG20_IN,
-        PG19_IN, PG18_IN, PG17_IN, PG16_IN,
-        PG15_IN, PG14_IN, PG13_IN, PG12_IN,
-        PG11_IN, PG10_IN, PG9_IN, PG8_IN,
-        PG7_IN, PG6_IN, PG5_IN, PG4_IN,
-        PG3_IN, PG2_IN, PG1_IN, PG0_IN,
-        /* Port H - Port H does not have a Data Register */
-        /* Port I - not on device */
-        /* Port J */
-        PJ12_IN,
-        PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN,
-        PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
-        PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
-        /* Port K */
-        PK12_IN,
-        PK11_IN, PK10_IN, PK9_IN, PK8_IN,
-        PK7_IN, PK6_IN, PK5_IN, PK4_IN,
-        PK3_IN, PK2_IN, PK1_IN, PK0_IN,
-        PINMUX_INPUT_END,
-
-        PINMUX_OUTPUT_BEGIN,
-        FORCE_OUT,
-        /* Port A */
-        PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
-        /* Port B */
-        PB22_OUT, PB21_OUT, PB20_OUT,
-        PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT,
-        PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT,
-        PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
-        PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
-        PB3_OUT, PB2_OUT, PB1_OUT,
-        /* Port C */
-        PC10_OUT, PC9_OUT, PC8_OUT,
-        PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
-        PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
-        /* Port D */
-        PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
-        PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
-        PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
-        PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
-        /* Port E */
-        PE5_OUT, PE4_OUT,
-        PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
-        /* Port F */
-        PF12_OUT,
-        PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
-        PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
-        PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
-        /* Port G */
-        PG24_OUT,
-        PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT,
-        PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT,
-        PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT,
-        PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT,
-        PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
-        PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
-        /* Port H - Port H does not have a Data Register */
-        /* Port I - not on device */
-        /* Port J */
-        PJ12_OUT,
-        PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT,
-        PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
-        PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
-        /* Port K */
-        PK12_OUT,
-        PK11_OUT, PK10_OUT, PK9_OUT, PK8_OUT,
-        PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
-        PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
-        PINMUX_OUTPUT_END,
-
-        PINMUX_FUNCTION_BEGIN,
-        /* Port A */
-        PA3_IOR_IN, PA3_IOR_OUT,
-        PA2_IOR_IN, PA2_IOR_OUT,
-        PA1_IOR_IN, PA1_IOR_OUT,
-        PA0_IOR_IN, PA0_IOR_OUT,
-
-        /* Port B */
-        PB11_IOR_IN, PB11_IOR_OUT,
-        PB10_IOR_IN, PB10_IOR_OUT,
-        PB9_IOR_IN, PB9_IOR_OUT,
-        PB8_IOR_IN, PB8_IOR_OUT,
-
-        PB22MD_00, PB22MD_01, PB22MD_10,
-        PB21MD_0, PB21MD_1,
-        PB20MD_0, PB20MD_1,
-        PB19MD_00, PB19MD_01, PB19MD_10, PB19MD_11,
-        PB18MD_00, PB18MD_01, PB18MD_10, PB18MD_11,
-        PB17MD_00, PB17MD_01, PB17MD_10, PB17MD_11,
-        PB16MD_00, PB16MD_01, PB16MD_10, PB16MD_11,
-        PB15MD_00, PB15MD_01, PB15MD_10, PB15MD_11,
-        PB14MD_00, PB14MD_01, PB14MD_10, PB14MD_11,
-        PB13MD_00, PB13MD_01, PB13MD_10, PB13MD_11,
-        PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
-        PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11,
-        PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11,
-        PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11,
-        PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11,
-        PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
-        PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
-        PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
-        PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
-        PB3MD_0, PB3MD_1,
-        PB2MD_0, PB2MD_1,
-        PB1MD_0, PB1MD_1,
-
-        /* Port C */
-        PC14_IOR_IN, PC14_IOR_OUT,
-        PC13_IOR_IN, PC13_IOR_OUT,
-        PC12_IOR_IN, PC12_IOR_OUT,
-        PC11_IOR_IN, PC11_IOR_OUT,
-        PC10_IOR_IN, PC10_IOR_OUT,
-        PC9_IOR_IN, PC9_IOR_OUT,
-        PC8_IOR_IN, PC8_IOR_OUT,
-        PC7_IOR_IN, PC7_IOR_OUT,
-        PC6_IOR_IN, PC6_IOR_OUT,
-        PC5_IOR_IN, PC5_IOR_OUT,
-        PC4_IOR_IN, PC4_IOR_OUT,
-        PC3_IOR_IN, PC3_IOR_OUT,
-        PC2_IOR_IN, PC2_IOR_OUT,
-        PC1_IOR_IN, PC1_IOR_OUT,
-        PC0_IOR_IN, PC0_IOR_OUT,
-
-        PC10MD_0, PC10MD_1,
-        PC9MD_0, PC9MD_1,
-        PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11,
-        PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11,
-        PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11,
-        PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11,
-        PC4MD_0, PC4MD_1,
-        PC3MD_0, PC3MD_1,
-        PC2MD_0, PC2MD_1,
-        PC1MD_0, PC1MD_1,
-        PC0MD_0, PC0MD_1,
-
-        /* Port D */
-        PD15_IOR_IN, PD15_IOR_OUT,
-        PD14_IOR_IN, PD14_IOR_OUT,
-        PD13_IOR_IN, PD13_IOR_OUT,
-        PD12_IOR_IN, PD12_IOR_OUT,
-        PD11_IOR_IN, PD11_IOR_OUT,
-        PD10_IOR_IN, PD10_IOR_OUT,
-        PD9_IOR_IN, PD9_IOR_OUT,
-        PD8_IOR_IN, PD8_IOR_OUT,
-        PD7_IOR_IN, PD7_IOR_OUT,
-        PD6_IOR_IN, PD6_IOR_OUT,
-        PD5_IOR_IN, PD5_IOR_OUT,
-        PD4_IOR_IN, PD4_IOR_OUT,
-        PD3_IOR_IN, PD3_IOR_OUT,
-        PD2_IOR_IN, PD2_IOR_OUT,
-        PD1_IOR_IN, PD1_IOR_OUT,
-        PD0_IOR_IN, PD0_IOR_OUT,
-
-        PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11,
-        PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11,
-        PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11,
-        PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11,
-        PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11,
-        PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11,
-        PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11,
-        PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11,
-        PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11,
-        PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11,
-        PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11,
-        PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11,
-        PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11,
-        PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11,
-        PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11,
-        PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11,
-
-        /* Port E */
-        PE5_IOR_IN, PE5_IOR_OUT,
-        PE4_IOR_IN, PE4_IOR_OUT,
-        PE3_IOR_IN, PE3_IOR_OUT,
-        PE2_IOR_IN, PE2_IOR_OUT,
-        PE1_IOR_IN, PE1_IOR_OUT,
-        PE0_IOR_IN, PE0_IOR_OUT,
-
-        PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11,
-        PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11,
-        PE3MD_00, PE3MD_01, PE3MD_10, PE3MD_11,
-        PE2MD_00, PE2MD_01, PE2MD_10, PE2MD_11,
-        PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
-        PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,
-        PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11,
-
-        /* Port F */
-        PF12_IOR_IN, PF12_IOR_OUT,
-        PF11_IOR_IN, PF11_IOR_OUT,
-        PF10_IOR_IN, PF10_IOR_OUT,
-        PF9_IOR_IN, PF9_IOR_OUT,
-        PF8_IOR_IN, PF8_IOR_OUT,
-        PF7_IOR_IN, PF7_IOR_OUT,
-        PF6_IOR_IN, PF6_IOR_OUT,
-        PF5_IOR_IN, PF5_IOR_OUT,
-        PF4_IOR_IN, PF4_IOR_OUT,
-        PF3_IOR_IN, PF3_IOR_OUT,
-        PF2_IOR_IN, PF2_IOR_OUT,
-        PF1_IOR_IN, PF1_IOR_OUT,
-        PF0_IOR_IN, PF0_IOR_OUT,
-
-        PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,
-        PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,
-        PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
-        PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,
-        PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
-        PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,
-        PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
-        PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,
-        PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11,
-        PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
-        PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,
-        PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
-        PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,
-        PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
-        PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,
-        PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
-        PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,
-        PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
-        PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,
-        PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
-        PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,
-        PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
-        PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,
-        PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
-        PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,
-
-        /* Port G */
-        PG24_IOR_IN, PG24_IOR_OUT,
-        PG23_IOR_IN, PG23_IOR_OUT,
-        PG22_IOR_IN, PG22_IOR_OUT,
-        PG21_IOR_IN, PG21_IOR_OUT,
-        PG20_IOR_IN, PG20_IOR_OUT,
-        PG19_IOR_IN, PG19_IOR_OUT,
-        PG18_IOR_IN, PG18_IOR_OUT,
-        PG17_IOR_IN, PG17_IOR_OUT,
-        PG16_IOR_IN, PG16_IOR_OUT,
-        PG15_IOR_IN, PG15_IOR_OUT,
-        PG14_IOR_IN, PG14_IOR_OUT,
-        PG13_IOR_IN, PG13_IOR_OUT,
-        PG12_IOR_IN, PG12_IOR_OUT,
-        PG11_IOR_IN, PG11_IOR_OUT,
-        PG10_IOR_IN, PG10_IOR_OUT,
-        PG9_IOR_IN, PG9_IOR_OUT,
-        PG8_IOR_IN, PG8_IOR_OUT,
-        PG7_IOR_IN, PG7_IOR_OUT,
-        PG6_IOR_IN, PG6_IOR_OUT,
-        PG5_IOR_IN, PG5_IOR_OUT,
-        PG4_IOR_IN, PG4_IOR_OUT,
-        PG3_IOR_IN, PG3_IOR_OUT,
-        PG2_IOR_IN, PG2_IOR_OUT,
-        PG1_IOR_IN, PG1_IOR_OUT,
-        PG0_IOR_IN, PG0_IOR_OUT,
-
-        PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11,
-        PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11,
-        PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11,
-        PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11,
-        PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
-        PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,
-        PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
-        PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,
-        PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
-        PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,
-        PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011,
-        PG17MD_100, PG17MD_101, PG17MD_110, PG17MD_111,
-        PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011,
-        PG16MD_100, PG16MD_101, PG16MD_110, PG16MD_111,
-        PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011,
-        PG15MD_100, PG15MD_101, PG15MD_110, PG15MD_111,
-        PG14MD_000, PG14MD_001, PG14MD_010, PG14MD_011,
-        PG14MD_100, PG14MD_101, PG14MD_110, PG14MD_111,
-        PG13MD_000, PG13MD_001, PG13MD_010, PG13MD_011,
-        PG13MD_100, PG13MD_101, PG13MD_110, PG13MD_111,
-        PG12MD_000, PG12MD_001, PG12MD_010, PG12MD_011,
-        PG12MD_100, PG12MD_101, PG12MD_110, PG12MD_111,
-        PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
-        PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,
-        PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
-        PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,
-        PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
-        PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,
-        PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
-        PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,
-        PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11,
-        PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11,
-        PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11,
-        PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11,
-        PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11,
-        PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11,
-        PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11,
-        PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
-        PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,
-
-        /* Port H */
-        PH7MD_0, PH7MD_1,
-        PH6MD_0, PH6MD_1,
-        PH5MD_0, PH5MD_1,
-        PH4MD_0, PH4MD_1,
-        PH3MD_0, PH3MD_1,
-        PH2MD_0, PH2MD_1,
-        PH1MD_0, PH1MD_1,
-        PH0MD_0, PH0MD_1,
-
-        /* Port I - not on device */
-
-        /* Port J */
-        PJ11_IOR_IN, PJ11_IOR_OUT,
-        PJ10_IOR_IN, PJ10_IOR_OUT,
-        PJ9_IOR_IN, PJ9_IOR_OUT,
-        PJ8_IOR_IN, PJ8_IOR_OUT,
-        PJ7_IOR_IN, PJ7_IOR_OUT,
-        PJ6_IOR_IN, PJ6_IOR_OUT,
-        PJ5_IOR_IN, PJ5_IOR_OUT,
-        PJ4_IOR_IN, PJ4_IOR_OUT,
-        PJ3_IOR_IN, PJ3_IOR_OUT,
-        PJ2_IOR_IN, PJ2_IOR_OUT,
-        PJ1_IOR_IN, PJ1_IOR_OUT,
-        PJ0_IOR_IN, PJ0_IOR_OUT,
-
-        PJ11MD_00, PJ11MD_01, PJ11MD_10, PJ11MD_11,
-        PJ10MD_00, PJ10MD_01, PJ10MD_10, PJ10MD_11,
-        PJ9MD_00, PJ9MD_01, PJ9MD_10, PJ9MD_11,
-        PJ8MD_00, PJ8MD_01, PJ8MD_10, PJ8MD_11,
-        PJ7MD_00, PJ7MD_01, PJ7MD_10, PJ7MD_11,
-        PJ6MD_00, PJ6MD_01, PJ6MD_10, PJ6MD_11,
-        PJ5MD_00, PJ5MD_01, PJ5MD_10, PJ5MD_11,
-        PJ4MD_00, PJ4MD_01, PJ4MD_10, PJ4MD_11,
-        PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11,
-        PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
-        PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,
-        PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
-        PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,
-        PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
-        PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,
-
-        /* Port K */
-        PK11_IOR_IN, PK11_IOR_OUT,
-        PK10_IOR_IN, PK10_IOR_OUT,
-        PK9_IOR_IN, PK9_IOR_OUT,
-        PK8_IOR_IN, PK8_IOR_OUT,
-        PK7_IOR_IN, PK7_IOR_OUT,
-        PK6_IOR_IN, PK6_IOR_OUT,
-        PK5_IOR_IN, PK5_IOR_OUT,
-        PK4_IOR_IN, PK4_IOR_OUT,
-        PK3_IOR_IN, PK3_IOR_OUT,
-        PK2_IOR_IN, PK2_IOR_OUT,
-        PK1_IOR_IN, PK1_IOR_OUT,
-        PK0_IOR_IN, PK0_IOR_OUT,
-
-        PK11MD_00, PK11MD_01, PK11MD_10, PK11MD_11,
-        PK10MD_00, PK10MD_01, PK10MD_10, PK10MD_11,
-        PK9MD_00, PK9MD_01, PK9MD_10, PK9MD_11,
-        PK8MD_00, PK8MD_01, PK8MD_10, PK8MD_11,
-        PK7MD_00, PK7MD_01, PK7MD_10, PK7MD_11,
-        PK6MD_00, PK6MD_01, PK6MD_10, PK6MD_11,
-        PK5MD_00, PK5MD_01, PK5MD_10, PK5MD_11,
-        PK4MD_00, PK4MD_01, PK4MD_10, PK4MD_11,
-        PK3MD_00, PK3MD_01, PK3MD_10, PK3MD_11,
-        PK2MD_00, PK2MD_01, PK2MD_10, PK2MD_11,
-        PK1MD_00, PK1MD_01, PK1MD_10, PK1MD_11,
-        PK0MD_00, PK0MD_01, PK0MD_10, PK0MD_11,
-        PINMUX_FUNCTION_END,
-
-        PINMUX_MARK_BEGIN,
-        /* Port A */
-
-        /* Port B */
-
-        /* Port C */
-
-        /* Port D */
-
-        /* Port E */
-
-        /* Port F */
-
-        /* Port G */
-
-        /* Port H */
-        PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK,
-        PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK,
-
-        /* Port I - not on device */
-
-        /* Port J */
-
-        /* Port K */
-
-        IRQ7_PC_MARK, IRQ6_PC_MARK, IRQ5_PC_MARK, IRQ4_PC_MARK,
-        IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK,
-        IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
-
-        PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK,
-        PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK,
-
-        SD_CD_MARK, SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK,
-        SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK,
-        CRX0_MARK, CRX1_MARK,
-        CTX0_MARK, CTX1_MARK,
-
-        PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK,
-        PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK,
-        PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,
-        PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,
-        IERXD_MARK, IETXD_MARK,
-        CRX0CRX1_MARK,
-        WDTOVF_MARK,
-
-        CRX0X1_MARK,
-
-        /* DMAC */
-        TEND0_MARK, DACK0_MARK, DREQ0_MARK,
-        TEND1_MARK, DACK1_MARK, DREQ1_MARK,
-
-        /* ADC */
-        ADTRG_MARK,
-
-        /* BSC */
-        A25_MARK, A24_MARK,
-        A23_MARK, A22_MARK, A21_MARK, A20_MARK,
-        A19_MARK, A18_MARK, A17_MARK, A16_MARK,
-        A15_MARK, A14_MARK, A13_MARK, A12_MARK,
-        A11_MARK, A10_MARK, A9_MARK, A8_MARK,
-        A7_MARK, A6_MARK, A5_MARK, A4_MARK,
-        A3_MARK, A2_MARK, A1_MARK, A0_MARK,
-        D15_MARK, D14_MARK, D13_MARK, D12_MARK,
-        D11_MARK, D10_MARK, D9_MARK, D8_MARK,
-        D7_MARK, D6_MARK, D5_MARK, D4_MARK,
-        D3_MARK, D2_MARK, D1_MARK, D0_MARK,
-        BS_MARK,
-        CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK,
-        CS6CE1B_MARK, CS5CE1A_MARK,
-        CE2A_MARK, CE2B_MARK,
-        RD_MARK, RDWR_MARK,
-        ICIOWRAH_MARK,
-        ICIORD_MARK,
-        WE1DQMUWE_MARK,
-        WE0DQML_MARK,
-        RAS_MARK, CAS_MARK, CKE_MARK,
-        WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK,
-
-        /* TMU */
-        TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK,
-        TIOC1A_MARK, TIOC1B_MARK,
-        TIOC2A_MARK, TIOC2B_MARK,
-        TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK,
-        TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK,
-        TCLKA_MARK,     TCLKB_MARK, TCLKC_MARK, TCLKD_MARK,
-
-        /* SCIF */
-        SCK0_MARK, SCK1_MARK, SCK2_MARK, SCK3_MARK,
-        RXD0_MARK, RXD1_MARK, RXD2_MARK, RXD3_MARK,
-        TXD0_MARK, TXD1_MARK, TXD2_MARK, TXD3_MARK,
-        RXD4_MARK, RXD5_MARK, RXD6_MARK, RXD7_MARK,
-        TXD4_MARK, TXD5_MARK, TXD6_MARK, TXD7_MARK,
-        RTS1_MARK, RTS3_MARK,
-        CTS1_MARK, CTS3_MARK,
-
-        /* RSPI */
-        RSPCK0_MARK, RSPCK1_MARK,
-        MOSI0_MARK, MOSI1_MARK,
-        MISO0_PF12_MARK, MISO1_MARK, MISO1_PG19_MARK,
-        SSL00_MARK, SSL10_MARK,
-
-        /* IIC3 */
-        SCL0_MARK, SCL1_MARK, SCL2_MARK,
-        SDA0_MARK, SDA1_MARK, SDA2_MARK,
-
-        /* SSI */
-        SSISCK0_MARK,
-        SSIWS0_MARK,
-        SSITXD0_MARK,
-        SSIRXD0_MARK,
-        SSIWS1_MARK, SSIWS2_MARK, SSIWS3_MARK,
-        SSISCK1_MARK, SSISCK2_MARK, SSISCK3_MARK,
-        SSIDATA1_MARK, SSIDATA2_MARK, SSIDATA3_MARK,
-        AUDIO_CLK_MARK,
-
-        /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
-        SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK,
-
-        /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
-        SPDIF_IN_MARK, SPDIF_OUT_MARK,
-
-        /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
-        FCE_MARK,
-        FRB_MARK,
-
-        /* VDC3 */
-        DV_CLK_MARK,
-        DV_VSYNC_MARK, DV_HSYNC_MARK,
-        DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK,
-        DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,
-        LCD_CLK_MARK, LCD_EXTCLK_MARK,
-        LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,
-        LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
-        LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
-        LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
-        LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
-        LCD_M_DISP_MARK,
-        PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
-
-        /* Port A */
-        PINMUX_DATA(PA3_DATA, PA3_IN),
-        PINMUX_DATA(PA2_DATA, PA2_IN),
-        PINMUX_DATA(PA1_DATA, PA1_IN),
-        PINMUX_DATA(PA0_DATA, PA0_IN),
-
-        /* Port B */
-        PINMUX_DATA(PB22_DATA, PB22MD_00, PB22_IN, PB22_OUT),
-        PINMUX_DATA(A22_MARK, PB22MD_01),
-        PINMUX_DATA(CS4_MARK, PB22MD_10),
-
-        PINMUX_DATA(PB21_DATA, PB21MD_0, PB21_IN, PB21_OUT),
-        PINMUX_DATA(A21_MARK, PB21MD_1),
-        PINMUX_DATA(A20_MARK, PB20MD_1),
-        PINMUX_DATA(A19_MARK, PB19MD_01),
-        PINMUX_DATA(A18_MARK, PB18MD_01),
-        PINMUX_DATA(A17_MARK, PB17MD_01),
-        PINMUX_DATA(A16_MARK, PB16MD_01),
-        PINMUX_DATA(A15_MARK, PB15MD_01),
-        PINMUX_DATA(A14_MARK, PB14MD_01),
-        PINMUX_DATA(A13_MARK, PB13MD_01),
-        PINMUX_DATA(A12_MARK, PB12MD_01),
-        PINMUX_DATA(A11_MARK, PB11MD_01),
-        PINMUX_DATA(A10_MARK, PB10MD_01),
-        PINMUX_DATA(A9_MARK, PB9MD_01),
-        PINMUX_DATA(A8_MARK, PB8MD_01),
-        PINMUX_DATA(A7_MARK, PB7MD_01),
-        PINMUX_DATA(A6_MARK, PB6MD_01),
-        PINMUX_DATA(A5_MARK, PB5MD_01),
-        PINMUX_DATA(A4_MARK, PB4MD_01),
-        PINMUX_DATA(A3_MARK, PB3MD_1),
-        PINMUX_DATA(A2_MARK, PB2MD_1),
-        PINMUX_DATA(A1_MARK, PB1MD_1),
-
-        /* Port C */
-        PINMUX_DATA(PC10_DATA, PC10MD_0),
-        PINMUX_DATA(TIOC2B_MARK, PC1MD_1),
-        PINMUX_DATA(PC9_DATA, PC9MD_0),
-        PINMUX_DATA(TIOC2A_MARK, PC9MD_1),
-        PINMUX_DATA(PC8_DATA, PC8MD_00),
-        PINMUX_DATA(CS3_MARK, PC8MD_01),
-        PINMUX_DATA(TIOC4D_MARK, PC8MD_10),
-        PINMUX_DATA(IRQ7_PC_MARK, PC8MD_11),
-        PINMUX_DATA(PC7_DATA, PC7MD_00),
-        PINMUX_DATA(CKE_MARK, PC7MD_01),
-        PINMUX_DATA(TIOC4C_MARK, PC7MD_10),
-        PINMUX_DATA(IRQ6_PC_MARK, PC7MD_11),
-        PINMUX_DATA(PC6_DATA, PC6MD_00),
-        PINMUX_DATA(CAS_MARK, PC6MD_01),
-        PINMUX_DATA(TIOC4B_MARK, PC6MD_10),
-        PINMUX_DATA(IRQ5_PC_MARK, PC6MD_11),
-        PINMUX_DATA(PC5_DATA, PC5MD_00),
-        PINMUX_DATA(RAS_MARK, PC5MD_01),
-        PINMUX_DATA(TIOC4A_MARK, PC5MD_10),
-        PINMUX_DATA(IRQ4_PC_MARK, PC5MD_11),
-        PINMUX_DATA(PC4_DATA, PC4MD_0),
-        PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_1),
-        PINMUX_DATA(PC3_DATA, PC3MD_0),
-        PINMUX_DATA(WE0DQML_MARK, PC3MD_1),
-        PINMUX_DATA(PC2_DATA, PC2MD_0),
-        PINMUX_DATA(RDWR_MARK, PC2MD_1),
-        PINMUX_DATA(PC1_DATA, PC1MD_0),
-        PINMUX_DATA(RD_MARK, PC1MD_1),
-        PINMUX_DATA(PC0_DATA, PC0MD_0),
-        PINMUX_DATA(CS0_MARK, PC0MD_1),
-
-        /* Port D */
-        PINMUX_DATA(D15_MARK, PD15MD_01),
-        PINMUX_DATA(D14_MARK, PD14MD_01),
-        PINMUX_DATA(D13_MARK, PD13MD_01),
-        PINMUX_DATA(D12_MARK, PD12MD_01),
-        PINMUX_DATA(D11_MARK, PD11MD_01),
-        PINMUX_DATA(D10_MARK, PD10MD_01),
-        PINMUX_DATA(D9_MARK, PD9MD_01),
-        PINMUX_DATA(D8_MARK, PD8MD_01),
-        PINMUX_DATA(D7_MARK, PD7MD_01),
-        PINMUX_DATA(D6_MARK, PD6MD_01),
-        PINMUX_DATA(D5_MARK, PD5MD_01),
-        PINMUX_DATA(D4_MARK, PD4MD_01),
-        PINMUX_DATA(D3_MARK, PD3MD_01),
-        PINMUX_DATA(D2_MARK, PD2MD_01),
-        PINMUX_DATA(D1_MARK, PD1MD_01),
-        PINMUX_DATA(D0_MARK, PD0MD_01),
-
-        /* Port E */
-        PINMUX_DATA(PE5_DATA, PE5MD_00),
-        PINMUX_DATA(SDA2_MARK, PE5MD_01),
-        PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11),
-
-        PINMUX_DATA(PE4_DATA, PE4MD_00),
-        PINMUX_DATA(SCL2_MARK, PE4MD_01),
-        PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11),
-
-        PINMUX_DATA(PE3_DATA, PE3MD_00),
-        PINMUX_DATA(SDA1_MARK, PE3MD_01),
-        PINMUX_DATA(IRQ3_PE_MARK, PE3MD_11),
-
-        PINMUX_DATA(PE2_DATA, PE2MD_00),
-        PINMUX_DATA(SCL1_MARK, PE2MD_01),
-        PINMUX_DATA(IRQ2_PE_MARK, PE2MD_11),
-
-        PINMUX_DATA(PE1_DATA, PE1MD_000),
-        PINMUX_DATA(SDA0_MARK, PE1MD_001),
-        PINMUX_DATA(IOIS16_MARK, PE1MD_010),
-        PINMUX_DATA(IRQ1_PE_MARK, PE1MD_011),
-        PINMUX_DATA(TCLKA_MARK, PE1MD_100),
-        PINMUX_DATA(ADTRG_MARK, PE1MD_101),
-
-        PINMUX_DATA(PE0_DATA, PE0MD_00),
-        PINMUX_DATA(SCL0_MARK, PE0MD_01),
-        PINMUX_DATA(AUDIO_CLK_MARK, PE0MD_10),
-        PINMUX_DATA(IRQ0_PE_MARK, PE0MD_11),
-
-        /* Port F */
-        PINMUX_DATA(PF12_DATA, PF12MD_000),
-        PINMUX_DATA(BS_MARK, PF12MD_001),
-        PINMUX_DATA(MISO0_PF12_MARK, PF12MD_011),
-        PINMUX_DATA(TIOC3D_MARK, PF12MD_100),
-        PINMUX_DATA(SPDIF_OUT_MARK, PF12MD_101),
-
-        PINMUX_DATA(PF11_DATA, PF11MD_000),
-        PINMUX_DATA(A25_MARK, PF11MD_001),
-        PINMUX_DATA(SSIDATA3_MARK, PF11MD_010),
-        PINMUX_DATA(MOSI0_MARK, PF11MD_011),
-        PINMUX_DATA(TIOC3C_MARK, PF11MD_100),
-        PINMUX_DATA(SPDIF_IN_MARK, PF11MD_101),
-
-        PINMUX_DATA(PF10_DATA, PF10MD_000),
-        PINMUX_DATA(A24_MARK, PF10MD_001),
-        PINMUX_DATA(SSIWS3_MARK, PF10MD_010),
-        PINMUX_DATA(SSL00_MARK, PF10MD_011),
-        PINMUX_DATA(TIOC3B_MARK, PF10MD_100),
-        PINMUX_DATA(FCE_MARK, PF10MD_101),
-
-        PINMUX_DATA(PF9_DATA, PF9MD_000),
-        PINMUX_DATA(A23_MARK, PF9MD_001),
-        PINMUX_DATA(SSISCK3_MARK, PF9MD_010),
-        PINMUX_DATA(RSPCK0_MARK, PF9MD_011),
-        PINMUX_DATA(TIOC3A_MARK, PF9MD_100),
-        PINMUX_DATA(FRB_MARK, PF9MD_101),
-
-        PINMUX_DATA(PF8_DATA, PF8MD_00),
-        PINMUX_DATA(CE2B_MARK, PF8MD_01),
-        PINMUX_DATA(SSIDATA3_MARK, PF8MD_10),
-        PINMUX_DATA(DV_CLK_MARK, PF8MD_11),
-
-        PINMUX_DATA(PF7_DATA, PF7MD_000),
-        PINMUX_DATA(CE2A_MARK, PF7MD_001),
-        PINMUX_DATA(SSIWS3_MARK, PF7MD_010),
-        PINMUX_DATA(DV_DATA7_MARK, PF7MD_011),
-        PINMUX_DATA(TCLKD_MARK, PF7MD_100),
-
-        PINMUX_DATA(PF6_DATA, PF6MD_000),
-        PINMUX_DATA(CS6CE1B_MARK, PF6MD_001),
-        PINMUX_DATA(SSISCK3_MARK, PF6MD_010),
-        PINMUX_DATA(DV_DATA6_MARK, PF6MD_011),
-        PINMUX_DATA(TCLKB_MARK, PF6MD_100),
-
-        PINMUX_DATA(PF5_DATA, PF5MD_000),
-        PINMUX_DATA(CS5CE1A_MARK, PF5MD_001),
-        PINMUX_DATA(SSIDATA2_MARK, PF5MD_010),
-        PINMUX_DATA(DV_DATA5_MARK, PF5MD_011),
-        PINMUX_DATA(TCLKC_MARK, PF5MD_100),
-
-        PINMUX_DATA(PF4_DATA, PF4MD_000),
-        PINMUX_DATA(ICIOWRAH_MARK, PF4MD_001),
-        PINMUX_DATA(SSIWS2_MARK, PF4MD_010),
-        PINMUX_DATA(DV_DATA4_MARK, PF4MD_011),
-        PINMUX_DATA(TXD3_MARK, PF4MD_100),
-
-        PINMUX_DATA(PF3_DATA, PF3MD_000),
-        PINMUX_DATA(ICIORD_MARK, PF3MD_001),
-        PINMUX_DATA(SSISCK2_MARK, PF3MD_010),
-        PINMUX_DATA(DV_DATA3_MARK, PF3MD_011),
-        PINMUX_DATA(RXD3_MARK, PF3MD_100),
-
-        PINMUX_DATA(PF2_DATA, PF2MD_000),
-        PINMUX_DATA(BACK_MARK, PF2MD_001),
-        PINMUX_DATA(SSIDATA1_MARK, PF2MD_010),
-        PINMUX_DATA(DV_DATA2_MARK, PF2MD_011),
-        PINMUX_DATA(TXD2_MARK, PF2MD_100),
-        PINMUX_DATA(DACK0_MARK, PF2MD_101),
-
-        PINMUX_DATA(PF1_DATA, PF1MD_000),
-        PINMUX_DATA(BREQ_MARK, PF1MD_001),
-        PINMUX_DATA(SSIWS1_MARK, PF1MD_010),
-        PINMUX_DATA(DV_DATA1_MARK, PF1MD_011),
-        PINMUX_DATA(RXD2_MARK, PF1MD_100),
-        PINMUX_DATA(DREQ0_MARK, PF1MD_101),
-
-        PINMUX_DATA(PF0_DATA, PF0MD_000),
-        PINMUX_DATA(WAIT_MARK, PF0MD_001),
-        PINMUX_DATA(SSISCK1_MARK, PF0MD_010),
-        PINMUX_DATA(DV_DATA0_MARK, PF0MD_011),
-        PINMUX_DATA(SCK2_MARK, PF0MD_100),
-        PINMUX_DATA(TEND0_MARK, PF0MD_101),
-
-        /* Port G */
-        PINMUX_DATA(PG24_DATA, PG24MD_00),
-        PINMUX_DATA(MOSI0_MARK, PG24MD_01),
-        PINMUX_DATA(TIOC0D_MARK, PG24MD_10),
-
-        PINMUX_DATA(PG23_DATA, PG23MD_00),
-        PINMUX_DATA(MOSI1_MARK, PG23MD_01),
-        PINMUX_DATA(TIOC0C_MARK, PG23MD_10),
-
-        PINMUX_DATA(PG22_DATA, PG22MD_00),
-        PINMUX_DATA(SSL10_MARK, PG22MD_01),
-        PINMUX_DATA(TIOC0B_MARK, PG22MD_10),
-
-        PINMUX_DATA(PG21_DATA, PG21MD_00),
-        PINMUX_DATA(RSPCK1_MARK, PG21MD_01),
-        PINMUX_DATA(TIOC0A_MARK, PG21MD_10),
-
-        PINMUX_DATA(PG20_DATA, PG20MD_000),
-        PINMUX_DATA(LCD_EXTCLK_MARK, PG20MD_001),
-        PINMUX_DATA(MISO1_MARK, PG20MD_011),
-        PINMUX_DATA(TXD7_MARK, PG20MD_100),
-
-        PINMUX_DATA(PG19_DATA, PG19MD_000),
-        PINMUX_DATA(LCD_CLK_MARK, PG19MD_001),
-        PINMUX_DATA(TIOC2B_MARK, PG19MD_010),
-        PINMUX_DATA(MISO1_PG19_MARK, PG19MD_011),
-        PINMUX_DATA(RXD7_MARK, PG19MD_100),
-
-        PINMUX_DATA(PG18_DATA, PG18MD_000),
-        PINMUX_DATA(LCD_DE_MARK, PG18MD_001),
-        PINMUX_DATA(TIOC2A_MARK, PG18MD_010),
-        PINMUX_DATA(SSL10_MARK, PG18MD_011),
-        PINMUX_DATA(TXD6_MARK, PG18MD_100),
-
-        PINMUX_DATA(PG17_DATA, PG17MD_000),
-        PINMUX_DATA(LCD_HSYNC_MARK, PG17MD_001),
-        PINMUX_DATA(TIOC1B_MARK, PG17MD_010),
-        PINMUX_DATA(RSPCK1_MARK, PG17MD_011),
-        PINMUX_DATA(RXD6_MARK, PG17MD_100),
-
-        PINMUX_DATA(PG16_DATA, PG16MD_000),
-        PINMUX_DATA(LCD_VSYNC_MARK, PG16MD_001),
-        PINMUX_DATA(TIOC1A_MARK, PG16MD_010),
-        PINMUX_DATA(TXD3_MARK, PG16MD_011),
-        PINMUX_DATA(CTS1_MARK, PG16MD_100),
-
-        PINMUX_DATA(PG15_DATA, PG15MD_000),
-        PINMUX_DATA(LCD_DATA15_MARK, PG15MD_001),
-        PINMUX_DATA(TIOC0D_MARK, PG15MD_010),
-        PINMUX_DATA(RXD3_MARK, PG15MD_011),
-        PINMUX_DATA(RTS1_MARK, PG15MD_100),
-
-        PINMUX_DATA(PG14_DATA, PG14MD_000),
-        PINMUX_DATA(LCD_DATA14_MARK, PG14MD_001),
-        PINMUX_DATA(TIOC0C_MARK, PG14MD_010),
-        PINMUX_DATA(SCK1_MARK, PG14MD_100),
-
-        PINMUX_DATA(PG13_DATA, PG13MD_000),
-        PINMUX_DATA(LCD_DATA13_MARK, PG13MD_001),
-        PINMUX_DATA(TIOC0B_MARK, PG13MD_010),
-        PINMUX_DATA(TXD1_MARK, PG13MD_100),
-
-        PINMUX_DATA(PG12_DATA, PG12MD_000),
-        PINMUX_DATA(LCD_DATA12_MARK, PG12MD_001),
-        PINMUX_DATA(TIOC0A_MARK, PG12MD_010),
-        PINMUX_DATA(RXD1_MARK, PG12MD_100),
-
-        PINMUX_DATA(PG11_DATA, PG11MD_000),
-        PINMUX_DATA(LCD_DATA11_MARK, PG11MD_001),
-        PINMUX_DATA(SSITXD0_MARK, PG11MD_010),
-        PINMUX_DATA(IRQ3_PG_MARK, PG11MD_011),
-        PINMUX_DATA(TXD5_MARK, PG11MD_100),
-        PINMUX_DATA(SIOFTXD_MARK, PG11MD_101),
-
-        PINMUX_DATA(PG10_DATA, PG10MD_000),
-        PINMUX_DATA(LCD_DATA10_MARK, PG10MD_001),
-        PINMUX_DATA(SSIRXD0_MARK, PG10MD_010),
-        PINMUX_DATA(IRQ2_PG_MARK, PG10MD_011),
-        PINMUX_DATA(RXD5_MARK, PG10MD_100),
-        PINMUX_DATA(SIOFRXD_MARK, PG10MD_101),
-
-        PINMUX_DATA(PG9_DATA, PG9MD_000),
-        PINMUX_DATA(LCD_DATA9_MARK, PG9MD_001),
-        PINMUX_DATA(SSIWS0_MARK, PG9MD_010),
-        PINMUX_DATA(TXD4_MARK, PG9MD_100),
-        PINMUX_DATA(SIOFSYNC_MARK, PG9MD_101),
-
-        PINMUX_DATA(PG8_DATA, PG8MD_000),
-        PINMUX_DATA(LCD_DATA8_MARK, PG8MD_001),
-        PINMUX_DATA(SSISCK0_MARK, PG8MD_010),
-        PINMUX_DATA(RXD4_MARK, PG8MD_100),
-        PINMUX_DATA(SIOFSCK_MARK, PG8MD_101),
-
-        PINMUX_DATA(PG7_DATA, PG7MD_00),
-        PINMUX_DATA(LCD_DATA7_MARK, PG7MD_01),
-        PINMUX_DATA(SD_CD_MARK, PG7MD_10),
-        PINMUX_DATA(PINT7_PG_MARK, PG7MD_11),
-
-        PINMUX_DATA(PG6_DATA, PG7MD_00),
-        PINMUX_DATA(LCD_DATA6_MARK, PG7MD_01),
-        PINMUX_DATA(SD_WP_MARK, PG7MD_10),
-        PINMUX_DATA(PINT6_PG_MARK, PG7MD_11),
-
-        PINMUX_DATA(PG5_DATA, PG5MD_00),
-        PINMUX_DATA(LCD_DATA5_MARK, PG5MD_01),
-        PINMUX_DATA(SD_D1_MARK, PG5MD_10),
-        PINMUX_DATA(PINT5_PG_MARK, PG5MD_11),
-
-        PINMUX_DATA(PG4_DATA, PG4MD_00),
-        PINMUX_DATA(LCD_DATA4_MARK, PG4MD_01),
-        PINMUX_DATA(SD_D0_MARK, PG4MD_10),
-        PINMUX_DATA(PINT4_PG_MARK, PG4MD_11),
-
-        PINMUX_DATA(PG3_DATA, PG3MD_00),
-        PINMUX_DATA(LCD_DATA3_MARK, PG3MD_01),
-        PINMUX_DATA(SD_CLK_MARK, PG3MD_10),
-        PINMUX_DATA(PINT3_PG_MARK, PG3MD_11),
-
-        PINMUX_DATA(PG2_DATA, PG2MD_00),
-        PINMUX_DATA(LCD_DATA2_MARK, PG2MD_01),
-        PINMUX_DATA(SD_CMD_MARK, PG2MD_10),
-        PINMUX_DATA(PINT2_PG_MARK, PG2MD_11),
-
-        PINMUX_DATA(PG1_DATA, PG1MD_00),
-        PINMUX_DATA(LCD_DATA1_MARK, PG1MD_01),
-        PINMUX_DATA(SD_D3_MARK, PG1MD_10),
-        PINMUX_DATA(PINT1_PG_MARK, PG1MD_11),
-
-        PINMUX_DATA(PG0_DATA, PG0MD_000),
-        PINMUX_DATA(LCD_DATA0_MARK, PG0MD_001),
-        PINMUX_DATA(SD_D2_MARK, PG0MD_010),
-        PINMUX_DATA(PINT0_PG_MARK, PG0MD_011),
-        PINMUX_DATA(WDTOVF_MARK, PG0MD_100),
-
-        /* Port H */
-        PINMUX_DATA(PH7_DATA, PH7MD_0),
-        PINMUX_DATA(PHAN7_MARK, PH7MD_1),
-
-        PINMUX_DATA(PH6_DATA, PH6MD_0),
-        PINMUX_DATA(PHAN6_MARK, PH6MD_1),
-
-        PINMUX_DATA(PH5_DATA, PH5MD_0),
-        PINMUX_DATA(PHAN5_MARK, PH5MD_1),
-
-        PINMUX_DATA(PH4_DATA, PH4MD_0),
-        PINMUX_DATA(PHAN4_MARK, PH4MD_1),
-
-        PINMUX_DATA(PH3_DATA, PH3MD_0),
-        PINMUX_DATA(PHAN3_MARK, PH3MD_1),
-
-        PINMUX_DATA(PH2_DATA, PH2MD_0),
-        PINMUX_DATA(PHAN2_MARK, PH2MD_1),
-
-        PINMUX_DATA(PH1_DATA, PH1MD_0),
-        PINMUX_DATA(PHAN1_MARK, PH1MD_1),
-
-        PINMUX_DATA(PH0_DATA, PH0MD_0),
-        PINMUX_DATA(PHAN0_MARK, PH0MD_1),
-
-        /* Port I - not on device */
-
-        /* Port J */
-        PINMUX_DATA(PJ11_DATA, PJ11MD_00),
-        PINMUX_DATA(PWM2H_MARK, PJ11MD_01),
-        PINMUX_DATA(DACK1_MARK, PJ11MD_10),
-
-        PINMUX_DATA(PJ10_DATA, PJ10MD_00),
-        PINMUX_DATA(PWM2G_MARK, PJ10MD_01),
-        PINMUX_DATA(DREQ1_MARK, PJ10MD_10),
-
-        PINMUX_DATA(PJ9_DATA, PJ9MD_00),
-        PINMUX_DATA(PWM2F_MARK, PJ9MD_01),
-        PINMUX_DATA(TEND1_MARK, PJ9MD_10),
-
-        PINMUX_DATA(PJ8_DATA, PJ8MD_00),
-        PINMUX_DATA(PWM2E_MARK, PJ8MD_01),
-        PINMUX_DATA(RTS3_MARK, PJ8MD_10),
-
-        PINMUX_DATA(PJ7_DATA, PJ7MD_00),
-        PINMUX_DATA(TIOC1B_MARK, PJ7MD_01),
-        PINMUX_DATA(CTS3_MARK, PJ7MD_10),
-
-        PINMUX_DATA(PJ6_DATA, PJ6MD_00),
-        PINMUX_DATA(TIOC1A_MARK, PJ6MD_01),
-        PINMUX_DATA(SCK3_MARK, PJ6MD_10),
-
-        PINMUX_DATA(PJ5_DATA, PJ5MD_00),
-        PINMUX_DATA(IERXD_MARK, PJ5MD_01),
-        PINMUX_DATA(TXD3_MARK, PJ5MD_10),
-
-        PINMUX_DATA(PJ4_DATA, PJ4MD_00),
-        PINMUX_DATA(IETXD_MARK, PJ4MD_01),
-        PINMUX_DATA(RXD3_MARK, PJ4MD_10),
-
-        PINMUX_DATA(PJ3_DATA, PJ3MD_00),
-        PINMUX_DATA(CRX1_MARK, PJ3MD_01),
-        PINMUX_DATA(CRX0X1_MARK, PJ3MD_10),
-        PINMUX_DATA(IRQ1_PJ_MARK, PJ3MD_11),
-
-        PINMUX_DATA(PJ2_DATA, PJ2MD_000),
-        PINMUX_DATA(CTX1_MARK, PJ2MD_001),
-        PINMUX_DATA(CRX0CRX1_MARK, PJ2MD_010),
-        PINMUX_DATA(CS2_MARK, PJ2MD_011),
-        PINMUX_DATA(SCK0_MARK, PJ2MD_100),
-        PINMUX_DATA(LCD_M_DISP_MARK, PJ2MD_101),
-
-        PINMUX_DATA(PJ1_DATA, PJ1MD_000),
-        PINMUX_DATA(CRX0_MARK, PJ1MD_001),
-        PINMUX_DATA(IERXD_MARK, PJ1MD_010),
-        PINMUX_DATA(IRQ0_PJ_MARK, PJ1MD_011),
-        PINMUX_DATA(RXD0_MARK, PJ1MD_100),
-
-        PINMUX_DATA(PJ0_DATA, PJ0MD_000),
-        PINMUX_DATA(CTX0_MARK, PJ0MD_001),
-        PINMUX_DATA(IERXD_MARK, PJ0MD_010),
-        PINMUX_DATA(CS1_MARK, PJ0MD_011),
-        PINMUX_DATA(TXD0_MARK, PJ0MD_100),
-        PINMUX_DATA(A0_MARK, PJ0MD_101),
-
-        /* Port K */
-        PINMUX_DATA(PK11_DATA, PK11MD_00),
-        PINMUX_DATA(PWM2D_MARK, PK11MD_01),
-        PINMUX_DATA(SSITXD0_MARK, PK11MD_10),
-
-        PINMUX_DATA(PK10_DATA, PK10MD_00),
-        PINMUX_DATA(PWM2C_MARK, PK10MD_01),
-        PINMUX_DATA(SSIRXD0_MARK, PK10MD_10),
-
-        PINMUX_DATA(PK9_DATA, PK9MD_00),
-        PINMUX_DATA(PWM2B_MARK, PK9MD_01),
-        PINMUX_DATA(SSIWS0_MARK, PK9MD_10),
-
-        PINMUX_DATA(PK8_DATA, PK8MD_00),
-        PINMUX_DATA(PWM2A_MARK, PK8MD_01),
-        PINMUX_DATA(SSISCK0_MARK, PK8MD_10),
-
-        PINMUX_DATA(PK7_DATA, PK7MD_00),
-        PINMUX_DATA(PWM1H_MARK, PK7MD_01),
-        PINMUX_DATA(SD_CD_MARK, PK7MD_10),
-
-        PINMUX_DATA(PK6_DATA, PK6MD_00),
-        PINMUX_DATA(PWM1G_MARK, PK6MD_01),
-        PINMUX_DATA(SD_WP_MARK, PK6MD_10),
-
-        PINMUX_DATA(PK5_DATA, PK5MD_00),
-        PINMUX_DATA(PWM1F_MARK, PK5MD_01),
-        PINMUX_DATA(SD_D1_MARK, PK5MD_10),
-
-        PINMUX_DATA(PK4_DATA, PK4MD_00),
-        PINMUX_DATA(PWM1E_MARK, PK4MD_01),
-        PINMUX_DATA(SD_D0_MARK, PK4MD_10),
-
-        PINMUX_DATA(PK3_DATA, PK3MD_00),
-        PINMUX_DATA(PWM1D_MARK, PK3MD_01),
-        PINMUX_DATA(SD_CLK_MARK, PK3MD_10),
-
-        PINMUX_DATA(PK2_DATA, PK2MD_00),
-        PINMUX_DATA(PWM1C_MARK, PK2MD_01),
-        PINMUX_DATA(SD_CMD_MARK, PK2MD_10),
-
-        PINMUX_DATA(PK1_DATA, PK1MD_00),
-        PINMUX_DATA(PWM1B_MARK, PK1MD_01),
-        PINMUX_DATA(SD_D3_MARK, PK1MD_10),
-
-        PINMUX_DATA(PK0_DATA, PK0MD_00),
-        PINMUX_DATA(PWM1A_MARK, PK0MD_01),
-        PINMUX_DATA(SD_D2_MARK, PK0MD_10),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
-
-        /* Port A */
-        PINMUX_GPIO(GPIO_PA3, PA3_DATA),
-        PINMUX_GPIO(GPIO_PA2, PA2_DATA),
-        PINMUX_GPIO(GPIO_PA1, PA1_DATA),
-        PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-
-        /* Port B */
-        PINMUX_GPIO(GPIO_PB22, PB22_DATA),
-        PINMUX_GPIO(GPIO_PB21, PB21_DATA),
-        PINMUX_GPIO(GPIO_PB20, PB20_DATA),
-        PINMUX_GPIO(GPIO_PB19, PB19_DATA),
-        PINMUX_GPIO(GPIO_PB18, PB18_DATA),
-        PINMUX_GPIO(GPIO_PB17, PB17_DATA),
-        PINMUX_GPIO(GPIO_PB16, PB16_DATA),
-        PINMUX_GPIO(GPIO_PB15, PB15_DATA),
-        PINMUX_GPIO(GPIO_PB14, PB14_DATA),
-        PINMUX_GPIO(GPIO_PB13, PB13_DATA),
-        PINMUX_GPIO(GPIO_PB12, PB12_DATA),
-        PINMUX_GPIO(GPIO_PB11, PB11_DATA),
-        PINMUX_GPIO(GPIO_PB10, PB10_DATA),
-        PINMUX_GPIO(GPIO_PB9, PB9_DATA),
-        PINMUX_GPIO(GPIO_PB8, PB8_DATA),
-        PINMUX_GPIO(GPIO_PB7, PB7_DATA),
-        PINMUX_GPIO(GPIO_PB6, PB6_DATA),
-        PINMUX_GPIO(GPIO_PB5, PB5_DATA),
-        PINMUX_GPIO(GPIO_PB4, PB4_DATA),
-        PINMUX_GPIO(GPIO_PB3, PB3_DATA),
-        PINMUX_GPIO(GPIO_PB2, PB2_DATA),
-        PINMUX_GPIO(GPIO_PB1, PB1_DATA),
-
-        /* Port C */
-        PINMUX_GPIO(GPIO_PC10, PC10_DATA),
-        PINMUX_GPIO(GPIO_PC9, PC9_DATA),
-        PINMUX_GPIO(GPIO_PC8, PC8_DATA),
-        PINMUX_GPIO(GPIO_PC7, PC7_DATA),
-        PINMUX_GPIO(GPIO_PC6, PC6_DATA),
-        PINMUX_GPIO(GPIO_PC5, PC5_DATA),
-        PINMUX_GPIO(GPIO_PC4, PC4_DATA),
-        PINMUX_GPIO(GPIO_PC3, PC3_DATA),
-        PINMUX_GPIO(GPIO_PC2, PC2_DATA),
-        PINMUX_GPIO(GPIO_PC1, PC1_DATA),
-        PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-
-        /* Port D */
-        PINMUX_GPIO(GPIO_PD15, PD15_DATA),
-        PINMUX_GPIO(GPIO_PD14, PD14_DATA),
-        PINMUX_GPIO(GPIO_PD13, PD13_DATA),
-        PINMUX_GPIO(GPIO_PD12, PD12_DATA),
-        PINMUX_GPIO(GPIO_PD11, PD11_DATA),
-        PINMUX_GPIO(GPIO_PD10, PD10_DATA),
-        PINMUX_GPIO(GPIO_PD9, PD9_DATA),
-        PINMUX_GPIO(GPIO_PD8, PD8_DATA),
-        PINMUX_GPIO(GPIO_PD7, PD7_DATA),
-        PINMUX_GPIO(GPIO_PD6, PD6_DATA),
-        PINMUX_GPIO(GPIO_PD5, PD5_DATA),
-        PINMUX_GPIO(GPIO_PD4, PD4_DATA),
-        PINMUX_GPIO(GPIO_PD3, PD3_DATA),
-        PINMUX_GPIO(GPIO_PD2, PD2_DATA),
-        PINMUX_GPIO(GPIO_PD1, PD1_DATA),
-        PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-
-        /* Port E */
-        PINMUX_GPIO(GPIO_PE5, PE5_DATA),
-        PINMUX_GPIO(GPIO_PE4, PE4_DATA),
-        PINMUX_GPIO(GPIO_PE3, PE3_DATA),
-        PINMUX_GPIO(GPIO_PE2, PE2_DATA),
-        PINMUX_GPIO(GPIO_PE1, PE1_DATA),
-        PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-
-        /* Port F */
-        PINMUX_GPIO(GPIO_PF12, PF12_DATA),
-        PINMUX_GPIO(GPIO_PF11, PF11_DATA),
-        PINMUX_GPIO(GPIO_PF10, PF10_DATA),
-        PINMUX_GPIO(GPIO_PF9, PF9_DATA),
-        PINMUX_GPIO(GPIO_PF8, PF8_DATA),
-        PINMUX_GPIO(GPIO_PF7, PF7_DATA),
-        PINMUX_GPIO(GPIO_PF6, PF6_DATA),
-        PINMUX_GPIO(GPIO_PF5, PF5_DATA),
-        PINMUX_GPIO(GPIO_PF4, PF4_DATA),
-        PINMUX_GPIO(GPIO_PF3, PF3_DATA),
-        PINMUX_GPIO(GPIO_PF2, PF2_DATA),
-        PINMUX_GPIO(GPIO_PF1, PF1_DATA),
-        PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-
-        /* Port G */
-        PINMUX_GPIO(GPIO_PG24, PG24_DATA),
-        PINMUX_GPIO(GPIO_PG23, PG23_DATA),
-        PINMUX_GPIO(GPIO_PG22, PG22_DATA),
-        PINMUX_GPIO(GPIO_PG21, PG21_DATA),
-        PINMUX_GPIO(GPIO_PG20, PG20_DATA),
-        PINMUX_GPIO(GPIO_PG19, PG19_DATA),
-        PINMUX_GPIO(GPIO_PG18, PG18_DATA),
-        PINMUX_GPIO(GPIO_PG17, PG17_DATA),
-        PINMUX_GPIO(GPIO_PG16, PG16_DATA),
-        PINMUX_GPIO(GPIO_PG15, PG15_DATA),
-        PINMUX_GPIO(GPIO_PG14, PG14_DATA),
-        PINMUX_GPIO(GPIO_PG13, PG13_DATA),
-        PINMUX_GPIO(GPIO_PG12, PG12_DATA),
-        PINMUX_GPIO(GPIO_PG11, PG11_DATA),
-        PINMUX_GPIO(GPIO_PG10, PG10_DATA),
-        PINMUX_GPIO(GPIO_PG9, PG9_DATA),
-        PINMUX_GPIO(GPIO_PG8, PG8_DATA),
-        PINMUX_GPIO(GPIO_PG7, PG7_DATA),
-        PINMUX_GPIO(GPIO_PG6, PG6_DATA),
-        PINMUX_GPIO(GPIO_PG5, PG5_DATA),
-        PINMUX_GPIO(GPIO_PG4, PG4_DATA),
-        PINMUX_GPIO(GPIO_PG3, PG3_DATA),
-        PINMUX_GPIO(GPIO_PG2, PG2_DATA),
-        PINMUX_GPIO(GPIO_PG1, PG1_DATA),
-        PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-
-        /* Port H - Port H does not have a Data Register */
-
-        /* Port I - not on device */
-
-        /* Port J */
-        PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),
-        PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),
-        PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),
-        PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),
-        PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
-        PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
-        PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
-        PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
-        PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
-        PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
-        PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
-        PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
-
-        /* Port K */
-        PINMUX_GPIO(GPIO_PK11, PK11_DATA),
-        PINMUX_GPIO(GPIO_PK10, PK10_DATA),
-        PINMUX_GPIO(GPIO_PK9, PK9_DATA),
-        PINMUX_GPIO(GPIO_PK8, PK8_DATA),
-        PINMUX_GPIO(GPIO_PK7, PK7_DATA),
-        PINMUX_GPIO(GPIO_PK6, PK6_DATA),
-        PINMUX_GPIO(GPIO_PK5, PK5_DATA),
-        PINMUX_GPIO(GPIO_PK4, PK4_DATA),
-        PINMUX_GPIO(GPIO_PK3, PK3_DATA),
-        PINMUX_GPIO(GPIO_PK2, PK2_DATA),
-        PINMUX_GPIO(GPIO_PK1, PK1_DATA),
-        PINMUX_GPIO(GPIO_PK0, PK0_DATA),
-
-        /* INTC */
-        PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK),
-
-        PINMUX_GPIO(GPIO_FN_IRQ7_PC, IRQ7_PC_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ6_PC, IRQ6_PC_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ5_PC, IRQ5_PC_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ4_PC, IRQ4_PC_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),
-
-        /* WDT */
-        PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
-
-        /* CAN */
-        PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
-        PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK),
-
-        /* DMAC */
-        PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
-        PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
-        PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
-        PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
-        PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
-        PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
-
-        /* ADC */
-        PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
-
-        /* BSCh */
-        PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
-        PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
-        PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
-        PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
-        PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
-        PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
-        PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
-        PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
-        PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
-        PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
-        PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
-        PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
-        PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
-        PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
-        PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
-        PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
-        PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
-        PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
-        PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
-        PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
-        PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
-        PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
-        PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
-        PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
-        PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
-        PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
-        PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
-        PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
-        PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
-        PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
-        PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
-        PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
-        PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
-        PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
-        PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
-        PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
-        PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
-        PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
-        PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
-        PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
-        PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
-        PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
-        PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
-        PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
-        PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
-        PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
-        PINMUX_GPIO(GPIO_FN_CS6CE1B, CS6CE1B_MARK),
-        PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK),
-        PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
-        PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
-        PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
-        PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
-        PINMUX_GPIO(GPIO_FN_ICIOWRAH, ICIOWRAH_MARK),
-        PINMUX_GPIO(GPIO_FN_ICIORD, ICIORD_MARK),
-        PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK),
-        PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK),
-        PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
-        PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
-        PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
-        PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
-        PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
-        PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
-        PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
-
-        /* TMU */
-        PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK),
-
-        /* SCIF */
-        PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
-        PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
-        PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK),
-        PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK),
-        PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK),
-
-        /* RSPI */
-        PINMUX_GPIO(GPIO_FN_RSPCK0, RSPCK0_MARK),
-        PINMUX_GPIO(GPIO_FN_MOSI0, MOSI0_MARK),
-        PINMUX_GPIO(GPIO_FN_MISO0_PF12, MISO0_PF12_MARK),
-        PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSL00, SSL00_MARK),
-        PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK),
-        PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK),
-        PINMUX_GPIO(GPIO_FN_MISO1_PG19, MISO1_PG19_MARK),
-        PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK),
-
-        /* IIC3 */
-        PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
-        PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
-        PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
-        PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
-        PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
-        PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
-
-        /* SSI */
-        PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
-        PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
-        PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
-        PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
-
-        /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
-        PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK),
-        PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK),
-        PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK),
-
-        /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
-        PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK),
-        PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK),
-
-        /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
-        PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
-        PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
-
-        /* VDC3 */
-        PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
-
-        PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
-        { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PA3_IN, PA3_OUT,
-                PA2_IN, PA2_OUT,
-                PA1_IN, PA1_OUT,
-                PA0_IN, PA0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PB22MD_00, PB22MD_01, PB22MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PB21MD_0, PB21MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB20MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-
-        },
-        { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {
-                0, PB19MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB18MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB17MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB16MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {
-                0, PB15MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB14MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB13MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB12MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {
-                0, PB11MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB10MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB9MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB8MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {
-                0, PB7MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB6MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB5MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB4MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {
-                0, PB3MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB2MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB1MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0,
-                PB22_IN, PB22_OUT,
-                PB21_IN, PB21_OUT,
-                PB20_IN, PB20_OUT,
-                PB19_IN, PB19_OUT,
-                PB18_IN, PB18_OUT,
-                PB17_IN, PB17_OUT,
-                PB16_IN, PB16_OUT }
-        },
-
-        { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {
-                PB15_IN, PB15_OUT,
-                PB14_IN, PB14_OUT,
-                PB13_IN, PB13_OUT,
-                PB12_IN, PB12_OUT,
-                PB11_IN, PB11_OUT,
-                PB10_IN, PB10_OUT,
-                PB9_IN, PB9_OUT,
-                PB8_IN, PB8_OUT,
-                PB7_IN, PB7_OUT,
-                PB6_IN, PB6_OUT,
-                PB5_IN, PB5_OUT,
-                PB4_IN, PB4_OUT,
-                PB3_IN, PB3_OUT,
-                PB2_IN, PB2_OUT,
-                PB1_IN, PB1_OUT,
-                0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC10MD_0, PC10MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC9MD_0, PC9MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {
-                PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC4MD_0, PC4MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {
-                PC3MD_0, PC3MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC2MD_0, PC2MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-                PC10_IN, PC10_OUT,
-                PC9_IN, PC9_OUT,
-                PC8_IN, PC8_OUT,
-                PC7_IN, PC7_OUT,
-                PC6_IN, PC6_OUT,
-                PC5_IN, PC5_OUT,
-                PC4_IN, PC4_OUT,
-                PC3_IN, PC3_OUT,
-                PC2_IN, PC2_OUT,
-                PC1_IN, PC1_OUT,
-                PC0_IN, PC0_OUT
-         }
-        },
-
-        { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {
-                0, PD15MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD14MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD13MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD12MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {
-                0, PD11MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD10MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD9MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD8MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {
-                0, PD7MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD6MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD5MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD4MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {
-                0, PD3MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD2MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD1MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PD0MD_01, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {
-                PD15_IN, PD15_OUT,
-                PD14_IN, PD14_OUT,
-                PD13_IN, PD13_OUT,
-                PD12_IN, PD12_OUT,
-                PD11_IN, PD11_OUT,
-                PD10_IN, PD10_OUT,
-                PD9_IN, PD9_OUT,
-                PD8_IN, PD8_OUT,
-                PD7_IN, PD7_OUT,
-                PD6_IN, PD6_OUT,
-                PD5_IN, PD5_OUT,
-                PD4_IN, PD4_OUT,
-                PD3_IN, PD3_OUT,
-                PD2_IN, PD2_OUT,
-                PD1_IN, PD1_OUT,
-                PD0_IN, PD0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE5MD_00, PE5MD_01, 0, PE5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE4MD_00, PE4MD_01, 0, PE4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {
-                PE3MD_00, PE3MD_01, 0, PE3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE2MD_00, PE2MD_01, 0, PE2MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
-                PE1MD_100, PE1MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0,
-                PE5_IN, PE5_OUT,
-                PE4_IN, PE4_OUT,
-                PE3_IN, PE3_OUT,
-                PE2_IN, PE2_OUT,
-                PE1_IN, PE1_OUT,
-                PE0_IN, PE0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
-                PF12MD_000, PF12MD_001, 0, PF12MD_011,
-                PF12MD_100, PF12MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {
-                PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
-                PF11MD_100, PF11MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
-                PF10MD_100, PF10MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
-                PF9MD_100, PF9MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {
-                PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
-                PF7MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
-                PF6MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
-                PF5MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
-                PF4MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {
-                PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
-                PF3MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
-                PF2MD_100, PF2MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
-                PF1MD_100, PF1MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0
-         }
-        },
-
-        { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
-                0, 0, 0, 0, 0, 0,
-                PF12_IN, PF12_OUT,
-                PF11_IN, PF11_OUT,
-                PF10_IN, PF10_OUT,
-                PF9_IN, PF9_OUT,
-                PF8_IN, PF8_OUT,
-                PF7_IN, PF7_OUT,
-                PF6_IN, PF6_OUT,
-                PF5_IN, PF5_OUT,
-                PF4_IN, PF4_OUT,
-                PF3_IN, PF3_OUT,
-                PF2_IN, PF2_OUT,
-                PF1_IN, PF1_OUT,
-                PF0_IN, PF0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PGCR7", 0xfffe38c0, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
-                PG0MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {
-                PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
-                PG20MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {
-                PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
-                PG19MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
-                PG18MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011,
-                PG17MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011,
-                PG16MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {
-                PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011,
-                PG15MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG14MD_000, PG14MD_001, PG14MD_010, 0,
-                PG14MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG13MD_000, PG13MD_001, PG13MD_010, 0,
-                PG13MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG12MD_000, PG12MD_001, PG12MD_010, 0,
-                PG12MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {
-                PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
-                PG11MD_100, PG11MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
-                PG10MD_100, PG10MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
-                PG9MD_100, PG9MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
-                PG8MD_100, PG8MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {
-                PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {
-                PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0,
-                PG24_IN, PG24_OUT,
-                PG23_IN, PG23_OUT,
-                PG22_IN, PG22_OUT,
-                PG21_IN, PG21_OUT,
-                PG20_IN, PG20_OUT,
-                PG19_IN, PG19_OUT,
-                PG18_IN, PG18_OUT,
-                PG17_IN, PG17_OUT,
-                PG16_IN, PG16_OUT }
-        },
-
-        { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {
-                PG15_IN, PG15_OUT,
-                PG14_IN, PG14_OUT,
-                PG13_IN, PG13_OUT,
-                PG12_IN, PG12_OUT,
-                PG11_IN, PG11_OUT,
-                PG10_IN, PG10_OUT,
-                PG9_IN, PG9_OUT,
-                PG8_IN, PG8_OUT,
-                PG7_IN, PG7_OUT,
-                PG6_IN, PG6_OUT,
-                PG5_IN, PG5_OUT,
-                PG4_IN, PG4_OUT,
-                PG3_IN, PG3_OUT,
-                PG2_IN, PG2_OUT,
-                PG1_IN, PG1_OUT,
-                PG0_IN, PG0_OUT
-         }
-        },
-
-        { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {
-                PH7MD_0, PH7MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PH6MD_0, PH6MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PH5MD_0, PH5MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PH4MD_0, PH4MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {
-                PH3MD_0, PH3MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PH2MD_0, PH2MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PH1MD_0, PH1MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PH0MD_0, PH0MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {
-                PJ11MD_00, PJ11MD_01, PJ11MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ10MD_00, PJ10MD_01, PJ10MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ9MD_00, PJ9MD_01, PJ9MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ8MD_00, PJ8MD_01, PJ8MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {
-                PJ7MD_00, PJ7MD_01, PJ7MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ6MD_00, PJ6MD_01, PJ6MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ5MD_00, PJ5MD_01, PJ5MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ4MD_00, PJ4MD_01, PJ4MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {
-                PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
-                PJ2MD_100, PJ2MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
-                PJ1MD_100, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
-                PJ0MD_100, PJ0MD_101, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0, }
-        },
-        { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ11_IN, PJ11_OUT,
-                PJ10_IN, PJ10_OUT,
-                PJ9_IN, PJ9_OUT,
-                PJ8_IN, PJ8_OUT,
-                PJ7_IN, PJ7_OUT,
-                PJ6_IN, PJ6_OUT,
-                PJ5_IN, PJ5_OUT,
-                PJ4_IN, PJ4_OUT,
-                PJ3_IN, PJ3_OUT,
-                PJ2_IN, PJ2_OUT,
-                PJ1_IN, PJ1_OUT,
-                PJ0_IN, PJ0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PKCR2", 0xfffe392a, 16, 4) {
-                PK11MD_00, PK11MD_01, PK11MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK10MD_00, PK10MD_01, PK10MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK9MD_00, PK9MD_01, PK9MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK8MD_00, PK8MD_01, PK8MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PKCR1", 0xfffe392c, 16, 4) {
-                PK7MD_00, PK7MD_01, PK7MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK6MD_00, PK6MD_01, PK6MD_10, 0,  0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK5MD_00, PK5MD_01, PK5MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK4MD_00, PK4MD_01, PK4MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PKCR0", 0xfffe392e, 16, 4) {
-                PK3MD_00, PK3MD_01, PK3MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK2MD_00, PK2MD_01, PK2MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK1MD_00, PK1MD_01, PK1MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PK0MD_00, PK0MD_01, PK0MD_10, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PKIOR0", 0xfffe3932, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PJ11_IN, PJ11_OUT,
-                PJ10_IN, PJ10_OUT,
-                PJ9_IN, PJ9_OUT,
-                PJ8_IN, PJ8_OUT,
-                PJ7_IN, PJ7_OUT,
-                PJ6_IN, PJ6_OUT,
-                PJ5_IN, PJ5_OUT,
-                PJ4_IN, PJ4_OUT,
-                PJ3_IN, PJ3_OUT,
-                PJ2_IN, PJ2_OUT,
-                PJ1_IN, PJ1_OUT,
-                PJ0_IN, PJ0_OUT }
-        },
-        {}
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
-        { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) {
-                0, 0, 0, 0, 0, 0, 0, PA3_DATA,
-                0, 0, 0, 0, 0, 0, 0, PA2_DATA }
-        },
-
-        { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
-                0, 0, 0, 0, 0, 0, 0, PA1_DATA,
-                0, 0, 0, 0, 0, 0, 0, PA0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB22_DATA, PB21_DATA, PB20_DATA,
-                PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }
-        },
-
-        { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
-                PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
-                PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
-                PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
-                PB3_DATA, PB2_DATA, PB1_DATA, 0 }
-        },
-
-        { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
-                0, 0, 0, 0,
-                0, PC10_DATA, PC9_DATA, PC8_DATA,
-                PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
-                PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
-                PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
-                PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
-                PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
-                PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, PE5_DATA, PE4_DATA,
-                PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
-                0, 0, 0, PF12_DATA,
-                PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
-                PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
-                PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
-                0, 0, 0, 0, 0, 0, 0, PG24_DATA,
-                PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
-                PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }
-        },
-
-        { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
-                PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
-                PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
-                PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
-                PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
-        },
-        { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
-                0, 0, 0, PJ12_DATA,
-                PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
-                PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
-                PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
-        },
-        { PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16) {
-                0, 0, 0, PK12_DATA,
-                PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,
-                PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
-                PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
-        },
-        { }
-};
-
-static struct pinmux_info sh7264_pinmux_info = {
-        .name = "sh7264_pfc",
-        .reserved_id = PINMUX_RESERVED,
-        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
-        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
-        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
-        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
-        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
-        .first_gpio = GPIO_PA3,
-        .last_gpio = GPIO_FN_LCD_M_DISP,
-
-        .gpios = pinmux_gpios,
-        .cfg_regs = pinmux_config_regs,
-        .data_regs = pinmux_data_regs,
-
-        .gpio_data = pinmux_data,
-        .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-static int __init plat_pinmux_setup(void)
-{
-        return register_pinmux(&sh7264_pinmux_info);
-}
-arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
deleted file mode 100644
index 039e4587dd9..00000000000
--- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
+++ /dev/null
@@ -1,2839 +0,0 @@
-/*
- * SH7269 Pinmux
- *
- * Copyright (C) 2012  Renesas Electronics Europe Ltd
- * Copyright (C) 2012  Phil Edworthy
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <cpu/sh7269.h>
-
-enum {
-        PINMUX_RESERVED = 0,
-
-        PINMUX_DATA_BEGIN,
-        /* Port A */
-        PA1_DATA, PA0_DATA,
-        /* Port B */
-        PB22_DATA, PB21_DATA, PB20_DATA,
-        PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,
-        PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
-        PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
-        PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
-        PB3_DATA, PB2_DATA, PB1_DATA,
-        /* Port C */
-        PC8_DATA,
-        PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
-        PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
-        /* Port D */
-        PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
-        PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
-        PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
-        PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
-        /* Port E */
-        PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
-        PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
-        /* Port F */
-        PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
-        PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
-        PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
-        PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
-        PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
-        PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
-        /* Port G */
-        PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,
-        PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
-        PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,
-        PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
-        PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
-        PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
-        PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
-        /* Port H */
-        /* NOTE - Port H does not have a Data Register, but PH Data is
-           connected to PH Port Register */
-        PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
-        PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
-        /* Port I - not on device */
-        /* Port J */
-        PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,
-        PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,
-        PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,
-        PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA,
-        PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,
-        PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
-        PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
-        PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
-        PINMUX_DATA_END,
-
-        PINMUX_INPUT_BEGIN,
-        FORCE_IN,
-        /* Port A */
-        PA1_IN, PA0_IN,
-        /* Port B */
-        PB22_IN, PB21_IN, PB20_IN,
-        PB19_IN, PB18_IN, PB17_IN, PB16_IN,
-        PB15_IN, PB14_IN, PB13_IN, PB12_IN,
-        PB11_IN, PB10_IN, PB9_IN, PB8_IN,
-        PB7_IN, PB6_IN, PB5_IN, PB4_IN,
-        PB3_IN, PB2_IN, PB1_IN,
-        /* Port C */
-        PC8_IN,
-        PC7_IN, PC6_IN, PC5_IN, PC4_IN,
-        PC3_IN, PC2_IN, PC1_IN, PC0_IN,
-        /* Port D */
-        PD15_IN, PD14_IN, PD13_IN, PD12_IN,
-        PD11_IN, PD10_IN, PD9_IN, PD8_IN,
-        PD7_IN, PD6_IN, PD5_IN, PD4_IN,
-        PD3_IN, PD2_IN, PD1_IN, PD0_IN,
-        /* Port E */
-        PE7_IN, PE6_IN, PE5_IN, PE4_IN,
-        PE3_IN, PE2_IN, PE1_IN, PE0_IN,
-        /* Port F */
-        PF23_IN, PF22_IN, PF21_IN, PF20_IN,
-        PF19_IN, PF18_IN, PF17_IN, PF16_IN,
-        PF15_IN, PF14_IN, PF13_IN, PF12_IN,
-        PF11_IN, PF10_IN, PF9_IN, PF8_IN,
-        PF7_IN, PF6_IN, PF5_IN, PF4_IN,
-        PF3_IN, PF2_IN, PF1_IN, PF0_IN,
-        /* Port G */
-        PG27_IN, PG26_IN, PG25_IN, PG24_IN,
-        PG23_IN, PG22_IN, PG21_IN, PG20_IN,
-        PG19_IN, PG18_IN, PG17_IN, PG16_IN,
-        PG15_IN, PG14_IN, PG13_IN, PG12_IN,
-        PG11_IN, PG10_IN, PG9_IN, PG8_IN,
-        PG7_IN, PG6_IN, PG5_IN, PG4_IN,
-        PG3_IN, PG2_IN, PG1_IN, PG0_IN,
-        /* Port H - Port H does not have a Data Register */
-        /* Port I - not on device */
-        /* Port J */
-        PJ31_IN, PJ30_IN, PJ29_IN, PJ28_IN,
-        PJ27_IN, PJ26_IN, PJ25_IN, PJ24_IN,
-        PJ23_IN, PJ22_IN, PJ21_IN, PJ20_IN,
-        PJ19_IN, PJ18_IN, PJ17_IN, PJ16_IN,
-        PJ15_IN, PJ14_IN, PJ13_IN, PJ12_IN,
-        PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN,
-        PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
-        PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
-        PINMUX_INPUT_END,
-
-        PINMUX_OUTPUT_BEGIN,
-        FORCE_OUT,
-        /* Port A */
-        PA1_OUT, PA0_OUT,
-        /* Port B */
-        PB22_OUT, PB21_OUT, PB20_OUT,
-        PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT,
-        PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT,
-        PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
-        PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
-        PB3_OUT, PB2_OUT, PB1_OUT,
-        /* Port C */
-        PC8_OUT,
-        PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
-        PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
-        /* Port D */
-        PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
-        PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
-        PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
-        PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
-        /* Port E */
-        PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
-        PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
-        /* Port F */
-        PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
-        PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
-        PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
-        PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
-        PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
-        PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
-        /* Port G */
-        PG27_OUT, PG26_OUT, PG25_OUT, PG24_OUT,
-        PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT,
-        PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT,
-        PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT,
-        PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT,
-        PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
-        PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
-        /* Port H - Port H does not have a Data Register */
-        /* Port I - not on device */
-        /* Port J */
-        PJ31_OUT, PJ30_OUT, PJ29_OUT, PJ28_OUT,
-        PJ27_OUT, PJ26_OUT, PJ25_OUT, PJ24_OUT,
-        PJ23_OUT, PJ22_OUT, PJ21_OUT, PJ20_OUT,
-        PJ19_OUT, PJ18_OUT, PJ17_OUT, PJ16_OUT,
-        PJ15_OUT, PJ14_OUT, PJ13_OUT, PJ12_OUT,
-        PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT,
-        PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
-        PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
-        PINMUX_OUTPUT_END,
-
-        PINMUX_FUNCTION_BEGIN,
-        /* Port A */
-        PA1_IOR_IN, PA1_IOR_OUT,
-        PA0_IOR_IN, PA0_IOR_OUT,
-
-        /* Port B */
-        PB22_IOR_IN, PB22_IOR_OUT,
-        PB21_IOR_IN, PB21_IOR_OUT,
-        PB20_IOR_IN, PB20_IOR_OUT,
-        PB19_IOR_IN, PB19_IOR_OUT,
-        PB18_IOR_IN, PB18_IOR_OUT,
-        PB17_IOR_IN, PB17_IOR_OUT,
-        PB16_IOR_IN, PB16_IOR_OUT,
-
-        PB15_IOR_IN, PB15_IOR_OUT,
-        PB14_IOR_IN, PB14_IOR_OUT,
-        PB13_IOR_IN, PB13_IOR_OUT,
-        PB12_IOR_IN, PB12_IOR_OUT,
-        PB11_IOR_IN, PB11_IOR_OUT,
-        PB10_IOR_IN, PB10_IOR_OUT,
-        PB9_IOR_IN, PB9_IOR_OUT,
-        PB8_IOR_IN, PB8_IOR_OUT,
-
-        PB7_IOR_IN, PB7_IOR_OUT,
-        PB6_IOR_IN, PB6_IOR_OUT,
-        PB5_IOR_IN, PB5_IOR_OUT,
-        PB4_IOR_IN, PB4_IOR_OUT,
-        PB3_IOR_IN, PB3_IOR_OUT,
-        PB2_IOR_IN, PB2_IOR_OUT,
-        PB1_IOR_IN, PB1_IOR_OUT,
-        PB0_IOR_IN, PB0_IOR_OUT,
-
-        PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011,
-        PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111,
-        PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11,
-        PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011,
-        PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111,
-        PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011,
-        PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111,
-        PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011,
-        PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111,
-        PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011,
-        PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111,
-        PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011,
-        PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111,
-        PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011,
-        PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111,
-        PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011,
-        PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111,
-        PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011,
-        PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111,
-        PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
-
-        PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11,
-        PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11,
-        PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11,
-        PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11,
-
-        PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
-        PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
-        PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
-        PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
-
-        PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
-        PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
-        PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
-
-        /* Port C */
-        PC8_IOR_IN, PC8_IOR_OUT,
-        PC7_IOR_IN, PC7_IOR_OUT,
-        PC6_IOR_IN, PC6_IOR_OUT,
-        PC5_IOR_IN, PC5_IOR_OUT,
-        PC4_IOR_IN, PC4_IOR_OUT,
-        PC3_IOR_IN, PC3_IOR_OUT,
-        PC2_IOR_IN, PC2_IOR_OUT,
-        PC1_IOR_IN, PC1_IOR_OUT,
-        PC0_IOR_IN, PC0_IOR_OUT,
-
-        PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011,
-        PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111,
-        PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011,
-        PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111,
-        PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011,
-        PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111,
-        PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011,
-        PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111,
-        PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11,
-
-        PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11,
-        PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11,
-        PC1MD_0, PC1MD_1,
-        PC0MD_0, PC0MD_1,
-
-        /* Port D */
-        PD15_IOR_IN, PD15_IOR_OUT,
-        PD14_IOR_IN, PD14_IOR_OUT,
-        PD13_IOR_IN, PD13_IOR_OUT,
-        PD12_IOR_IN, PD12_IOR_OUT,
-        PD11_IOR_IN, PD11_IOR_OUT,
-        PD10_IOR_IN, PD10_IOR_OUT,
-        PD9_IOR_IN, PD9_IOR_OUT,
-        PD8_IOR_IN, PD8_IOR_OUT,
-        PD7_IOR_IN, PD7_IOR_OUT,
-        PD6_IOR_IN, PD6_IOR_OUT,
-        PD5_IOR_IN, PD5_IOR_OUT,
-        PD4_IOR_IN, PD4_IOR_OUT,
-        PD3_IOR_IN, PD3_IOR_OUT,
-        PD2_IOR_IN, PD2_IOR_OUT,
-        PD1_IOR_IN, PD1_IOR_OUT,
-        PD0_IOR_IN, PD0_IOR_OUT,
-
-        PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11,
-        PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11,
-        PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11,
-        PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11,
-
-        PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11,
-        PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11,
-        PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11,
-        PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11,
-
-        PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11,
-        PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11,
-        PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11,
-        PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11,
-
-        PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11,
-        PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11,
-        PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11,
-        PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11,
-
-        /* Port E */
-        PE7_IOR_IN, PE7_IOR_OUT,
-        PE6_IOR_IN, PE6_IOR_OUT,
-        PE5_IOR_IN, PE5_IOR_OUT,
-        PE4_IOR_IN, PE4_IOR_OUT,
-        PE3_IOR_IN, PE3_IOR_OUT,
-        PE2_IOR_IN, PE2_IOR_OUT,
-        PE1_IOR_IN, PE1_IOR_OUT,
-        PE0_IOR_IN, PE0_IOR_OUT,
-
-        PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11,
-        PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11,
-        PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11,
-        PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11,
-
-        PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011,
-        PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111,
-        PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011,
-        PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111,
-        PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
-        PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,
-        PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11,
-
-        /* Port F */
-        PF23_IOR_IN, PF23_IOR_OUT,
-        PF22_IOR_IN, PF22_IOR_OUT,
-        PF21_IOR_IN, PF21_IOR_OUT,
-        PF20_IOR_IN, PF20_IOR_OUT,
-        PF19_IOR_IN, PF19_IOR_OUT,
-        PF18_IOR_IN, PF18_IOR_OUT,
-        PF17_IOR_IN, PF17_IOR_OUT,
-        PF16_IOR_IN, PF16_IOR_OUT,
-        PF15_IOR_IN, PF15_IOR_OUT,
-        PF14_IOR_IN, PF14_IOR_OUT,
-        PF13_IOR_IN, PF13_IOR_OUT,
-        PF12_IOR_IN, PF12_IOR_OUT,
-        PF11_IOR_IN, PF11_IOR_OUT,
-        PF10_IOR_IN, PF10_IOR_OUT,
-        PF9_IOR_IN, PF9_IOR_OUT,
-        PF8_IOR_IN, PF8_IOR_OUT,
-        PF7_IOR_IN, PF7_IOR_OUT,
-        PF6_IOR_IN, PF6_IOR_OUT,
-        PF5_IOR_IN, PF5_IOR_OUT,
-        PF4_IOR_IN, PF4_IOR_OUT,
-        PF3_IOR_IN, PF3_IOR_OUT,
-        PF2_IOR_IN, PF2_IOR_OUT,
-        PF1_IOR_IN, PF1_IOR_OUT,
-        PF0_IOR_IN, PF0_IOR_OUT,
-
-        PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011,
-        PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111,
-        PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011,
-        PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111,
-        PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011,
-        PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111,
-        PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011,
-        PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111,
-
-        PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011,
-        PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111,
-        PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011,
-        PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111,
-        PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011,
-        PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111,
-        PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011,
-        PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111,
-
-        PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011,
-        PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111,
-        PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011,
-        PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111,
-        PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011,
-        PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111,
-        PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,
-        PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,
-
-        PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
-        PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,
-        PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
-        PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,
-        PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
-        PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,
-        PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011,
-        PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111,
-
-        PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
-        PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,
-        PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
-        PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,
-        PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
-        PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,
-        PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
-        PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,
-
-        PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
-        PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,
-        PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
-        PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,
-        PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
-        PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,
-        PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
-        PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,
-
-        /* Port G */
-        PG27_IOR_IN, PG27_IOR_OUT,
-        PG26_IOR_IN, PG26_IOR_OUT,
-        PG25_IOR_IN, PG25_IOR_OUT,
-        PG24_IOR_IN, PG24_IOR_OUT,
-        PG23_IOR_IN, PG23_IOR_OUT,
-        PG22_IOR_IN, PG22_IOR_OUT,
-        PG21_IOR_IN, PG21_IOR_OUT,
-        PG20_IOR_IN, PG20_IOR_OUT,
-        PG19_IOR_IN, PG19_IOR_OUT,
-        PG18_IOR_IN, PG18_IOR_OUT,
-        PG17_IOR_IN, PG17_IOR_OUT,
-        PG16_IOR_IN, PG16_IOR_OUT,
-        PG15_IOR_IN, PG15_IOR_OUT,
-        PG14_IOR_IN, PG14_IOR_OUT,
-        PG13_IOR_IN, PG13_IOR_OUT,
-        PG12_IOR_IN, PG12_IOR_OUT,
-        PG11_IOR_IN, PG11_IOR_OUT,
-        PG10_IOR_IN, PG10_IOR_OUT,
-        PG9_IOR_IN, PG9_IOR_OUT,
-        PG8_IOR_IN, PG8_IOR_OUT,
-        PG7_IOR_IN, PG7_IOR_OUT,
-        PG6_IOR_IN, PG6_IOR_OUT,
-        PG5_IOR_IN, PG5_IOR_OUT,
-        PG4_IOR_IN, PG4_IOR_OUT,
-        PG3_IOR_IN, PG3_IOR_OUT,
-        PG2_IOR_IN, PG2_IOR_OUT,
-        PG1_IOR_IN, PG1_IOR_OUT,
-        PG0_IOR_IN, PG0_IOR_OUT,
-
-        PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11,
-        PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11,
-        PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11,
-        PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11,
-
-        PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011,
-        PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111,
-        PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011,
-        PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111,
-        PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011,
-        PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111,
-        PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
-        PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,
-
-        PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
-        PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,
-        PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
-        PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,
-        PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11,
-        PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11,
-
-        PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11,
-        PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11,
-        PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11,
-        PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11,
-
-        PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
-        PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,
-        PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
-        PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,
-        PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
-        PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,
-        PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
-        PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,
-
-        PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011,
-        PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111,
-        PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011,
-        PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111,
-        PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011,
-        PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111,
-        PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011,
-        PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111,
-
-        PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011,
-        PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111,
-        PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011,
-        PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111,
-        PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011,
-        PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111,
-        PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
-        PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,
-
-        /* Port H */
-        PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11,
-        PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11,
-        PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11,
-        PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11,
-
-        PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11,
-        PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11,
-        PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11,
-        PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11,
-
-        /* Port I - not on device */
-
-        /* Port J */
-        PJ31_IOR_IN, PJ31_IOR_OUT,
-        PJ30_IOR_IN, PJ30_IOR_OUT,
-        PJ29_IOR_IN, PJ29_IOR_OUT,
-        PJ28_IOR_IN, PJ28_IOR_OUT,
-        PJ27_IOR_IN, PJ27_IOR_OUT,
-        PJ26_IOR_IN, PJ26_IOR_OUT,
-        PJ25_IOR_IN, PJ25_IOR_OUT,
-        PJ24_IOR_IN, PJ24_IOR_OUT,
-        PJ23_IOR_IN, PJ23_IOR_OUT,
-        PJ22_IOR_IN, PJ22_IOR_OUT,
-        PJ21_IOR_IN, PJ21_IOR_OUT,
-        PJ20_IOR_IN, PJ20_IOR_OUT,
-        PJ19_IOR_IN, PJ19_IOR_OUT,
-        PJ18_IOR_IN, PJ18_IOR_OUT,
-        PJ17_IOR_IN, PJ17_IOR_OUT,
-        PJ16_IOR_IN, PJ16_IOR_OUT,
-        PJ15_IOR_IN, PJ15_IOR_OUT,
-        PJ14_IOR_IN, PJ14_IOR_OUT,
-        PJ13_IOR_IN, PJ13_IOR_OUT,
-        PJ12_IOR_IN, PJ12_IOR_OUT,
-        PJ11_IOR_IN, PJ11_IOR_OUT,
-        PJ10_IOR_IN, PJ10_IOR_OUT,
-        PJ9_IOR_IN, PJ9_IOR_OUT,
-        PJ8_IOR_IN, PJ8_IOR_OUT,
-        PJ7_IOR_IN, PJ7_IOR_OUT,
-        PJ6_IOR_IN, PJ6_IOR_OUT,
-        PJ5_IOR_IN, PJ5_IOR_OUT,
-        PJ4_IOR_IN, PJ4_IOR_OUT,
-        PJ3_IOR_IN, PJ3_IOR_OUT,
-        PJ2_IOR_IN, PJ2_IOR_OUT,
-        PJ1_IOR_IN, PJ1_IOR_OUT,
-        PJ0_IOR_IN, PJ0_IOR_OUT,
-
-        PJ31MD_0, PJ31MD_1,
-        PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011,
-        PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111,
-        PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011,
-        PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111,
-        PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011,
-        PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111,
-
-        PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011,
-        PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111,
-        PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011,
-        PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111,
-        PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011,
-        PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111,
-        PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011,
-        PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111,
-
-        PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011,
-        PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111,
-        PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011,
-        PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111,
-        PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011,
-        PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111,
-        PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011,
-        PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111,
-
-        PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011,
-        PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111,
-        PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011,
-        PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111,
-        PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011,
-        PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111,
-        PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011,
-        PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111,
-
-        PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011,
-        PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111,
-        PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011,
-        PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111,
-        PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011,
-        PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111,
-        PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011,
-        PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111,
-
-        PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011,
-        PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111,
-        PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011,
-        PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111,
-        PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011,
-        PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111,
-        PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011,
-        PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111,
-
-        PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011,
-        PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111,
-        PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011,
-        PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111,
-        PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011,
-        PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111,
-        PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011,
-        PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111,
-
-        PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011,
-        PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111,
-        PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
-        PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,
-        PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
-        PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,
-        PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
-        PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,
-
-        PINMUX_FUNCTION_END,
-
-        PINMUX_MARK_BEGIN,
-        /* Port H */
-        PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK,
-        PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK,
-
-        /* IRQs */
-        IRQ7_PG_MARK, IRQ6_PG_MARK, IRQ5_PG_MARK, IRQ4_PG_MARK,
-        IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PG_MARK, IRQ0_PG_MARK,
-        IRQ7_PF_MARK, IRQ6_PF_MARK, IRQ5_PF_MARK, IRQ4_PF_MARK,
-        IRQ3_PJ_MARK, IRQ2_PJ_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK,
-        IRQ1_PC_MARK, IRQ0_PC_MARK,
-
-        PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK,
-        PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK,
-        PINT7_PH_MARK, PINT6_PH_MARK, PINT5_PH_MARK, PINT4_PH_MARK,
-        PINT3_PH_MARK, PINT2_PH_MARK, PINT1_PH_MARK, PINT0_PH_MARK,
-        PINT7_PJ_MARK, PINT6_PJ_MARK, PINT5_PJ_MARK, PINT4_PJ_MARK,
-        PINT3_PJ_MARK, PINT2_PJ_MARK, PINT1_PJ_MARK, PINT0_PJ_MARK,
-
-        /* SD */
-        SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK,
-        SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK, SD_CD_MARK,
-
-        /* MMC */
-        MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK,
-        MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK,
-        MMC_CLK_MARK, MMC_CMD_MARK, MMC_CD_MARK,
-
-        /* PWM */
-        PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK,
-        PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK,
-        PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,
-        PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,
-
-        /* IEBus */
-        IERXD_MARK, IETXD_MARK,
-
-        /* WDT */
-        WDTOVF_MARK,
-
-        /* DMAC */
-        TEND0_MARK, DACK0_MARK, DREQ0_MARK,
-        TEND1_MARK, DACK1_MARK, DREQ1_MARK,
-
-        /* ADC */
-        ADTRG_MARK,
-
-        /* BSC */
-        A25_MARK, A24_MARK,
-        A23_MARK, A22_MARK, A21_MARK, A20_MARK,
-        A19_MARK, A18_MARK, A17_MARK, A16_MARK,
-        A15_MARK, A14_MARK, A13_MARK, A12_MARK,
-        A11_MARK, A10_MARK, A9_MARK, A8_MARK,
-        A7_MARK, A6_MARK, A5_MARK, A4_MARK,
-        A3_MARK, A2_MARK, A1_MARK, A0_MARK,
-        D31_MARK, D30_MARK, D29_MARK, D28_MARK,
-        D27_MARK, D26_MARK, D25_MARK, D24_MARK,
-        D23_MARK, D22_MARK, D21_MARK, D20_MARK,
-        D19_MARK, D18_MARK, D17_MARK, D16_MARK,
-        D15_MARK, D14_MARK, D13_MARK, D12_MARK,
-        D11_MARK, D10_MARK, D9_MARK, D8_MARK,
-        D7_MARK, D6_MARK, D5_MARK, D4_MARK,
-        D3_MARK, D2_MARK, D1_MARK, D0_MARK,
-        BS_MARK,
-        CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK,
-        CS5CE1A_MARK,
-        CE2A_MARK, CE2B_MARK,
-        RD_MARK, RDWR_MARK,
-        WE3ICIOWRAHDQMUU_MARK,
-        WE2ICIORDDQMUL_MARK,
-        WE1DQMUWE_MARK,
-        WE0DQML_MARK,
-        RAS_MARK, CAS_MARK, CKE_MARK,
-        WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK,
-
-        /* TMU */
-        TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK,
-        TIOC1A_MARK, TIOC1B_MARK,
-        TIOC2A_MARK, TIOC2B_MARK,
-        TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK,
-        TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK,
-        TCLKA_MARK, TCLKB_MARK, TCLKC_MARK, TCLKD_MARK,
-
-        /* SCIF */
-        SCK0_MARK, RXD0_MARK, TXD0_MARK,
-        SCK1_MARK, RXD1_MARK, TXD1_MARK, RTS1_MARK, CTS1_MARK,
-        SCK2_MARK, RXD2_MARK, TXD2_MARK,
-        SCK3_MARK, RXD3_MARK, TXD3_MARK,
-        SCK4_MARK, RXD4_MARK, TXD4_MARK,
-        SCK5_MARK, RXD5_MARK, TXD5_MARK, RTS5_MARK, CTS5_MARK,
-        SCK6_MARK, RXD6_MARK, TXD6_MARK,
-        SCK7_MARK, RXD7_MARK, TXD7_MARK, RTS7_MARK, CTS7_MARK,
-
-        /* RSPI */
-        MISO0_PB20_MARK, MOSI0_PB19_MARK, SSL00_PB18_MARK, RSPCK0_PB17_MARK,
-        MISO0_PJ19_MARK, MOSI0_PJ18_MARK, SSL00_PJ17_MARK, RSPCK0_PJ16_MARK,
-        MISO1_MARK, MOSI1_MARK, SSL10_MARK, RSPCK1_MARK,
-
-        /* IIC3 */
-        SCL0_MARK, SDA0_MARK,
-        SCL1_MARK, SDA1_MARK,
-        SCL2_MARK, SDA2_MARK,
-        SCL3_MARK, SDA3_MARK,
-
-        /* SSI */
-        SSISCK0_MARK, SSIWS0_MARK, SSITXD0_MARK, SSIRXD0_MARK,
-        SSISCK1_MARK, SSIWS1_MARK, SSIDATA1_MARK,
-        SSISCK2_MARK, SSIWS2_MARK, SSIDATA2_MARK,
-        SSISCK3_MARK, SSIWS3_MARK, SSIDATA3_MARK,
-        SSISCK4_MARK, SSIWS4_MARK, SSIDATA4_MARK,
-        SSISCK5_MARK, SSIWS5_MARK, SSIDATA5_MARK,
-        AUDIO_CLK_MARK,
-        AUDIO_XOUT_MARK,
-
-        /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
-        SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK,
-
-        /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
-        SPDIF_IN_MARK, SPDIF_OUT_MARK,
-        SPDIF_IN_PJ24_MARK, SPDIF_OUT_PJ25_MARK,
-
-        /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
-        FCE_MARK,
-        FRB_MARK,
-
-        /* CAN */
-        CRX0_MARK, CTX0_MARK,
-        CRX1_MARK, CTX1_MARK,
-        CRX2_MARK, CTX2_MARK,
-        CRX0CRX1_MARK,
-        CRX0CRX1CRX2_MARK,
-        CTX0CTX1CTX2_MARK,
-        CRX1_PJ22_MARK, CTX1_PJ23_MARK,
-        CRX2_PJ20_MARK, CTX2_PJ21_MARK,
-        CRX0CRX1_PJ22_MARK,
-        CRX0CRX1CRX2_PJ20_MARK,
-
-        /* VDC */
-        DV_CLK_MARK,
-        DV_VSYNC_MARK, DV_HSYNC_MARK,
-        DV_DATA23_MARK, DV_DATA22_MARK, DV_DATA21_MARK, DV_DATA20_MARK,
-        DV_DATA19_MARK, DV_DATA18_MARK, DV_DATA17_MARK, DV_DATA16_MARK,
-        DV_DATA15_MARK, DV_DATA14_MARK, DV_DATA13_MARK, DV_DATA12_MARK,
-        DV_DATA11_MARK, DV_DATA10_MARK, DV_DATA9_MARK, DV_DATA8_MARK,
-        DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK,
-        DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,
-        LCD_CLK_MARK, LCD_EXTCLK_MARK,
-        LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,
-        LCD_DATA23_PG23_MARK, LCD_DATA22_PG22_MARK, LCD_DATA21_PG21_MARK,
-        LCD_DATA20_PG20_MARK, LCD_DATA19_PG19_MARK, LCD_DATA18_PG18_MARK,
-        LCD_DATA17_PG17_MARK, LCD_DATA16_PG16_MARK, LCD_DATA15_PG15_MARK,
-        LCD_DATA14_PG14_MARK, LCD_DATA13_PG13_MARK, LCD_DATA12_PG12_MARK,
-        LCD_DATA11_PG11_MARK, LCD_DATA10_PG10_MARK, LCD_DATA9_PG9_MARK,
-        LCD_DATA8_PG8_MARK, LCD_DATA7_PG7_MARK, LCD_DATA6_PG6_MARK,
-        LCD_DATA5_PG5_MARK, LCD_DATA4_PG4_MARK, LCD_DATA3_PG3_MARK,
-        LCD_DATA2_PG2_MARK, LCD_DATA1_PG1_MARK, LCD_DATA0_PG0_MARK,
-        LCD_DATA23_PJ23_MARK, LCD_DATA22_PJ22_MARK, LCD_DATA21_PJ21_MARK,
-        LCD_DATA20_PJ20_MARK, LCD_DATA19_PJ19_MARK, LCD_DATA18_PJ18_MARK,
-        LCD_DATA17_PJ17_MARK, LCD_DATA16_PJ16_MARK, LCD_DATA15_PJ15_MARK,
-        LCD_DATA14_PJ14_MARK, LCD_DATA13_PJ13_MARK, LCD_DATA12_PJ12_MARK,
-        LCD_DATA11_PJ11_MARK, LCD_DATA10_PJ10_MARK, LCD_DATA9_PJ9_MARK,
-        LCD_DATA8_PJ8_MARK, LCD_DATA7_PJ7_MARK, LCD_DATA6_PJ6_MARK,
-        LCD_DATA5_PJ5_MARK, LCD_DATA4_PJ4_MARK, LCD_DATA3_PJ3_MARK,
-        LCD_DATA2_PJ2_MARK, LCD_DATA1_PJ1_MARK, LCD_DATA0_PJ0_MARK,
-        LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK,
-        LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK,
-        LCD_M_DISP_MARK,
-        PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
-
-        /* Port A */
-        PINMUX_DATA(PA1_DATA, PA1_IN),
-        PINMUX_DATA(PA0_DATA, PA0_IN),
-
-        /* Port B */
-        PINMUX_DATA(PB22_DATA, PB22MD_000, PB22_IN, PB22_OUT),
-        PINMUX_DATA(A22_MARK, PB22MD_001),
-        PINMUX_DATA(CTX2_MARK, PB22MD_010),
-        PINMUX_DATA(IETXD_MARK, PB22MD_011),
-        PINMUX_DATA(CS4_MARK, PB22MD_100),
-
-        PINMUX_DATA(PB21_DATA, PB21MD_00, PB21_IN, PB21_OUT),
-        PINMUX_DATA(A21_MARK, PB21MD_01),
-        PINMUX_DATA(CRX2_MARK, PB21MD_10),
-        PINMUX_DATA(IERXD_MARK, PB21MD_11),
-
-        PINMUX_DATA(A20_MARK, PB20MD_001),
-        PINMUX_DATA(A19_MARK, PB19MD_001),
-        PINMUX_DATA(A18_MARK, PB18MD_001),
-        PINMUX_DATA(A17_MARK, PB17MD_001),
-        PINMUX_DATA(A16_MARK, PB16MD_001),
-        PINMUX_DATA(A15_MARK, PB15MD_001),
-        PINMUX_DATA(A14_MARK, PB14MD_001),
-        PINMUX_DATA(A13_MARK, PB13MD_001),
-        PINMUX_DATA(A12_MARK, PB12MD_01),
-        PINMUX_DATA(A11_MARK, PB11MD_01),
-        PINMUX_DATA(A10_MARK, PB10MD_01),
-        PINMUX_DATA(A9_MARK, PB9MD_01),
-        PINMUX_DATA(A8_MARK, PB8MD_01),
-        PINMUX_DATA(A7_MARK, PB7MD_01),
-        PINMUX_DATA(A6_MARK, PB6MD_01),
-        PINMUX_DATA(A5_MARK, PB5MD_01),
-        PINMUX_DATA(A4_MARK, PB4MD_01),
-        PINMUX_DATA(A3_MARK, PB3MD_01),
-        PINMUX_DATA(A2_MARK, PB2MD_01),
-        PINMUX_DATA(A1_MARK, PB1MD_01),
-
-        /* Port C */
-        PINMUX_DATA(PC8_DATA, PC8MD_000),
-        PINMUX_DATA(CS3_MARK, PC8MD_001),
-        PINMUX_DATA(TXD7_MARK, PC8MD_010),
-        PINMUX_DATA(CTX1_MARK, PC8MD_011),
-
-        PINMUX_DATA(PC7_DATA, PC7MD_000),
-        PINMUX_DATA(CKE_MARK, PC7MD_001),
-        PINMUX_DATA(RXD7_MARK, PC7MD_010),
-        PINMUX_DATA(CRX1_MARK, PC7MD_011),
-        PINMUX_DATA(CRX0CRX1_MARK, PC7MD_100),
-        PINMUX_DATA(IRQ1_PC_MARK, PC7MD_101),
-
-        PINMUX_DATA(PC6_DATA, PC6MD_000),
-        PINMUX_DATA(CAS_MARK, PC6MD_001),
-        PINMUX_DATA(SCK7_MARK, PC6MD_010),
-        PINMUX_DATA(CTX0_MARK, PC6MD_011),
-
-        PINMUX_DATA(PC5_DATA, PC5MD_000),
-        PINMUX_DATA(RAS_MARK, PC5MD_001),
-        PINMUX_DATA(CRX0_MARK, PC5MD_011),
-        PINMUX_DATA(CTX0CTX1CTX2_MARK, PC5MD_100),
-        PINMUX_DATA(IRQ0_PC_MARK, PC5MD_101),
-
-        PINMUX_DATA(PC4_DATA, PC4MD_00),
-        PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_01),
-        PINMUX_DATA(TXD6_MARK, PC4MD_10),
-
-        PINMUX_DATA(PC3_DATA, PC3MD_00),
-        PINMUX_DATA(WE0DQML_MARK, PC3MD_01),
-        PINMUX_DATA(RXD6_MARK, PC3MD_10),
-
-        PINMUX_DATA(PC2_DATA, PC2MD_00),
-        PINMUX_DATA(RDWR_MARK, PC2MD_01),
-        PINMUX_DATA(SCK5_MARK, PC2MD_10),
-
-        PINMUX_DATA(PC1_DATA, PC1MD_0),
-        PINMUX_DATA(RD_MARK, PC1MD_1),
-
-        PINMUX_DATA(PC0_DATA, PC0MD_0),
-        PINMUX_DATA(CS0_MARK, PC0MD_1),
-
-        /* Port D */
-        PINMUX_DATA(D15_MARK, PD15MD_01),
-        PINMUX_DATA(D14_MARK, PD14MD_01),
-
-        PINMUX_DATA(PD13_DATA, PD13MD_00),
-        PINMUX_DATA(D13_MARK, PD13MD_01),
-        PINMUX_DATA(PWM2F_MARK, PD13MD_10),
-
-        PINMUX_DATA(PD12_DATA, PD12MD_00),
-        PINMUX_DATA(D12_MARK, PD12MD_01),
-        PINMUX_DATA(PWM2E_MARK, PD12MD_10),
-
-        PINMUX_DATA(D11_MARK, PD11MD_01),
-        PINMUX_DATA(D10_MARK, PD10MD_01),
-        PINMUX_DATA(D9_MARK, PD9MD_01),
-        PINMUX_DATA(D8_MARK, PD8MD_01),
-        PINMUX_DATA(D7_MARK, PD7MD_01),
-        PINMUX_DATA(D6_MARK, PD6MD_01),
-        PINMUX_DATA(D5_MARK, PD5MD_01),
-        PINMUX_DATA(D4_MARK, PD4MD_01),
-        PINMUX_DATA(D3_MARK, PD3MD_01),
-        PINMUX_DATA(D2_MARK, PD2MD_01),
-        PINMUX_DATA(D1_MARK, PD1MD_01),
-        PINMUX_DATA(D0_MARK, PD0MD_01),
-
-        /* Port E */
-        PINMUX_DATA(PE7_DATA, PE7MD_00),
-        PINMUX_DATA(SDA3_MARK, PE7MD_01),
-        PINMUX_DATA(RXD7_MARK, PE7MD_10),
-
-        PINMUX_DATA(PE6_DATA, PE6MD_00),
-        PINMUX_DATA(SCL3_MARK, PE6MD_01),
-        PINMUX_DATA(RXD6_MARK, PE6MD_10),
-
-        PINMUX_DATA(PE5_DATA, PE5MD_00),
-        PINMUX_DATA(SDA2_MARK, PE5MD_01),
-        PINMUX_DATA(RXD5_MARK, PE5MD_10),
-        PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11),
-
-        PINMUX_DATA(PE4_DATA, PE4MD_00),
-        PINMUX_DATA(SCL2_MARK, PE4MD_01),
-        PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11),
-
-        PINMUX_DATA(PE3_DATA, PE3MD_000),
-        PINMUX_DATA(SDA1_MARK, PE3MD_001),
-        PINMUX_DATA(TCLKD_MARK, PE3MD_010),
-        PINMUX_DATA(ADTRG_MARK, PE3MD_011),
-        PINMUX_DATA(DV_HSYNC_MARK, PE3MD_100),
-
-        PINMUX_DATA(PE2_DATA, PE2MD_000),
-        PINMUX_DATA(SCL1_MARK, PE2MD_001),
-        PINMUX_DATA(TCLKD_MARK, PE2MD_010),
-        PINMUX_DATA(IOIS16_MARK, PE2MD_011),
-        PINMUX_DATA(DV_VSYNC_MARK, PE2MD_100),
-
-        PINMUX_DATA(PE1_DATA, PE1MD_000),
-        PINMUX_DATA(SDA0_MARK, PE1MD_001),
-        PINMUX_DATA(TCLKB_MARK, PE1MD_010),
-        PINMUX_DATA(AUDIO_CLK_MARK, PE1MD_010),
-        PINMUX_DATA(DV_CLK_MARK, PE1MD_100),
-
-        PINMUX_DATA(PE0_DATA, PE0MD_00),
-        PINMUX_DATA(SCL0_MARK, PE0MD_01),
-        PINMUX_DATA(TCLKA_MARK, PE0MD_10),
-        PINMUX_DATA(LCD_EXTCLK_MARK, PE0MD_11),
-
-        /* Port F */
-        PINMUX_DATA(PF23_DATA, PF23MD_000),
-        PINMUX_DATA(SD_D2_MARK, PF23MD_001),
-        PINMUX_DATA(TXD3_MARK, PF23MD_100),
-        PINMUX_DATA(MMC_D2_MARK, PF23MD_101),
-
-        PINMUX_DATA(PF22_DATA, PF22MD_000),
-        PINMUX_DATA(SD_D3_MARK, PF22MD_001),
-        PINMUX_DATA(RXD3_MARK, PF22MD_100),
-        PINMUX_DATA(MMC_D3_MARK, PF22MD_101),
-
-        PINMUX_DATA(PF21_DATA, PF21MD_000),
-        PINMUX_DATA(SD_CMD_MARK, PF21MD_001),
-        PINMUX_DATA(SCK3_MARK, PF21MD_100),
-        PINMUX_DATA(MMC_CMD_MARK, PF21MD_101),
-
-        PINMUX_DATA(PF20_DATA, PF20MD_000),
-        PINMUX_DATA(SD_CLK_MARK, PF20MD_001),
-        PINMUX_DATA(SSIDATA3_MARK, PF20MD_010),
-        PINMUX_DATA(MMC_CLK_MARK, PF20MD_101),
-
-        PINMUX_DATA(PF19_DATA, PF19MD_000),
-        PINMUX_DATA(SD_D0_MARK, PF19MD_001),
-        PINMUX_DATA(SSIWS3_MARK, PF19MD_010),
-        PINMUX_DATA(IRQ7_PF_MARK, PF19MD_100),
-        PINMUX_DATA(MMC_D0_MARK, PF19MD_101),
-
-        PINMUX_DATA(PF18_DATA, PF18MD_000),
-        PINMUX_DATA(SD_D1_MARK, PF18MD_001),
-        PINMUX_DATA(SSISCK3_MARK, PF18MD_010),
-        PINMUX_DATA(IRQ6_PF_MARK, PF18MD_100),
-        PINMUX_DATA(MMC_D1_MARK, PF18MD_101),
-
-        PINMUX_DATA(PF17_DATA, PF17MD_000),
-        PINMUX_DATA(SD_WP_MARK, PF17MD_001),
-        PINMUX_DATA(FRB_MARK, PF17MD_011),
-        PINMUX_DATA(IRQ5_PF_MARK, PF17MD_100),
-
-        PINMUX_DATA(PF16_DATA, PF16MD_000),
-        PINMUX_DATA(SD_CD_MARK, PF16MD_001),
-        PINMUX_DATA(FCE_MARK, PF16MD_011),
-        PINMUX_DATA(IRQ4_PF_MARK, PF16MD_100),
-        PINMUX_DATA(MMC_CD_MARK, PF16MD_101),
-
-        PINMUX_DATA(PF15_DATA, PF15MD_000),
-        PINMUX_DATA(A0_MARK, PF15MD_001),
-        PINMUX_DATA(SSIDATA2_MARK, PF15MD_010),
-        PINMUX_DATA(WDTOVF_MARK, PF15MD_011),
-        PINMUX_DATA(TXD2_MARK, PF15MD_100),
-
-        PINMUX_DATA(PF14_DATA, PF14MD_000),
-        PINMUX_DATA(A25_MARK, PF14MD_001),
-        PINMUX_DATA(SSIWS2_MARK, PF14MD_010),
-        PINMUX_DATA(RXD2_MARK, PF14MD_100),
-
-        PINMUX_DATA(PF13_DATA, PF13MD_000),
-        PINMUX_DATA(A24_MARK, PF13MD_001),
-        PINMUX_DATA(SSISCK2_MARK, PF13MD_010),
-        PINMUX_DATA(SCK2_MARK, PF13MD_100),
-
-        PINMUX_DATA(PF12_DATA, PF12MD_000),
-        PINMUX_DATA(SSIDATA1_MARK, PF12MD_010),
-        PINMUX_DATA(DV_DATA12_MARK, PF12MD_011),
-        PINMUX_DATA(TXD1_MARK, PF12MD_100),
-        PINMUX_DATA(MMC_D7_MARK, PF12MD_101),
-
-        PINMUX_DATA(PF11_DATA, PF11MD_000),
-        PINMUX_DATA(SSIWS1_MARK, PF11MD_010),
-        PINMUX_DATA(DV_DATA2_MARK, PF11MD_011),
-        PINMUX_DATA(RXD1_MARK, PF11MD_100),
-        PINMUX_DATA(MMC_D6_MARK, PF11MD_101),
-
-        PINMUX_DATA(PF10_DATA, PF10MD_000),
-        PINMUX_DATA(CS1_MARK, PF10MD_001),
-        PINMUX_DATA(SSISCK1_MARK, PF10MD_010),
-        PINMUX_DATA(DV_DATA1_MARK, PF10MD_011),
-        PINMUX_DATA(SCK1_MARK, PF10MD_100),
-        PINMUX_DATA(MMC_D5_MARK, PF10MD_101),
-
-        PINMUX_DATA(PF9_DATA, PF9MD_000),
-        PINMUX_DATA(BS_MARK, PF9MD_001),
-        PINMUX_DATA(DV_DATA0_MARK, PF9MD_011),
-        PINMUX_DATA(SCK0_MARK, PF9MD_100),
-        PINMUX_DATA(MMC_D4_MARK, PF9MD_101),
-        PINMUX_DATA(RTS1_MARK, PF9MD_110),
-
-        PINMUX_DATA(PF8_DATA, PF8MD_000),
-        PINMUX_DATA(A23_MARK, PF8MD_001),
-        PINMUX_DATA(TXD0_MARK, PF8MD_100),
-
-        PINMUX_DATA(PF7_DATA, PF7MD_000),
-        PINMUX_DATA(SSIRXD0_MARK, PF7MD_010),
-        PINMUX_DATA(RXD0_MARK, PF7MD_100),
-        PINMUX_DATA(CTS1_MARK, PF7MD_110),
-
-        PINMUX_DATA(PF6_DATA, PF6MD_000),
-        PINMUX_DATA(CE2A_MARK, PF6MD_001),
-        PINMUX_DATA(SSITXD0_MARK, PF6MD_010),
-
-        PINMUX_DATA(PF5_DATA, PF5MD_000),
-        PINMUX_DATA(SSIWS0_MARK, PF5MD_010),
-
-        PINMUX_DATA(PF4_DATA, PF4MD_000),
-        PINMUX_DATA(CS5CE1A_MARK, PF4MD_001),
-        PINMUX_DATA(SSISCK0_MARK, PF4MD_010),
-
-        PINMUX_DATA(PF3_DATA, PF3MD_000),
-        PINMUX_DATA(CS2_MARK, PF3MD_001),
-        PINMUX_DATA(MISO1_MARK, PF3MD_011),
-        PINMUX_DATA(TIOC4D_MARK, PF3MD_100),
-
-        PINMUX_DATA(PF2_DATA, PF2MD_000),
-        PINMUX_DATA(WAIT_MARK, PF2MD_001),
-        PINMUX_DATA(MOSI1_MARK, PF2MD_011),
-        PINMUX_DATA(TIOC4C_MARK, PF2MD_100),
-        PINMUX_DATA(TEND0_MARK, PF2MD_101),
-
-        PINMUX_DATA(PF1_DATA, PF1MD_000),
-        PINMUX_DATA(BACK_MARK, PF1MD_001),
-        PINMUX_DATA(SSL10_MARK, PF1MD_011),
-        PINMUX_DATA(TIOC4B_MARK, PF1MD_100),
-        PINMUX_DATA(DACK0_MARK, PF1MD_101),
-
-        PINMUX_DATA(PF0_DATA, PF0MD_000),
-        PINMUX_DATA(BREQ_MARK, PF0MD_001),
-        PINMUX_DATA(RSPCK1_MARK, PF0MD_011),
-        PINMUX_DATA(TIOC4A_MARK, PF0MD_100),
-        PINMUX_DATA(DREQ0_MARK, PF0MD_101),
-
-        /* Port G */
-        PINMUX_DATA(PG27_DATA, PG27MD_00),
-        PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10),
-        PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11),
-        PINMUX_DATA(LCD_DE_MARK, PG27MD_11),
-
-        PINMUX_DATA(PG26_DATA, PG26MD_00),
-        PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10),
-        PINMUX_DATA(LCD_HSYNC_MARK, PG26MD_10),
-
-        PINMUX_DATA(PG25_DATA, PG25MD_00),
-        PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10),
-        PINMUX_DATA(LCD_VSYNC_MARK, PG25MD_10),
-
-        PINMUX_DATA(PG24_DATA, PG24MD_00),
-        PINMUX_DATA(LCD_CLK_MARK, PG24MD_10),
-
-        PINMUX_DATA(PG23_DATA, PG23MD_000),
-        PINMUX_DATA(LCD_DATA23_PG23_MARK, PG23MD_010),
-        PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011),
-        PINMUX_DATA(TXD5_MARK, PG23MD_100),
-
-        PINMUX_DATA(PG22_DATA, PG22MD_000),
-        PINMUX_DATA(LCD_DATA22_PG22_MARK, PG22MD_010),
-        PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011),
-        PINMUX_DATA(RXD5_MARK, PG22MD_100),
-
-        PINMUX_DATA(PG21_DATA, PG21MD_000),
-        PINMUX_DATA(DV_DATA7_MARK, PG21MD_001),
-        PINMUX_DATA(LCD_DATA21_PG21_MARK, PG21MD_010),
-        PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011),
-        PINMUX_DATA(TXD4_MARK, PG21MD_100),
-
-        PINMUX_DATA(PG20_DATA, PG20MD_000),
-        PINMUX_DATA(DV_DATA6_MARK, PG20MD_001),
-        PINMUX_DATA(LCD_DATA20_PG20_MARK, PG21MD_010),
-        PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011),
-        PINMUX_DATA(RXD4_MARK, PG20MD_100),
-
-        PINMUX_DATA(PG19_DATA, PG19MD_000),
-        PINMUX_DATA(DV_DATA5_MARK, PG19MD_001),
-        PINMUX_DATA(LCD_DATA19_PG19_MARK, PG19MD_010),
-        PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011),
-        PINMUX_DATA(SCK5_MARK, PG19MD_100),
-
-        PINMUX_DATA(PG18_DATA, PG18MD_000),
-        PINMUX_DATA(DV_DATA4_MARK, PG18MD_001),
-        PINMUX_DATA(LCD_DATA18_PG18_MARK, PG18MD_010),
-        PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011),
-        PINMUX_DATA(SCK4_MARK, PG18MD_100),
-
-// TODO hardware manual has PG17 3 bits wide in reg picture and 2 bits in description
-// we're going with 2 bits
-        PINMUX_DATA(PG17_DATA, PG17MD_00),
-        PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01),
-        PINMUX_DATA(LCD_DATA17_PG17_MARK, PG17MD_10),
-
-// TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description
-// we're going with 2 bits
-        PINMUX_DATA(PG16_DATA, PG16MD_00),
-        PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01),
-        PINMUX_DATA(LCD_DATA16_PG16_MARK, PG16MD_10),
-
-        PINMUX_DATA(PG15_DATA, PG15MD_00),
-        PINMUX_DATA(D31_MARK, PG15MD_01),
-        PINMUX_DATA(LCD_DATA15_PG15_MARK, PG15MD_10),
-        PINMUX_DATA(PINT7_PG_MARK, PG15MD_11),
-
-        PINMUX_DATA(PG14_DATA, PG14MD_00),
-        PINMUX_DATA(D30_MARK, PG14MD_01),
-        PINMUX_DATA(LCD_DATA14_PG14_MARK, PG14MD_10),
-        PINMUX_DATA(PINT6_PG_MARK, PG14MD_11),
-
-        PINMUX_DATA(PG13_DATA, PG13MD_00),
-        PINMUX_DATA(D29_MARK, PG13MD_01),
-        PINMUX_DATA(LCD_DATA13_PG13_MARK, PG13MD_10),
-        PINMUX_DATA(PINT5_PG_MARK, PG13MD_11),
-
-        PINMUX_DATA(PG12_DATA, PG12MD_00),
-        PINMUX_DATA(D28_MARK, PG12MD_01),
-        PINMUX_DATA(LCD_DATA12_PG12_MARK, PG12MD_10),
-        PINMUX_DATA(PINT4_PG_MARK, PG12MD_11),
-
-        PINMUX_DATA(PG11_DATA, PG11MD_000),
-        PINMUX_DATA(D27_MARK, PG11MD_001),
-        PINMUX_DATA(LCD_DATA11_PG11_MARK, PG11MD_010),
-        PINMUX_DATA(PINT3_PG_MARK, PG11MD_011),
-        PINMUX_DATA(TIOC3D_MARK, PG11MD_100),
-
-        PINMUX_DATA(PG10_DATA, PG10MD_000),
-        PINMUX_DATA(D26_MARK, PG10MD_001),
-        PINMUX_DATA(LCD_DATA10_PG10_MARK, PG10MD_010),
-        PINMUX_DATA(PINT2_PG_MARK, PG10MD_011),
-        PINMUX_DATA(TIOC3C_MARK, PG10MD_100),
-
-        PINMUX_DATA(PG9_DATA, PG9MD_000),
-        PINMUX_DATA(D25_MARK, PG9MD_001),
-        PINMUX_DATA(LCD_DATA9_PG9_MARK, PG9MD_010),
-        PINMUX_DATA(PINT1_PG_MARK, PG9MD_011),
-        PINMUX_DATA(TIOC3B_MARK, PG9MD_100),
-
-        PINMUX_DATA(PG8_DATA, PG8MD_000),
-        PINMUX_DATA(D24_MARK, PG8MD_001),
-        PINMUX_DATA(LCD_DATA8_PG8_MARK, PG8MD_010),
-        PINMUX_DATA(PINT0_PG_MARK, PG8MD_011),
-        PINMUX_DATA(TIOC3A_MARK, PG8MD_100),
-
-        PINMUX_DATA(PG7_DATA, PG7MD_000),
-        PINMUX_DATA(D23_MARK, PG7MD_001),
-        PINMUX_DATA(LCD_DATA7_PG7_MARK, PG7MD_010),
-        PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011),
-        PINMUX_DATA(TIOC2B_MARK, PG7MD_100),
-
-        PINMUX_DATA(PG6_DATA, PG6MD_000),
-        PINMUX_DATA(D22_MARK, PG6MD_001),
-        PINMUX_DATA(LCD_DATA6_PG6_MARK, PG6MD_010),
-        PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011),
-        PINMUX_DATA(TIOC2A_MARK, PG6MD_100),
-
-        PINMUX_DATA(PG5_DATA, PG5MD_000),
-        PINMUX_DATA(D21_MARK, PG5MD_001),
-        PINMUX_DATA(LCD_DATA5_PG5_MARK, PG5MD_010),
-        PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011),
-        PINMUX_DATA(TIOC1B_MARK, PG5MD_100),
-
-        PINMUX_DATA(PG4_DATA, PG4MD_000),
-        PINMUX_DATA(D20_MARK, PG4MD_001),
-        PINMUX_DATA(LCD_DATA4_PG4_MARK, PG4MD_010),
-        PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011),
-        PINMUX_DATA(TIOC1A_MARK, PG4MD_100),
-
-        PINMUX_DATA(PG3_DATA, PG3MD_000),
-        PINMUX_DATA(D19_MARK, PG3MD_001),
-        PINMUX_DATA(LCD_DATA3_PG3_MARK, PG3MD_010),
-        PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011),
-        PINMUX_DATA(TIOC0D_MARK, PG3MD_100),
-
-        PINMUX_DATA(PG2_DATA, PG2MD_000),
-        PINMUX_DATA(D18_MARK, PG2MD_001),
-        PINMUX_DATA(LCD_DATA2_PG2_MARK, PG2MD_010),
-        PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011),
-        PINMUX_DATA(TIOC0C_MARK, PG2MD_100),
-
-        PINMUX_DATA(PG1_DATA, PG1MD_000),
-        PINMUX_DATA(D17_MARK, PG1MD_001),
-        PINMUX_DATA(LCD_DATA1_PG1_MARK, PG1MD_010),
-        PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011),
-        PINMUX_DATA(TIOC0B_MARK, PG1MD_100),
-
-        PINMUX_DATA(PG0_DATA, PG0MD_000),
-        PINMUX_DATA(D16_MARK, PG0MD_001),
-        PINMUX_DATA(LCD_DATA0_PG0_MARK, PG0MD_010),
-        PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011),
-        PINMUX_DATA(TIOC0A_MARK, PG0MD_100),
-
-        /* Port H */
-        PINMUX_DATA(PH7_DATA, PH7MD_00),
-        PINMUX_DATA(PHAN7_MARK, PH7MD_01),
-        PINMUX_DATA(PINT7_PH_MARK, PH7MD_10),
-
-        PINMUX_DATA(PH6_DATA, PH6MD_00),
-        PINMUX_DATA(PHAN6_MARK, PH6MD_01),
-        PINMUX_DATA(PINT6_PH_MARK, PH6MD_10),
-
-        PINMUX_DATA(PH5_DATA, PH5MD_00),
-        PINMUX_DATA(PHAN5_MARK, PH5MD_01),
-        PINMUX_DATA(PINT5_PH_MARK, PH5MD_10),
-        PINMUX_DATA(LCD_EXTCLK_MARK, PH5MD_11),
-
-        PINMUX_DATA(PH4_DATA, PH4MD_00),
-        PINMUX_DATA(PHAN4_MARK, PH4MD_01),
-        PINMUX_DATA(PINT4_PH_MARK, PH4MD_10),
-
-        PINMUX_DATA(PH3_DATA, PH3MD_00),
-        PINMUX_DATA(PHAN3_MARK, PH3MD_01),
-        PINMUX_DATA(PINT3_PH_MARK, PH3MD_10),
-
-        PINMUX_DATA(PH2_DATA, PH2MD_00),
-        PINMUX_DATA(PHAN2_MARK, PH2MD_01),
-        PINMUX_DATA(PINT2_PH_MARK, PH2MD_10),
-
-        PINMUX_DATA(PH1_DATA, PH1MD_00),
-        PINMUX_DATA(PHAN1_MARK, PH1MD_01),
-        PINMUX_DATA(PINT1_PH_MARK, PH1MD_10),
-
-        PINMUX_DATA(PH0_DATA, PH0MD_00),
-        PINMUX_DATA(PHAN0_MARK, PH0MD_01),
-        PINMUX_DATA(PINT0_PH_MARK, PH0MD_10),
-
-        /* Port I - not on device */
-
-        /* Port J */
-        PINMUX_DATA(PJ31_DATA, PJ31MD_0),
-        PINMUX_DATA(DV_CLK_MARK, PJ31MD_1),
-
-        PINMUX_DATA(PJ30_DATA, PJ30MD_000),
-        PINMUX_DATA(SSIDATA5_MARK, PJ30MD_010),
-        PINMUX_DATA(TIOC2B_MARK, PJ30MD_100),
-        PINMUX_DATA(IETXD_MARK, PJ30MD_101),
-
-        PINMUX_DATA(PJ29_DATA, PJ29MD_000),
-        PINMUX_DATA(SSIWS5_MARK, PJ29MD_010),
-        PINMUX_DATA(TIOC2A_MARK, PJ29MD_100),
-        PINMUX_DATA(IERXD_MARK, PJ29MD_101),
-
-        PINMUX_DATA(PJ28_DATA, PJ28MD_000),
-        PINMUX_DATA(SSISCK5_MARK, PJ28MD_010),
-        PINMUX_DATA(TIOC1B_MARK, PJ28MD_100),
-        PINMUX_DATA(RTS7_MARK, PJ28MD_101),
-
-        PINMUX_DATA(PJ27_DATA, PJ27MD_000),
-        PINMUX_DATA(TIOC1A_MARK, PJ27MD_100),
-        PINMUX_DATA(CTS7_MARK, PJ27MD_101),
-
-        PINMUX_DATA(PJ26_DATA, PJ26MD_000),
-        PINMUX_DATA(SSIDATA4_MARK, PJ26MD_010),
-        PINMUX_DATA(LCD_TCON5_MARK, PJ26MD_011),
-        PINMUX_DATA(TXD7_MARK, PJ26MD_101),
-
-        PINMUX_DATA(PJ25_DATA, PJ25MD_000),
-        PINMUX_DATA(SSIWS4_MARK, PJ25MD_010),
-        PINMUX_DATA(LCD_TCON4_MARK, PJ25MD_011),
-        PINMUX_DATA(SPDIF_OUT_MARK, PJ25MD_100),
-        PINMUX_DATA(RXD7_MARK, PJ25MD_101),
-
-        PINMUX_DATA(PJ24_DATA, PJ24MD_000),
-        PINMUX_DATA(SSISCK4_MARK, PJ24MD_010),
-        PINMUX_DATA(LCD_TCON3_MARK, PJ24MD_011),
-        PINMUX_DATA(SPDIF_IN_MARK, PJ24MD_100),
-        PINMUX_DATA(SCK7_MARK, PJ24MD_101),
-
-        PINMUX_DATA(PJ23_DATA, PJ23MD_000),
-        PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001),
-        PINMUX_DATA(LCD_DATA23_PJ23_MARK, PJ23MD_010),
-        PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011),
-        PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100),
-        PINMUX_DATA(CTX1_MARK, PJ23MD_101),
-
-        PINMUX_DATA(PJ22_DATA, PJ22MD_000),
-        PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001),
-        PINMUX_DATA(LCD_DATA22_PJ22_MARK, PJ22MD_010),
-        PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011),
-        PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100),
-        PINMUX_DATA(CRX1_MARK, PJ22MD_101),
-        PINMUX_DATA(CRX0CRX1_MARK, PJ22MD_110),
-
-        PINMUX_DATA(PJ21_DATA, PJ21MD_000),
-        PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001),
-        PINMUX_DATA(LCD_DATA21_PJ21_MARK, PJ21MD_010),
-        PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011),
-        PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100),
-        PINMUX_DATA(CTX2_MARK, PJ21MD_101),
-
-        PINMUX_DATA(PJ20_DATA, PJ20MD_000),
-        PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001),
-        PINMUX_DATA(LCD_DATA20_PJ20_MARK, PJ20MD_010),
-        PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011),
-        PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100),
-        PINMUX_DATA(CRX2_MARK, PJ20MD_101),
-        PINMUX_DATA(CRX0CRX1CRX2_PJ20_MARK, PJ20MD_110),
-
-        PINMUX_DATA(PJ19_DATA, PJ19MD_000),
-        PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001),
-        PINMUX_DATA(LCD_DATA19_PJ19_MARK, PJ19MD_010),
-        PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011),
-        PINMUX_DATA(TIOC0D_MARK, PJ19MD_100),
-        PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101),
-        PINMUX_DATA(AUDIO_XOUT_MARK, PJ19MD_110),
-
-        PINMUX_DATA(PJ18_DATA, PJ18MD_000),
-        PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001),
-        PINMUX_DATA(LCD_DATA18_PJ18_MARK, PJ18MD_010),
-        PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011),
-        PINMUX_DATA(TIOC0C_MARK, PJ18MD_100),
-        PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101),
-
-        PINMUX_DATA(PJ17_DATA, PJ17MD_000),
-        PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001),
-        PINMUX_DATA(LCD_DATA17_PJ17_MARK, PJ17MD_010),
-        PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011),
-        PINMUX_DATA(TIOC0B_MARK, PJ17MD_100),
-        PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101),
-
-        PINMUX_DATA(PJ16_DATA, PJ16MD_000),
-        PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001),
-        PINMUX_DATA(LCD_DATA16_PJ16_MARK, PJ16MD_010),
-        PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011),
-        PINMUX_DATA(TIOC0A_MARK, PJ16MD_100),
-        PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101),
-
-        PINMUX_DATA(PJ15_DATA, PJ15MD_000),
-        PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001),
-        PINMUX_DATA(LCD_DATA15_PJ15_MARK, PJ15MD_010),
-        PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011),
-        PINMUX_DATA(PWM2H_MARK, PJ15MD_100),
-        PINMUX_DATA(TXD7_MARK, PJ15MD_101),
-
-        PINMUX_DATA(PJ14_DATA, PJ14MD_000),
-        PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001),
-        PINMUX_DATA(LCD_DATA14_PJ14_MARK, PJ14MD_010),
-        PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011),
-        PINMUX_DATA(PWM2G_MARK, PJ14MD_100),
-        PINMUX_DATA(TXD6_MARK, PJ14MD_101),
-
-        PINMUX_DATA(PJ13_DATA, PJ13MD_000),
-        PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001),
-        PINMUX_DATA(LCD_DATA13_PJ13_MARK, PJ13MD_010),
-        PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011),
-        PINMUX_DATA(PWM2F_MARK, PJ13MD_100),
-        PINMUX_DATA(TXD5_MARK, PJ13MD_101),
-
-        PINMUX_DATA(PJ12_DATA, PJ12MD_000),
-        PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001),
-        PINMUX_DATA(LCD_DATA12_PJ12_MARK, PJ12MD_010),
-        PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011),
-        PINMUX_DATA(PWM2E_MARK, PJ12MD_100),
-        PINMUX_DATA(SCK7_MARK, PJ12MD_101),
-
-        PINMUX_DATA(PJ11_DATA, PJ11MD_000),
-        PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001),
-        PINMUX_DATA(LCD_DATA11_PJ11_MARK, PJ11MD_010),
-        PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011),
-        PINMUX_DATA(PWM2D_MARK, PJ11MD_100),
-        PINMUX_DATA(SCK6_MARK, PJ11MD_101),
-
-        PINMUX_DATA(PJ10_DATA, PJ10MD_000),
-        PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001),
-        PINMUX_DATA(LCD_DATA10_PJ10_MARK, PJ10MD_010),
-        PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011),
-        PINMUX_DATA(PWM2C_MARK, PJ10MD_100),
-        PINMUX_DATA(SCK5_MARK, PJ10MD_101),
-
-        PINMUX_DATA(PJ9_DATA, PJ9MD_000),
-        PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001),
-        PINMUX_DATA(LCD_DATA9_PJ9_MARK, PJ9MD_010),
-        PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011),
-        PINMUX_DATA(PWM2B_MARK, PJ9MD_100),
-        PINMUX_DATA(RTS5_MARK, PJ9MD_101),
-
-        PINMUX_DATA(PJ8_DATA, PJ8MD_000),
-        PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001),
-        PINMUX_DATA(LCD_DATA8_PJ8_MARK, PJ8MD_010),
-        PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011),
-        PINMUX_DATA(PWM2A_MARK, PJ8MD_100),
-        PINMUX_DATA(CTS5_MARK, PJ8MD_101),
-
-        PINMUX_DATA(PJ7_DATA, PJ7MD_000),
-        PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001),
-        PINMUX_DATA(LCD_DATA7_PJ7_MARK, PJ7MD_010),
-        PINMUX_DATA(SD_D2_MARK, PJ7MD_011),
-        PINMUX_DATA(PWM1H_MARK, PJ7MD_100),
-
-        PINMUX_DATA(PJ6_DATA, PJ6MD_000),
-        PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001),
-        PINMUX_DATA(LCD_DATA6_PJ6_MARK, PJ6MD_010),
-        PINMUX_DATA(SD_D3_MARK, PJ6MD_011),
-        PINMUX_DATA(PWM1G_MARK, PJ6MD_100),
-
-        PINMUX_DATA(PJ5_DATA, PJ5MD_000),
-        PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001),
-        PINMUX_DATA(LCD_DATA5_PJ5_MARK, PJ5MD_010),
-        PINMUX_DATA(SD_CMD_MARK, PJ5MD_011),
-        PINMUX_DATA(PWM1F_MARK, PJ5MD_100),
-
-        PINMUX_DATA(PJ4_DATA, PJ4MD_000),
-        PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001),
-        PINMUX_DATA(LCD_DATA4_PJ4_MARK, PJ4MD_010),
-        PINMUX_DATA(SD_CLK_MARK, PJ4MD_011),
-        PINMUX_DATA(PWM1E_MARK, PJ4MD_100),
-
-        PINMUX_DATA(PJ3_DATA, PJ3MD_000),
-        PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001),
-        PINMUX_DATA(LCD_DATA3_PJ3_MARK, PJ3MD_010),
-        PINMUX_DATA(SD_D0_MARK, PJ3MD_011),
-        PINMUX_DATA(PWM1D_MARK, PJ3MD_100),
-
-        PINMUX_DATA(PJ2_DATA, PJ2MD_000),
-        PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001),
-        PINMUX_DATA(LCD_DATA2_PJ2_MARK, PJ2MD_010),
-        PINMUX_DATA(SD_D1_MARK, PJ2MD_011),
-        PINMUX_DATA(PWM1C_MARK, PJ2MD_100),
-
-        PINMUX_DATA(PJ1_DATA, PJ1MD_000),
-        PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001),
-        PINMUX_DATA(LCD_DATA1_PJ1_MARK, PJ1MD_010),
-        PINMUX_DATA(SD_WP_MARK, PJ1MD_011),
-        PINMUX_DATA(PWM1B_MARK, PJ1MD_100),
-
-        PINMUX_DATA(PJ0_DATA, PJ0MD_000),
-        PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001),
-        PINMUX_DATA(LCD_DATA0_PJ0_MARK, PJ0MD_010),
-        PINMUX_DATA(SD_CD_MARK, PJ0MD_011),
-        PINMUX_DATA(PWM1A_MARK, PJ0MD_100),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
-        /* Port A */
-        PINMUX_GPIO(GPIO_PA1, PA1_DATA),
-        PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-
-        /* Port B */
-        PINMUX_GPIO(GPIO_PB22, PB22_DATA),
-        PINMUX_GPIO(GPIO_PB21, PB21_DATA),
-        PINMUX_GPIO(GPIO_PB20, PB20_DATA),
-        PINMUX_GPIO(GPIO_PB19, PB19_DATA),
-        PINMUX_GPIO(GPIO_PB18, PB18_DATA),
-        PINMUX_GPIO(GPIO_PB17, PB17_DATA),
-        PINMUX_GPIO(GPIO_PB16, PB16_DATA),
-        PINMUX_GPIO(GPIO_PB15, PB15_DATA),
-        PINMUX_GPIO(GPIO_PB14, PB14_DATA),
-        PINMUX_GPIO(GPIO_PB13, PB13_DATA),
-        PINMUX_GPIO(GPIO_PB12, PB12_DATA),
-        PINMUX_GPIO(GPIO_PB11, PB11_DATA),
-        PINMUX_GPIO(GPIO_PB10, PB10_DATA),
-        PINMUX_GPIO(GPIO_PB9, PB9_DATA),
-        PINMUX_GPIO(GPIO_PB8, PB8_DATA),
-        PINMUX_GPIO(GPIO_PB7, PB7_DATA),
-        PINMUX_GPIO(GPIO_PB6, PB6_DATA),
-        PINMUX_GPIO(GPIO_PB5, PB5_DATA),
-        PINMUX_GPIO(GPIO_PB4, PB4_DATA),
-        PINMUX_GPIO(GPIO_PB3, PB3_DATA),
-        PINMUX_GPIO(GPIO_PB2, PB2_DATA),
-        PINMUX_GPIO(GPIO_PB1, PB1_DATA),
-
-        /* Port C */
-        PINMUX_GPIO(GPIO_PC8, PC8_DATA),
-        PINMUX_GPIO(GPIO_PC7, PC7_DATA),
-        PINMUX_GPIO(GPIO_PC6, PC6_DATA),
-        PINMUX_GPIO(GPIO_PC5, PC5_DATA),
-        PINMUX_GPIO(GPIO_PC4, PC4_DATA),
-        PINMUX_GPIO(GPIO_PC3, PC3_DATA),
-        PINMUX_GPIO(GPIO_PC2, PC2_DATA),
-        PINMUX_GPIO(GPIO_PC1, PC1_DATA),
-        PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-
-        /* Port D */
-        PINMUX_GPIO(GPIO_PD15, PD15_DATA),
-        PINMUX_GPIO(GPIO_PD14, PD14_DATA),
-        PINMUX_GPIO(GPIO_PD13, PD13_DATA),
-        PINMUX_GPIO(GPIO_PD12, PD12_DATA),
-        PINMUX_GPIO(GPIO_PD11, PD11_DATA),
-        PINMUX_GPIO(GPIO_PD10, PD10_DATA),
-        PINMUX_GPIO(GPIO_PD9, PD9_DATA),
-        PINMUX_GPIO(GPIO_PD8, PD8_DATA),
-        PINMUX_GPIO(GPIO_PD7, PD7_DATA),
-        PINMUX_GPIO(GPIO_PD6, PD6_DATA),
-        PINMUX_GPIO(GPIO_PD5, PD5_DATA),
-        PINMUX_GPIO(GPIO_PD4, PD4_DATA),
-        PINMUX_GPIO(GPIO_PD3, PD3_DATA),
-        PINMUX_GPIO(GPIO_PD2, PD2_DATA),
-        PINMUX_GPIO(GPIO_PD1, PD1_DATA),
-        PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-
-        /* Port E */
-        PINMUX_GPIO(GPIO_PE7, PE7_DATA),
-        PINMUX_GPIO(GPIO_PE6, PE6_DATA),
-        PINMUX_GPIO(GPIO_PE5, PE5_DATA),
-        PINMUX_GPIO(GPIO_PE4, PE4_DATA),
-        PINMUX_GPIO(GPIO_PE3, PE3_DATA),
-        PINMUX_GPIO(GPIO_PE2, PE2_DATA),
-        PINMUX_GPIO(GPIO_PE1, PE1_DATA),
-        PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-
-        /* Port F */
-        PINMUX_GPIO(GPIO_PF23, PF23_DATA),
-        PINMUX_GPIO(GPIO_PF22, PF22_DATA),
-        PINMUX_GPIO(GPIO_PF21, PF21_DATA),
-        PINMUX_GPIO(GPIO_PF20, PF20_DATA),
-        PINMUX_GPIO(GPIO_PF19, PF19_DATA),
-        PINMUX_GPIO(GPIO_PF18, PF18_DATA),
-        PINMUX_GPIO(GPIO_PF17, PF17_DATA),
-        PINMUX_GPIO(GPIO_PF16, PF16_DATA),
-        PINMUX_GPIO(GPIO_PF15, PF15_DATA),
-        PINMUX_GPIO(GPIO_PF14, PF14_DATA),
-        PINMUX_GPIO(GPIO_PF13, PF13_DATA),
-        PINMUX_GPIO(GPIO_PF12, PF12_DATA),
-        PINMUX_GPIO(GPIO_PF11, PF11_DATA),
-        PINMUX_GPIO(GPIO_PF10, PF10_DATA),
-        PINMUX_GPIO(GPIO_PF9, PF9_DATA),
-        PINMUX_GPIO(GPIO_PF8, PF8_DATA),
-        PINMUX_GPIO(GPIO_PF7, PF7_DATA),
-        PINMUX_GPIO(GPIO_PF6, PF6_DATA),
-        PINMUX_GPIO(GPIO_PF5, PF5_DATA),
-        PINMUX_GPIO(GPIO_PF4, PF4_DATA),
-        PINMUX_GPIO(GPIO_PF3, PF3_DATA),
-        PINMUX_GPIO(GPIO_PF2, PF2_DATA),
-        PINMUX_GPIO(GPIO_PF1, PF1_DATA),
-        PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-
-        /* Port G */
-        PINMUX_GPIO(GPIO_PG27, PG27_DATA),
-        PINMUX_GPIO(GPIO_PG26, PG26_DATA),
-        PINMUX_GPIO(GPIO_PG25, PG25_DATA),
-        PINMUX_GPIO(GPIO_PG24, PG24_DATA),
-        PINMUX_GPIO(GPIO_PG23, PG23_DATA),
-        PINMUX_GPIO(GPIO_PG22, PG22_DATA),
-        PINMUX_GPIO(GPIO_PG21, PG21_DATA),
-        PINMUX_GPIO(GPIO_PG20, PG20_DATA),
-        PINMUX_GPIO(GPIO_PG19, PG19_DATA),
-        PINMUX_GPIO(GPIO_PG18, PG18_DATA),
-        PINMUX_GPIO(GPIO_PG17, PG17_DATA),
-        PINMUX_GPIO(GPIO_PG16, PG16_DATA),
-        PINMUX_GPIO(GPIO_PG15, PG15_DATA),
-        PINMUX_GPIO(GPIO_PG14, PG14_DATA),
-        PINMUX_GPIO(GPIO_PG13, PG13_DATA),
-        PINMUX_GPIO(GPIO_PG12, PG12_DATA),
-        PINMUX_GPIO(GPIO_PG11, PG11_DATA),
-        PINMUX_GPIO(GPIO_PG10, PG10_DATA),
-        PINMUX_GPIO(GPIO_PG9, PG9_DATA),
-        PINMUX_GPIO(GPIO_PG8, PG8_DATA),
-        PINMUX_GPIO(GPIO_PG7, PG7_DATA),
-        PINMUX_GPIO(GPIO_PG6, PG6_DATA),
-        PINMUX_GPIO(GPIO_PG5, PG5_DATA),
-        PINMUX_GPIO(GPIO_PG4, PG4_DATA),
-        PINMUX_GPIO(GPIO_PG3, PG3_DATA),
-        PINMUX_GPIO(GPIO_PG2, PG2_DATA),
-        PINMUX_GPIO(GPIO_PG1, PG1_DATA),
-        PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-
-        /* Port H - Port H does not have a Data Register */
-
-        /* Port I - not on device */
-
-        /* Port J */
-        PINMUX_GPIO(GPIO_PJ31, PJ31_DATA),
-        PINMUX_GPIO(GPIO_PJ30, PJ30_DATA),
-        PINMUX_GPIO(GPIO_PJ29, PJ29_DATA),
-        PINMUX_GPIO(GPIO_PJ28, PJ28_DATA),
-        PINMUX_GPIO(GPIO_PJ27, PJ27_DATA),
-        PINMUX_GPIO(GPIO_PJ26, PJ26_DATA),
-        PINMUX_GPIO(GPIO_PJ25, PJ25_DATA),
-        PINMUX_GPIO(GPIO_PJ24, PJ24_DATA),
-        PINMUX_GPIO(GPIO_PJ23, PJ23_DATA),
-        PINMUX_GPIO(GPIO_PJ22, PJ22_DATA),
-        PINMUX_GPIO(GPIO_PJ21, PJ21_DATA),
-        PINMUX_GPIO(GPIO_PJ20, PJ20_DATA),
-        PINMUX_GPIO(GPIO_PJ19, PJ19_DATA),
-        PINMUX_GPIO(GPIO_PJ18, PJ18_DATA),
-        PINMUX_GPIO(GPIO_PJ17, PJ17_DATA),
-        PINMUX_GPIO(GPIO_PJ16, PJ16_DATA),
-        PINMUX_GPIO(GPIO_PJ15, PJ15_DATA),
-        PINMUX_GPIO(GPIO_PJ14, PJ14_DATA),
-        PINMUX_GPIO(GPIO_PJ13, PJ13_DATA),
-        PINMUX_GPIO(GPIO_PJ12, PJ12_DATA),
-        PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),
-        PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),
-        PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),
-        PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),
-        PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
-        PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
-        PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
-        PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
-        PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
-        PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
-        PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
-        PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
-
-        /* INTC */
-        PINMUX_GPIO(GPIO_FN_IRQ7_PG, IRQ7_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ6_PG, IRQ6_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ5_PG, IRQ5_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ4_PG, IRQ4_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ1_PG, IRQ1_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ0_PG, IRQ0_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ7_PF, IRQ7_PF_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ6_PF, IRQ6_PF_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ5_PF, IRQ5_PF_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ4_PF, IRQ4_PF_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ3_PJ, IRQ3_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ2_PJ, IRQ2_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ1_PC, IRQ1_PC_MARK),
-        PINMUX_GPIO(GPIO_FN_IRQ0_PC, IRQ0_PC_MARK),
-
-        PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT0_PG, PINT0_PG_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT7_PH, PINT7_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT6_PH, PINT6_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT5_PH, PINT5_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT4_PH, PINT4_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT3_PH, PINT3_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT2_PH, PINT2_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT1_PH, PINT1_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT0_PH, PINT0_PH_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT7_PJ, PINT7_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT6_PJ, PINT6_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT5_PJ, PINT5_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT4_PJ, PINT4_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT3_PJ, PINT3_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT2_PJ, PINT2_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT1_PJ, PINT1_PJ_MARK),
-        PINMUX_GPIO(GPIO_FN_PINT0_PJ, PINT0_PJ_MARK),
-
-        /* WDT */
-        PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
-
-        /* CAN */
-        PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
-        PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK),
-        PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0CRX1CRX2_MARK),
-
-        /* DMAC */
-        PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
-        PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
-        PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
-        PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
-        PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
-        PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
-
-        /* ADC */
-        PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
-
-        /* BSCh */
-        PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
-        PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
-        PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
-        PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
-        PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
-        PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
-        PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
-        PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
-        PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
-        PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
-        PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
-        PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
-        PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
-        PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
-        PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
-        PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
-        PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
-        PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
-        PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
-        PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
-        PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
-        PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
-        PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
-        PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
-        PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
-        PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
-        PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
-        PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
-        PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
-        PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
-        PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
-        PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
-        PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
-        PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
-        PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
-        PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
-        PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
-        PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
-        PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
-        PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
-        PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
-        PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
-        PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
-        PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
-        PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
-        PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
-        PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK),
-        PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
-        PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
-        PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
-        PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
-        PINMUX_GPIO(GPIO_FN_WE3ICIOWRAHDQMUU, WE3ICIOWRAHDQMUU_MARK),
-        PINMUX_GPIO(GPIO_FN_WE2ICIORDDQMUL, WE2ICIORDDQMUL_MARK),
-        PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK),
-        PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK),
-        PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
-        PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
-        PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
-        PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
-        PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
-        PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
-        PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
-
-        /* TMU */
-        PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
-        PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK),
-        PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK),
-
-        /* SCIF */
-        PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
-        PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK),
-        PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK5, SCK5_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK),
-        PINMUX_GPIO(GPIO_FN_RTS5, RTS5_MARK),
-        PINMUX_GPIO(GPIO_FN_CTS5, CTS5_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK6, SCK6_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK),
-        PINMUX_GPIO(GPIO_FN_SCK7, SCK7_MARK),
-        PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK),
-        PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK),
-        PINMUX_GPIO(GPIO_FN_RTS7, RTS7_MARK),
-        PINMUX_GPIO(GPIO_FN_CTS7, CTS7_MARK),
-
-        /* RSPI */
-        PINMUX_GPIO(GPIO_FN_RSPCK0_PJ16, RSPCK0_PJ16_MARK),
-        PINMUX_GPIO(GPIO_FN_SSL00_PJ17, SSL00_PJ17_MARK),
-        PINMUX_GPIO(GPIO_FN_MOSI0_PJ18, MOSI0_PJ18_MARK),
-        PINMUX_GPIO(GPIO_FN_MISO0_PJ19, MISO0_PJ19_MARK),
-        PINMUX_GPIO(GPIO_FN_RSPCK0_PB17, RSPCK0_PB17_MARK),
-        PINMUX_GPIO(GPIO_FN_SSL00_PB18, SSL00_PB18_MARK),
-        PINMUX_GPIO(GPIO_FN_MOSI0_PB19, MOSI0_PB19_MARK),
-        PINMUX_GPIO(GPIO_FN_MISO0_PB20, MISO0_PB20_MARK),
-        PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK),
-        PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK),
-        PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK),
-
-        /* IIC3 */
-        PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
-        PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
-        PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
-        PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
-        PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
-        PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
-
-        /* SSI */
-        PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
-        PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
-        PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
-        PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
-        PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
-        PINMUX_GPIO(GPIO_FN_AUDIO_XOUT, AUDIO_XOUT_MARK),
-
-        /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
-        PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK),
-        PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK),
-        PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK),
-
-        /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
-        PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK),
-        PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK),
-
-        /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
-        PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
-        PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
-
-        /* VDC3 */
-        PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
-
-        PINMUX_GPIO(GPIO_FN_DV_DATA23, DV_DATA23_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA22, DV_DATA22_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA21, DV_DATA21_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA20, DV_DATA20_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA19, DV_DATA19_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA18, DV_DATA18_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA17, DV_DATA17_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA16, DV_DATA16_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA15, DV_DATA15_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA14, DV_DATA14_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA13, DV_DATA13_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA12, DV_DATA12_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA11, DV_DATA11_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA10, DV_DATA10_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA9, DV_DATA9_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA8, DV_DATA8_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK),
-        PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_DATA23_PG23, LCD_DATA23_PG23_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA22_PG22, LCD_DATA22_PG22_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA21_PG21, LCD_DATA21_PG21_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA20_PG20, LCD_DATA20_PG20_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA19_PG19, LCD_DATA19_PG19_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA18_PG18, LCD_DATA18_PG18_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA17_PG17, LCD_DATA17_PG17_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA16_PG16, LCD_DATA16_PG16_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA15_PG15, LCD_DATA15_PG15_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA14_PG14, LCD_DATA14_PG14_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA13_PG13, LCD_DATA13_PG13_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA12_PG12, LCD_DATA12_PG12_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA11_PG11, LCD_DATA11_PG11_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA10_PG10, LCD_DATA10_PG10_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA9_PG9, LCD_DATA9_PG9_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA8_PG8, LCD_DATA8_PG8_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA7_PG7, LCD_DATA7_PG7_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA6_PG6, LCD_DATA6_PG6_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA5_PG5, LCD_DATA5_PG5_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA4_PG4, LCD_DATA4_PG4_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA3_PG3, LCD_DATA3_PG3_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA2_PG2, LCD_DATA2_PG2_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA1_PG1, LCD_DATA1_PG1_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA0_PG0, LCD_DATA0_PG0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_DATA23_PJ23, LCD_DATA23_PJ23_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA22_PJ22, LCD_DATA22_PJ22_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA21_PJ21, LCD_DATA21_PJ21_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA20_PJ20, LCD_DATA20_PJ20_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA19_PJ19, LCD_DATA19_PJ19_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA18_PJ18, LCD_DATA18_PJ18_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA17_PJ17, LCD_DATA17_PJ17_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA16_PJ16, LCD_DATA16_PJ16_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA15_PJ15, LCD_DATA15_PJ15_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA14_PJ14, LCD_DATA14_PJ14_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA13_PJ13, LCD_DATA13_PJ13_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA12_PJ12, LCD_DATA12_PJ12_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA11_PJ11, LCD_DATA11_PJ11_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA10_PJ10, LCD_DATA10_PJ10_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA9_PJ9, LCD_DATA9_PJ9_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA8_PJ8, LCD_DATA8_PJ8_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA7_PJ7, LCD_DATA7_PJ7_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA6_PJ6, LCD_DATA6_PJ6_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA5_PJ5, LCD_DATA5_PJ5_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA4_PJ4, LCD_DATA4_PJ4_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA3_PJ3, LCD_DATA3_PJ3_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA2_PJ2, LCD_DATA2_PJ2_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA1_PJ1, LCD_DATA1_PJ1_MARK),
-        PINMUX_GPIO(GPIO_FN_LCD_DATA0_PJ0, LCD_DATA0_PJ0_MARK),
-
-        PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
-        /* "name" addr register_size Field_Width */
-
-        /* where Field_Width is 1 for single mode registers or 4 for upto 16
-           mode registers and modes are described in assending order [0..16] */
-
-        { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, PA1_IN, PA1_OUT,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, PA0_IN, PA0_OUT }
-        },
-        { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011,
-                PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011,
-                PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {
-                PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011,
-                PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011,
-                PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011,
-                PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011,
-                PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {
-                PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011,
-                PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011,
-                PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011,
-                PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {
-                PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {
-                PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {
-                PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0,
-                PB22_IN, PB22_OUT,
-                PB21_IN, PB21_OUT,
-                PB20_IN, PB20_OUT,
-                PB19_IN, PB19_OUT,
-                PB18_IN, PB18_OUT,
-                PB17_IN, PB17_OUT,
-                PB16_IN, PB16_OUT }
-        },
-        { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {
-                PB15_IN, PB15_OUT,
-                PB14_IN, PB14_OUT,
-                PB13_IN, PB13_OUT,
-                PB12_IN, PB12_OUT,
-                PB11_IN, PB11_OUT,
-                PB10_IN, PB10_OUT,
-                PB9_IN, PB9_OUT,
-                PB8_IN, PB8_OUT,
-                PB7_IN, PB7_OUT,
-                PB6_IN, PB6_OUT,
-                PB5_IN, PB5_OUT,
-                PB4_IN, PB4_OUT,
-                PB3_IN, PB3_OUT,
-                PB2_IN, PB2_OUT,
-                PB1_IN, PB1_OUT,
-                0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011,
-                PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {
-                PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011,
-                PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011,
-                PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011,
-                PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {
-                PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-                PC8_IN, PC8_OUT,
-                PC7_IN, PC7_OUT,
-                PC6_IN, PC6_OUT,
-                PC5_IN, PC5_OUT,
-                PC4_IN, PC4_OUT,
-                PC3_IN, PC3_OUT,
-                PC2_IN, PC2_OUT,
-                PC1_IN, PC1_OUT,
-                PC0_IN, PC0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {
-                PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {
-                PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {
-                PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {
-                PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {
-                PD15_IN, PD15_OUT,
-                PD14_IN, PD14_OUT,
-                PD13_IN, PD13_OUT,
-                PD12_IN, PD12_OUT,
-                PD11_IN, PD11_OUT,
-                PD10_IN, PD10_OUT,
-                PD9_IN, PD9_OUT,
-                PD8_IN, PD8_OUT,
-                PD7_IN, PD7_OUT,
-                PD6_IN, PD6_OUT,
-                PD5_IN, PD5_OUT,
-                PD4_IN, PD4_OUT,
-                PD3_IN, PD3_OUT,
-                PD2_IN, PD2_OUT,
-                PD1_IN, PD1_OUT,
-                PD0_IN, PD0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {
-                PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {
-                PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011,
-                PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011,
-                PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
-                PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE7_IN, PE7_OUT,
-                PE6_IN, PE6_OUT,
-                PE5_IN, PE5_OUT,
-                PE4_IN, PE4_OUT,
-                PE3_IN, PE3_OUT,
-                PE2_IN, PE2_OUT,
-                PE1_IN, PE1_OUT,
-                PE0_IN, PE0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PFCR6", 0xfffe38a2, 16, 4) {
-                PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011,
-                PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011,
-                PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011,
-                PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011,
-                PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PFCR5", 0xfffe38a4, 16, 4) {
-                PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011,
-                PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011,
-                PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011,
-                PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011,
-                PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PFCR4", 0xfffe38a6, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011,
-                PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011,
-                PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011,
-                PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,
-                PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {
-                PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
-                PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
-                PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
-                PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011,
-                PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {
-                PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
-                PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
-                PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
-                PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
-                PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {
-                PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
-                PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
-                PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
-                PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
-                PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PFIOR1", 0xfffe38b0, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF23_IN, PF23_OUT,
-                PF22_IN, PF22_OUT,
-                PF21_IN, PF21_OUT,
-                PF20_IN, PF20_OUT,
-                PF19_IN, PF19_OUT,
-                PF18_IN, PF18_OUT,
-                PF17_IN, PF17_OUT,
-                PF16_IN, PF16_OUT }
-        },
-        { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
-                PF15_IN, PF15_OUT,
-                PF14_IN, PF14_OUT,
-                PF13_IN, PF13_OUT,
-                PF12_IN, PF12_OUT,
-                PF11_IN, PF11_OUT,
-                PF10_IN, PF10_OUT,
-                PF9_IN, PF9_OUT,
-                PF8_IN, PF8_OUT,
-                PF7_IN, PF7_OUT,
-                PF6_IN, PF6_OUT,
-                PF5_IN, PF5_OUT,
-                PF4_IN, PF4_OUT,
-                PF3_IN, PF3_OUT,
-                PF2_IN, PF2_OUT,
-                PF1_IN, PF1_OUT,
-                PF0_IN, PF0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {
-                PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {
-                PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011,
-                PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011,
-                PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011,
-                PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
-                PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {
-                PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
-                PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
-                PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {
-                PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {
-                PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
-                PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
-                PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
-                PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
-                PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {
-                PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011,
-                PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011,
-                PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011,
-                PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011,
-                PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {
-                PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011,
-                PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011,
-                PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011,
-                PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
-                PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PG27_IN, PG27_OUT,
-                PG26_IN, PG26_OUT,
-                PG25_IN, PG25_OUT,
-                PG24_IN, PG24_OUT,
-                PG23_IN, PG23_OUT,
-                PG22_IN, PG22_OUT,
-                PG21_IN, PG21_OUT,
-                PG20_IN, PG20_OUT,
-                PG19_IN, PG19_OUT,
-                PG18_IN, PG18_OUT,
-                PG17_IN, PG17_OUT,
-                PG16_IN, PG16_OUT }
-        },
-        { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {
-                PG15_IN, PG15_OUT,
-                PG14_IN, PG14_OUT,
-                PG13_IN, PG13_OUT,
-                PG12_IN, PG12_OUT,
-                PG11_IN, PG11_OUT,
-                PG10_IN, PG10_OUT,
-                PG9_IN, PG9_OUT,
-                PG8_IN, PG8_OUT,
-                PG7_IN, PG7_OUT,
-                PG6_IN, PG6_OUT,
-                PG5_IN, PG5_OUT,
-                PG4_IN, PG4_OUT,
-                PG3_IN, PG3_OUT,
-                PG2_IN, PG2_OUT,
-                PG1_IN, PG1_OUT,
-                PG0_IN, PG0_OUT }
-        },
-
-        { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {
-                PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {
-                PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PJCR7", 0xfffe3900, 16, 4) {
-                PJ31MD_0, PJ31MD_1, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011,
-                PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011,
-                PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011,
-                PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR6", 0xfffe3902, 16, 4) {
-                PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011,
-                PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011,
-                PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011,
-                PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011,
-                PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR5", 0xfffe3904, 16, 4) {
-                PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011,
-                PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011,
-                PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011,
-                PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011,
-                PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR4", 0xfffe3906, 16, 4) {
-                PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011,
-                PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011,
-                PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011,
-                PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011,
-                PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR3", 0xfffe3908, 16, 4) {
-                PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011,
-                PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011,
-                PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011,
-                PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011,
-                PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {
-                PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011,
-                PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011,
-                PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011,
-                PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011,
-                PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {
-                PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011,
-                PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011,
-                PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011,
-                PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011,
-                PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {
-                PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011,
-                PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
-                PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
-                PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0,
-
-                PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
-                PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,
-                0, 0, 0, 0, 0, 0, 0, 0 }
-        },
-
-        { PINMUX_CFG_REG("PJIOR1", 0xfffe3910, 16, 1) {
-                PJ31_IN, PJ31_OUT,
-                PJ30_IN, PJ30_OUT,
-                PJ29_IN, PJ29_OUT,
-                PJ28_IN, PJ28_OUT,
-                PJ27_IN, PJ27_OUT,
-                PJ26_IN, PJ26_OUT,
-                PJ25_IN, PJ25_OUT,
-                PJ24_IN, PJ24_OUT,
-                PJ23_IN, PJ23_OUT,
-                PJ22_IN, PJ22_OUT,
-                PJ21_IN, PJ21_OUT,
-                PJ20_IN, PJ20_OUT,
-                PJ19_IN, PJ19_OUT,
-                PJ18_IN, PJ18_OUT,
-                PJ17_IN, PJ17_OUT,
-                PJ16_IN, PJ16_OUT }
-        },
-        { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {
-                PJ15_IN, PJ15_OUT,
-                PJ14_IN, PJ14_OUT,
-                PJ13_IN, PJ13_OUT,
-                PJ12_IN, PJ12_OUT,
-                PJ11_IN, PJ11_OUT,
-                PJ10_IN, PJ10_OUT,
-                PJ9_IN, PJ9_OUT,
-                PJ8_IN, PJ8_OUT,
-                PJ7_IN, PJ7_OUT,
-                PJ6_IN, PJ6_OUT,
-                PJ5_IN, PJ5_OUT,
-                PJ4_IN, PJ4_OUT,
-                PJ3_IN, PJ3_OUT,
-                PJ2_IN, PJ2_OUT,
-                PJ1_IN, PJ1_OUT,
-                PJ0_IN, PJ0_OUT }
-        },
-
-        {}
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
-        { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
-                0, 0, 0, 0, 0, 0, 0, PA1_DATA,
-                0, 0, 0, 0, 0, 0, 0, PA0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                0, PB22_DATA, PB21_DATA, PB20_DATA,
-                PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }
-        },
-        { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
-                PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
-                PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
-                PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
-                PB3_DATA, PB2_DATA, PB1_DATA, 0 }
-        },
-
-        { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
-                0, 0, 0, 0,
-                0, 0, 0, PC8_DATA,
-                PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
-                PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
-                PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
-                PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
-                PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
-                PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
-                PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16) {
-                0, 0, 0, 0, 0, 0, 0, 0,
-                PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
-                PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
-        },
-        { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
-                PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
-                PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
-                PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
-                PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
-                0, 0, 0, 0,
-                PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,
-                PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
-                PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }
-        },
-        { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
-                PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
-                PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
-                PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
-                PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
-        },
-
-        { PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16) {
-                PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,
-                PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,
-                PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,
-                PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA }
-        },
-        { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
-                PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,
-                PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
-                PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
-                PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
-        },
-
-        { }
-};
-
-static struct pinmux_info sh7269_pinmux_info = {
-        .name = "sh7269_pfc",
-        .reserved_id = PINMUX_RESERVED,
-        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
-        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
-        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
-        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
-        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
-        .first_gpio = GPIO_PA1,
-        .last_gpio = GPIO_FN_LCD_M_DISP,
-
-        .gpios = pinmux_gpios,
-        .cfg_regs = pinmux_config_regs,
-        .data_regs = pinmux_data_regs,
-
-        .gpio_data = pinmux_data,
-        .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-static int __init plat_pinmux_setup(void)
-{
-        return register_pinmux(&sh7269_pinmux_info);
-}
-arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 5170b6aa412..48e97a2a0c8 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -29,12 +29,6 @@ void __cpuinit cpu_probe(void)
 #elif defined(CONFIG_CPU_SUBTYPE_SH7263)
         boot_cpu_data.type                      = CPU_SH7263;
         boot_cpu_data.flags                     |= CPU_HAS_FPU;
-#elif defined(CONFIG_CPU_SUBTYPE_SH7264)
-        boot_cpu_data.type                      = CPU_SH7264;
-        boot_cpu_data.flags                     |= CPU_HAS_FPU;
-#elif defined(CONFIG_CPU_SUBTYPE_SH7269)
-        boot_cpu_data.type                      = CPU_SH7269;
-        boot_cpu_data.flags                     |= CPU_HAS_FPU;
 #elif defined(CONFIG_CPU_SUBTYPE_SH7206)
         boot_cpu_data.type                      = CPU_SH7206;
         boot_cpu_data.flags                     |= CPU_HAS_DSP;
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index f7f1cf2af30..949bf2bac28 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -204,7 +204,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(220),
+        .irqs           = { 220, 220, 220, 220 },
 };
 
 static struct platform_device scif0_device = {
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 7b84785b896..9df558dcdb8 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -183,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(180),
+        .irqs           = { 180, 180, 180, 180 }
 };
 
 static struct platform_device scif0_device = {
@@ -200,7 +200,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(184),
+        .irqs           = { 184, 184, 184, 184 }
 };
 
 static struct platform_device scif1_device = {
@@ -217,7 +217,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(188),
+        .irqs           = { 188, 188, 188, 188 }
 };
 
 static struct platform_device scif2_device = {
@@ -234,7 +234,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(192),
+        .irqs           = { 192, 192, 192, 192 }
 };
 
 static struct platform_device scif3_device = {
@@ -251,7 +251,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(196),
+        .irqs           = { 196, 196, 196, 196 }
 };
 
 static struct platform_device scif4_device = {
@@ -268,7 +268,7 @@ static struct plat_sci_port scif5_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(200),
+        .irqs           = { 200, 200, 200, 200 }
 };
 
 static struct platform_device scif5_device = {
@@ -285,7 +285,7 @@ static struct plat_sci_port scif6_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(204),
+        .irqs           = { 204, 204, 204, 204 }
 };
 
 static struct platform_device scif6_device = {
@@ -302,7 +302,7 @@ static struct plat_sci_port scif7_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(208),
+        .irqs           = { 208, 208, 208, 208 }
 };
 
 static struct platform_device scif7_device = {
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index bfc33f6a28c..a43124e608c 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -176,12 +176,10 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xfffe8000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE,
+        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(192),
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+        .irqs           =  { 192, 192, 192, 192 },
 };
 
 static struct platform_device scif0_device = {
@@ -195,12 +193,10 @@ static struct platform_device scif0_device = {
 static struct plat_sci_port scif1_platform_data = {
         .mapbase        = 0xfffe8800,
         .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE,
+        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(196),
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+        .irqs           =  { 196, 196, 196, 196 },
 };
 
 static struct platform_device scif1_device = {
@@ -214,12 +210,10 @@ static struct platform_device scif1_device = {
 static struct plat_sci_port scif2_platform_data = {
         .mapbase        = 0xfffe9000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE,
+        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(200),
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+        .irqs           =  { 200, 200, 200, 200 },
 };
 
 static struct platform_device scif2_device = {
@@ -233,12 +227,10 @@ static struct platform_device scif2_device = {
 static struct plat_sci_port scif3_platform_data = {
         .mapbase        = 0xfffe9800,
         .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE,
+        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(204),
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
+        .irqs           =  { 204, 204, 204, 204 },
 };
 
 static struct platform_device scif3_device = {
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index a5010741de8..5d14f849aea 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -139,7 +139,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(240),
+        .irqs           = { 240, 240, 240, 240 },
 };
 
 static struct platform_device scif0_device = {
@@ -156,7 +156,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(244),
+        .irqs           = { 244, 244, 244, 244 },
 };
 
 static struct platform_device scif1_device = {
@@ -173,7 +173,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(248),
+        .irqs           = { 248, 248, 248, 248 },
 };
 
 static struct platform_device scif2_device = {
@@ -190,7 +190,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(252),
+        .irqs           = { 252, 252, 252, 252 },
 };
 
 static struct platform_device scif3_device = {
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
deleted file mode 100644
index ce5c1b5aebf..00000000000
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
+++ /dev/null
@@ -1,606 +0,0 @@
-/*
- * SH7264 Setup
- *
- * Copyright (C) 2012  Renesas Electronics Europe Ltd
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/platform_device.h>
-#include <linux/init.h>
-#include <linux/serial.h>
-#include <linux/serial_sci.h>
-#include <linux/usb/r8a66597.h>
-#include <linux/sh_timer.h>
-#include <linux/io.h>
-
-enum {
-        UNUSED = 0,
-
-        /* interrupt sources */
-        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
-
-        DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
-        DMAC8, DMAC9, DMAC10, DMAC11, DMAC12, DMAC13, DMAC14, DMAC15,
-        USB, VDC3, CMT0, CMT1, BSC, WDT,
-        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
-        MTU3_ABCD, MTU3_TCI3V, MTU4_ABCD, MTU4_TCI4V,
-        PWMT1, PWMT2, ADC_ADI,
-        SSIF0, SSII1, SSII2, SSII3,
-        RSPDIF,
-        IIC30, IIC31, IIC32, IIC33,
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
-        SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,
-        SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,
-        SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,
-        SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,
-        SIO_FIFO, RSPIC0, RSPIC1,
-        RCAN0, RCAN1, IEBC, CD_ROMD,
-        NFMC, SDHI, RTC,
-        SRCC0, SRCC1, DCOMU, OFFI, IFEI,
-
-        /* interrupt groups */
-        PINT, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
-};
-
-static struct intc_vect vectors[] __initdata = {
-        INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
-        INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
-        INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
-        INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
-
-        INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
-        INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
-        INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
-        INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
-
-        INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),
-        INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),
-        INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),
-        INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),
-        INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),
-        INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),
-        INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),
-        INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),
-        INTC_IRQ(DMAC8, 140), INTC_IRQ(DMAC8, 141),
-        INTC_IRQ(DMAC9, 144), INTC_IRQ(DMAC9, 145),
-        INTC_IRQ(DMAC10, 148), INTC_IRQ(DMAC10, 149),
-        INTC_IRQ(DMAC11, 152), INTC_IRQ(DMAC11, 153),
-        INTC_IRQ(DMAC12, 156), INTC_IRQ(DMAC12, 157),
-        INTC_IRQ(DMAC13, 160), INTC_IRQ(DMAC13, 161),
-        INTC_IRQ(DMAC14, 164), INTC_IRQ(DMAC14, 165),
-        INTC_IRQ(DMAC15, 168), INTC_IRQ(DMAC15, 169),
-
-        INTC_IRQ(USB, 170),
-        INTC_IRQ(VDC3, 171), INTC_IRQ(VDC3, 172),
-        INTC_IRQ(VDC3, 173), INTC_IRQ(VDC3, 174),
-        INTC_IRQ(CMT0, 175), INTC_IRQ(CMT1, 176),
-        INTC_IRQ(BSC, 177), INTC_IRQ(WDT, 178),
-
-        INTC_IRQ(MTU0_ABCD, 179), INTC_IRQ(MTU0_ABCD, 180),
-        INTC_IRQ(MTU0_ABCD, 181), INTC_IRQ(MTU0_ABCD, 182),
-        INTC_IRQ(MTU0_VEF, 183),
-        INTC_IRQ(MTU0_VEF, 184), INTC_IRQ(MTU0_VEF, 185),
-        INTC_IRQ(MTU1_AB, 186), INTC_IRQ(MTU1_AB, 187),
-        INTC_IRQ(MTU1_VU, 188), INTC_IRQ(MTU1_VU, 189),
-        INTC_IRQ(MTU2_AB, 190), INTC_IRQ(MTU2_AB, 191),
-        INTC_IRQ(MTU2_VU, 192), INTC_IRQ(MTU2_VU, 193),
-        INTC_IRQ(MTU3_ABCD, 194), INTC_IRQ(MTU3_ABCD, 195),
-        INTC_IRQ(MTU3_ABCD, 196), INTC_IRQ(MTU3_ABCD, 197),
-        INTC_IRQ(MTU3_TCI3V, 198),
-        INTC_IRQ(MTU4_ABCD, 199), INTC_IRQ(MTU4_ABCD, 200),
-        INTC_IRQ(MTU4_ABCD, 201), INTC_IRQ(MTU4_ABCD, 202),
-        INTC_IRQ(MTU4_TCI4V, 203),
-
-        INTC_IRQ(PWMT1, 204), INTC_IRQ(PWMT2, 205),
-
-        INTC_IRQ(ADC_ADI, 206),
-
-        INTC_IRQ(SSIF0, 207), INTC_IRQ(SSIF0, 208),
-        INTC_IRQ(SSIF0, 209),
-        INTC_IRQ(SSII1, 210), INTC_IRQ(SSII1, 211),
-        INTC_IRQ(SSII2, 212), INTC_IRQ(SSII2, 213),
-        INTC_IRQ(SSII3, 214), INTC_IRQ(SSII3, 215),
-
-        INTC_IRQ(RSPDIF, 216),
-
-        INTC_IRQ(IIC30, 217), INTC_IRQ(IIC30, 218),
-        INTC_IRQ(IIC30, 219), INTC_IRQ(IIC30, 220),
-        INTC_IRQ(IIC30, 221),
-        INTC_IRQ(IIC31, 222), INTC_IRQ(IIC31, 223),
-        INTC_IRQ(IIC31, 224), INTC_IRQ(IIC31, 225),
-        INTC_IRQ(IIC31, 226),
-        INTC_IRQ(IIC32, 227), INTC_IRQ(IIC32, 228),
-        INTC_IRQ(IIC32, 229), INTC_IRQ(IIC32, 230),
-        INTC_IRQ(IIC32, 231),
-
-        INTC_IRQ(SCIF0_BRI, 232), INTC_IRQ(SCIF0_ERI, 233),
-        INTC_IRQ(SCIF0_RXI, 234), INTC_IRQ(SCIF0_TXI, 235),
-        INTC_IRQ(SCIF1_BRI, 236), INTC_IRQ(SCIF1_ERI, 237),
-        INTC_IRQ(SCIF1_RXI, 238), INTC_IRQ(SCIF1_TXI, 239),
-        INTC_IRQ(SCIF2_BRI, 240), INTC_IRQ(SCIF2_ERI, 241),
-        INTC_IRQ(SCIF2_RXI, 242), INTC_IRQ(SCIF2_TXI, 243),
-        INTC_IRQ(SCIF3_BRI, 244), INTC_IRQ(SCIF3_ERI, 245),
-        INTC_IRQ(SCIF3_RXI, 246), INTC_IRQ(SCIF3_TXI, 247),
-        INTC_IRQ(SCIF4_BRI, 248), INTC_IRQ(SCIF4_ERI, 249),
-        INTC_IRQ(SCIF4_RXI, 250), INTC_IRQ(SCIF4_TXI, 251),
-        INTC_IRQ(SCIF5_BRI, 252), INTC_IRQ(SCIF5_ERI, 253),
-        INTC_IRQ(SCIF5_RXI, 254), INTC_IRQ(SCIF5_TXI, 255),
-        INTC_IRQ(SCIF6_BRI, 256), INTC_IRQ(SCIF6_ERI, 257),
-        INTC_IRQ(SCIF6_RXI, 258), INTC_IRQ(SCIF6_TXI, 259),
-        INTC_IRQ(SCIF7_BRI, 260), INTC_IRQ(SCIF7_ERI, 261),
-        INTC_IRQ(SCIF7_RXI, 262), INTC_IRQ(SCIF7_TXI, 263),
-
-        INTC_IRQ(SIO_FIFO, 264),
-
-        INTC_IRQ(RSPIC0, 265), INTC_IRQ(RSPIC0, 266),
-        INTC_IRQ(RSPIC0, 267),
-        INTC_IRQ(RSPIC1, 268), INTC_IRQ(RSPIC1, 269),
-        INTC_IRQ(RSPIC1, 270),
-
-        INTC_IRQ(RCAN0, 271), INTC_IRQ(RCAN0, 272),
-        INTC_IRQ(RCAN0, 273), INTC_IRQ(RCAN0, 274),
-        INTC_IRQ(RCAN0, 275),
-        INTC_IRQ(RCAN1, 276), INTC_IRQ(RCAN1, 277),
-        INTC_IRQ(RCAN1, 278), INTC_IRQ(RCAN1, 279),
-        INTC_IRQ(RCAN1, 280),
-
-        INTC_IRQ(IEBC, 281),
-
-        INTC_IRQ(CD_ROMD, 282), INTC_IRQ(CD_ROMD, 283),
-        INTC_IRQ(CD_ROMD, 284), INTC_IRQ(CD_ROMD, 285),
-        INTC_IRQ(CD_ROMD, 286), INTC_IRQ(CD_ROMD, 287),
-
-        INTC_IRQ(NFMC, 288), INTC_IRQ(NFMC, 289),
-        INTC_IRQ(NFMC, 290), INTC_IRQ(NFMC, 291),
-
-        INTC_IRQ(SDHI, 292), INTC_IRQ(SDHI, 293),
-        INTC_IRQ(SDHI, 294),
-
-        INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297),
-        INTC_IRQ(RTC, 298),
-
-        INTC_IRQ(SRCC0, 299), INTC_IRQ(SRCC0, 300),
-        INTC_IRQ(SRCC0, 301), INTC_IRQ(SRCC0, 302),
-        INTC_IRQ(SRCC0, 303),
-        INTC_IRQ(SRCC1, 304), INTC_IRQ(SRCC1, 305),
-        INTC_IRQ(SRCC1, 306), INTC_IRQ(SRCC1, 307),
-        INTC_IRQ(SRCC1, 308),
-
-        INTC_IRQ(DCOMU, 310), INTC_IRQ(DCOMU, 311),
-        INTC_IRQ(DCOMU, 312),
-};
-
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
-                   PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
-        INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),
-        INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),
-        INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),
-        INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),
-};
-
-static struct intc_prio_reg prio_registers[] __initdata = {
-        { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
-        { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
-        { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },
-        { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0,  DMAC1,  DMAC2,  DMAC3 } },
-        { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4,  DMAC5,  DMAC6,  DMAC7 } },
-        { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { DMAC8,  DMAC9,
-                                              DMAC10, DMAC11 } },
-        { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { DMAC12, DMAC13,
-                                              DMAC14, DMAC15 } },
-        { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC3, CMT0, CMT1 } },
-        { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
-        { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { MTU1_AB, MTU1_VU,
-                                              MTU2_AB, MTU2_VU } },
-        { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU3_ABCD, MTU3_TCI3V,
-                                              MTU4_ABCD, MTU4_TCI4V } },
-        { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { PWMT1, PWMT2, ADC_ADI, 0 } },
-        { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSIF0, SSII1, SSII2, SSII3 } },
-        { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { RSPDIF, IIC30, IIC31, IIC32 } },
-        { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { SCIF0, SCIF1, SCIF2, SCIF3 } },
-        { 0xfffe0c18, 0, 16, 4, /* IPR18 */ { SCIF4, SCIF5, SCIF6, SCIF7 } },
-        { 0xfffe0c1a, 0, 16, 4, /* IPR19 */ { SIO_FIFO, 0, RSPIC0, RSPIC1, } },
-        { 0xfffe0c1c, 0, 16, 4, /* IPR20 */ { RCAN0, RCAN1, IEBC, CD_ROMD } },
-        { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },
-        { 0xfffe0c20, 0, 16, 4, /* IPR22 */ { SRCC0, SRCC1, 0, DCOMU } },
-};
-
-static struct intc_mask_reg mask_registers[] __initdata = {
-        { 0xfffe0808, 0, 16, /* PINTER */
-          { 0, 0, 0, 0, 0, 0, 0, 0,
-            PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
-};
-
-static DECLARE_INTC_DESC(intc_desc, "sh7264", vectors, groups,
-                         mask_registers, prio_registers, NULL);
-
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xfffe8000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 233, 234, 235, 232 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xfffe8800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 237, 238, 239, 236 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id             = 1,
-        .dev            = {
-                .platform_data  = &scif1_platform_data,
-        },
-};
-
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xfffe9000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 241, 242, 243, 240 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id             = 2,
-        .dev            = {
-                .platform_data  = &scif2_platform_data,
-        },
-};
-
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xfffe9800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 245, 246, 247, 244 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xfffea000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 249, 250, 251, 248 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xfffea800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 253, 254, 255, 252 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
-
-static struct plat_sci_port scif6_platform_data = {
-        .mapbase        = 0xfffeb000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 257, 258, 259, 256 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif6_device = {
-        .name           = "sh-sci",
-        .id             = 6,
-        .dev            = {
-                .platform_data  = &scif6_platform_data,
-        },
-};
-
-static struct plat_sci_port scif7_platform_data = {
-        .mapbase        = 0xfffeb800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 261, 262, 263, 260 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif7_device = {
-        .name           = "sh-sci",
-        .id             = 7,
-        .dev            = {
-                .platform_data  = &scif7_platform_data,
-        },
-};
-
-static struct sh_timer_config cmt0_platform_data = {
-        .channel_offset = 0x02,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-
-static struct resource cmt0_resources[] = {
-        [0] = {
-                .name   = "CMT0",
-                .start  = 0xfffec002,
-                .end    = 0xfffec007,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 175,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device cmt0_device = {
-        .name           = "sh_cmt",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &cmt0_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-
-static struct sh_timer_config cmt1_platform_data = {
-        .name = "CMT1",
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .name   = "CMT1",
-                .start  = 0xfffec008,
-                .end    = 0xfffec00d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 176,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-
-static struct sh_timer_config mtu2_0_platform_data = {
-        .name = "MTU2_0",
-        .channel_offset = -0x80,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-
-static struct resource mtu2_0_resources[] = {
-        [0] = {
-                .name   = "MTU2_0",
-                .start  = 0xfffe4300,
-                .end    = 0xfffe4326,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 179,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mtu2_0_device = {
-        .name           = "sh_mtu2",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
-        },
-        .resource       = mtu2_0_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
-};
-
-static struct sh_timer_config mtu2_1_platform_data = {
-        .name = "MTU2_1",
-        .channel_offset = -0x100,
-        .timer_bit = 1,
-        .clockevent_rating = 200,
-};
-
-static struct resource mtu2_1_resources[] = {
-        [0] = {
-                .name   = "MTU2_1",
-                .start  = 0xfffe4380,
-                .end    = 0xfffe4390,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 186,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
-};
-
-static struct resource rtc_resources[] = {
-        [0] = {
-                .start  = 0xfffe6000,
-                .end    = 0xfffe6000 + 0x30 - 1,
-                .flags  = IORESOURCE_IO,
-        },
-        [1] = {
-                /* Shared Period/Carry/Alarm IRQ */
-                .start  = 296,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device rtc_device = {
-        .name           = "sh-rtc",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(rtc_resources),
-        .resource       = rtc_resources,
-};
-
-/* USB Host */
-static void usb_port_power(int port, int power)
-{
-        __raw_writew(0x200 , 0xffffc0c2) ; /* Initialise UACS25 */
-}
-
-static struct r8a66597_platdata r8a66597_data = {
-        .on_chip = 1,
-        .endian = 1,
-        .port_power = usb_port_power,
-};
-
-static struct resource r8a66597_usb_host_resources[] = {
-        [0] = {
-                .start  = 0xffffc000,
-                .end    = 0xffffc0e4,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 170,
-                .end    = 170,
-                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
-        },
-};
-
-static struct platform_device r8a66597_usb_host_device = {
-        .name           = "r8a66597_hcd",
-        .id             = 0,
-        .dev = {
-                .dma_mask               = NULL,         /*  not use dma */
-                .coherent_dma_mask      = 0xffffffff,
-                .platform_data          = &r8a66597_data,
-        },
-        .num_resources  = ARRAY_SIZE(r8a66597_usb_host_resources),
-        .resource       = r8a66597_usb_host_resources,
-};
-
-static struct platform_device *sh7264_devices[] __initdata = {
-        &scif0_device,
-        &scif1_device,
-        &scif2_device,
-        &scif3_device,
-        &scif4_device,
-        &scif5_device,
-        &scif6_device,
-        &scif7_device,
-        &cmt0_device,
-        &cmt1_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
-        &rtc_device,
-        &r8a66597_usb_host_device,
-};
-
-static int __init sh7264_devices_setup(void)
-{
-        return platform_add_devices(sh7264_devices,
-                                    ARRAY_SIZE(sh7264_devices));
-}
-arch_initcall(sh7264_devices_setup);
-
-void __init plat_irq_setup(void)
-{
-        register_intc_controller(&intc_desc);
-}
-
-static struct platform_device *sh7264_early_devices[] __initdata = {
-        &scif0_device,
-        &scif1_device,
-        &scif2_device,
-        &scif3_device,
-        &scif4_device,
-        &scif5_device,
-        &scif6_device,
-        &scif7_device,
-        &cmt0_device,
-        &cmt1_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
-};
-
-void __init plat_early_device_setup(void)
-{
-        early_platform_add_devices(sh7264_early_devices,
-                                   ARRAY_SIZE(sh7264_early_devices));
-}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
deleted file mode 100644
index e82ae9d8d3b..00000000000
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
+++ /dev/null
@@ -1,615 +0,0 @@
-/*
- * SH7269 Setup
- *
- * Copyright (C) 2012  Renesas Electronics Europe Ltd
- * Copyright (C) 2012  Phil Edworthy
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/platform_device.h>
-#include <linux/init.h>
-#include <linux/serial.h>
-#include <linux/serial_sci.h>
-#include <linux/usb/r8a66597.h>
-#include <linux/sh_timer.h>
-#include <linux/io.h>
-
-enum {
-        UNUSED = 0,
-
-        /* interrupt sources */
-        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
-
-        DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
-        DMAC8, DMAC9, DMAC10, DMAC11, DMAC12, DMAC13, DMAC14, DMAC15,
-        USB, VDC4, CMT0, CMT1, BSC, WDT,
-        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
-        MTU3_ABCD, MTU3_TCI3V, MTU4_ABCD, MTU4_TCI4V,
-        PWMT1, PWMT2, ADC_ADI,
-        SSIF0, SSII1, SSII2, SSII3, SSII4, SSII5,
-        RSPDIF,
-        IIC30, IIC31, IIC32, IIC33,
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
-        SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,
-        SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,
-        SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,
-        SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,
-        RCAN0, RCAN1, RCAN2,
-        RSPIC0, RSPIC1,
-        IEBC, CD_ROMD,
-        NFMC,
-        SDHI0, SDHI1,
-        RTC,
-        SRCC0, SRCC1, SRCC2,
-
-        /* interrupt groups */
-        PINT, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
-};
-
-static struct intc_vect vectors[] __initdata = {
-        INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
-        INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
-        INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
-        INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
-
-        INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
-        INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
-        INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
-        INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
-
-        INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),
-        INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),
-        INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),
-        INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),
-        INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),
-        INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),
-        INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),
-        INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),
-        INTC_IRQ(DMAC8, 140), INTC_IRQ(DMAC8, 141),
-        INTC_IRQ(DMAC9, 144), INTC_IRQ(DMAC9, 145),
-        INTC_IRQ(DMAC10, 148), INTC_IRQ(DMAC10, 149),
-        INTC_IRQ(DMAC11, 152), INTC_IRQ(DMAC11, 153),
-        INTC_IRQ(DMAC12, 156), INTC_IRQ(DMAC12, 157),
-        INTC_IRQ(DMAC13, 160), INTC_IRQ(DMAC13, 161),
-        INTC_IRQ(DMAC14, 164), INTC_IRQ(DMAC14, 165),
-        INTC_IRQ(DMAC15, 168), INTC_IRQ(DMAC15, 169),
-
-        INTC_IRQ(USB, 170),
-
-        INTC_IRQ(VDC4, 171), INTC_IRQ(VDC4, 172),
-        INTC_IRQ(VDC4, 173), INTC_IRQ(VDC4, 174),
-        INTC_IRQ(VDC4, 175), INTC_IRQ(VDC4, 176),
-        INTC_IRQ(VDC4, 177), INTC_IRQ(VDC4, 177),
-
-        INTC_IRQ(CMT0, 188), INTC_IRQ(CMT1, 189),
-
-        INTC_IRQ(BSC, 190), INTC_IRQ(WDT, 191),
-
-        INTC_IRQ(MTU0_ABCD, 192), INTC_IRQ(MTU0_ABCD, 193),
-        INTC_IRQ(MTU0_ABCD, 194), INTC_IRQ(MTU0_ABCD, 195),
-        INTC_IRQ(MTU0_VEF, 196), INTC_IRQ(MTU0_VEF, 197),
-        INTC_IRQ(MTU0_VEF, 198),
-        INTC_IRQ(MTU1_AB, 199), INTC_IRQ(MTU1_AB, 200),
-        INTC_IRQ(MTU1_VU, 201), INTC_IRQ(MTU1_VU, 202),
-        INTC_IRQ(MTU2_AB, 203), INTC_IRQ(MTU2_AB, 204),
-        INTC_IRQ(MTU2_VU, 205), INTC_IRQ(MTU2_VU, 206),
-        INTC_IRQ(MTU3_ABCD, 207), INTC_IRQ(MTU3_ABCD, 208),
-        INTC_IRQ(MTU3_ABCD, 209), INTC_IRQ(MTU3_ABCD, 210),
-        INTC_IRQ(MTU3_TCI3V, 211),
-        INTC_IRQ(MTU4_ABCD, 212), INTC_IRQ(MTU4_ABCD, 213),
-        INTC_IRQ(MTU4_ABCD, 214), INTC_IRQ(MTU4_ABCD, 215),
-        INTC_IRQ(MTU4_TCI4V, 216),
-
-        INTC_IRQ(PWMT1, 217), INTC_IRQ(PWMT2, 218),
-
-        INTC_IRQ(ADC_ADI, 223),
-
-        INTC_IRQ(SSIF0, 224), INTC_IRQ(SSIF0, 225),
-        INTC_IRQ(SSIF0, 226),
-        INTC_IRQ(SSII1, 227), INTC_IRQ(SSII1, 228),
-        INTC_IRQ(SSII2, 229), INTC_IRQ(SSII2, 230),
-        INTC_IRQ(SSII3, 231), INTC_IRQ(SSII3, 232),
-        INTC_IRQ(SSII4, 233), INTC_IRQ(SSII4, 234),
-        INTC_IRQ(SSII5, 235), INTC_IRQ(SSII5, 236),
-
-        INTC_IRQ(RSPDIF, 237),
-
-        INTC_IRQ(IIC30, 238), INTC_IRQ(IIC30, 239),
-        INTC_IRQ(IIC30, 240), INTC_IRQ(IIC30, 241),
-        INTC_IRQ(IIC30, 242),
-        INTC_IRQ(IIC31, 243), INTC_IRQ(IIC31, 244),
-        INTC_IRQ(IIC31, 245), INTC_IRQ(IIC31, 246),
-        INTC_IRQ(IIC31, 247),
-        INTC_IRQ(IIC32, 248), INTC_IRQ(IIC32, 249),
-        INTC_IRQ(IIC32, 250), INTC_IRQ(IIC32, 251),
-        INTC_IRQ(IIC32, 252),
-        INTC_IRQ(IIC33, 253), INTC_IRQ(IIC33, 254),
-        INTC_IRQ(IIC33, 255), INTC_IRQ(IIC33, 256),
-        INTC_IRQ(IIC33, 257),
-
-        INTC_IRQ(SCIF0_BRI, 258), INTC_IRQ(SCIF0_ERI, 259),
-        INTC_IRQ(SCIF0_RXI, 260), INTC_IRQ(SCIF0_TXI, 261),
-        INTC_IRQ(SCIF1_BRI, 262), INTC_IRQ(SCIF1_ERI, 263),
-        INTC_IRQ(SCIF1_RXI, 264), INTC_IRQ(SCIF1_TXI, 265),
-        INTC_IRQ(SCIF2_BRI, 266), INTC_IRQ(SCIF2_ERI, 267),
-        INTC_IRQ(SCIF2_RXI, 268), INTC_IRQ(SCIF2_TXI, 269),
-        INTC_IRQ(SCIF3_BRI, 270), INTC_IRQ(SCIF3_ERI, 271),
-        INTC_IRQ(SCIF3_RXI, 272), INTC_IRQ(SCIF3_TXI, 273),
-        INTC_IRQ(SCIF4_BRI, 274), INTC_IRQ(SCIF4_ERI, 275),
-        INTC_IRQ(SCIF4_RXI, 276), INTC_IRQ(SCIF4_TXI, 277),
-        INTC_IRQ(SCIF5_BRI, 278), INTC_IRQ(SCIF5_ERI, 279),
-        INTC_IRQ(SCIF5_RXI, 280), INTC_IRQ(SCIF5_TXI, 281),
-        INTC_IRQ(SCIF6_BRI, 282), INTC_IRQ(SCIF6_ERI, 283),
-        INTC_IRQ(SCIF6_RXI, 284), INTC_IRQ(SCIF6_TXI, 285),
-        INTC_IRQ(SCIF7_BRI, 286), INTC_IRQ(SCIF7_ERI, 287),
-        INTC_IRQ(SCIF7_RXI, 288), INTC_IRQ(SCIF7_TXI, 289),
-
-        INTC_IRQ(RCAN0, 291), INTC_IRQ(RCAN0, 292),
-        INTC_IRQ(RCAN0, 293), INTC_IRQ(RCAN0, 294),
-        INTC_IRQ(RCAN0, 295),
-        INTC_IRQ(RCAN1, 296), INTC_IRQ(RCAN1, 297),
-        INTC_IRQ(RCAN1, 298), INTC_IRQ(RCAN1, 299),
-        INTC_IRQ(RCAN1, 300),
-        INTC_IRQ(RCAN2, 301), INTC_IRQ(RCAN2, 302),
-        INTC_IRQ(RCAN2, 303), INTC_IRQ(RCAN2, 304),
-        INTC_IRQ(RCAN2, 305),
-
-        INTC_IRQ(RSPIC0, 306), INTC_IRQ(RSPIC0, 307),
-        INTC_IRQ(RSPIC0, 308),
-        INTC_IRQ(RSPIC1, 309), INTC_IRQ(RSPIC1, 310),
-        INTC_IRQ(RSPIC1, 311),
-
-        INTC_IRQ(IEBC, 318),
-
-        INTC_IRQ(CD_ROMD, 319), INTC_IRQ(CD_ROMD, 320),
-        INTC_IRQ(CD_ROMD, 321), INTC_IRQ(CD_ROMD, 322),
-        INTC_IRQ(CD_ROMD, 323), INTC_IRQ(CD_ROMD, 324),
-
-        INTC_IRQ(NFMC, 325), INTC_IRQ(NFMC, 326),
-        INTC_IRQ(NFMC, 327), INTC_IRQ(NFMC, 328),
-
-        INTC_IRQ(SDHI0, 332), INTC_IRQ(SDHI0, 333),
-        INTC_IRQ(SDHI0, 334),
-        INTC_IRQ(SDHI1, 335), INTC_IRQ(SDHI1, 336),
-        INTC_IRQ(SDHI1, 337),
-
-        INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339),
-        INTC_IRQ(RTC, 340),
-
-        INTC_IRQ(SRCC0, 341), INTC_IRQ(SRCC0, 342),
-        INTC_IRQ(SRCC0, 343), INTC_IRQ(SRCC0, 344),
-        INTC_IRQ(SRCC0, 345),
-        INTC_IRQ(SRCC1, 346), INTC_IRQ(SRCC1, 347),
-        INTC_IRQ(SRCC1, 348), INTC_IRQ(SRCC1, 349),
-        INTC_IRQ(SRCC1, 350),
-        INTC_IRQ(SRCC2, 351), INTC_IRQ(SRCC2, 352),
-        INTC_IRQ(SRCC2, 353), INTC_IRQ(SRCC2, 354),
-        INTC_IRQ(SRCC2, 355),
-};
-
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
-                   PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
-        INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),
-        INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),
-        INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),
-        INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),
-};
-
-static struct intc_prio_reg prio_registers[] __initdata = {
-        { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
-        { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
-        { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },
-        { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0,  DMAC1, DMAC2,  DMAC3 } },
-        { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4,  DMAC5, DMAC6,  DMAC7 } },
-        { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { DMAC8,  DMAC9,
-                                              DMAC10, DMAC11 } },
-        { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { DMAC12, DMAC13,
-                                              DMAC14, DMAC15 } },
-        { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC4, VDC4, VDC4 } },
-        { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { 0, 0, 0, 0 } },
-        { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } },
-        { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU0_ABCD, MTU0_VEF,
-                                              MTU1_AB, MTU1_VU } },
-        { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { MTU2_AB, MTU2_VU,
-                                              MTU3_ABCD, MTU3_TCI3V } },
-        { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { MTU4_ABCD, MTU4_TCI4V,
-                                              PWMT1, PWMT2 } },
-        { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { 0, 0, 0, 0 } },
-        { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { ADC_ADI, SSIF0, SSII1, SSII2 } },
-        { 0xfffe0c18, 0, 16, 4, /* IPR18 */ { SSII3, SSII4, SSII5,  RSPDIF} },
-        { 0xfffe0c1a, 0, 16, 4, /* IPR19 */ { IIC30, IIC31, IIC32, IIC33 } },
-        { 0xfffe0c1c, 0, 16, 4, /* IPR20 */ { SCIF0, SCIF1, SCIF2, SCIF3 } },
-        { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { SCIF4, SCIF5, SCIF6, SCIF7 } },
-        { 0xfffe0c20, 0, 16, 4, /* IPR22 */ { 0, RCAN0, RCAN1, RCAN2 } },
-        { 0xfffe0c22, 0, 16, 4, /* IPR23 */ { RSPIC0, RSPIC1, 0, 0 } },
-        { 0xfffe0c24, 0, 16, 4, /* IPR24 */ { IEBC, CD_ROMD, NFMC, 0 } },
-        { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },
-        { 0xfffe0c28, 0, 16, 4, /* IPR26 */ { SRCC0, SRCC1, SRCC2, 0 } },
-};
-
-static struct intc_mask_reg mask_registers[] __initdata = {
-        { 0xfffe0808, 0, 16, /* PINTER */
-          { 0, 0, 0, 0, 0, 0, 0, 0,
-            PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
-};
-
-static DECLARE_INTC_DESC(intc_desc, "sh7269", vectors, groups,
-                         mask_registers, prio_registers, NULL);
-
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xe8007000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 259, 260, 261, 258 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xe8007800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 263, 264, 265, 262 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id             = 1,
-        .dev            = {
-                .platform_data  = &scif1_platform_data,
-        },
-};
-
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xe8008000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 267, 268, 269, 266 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id             = 2,
-        .dev            = {
-                .platform_data  = &scif2_platform_data,
-        },
-};
-
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xe8008800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 271, 272, 273, 270 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xe8009000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 275, 276, 277, 274 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xe8009800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 279, 280, 281, 278 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
-
-static struct plat_sci_port scif6_platform_data = {
-        .mapbase        = 0xe800a000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 283, 284, 285, 282 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif6_device = {
-        .name           = "sh-sci",
-        .id             = 6,
-        .dev            = {
-                .platform_data  = &scif6_platform_data,
-        },
-};
-
-static struct plat_sci_port scif7_platform_data = {
-        .mapbase        = 0xe800a800,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
-                          SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           =  { 287, 288, 289, 286 },
-        .regtype        = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
-};
-
-static struct platform_device scif7_device = {
-        .name           = "sh-sci",
-        .id             = 7,
-        .dev            = {
-                .platform_data  = &scif7_platform_data,
-        },
-};
-
-static struct sh_timer_config cmt0_platform_data = {
-        .channel_offset = 0x02,
-        .timer_bit = 0,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-
-static struct resource cmt0_resources[] = {
-        [0] = {
-                .start  = 0xfffec002,
-                .end    = 0xfffec007,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 188,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device cmt0_device = {
-        .name           = "sh_cmt",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &cmt0_platform_data,
-        },
-        .resource       = cmt0_resources,
-        .num_resources  = ARRAY_SIZE(cmt0_resources),
-};
-
-static struct sh_timer_config cmt1_platform_data = {
-        .channel_offset = 0x08,
-        .timer_bit = 1,
-        .clockevent_rating = 125,
-        .clocksource_rating = 0, /* disabled due to code generation issues */
-};
-
-static struct resource cmt1_resources[] = {
-        [0] = {
-                .start  = 0xfffec008,
-                .end    = 0xfffec00d,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 189,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device cmt1_device = {
-        .name           = "sh_cmt",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &cmt1_platform_data,
-        },
-        .resource       = cmt1_resources,
-        .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-
-static struct sh_timer_config mtu2_0_platform_data = {
-        .channel_offset = -0x80,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-
-static struct resource mtu2_0_resources[] = {
-        [0] = {
-                .start  = 0xfffe4300,
-                .end    = 0xfffe4326,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 192,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mtu2_0_device = {
-        .name           = "sh_mtu2",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &mtu2_0_platform_data,
-        },
-        .resource       = mtu2_0_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
-};
-
-static struct sh_timer_config mtu2_1_platform_data = {
-        .channel_offset = -0x100,
-        .timer_bit = 1,
-        .clockevent_rating = 200,
-};
-
-static struct resource mtu2_1_resources[] = {
-        [0] = {
-                .start  = 0xfffe4380,
-                .end    = 0xfffe4390,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 203,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mtu2_1_device = {
-        .name           = "sh_mtu2",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &mtu2_1_platform_data,
-        },
-        .resource       = mtu2_1_resources,
-        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
-};
-
-static struct resource rtc_resources[] = {
-        [0] = {
-                .start  = 0xfffe6000,
-                .end    = 0xfffe6000 + 0x30 - 1,
-                .flags  = IORESOURCE_IO,
-        },
-        [1] = {
-                /* Shared Period/Carry/Alarm IRQ */
-                .start  = 338,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device rtc_device = {
-        .name           = "sh-rtc",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(rtc_resources),
-        .resource       = rtc_resources,
-};
-
-/* USB Host */
-static struct r8a66597_platdata r8a66597_data = {
-        .on_chip = 1,
-        .endian = 1,
-};
-
-static struct resource r8a66597_usb_host_resources[] = {
-        [0] = {
-                .start  = 0xe8010000,
-                .end    = 0xe80100e4,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = 170,
-                .end    = 170,
-                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
-        },
-};
-
-static struct platform_device r8a66597_usb_host_device = {
-        .name           = "r8a66597_hcd",
-        .id             = 0,
-        .dev = {
-                .dma_mask               = NULL,         /*  not use dma */
-                .coherent_dma_mask      = 0xffffffff,
-                .platform_data          = &r8a66597_data,
-        },
-        .num_resources  = ARRAY_SIZE(r8a66597_usb_host_resources),
-        .resource       = r8a66597_usb_host_resources,
-};
-
-static struct platform_device *sh7269_devices[] __initdata = {
-        &scif0_device,
-        &scif1_device,
-        &scif2_device,
-        &scif3_device,
-        &scif4_device,
-        &scif5_device,
-        &scif6_device,
-        &scif7_device,
-        &cmt0_device,
-        &cmt1_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
-        &rtc_device,
-        &r8a66597_usb_host_device,
-};
-
-static int __init sh7269_devices_setup(void)
-{
-        return platform_add_devices(sh7269_devices,
-                                    ARRAY_SIZE(sh7269_devices));
-}
-arch_initcall(sh7269_devices_setup);
-
-void __init plat_irq_setup(void)
-{
-        register_intc_controller(&intc_desc);
-}
-
-static struct platform_device *sh7269_early_devices[] __initdata = {
-        &scif0_device,
-        &scif1_device,
-        &scif2_device,
-        &scif3_device,
-        &scif4_device,
-        &scif5_device,
-        &scif6_device,
-        &scif7_device,
-        &cmt0_device,
-        &cmt1_device,
-        &mtu2_0_device,
-        &mtu2_1_device,
-};
-
-void __init plat_early_device_setup(void)
-{
-        early_platform_add_devices(sh7269_early_devices,
-                                   ARRAY_SIZE(sh7269_early_devices));
-}
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index 90faa44ca94..b78384afac0 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -34,7 +34,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh3_master_clk_ops = {
+static struct clk_ops sh3_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -46,7 +46,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh3_module_clk_ops = {
+static struct clk_ops sh3_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -58,7 +58,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / stc_multipliers[idx];
 }
 
-static struct sh_clk_ops sh3_bus_clk_ops = {
+static struct clk_ops sh3_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -70,18 +70,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh3_cpu_clk_ops = {
+static struct clk_ops sh3_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh3_clk_ops[] = {
+static struct clk_ops *sh3_clk_ops[] = {
         &sh3_master_clk_ops,
         &sh3_module_clk_ops,
         &sh3_bus_clk_ops,
         &sh3_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh3_clk_ops))
                 *ops = sh3_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index a8da4a9986b..0ecea1451c6 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -35,7 +35,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
 }
 
-static struct sh_clk_ops sh7705_master_clk_ops = {
+static struct clk_ops sh7705_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -45,7 +45,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7705_module_clk_ops = {
+static struct clk_ops sh7705_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -55,7 +55,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / stc_multipliers[idx];
 }
 
-static struct sh_clk_ops sh7705_bus_clk_ops = {
+static struct clk_ops sh7705_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -65,18 +65,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7705_cpu_clk_ops = {
+static struct clk_ops sh7705_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7705_clk_ops[] = {
+static struct clk_ops *sh7705_clk_ops[] = {
         &sh7705_master_clk_ops,
         &sh7705_module_clk_ops,
         &sh7705_bus_clk_ops,
         &sh7705_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7705_clk_ops))
                 *ops = sh7705_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index a4088e5b220..6f9ff8b57dd 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7706_master_clk_ops = {
+static struct clk_ops sh7706_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7706_module_clk_ops = {
+static struct clk_ops sh7706_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -54,7 +54,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / stc_multipliers[idx];
 }
 
-static struct sh_clk_ops sh7706_bus_clk_ops = {
+static struct clk_ops sh7706_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -66,18 +66,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7706_cpu_clk_ops = {
+static struct clk_ops sh7706_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7706_clk_ops[] = {
+static struct clk_ops *sh7706_clk_ops[] = {
         &sh7706_master_clk_ops,
         &sh7706_module_clk_ops,
         &sh7706_bus_clk_ops,
         &sh7706_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7706_clk_ops))
                 *ops = sh7706_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index 54a6d4bcc0d..f302ba09e68 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -30,7 +30,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7709_master_clk_ops = {
+static struct clk_ops sh7709_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -42,7 +42,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7709_module_clk_ops = {
+static struct clk_ops sh7709_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -55,7 +55,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate * stc_multipliers[idx];
 }
 
-static struct sh_clk_ops sh7709_bus_clk_ops = {
+static struct clk_ops sh7709_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -67,18 +67,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7709_cpu_clk_ops = {
+static struct clk_ops sh7709_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7709_clk_ops[] = {
+static struct clk_ops *sh7709_clk_ops[] = {
         &sh7709_master_clk_ops,
         &sh7709_module_clk_ops,
         &sh7709_bus_clk_ops,
         &sh7709_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7709_clk_ops))
                 *ops = sh7709_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index ce601b2e397..29a87d8946a 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
 }
 
-static struct sh_clk_ops sh7710_master_clk_ops = {
+static struct clk_ops sh7710_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -39,7 +39,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / md_table[idx];
 }
 
-static struct sh_clk_ops sh7710_module_clk_ops = {
+static struct clk_ops sh7710_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -49,7 +49,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / md_table[idx];
 }
 
-static struct sh_clk_ops sh7710_bus_clk_ops = {
+static struct clk_ops sh7710_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -59,18 +59,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / md_table[idx];
 }
 
-static struct sh_clk_ops sh7710_cpu_clk_ops = {
+static struct clk_ops sh7710_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7710_clk_ops[] = {
+static struct clk_ops *sh7710_clk_ops[] = {
         &sh7710_master_clk_ops,
         &sh7710_module_clk_ops,
         &sh7710_bus_clk_ops,
         &sh7710_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7710_clk_ops))
                 *ops = sh7710_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 21438a9a1ae..b0d0c520399 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= multipliers[idx];
 }
 
-static struct sh_clk_ops sh7712_master_clk_ops = {
+static struct clk_ops sh7712_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -41,7 +41,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / divisors[idx];
 }
 
-static struct sh_clk_ops sh7712_module_clk_ops = {
+static struct clk_ops sh7712_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -53,17 +53,17 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / divisors[idx];
 }
 
-static struct sh_clk_ops sh7712_cpu_clk_ops = {
+static struct clk_ops sh7712_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7712_clk_ops[] = {
+static struct clk_ops *sh7712_clk_ops[] = {
         &sh7712_master_clk_ops,
         &sh7712_module_clk_ops,
         &sh7712_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7712_clk_ops))
                 *ops = sh7712_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 262db6ec067..f6a389c996c 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -2,7 +2,7 @@
  * arch/sh/kernel/cpu/sh3/entry.S
  *
  *  Copyright (C) 1999, 2000, 2002  Niibe Yutaka
- *  Copyright (C) 2003 - 2012  Paul Mundt
+ *  Copyright (C) 2003 - 2006  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -17,7 +17,6 @@
 #include <cpu/mmu_context.h>
 #include <asm/page.h>
 #include <asm/cache.h>
-#include <asm/thread_info.h>
 
 ! NOTE:
 ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
@@ -115,22 +114,22 @@ ENTRY(tlb_miss_load)
         .align  2
 ENTRY(tlb_miss_store)
         bra     call_handle_tlbmiss
-         mov    #FAULT_CODE_WRITE, r5
+         mov    #1, r5
 
         .align  2
 ENTRY(initial_page_write)
         bra     call_handle_tlbmiss
-         mov    #FAULT_CODE_INITIAL, r5
+         mov    #2, r5
 
         .align  2
 ENTRY(tlb_protection_violation_load)
         bra     call_do_page_fault
-         mov    #FAULT_CODE_PROT, r5
+         mov    #0, r5
 
         .align  2
 ENTRY(tlb_protection_violation_store)
         bra     call_do_page_fault
-         mov    #(FAULT_CODE_PROT | FAULT_CODE_WRITE), r5
+         mov    #1, r5
 
 call_handle_tlbmiss:
         mov.l   1f, r0
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
index c4a0336660d..8832c526cdf 100644
--- a/arch/sh/kernel/cpu/sh3/serial-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
@@ -2,7 +2,7 @@
 #include <linux/serial_core.h>
 #include <linux/io.h>
 #include <cpu/serial.h>
-#include <cpu/gpio.h>
+#include <asm/gpio.h>
 
 static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
 {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 03e4c96f2b1..2309618c015 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -14,7 +14,6 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <asm/rtc.h>
 #include <cpu/serial.h>
 
@@ -76,7 +75,7 @@ static struct plat_sci_port scif0_platform_data = {
                           SCSCR_RE  | SCSCR_CKE1 | SCSCR_CKE0,
         .scbrr_algo_id  = SCBRR_ALGO_4,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
+        .irqs           = { 56, 56, 56 },
         .ops            = &sh770x_sci_port_ops,
         .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
@@ -95,7 +94,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
         .scbrr_algo_id  = SCBRR_ALGO_4,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x880)),
+        .irqs           = { 52, 52, 52 },
         .ops            = &sh770x_sci_port_ops,
         .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
@@ -115,7 +114,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] =   {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -147,7 +146,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -175,7 +174,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -202,7 +201,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index ba26cd9ce69..3f3d5fe5892 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -19,7 +19,6 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <cpu/serial.h>
 
 enum {
@@ -96,7 +95,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] =   {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -115,7 +114,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_TE | SCSCR_RE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCI,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x4e0)),
+        .irqs           = { 23, 23, 23, 0 },
         .ops            = &sh770x_sci_port_ops,
         .regshift       = 1,
 };
@@ -136,7 +135,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_TE | SCSCR_RE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
+        .irqs           = { 56, 56, 56, 56 },
         .ops            = &sh770x_sci_port_ops,
         .regtype        = SCIx_SH3_SCIF_REGTYPE,
 };
@@ -158,7 +157,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_TE | SCSCR_RE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_IRDA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x880)),
+        .irqs           = { 52, 52, 52, 52 },
         .ops            = &sh770x_sci_port_ops,
         .regshift       = 1,
 };
@@ -185,7 +184,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -213,7 +212,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -240,7 +239,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 93c9c5e24a7..78f6b01d42c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -14,7 +14,6 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <asm/rtc.h>
 
 enum {
@@ -78,7 +77,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] =   {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -104,7 +103,7 @@ static struct plat_sci_port scif0_platform_data = {
                           SCSCR_CKE1 | SCSCR_CKE0,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x880)),
+        .irqs           = { 52, 52, 52, 52 },
 };
 
 static struct platform_device scif0_device = {
@@ -122,7 +121,7 @@ static struct plat_sci_port scif1_platform_data = {
                           SCSCR_CKE1 | SCSCR_CKE0,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
+        .irqs           = { 56, 56, 56, 56 },
 };
 
 static struct platform_device scif1_device = {
@@ -146,7 +145,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -174,7 +173,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -201,7 +200,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 42d991f632b..94920345c14 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -19,8 +19,6 @@
 #include <linux/io.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
-#include <linux/usb/ohci_pdriver.h>
 #include <asm/rtc.h>
 #include <cpu/serial.h>
 
@@ -32,7 +30,7 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Shared Period/Carry/Alarm IRQ */
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -57,7 +55,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE,
         .scbrr_algo_id  = SCBRR_ALGO_4,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+        .irqs           = { 80, 80, 80, 80 },
         .ops            = &sh7720_sci_port_ops,
         .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
@@ -76,7 +74,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE,
         .scbrr_algo_id  = SCBRR_ALGO_4,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+        .irqs           = { 81, 81, 81, 81 },
         .ops            = &sh7720_sci_port_ops,
         .regtype        = SCIx_SH7705_SCIF_REGTYPE,
 };
@@ -96,23 +94,19 @@ static struct resource usb_ohci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa60),
-                .end    = evt2irq(0xa60),
+                .start  = 67,
+                .end    = 67,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static u64 usb_ohci_dma_mask = 0xffffffffUL;
-
-static struct usb_ohci_pdata usb_ohci_pdata;
-
 static struct platform_device usb_ohci_device = {
-        .name           = "ohci-platform",
+        .name           = "sh_ohci",
         .id             = -1,
         .dev = {
                 .dma_mask               = &usb_ohci_dma_mask,
                 .coherent_dma_mask      = 0xffffffff,
-                .platform_data          = &usb_ohci_pdata,
         },
         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
         .resource       = usb_ohci_resources,
@@ -127,8 +121,8 @@ static struct resource usbf_resources[] = {
         },
         [1] = {
                 .name   = "sh_udc",
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -158,7 +152,7 @@ static struct resource cmt0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -185,7 +179,7 @@ static struct resource cmt1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -212,7 +206,7 @@ static struct resource cmt2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -239,7 +233,7 @@ static struct resource cmt3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -266,7 +260,7 @@ static struct resource cmt4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -294,7 +288,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -322,7 +316,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -349,7 +343,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 4b5bab5f875..f4e262adb39 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -41,7 +41,7 @@ static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)
         return 5;
 }
 
-static struct sh_clk_ops sh4202_emi_clk_ops = {
+static struct clk_ops sh4202_emi_clk_ops = {
         .recalc         = emi_clk_recalc,
 };
 
@@ -56,7 +56,7 @@ static unsigned long femi_clk_recalc(struct clk *clk)
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
-static struct sh_clk_ops sh4202_femi_clk_ops = {
+static struct clk_ops sh4202_femi_clk_ops = {
         .recalc         = femi_clk_recalc,
 };
 
@@ -130,7 +130,7 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
-static struct sh_clk_ops sh4202_shoc_clk_ops = {
+static struct clk_ops sh4202_shoc_clk_ops = {
         .init           = shoc_clk_init,
         .recalc         = shoc_clk_recalc,
         .set_rate       = shoc_clk_set_rate,
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index 99e5ec8b483..5add75c1f53 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -31,7 +31,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
 }
 
-static struct sh_clk_ops sh4_master_clk_ops = {
+static struct clk_ops sh4_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -41,7 +41,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh4_module_clk_ops = {
+static struct clk_ops sh4_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -51,7 +51,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / bfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh4_bus_clk_ops = {
+static struct clk_ops sh4_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -61,18 +61,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh4_cpu_clk_ops = {
+static struct clk_ops sh4_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh4_clk_ops[] = {
+static struct clk_ops *sh4_clk_ops[] = {
         &sh4_master_clk_ops,
         &sh4_module_clk_ops,
         &sh4_bus_clk_ops,
         &sh4_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh4_clk_ops))
                 *ops = sh4_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index 69ab4d3c8d4..447482d7f65 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -15,8 +15,8 @@
 #include <linux/io.h>
 #include <cpu/fpu.h>
 #include <asm/processor.h>
+#include <asm/system.h>
 #include <asm/fpu.h>
-#include <asm/traps.h>
 
 /* The PR (precision) bit in the FP Status Register must be clear when
  * an frchg instruction is executed, otherwise the instruction is undefined.
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 0fbbd50bc8a..971cf0fce4f 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -158,9 +158,6 @@ void __cpuinit cpu_probe(void)
                 case 0x40: /* yon-ten-go */
                         boot_cpu_data.type = CPU_SH7372;
                         break;
-                case 0xE0: /* 0x4E0 */
-                        boot_cpu_data.type = CPU_SH7734; /* SH7733/SH7734 */
-                        break;
 
                 }
                 break;
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index 2a5320aa73b..5b2833159b7 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -13,7 +13,6 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/io.h>
 
 static struct plat_sci_port scif0_platform_data = {
@@ -22,10 +21,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0x700),
-                            evt2irq(0x720),
-                            evt2irq(0x760),
-                            evt2irq(0x740) },
+        .irqs           = { 40, 41, 43, 42 },
 };
 
 static struct platform_device scif0_device = {
@@ -49,7 +45,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -77,7 +73,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -104,7 +100,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 04a45512596..98cc0c794c7 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -13,7 +13,6 @@
 #include <linux/serial.h>
 #include <linux/io.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/serial_sci.h>
 #include <generated/machtypes.h>
 
@@ -25,7 +24,7 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Shared Period/Carry/Alarm IRQ */
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -44,7 +43,7 @@ static struct plat_sci_port sci_platform_data = {
         .scscr          = SCSCR_TE | SCSCR_RE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCI,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x4e0)),
+        .irqs           = { 23, 23, 23, 0 },
         .regshift       = 2,
 };
 
@@ -62,7 +61,7 @@ static struct plat_sci_port scif_platform_data = {
         .scscr          = SCSCR_TE | SCSCR_RE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x700)),
+        .irqs           = { 40, 40, 40, 40 },
 };
 
 static struct platform_device scif_device = {
@@ -86,7 +85,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -114,7 +113,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -141,7 +140,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -173,7 +172,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xb00),
+                .start  = 72,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -200,7 +199,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xb80),
+                .start  = 76,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 98e075ada44..c0b4c774700 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -11,7 +11,6 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/serial_sci.h>
 #include <linux/io.h>
 
@@ -133,10 +132,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0x880),
-                            evt2irq(0x8a0),
-                            evt2irq(0x8e0),
-                            evt2irq(0x8c0) },
+        .irqs           = { 52, 53, 55, 54 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -154,10 +150,7 @@ static struct plat_sci_port scif1_platform_data = {
         .type           = PORT_SCIF,
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
-        .irqs           = { evt2irq(0xb00),
-                            evt2irq(0xb20),
-                            evt2irq(0xb60),
-                            evt2irq(0xb40) },
+        .irqs           = { 72, 73, 75, 74 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -175,10 +168,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0xb80),
-                            evt2irq(0xba0),
-                            evt2irq(0xbe0),
-                            evt2irq(0xbc0) },
+        .irqs           = { 76, 77, 79, 78 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -196,9 +186,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCI,
-        .irqs           = { evt2irq(0xc00),
-                            evt2irq(0xc20),
-                            evt2irq(0xc40), },
+        .irqs           = { 80, 81, 82, 0 },
         .regshift       = 2,
 };
 
@@ -223,7 +211,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -251,7 +239,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -278,7 +266,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 0a47bd3e7be..f0907995b4c 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -13,7 +13,7 @@
 #include <linux/init.h>
 #include <linux/cpu.h>
 #include <linux/bitmap.h>
-#include <linux/device.h>
+#include <linux/sysdev.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/slab.h>
@@ -337,9 +337,9 @@ static struct kobj_type ktype_percpu_entry = {
         .default_attrs  = sq_sysfs_attrs,
 };
 
-static int sq_dev_add(struct device *dev, struct subsys_interface *sif)
+static int __devinit sq_sysdev_add(struct sys_device *sysdev)
 {
-        unsigned int cpu = dev->id;
+        unsigned int cpu = sysdev->id;
         struct kobject *kobj;
         int error;
 
@@ -348,27 +348,25 @@ static int sq_dev_add(struct device *dev, struct subsys_interface *sif)
                 return -ENOMEM;
 
         kobj = sq_kobject[cpu];
-        error = kobject_init_and_add(kobj, &ktype_percpu_entry, &dev->kobj,
+        error = kobject_init_and_add(kobj, &ktype_percpu_entry, &sysdev->kobj,
                                      "%s", "sq");
         if (!error)
                 kobject_uevent(kobj, KOBJ_ADD);
         return error;
 }
 
-static int sq_dev_remove(struct device *dev, struct subsys_interface *sif)
+static int __devexit sq_sysdev_remove(struct sys_device *sysdev)
 {
-        unsigned int cpu = dev->id;
+        unsigned int cpu = sysdev->id;
         struct kobject *kobj = sq_kobject[cpu];
 
         kobject_put(kobj);
         return 0;
 }
 
-static struct subsys_interface sq_interface = {
-        .name           = "sq",
-        .subsys         = &cpu_subsys,
-        .add_dev        = sq_dev_add,
-        .remove_dev     = sq_dev_remove,
+static struct sysdev_driver sq_sysdev_driver = {
+        .add            = sq_sysdev_add,
+        .remove         = __devexit_p(sq_sysdev_remove),
 };
 
 static int __init sq_api_init(void)
@@ -388,7 +386,7 @@ static int __init sq_api_init(void)
         if (unlikely(!sq_bitmap))
                 goto out;
 
-        ret = subsys_interface_register(&sq_interface);
+        ret = sysdev_driver_register(&cpu_sysdev_class, &sq_sysdev_driver);
         if (unlikely(ret != 0))
                 goto out;
 
@@ -403,7 +401,7 @@ out:
 
 static void __exit sq_api_exit(void)
 {
-        subsys_interface_unregister(&sq_interface);
+        sysdev_driver_unregister(&cpu_sysdev_class, &sq_sysdev_driver);
         kfree(sq_bitmap);
         kmem_cache_destroy(sq_cache);
 }
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 8fc6ec2be2f..c57fb287011 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7343)	+= setup-sh7343.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7722)        += setup-sh7722.o serial-sh7722.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7723)        += setup-sh7723.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7724)        += setup-sh7724.o
-obj-$(CONFIG_CPU_SUBTYPE_SH7734)        += setup-sh7734.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7366)        += setup-sh7366.o
 obj-$(CONFIG_CPU_SUBTYPE_SHX3)          += setup-shx3.o intc-shx3.o
 
@@ -28,10 +27,9 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780)	:= clock-sh7780.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7785)      := clock-sh7785.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7786)      := clock-sh7786.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7343)      := clock-sh7343.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7723.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7724)      := clock-sh7724.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7734)      := clock-sh7734.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o hwblk-sh7722.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7723.o hwblk-sh7723.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7724)      := clock-sh7724.o hwblk-sh7724.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7366)      := clock-sh7366.o
 clock-$(CONFIG_CPU_SUBTYPE_SHX3)        := clock-shx3.o
 
@@ -39,7 +37,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7722)     := pinmux-sh7722.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7723)     := pinmux-sh7723.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7724)     := pinmux-sh7724.o
-pinmux-$(CONFIG_CPU_SUBTYPE_SH7734)     := pinmux-sh7734.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7757)     := pinmux-sh7757.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)     := pinmux-sh7785.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)     := pinmux-sh7786.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 53638e231cd..70e45bdaadc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -61,7 +61,7 @@ static unsigned long dll_recalc(struct clk *clk)
         return clk->parent->rate * mult;
 }
 
-static struct sh_clk_ops dll_clk_ops = {
+static struct clk_ops dll_clk_ops = {
         .recalc         = dll_recalc,
 };
 
@@ -81,7 +81,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return clk->parent->rate * mult;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -283,7 +283,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
 
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 22e485d1990..3c3165000c5 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -61,7 +61,7 @@ static unsigned long dll_recalc(struct clk *clk)
         return clk->parent->rate * mult;
 }
 
-static struct sh_clk_ops dll_clk_ops = {
+static struct clk_ops dll_clk_ops = {
         .recalc         = dll_recalc,
 };
 
@@ -84,7 +84,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return (clk->parent->rate * mult) / div;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -276,7 +276,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
 
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index c4cb740e4d1..c9a48088ad4 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -22,8 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <linux/clkdev.h>
-#include <linux/sh_clk.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
 #include <cpu/sh7722.h>
 
 /* SH7722 registers */
@@ -33,9 +33,6 @@
 #define SCLKBCR         0xa415000c
 #define IRDACLKCR       0xa4150018
 #define PLLCR           0xa4150024
-#define MSTPCR0         0xa4150030
-#define MSTPCR1         0xa4150034
-#define MSTPCR2         0xa4150038
 #define DLLFRQ          0xa4150050
 
 /* Fixed 32 KHz root clock for RTC and Power Management purposes */
@@ -64,7 +61,7 @@ static unsigned long dll_recalc(struct clk *clk)
         return clk->parent->rate * mult;
 }
 
-static struct sh_clk_ops dll_clk_ops = {
+static struct clk_ops dll_clk_ops = {
         .recalc         = dll_recalc,
 };
 
@@ -87,7 +84,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return (clk->parent->rate * mult) / div;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -151,31 +148,31 @@ struct clk div6_clks[DIV6_NR] = {
 };
 
 static struct clk mstp_clks[HWBLK_NR] = {
-        [HWBLK_URAM]  = SH_CLK_MSTP32(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
-        [HWBLK_XYMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
-        [HWBLK_TMU]   = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
-        [HWBLK_CMT]   = SH_CLK_MSTP32(&r_clk,             MSTPCR0, 14, 0),
-        [HWBLK_RWDT]  = SH_CLK_MSTP32(&r_clk,             MSTPCR0, 13, 0),
-        [HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
-        [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
-        [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 6, 0),
-        [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 5, 0),
-
-        [HWBLK_IIC]   = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
-        [HWBLK_RTC]   = SH_CLK_MSTP32(&r_clk,             MSTPCR1, 8, 0),
-
-        [HWBLK_SDHI]  = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 18, 0),
-        [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk,             MSTPCR2, 14, 0),
-        [HWBLK_USBF]  = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 11, 0),
-        [HWBLK_2DG]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0),
-        [HWBLK_SIU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0),
-        [HWBLK_JPU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0),
-        [HWBLK_VOU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
-        [HWBLK_BEU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
-        [HWBLK_CEU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
-        [HWBLK_VEU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0),
-        [HWBLK_VPU]   = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0),
-        [HWBLK_LCDC]  = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 0, 0),
+        SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_XYMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_TMU, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
+
+        SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
+
+        SH_HWBLK_CLK(HWBLK_SDHI, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_USBF, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VEU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0),
 };
 
 static struct clk_lookup lookups[] = {
@@ -208,27 +205,27 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
 
         CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
-        CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
+        CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
         CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
 
-        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
-        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
-        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
 
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
         CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
-        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI]),
-        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
+        CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]),
+        CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
         CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]),
         CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
-        CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]),
-        CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
+        CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
+        CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
         CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
         CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
-        CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]),
+        CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
         CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]),
         CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
-        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
+        CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
 };
 
 int __init arch_clk_init(void)
@@ -261,7 +258,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
 
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
+                ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 37c41c7747a..3cc3827380e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -23,8 +23,8 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/clkdev.h>
-#include <linux/sh_clk.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
 #include <cpu/sh7723.h>
 
 /* SH7723 registers */
@@ -34,9 +34,6 @@
 #define SCLKBCR         0xa415000c
 #define IRDACLKCR       0xa4150018
 #define PLLCR           0xa4150024
-#define MSTPCR0         0xa4150030
-#define MSTPCR1         0xa4150034
-#define MSTPCR2         0xa4150038
 #define DLLFRQ          0xa4150050
 
 /* Fixed 32 KHz root clock for RTC and Power Management purposes */
@@ -65,7 +62,7 @@ static unsigned long dll_recalc(struct clk *clk)
         return clk->parent->rate * mult;
 }
 
-static struct sh_clk_ops dll_clk_ops = {
+static struct clk_ops dll_clk_ops = {
         .recalc         = dll_recalc,
 };
 
@@ -88,7 +85,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return (clk->parent->rate * mult) / div;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -152,55 +149,55 @@ struct clk div6_clks[DIV6_NR] = {
 
 static struct clk mstp_clks[] = {
         /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
-        [HWBLK_TLB]    = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 31, CLK_ENABLE_ON_INIT),
-        [HWBLK_IC]     = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 30, CLK_ENABLE_ON_INIT),
-        [HWBLK_OC]     = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 29, CLK_ENABLE_ON_INIT),
-        [HWBLK_L2C]    = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
-        [HWBLK_ILMEM]  = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 27, CLK_ENABLE_ON_INIT),
-        [HWBLK_FPU]    = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 24, CLK_ENABLE_ON_INIT),
-        [HWBLK_INTC]   = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 22, CLK_ENABLE_ON_INIT),
-        [HWBLK_DMAC0]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 21, 0),
-        [HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT),
-        [HWBLK_HUDI]   = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 19, 0),
-        [HWBLK_UBC]    = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 17, 0),
-        [HWBLK_TMU0]   = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 15, 0),
-        [HWBLK_CMT]    = SH_CLK_MSTP32(&r_clk,              MSTPCR0, 14, 0),
-        [HWBLK_RWDT]   = SH_CLK_MSTP32(&r_clk,              MSTPCR0, 13, 0),
-        [HWBLK_DMAC1]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 12, 0),
-        [HWBLK_TMU1]   = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 11, 0),
-        [HWBLK_FLCTL]  = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 10, 0),
-        [HWBLK_SCIF0]  = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 9, 0),
-        [HWBLK_SCIF1]  = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 8, 0),
-        [HWBLK_SCIF2]  = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 7, 0),
-        [HWBLK_SCIF3]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 6, 0),
-        [HWBLK_SCIF4]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 5, 0),
-        [HWBLK_SCIF5]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 4, 0),
-        [HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 2, 0),
-        [HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 1, 0),
-        [HWBLK_MERAM]  = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 0, 0),
-
-        [HWBLK_IIC]    = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR1, 9, 0),
-        [HWBLK_RTC]    = SH_CLK_MSTP32(&r_clk,              MSTPCR1, 8, 0),
-
-        [HWBLK_ATAPI]  = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 28, 0),
-        [HWBLK_ADC]    = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR2, 27, 0),
-        [HWBLK_TPU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 25, 0),
-        [HWBLK_IRDA]   = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR2, 24, 0),
-        [HWBLK_TSIF]   = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 22, 0),
-        [HWBLK_ICB]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 21, CLK_ENABLE_ON_INIT),
-        [HWBLK_SDHI0]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 18, 0),
-        [HWBLK_SDHI1]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 17, 0),
-        [HWBLK_KEYSC]  = SH_CLK_MSTP32(&r_clk,              MSTPCR2, 14, 0),
-        [HWBLK_USB]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 11, 0),
-        [HWBLK_2DG]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 10, 0),
-        [HWBLK_SIU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 8, 0),
-        [HWBLK_VEU2H1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 6, 0),
-        [HWBLK_VOU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 5, 0),
-        [HWBLK_BEU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 4, 0),
-        [HWBLK_CEU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 3, 0),
-        [HWBLK_VEU2H0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 2, 0),
-        [HWBLK_VPU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 1, 0),
-        [HWBLK_LCDC]   = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 0, 0),
+        SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
+        SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_MERAM, &div4_clks[DIV4_SH], 0),
+
+        SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
+
+        SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_SH], 0),
+        SH_HWBLK_CLK(HWBLK_ADC, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_ICB, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_USB, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VEU2H1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VEU2H0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
 };
 
 static struct clk_lookup lookups[] = {
@@ -232,17 +229,80 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
         CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
         CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
-        CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),
+        CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
         CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
         CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
         CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
+        {
+                /* TMU0 */
+                .dev_id         = "sh_tmu.0",
+                .con_id         = "tmu_fck",
+                .clk            = &mstp_clks[HWBLK_TMU0],
+        }, {
+                /* TMU1 */
+                .dev_id         = "sh_tmu.1",
+                .con_id         = "tmu_fck",
+                .clk            = &mstp_clks[HWBLK_TMU0],
+        }, {
+                /* TMU2 */
+                .dev_id         = "sh_tmu.2",
+                .con_id         = "tmu_fck",
+                .clk            = &mstp_clks[HWBLK_TMU0],
+        },
         CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
-        CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
-        CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
+        CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
+        CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
+        {
+                /* TMU3 */
+                .dev_id         = "sh_tmu.3",
+                .con_id         = "tmu_fck",
+                .clk            = &mstp_clks[HWBLK_TMU1],
+        }, {
+                /* TMU4 */
+                .dev_id         = "sh_tmu.4",
+                .con_id         = "tmu_fck",
+                .clk            = &mstp_clks[HWBLK_TMU1],
+        }, {
+                /* TMU5 */
+                .dev_id         = "sh_tmu.5",
+                .con_id         = "tmu_fck",
+                .clk            = &mstp_clks[HWBLK_TMU1],
+        },
         CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
-        CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]),
-        CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]),
-        CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[HWBLK_MERAM]),
+        {
+                /* SCIF0 */
+                .dev_id         = "sh-sci.0",
+                .con_id         = "sci_fck",
+                .clk            = &mstp_clks[HWBLK_SCIF0],
+        }, {
+                /* SCIF1 */
+                .dev_id         = "sh-sci.1",
+                .con_id         = "sci_fck",
+                .clk            = &mstp_clks[HWBLK_SCIF1],
+        }, {
+                /* SCIF2 */
+                .dev_id         = "sh-sci.2",
+                .con_id         = "sci_fck",
+                .clk            = &mstp_clks[HWBLK_SCIF2],
+        }, {
+                /* SCIF3 */
+                .dev_id         = "sh-sci.3",
+                .con_id         = "sci_fck",
+                .clk            = &mstp_clks[HWBLK_SCIF3],
+        }, {
+                /* SCIF4 */
+                .dev_id         = "sh-sci.4",
+                .con_id         = "sci_fck",
+                .clk            = &mstp_clks[HWBLK_SCIF4],
+        }, {
+                /* SCIF5 */
+                .dev_id         = "sh-sci.5",
+                .con_id         = "sci_fck",
+                .clk            = &mstp_clks[HWBLK_SCIF5],
+        },
+        CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
+        CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
+        CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
         CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
         CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
@@ -251,34 +311,19 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
         CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
         CLKDEV_CON_ID("icb0", &mstp_clks[HWBLK_ICB]),
-        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
-        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
-        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
+        CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
+        CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
+        CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
         CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB]),
         CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
-        CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]),
+        CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
         CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU2H1]),
-        CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
+        CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
         CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
-        CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]),
+        CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
         CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
         CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
-
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
-
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
-
-        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
+        CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
 };
 
 int __init arch_clk_init(void)
@@ -311,7 +356,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
 
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
+                ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 5f30f805d2f..8668f557e0a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -23,8 +23,8 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/clkdev.h>
-#include <linux/sh_clk.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
 #include <cpu/sh7724.h>
 
 /* SH7724 registers */
@@ -35,9 +35,6 @@
 #define FCLKBCR         0xa415000c
 #define IRDACLKCR       0xa4150018
 #define PLLCR           0xa4150024
-#define MSTPCR0         0xa4150030
-#define MSTPCR1         0xa4150034
-#define MSTPCR2         0xa4150038
 #define SPUCLKCR        0xa415003c
 #define FLLFRQ          0xa4150050
 #define LSTATS          0xa4150060
@@ -70,7 +67,7 @@ static unsigned long fll_recalc(struct clk *clk)
         return (clk->parent->rate * mult) / div;
 }
 
-static struct sh_clk_ops fll_clk_ops = {
+static struct clk_ops fll_clk_ops = {
         .recalc         = fll_recalc,
 };
 
@@ -90,7 +87,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return clk->parent->rate * mult;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -105,7 +102,7 @@ static unsigned long div3_recalc(struct clk *clk)
         return clk->parent->rate / 3;
 }
 
-static struct sh_clk_ops div3_clk_ops = {
+static struct clk_ops div3_clk_ops = {
         .recalc         = div3_recalc,
 };
 
@@ -114,16 +111,13 @@ static struct clk div3_clk = {
         .parent         = &pll_clk,
 };
 
-/* External input clock (pin name: FSIMCKA/FSIMCKB/DV_CLKI ) */
+/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
 struct clk sh7724_fsimcka_clk = {
 };
 
 struct clk sh7724_fsimckb_clk = {
 };
 
-struct clk sh7724_dv_clki = {
-};
-
 static struct clk *main_clks[] = {
         &r_clk,
         &extal_clk,
@@ -132,7 +126,6 @@ static struct clk *main_clks[] = {
         &div3_clk,
         &sh7724_fsimcka_clk,
         &sh7724_fsimckb_clk,
-        &sh7724_dv_clki,
 };
 
 static void div4_kick(struct clk *clk)
@@ -170,20 +163,17 @@ struct clk div4_clks[DIV4_NR] = {
         [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
 };
 
-enum { DIV6_V, DIV6_I, DIV6_S, DIV6_FA, DIV6_FB, DIV6_NR };
+enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
 
-/* Indices are important - they are the actual src selecting values */
-static struct clk *common_parent[] = {
-        [0] = &div3_clk,
-        [1] = NULL,
+static struct clk div6_clks[DIV6_NR] = {
+        [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
+        [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
+        [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
 };
 
-static struct clk *vclkcr_parent[8] = {
-        [0] = &div3_clk,
-        [2] = &sh7724_dv_clki,
-        [4] = &extal_clk,
-};
+enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
 
+/* Indices are important - they are the actual src selecting values */
 static struct clk *fclkacr_parent[] = {
         [0] = &div3_clk,
         [1] = NULL,
@@ -198,74 +188,68 @@ static struct clk *fclkbcr_parent[] = {
         [3] = NULL,
 };
 
-static struct clk div6_clks[DIV6_NR] = {
-        [DIV6_V] = SH_CLK_DIV6_EXT(VCLKCR, 0,
-                        vclkcr_parent, ARRAY_SIZE(vclkcr_parent), 12, 3),
-        [DIV6_I] = SH_CLK_DIV6_EXT(IRDACLKCR, 0,
-                        common_parent, ARRAY_SIZE(common_parent), 6, 1),
-        [DIV6_S] = SH_CLK_DIV6_EXT(SPUCLKCR, CLK_ENABLE_ON_INIT,
-                        common_parent, ARRAY_SIZE(common_parent), 6, 1),
-        [DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, 0,
+static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
+        [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0,
                                       fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
-        [DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, 0,
+        [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0,
                                       fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2),
 };
 
 static struct clk mstp_clks[HWBLK_NR] = {
-        [HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I],     MSTPCR0, 31, CLK_ENABLE_ON_INIT),
-        [HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I],      MSTPCR0, 30, CLK_ENABLE_ON_INIT),
-        [HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I],      MSTPCR0, 29, CLK_ENABLE_ON_INIT),
-        [HWBLK_RSMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 28, CLK_ENABLE_ON_INIT),
-        [HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I],   MSTPCR0, 27, CLK_ENABLE_ON_INIT),
-        [HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH],    MSTPCR0, 26, CLK_ENABLE_ON_INIT),
-        [HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I],     MSTPCR0, 24, CLK_ENABLE_ON_INIT),
-        [HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 22, CLK_ENABLE_ON_INIT),
-        [HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 21, 0),
-        [HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT),
-        [HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 19, 0),
-        [HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I],     MSTPCR0, 17, 0),
-        [HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 15, 0),
-        [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk,                 MSTPCR0, 14, 0),
-        [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk,                MSTPCR0, 13, 0),
-        [HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 12, 0),
-        [HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 10, 0),
-        [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P],   MSTPCR0, 9, 0),
-        [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P],   MSTPCR0, 8, 0),
-        [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P],   MSTPCR0, 7, 0),
-        [HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 6, 0),
-        [HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 5, 0),
-        [HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 4, 0),
-        [HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 2, 0),
-        [HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 1, 0),
-
-        [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk,               MSTPCR1, 12, 0),
-        [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk,                 MSTPCR1, 11, 0),
-        [HWBLK_IIC0] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR1, 9, 0),
-        [HWBLK_IIC1] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR1, 8, 0),
-
-        [HWBLK_MMC] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 29, 0),
-        [HWBLK_ETHER] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR2, 28, 0),
-        [HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR2, 26, 0),
-        [HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 25, 0),
-        [HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR2, 24, 0),
-        [HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 22, 0),
-        [HWBLK_USB1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 21, 0),
-        [HWBLK_USB0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 20, 0),
-        [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 19, 0),
-        [HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR2, 18, 0),
-        [HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR2, 17, 0),
-        [HWBLK_VEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 15, 0),
-        [HWBLK_CEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 13, 0),
-        [HWBLK_BEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 12, 0),
-        [HWBLK_2DDMAC] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 10, 0),
-        [HWBLK_SPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 9, 0),
-        [HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 6, 0),
-        [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 5, 0),
-        [HWBLK_BEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 4, 0),
-        [HWBLK_CEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 3, 0),
-        [HWBLK_VEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 2, 0),
-        [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B],     MSTPCR2, 1, 0),
-        [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 0, 0),
+        SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_RSMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_P], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
+        SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
+
+        SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
+        SH_HWBLK_CLK(HWBLK_IIC0, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_IIC1, &div4_clks[DIV4_P], 0),
+
+        SH_HWBLK_CLK(HWBLK_MMC, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_ETHER, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
+        SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_USB1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_USB0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VEU1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_CEU1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_BEU1, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_2DDMAC, &div4_clks[DIV4_SH], 0),
+        SH_HWBLK_CLK(HWBLK_SPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_BEU0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_CEU0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VEU0, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
+        SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
 };
 
 static struct clk_lookup lookups[] = {
@@ -285,8 +269,8 @@ static struct clk_lookup lookups[] = {
 
         /* DIV6 clocks */
         CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
-        CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
-        CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
+        CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
+        CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
         CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
         CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
 
@@ -299,7 +283,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
         CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
         CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
-        CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),
+        CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
         CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
         CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
         CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
@@ -310,47 +294,47 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
 
         CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
-        CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
-        CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
+        CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
+        CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
 
         CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
         CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
-        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
-        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
-        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
-        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
-        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
-        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
-
-        CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]),
-        CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]),
-        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
+        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
+
+        CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
+        CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
+        CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
         CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]),
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]),
-        CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]),
-        CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[HWBLK_ETHER]),
+        CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]),
+        CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]),
         CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
         CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
         CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
         CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
-        CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[HWBLK_USB1]),
-        CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[HWBLK_USB0]),
+        CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]),
+        CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]),
         CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
-        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
-        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
+        CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
+        CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
         CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]),
-        CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[HWBLK_CEU1]),
+        CLKDEV_CON_ID("ceu1", &mstp_clks[HWBLK_CEU1]),
         CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
         CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
-        CLKDEV_DEV_ID("sh_fsi.0", &mstp_clks[HWBLK_SPU]),
+        CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]),
         CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
-        CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
+        CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
         CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
-        CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU0]),
+        CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU0]),
         CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]),
         CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
-        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
+        CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
 };
 
 int __init arch_clk_init(void)
@@ -372,10 +356,13 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
 
         if (!ret)
-                ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
+                ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+
+        if (!ret)
+                ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
 
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
+                ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
deleted file mode 100644
index deb683abacf..00000000000
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * arch/sh/kernel/cpu/sh4a/clock-sh7734.c
- *
- * Clock framework for SH7734
- *
- * Copyright (C) 2011, 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- * Copyright (C) 2011, 2012 Renesas Solutions Corp.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/clkdev.h>
-#include <linux/delay.h>
-#include <asm/clock.h>
-#include <asm/freq.h>
-
-static struct clk extal_clk = {
-        .rate       = 33333333,
-};
-
-#define MODEMR          (0xFFCC0020)
-#define MODEMR_MASK     (0x6)
-#define MODEMR_533MHZ   (0x2)
-
-static unsigned long pll_recalc(struct clk *clk)
-{
-        int mode = 12;
-        u32 r = __raw_readl(MODEMR);
-
-        if ((r & MODEMR_MASK) & MODEMR_533MHZ)
-                mode = 16;
-
-        return clk->parent->rate * mode;
-}
-
-static struct sh_clk_ops pll_clk_ops = {
-        .recalc         = pll_recalc,
-};
-
-static struct clk pll_clk = {
-        .ops        = &pll_clk_ops,
-        .parent     = &extal_clk,
-        .flags      = CLK_ENABLE_ON_INIT,
-};
-
-static struct clk *main_clks[] = {
-        &extal_clk,
-        &pll_clk,
-};
-
-static int multipliers[] = { 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
-static int divisors[] = { 1, 3, 2, 3, 4, 6, 8, 9, 12, 16, 18, 24 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
-        .divisors = divisors,
-        .nr_divisors = ARRAY_SIZE(divisors),
-        .multipliers = multipliers,
-        .nr_multipliers = ARRAY_SIZE(multipliers),
-};
-
-static struct clk_div4_table div4_table = {
-        .div_mult_table = &div4_div_mult_table,
-};
-
-enum { DIV4_I, DIV4_S, DIV4_B, DIV4_M, DIV4_S1, DIV4_P, DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
-        SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
-
-struct clk div4_clks[DIV4_NR] = {
-        [DIV4_I] = DIV4(FRQMR1, 28, 0x0003, CLK_ENABLE_ON_INIT),
-        [DIV4_S] = DIV4(FRQMR1, 20, 0x000C, CLK_ENABLE_ON_INIT),
-        [DIV4_B] = DIV4(FRQMR1, 16, 0x0140, CLK_ENABLE_ON_INIT),
-        [DIV4_M] = DIV4(FRQMR1, 12, 0x0004, CLK_ENABLE_ON_INIT),
-        [DIV4_S1] = DIV4(FRQMR1, 4, 0x0030, CLK_ENABLE_ON_INIT),
-        [DIV4_P] = DIV4(FRQMR1, 0, 0x0140, CLK_ENABLE_ON_INIT),
-};
-
-#define MSTPCR0 0xFFC80030
-#define MSTPCR1 0xFFC80034
-#define MSTPCR3 0xFFC8003C
-
-enum {
-        MSTP030, MSTP029, /* IIC */
-        MSTP026, MSTP025, MSTP024, /* SCIF */
-        MSTP023,
-        MSTP022, MSTP021,
-        MSTP019, /* HSCIF */
-        MSTP016, MSTP015, MSTP014, /* TMU / TIMER */
-        MSTP012, MSTP011, MSTP010, MSTP009, MSTP008, /* SSI */
-        MSTP007, /* HSPI */
-        MSTP115, /* ADMAC */
-        MSTP114, /* GETHER */
-        MSTP111, /* DMAC */
-        MSTP109, /* VIDEOIN1 */
-        MSTP108, /* VIDEOIN0 */
-        MSTP107, /* RGPVBG */
-        MSTP106, /* 2DG */
-        MSTP103, /* VIEW */
-        MSTP100, /* USB */
-        MSTP331, /* MMC */
-        MSTP330, /* MIMLB */
-        MSTP323, /* SDHI0 */
-        MSTP322, /* SDHI1 */
-        MSTP321, /* SDHI2 */
-        MSTP320, /* RQSPI */
-        MSTP319, /* SRC0 */
-        MSTP318, /* SRC1 */
-        MSTP317, /* RSPI */
-        MSTP316, /* RCAN0 */
-        MSTP315, /* RCAN1 */
-        MSTP314, /* FLTCL */
-        MSTP313, /* ADC */
-        MSTP312, /* MTU */
-        MSTP304, /* IE-BUS */
-        MSTP303, /* RTC */
-        MSTP302, /* HIF */
-        MSTP301, /* STIF0 */
-        MSTP300, /* STIF1 */
-        MSTP_NR };
-
-static struct clk mstp_clks[MSTP_NR] = {
-        /* MSTPCR0 */
-        [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0),
-        [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0),
-        [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0),
-        [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0),
-        [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0),
-        [MSTP023] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
-        [MSTP022] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
-        [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
-        [MSTP019] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0),
-        [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0),
-        [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
-        [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0),
-        [MSTP012] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 12, 0),
-        [MSTP011] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 11, 0),
-        [MSTP010] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
-        [MSTP009] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
-        [MSTP008] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
-        [MSTP007] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
-
-        /* MSTPCR1 */
-        [MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0),
-        [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
-        [MSTP111] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 11, 0),
-        [MSTP109] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
-        [MSTP108] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0),
-        [MSTP107] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 7, 0),
-        [MSTP106] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 6, 0),
-        [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0),
-        [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0),
-
-        /* MSTPCR3 */
-        [MSTP331] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 31, 0),
-        [MSTP330] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 30, 0),
-        [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 23, 0),
-        [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0),
-        [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0),
-        [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0),
-        [MSTP319] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 19, 0),
-        [MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 18, 0),
-        [MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 17, 0),
-        [MSTP316] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 16, 0),
-        [MSTP315] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 15, 0),
-        [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 14, 0),
-        [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 13, 0),
-        [MSTP312] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 12, 0),
-        [MSTP304] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3,  4, 0),
-        [MSTP303] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3,  3, 0),
-        [MSTP302] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3,  2, 0),
-        [MSTP301] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3,  1, 0),
-        [MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3,  0, 0),
-};
-
-static struct clk_lookup lookups[] = {
-        /* main clocks */
-        CLKDEV_CON_ID("extal", &extal_clk),
-        CLKDEV_CON_ID("pll_clk", &pll_clk),
-
-        /* clocks */
-        CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
-        CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_S]),
-        CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_M]),
-        CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
-        CLKDEV_CON_ID("shyway_clk1", &div4_clks[DIV4_S1]),
-        CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
-
-        /* MSTP32 clocks */
-        CLKDEV_DEV_ID("i2c-sh7734.0", &mstp_clks[MSTP030]),
-        CLKDEV_DEV_ID("i2c-sh7734.1", &mstp_clks[MSTP029]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP026]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP025]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP024]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP023]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP022]),
-        CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP021]),
-        CLKDEV_CON_ID("hscif", &mstp_clks[MSTP019]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP016]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP016]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP016]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP015]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP014]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP014]),
-        CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP014]),
-        CLKDEV_CON_ID("ssi0", &mstp_clks[MSTP012]),
-        CLKDEV_CON_ID("ssi1", &mstp_clks[MSTP011]),
-        CLKDEV_CON_ID("ssi2", &mstp_clks[MSTP010]),
-        CLKDEV_CON_ID("ssi3", &mstp_clks[MSTP009]),
-        CLKDEV_CON_ID("sss", &mstp_clks[MSTP008]),
-        CLKDEV_CON_ID("hspi", &mstp_clks[MSTP007]),
-        CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP100]),
-        CLKDEV_CON_ID("videoin0", &mstp_clks[MSTP109]),
-        CLKDEV_CON_ID("videoin1", &mstp_clks[MSTP108]),
-        CLKDEV_CON_ID("rgpvg", &mstp_clks[MSTP107]),
-        CLKDEV_CON_ID("2dg", &mstp_clks[MSTP106]),
-        CLKDEV_CON_ID("view", &mstp_clks[MSTP103]),
-
-        CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP331]),
-        CLKDEV_CON_ID("mimlb0", &mstp_clks[MSTP330]),
-        CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP323]),
-        CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP322]),
-        CLKDEV_CON_ID("sdhi2", &mstp_clks[MSTP321]),
-        CLKDEV_CON_ID("rqspi0", &mstp_clks[MSTP320]),
-        CLKDEV_CON_ID("src0", &mstp_clks[MSTP319]),
-        CLKDEV_CON_ID("src1", &mstp_clks[MSTP318]),
-        CLKDEV_CON_ID("rsp0", &mstp_clks[MSTP317]),
-        CLKDEV_CON_ID("rcan0", &mstp_clks[MSTP316]),
-        CLKDEV_CON_ID("rcan1", &mstp_clks[MSTP315]),
-        CLKDEV_CON_ID("fltcl0", &mstp_clks[MSTP314]),
-        CLKDEV_CON_ID("adc0", &mstp_clks[MSTP313]),
-        CLKDEV_CON_ID("mtu0", &mstp_clks[MSTP312]),
-        CLKDEV_CON_ID("iebus0", &mstp_clks[MSTP304]),
-        CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[MSTP114]),
-        CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP303]),
-        CLKDEV_CON_ID("hif0", &mstp_clks[MSTP302]),
-        CLKDEV_CON_ID("stif0", &mstp_clks[MSTP301]),
-        CLKDEV_CON_ID("stif1", &mstp_clks[MSTP300]),
-};
-
-int __init arch_clk_init(void)
-{
-        int i, ret = 0;
-
-        for (i = 0; i < ARRAY_SIZE(main_clks); i++)
-                ret |= clk_register(main_clks[i]);
-
-        for (i = 0; i < ARRAY_SIZE(lookups); i++)
-                clkdev_add(&lookups[i]);
-
-        if (!ret)
-                ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
-                        &div4_table);
-
-        if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
-        return ret;
-}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index e84a43229b9..3b097b09a3b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -33,7 +33,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return clk->parent->rate * multiplier;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -79,7 +79,7 @@ struct clk div4_clks[DIV4_NR] = {
 #define MSTPCR1         0xffc80034
 #define MSTPCR2         0xffc10028
 
-enum { MSTP004, MSTP000, MSTP127, MSTP114, MSTP113, MSTP112,
+enum { MSTP004, MSTP000, MSTP114, MSTP113, MSTP112,
        MSTP111, MSTP110, MSTP103, MSTP102, MSTP220,
        MSTP_NR };
 
@@ -89,7 +89,6 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
 
         /* MSTPCR1 */
-        [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 27, 0),
         [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
         [MSTP113] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 13, 0),
         [MSTP112] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 12, 0),
@@ -113,15 +112,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
 
         /* MSTP32 clocks */
-        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP004]),
-        CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic5", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),
-        CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),
+        CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]),
+        CLKDEV_CON_ID("riic", &mstp_clks[MSTP000]),
 
         CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP113]),
         CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP114]),
@@ -129,10 +121,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP111]),
         CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]),
 
-        CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP103]),
-        CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP102]),
+        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]),
         CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]),
-        CLKDEV_CON_ID("rspi2", &mstp_clks[MSTP127]),
 };
 
 int __init arch_clk_init(void)
@@ -148,7 +138,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
                                            &div4_table);
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 7707e35aea4..2d4c7fd79c0 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -27,7 +27,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
 }
 
-static struct sh_clk_ops sh7763_master_clk_ops = {
+static struct clk_ops sh7763_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -37,7 +37,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / p0fc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7763_module_clk_ops = {
+static struct clk_ops sh7763_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -47,22 +47,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / bfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7763_bus_clk_ops = {
+static struct clk_ops sh7763_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static struct sh_clk_ops sh7763_cpu_clk_ops = {
+static struct clk_ops sh7763_cpu_clk_ops = {
         .recalc         = followparent_recalc,
 };
 
-static struct sh_clk_ops *sh7763_clk_ops[] = {
+static struct clk_ops *sh7763_clk_ops[] = {
         &sh7763_master_clk_ops,
         &sh7763_module_clk_ops,
         &sh7763_bus_clk_ops,
         &sh7763_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7763_clk_ops))
                 *ops = sh7763_clk_ops[idx];
@@ -74,7 +74,7 @@ static unsigned long shyway_clk_recalc(struct clk *clk)
         return clk->parent->rate / cfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7763_shyway_clk_ops = {
+static struct clk_ops sh7763_shyway_clk_ops = {
         .recalc         = shyway_clk_recalc,
 };
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index 5d36f334bb0..9e3354365d4 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -24,7 +24,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
 }
 
-static struct sh_clk_ops sh7770_master_clk_ops = {
+static struct clk_ops sh7770_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -34,7 +34,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7770_module_clk_ops = {
+static struct clk_ops sh7770_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -44,7 +44,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / bfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7770_bus_clk_ops = {
+static struct clk_ops sh7770_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -54,18 +54,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7770_cpu_clk_ops = {
+static struct clk_ops sh7770_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7770_clk_ops[] = {
+static struct clk_ops *sh7770_clk_ops[] = {
         &sh7770_master_clk_ops,
         &sh7770_module_clk_ops,
         &sh7770_bus_clk_ops,
         &sh7770_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7770_clk_ops))
                 *ops = sh7770_clk_ops[idx];
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 793dae42a2f..3b53348fe2f 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -27,7 +27,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
 }
 
-static struct sh_clk_ops sh7780_master_clk_ops = {
+static struct clk_ops sh7780_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -37,7 +37,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7780_module_clk_ops = {
+static struct clk_ops sh7780_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -47,7 +47,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / bfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7780_bus_clk_ops = {
+static struct clk_ops sh7780_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -57,18 +57,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7780_cpu_clk_ops = {
+static struct clk_ops sh7780_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh7780_clk_ops[] = {
+static struct clk_ops *sh7780_clk_ops[] = {
         &sh7780_master_clk_ops,
         &sh7780_module_clk_ops,
         &sh7780_bus_clk_ops,
         &sh7780_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         if (idx < ARRAY_SIZE(sh7780_clk_ops))
                 *ops = sh7780_clk_ops[idx];
@@ -80,7 +80,7 @@ static unsigned long shyway_clk_recalc(struct clk *clk)
         return clk->parent->rate / cfc_divisors[idx];
 }
 
-static struct sh_clk_ops sh7780_shyway_clk_ops = {
+static struct clk_ops sh7780_shyway_clk_ops = {
         .recalc         = shyway_clk_recalc,
 };
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 1c83788db76..e5b420cc126 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -36,7 +36,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return clk->parent->rate * multiplier;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -156,7 +156,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
         CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
         CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
-        CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP117]),
+        CLKDEV_CON_ID("ubc_fck", &mstp_clks[MSTP117]),
         CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
         CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
         CLKDEV_CON_ID("gdta_fck", &mstp_clks[MSTP100]),
@@ -175,7 +175,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
                                            &div4_table);
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 8bba6f15902..f6c0c3d5599 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -38,7 +38,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return clk->parent->rate * multiplier;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -194,7 +194,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
                                            &div4_table);
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index a9422dab0ce..bf2d00b8b90 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -32,7 +32,7 @@ static unsigned long pll_recalc(struct clk *clk)
         return clk->parent->rate * 72;
 }
 
-static struct sh_clk_ops pll_clk_ops = {
+static struct clk_ops pll_clk_ops = {
         .recalc         = pll_recalc,
 };
 
@@ -149,7 +149,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
                                            &div4_table);
         if (!ret)
-                ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c
deleted file mode 100644
index eed3b9d19d3..00000000000
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c
+++ /dev/null
@@ -1,2497 +0,0 @@
-/*
- * SH7734 processor support - PFC hardware block
- *
- * Copyright (C) 2012  Renesas Solutions Corp.
- * Copyright (C) 2012  Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <linux/ioport.h>
-#include <cpu/sh7734.h>
-
-#define CPU_32_PORT(fn, pfx, sfx)                               \
-        PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),        \
-        PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),     \
-        PORT_1(fn, pfx##31, sfx)
-
-#define CPU_32_PORT5(fn, pfx, sfx)                              \
-        PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),       \
-        PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),       \
-        PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),       \
-        PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),       \
-        PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx),       \
-        PORT_1(fn, pfx##10, sfx), PORT_1(fn, pfx##11, sfx)
-
-/* GPSR0 - GPSR5 */
-#define CPU_ALL_PORT(fn, pfx, sfx)                              \
-        CPU_32_PORT(fn, pfx##_0_, sfx),                 \
-        CPU_32_PORT(fn, pfx##_1_, sfx),                         \
-        CPU_32_PORT(fn, pfx##_2_, sfx),                         \
-        CPU_32_PORT(fn, pfx##_3_, sfx),                         \
-        CPU_32_PORT(fn, pfx##_4_, sfx),                         \
-        CPU_32_PORT5(fn, pfx##_5_, sfx)
-
-#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
-#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,    \
-                                       GP##pfx##_IN, GP##pfx##_OUT)
-
-#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
-#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
-
-#define GP_ALL(str)     CPU_ALL_PORT(_PORT_ALL, GP, str)
-#define PINMUX_GPIO_GP_ALL()    CPU_ALL_PORT(_GP_GPIO, , unused)
-#define PINMUX_DATA_GP_ALL()    CPU_ALL_PORT(_GP_DATA, , unused)
-
-#define PORT_10_REV(fn, pfx, sfx)       \
-        PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),       \
-        PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),       \
-        PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),       \
-        PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),       \
-        PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
-
-#define CPU_32_PORT_REV(fn, pfx, sfx)   \
-        PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),     \
-        PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),     \
-        PORT_10_REV(fn, pfx, sfx)
-
-#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
-#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
-
-#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
-#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
-                                                          FN_##ipsr, FN_##fn)
-
-enum {
-        PINMUX_RESERVED = 0,
-
-        PINMUX_DATA_BEGIN,
-        GP_ALL(DATA), /* GP_0_0_DATA -> GP_5_11_DATA */
-        PINMUX_DATA_END,
-
-        PINMUX_INPUT_BEGIN,
-        GP_ALL(IN), /* GP_0_0_IN -> GP_5_11_IN */
-        PINMUX_INPUT_END,
-
-        PINMUX_OUTPUT_BEGIN,
-        GP_ALL(OUT), /* GP_0_0_OUT -> GP_5_11_OUT */
-        PINMUX_OUTPUT_END,
-
-        PINMUX_FUNCTION_BEGIN,
-        GP_ALL(FN), /* GP_0_0_FN -> GP_5_11_FN */
-
-        /* GPSR0 */
-        FN_IP1_9_8, FN_IP1_11_10, FN_IP1_13_12, FN_IP1_15_14,
-        FN_IP0_7_6, FN_IP0_9_8, FN_IP0_11_10, FN_IP0_13_12,
-        FN_IP0_15_14, FN_IP0_17_16, FN_IP0_19_18, FN_IP0_21_20,
-        FN_IP0_23_22, FN_IP0_25_24, FN_IP0_27_26, FN_IP0_29_28,
-        FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4,
-        FN_IP1_7_6, FN_IP11_28, FN_IP0_1_0, FN_IP0_3_2,
-        FN_IP0_5_4, FN_IP1_17_16, FN_IP1_19_18, FN_IP1_22_20,
-        FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0,
-
-        /* GPSR1 */
-        FN_IP3_20, FN_IP3_29_27, FN_IP11_20_19, FN_IP11_22_21,
-        FN_IP2_16_14, FN_IP2_19_17, FN_IP2_22_20, FN_IP2_24_23,
-        FN_IP2_27_25, FN_IP2_30_28, FN_IP3_1_0, FN_CLKOUT,
-        FN_BS, FN_CS0, FN_IP3_2, FN_EX_CS0,
-        FN_IP3_5_3, FN_IP3_8_6, FN_IP3_11_9, FN_IP3_14_12,
-        FN_IP3_17_15, FN_RD, FN_IP3_19_18, FN_WE0,
-        FN_WE1, FN_IP2_4_3, FN_IP3_23_21, FN_IP3_26_24,
-        FN_IP2_7_5, FN_IP2_10_8, FN_IP2_13_11, FN_IP11_25_23,
-
-        /* GPSR2 */
-        FN_IP11_6_4, FN_IP11_9_7, FN_IP11_11_10, FN_IP4_2_0,
-        FN_IP8_29_28, FN_IP11_27_26, FN_IP8_22_20, FN_IP8_25_23,
-        FN_IP11_12, FN_IP8_27_26, FN_IP4_5_3, FN_IP4_8_6,
-        FN_IP4_11_9, FN_IP4_14_12, FN_IP4_17_15, FN_IP4_19_18,
-        FN_IP4_21_20, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,
-        FN_IP4_29_28, FN_IP4_31_30, FN_IP5_2_0, FN_IP5_5_3,
-        FN_IP5_8_6, FN_IP5_11_9, FN_IP5_14_12, FN_IP5_17_15,
-        FN_IP5_20_18, FN_IP5_22_21, FN_IP5_24_23, FN_IP5_26_25,
-
-        /* GPSR3 */
-        FN_IP6_2_0, FN_IP6_5_3, FN_IP6_7_6, FN_IP6_9_8,
-        FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, FN_IP6_17_16,
-        FN_IP6_20_18, FN_IP6_23_21, FN_IP7_2_0, FN_IP7_5_3,
-        FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15,
-        FN_IP7_20_18, FN_IP7_23_21, FN_IP7_26_24, FN_IP7_28_27,
-        FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,
-        FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12,
-        FN_IP8_15_14, FN_IP8_17_16, FN_IP8_19_18, FN_IP9_1_0,
-
-        /* GPSR4 */
-        FN_IP9_19_18, FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24,
-        FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14, FN_IP9_17_16,
-        FN_IP9_3_2, FN_IP9_5_4, FN_IP9_7_6, FN_IP9_9_8,
-        FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3,
-        FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_15,
-        FN_IP10_18_16, FN_IP10_21_19, FN_IP11_0, FN_IP11_1,
-        FN_SCL0, FN_IP11_2, FN_PENC0, FN_IP11_15_13, /* Need check*/
-        FN_USB_OVC0, FN_IP11_18_16,
-        FN_IP10_22, FN_IP10_24_23,
-
-        /* GPSR5 */
-        FN_IP10_25, FN_IP11_3, FN_IRQ2_B, FN_IRQ3_B,
-        FN_IP10_27_26, /* 10 */
-        FN_IP10_29_28, /* 11 */
-
-        /* IPSR0 */
-        FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A, FN_TIOC3D_C,
-        FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C,
-        FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C,
-        FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C,
-        FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C,
-        FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C,
-        FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C,
-        FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C,
-        FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C,
-        FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C,
-        FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C,
-        FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C,
-        FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C,
-        FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C,
-        FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C,
-        FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C,
-
-        /* IPSR1 */
-        FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6, FN_FD3_A,
-        FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5, FN_FD2_A,
-        FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4, FN_FD1_A,
-        FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3, FN_FD0_A,
-        FN_A25, FN_TX2_D, FN_ST1_D2,
-        FN_A24, FN_RX2_D, FN_ST1_D1,
-        FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A,
-        FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A,
-        FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A,
-        FN_A20, FN_ST1_REQ, FN_LCD_FLM_A,
-        FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A,     FN_TIOC4D_C,
-        FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C,
-        FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A, FN_TIOC4B_C,
-        FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C,
-
-        /* IPSR2 */
-        FN_D14, FN_TX2_B, FN_FSE_A, FN_ET0_TX_CLK_B,
-        FN_D13, FN_RX2_B, FN_FRB_A,     FN_ET0_ETXD6_B,
-        FN_D12, FN_FWE_A, FN_ET0_ETXD5_B,
-        FN_D11, FN_RSPI_MISO_A, FN_QMI_QIO1_A, FN_FRE_A,
-                FN_ET0_ETXD3_B,
-        FN_D10, FN_RSPI_MOSI_A, FN_QMO_QIO0_A, FN_FALE_A,
-                FN_ET0_ETXD2_B,
-        FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A, FN_FCLE_A,
-                FN_ET0_ETXD1_B,
-        FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A, FN_FCE_A,
-                FN_ET0_GTX_CLK_B,
-        FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A, FN_FD7_A,
-        FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A, FN_FD6_A,
-        FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A,
-        FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7, FN_FD4_A,
-
-        /* IPSR3 */
-        FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A, FN_ET0_ETXD7,
-        FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C,
-                FN_ET0_MAGIC_C, FN_ET0_ETXD6_A,
-        FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C,
-                FN_ET0_LINK_C, FN_ET0_ETXD5_A,
-        FN_EX_WAIT0, FN_TCLK1_B,
-        FN_RD_WR, FN_TCLK0, FN_CAN_CLK_B, FN_ET0_ETXD4,
-        FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B, FN_ET0_ETXD3_A,
-        FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B, FN_ET0_ETXD2_A,
-        FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B, FN_ET0_ETXD1_A,
-        FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B, FN_ET0_GTX_CLK_A,
-        FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B, FN_ET0_ETXD0,
-        FN_CS1_A26, FN_QIO3_B,
-        FN_D15, FN_SCK2_B,
-
-        /* IPSR4 */
-        FN_SCK2_A, FN_VI0_G3,
-        FN_RTS1_B, FN_VI0_G2,
-        FN_CTS1_B, FN_VI0_DATA7_VI0_G1,
-        FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A,
-        FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A,
-        FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A,
-        FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A,
-        FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A, FN_ET0_MDC,
-        FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A, FN_ET0_COL,
-        FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A, FN_ET0_CRS,
-        FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A, FN_ET0_RX_ER,
-        FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A, FN_ET0_RX_DV,
-        FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A, FN_ET0_ERXD7,
-
-        /* IPSR5 */
-        FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, FN_ET0_RX_CLK_B,
-        FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, FN_ET0_ERXD2_B,
-        FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, FN_ET0_ERXD3_B,
-        FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, FN_ET0_MDIO_B,
-        FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, FN_ET0_LINK_B,
-        FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, FN_ET0_MAGIC_B,
-        FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, FN_ET0_PHY_INT_B,
-        FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5,
-        FN_REF125CK, FN_ADTRG, FN_RX5_C,
-        FN_REF50CK, FN_CTS1_E, FN_HCTS0_D,
-
-        /* IPSR6 */
-        FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A, FN_TCLKA_A, FN_HIFD00,
-        FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A, FN_TCLKB_A, FN_HIFD01,
-        FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02,
-        FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03,
-        FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04,
-        FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05,
-        FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06,
-        FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07,
-        FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A, FN_TIOC1A_A, FN_HIFD08,
-        FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A, FN_HIFD09,
-
-        /* IPSR7 */
-        FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A, FN_HIFD10,
-        FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A, FN_HIFD11,
-        FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A, FN_HIFD12,
-        FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A, FN_HIFD13,
-        FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A, FN_HIFD14,
-        FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A, FN_HIFD15,
-        FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A, FN_HIFCS,
-        FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A, FN_HIFRS,
-        FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A, FN_HIFWR,
-        FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD,
-        FN_DU0_DB4, FN_HIFINT,
-
-        /* IPSR8 */
-        FN_DU0_DB5, FN_HIFDREQ,
-        FN_DU0_DB6, FN_HIFRDY,
-        FN_DU0_DB7, FN_SSI_SCK0_B, FN_HIFEBL_B,
-        FN_DU0_DOTCLKIN, FN_HSPI_CS0_C, FN_SSI_WS0_B,
-        FN_DU0_DOTCLKOUT, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B,
-        FN_DU0_EXHSYNC_DU0_HSYNC, FN_HSPI_TX0_C, FN_SSI_SCK1_B,
-        FN_DU0_EXVSYNC_DU0_VSYNC, FN_HSPI_RX0_C, FN_SSI_WS1_B,
-        FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B, FN_SSI_SDATA1_B,
-        FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B,
-        FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B,
-        FN_IRQ0_A, FN_HSPI_TX_B, FN_RX3_E, FN_ET0_ERXD0,
-        FN_IRQ1_A, FN_HSPI_RX_B, FN_TX3_E, FN_ET0_ERXD1,
-        FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A,
-        FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A,
-
-        /* IPSR9 */
-        FN_VI1_CLK_A, FN_FD0_B, FN_LCD_DATA0_B,
-        FN_VI1_0_A, FN_FD1_B, FN_LCD_DATA1_B,
-        FN_VI1_1_A, FN_FD2_B, FN_LCD_DATA2_B,
-        FN_VI1_2_A, FN_FD3_B, FN_LCD_DATA3_B,
-        FN_VI1_3_A, FN_FD4_B, FN_LCD_DATA4_B,
-        FN_VI1_4_A, FN_FD5_B, FN_LCD_DATA5_B,
-        FN_VI1_5_A, FN_FD6_B, FN_LCD_DATA6_B,
-        FN_VI1_6_A, FN_FD7_B, FN_LCD_DATA7_B,
-        FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B,
-        FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B,
-        FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B,
-        FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B,
-        FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B,
-        FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B,
-        FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B,
-
-        /* IPSR10 */
-        FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B, FN_LCD_DATA15_B,
-        FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B, FN_LCD_DON_B,
-        FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B, FN_LCD_CL1_B,
-        FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B, FN_LCD_CL2_B,
-        FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B, FN_LCD_FLM_B,
-        FN_AUDIO_CLKB_A, FN_LCD_CLK_B,
-        FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B, FN_LCD_VEPWC_B,
-        FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B, FN_LCD_M_DISP_B,
-        FN_CAN_CLK_A, FN_RX4_D,
-        FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK,
-        FN_CAN1_RX_A, FN_IRQ1_B,
-        FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG,
-        FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT,
-
-        /* IPSR11 */
-        FN_SCL1, FN_SCIF_CLK_C,
-        FN_SDA1, FN_RX1_E,
-        FN_SDA0, FN_HIFEBL_A,
-        FN_SDSELF, FN_RTS1_E,
-        FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A, FN_ET0_ERXD4,
-        FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A, FN_ET0_ERXD5,
-        FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6,
-        FN_TX0_A, FN_HSPI_TX_A,
-        FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D, FN_IETX_B,
-        FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D, FN_IERX_B,
-        FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN,
-        FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER,
-        FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C, FN_ET0_TX_CLK_A,
-        FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A,
-        FN_PRESETOUT, FN_ST_CLKOUT,
-
-        /* MOD_SEL1 */
-        FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
-        FN_SEL_RQSPI_0, FN_SEL_RQSPI_1,
-        FN_SEL_VIN1_0, FN_SEL_VIN1_1,
-        FN_SEL_HIF_0, FN_SEL_HIF_1,
-        FN_SEL_RSPI_0, FN_SEL_RSPI_1,
-        FN_SEL_LCDC_0, FN_SEL_LCDC_1,
-        FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2,
-        FN_SEL_ET0_0, FN_SEL_ET0_1,
-        FN_SEL_RMII_0, FN_SEL_RMII_1,
-        FN_SEL_TMU_0, FN_SEL_TMU_1,
-        FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2,
-        FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3,
-        FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1,
-        FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2,
-        FN_SEL_RCAN0_0, FN_SEL_RCAN0_1,
-        FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
-        FN_SEL_SDHI1_0, FN_SEL_SDHI1_1,
-        FN_SEL_SDHI0_0, FN_SEL_SDHI0_1,
-        FN_SEL_SSI1_0, FN_SEL_SSI1_1,
-        FN_SEL_SSI0_0, FN_SEL_SSI0_1,
-        FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1,
-        FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1,
-        FN_SEL_FLCTL_0, FN_SEL_FLCTL_1,
-        FN_SEL_MMC_0, FN_SEL_MMC_1,
-        FN_SEL_INTC_0, FN_SEL_INTC_1,
-
-        /* MOD_SEL2 */
-        FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1,
-        FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1,
-        FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1,
-        FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2,
-        FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2,
-        FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1,
-        FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
-        FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
-        FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
-        FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
-        FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2,
-                FN_SEL_SCIF3_3, FN_SEL_SCIF3_4,
-        FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,
-                FN_SEL_SCIF2_3,
-        FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2,
-                FN_SEL_SCIF1_3, FN_SEL_SCIF1_4,
-        FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2,
-        FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2,
-
-        PINMUX_FUNCTION_END,
-
-        PINMUX_MARK_BEGIN,
-
-        CLKOUT_MARK, BS_MARK, CS0_MARK, EX_CS0_MARK, RD_MARK,
-        WE0_MARK, WE1_MARK,
-
-        SCL0_MARK, PENC0_MARK, USB_OVC0_MARK,
-
-        IRQ2_B_MARK, IRQ3_B_MARK,
-
-        /* IPSR0 */
-        A15_MARK, ST0_VCO_CLKIN_MARK, LCD_DATA15_A_MARK, TIOC3D_C_MARK,
-        A14_MARK, LCD_DATA14_A_MARK, TIOC3C_C_MARK,
-        A13_MARK, LCD_DATA13_A_MARK, TIOC3B_C_MARK,
-        A12_MARK, LCD_DATA12_A_MARK, TIOC3A_C_MARK,
-        A11_MARK, ST0_D7_MARK, LCD_DATA11_A_MARK, TIOC2B_C_MARK,
-        A10_MARK, ST0_D6_MARK, LCD_DATA10_A_MARK, TIOC2A_C_MARK,
-        A9_MARK, ST0_D5_MARK, LCD_DATA9_A_MARK, TIOC1B_C_MARK,
-        A8_MARK, ST0_D4_MARK, LCD_DATA8_A_MARK, TIOC1A_C_MARK,
-        A7_MARK, ST0_D3_MARK, LCD_DATA7_A_MARK, TIOC0D_C_MARK,
-        A6_MARK, ST0_D2_MARK, LCD_DATA6_A_MARK, TIOC0C_C_MARK,
-        A5_MARK, ST0_D1_MARK, LCD_DATA5_A_MARK, TIOC0B_C_MARK,
-        A4_MARK, ST0_D0_MARK, LCD_DATA4_A_MARK, TIOC0A_C_MARK,
-        A3_MARK, ST0_VLD_MARK, LCD_DATA3_A_MARK, TCLKD_C_MARK,
-        A2_MARK, ST0_SYC_MARK, LCD_DATA2_A_MARK, TCLKC_C_MARK,
-        A1_MARK, ST0_REQ_MARK, LCD_DATA1_A_MARK, TCLKB_C_MARK,
-        A0_MARK, ST0_CLKIN_MARK, LCD_DATA0_A_MARK, TCLKA_C_MARK,
-
-        /* IPSR1 */
-        D3_MARK, SD0_DAT3_A_MARK, MMC_D3_A_MARK, ST1_D6_MARK, FD3_A_MARK,
-        D2_MARK, SD0_DAT2_A_MARK, MMC_D2_A_MARK, ST1_D5_MARK, FD2_A_MARK,
-        D1_MARK, SD0_DAT1_A_MARK, MMC_D1_A_MARK, ST1_D4_MARK, FD1_A_MARK,
-        D0_MARK, SD0_DAT0_A_MARK, MMC_D0_A_MARK, ST1_D3_MARK, FD0_A_MARK,
-        A25_MARK, TX2_D_MARK, ST1_D2_MARK,
-        A24_MARK, RX2_D_MARK, ST1_D1_MARK,
-        A23_MARK, ST1_D0_MARK, LCD_M_DISP_A_MARK,
-        A22_MARK, ST1_VLD_MARK, LCD_VEPWC_A_MARK,
-        A21_MARK, ST1_SYC_MARK, LCD_VCPWC_A_MARK,
-        A20_MARK, ST1_REQ_MARK, LCD_FLM_A_MARK,
-        A19_MARK, ST1_CLKIN_MARK, LCD_CLK_A_MARK,       TIOC4D_C_MARK,
-        A18_MARK, ST1_PWM_MARK, LCD_CL2_A_MARK, TIOC4C_C_MARK,
-        A17_MARK, ST1_VCO_CLKIN_MARK, LCD_CL1_A_MARK, TIOC4B_C_MARK,
-        A16_MARK, ST0_PWM_MARK, LCD_DON_A_MARK, TIOC4A_C_MARK,
-
-        /* IPSR2 */
-        D14_MARK, TX2_B_MARK, FSE_A_MARK, ET0_TX_CLK_B_MARK,
-        D13_MARK, RX2_B_MARK, FRB_A_MARK, ET0_ETXD6_B_MARK,
-        D12_MARK, FWE_A_MARK, ET0_ETXD5_B_MARK,
-        D11_MARK, RSPI_MISO_A_MARK, QMI_QIO1_A_MARK, FRE_A_MARK,
-                ET0_ETXD3_B_MARK,
-        D10_MARK, RSPI_MOSI_A_MARK, QMO_QIO0_A_MARK, FALE_A_MARK,
-                ET0_ETXD2_B_MARK,
-        D9_MARK, SD0_CMD_A_MARK, MMC_CMD_A_MARK, QIO3_A_MARK,
-                FCLE_A_MARK, ET0_ETXD1_B_MARK,
-        D8_MARK, SD0_CLK_A_MARK, MMC_CLK_A_MARK, QIO2_A_MARK,
-                FCE_A_MARK, ET0_GTX_CLK_B_MARK,
-        D7_MARK, RSPI_SSL_A_MARK, MMC_D7_A_MARK, QSSL_A_MARK,
-                FD7_A_MARK,
-        D6_MARK, RSPI_RSPCK_A_MARK, MMC_D6_A_MARK, QSPCLK_A_MARK,
-                FD6_A_MARK,
-        D5_MARK, SD0_WP_A_MARK, MMC_D5_A_MARK, FD5_A_MARK,
-        D4_MARK, SD0_CD_A_MARK, MMC_D4_A_MARK, ST1_D7_MARK,
-                FD4_A_MARK,
-
-        /* IPSR3 */
-        DRACK0_MARK, SD1_DAT2_A_MARK, ATAG_MARK, TCLK1_A_MARK, ET0_ETXD7_MARK,
-        EX_WAIT2_MARK, SD1_DAT1_A_MARK, DACK2_MARK, CAN1_RX_C_MARK,
-                ET0_MAGIC_C_MARK, ET0_ETXD6_A_MARK,
-        EX_WAIT1_MARK, SD1_DAT0_A_MARK, DREQ2_MARK, CAN1_TX_C_MARK,
-                ET0_LINK_C_MARK, ET0_ETXD5_A_MARK,
-        EX_WAIT0_MARK, TCLK1_B_MARK,
-        RD_WR_MARK, TCLK0_MARK, CAN_CLK_B_MARK, ET0_ETXD4_MARK,
-        EX_CS5_MARK, SD1_CMD_A_MARK, ATADIR_MARK, QSSL_B_MARK,
-                ET0_ETXD3_A_MARK,
-        EX_CS4_MARK, SD1_WP_A_MARK, ATAWR_MARK, QMI_QIO1_B_MARK,
-                ET0_ETXD2_A_MARK,
-        EX_CS3_MARK, SD1_CD_A_MARK, ATARD_MARK, QMO_QIO0_B_MARK,
-                ET0_ETXD1_A_MARK,
-        EX_CS2_MARK, TX3_B_MARK, ATACS1_MARK, QSPCLK_B_MARK,
-                ET0_GTX_CLK_A_MARK,
-        EX_CS1_MARK, RX3_B_MARK, ATACS0_MARK, QIO2_B_MARK,
-                ET0_ETXD0_MARK,
-        CS1_A26_MARK, QIO3_B_MARK,
-        D15_MARK, SCK2_B_MARK,
-
-        /* IPSR4 */
-        SCK2_A_MARK, VI0_G3_MARK,
-        RTS1_B_MARK, VI0_G2_MARK,
-        CTS1_B_MARK, VI0_DATA7_VI0_G1_MARK,
-        TX1_B_MARK, VI0_DATA6_VI0_G0_MARK, ET0_PHY_INT_A_MARK,
-        RX1_B_MARK, VI0_DATA5_VI0_B5_MARK, ET0_MAGIC_A_MARK,
-        SCK1_B_MARK, VI0_DATA4_VI0_B4_MARK, ET0_LINK_A_MARK,
-        RTS0_B_MARK, VI0_DATA3_VI0_B3_MARK, ET0_MDIO_A_MARK,
-        CTS0_B_MARK, VI0_DATA2_VI0_B2_MARK, RMII0_MDIO_A_MARK,
-                ET0_MDC_MARK,
-        HTX0_A_MARK, TX1_A_MARK, VI0_DATA1_VI0_B1_MARK,
-                RMII0_MDC_A_MARK, ET0_COL_MARK,
-        HRX0_A_MARK, RX1_A_MARK, VI0_DATA0_VI0_B0_MARK,
-                RMII0_CRS_DV_A_MARK, ET0_CRS_MARK,
-        HSCK0_A_MARK, SCK1_A_MARK, VI0_VSYNC_MARK,
-                RMII0_RX_ER_A_MARK, ET0_RX_ER_MARK,
-        HRTS0_A_MARK, RTS1_A_MARK, VI0_HSYNC_MARK,
-                RMII0_TXD_EN_A_MARK, ET0_RX_DV_MARK,
-        HCTS0_A_MARK, CTS1_A_MARK, VI0_FIELD_MARK,
-                RMII0_RXD1_A_MARK, ET0_ERXD7_MARK,
-
-        /* IPSR5 */
-        SD2_CLK_A_MARK, RX2_A_MARK, VI0_G4_MARK, ET0_RX_CLK_B_MARK,
-        SD2_CMD_A_MARK, TX2_A_MARK, VI0_G5_MARK, ET0_ERXD2_B_MARK,
-        SD2_DAT0_A_MARK, RX3_A_MARK, VI0_R0_MARK, ET0_ERXD3_B_MARK,
-        SD2_DAT1_A_MARK, TX3_A_MARK, VI0_R1_MARK, ET0_MDIO_B_MARK,
-        SD2_DAT2_A_MARK, RX4_A_MARK, VI0_R2_MARK, ET0_LINK_B_MARK,
-        SD2_DAT3_A_MARK, TX4_A_MARK, VI0_R3_MARK, ET0_MAGIC_B_MARK,
-        SD2_CD_A_MARK, RX5_A_MARK, VI0_R4_MARK, ET0_PHY_INT_B_MARK,
-        SD2_WP_A_MARK, TX5_A_MARK, VI0_R5_MARK,
-        REF125CK_MARK, ADTRG_MARK, RX5_C_MARK,
-        REF50CK_MARK, CTS1_E_MARK, HCTS0_D_MARK,
-
-        /* IPSR6 */
-        DU0_DR0_MARK, SCIF_CLK_B_MARK, HRX0_D_MARK, IETX_A_MARK,
-                TCLKA_A_MARK, HIFD00_MARK,
-        DU0_DR1_MARK, SCK0_B_MARK, HTX0_D_MARK, IERX_A_MARK,
-                TCLKB_A_MARK, HIFD01_MARK,
-        DU0_DR2_MARK, RX0_B_MARK, TCLKC_A_MARK, HIFD02_MARK,
-        DU0_DR3_MARK, TX0_B_MARK, TCLKD_A_MARK, HIFD03_MARK,
-        DU0_DR4_MARK, CTS0_C_MARK, TIOC0A_A_MARK, HIFD04_MARK,
-        DU0_DR5_MARK, RTS0_C_MARK, TIOC0B_A_MARK, HIFD05_MARK,
-        DU0_DR6_MARK, SCK1_C_MARK, TIOC0C_A_MARK, HIFD06_MARK,
-        DU0_DR7_MARK, RX1_C_MARK, TIOC0D_A_MARK, HIFD07_MARK,
-        DU0_DG0_MARK, TX1_C_MARK, HSCK0_D_MARK, IECLK_A_MARK,
-                TIOC1A_A_MARK, HIFD08_MARK,
-        DU0_DG1_MARK, CTS1_C_MARK, HRTS0_D_MARK, TIOC1B_A_MARK,
-                HIFD09_MARK,
-
-        /* IPSR7 */
-        DU0_DG2_MARK, RTS1_C_MARK, RMII0_MDC_B_MARK, TIOC2A_A_MARK,
-                HIFD10_MARK,
-        DU0_DG3_MARK, SCK2_C_MARK, RMII0_MDIO_B_MARK, TIOC2B_A_MARK,
-                HIFD11_MARK,
-        DU0_DG4_MARK, RX2_C_MARK, RMII0_CRS_DV_B_MARK, TIOC3A_A_MARK,
-                HIFD12_MARK,
-        DU0_DG5_MARK, TX2_C_MARK, RMII0_RX_ER_B_MARK, TIOC3B_A_MARK,
-                HIFD13_MARK,
-        DU0_DG6_MARK, RX3_C_MARK, RMII0_RXD0_B_MARK, TIOC3C_A_MARK,
-                HIFD14_MARK,
-        DU0_DG7_MARK, TX3_C_MARK, RMII0_RXD1_B_MARK, TIOC3D_A_MARK,
-                HIFD15_MARK,
-        DU0_DB0_MARK, RX4_C_MARK, RMII0_TXD_EN_B_MARK, TIOC4A_A_MARK,
-                HIFCS_MARK,
-        DU0_DB1_MARK, TX4_C_MARK, RMII0_TXD0_B_MARK, TIOC4B_A_MARK,
-                HIFRS_MARK,
-        DU0_DB2_MARK, RX5_B_MARK, RMII0_TXD1_B_MARK, TIOC4C_A_MARK,
-                HIFWR_MARK,
-        DU0_DB3_MARK, TX5_B_MARK, TIOC4D_A_MARK, HIFRD_MARK,
-        DU0_DB4_MARK, HIFINT_MARK,
-
-        /* IPSR8 */
-        DU0_DB5_MARK, HIFDREQ_MARK,
-        DU0_DB6_MARK, HIFRDY_MARK,
-        DU0_DB7_MARK, SSI_SCK0_B_MARK, HIFEBL_B_MARK,
-        DU0_DOTCLKIN_MARK, HSPI_CS0_C_MARK, SSI_WS0_B_MARK,
-        DU0_DOTCLKOUT_MARK, HSPI_CLK0_C_MARK, SSI_SDATA0_B_MARK,
-        DU0_EXHSYNC_DU0_HSYNC_MARK, HSPI_TX0_C_MARK, SSI_SCK1_B_MARK,
-        DU0_EXVSYNC_DU0_VSYNC_MARK, HSPI_RX0_C_MARK, SSI_WS1_B_MARK,
-        DU0_EXODDF_DU0_ODDF_MARK, CAN0_RX_B_MARK, HSCK0_B_MARK,
-                SSI_SDATA1_B_MARK,
-        DU0_DISP_MARK, CAN0_TX_B_MARK, HRX0_B_MARK, AUDIO_CLKA_B_MARK,
-        DU0_CDE_MARK, HTX0_B_MARK, AUDIO_CLKB_B_MARK, LCD_VCPWC_B_MARK,
-        IRQ0_A_MARK, HSPI_TX_B_MARK, RX3_E_MARK, ET0_ERXD0_MARK,
-        IRQ1_A_MARK, HSPI_RX_B_MARK, TX3_E_MARK, ET0_ERXD1_MARK,
-        IRQ2_A_MARK, CTS0_A_MARK, HCTS0_B_MARK, ET0_ERXD2_A_MARK,
-        IRQ3_A_MARK, RTS0_A_MARK, HRTS0_B_MARK, ET0_ERXD3_A_MARK,
-
-        /* IPSR9 */
-        VI1_CLK_A_MARK, FD0_B_MARK, LCD_DATA0_B_MARK,
-        VI1_0_A_MARK, FD1_B_MARK, LCD_DATA1_B_MARK,
-        VI1_1_A_MARK, FD2_B_MARK, LCD_DATA2_B_MARK,
-        VI1_2_A_MARK, FD3_B_MARK, LCD_DATA3_B_MARK,
-        VI1_3_A_MARK, FD4_B_MARK, LCD_DATA4_B_MARK,
-        VI1_4_A_MARK, FD5_B_MARK, LCD_DATA5_B_MARK,
-        VI1_5_A_MARK, FD6_B_MARK, LCD_DATA6_B_MARK,
-        VI1_6_A_MARK, FD7_B_MARK, LCD_DATA7_B_MARK,
-        VI1_7_A_MARK, FCE_B_MARK, LCD_DATA8_B_MARK,
-        SSI_SCK0_A_MARK, TIOC1A_B_MARK, LCD_DATA9_B_MARK,
-        SSI_WS0_A_MARK, TIOC1B_B_MARK, LCD_DATA10_B_MARK,
-        SSI_SDATA0_A_MARK, VI1_0_B_MARK, TIOC2A_B_MARK, LCD_DATA11_B_MARK,
-        SSI_SCK1_A_MARK, VI1_1_B_MARK, TIOC2B_B_MARK, LCD_DATA12_B_MARK,
-        SSI_WS1_A_MARK, VI1_2_B_MARK, LCD_DATA13_B_MARK,
-        SSI_SDATA1_A_MARK, VI1_3_B_MARK, LCD_DATA14_B_MARK,
-
-        /* IPSR10 */
-        SSI_SCK23_MARK, VI1_4_B_MARK, RX1_D_MARK, FCLE_B_MARK,
-                LCD_DATA15_B_MARK,
-        SSI_WS23_MARK, VI1_5_B_MARK, TX1_D_MARK, HSCK0_C_MARK,
-                FALE_B_MARK, LCD_DON_B_MARK,
-        SSI_SDATA2_MARK, VI1_6_B_MARK, HRX0_C_MARK, FRE_B_MARK,
-                LCD_CL1_B_MARK,
-        SSI_SDATA3_MARK, VI1_7_B_MARK, HTX0_C_MARK, FWE_B_MARK,
-                LCD_CL2_B_MARK,
-        AUDIO_CLKA_A_MARK, VI1_CLK_B_MARK, SCK1_D_MARK, IECLK_B_MARK,
-                LCD_FLM_B_MARK,
-        AUDIO_CLKB_A_MARK, LCD_CLK_B_MARK,
-        AUDIO_CLKC_MARK, SCK1_E_MARK, HCTS0_C_MARK, FRB_B_MARK,
-                LCD_VEPWC_B_MARK,
-        AUDIO_CLKOUT_MARK, TX1_E_MARK, HRTS0_C_MARK, FSE_B_MARK,
-                LCD_M_DISP_B_MARK,
-        CAN_CLK_A_MARK, RX4_D_MARK,
-        CAN0_TX_A_MARK, TX4_D_MARK, MLB_CLK_MARK,
-        CAN1_RX_A_MARK, IRQ1_B_MARK,
-        CAN0_RX_A_MARK, IRQ0_B_MARK, MLB_SIG_MARK,
-        CAN1_TX_A_MARK, TX5_C_MARK, MLB_DAT_MARK,
-
-        /* IPSR11 */
-        SCL1_MARK, SCIF_CLK_C_MARK,
-        SDA1_MARK, RX1_E_MARK,
-        SDA0_MARK, HIFEBL_A_MARK,
-        SDSELF_MARK, RTS1_E_MARK,
-        SCIF_CLK_A_MARK, HSPI_CLK_A_MARK, VI0_CLK_MARK, RMII0_TXD0_A_MARK,
-                ET0_ERXD4_MARK,
-        SCK0_A_MARK, HSPI_CS_A_MARK, VI0_CLKENB_MARK, RMII0_TXD1_A_MARK,
-                ET0_ERXD5_MARK,
-        RX0_A_MARK, HSPI_RX_A_MARK, RMII0_RXD0_A_MARK, ET0_ERXD6_MARK,
-        TX0_A_MARK, HSPI_TX_A_MARK,
-        PENC1_MARK, TX3_D_MARK, CAN1_TX_B_MARK, TX5_D_MARK,
-                IETX_B_MARK,
-        USB_OVC1_MARK, RX3_D_MARK, CAN1_RX_B_MARK, RX5_D_MARK,
-                IERX_B_MARK,
-        DREQ0_MARK, SD1_CLK_A_MARK, ET0_TX_EN_MARK,
-        DACK0_MARK, SD1_DAT3_A_MARK, ET0_TX_ER_MARK,
-        DREQ1_MARK, HSPI_CLK_B_MARK, RX4_B_MARK, ET0_PHY_INT_C_MARK,
-                ET0_TX_CLK_A_MARK,
-        DACK1_MARK, HSPI_CS_B_MARK, TX4_B_MARK, ET0_RX_CLK_A_MARK,
-        PRESETOUT_MARK, ST_CLKOUT_MARK,
-
-        PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
-        PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-
-        PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT),
-        PINMUX_DATA(BS_MARK, FN_BS), PINMUX_DATA(CS0_MARK, FN_CS0),
-        PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0),
-        PINMUX_DATA(RD_MARK, FN_RD), PINMUX_DATA(WE0_MARK, FN_WE0),
-        PINMUX_DATA(WE1_MARK, FN_WE1),
-        PINMUX_DATA(SCL0_MARK, FN_SCL0), PINMUX_DATA(PENC0_MARK, FN_PENC0),
-        PINMUX_DATA(USB_OVC0_MARK, FN_USB_OVC0),
-        PINMUX_DATA(IRQ2_B_MARK, FN_IRQ2_B),
-                PINMUX_DATA(IRQ3_B_MARK, FN_IRQ3_B),
-
-        /* IPSR0 */
-        PINMUX_IPSR_DATA(IP0_1_0, A0),
-        PINMUX_IPSR_DATA(IP0_1_0, ST0_CLKIN),
-        PINMUX_IPSR_MODSEL_DATA(IP0_1_0, LCD_DATA0_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_1_0, TCLKA_C, SEL_MTU2_CLK_1),
-
-        PINMUX_IPSR_DATA(IP0_3_2, A1),
-        PINMUX_IPSR_DATA(IP0_3_2, ST0_REQ),
-        PINMUX_IPSR_MODSEL_DATA(IP0_3_2, LCD_DATA1_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_3_2, TCLKB_C, SEL_MTU2_CLK_1),
-
-        PINMUX_IPSR_DATA(IP0_5_4, A2),
-        PINMUX_IPSR_DATA(IP0_5_4, ST0_SYC),
-        PINMUX_IPSR_MODSEL_DATA(IP0_5_4, LCD_DATA2_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_5_4, TCLKC_C, SEL_MTU2_CLK_1),
-
-        PINMUX_IPSR_DATA(IP0_7_6, A3),
-        PINMUX_IPSR_DATA(IP0_7_6, ST0_VLD),
-        PINMUX_IPSR_MODSEL_DATA(IP0_7_6, LCD_DATA3_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_7_6, TCLKD_C, SEL_MTU2_CLK_1),
-
-        PINMUX_IPSR_DATA(IP0_9_8, A4),
-        PINMUX_IPSR_DATA(IP0_9_8, ST0_D0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_9_8, LCD_DATA4_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_9_8, TIOC0A_C, SEL_MTU2_CH0_1),
-
-        PINMUX_IPSR_DATA(IP0_11_10, A5),
-        PINMUX_IPSR_DATA(IP0_11_10, ST0_D1),
-        PINMUX_IPSR_MODSEL_DATA(IP0_11_10, LCD_DATA5_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_11_10, TIOC0B_C, SEL_MTU2_CH0_1),
-
-        PINMUX_IPSR_DATA(IP0_13_12, A6),
-        PINMUX_IPSR_DATA(IP0_13_12, ST0_D2),
-        PINMUX_IPSR_MODSEL_DATA(IP0_13_12, LCD_DATA6_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_13_12, TIOC0C_C, SEL_MTU2_CH0_1),
-
-        PINMUX_IPSR_DATA(IP0_15_14, A7),
-        PINMUX_IPSR_DATA(IP0_15_14, ST0_D3),
-        PINMUX_IPSR_MODSEL_DATA(IP0_15_14, LCD_DATA7_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_15_14, TIOC0D_C, SEL_MTU2_CH0_1),
-
-        PINMUX_IPSR_DATA(IP0_17_16, A8),
-        PINMUX_IPSR_DATA(IP0_17_16, ST0_D4),
-        PINMUX_IPSR_MODSEL_DATA(IP0_17_16, LCD_DATA8_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_17_16, TIOC1A_C, SEL_MTU2_CH1_2),
-
-        PINMUX_IPSR_DATA(IP0_19_18, A9),
-        PINMUX_IPSR_DATA(IP0_19_18, ST0_D5),
-        PINMUX_IPSR_MODSEL_DATA(IP0_19_18, LCD_DATA9_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_19_18, TIOC1B_C, SEL_MTU2_CH1_2),
-
-        PINMUX_IPSR_DATA(IP0_21_20, A10),
-        PINMUX_IPSR_DATA(IP0_21_20, ST0_D6),
-        PINMUX_IPSR_MODSEL_DATA(IP0_21_20, LCD_DATA10_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_21_20, TIOC2A_C, SEL_MTU2_CH2_2),
-
-        PINMUX_IPSR_DATA(IP0_23_22, A11),
-        PINMUX_IPSR_DATA(IP0_23_22, ST0_D7),
-        PINMUX_IPSR_MODSEL_DATA(IP0_23_22, LCD_DATA11_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_23_22, TIOC2B_C, SEL_MTU2_CH2_2),
-
-        PINMUX_IPSR_DATA(IP0_25_24, A12),
-        PINMUX_IPSR_MODSEL_DATA(IP0_25_24, LCD_DATA12_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_25_24, TIOC3A_C, SEL_MTU2_CH3_1),
-
-        PINMUX_IPSR_DATA(IP0_27_26, A13),
-        PINMUX_IPSR_MODSEL_DATA(IP0_27_26, LCD_DATA13_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_27_26, TIOC3B_C, SEL_MTU2_CH3_1),
-
-        PINMUX_IPSR_DATA(IP0_29_28, A14),
-        PINMUX_IPSR_MODSEL_DATA(IP0_29_28, LCD_DATA14_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_29_28, TIOC3C_C, SEL_MTU2_CH3_1),
-
-        PINMUX_IPSR_DATA(IP0_31_30, A15),
-        PINMUX_IPSR_DATA(IP0_31_30, ST0_VCO_CLKIN),
-        PINMUX_IPSR_MODSEL_DATA(IP0_31_30, LCD_DATA15_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP0_31_30, TIOC3D_C, SEL_MTU2_CH3_1),
-
-
-        /* IPSR1 */
-        PINMUX_IPSR_DATA(IP1_1_0, A16),
-        PINMUX_IPSR_DATA(IP1_1_0, ST0_PWM),
-        PINMUX_IPSR_MODSEL_DATA(IP1_1_0, LCD_DON_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_1_0, TIOC4A_C, SEL_MTU2_CH4_1),
-
-        PINMUX_IPSR_DATA(IP1_3_2, A17),
-        PINMUX_IPSR_DATA(IP1_3_2, ST1_VCO_CLKIN),
-        PINMUX_IPSR_MODSEL_DATA(IP1_3_2, LCD_CL1_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_3_2, TIOC4B_C, SEL_MTU2_CH4_1),
-
-        PINMUX_IPSR_DATA(IP1_5_4, A18),
-        PINMUX_IPSR_DATA(IP1_5_4, ST1_PWM),
-        PINMUX_IPSR_MODSEL_DATA(IP1_5_4, LCD_CL2_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_5_4, TIOC4C_C, SEL_MTU2_CH4_1),
-
-        PINMUX_IPSR_DATA(IP1_7_6, A19),
-        PINMUX_IPSR_DATA(IP1_7_6, ST1_CLKIN),
-        PINMUX_IPSR_MODSEL_DATA(IP1_7_6, LCD_CLK_A, SEL_LCDC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_7_6, TIOC4D_C, SEL_MTU2_CH4_1),
-
-        PINMUX_IPSR_DATA(IP1_9_8, A20),
-        PINMUX_IPSR_DATA(IP1_9_8, ST1_REQ),
-        PINMUX_IPSR_MODSEL_DATA(IP1_9_8, LCD_FLM_A, SEL_LCDC_0),
-
-        PINMUX_IPSR_DATA(IP1_11_10, A21),
-        PINMUX_IPSR_DATA(IP1_11_10, ST1_SYC),
-        PINMUX_IPSR_MODSEL_DATA(IP1_11_10, LCD_VCPWC_A, SEL_LCDC_0),
-
-        PINMUX_IPSR_DATA(IP1_13_12, A22),
-        PINMUX_IPSR_DATA(IP1_13_12, ST1_VLD),
-        PINMUX_IPSR_MODSEL_DATA(IP1_13_12, LCD_VEPWC_A, SEL_LCDC_0),
-
-        PINMUX_IPSR_DATA(IP1_15_14, A23),
-        PINMUX_IPSR_DATA(IP1_15_14, ST1_D0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_15_14, LCD_M_DISP_A, SEL_LCDC_0),
-
-        PINMUX_IPSR_DATA(IP1_17_16, A24),
-        PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3),
-        PINMUX_IPSR_DATA(IP1_17_16, ST1_D1),
-
-        PINMUX_IPSR_DATA(IP1_19_18, A25),
-        PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3),
-        PINMUX_IPSR_DATA(IP1_17_16, ST1_D2),
-
-        PINMUX_IPSR_DATA(IP1_22_20, D0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_22_20, SD0_DAT0_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_22_20, MMC_D0_A, SEL_MMC_0),
-        PINMUX_IPSR_DATA(IP1_22_20, ST1_D3),
-        PINMUX_IPSR_MODSEL_DATA(IP1_22_20, FD0_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP1_25_23, D1),
-        PINMUX_IPSR_MODSEL_DATA(IP1_25_23, SD0_DAT0_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_25_23, MMC_D1_A, SEL_MMC_0),
-        PINMUX_IPSR_DATA(IP1_25_23, ST1_D4),
-        PINMUX_IPSR_MODSEL_DATA(IP1_25_23, FD1_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP1_28_26, D2),
-        PINMUX_IPSR_MODSEL_DATA(IP1_28_26, SD0_DAT0_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_28_26, MMC_D2_A, SEL_MMC_0),
-        PINMUX_IPSR_DATA(IP1_28_26, ST1_D5),
-        PINMUX_IPSR_MODSEL_DATA(IP1_28_26, FD2_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP1_31_29, D3),
-        PINMUX_IPSR_MODSEL_DATA(IP1_31_29, SD0_DAT0_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP1_31_29, MMC_D3_A, SEL_MMC_0),
-        PINMUX_IPSR_DATA(IP1_31_29, ST1_D6),
-        PINMUX_IPSR_MODSEL_DATA(IP1_31_29, FD3_A, SEL_FLCTL_0),
-
-        /* IPSR2 */
-        PINMUX_IPSR_DATA(IP2_2_0, D4),
-        PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SD0_CD_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_2_0, MMC_D4_A, SEL_MMC_0),
-        PINMUX_IPSR_DATA(IP2_2_0, ST1_D7),
-        PINMUX_IPSR_MODSEL_DATA(IP2_2_0, FD4_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP2_4_3, D5),
-        PINMUX_IPSR_MODSEL_DATA(IP2_4_3, SD0_WP_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_4_3, MMC_D5_A, SEL_MMC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_4_3, FD5_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP2_7_5, D6),
-        PINMUX_IPSR_MODSEL_DATA(IP2_7_5, RSPI_RSPCK_A, SEL_RSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_7_5, MMC_D6_A, SEL_MMC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_7_5, QSPCLK_A, SEL_RQSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_7_5, FD6_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP2_10_8, D7),
-        PINMUX_IPSR_MODSEL_DATA(IP2_10_8, RSPI_SSL_A, SEL_RSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_10_8, MMC_D7_A, SEL_MMC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_10_8, QSSL_A, SEL_RQSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_10_8, FD7_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP2_13_11, D8),
-        PINMUX_IPSR_MODSEL_DATA(IP2_13_11, SD0_CLK_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_13_11, MMC_CLK_A, SEL_MMC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_13_11, QIO2_A, SEL_RQSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_13_11, FCE_A, SEL_FLCTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_13_11, ET0_GTX_CLK_B, SEL_ET0_1),
-
-        PINMUX_IPSR_DATA(IP2_16_14, D9),
-        PINMUX_IPSR_MODSEL_DATA(IP2_16_14, SD0_CMD_A, SEL_SDHI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_16_14, MMC_CMD_A, SEL_MMC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_16_14, QIO3_A, SEL_RQSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_16_14, FCLE_A, SEL_FLCTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_16_14, ET0_ETXD1_B, SEL_ET0_1),
-
-        PINMUX_IPSR_DATA(IP2_19_17, D10),
-        PINMUX_IPSR_MODSEL_DATA(IP2_19_17, RSPI_MOSI_A, SEL_RSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_19_17, QMO_QIO0_A, SEL_RQSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_19_17, FALE_A, SEL_FLCTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_19_17, ET0_ETXD2_B, SEL_ET0_1),
-
-        PINMUX_IPSR_DATA(IP2_22_20, D11),
-        PINMUX_IPSR_MODSEL_DATA(IP2_22_20, RSPI_MISO_A, SEL_RSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_22_20, QMI_QIO1_A, SEL_RQSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_22_20, FRE_A, SEL_FLCTL_0),
-
-        PINMUX_IPSR_DATA(IP2_24_23, D12),
-        PINMUX_IPSR_MODSEL_DATA(IP2_24_23, FWE_A, SEL_FLCTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_24_23, ET0_ETXD5_B, SEL_ET0_1),
-
-        PINMUX_IPSR_DATA(IP2_27_25, D13),
-        PINMUX_IPSR_MODSEL_DATA(IP2_27_25, RX2_B, SEL_SCIF2_1),
-        PINMUX_IPSR_MODSEL_DATA(IP2_27_25, FRB_A, SEL_FLCTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_27_25, ET0_ETXD6_B, SEL_ET0_1),
-
-        PINMUX_IPSR_DATA(IP2_30_28, D14),
-        PINMUX_IPSR_MODSEL_DATA(IP2_30_28, TX2_B, SEL_SCIF2_1),
-        PINMUX_IPSR_MODSEL_DATA(IP2_30_28, FSE_A, SEL_FLCTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP2_30_28, ET0_TX_CLK_B, SEL_ET0_1),
-
-        /* IPSR3 */
-        PINMUX_IPSR_DATA(IP3_1_0, D15),
-        PINMUX_IPSR_MODSEL_DATA(IP3_1_0, SCK2_B, SEL_SCIF2_1),
-
-        PINMUX_IPSR_DATA(IP3_2, CS1_A26),
-        PINMUX_IPSR_MODSEL_DATA(IP3_2, QIO3_B, SEL_RQSPI_1),
-
-        PINMUX_IPSR_DATA(IP3_5_3, EX_CS1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_5_3, RX3_B, SEL_SCIF2_1),
-        PINMUX_IPSR_DATA(IP3_5_3, ATACS0),
-        PINMUX_IPSR_MODSEL_DATA(IP3_5_3, QIO2_B, SEL_RQSPI_1),
-        PINMUX_IPSR_DATA(IP3_5_3, ET0_ETXD0),
-
-        PINMUX_IPSR_DATA(IP3_8_6, EX_CS2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_8_6, TX3_B, SEL_SCIF3_1),
-        PINMUX_IPSR_DATA(IP3_8_6, ATACS1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_8_6, QSPCLK_B, SEL_RQSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_8_6, ET0_GTX_CLK_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP3_11_9, EX_CS3),
-        PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SD1_CD_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP3_11_9, ATARD),
-        PINMUX_IPSR_MODSEL_DATA(IP3_11_9, QMO_QIO0_B, SEL_RQSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_11_9, ET0_ETXD1_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP3_14_12, EX_CS4),
-        PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SD1_WP_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP3_14_12, ATAWR),
-        PINMUX_IPSR_MODSEL_DATA(IP3_14_12, QMI_QIO1_B, SEL_RQSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_14_12, ET0_ETXD2_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP3_17_15, EX_CS5),
-        PINMUX_IPSR_MODSEL_DATA(IP3_17_15, SD1_CMD_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP3_17_15, ATADIR),
-        PINMUX_IPSR_MODSEL_DATA(IP3_17_15, QSSL_B, SEL_RQSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_17_15, ET0_ETXD3_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP3_19_18, RD_WR),
-        PINMUX_IPSR_DATA(IP3_19_18, TCLK0),
-        PINMUX_IPSR_MODSEL_DATA(IP3_19_18, CAN_CLK_B, SEL_RCAN_CLK_1),
-        PINMUX_IPSR_DATA(IP3_19_18, ET0_ETXD4),
-
-        PINMUX_IPSR_DATA(IP3_20, EX_WAIT0),
-        PINMUX_IPSR_MODSEL_DATA(IP3_20, TCLK1_B, SEL_TMU_1),
-
-        PINMUX_IPSR_DATA(IP3_23_21, EX_WAIT1),
-        PINMUX_IPSR_MODSEL_DATA(IP3_23_21, SD1_DAT0_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP3_23_21, DREQ2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_23_21, CAN1_TX_C, SEL_RCAN1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_LINK_C, SEL_ET0_CTL_2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_ETXD5_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP3_26_24, EX_WAIT2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SD1_DAT1_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP3_26_24, DACK2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_26_24, CAN1_RX_C, SEL_RCAN1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_MAGIC_C, SEL_ET0_CTL_2),
-        PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_ETXD6_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP3_29_27, DRACK0),
-        PINMUX_IPSR_MODSEL_DATA(IP3_29_27, SD1_DAT2_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP3_29_27, ATAG),
-        PINMUX_IPSR_MODSEL_DATA(IP3_29_27, TCLK1_A, SEL_TMU_0),
-        PINMUX_IPSR_DATA(IP3_29_27, ET0_ETXD7),
-
-        /* IPSR4 */
-        PINMUX_IPSR_MODSEL_DATA(IP4_2_0, HCTS0_A, SEL_HSCIF_0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_2_0, CTS1_A, SEL_SCIF1_0),
-        PINMUX_IPSR_DATA(IP4_2_0, VI0_FIELD),
-        PINMUX_IPSR_MODSEL_DATA(IP4_2_0, RMII0_RXD1_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP4_2_0, ET0_ERXD7),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_5_3, HRTS0_A, SEL_HSCIF_0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RTS1_A, SEL_SCIF1_0),
-        PINMUX_IPSR_DATA(IP4_5_3, VI0_HSYNC),
-        PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RMII0_TXD_EN_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP4_5_3, ET0_RX_DV),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_8_6, HSCK0_A, SEL_HSCIF_0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_8_6, SCK1_A, SEL_SCIF1_0),
-        PINMUX_IPSR_DATA(IP4_8_6, VI0_VSYNC),
-        PINMUX_IPSR_MODSEL_DATA(IP4_8_6, RMII0_RX_ER_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP4_8_6, ET0_RX_ER),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_11_9, HRX0_A, SEL_HSCIF_0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RX1_A, SEL_SCIF1_0),
-        PINMUX_IPSR_DATA(IP4_11_9, VI0_DATA0_VI0_B0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RMII0_CRS_DV_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP4_11_9, ET0_CRS),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_14_12, HTX0_A, SEL_HSCIF_0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_14_12, TX1_A, SEL_SCIF1_0),
-        PINMUX_IPSR_DATA(IP4_14_12, VI0_DATA1_VI0_B1),
-        PINMUX_IPSR_MODSEL_DATA(IP4_14_12, RMII0_MDC_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP4_14_12, ET0_COL),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_17_15, CTS0_B, SEL_SCIF0_1),
-        PINMUX_IPSR_DATA(IP4_17_15, VI0_DATA2_VI0_B2),
-        PINMUX_IPSR_MODSEL_DATA(IP4_17_15, RMII0_MDIO_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP4_17_15, ET0_MDC),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_19_18, RTS0_B, SEL_SCIF0_1),
-        PINMUX_IPSR_DATA(IP4_19_18, VI0_DATA3_VI0_B3),
-        PINMUX_IPSR_MODSEL_DATA(IP4_19_18, ET0_MDIO_A, SEL_ET0_0),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_21_20, SCK1_B, SEL_SCIF1_1),
-        PINMUX_IPSR_DATA(IP4_21_20, VI0_DATA4_VI0_B4),
-        PINMUX_IPSR_MODSEL_DATA(IP4_21_20, ET0_LINK_A, SEL_ET0_CTL_0),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_23_22, RX1_B, SEL_SCIF1_1),
-        PINMUX_IPSR_DATA(IP4_23_22, VI0_DATA5_VI0_B5),
-        PINMUX_IPSR_MODSEL_DATA(IP4_23_22, ET0_MAGIC_A, SEL_ET0_CTL_0),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_25_24, TX1_B, SEL_SCIF1_1),
-        PINMUX_IPSR_DATA(IP4_25_24, VI0_DATA6_VI0_G0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_25_24, ET0_PHY_INT_A, SEL_ET0_CTL_0),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_27_26, CTS1_B, SEL_SCIF1_1),
-        PINMUX_IPSR_DATA(IP4_27_26, VI0_DATA7_VI0_G1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_29_28, RTS1_B, SEL_SCIF1_1),
-        PINMUX_IPSR_DATA(IP4_29_28, VI0_G2),
-
-        PINMUX_IPSR_MODSEL_DATA(IP4_31_30, SCK2_A, SEL_SCIF2_0),
-        PINMUX_IPSR_DATA(IP4_31_30, VI0_G3),
-
-        /* IPSR5 */
-        PINMUX_IPSR_MODSEL_DATA(IP5_2_0, SD2_CLK_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RX2_A, SEL_SCIF2_0),
-        PINMUX_IPSR_DATA(IP5_2_0, VI0_G4),
-        PINMUX_IPSR_MODSEL_DATA(IP5_2_0, ET0_RX_CLK_B, SEL_ET0_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SD2_CMD_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_5_3, TX2_A, SEL_SCIF2_0),
-        PINMUX_IPSR_DATA(IP5_5_3, VI0_G5),
-        PINMUX_IPSR_MODSEL_DATA(IP5_5_3, ET0_ERXD2_B, SEL_ET0_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_8_6, SD2_DAT0_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_8_6, RX3_A, SEL_SCIF3_0),
-        PINMUX_IPSR_DATA(IP4_8_6, VI0_R0),
-        PINMUX_IPSR_MODSEL_DATA(IP4_8_6, ET0_ERXD2_B, SEL_ET0_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_11_9, SD2_DAT1_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_11_9, TX3_A, SEL_SCIF3_0),
-        PINMUX_IPSR_DATA(IP5_11_9, VI0_R1),
-        PINMUX_IPSR_MODSEL_DATA(IP5_11_9, ET0_MDIO_B, SEL_ET0_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_14_12, SD2_DAT2_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_14_12, RX4_A, SEL_SCIF4_0),
-        PINMUX_IPSR_DATA(IP5_14_12, VI0_R2),
-        PINMUX_IPSR_MODSEL_DATA(IP5_14_12, ET0_LINK_B, SEL_ET0_CTL_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_17_15, SD2_DAT3_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_17_15, TX4_A, SEL_SCIF4_0),
-        PINMUX_IPSR_DATA(IP5_17_15, VI0_R3),
-        PINMUX_IPSR_MODSEL_DATA(IP5_17_15, ET0_MAGIC_B, SEL_ET0_CTL_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_20_18, SD2_CD_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_20_18, RX5_A, SEL_SCIF5_0),
-        PINMUX_IPSR_DATA(IP5_20_18, VI0_R4),
-        PINMUX_IPSR_MODSEL_DATA(IP5_20_18, ET0_PHY_INT_B, SEL_ET0_CTL_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP5_22_21, SD2_WP_A, SEL_SDHI2_0),
-        PINMUX_IPSR_MODSEL_DATA(IP5_22_21, TX5_A, SEL_SCIF5_0),
-        PINMUX_IPSR_DATA(IP5_22_21, VI0_R5),
-
-        PINMUX_IPSR_DATA(IP5_24_23, REF125CK),
-        PINMUX_IPSR_DATA(IP5_24_23, ADTRG),
-        PINMUX_IPSR_MODSEL_DATA(IP5_24_23, RX5_C, SEL_SCIF5_2),
-        PINMUX_IPSR_DATA(IP5_26_25, REF50CK),
-        PINMUX_IPSR_MODSEL_DATA(IP5_26_25, CTS1_E, SEL_SCIF1_3),
-        PINMUX_IPSR_MODSEL_DATA(IP5_26_25, HCTS0_D, SEL_HSCIF_3),
-
-        /* IPSR6 */
-        PINMUX_IPSR_DATA(IP6_2_0, DU0_DR0),
-        PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK_B, SEL_SCIF_CLK_1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_2_0, HRX0_D, SEL_HSCIF_3),
-        PINMUX_IPSR_MODSEL_DATA(IP6_2_0, IETX_A, SEL_IEBUS_0),
-        PINMUX_IPSR_MODSEL_DATA(IP6_2_0, TCLKA_A, SEL_MTU2_CLK_0),
-        PINMUX_IPSR_DATA(IP6_2_0, HIFD00),
-
-        PINMUX_IPSR_DATA(IP6_5_3, DU0_DR1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCK0_B, SEL_SCIF0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_5_3, HTX0_D, SEL_HSCIF_3),
-        PINMUX_IPSR_MODSEL_DATA(IP6_5_3, IERX_A, SEL_IEBUS_0),
-        PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TCLKB_A, SEL_MTU2_CLK_0),
-        PINMUX_IPSR_DATA(IP6_5_3, HIFD01),
-
-        PINMUX_IPSR_DATA(IP6_7_6, DU0_DR2),
-        PINMUX_IPSR_MODSEL_DATA(IP6_7_6, RX0_B, SEL_SCIF0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_7_6, TCLKC_A, SEL_MTU2_CLK_0),
-        PINMUX_IPSR_DATA(IP6_7_6, HIFD02),
-
-        PINMUX_IPSR_DATA(IP6_9_8, DU0_DR3),
-        PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TX0_B, SEL_SCIF0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TCLKD_A, SEL_MTU2_CLK_0),
-        PINMUX_IPSR_DATA(IP6_9_8, HIFD03),
-
-        PINMUX_IPSR_DATA(IP6_11_10, DU0_DR4),
-        PINMUX_IPSR_MODSEL_DATA(IP6_11_10, CTS0_C, SEL_SCIF0_2),
-        PINMUX_IPSR_MODSEL_DATA(IP6_11_10, TIOC0A_A, SEL_MTU2_CH0_0),
-        PINMUX_IPSR_DATA(IP6_11_10, HIFD04),
-
-        PINMUX_IPSR_DATA(IP6_13_12, DU0_DR5),
-        PINMUX_IPSR_MODSEL_DATA(IP6_13_12, RTS0_C, SEL_SCIF0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_13_12, TIOC0B_A, SEL_MTU2_CH0_0),
-        PINMUX_IPSR_DATA(IP6_13_12, HIFD05),
-
-        PINMUX_IPSR_DATA(IP6_15_14, DU0_DR6),
-        PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCK1_C, SEL_SCIF1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP6_15_14, TIOC0C_A, SEL_MTU2_CH0_0),
-        PINMUX_IPSR_DATA(IP6_15_14, HIFD06),
-
-        PINMUX_IPSR_DATA(IP6_17_16, DU0_DR7),
-        PINMUX_IPSR_MODSEL_DATA(IP6_17_16, RX1_C, SEL_SCIF1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP6_17_16, TIOC0D_A, SEL_MTU2_CH0_0),
-        PINMUX_IPSR_DATA(IP6_17_16, HIFD07),
-
-        PINMUX_IPSR_DATA(IP6_20_18, DU0_DG0),
-        PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TX1_C, SEL_SCIF1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP6_20_18, HSCK0_D, SEL_HSCIF_3),
-        PINMUX_IPSR_MODSEL_DATA(IP6_20_18, IECLK_A, SEL_IEBUS_0),
-        PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TIOC1A_A, SEL_MTU2_CH1_0),
-        PINMUX_IPSR_DATA(IP6_20_18, HIFD08),
-
-        PINMUX_IPSR_DATA(IP6_23_21, DU0_DG1),
-        PINMUX_IPSR_MODSEL_DATA(IP6_23_21, CTS1_C, SEL_SCIF1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HRTS0_D, SEL_HSCIF_3),
-        PINMUX_IPSR_MODSEL_DATA(IP6_23_21, TIOC1B_A, SEL_MTU2_CH1_0),
-        PINMUX_IPSR_DATA(IP6_23_21, HIFD09),
-
-        /* IPSR7 */
-        PINMUX_IPSR_DATA(IP7_2_0, DU0_DG2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RTS1_C, SEL_SCIF1_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RMII0_MDC_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_2_0, TIOC2A_A, SEL_MTU2_CH2_0),
-        PINMUX_IPSR_DATA(IP7_2_0, HIFD10),
-
-        PINMUX_IPSR_DATA(IP7_5_3, DU0_DG3),
-        PINMUX_IPSR_MODSEL_DATA(IP7_5_3, SCK2_C, SEL_SCIF2_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RMII0_MDIO_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_5_3, TIOC2B_A, SEL_MTU2_CH2_0),
-        PINMUX_IPSR_DATA(IP7_5_3, HIFD11),
-
-        PINMUX_IPSR_DATA(IP7_8_6, DU0_DG4),
-        PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RX2_C, SEL_SCIF2_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RMII0_CRS_DV_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_8_6, TIOC3A_A, SEL_MTU2_CH3_0),
-        PINMUX_IPSR_DATA(IP7_8_6, HIFD12),
-
-        PINMUX_IPSR_DATA(IP7_11_9, DU0_DG5),
-        PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TX2_C, SEL_SCIF2_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_11_9, RMII0_RX_ER_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TIOC3B_A, SEL_MTU2_CH3_0),
-        PINMUX_IPSR_DATA(IP7_11_9, HIFD13),
-
-        PINMUX_IPSR_DATA(IP7_14_12, DU0_DG6),
-        PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RX3_C, SEL_SCIF3_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RMII0_RXD0_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_14_12, TIOC3C_A, SEL_MTU2_CH3_0),
-        PINMUX_IPSR_DATA(IP7_14_12, HIFD14),
-
-        PINMUX_IPSR_DATA(IP7_17_15, DU0_DG7),
-        PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TX3_C, SEL_SCIF3_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_17_15, RMII0_RXD1_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TIOC3D_A, SEL_MTU2_CH3_0),
-        PINMUX_IPSR_DATA(IP7_17_15, HIFD15),
-
-        PINMUX_IPSR_DATA(IP7_20_18, DU0_DB0),
-        PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RX4_C, SEL_SCIF4_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RMII0_TXD_EN_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_20_18, TIOC4A_A, SEL_MTU2_CH4_0),
-        PINMUX_IPSR_DATA(IP7_20_18, HIFCS),
-
-        PINMUX_IPSR_DATA(IP7_23_21, DU0_DB1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TX4_C, SEL_SCIF4_2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_23_21, RMII0_TXD0_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TIOC4B_A, SEL_MTU2_CH4_0),
-        PINMUX_IPSR_DATA(IP7_23_21, HIFWR),
-
-        PINMUX_IPSR_DATA(IP7_26_24, DU0_DB2),
-        PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RX5_B, SEL_SCIF5_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RMII0_TXD1_B, SEL_RMII_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_26_24, TIOC4C_A, SEL_MTU2_CH4_0),
-
-        PINMUX_IPSR_DATA(IP7_28_27, DU0_DB3),
-        PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TX5_B, SEL_SCIF5_1),
-        PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TIOC4D_A, SEL_MTU2_CH4_0),
-        PINMUX_IPSR_DATA(IP7_28_27, HIFRD),
-
-        PINMUX_IPSR_DATA(IP7_30_29, DU0_DB4),
-        PINMUX_IPSR_DATA(IP7_30_29, HIFINT),
-
-        /* IPSR8 */
-        PINMUX_IPSR_DATA(IP8_1_0, DU0_DB5),
-        PINMUX_IPSR_DATA(IP8_1_0, HIFDREQ),
-
-        PINMUX_IPSR_DATA(IP8_3_2, DU0_DB6),
-        PINMUX_IPSR_DATA(IP8_3_2, HIFRDY),
-
-        PINMUX_IPSR_DATA(IP8_5_4, DU0_DB7),
-        PINMUX_IPSR_MODSEL_DATA(IP8_5_4, SSI_SCK0_B, SEL_SSI0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_5_4, HIFEBL_B, SEL_HIF_1),
-
-        PINMUX_IPSR_DATA(IP8_7_6, DU0_DOTCLKIN),
-        PINMUX_IPSR_MODSEL_DATA(IP8_7_6, HSPI_CS0_C, SEL_HSPI_2),
-        PINMUX_IPSR_MODSEL_DATA(IP8_7_6, SSI_WS0_B, SEL_SSI0_1),
-
-        PINMUX_IPSR_DATA(IP8_9_8, DU0_DOTCLKOUT),
-        PINMUX_IPSR_MODSEL_DATA(IP8_9_8, HSPI_CLK0_C, SEL_HSPI_2),
-        PINMUX_IPSR_MODSEL_DATA(IP8_9_8, SSI_SDATA0_B, SEL_SSI0_1),
-
-        PINMUX_IPSR_DATA(IP8_11_10, DU0_EXHSYNC_DU0_HSYNC),
-        PINMUX_IPSR_MODSEL_DATA(IP8_11_10, HSPI_TX0_C, SEL_HSPI_2),
-        PINMUX_IPSR_MODSEL_DATA(IP8_11_10, SSI_SCK1_B, SEL_SSI1_1),
-
-        PINMUX_IPSR_DATA(IP8_13_12, DU0_EXVSYNC_DU0_VSYNC),
-        PINMUX_IPSR_MODSEL_DATA(IP8_13_12, HSPI_RX0_C, SEL_HSPI_2),
-        PINMUX_IPSR_MODSEL_DATA(IP8_13_12, SSI_WS1_B, SEL_SSI1_1),
-
-        PINMUX_IPSR_DATA(IP8_15_14, DU0_EXODDF_DU0_ODDF),
-        PINMUX_IPSR_MODSEL_DATA(IP8_15_14, CAN0_RX_B, SEL_RCAN0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_15_14, HSCK0_B, SEL_HSCIF_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_15_14, SSI_SDATA1_B, SEL_SSI1_1),
-
-        PINMUX_IPSR_DATA(IP8_17_16, DU0_DISP),
-        PINMUX_IPSR_MODSEL_DATA(IP8_17_16, CAN0_TX_B, SEL_RCAN0_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_17_16, HRX0_B, SEL_HSCIF_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_17_16, AUDIO_CLKA_B, SEL_AUDIO_CLKA_1),
-
-        PINMUX_IPSR_DATA(IP8_19_18, DU0_CDE),
-        PINMUX_IPSR_MODSEL_DATA(IP8_19_18, HTX0_B, SEL_HSCIF_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_19_18, AUDIO_CLKB_B, SEL_AUDIO_CLKB_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_19_18, LCD_VCPWC_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP8_22_20, IRQ0_A, SEL_INTC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP8_22_20, HSPI_TX_B, SEL_HSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_22_20, RX3_E, SEL_SCIF3_4),
-        PINMUX_IPSR_DATA(IP8_22_20, ET0_ERXD0),
-
-        PINMUX_IPSR_MODSEL_DATA(IP8_25_23, IRQ1_A, SEL_INTC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP8_25_23, HSPI_RX_B, SEL_HSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_25_23, TX3_E, SEL_SCIF3_4),
-        PINMUX_IPSR_DATA(IP8_25_23, ET0_ERXD1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP8_27_26, IRQ2_A, SEL_INTC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP8_27_26, CTS0_A, SEL_SCIF0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP8_27_26, HCTS0_B, SEL_HSCIF_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_27_26, ET0_ERXD2_A, SEL_ET0_0),
-
-        PINMUX_IPSR_MODSEL_DATA(IP8_29_28, IRQ3_A, SEL_INTC_0),
-        PINMUX_IPSR_MODSEL_DATA(IP8_29_28, RTS0_A, SEL_SCIF0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP8_29_28, HRTS0_B, SEL_HSCIF_1),
-        PINMUX_IPSR_MODSEL_DATA(IP8_29_28, ET0_ERXD3_A, SEL_ET0_0),
-
-        /* IPSR9 */
-        PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_CLK_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_1_0, FD0_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_1_0, LCD_DATA0_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_0_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_3_2, FD1_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_3_2, LCD_DATA1_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_1_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_5_4, FD2_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_5_4, LCD_DATA2_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_2_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_7_6, FD3_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_7_6, LCD_DATA3_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_9_8, VI1_3_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_9_8, FD4_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_9_8, LCD_DATA4_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_11_10, VI1_4_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_11_10, FD5_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_11_10, LCD_DATA5_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_13_12, VI1_5_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_13_12, FD6_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_13_12, LCD_DATA6_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_15_14, VI1_6_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_15_14, FD7_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_15_14, LCD_DATA7_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_17_16, VI1_7_A, SEL_VIN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_17_16, FCE_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_17_16, LCD_DATA8_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SSI_SCK0_A, SEL_SSI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_19_18, TIOC1A_B, SEL_MTU2_CH1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_19_18, LCD_DATA9_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SSI_WS0_A, SEL_SSI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_21_20, TIOC1B_B, SEL_MTU2_CH1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_21_20, LCD_DATA10_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SSI_SDATA0_A, SEL_SSI0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_23_22, VI1_0_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_23_22, TIOC2A_B, SEL_MTU2_CH2_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_23_22, LCD_DATA11_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SSI_SCK1_A, SEL_SSI1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_25_24, VI1_1_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_25_24, TIOC2B_B, SEL_MTU2_CH2_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_25_24, LCD_DATA12_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SSI_WS1_A, SEL_SSI1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_27_26, VI1_2_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_27_26, LCD_DATA13_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP9_29_28, SSI_SDATA1_A, SEL_SSI1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP9_29_28, VI1_3_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP9_29_28, LCD_DATA14_B, SEL_LCDC_1),
-
-        /* IPSE10 */
-        PINMUX_IPSR_DATA(IP10_2_0, SSI_SCK23),
-        PINMUX_IPSR_MODSEL_DATA(IP10_2_0, VI1_4_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_2_0, RX1_D, SEL_SCIF1_3),
-        PINMUX_IPSR_MODSEL_DATA(IP10_2_0, FCLE_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_2_0, LCD_DATA15_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_DATA(IP10_5_3, SSI_WS23),
-        PINMUX_IPSR_MODSEL_DATA(IP10_5_3, VI1_5_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_5_3, TX1_D, SEL_SCIF1_3),
-        PINMUX_IPSR_MODSEL_DATA(IP10_5_3, HSCK0_C, SEL_HSCIF_2),
-        PINMUX_IPSR_MODSEL_DATA(IP10_5_3, FALE_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_5_3, LCD_DON_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_DATA(IP10_8_6, SSI_SDATA2),
-        PINMUX_IPSR_MODSEL_DATA(IP10_8_6, VI1_6_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_8_6, HRX0_C, SEL_HSCIF_2),
-        PINMUX_IPSR_MODSEL_DATA(IP10_8_6, FRE_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_8_6, LCD_CL1_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_DATA(IP10_11_9, SSI_SDATA3),
-        PINMUX_IPSR_MODSEL_DATA(IP10_11_9, VI1_7_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_11_9, HTX0_C, SEL_HSCIF_2),
-        PINMUX_IPSR_MODSEL_DATA(IP10_11_9, FWE_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_11_9, LCD_CL2_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_14_12, AUDIO_CLKA_A, SEL_AUDIO_CLKA_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_14_12, VI1_CLK_B, SEL_VIN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SCK1_D, SEL_SCIF1_3),
-        PINMUX_IPSR_MODSEL_DATA(IP10_14_12, IECLK_B, SEL_IEBUS_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_14_12, LCD_FLM_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_15, AUDIO_CLKB_A, SEL_AUDIO_CLKB_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_15, LCD_CLK_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_DATA(IP10_18_16, AUDIO_CLKC),
-        PINMUX_IPSR_MODSEL_DATA(IP10_18_16, SCK1_E, SEL_SCIF1_4),
-        PINMUX_IPSR_MODSEL_DATA(IP10_18_16, HCTS0_C, SEL_HSCIF_2),
-        PINMUX_IPSR_MODSEL_DATA(IP10_18_16, FRB_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_18_16, LCD_VEPWC_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_DATA(IP10_21_19, AUDIO_CLKOUT),
-        PINMUX_IPSR_MODSEL_DATA(IP10_21_19, TX1_E, SEL_SCIF1_4),
-        PINMUX_IPSR_MODSEL_DATA(IP10_21_19, HRTS0_C, SEL_HSCIF_2),
-        PINMUX_IPSR_MODSEL_DATA(IP10_21_19, FSE_B, SEL_FLCTL_1),
-        PINMUX_IPSR_MODSEL_DATA(IP10_21_19, LCD_M_DISP_B, SEL_LCDC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_22, CAN_CLK_A, SEL_RCAN_CLK_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_22, RX4_D, SEL_SCIF4_3),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_24_23, CAN0_TX_A, SEL_RCAN0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_24_23, TX4_D, SEL_SCIF4_3),
-        PINMUX_IPSR_DATA(IP10_24_23, MLB_CLK),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_25, CAN1_RX_A, SEL_RCAN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_25, IRQ1_B, SEL_INTC_1),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_27_26, CAN0_RX_A, SEL_RCAN0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_27_26, IRQ0_B, SEL_INTC_1),
-        PINMUX_IPSR_DATA(IP10_27_26, MLB_SIG),
-
-        PINMUX_IPSR_MODSEL_DATA(IP10_29_28, CAN1_TX_A, SEL_RCAN1_0),
-        PINMUX_IPSR_MODSEL_DATA(IP10_29_28, TX5_C, SEL_SCIF1_2),
-        PINMUX_IPSR_DATA(IP10_29_28, MLB_DAT),
-
-        /* IPSR11 */
-        PINMUX_IPSR_DATA(IP11_0, SCL1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_0, SCIF_CLK_C, SEL_SCIF_CLK_2),
-
-        PINMUX_IPSR_DATA(IP11_1, SDA1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_0, RX1_E, SEL_SCIF1_4),
-
-        PINMUX_IPSR_DATA(IP11_2, SDA0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_2, HIFEBL_A, SEL_HIF_0),
-
-        PINMUX_IPSR_DATA(IP11_3, SDSELF),
-        PINMUX_IPSR_MODSEL_DATA(IP11_3, RTS1_E, SEL_SCIF1_3),
-
-        PINMUX_IPSR_MODSEL_DATA(IP11_6_4, SCIF_CLK_A, SEL_SCIF_CLK_0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_6_4, HSPI_CLK_A, SEL_HSPI_0),
-        PINMUX_IPSR_DATA(IP11_6_4, VI0_CLK),
-        PINMUX_IPSR_MODSEL_DATA(IP11_6_4, RMII0_TXD0_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP11_6_4, ET0_ERXD4),
-
-        PINMUX_IPSR_MODSEL_DATA(IP11_9_7, SCK0_A, SEL_SCIF0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_9_7, HSPI_CS_A, SEL_HSPI_0),
-        PINMUX_IPSR_DATA(IP11_9_7, VI0_CLKENB),
-        PINMUX_IPSR_MODSEL_DATA(IP11_9_7, RMII0_TXD1_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP11_9_7, ET0_ERXD5),
-
-        PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RX0_A, SEL_SCIF0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_11_10, HSPI_RX_A, SEL_HSPI_0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RMII0_RXD0_A, SEL_RMII_0),
-        PINMUX_IPSR_DATA(IP11_11_10, ET0_ERXD6),
-
-        PINMUX_IPSR_MODSEL_DATA(IP11_12, TX0_A, SEL_SCIF0_0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_12, HSPI_TX_A, SEL_HSPI_0),
-
-        PINMUX_IPSR_DATA(IP11_15_13, PENC1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX3_D, SEL_SCIF3_3),
-        PINMUX_IPSR_MODSEL_DATA(IP11_15_13, CAN1_TX_B,  SEL_RCAN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX5_D, SEL_SCIF5_3),
-        PINMUX_IPSR_MODSEL_DATA(IP11_15_13, IETX_B, SEL_IEBUS_1),
-
-        PINMUX_IPSR_DATA(IP11_18_16, USB_OVC1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX3_D, SEL_SCIF3_3),
-        PINMUX_IPSR_MODSEL_DATA(IP11_18_16, CAN1_RX_B, SEL_RCAN1_1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX5_D, SEL_SCIF5_3),
-        PINMUX_IPSR_MODSEL_DATA(IP11_18_16, IERX_B, SEL_IEBUS_1),
-
-        PINMUX_IPSR_DATA(IP11_20_19, DREQ0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_20_19, SD1_CLK_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP11_20_19, ET0_TX_EN),
-
-        PINMUX_IPSR_DATA(IP11_22_21, DACK0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_22_21, SD1_DAT3_A, SEL_SDHI1_0),
-        PINMUX_IPSR_DATA(IP11_22_21, ET0_TX_ER),
-
-        PINMUX_IPSR_DATA(IP11_25_23, DREQ1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_25_23, HSPI_CLK_B, SEL_HSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_25_23, RX4_B, SEL_SCIF4_1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_PHY_INT_C, SEL_ET0_CTL_0),
-        PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_TX_CLK_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP11_27_26, DACK1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_27_26, HSPI_CS_B, SEL_HSPI_1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_27_26, TX4_B, SEL_SCIF3_1),
-        PINMUX_IPSR_MODSEL_DATA(IP11_27_26, ET0_RX_CLK_A, SEL_ET0_0),
-
-        PINMUX_IPSR_DATA(IP11_28, PRESETOUT),
-        PINMUX_IPSR_DATA(IP11_28, ST_CLKOUT),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
-        PINMUX_GPIO_GP_ALL(),
-
-        GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0),
-        GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1),
-        GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0),
-        GPIO_FN(IRQ2_B), GPIO_FN(IRQ3_B),
-
-        /* IPSR0 */
-        GPIO_FN(A0), GPIO_FN(ST0_CLKIN), GPIO_FN(LCD_DATA0_A),
-        GPIO_FN(TCLKA_C),
-        GPIO_FN(A1), GPIO_FN(ST0_REQ), GPIO_FN(LCD_DATA1_A),
-        GPIO_FN(TCLKB_C),
-        GPIO_FN(A2), GPIO_FN(ST0_SYC), GPIO_FN(LCD_DATA2_A),
-        GPIO_FN(TCLKC_C),
-        GPIO_FN(A3), GPIO_FN(ST0_VLD), GPIO_FN(LCD_DATA3_A),
-        GPIO_FN(TCLKD_C),
-        GPIO_FN(A4), GPIO_FN(ST0_D0), GPIO_FN(LCD_DATA4_A),
-        GPIO_FN(TIOC0A_C),
-        GPIO_FN(A5), GPIO_FN(ST0_D1), GPIO_FN(LCD_DATA5_A),
-        GPIO_FN(TIOC0B_C),
-        GPIO_FN(A6), GPIO_FN(ST0_D2), GPIO_FN(LCD_DATA6_A),
-        GPIO_FN(TIOC0C_C),
-        GPIO_FN(A7), GPIO_FN(ST0_D3), GPIO_FN(LCD_DATA7_A),
-        GPIO_FN(TIOC0D_C),
-        GPIO_FN(A8), GPIO_FN(ST0_D4), GPIO_FN(LCD_DATA8_A),
-        GPIO_FN(TIOC1A_C),
-        GPIO_FN(A9), GPIO_FN(ST0_D5), GPIO_FN(LCD_DATA9_A),
-        GPIO_FN(TIOC1B_C),
-        GPIO_FN(A10), GPIO_FN(ST0_D6), GPIO_FN(LCD_DATA10_A),
-        GPIO_FN(TIOC2A_C),
-        GPIO_FN(A11), GPIO_FN(ST0_D7), GPIO_FN(LCD_DATA11_A),
-        GPIO_FN(TIOC2B_C),
-        GPIO_FN(A12), GPIO_FN(LCD_DATA12_A), GPIO_FN(TIOC3A_C),
-        GPIO_FN(A13), GPIO_FN(LCD_DATA13_A), GPIO_FN(TIOC3B_C),
-        GPIO_FN(A14), GPIO_FN(LCD_DATA14_A), GPIO_FN(TIOC3C_C),
-        GPIO_FN(A15), GPIO_FN(ST0_VCO_CLKIN), GPIO_FN(LCD_DATA15_A),
-        GPIO_FN(TIOC3D_C),
-
-        /* IPSR1 */
-        GPIO_FN(A16), GPIO_FN(ST0_PWM), GPIO_FN(LCD_DON_A),
-        GPIO_FN(TIOC4A_C),
-        GPIO_FN(A17), GPIO_FN(ST1_VCO_CLKIN), GPIO_FN(LCD_CL1_A),
-        GPIO_FN(TIOC4B_C),
-        GPIO_FN(A18), GPIO_FN(ST1_PWM), GPIO_FN(LCD_CL2_A),
-        GPIO_FN(TIOC4C_C),
-        GPIO_FN(A19), GPIO_FN(ST1_CLKIN), GPIO_FN(LCD_CLK_A),
-        GPIO_FN(TIOC4D_C),
-        GPIO_FN(A20), GPIO_FN(ST1_REQ), GPIO_FN(LCD_FLM_A),
-        GPIO_FN(A21), GPIO_FN(ST1_SYC), GPIO_FN(LCD_VCPWC_A),
-        GPIO_FN(A22), GPIO_FN(ST1_VLD), GPIO_FN(LCD_VEPWC_A),
-        GPIO_FN(A23), GPIO_FN(ST1_D0), GPIO_FN(LCD_M_DISP_A),
-        GPIO_FN(A24), GPIO_FN(RX2_D), GPIO_FN(ST1_D1),
-        GPIO_FN(A25), GPIO_FN(TX2_D), GPIO_FN(ST1_D2),
-        GPIO_FN(D0), GPIO_FN(SD0_DAT0_A), GPIO_FN(MMC_D0_A),
-        GPIO_FN(ST1_D3), GPIO_FN(FD0_A),
-        GPIO_FN(D1), GPIO_FN(SD0_DAT1_A), GPIO_FN(MMC_D1_A),
-        GPIO_FN(ST1_D4), GPIO_FN(FD1_A),
-        GPIO_FN(D2), GPIO_FN(SD0_DAT2_A), GPIO_FN(MMC_D2_A),
-        GPIO_FN(ST1_D5), GPIO_FN(FD2_A),
-        GPIO_FN(D3), GPIO_FN(SD0_DAT3_A), GPIO_FN(MMC_D3_A),
-        GPIO_FN(ST1_D6), GPIO_FN(FD3_A),
-
-        /* IPSR2 */
-        GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7),
-        GPIO_FN(FD4_A),
-        GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),
-        GPIO_FN(D6), GPIO_FN(RSPI_RSPCK_A), GPIO_FN(MMC_D6_A),
-                GPIO_FN(QSPCLK_A),
-        GPIO_FN(FD6_A),
-        GPIO_FN(D7), GPIO_FN(RSPI_SSL_A), GPIO_FN(MMC_D7_A), GPIO_FN(QSSL_A),
-        GPIO_FN(FD7_A),
-        GPIO_FN(D8), GPIO_FN(SD0_CLK_A), GPIO_FN(MMC_CLK_A), GPIO_FN(QIO2_A),
-        GPIO_FN(FCE_A), GPIO_FN(ET0_GTX_CLK_B),
-        GPIO_FN(D9), GPIO_FN(SD0_CMD_A), GPIO_FN(MMC_CMD_A), GPIO_FN(QIO3_A),
-        GPIO_FN(FCLE_A), GPIO_FN(ET0_ETXD1_B),
-        GPIO_FN(D10), GPIO_FN(RSPI_MOSI_A), GPIO_FN(QMO_QIO0_A),
-                GPIO_FN(FALE_A), GPIO_FN(ET0_ETXD2_B),
-        GPIO_FN(D11), GPIO_FN(RSPI_MISO_A), GPIO_FN(QMI_QIO1_A), GPIO_FN(FRE_A),
-                GPIO_FN(ET0_ETXD3_B),
-        GPIO_FN(D12), GPIO_FN(FWE_A), GPIO_FN(ET0_ETXD5_B),
-        GPIO_FN(D13), GPIO_FN(RX2_B), GPIO_FN(FRB_A), GPIO_FN(ET0_ETXD6_B),
-        GPIO_FN(D14), GPIO_FN(TX2_B), GPIO_FN(FSE_A), GPIO_FN(ET0_TX_CLK_B),
-
-        /* IPSR3 */
-        GPIO_FN(D15), GPIO_FN(SCK2_B),
-        GPIO_FN(CS1_A26), GPIO_FN(QIO3_B),
-        GPIO_FN(EX_CS1), GPIO_FN(RX3_B), GPIO_FN(ATACS0), GPIO_FN(QIO2_B),
-        GPIO_FN(ET0_ETXD0),
-        GPIO_FN(EX_CS2), GPIO_FN(TX3_B), GPIO_FN(ATACS1), GPIO_FN(QSPCLK_B),
-        GPIO_FN(ET0_GTX_CLK_A),
-        GPIO_FN(EX_CS3), GPIO_FN(SD1_CD_A), GPIO_FN(ATARD), GPIO_FN(QMO_QIO0_B),
-        GPIO_FN(ET0_ETXD1_A),
-        GPIO_FN(EX_CS4), GPIO_FN(SD1_WP_A), GPIO_FN(ATAWR), GPIO_FN(QMI_QIO1_B),
-        GPIO_FN(ET0_ETXD2_A),
-        GPIO_FN(EX_CS5), GPIO_FN(SD1_CMD_A), GPIO_FN(ATADIR), GPIO_FN(QSSL_B),
-        GPIO_FN(ET0_ETXD3_A),
-        GPIO_FN(RD_WR), GPIO_FN(TCLK1_B),
-        GPIO_FN(EX_WAIT0), GPIO_FN(TCLK1_B),
-        GPIO_FN(EX_WAIT1), GPIO_FN(SD1_DAT0_A), GPIO_FN(DREQ2),
-                GPIO_FN(CAN1_TX_C), GPIO_FN(ET0_LINK_C), GPIO_FN(ET0_ETXD5_A),
-        GPIO_FN(EX_WAIT2), GPIO_FN(SD1_DAT1_A), GPIO_FN(DACK2),
-                GPIO_FN(CAN1_RX_C), GPIO_FN(ET0_MAGIC_C), GPIO_FN(ET0_ETXD6_A),
-        GPIO_FN(DRACK0), GPIO_FN(SD1_DAT2_A), GPIO_FN(ATAG), GPIO_FN(TCLK1_A),
-        GPIO_FN(ET0_ETXD7),
-
-        /* IPSR4 */
-        GPIO_FN(HCTS0_A), GPIO_FN(CTS1_A), GPIO_FN(VI0_FIELD),
-                GPIO_FN(RMII0_RXD1_A), GPIO_FN(ET0_ERXD7),
-        GPIO_FN(HRTS0_A), GPIO_FN(RTS1_A), GPIO_FN(VI0_HSYNC),
-                GPIO_FN(RMII0_TXD_EN_A), GPIO_FN(ET0_RX_DV),
-        GPIO_FN(HSCK0_A), GPIO_FN(SCK1_A), GPIO_FN(VI0_VSYNC),
-                GPIO_FN(RMII0_RX_ER_A), GPIO_FN(ET0_RX_ER),
-        GPIO_FN(HRX0_A), GPIO_FN(RX1_A), GPIO_FN(VI0_DATA0_VI0_B0),
-                GPIO_FN(RMII0_CRS_DV_A), GPIO_FN(ET0_CRS),
-        GPIO_FN(HTX0_A), GPIO_FN(TX1_A), GPIO_FN(VI0_DATA1_VI0_B1),
-                GPIO_FN(RMII0_MDC_A), GPIO_FN(ET0_COL),
-        GPIO_FN(CTS0_B), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(RMII0_MDIO_A),
-                GPIO_FN(ET0_MDC),
-        GPIO_FN(RTS0_B), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ET0_MDIO_A),
-        GPIO_FN(SCK1_B), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ET0_LINK_A),
-        GPIO_FN(RX1_B), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(ET0_MAGIC_A),
-        GPIO_FN(TX1_B), GPIO_FN(VI0_DATA6_VI0_G0), GPIO_FN(ET0_PHY_INT_A),
-        GPIO_FN(CTS1_B), GPIO_FN(VI0_DATA7_VI0_G1),
-        GPIO_FN(RTS1_B), GPIO_FN(VI0_G2),
-        GPIO_FN(SCK2_A), GPIO_FN(VI0_G3),
-
-        /* IPSR5 */
-        GPIO_FN(REF50CK), GPIO_FN(CTS1_E), GPIO_FN(HCTS0_D),
-        GPIO_FN(REF125CK), GPIO_FN(ADTRG), GPIO_FN(RX5_C),
-        GPIO_FN(SD2_WP_A), GPIO_FN(TX5_A), GPIO_FN(VI0_R5),
-        GPIO_FN(SD2_CD_A), GPIO_FN(RX5_A), GPIO_FN(VI0_R4),
-                GPIO_FN(ET0_PHY_INT_B),
-        GPIO_FN(SD2_DAT3_A), GPIO_FN(TX4_A), GPIO_FN(VI0_R3),
-                GPIO_FN(ET0_MAGIC_B),
-        GPIO_FN(SD2_DAT2_A), GPIO_FN(RX4_A), GPIO_FN(VI0_R2),
-                GPIO_FN(ET0_LINK_B),
-        GPIO_FN(SD2_DAT1_A), GPIO_FN(TX3_A), GPIO_FN(VI0_R1),
-                GPIO_FN(ET0_MDIO_B),
-        GPIO_FN(SD2_DAT0_A), GPIO_FN(RX3_A), GPIO_FN(VI0_R0),
-                GPIO_FN(ET0_ERXD3_B),
-        GPIO_FN(SD2_CMD_A), GPIO_FN(TX2_A), GPIO_FN(VI0_G5),
-                GPIO_FN(ET0_ERXD2_B),
-        GPIO_FN(SD2_CLK_A), GPIO_FN(RX2_A), GPIO_FN(VI0_G4),
-                GPIO_FN(ET0_RX_CLK_B),
-
-        /* IPSR6 */
-        GPIO_FN(DU0_DG1), GPIO_FN(CTS1_C), GPIO_FN(HRTS0_D),
-                GPIO_FN(TIOC1B_A), GPIO_FN(HIFD09),
-        GPIO_FN(DU0_DG0), GPIO_FN(TX1_C), GPIO_FN(HSCK0_D),
-                GPIO_FN(IECLK_A), GPIO_FN(TIOC1A_A), GPIO_FN(HIFD08),
-        GPIO_FN(DU0_DR7), GPIO_FN(RX1_C), GPIO_FN(TIOC0D_A),
-                GPIO_FN(HIFD07),
-        GPIO_FN(DU0_DR6), GPIO_FN(SCK1_C), GPIO_FN(TIOC0C_A),
-                GPIO_FN(HIFD06),
-        GPIO_FN(DU0_DR5), GPIO_FN(RTS0_C), GPIO_FN(TIOC0B_A),
-                GPIO_FN(HIFD05),
-        GPIO_FN(DU0_DR4), GPIO_FN(CTS0_C), GPIO_FN(TIOC0A_A),
-                GPIO_FN(HIFD04),
-        GPIO_FN(DU0_DR3), GPIO_FN(TX0_B), GPIO_FN(TCLKD_A), GPIO_FN(HIFD03),
-        GPIO_FN(DU0_DR2), GPIO_FN(RX0_B), GPIO_FN(TCLKC_A), GPIO_FN(HIFD02),
-        GPIO_FN(DU0_DR1), GPIO_FN(SCK0_B), GPIO_FN(HTX0_D),
-                GPIO_FN(IERX_A), GPIO_FN(TCLKB_A), GPIO_FN(HIFD01),
-        GPIO_FN(DU0_DR0), GPIO_FN(SCIF_CLK_B), GPIO_FN(HRX0_D),
-                GPIO_FN(IETX_A), GPIO_FN(TCLKA_A), GPIO_FN(HIFD00),
-
-        /* IPSR7 */
-        GPIO_FN(DU0_DB4), GPIO_FN(HIFINT),
-        GPIO_FN(DU0_DB3), GPIO_FN(TX5_B), GPIO_FN(TIOC4D_A), GPIO_FN(HIFRD),
-        GPIO_FN(DU0_DB2), GPIO_FN(RX5_B), GPIO_FN(RMII0_TXD1_B),
-                GPIO_FN(TIOC4C_A), GPIO_FN(HIFWR),
-        GPIO_FN(DU0_DB1), GPIO_FN(TX4_C), GPIO_FN(RMII0_TXD0_B),
-                GPIO_FN(TIOC4B_A), GPIO_FN(HIFRS),
-        GPIO_FN(DU0_DB0), GPIO_FN(RX4_C), GPIO_FN(RMII0_TXD_EN_B),
-                GPIO_FN(TIOC4A_A), GPIO_FN(HIFCS),
-        GPIO_FN(DU0_DG7), GPIO_FN(TX3_C), GPIO_FN(RMII0_RXD1_B),
-                GPIO_FN(TIOC3D_A), GPIO_FN(HIFD15),
-        GPIO_FN(DU0_DG6), GPIO_FN(RX3_C), GPIO_FN(RMII0_RXD0_B),
-                GPIO_FN(TIOC3C_A), GPIO_FN(HIFD14),
-        GPIO_FN(DU0_DG5), GPIO_FN(TX2_C), GPIO_FN(RMII0_RX_ER_B),
-                GPIO_FN(TIOC3B_A), GPIO_FN(HIFD13),
-        GPIO_FN(DU0_DG4), GPIO_FN(RX2_C), GPIO_FN(RMII0_CRS_DV_B),
-                GPIO_FN(TIOC3A_A), GPIO_FN(HIFD12),
-        GPIO_FN(DU0_DG3), GPIO_FN(SCK2_C), GPIO_FN(RMII0_MDIO_B),
-                GPIO_FN(TIOC2B_A), GPIO_FN(HIFD11),
-        GPIO_FN(DU0_DG2), GPIO_FN(RTS1_C), GPIO_FN(RMII0_MDC_B),
-                GPIO_FN(TIOC2A_A), GPIO_FN(HIFD10),
-
-        /* IPSR8 */
-        GPIO_FN(IRQ3_A), GPIO_FN(RTS0_A), GPIO_FN(HRTS0_B),
-                GPIO_FN(ET0_ERXD3_A),
-        GPIO_FN(IRQ2_A), GPIO_FN(CTS0_A), GPIO_FN(HCTS0_B),
-                GPIO_FN(ET0_ERXD2_A),
-        GPIO_FN(IRQ1_A), GPIO_FN(HSPI_RX_B), GPIO_FN(TX3_E),
-                GPIO_FN(ET0_ERXD1),
-        GPIO_FN(IRQ0_A), GPIO_FN(HSPI_TX_B), GPIO_FN(RX3_E),
-                GPIO_FN(ET0_ERXD0),
-        GPIO_FN(DU0_CDE), GPIO_FN(HTX0_B), GPIO_FN(AUDIO_CLKB_B),
-                GPIO_FN(LCD_VCPWC_B),
-        GPIO_FN(DU0_DISP), GPIO_FN(CAN0_TX_B), GPIO_FN(HRX0_B),
-                GPIO_FN(AUDIO_CLKA_B),
-        GPIO_FN(DU0_EXODDF_DU0_ODDF), GPIO_FN(CAN0_RX_B), GPIO_FN(HSCK0_B),
-                GPIO_FN(SSI_SDATA1_B),
-        GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(HSPI_RX0_C),
-                GPIO_FN(SSI_WS1_B),
-        GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(HSPI_TX0_C),
-                GPIO_FN(SSI_SCK1_B),
-        GPIO_FN(DU0_DOTCLKOUT), GPIO_FN(HSPI_CLK0_C),
-                GPIO_FN(SSI_SDATA0_B),
-        GPIO_FN(DU0_DOTCLKIN), GPIO_FN(HSPI_CS0_C),
-                GPIO_FN(SSI_WS0_B),
-        GPIO_FN(DU0_DB7), GPIO_FN(SSI_SCK0_B), GPIO_FN(HIFEBL_B),
-        GPIO_FN(DU0_DB6), GPIO_FN(HIFRDY),
-        GPIO_FN(DU0_DB5), GPIO_FN(HIFDREQ),
-
-        /* IPSR9 */
-        GPIO_FN(SSI_SDATA1_A), GPIO_FN(VI1_3_B), GPIO_FN(LCD_DATA14_B),
-        GPIO_FN(SSI_WS1_A), GPIO_FN(VI1_2_B), GPIO_FN(LCD_DATA13_B),
-        GPIO_FN(SSI_SCK1_A), GPIO_FN(VI1_1_B), GPIO_FN(TIOC2B_B),
-                GPIO_FN(LCD_DATA12_B),
-        GPIO_FN(SSI_SDATA0_A), GPIO_FN(VI1_0_B), GPIO_FN(TIOC2A_B),
-                GPIO_FN(LCD_DATA11_B),
-        GPIO_FN(SSI_WS0_A), GPIO_FN(TIOC1B_B), GPIO_FN(LCD_DATA10_B),
-        GPIO_FN(SSI_SCK0_A), GPIO_FN(TIOC1A_B), GPIO_FN(LCD_DATA9_B),
-        GPIO_FN(VI1_7_A), GPIO_FN(FCE_B), GPIO_FN(LCD_DATA8_B),
-        GPIO_FN(VI1_6_A), GPIO_FN(FD7_B), GPIO_FN(LCD_DATA7_B),
-        GPIO_FN(VI1_5_A), GPIO_FN(FD6_B), GPIO_FN(LCD_DATA6_B),
-        GPIO_FN(VI1_4_A), GPIO_FN(FD5_B), GPIO_FN(LCD_DATA5_B),
-        GPIO_FN(VI1_3_A), GPIO_FN(FD4_B), GPIO_FN(LCD_DATA4_B),
-        GPIO_FN(VI1_2_A), GPIO_FN(FD3_B), GPIO_FN(LCD_DATA3_B),
-        GPIO_FN(VI1_1_A), GPIO_FN(FD2_B), GPIO_FN(LCD_DATA2_B),
-        GPIO_FN(VI1_0_A), GPIO_FN(FD1_B), GPIO_FN(LCD_DATA1_B),
-        GPIO_FN(VI1_CLK_A), GPIO_FN(FD0_B), GPIO_FN(LCD_DATA0_B),
-
-        /* IPSR10 */
-        GPIO_FN(CAN1_TX_A), GPIO_FN(TX5_C), GPIO_FN(MLB_DAT),
-        GPIO_FN(CAN0_RX_A), GPIO_FN(IRQ0_B), GPIO_FN(MLB_SIG),
-        GPIO_FN(CAN1_RX_A), GPIO_FN(IRQ1_B),
-        GPIO_FN(CAN0_TX_A), GPIO_FN(TX4_D), GPIO_FN(MLB_CLK),
-        GPIO_FN(CAN_CLK_A), GPIO_FN(RX4_D),
-        GPIO_FN(AUDIO_CLKOUT), GPIO_FN(TX1_E), GPIO_FN(HRTS0_C),
-                GPIO_FN(FSE_B), GPIO_FN(LCD_M_DISP_B),
-        GPIO_FN(AUDIO_CLKC), GPIO_FN(SCK1_E), GPIO_FN(HCTS0_C),
-                GPIO_FN(FRB_B), GPIO_FN(LCD_VEPWC_B),
-        GPIO_FN(AUDIO_CLKB_A), GPIO_FN(LCD_CLK_B),
-        GPIO_FN(AUDIO_CLKA_A), GPIO_FN(VI1_CLK_B), GPIO_FN(SCK1_D),
-                GPIO_FN(IECLK_B), GPIO_FN(LCD_FLM_B),
-        GPIO_FN(SSI_SDATA3), GPIO_FN(VI1_7_B), GPIO_FN(HTX0_C),
-                GPIO_FN(FWE_B), GPIO_FN(LCD_CL2_B),
-        GPIO_FN(SSI_SDATA2), GPIO_FN(VI1_6_B), GPIO_FN(HRX0_C),
-                GPIO_FN(FRE_B), GPIO_FN(LCD_CL1_B),
-        GPIO_FN(SSI_WS23), GPIO_FN(VI1_5_B), GPIO_FN(TX1_D),
-                GPIO_FN(HSCK0_C), GPIO_FN(FALE_B), GPIO_FN(LCD_DON_B),
-        GPIO_FN(SSI_SCK23), GPIO_FN(VI1_4_B), GPIO_FN(RX1_D),
-                GPIO_FN(FCLE_B), GPIO_FN(LCD_DATA15_B),
-
-        /* IPSR11 */
-        GPIO_FN(PRESETOUT), GPIO_FN(ST_CLKOUT),
-        GPIO_FN(DACK1), GPIO_FN(HSPI_CS_B), GPIO_FN(TX4_B),
-                GPIO_FN(ET0_RX_CLK_A),
-        GPIO_FN(DREQ1), GPIO_FN(HSPI_CLK_B), GPIO_FN(RX4_B),
-                GPIO_FN(ET0_PHY_INT_C), GPIO_FN(ET0_TX_CLK_A),
-        GPIO_FN(DACK0), GPIO_FN(SD1_DAT3_A), GPIO_FN(ET0_TX_ER),
-        GPIO_FN(DREQ0), GPIO_FN(SD1_CLK_A), GPIO_FN(ET0_TX_EN),
-        GPIO_FN(USB_OVC1), GPIO_FN(RX3_D), GPIO_FN(CAN1_RX_B),
-                GPIO_FN(RX5_D), GPIO_FN(IERX_B),
-        GPIO_FN(PENC1), GPIO_FN(TX3_D), GPIO_FN(CAN1_TX_B),
-                GPIO_FN(TX5_D), GPIO_FN(IETX_B),
-        GPIO_FN(TX0_A), GPIO_FN(HSPI_TX_A),
-        GPIO_FN(RX0_A), GPIO_FN(HSPI_RX_A), GPIO_FN(RMII0_RXD0_A),
-                GPIO_FN(ET0_ERXD6),
-        GPIO_FN(SCK0_A), GPIO_FN(HSPI_CS_A), GPIO_FN(VI0_CLKENB),
-                GPIO_FN(RMII0_TXD1_A), GPIO_FN(ET0_ERXD5),
-        GPIO_FN(SCIF_CLK_A), GPIO_FN(HSPI_CLK_A), GPIO_FN(VI0_CLK),
-                GPIO_FN(RMII0_TXD0_A), GPIO_FN(ET0_ERXD4),
-        GPIO_FN(SDSELF), GPIO_FN(RTS1_E),
-        GPIO_FN(SDA0), GPIO_FN(HIFEBL_A),
-        GPIO_FN(SDA1), GPIO_FN(RX1_E),
-        GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
-        { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) {
-                GP_0_31_FN, FN_IP2_2_0,
-                GP_0_30_FN, FN_IP1_31_29,
-                GP_0_29_FN, FN_IP1_28_26,
-                GP_0_28_FN, FN_IP1_25_23,
-                GP_0_27_FN, FN_IP1_22_20,
-                GP_0_26_FN, FN_IP1_19_18,
-                GP_0_25_FN, FN_IP1_17_16,
-                GP_0_24_FN, FN_IP0_5_4,
-                GP_0_23_FN, FN_IP0_3_2,
-                GP_0_22_FN, FN_IP0_1_0,
-                GP_0_21_FN, FN_IP11_28,
-                GP_0_20_FN, FN_IP1_7_6,
-                GP_0_19_FN, FN_IP1_5_4,
-                GP_0_18_FN, FN_IP1_3_2,
-                GP_0_17_FN, FN_IP1_1_0,
-                GP_0_16_FN, FN_IP0_31_30,
-                GP_0_15_FN, FN_IP0_29_28,
-                GP_0_14_FN, FN_IP0_27_26,
-                GP_0_13_FN, FN_IP0_25_24,
-                GP_0_12_FN, FN_IP0_23_22,
-                GP_0_11_FN, FN_IP0_21_20,
-                GP_0_10_FN, FN_IP0_19_18,
-                GP_0_9_FN, FN_IP0_17_16,
-                GP_0_8_FN, FN_IP0_15_14,
-                GP_0_7_FN, FN_IP0_13_12,
-                GP_0_6_FN, FN_IP0_11_10,
-                GP_0_5_FN, FN_IP0_9_8,
-                GP_0_4_FN, FN_IP0_7_6,
-                GP_0_3_FN, FN_IP1_15_14,
-                GP_0_2_FN, FN_IP1_13_12,
-                GP_0_1_FN, FN_IP1_11_10,
-                GP_0_0_FN, FN_IP1_9_8 }
-        },
-        { PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1) {
-                GP_1_31_FN, FN_IP11_25_23,
-                GP_1_30_FN, FN_IP2_13_11,
-                GP_1_29_FN, FN_IP2_10_8,
-                GP_1_28_FN, FN_IP2_7_5,
-                GP_1_27_FN, FN_IP3_26_24,
-                GP_1_26_FN, FN_IP3_23_21,
-                GP_1_25_FN, FN_IP2_4_3,
-                GP_1_24_FN, FN_WE1,
-                GP_1_23_FN, FN_WE0,
-                GP_1_22_FN, FN_IP3_19_18,
-                GP_1_21_FN, FN_RD,
-                GP_1_20_FN, FN_IP3_17_15,
-                GP_1_19_FN, FN_IP3_14_12,
-                GP_1_18_FN, FN_IP3_11_9,
-                GP_1_17_FN, FN_IP3_8_6,
-                GP_1_16_FN, FN_IP3_5_3,
-                GP_1_15_FN, FN_EX_CS0,
-                GP_1_14_FN, FN_IP3_2,
-                GP_1_13_FN, FN_CS0,
-                GP_1_12_FN, FN_BS,
-                GP_1_11_FN, FN_CLKOUT,
-                GP_1_10_FN, FN_IP3_1_0,
-                GP_1_9_FN, FN_IP2_30_28,
-                GP_1_8_FN, FN_IP2_27_25,
-                GP_1_7_FN, FN_IP2_24_23,
-                GP_1_6_FN, FN_IP2_22_20,
-                GP_1_5_FN, FN_IP2_19_17,
-                GP_1_4_FN, FN_IP2_16_14,
-                GP_1_3_FN, FN_IP11_22_21,
-                GP_1_2_FN, FN_IP11_20_19,
-                GP_1_1_FN, FN_IP3_29_27,
-                GP_1_0_FN, FN_IP3_20 }
-        },
-        { PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1) {
-                GP_2_31_FN, FN_IP4_31_30,
-                GP_2_30_FN, FN_IP5_2_0,
-                GP_2_29_FN, FN_IP5_5_3,
-                GP_2_28_FN, FN_IP5_8_6,
-                GP_2_27_FN, FN_IP5_11_9,
-                GP_2_26_FN, FN_IP5_14_12,
-                GP_2_25_FN, FN_IP5_17_15,
-                GP_2_24_FN, FN_IP5_20_18,
-                GP_2_23_FN, FN_IP5_22_21,
-                GP_2_22_FN, FN_IP5_24_23,
-                GP_2_21_FN, FN_IP5_26_25,
-                GP_2_20_FN, FN_IP4_29_28,
-                GP_2_19_FN, FN_IP4_27_26,
-                GP_2_18_FN, FN_IP4_25_24,
-                GP_2_17_FN, FN_IP4_23_22,
-                GP_2_16_FN, FN_IP4_21_20,
-                GP_2_15_FN, FN_IP4_19_18,
-                GP_2_14_FN, FN_IP4_17_15,
-                GP_2_13_FN, FN_IP4_14_12,
-                GP_2_12_FN, FN_IP4_11_9,
-                GP_2_11_FN, FN_IP4_8_6,
-                GP_2_10_FN, FN_IP4_5_3,
-                GP_2_9_FN, FN_IP8_27_26,
-                GP_2_8_FN, FN_IP11_12,
-                GP_2_7_FN, FN_IP8_25_23,
-                GP_2_6_FN, FN_IP8_22_20,
-                GP_2_5_FN, FN_IP11_27_26,
-                GP_2_4_FN, FN_IP8_29_28,
-                GP_2_3_FN, FN_IP4_2_0,
-                GP_2_2_FN, FN_IP11_11_10,
-                GP_2_1_FN, FN_IP11_9_7,
-                GP_2_0_FN, FN_IP11_6_4 }
-        },
-        { PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1) {
-                GP_3_31_FN, FN_IP9_1_0,
-                GP_3_30_FN, FN_IP8_19_18,
-                GP_3_29_FN, FN_IP8_17_16,
-                GP_3_28_FN, FN_IP8_15_14,
-                GP_3_27_FN, FN_IP8_13_12,
-                GP_3_26_FN, FN_IP8_11_10,
-                GP_3_25_FN, FN_IP8_9_8,
-                GP_3_24_FN, FN_IP8_7_6,
-                GP_3_23_FN, FN_IP8_5_4,
-                GP_3_22_FN, FN_IP8_3_2,
-                GP_3_21_FN, FN_IP8_1_0,
-                GP_3_20_FN, FN_IP7_30_29,
-                GP_3_19_FN, FN_IP7_28_27,
-                GP_3_18_FN, FN_IP7_26_24,
-                GP_3_17_FN, FN_IP7_23_21,
-                GP_3_16_FN, FN_IP7_20_18,
-                GP_3_15_FN, FN_IP7_17_15,
-                GP_3_14_FN, FN_IP7_14_12,
-                GP_3_13_FN, FN_IP7_11_9,
-                GP_3_12_FN, FN_IP7_8_6,
-                GP_3_11_FN, FN_IP7_5_3,
-                GP_3_10_FN, FN_IP7_2_0,
-                GP_3_9_FN, FN_IP6_23_21,
-                GP_3_8_FN, FN_IP6_20_18,
-                GP_3_7_FN, FN_IP6_17_16,
-                GP_3_6_FN, FN_IP6_15_14,
-                GP_3_5_FN, FN_IP6_13_12,
-                GP_3_4_FN, FN_IP6_11_10,
-                GP_3_3_FN, FN_IP6_9_8,
-                GP_3_2_FN, FN_IP6_7_6,
-                GP_3_1_FN, FN_IP6_5_3,
-                GP_3_0_FN, FN_IP6_2_0 }
-        },
-
-        { PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1) {
-                GP_4_31_FN, FN_IP10_24_23,
-                GP_4_30_FN, FN_IP10_22,
-                GP_4_29_FN, FN_IP11_18_16,
-                GP_4_28_FN, FN_USB_OVC0,
-                GP_4_27_FN, FN_IP11_15_13,
-                GP_4_26_FN, FN_PENC0,
-                GP_4_25_FN, FN_IP11_2,
-                GP_4_24_FN, FN_SCL0,
-                GP_4_23_FN, FN_IP11_1,
-                GP_4_22_FN, FN_IP11_0,
-                GP_4_21_FN, FN_IP10_21_19,
-                GP_4_20_FN, FN_IP10_18_16,
-                GP_4_19_FN, FN_IP10_15,
-                GP_4_18_FN, FN_IP10_14_12,
-                GP_4_17_FN, FN_IP10_11_9,
-                GP_4_16_FN, FN_IP10_8_6,
-                GP_4_15_FN, FN_IP10_5_3,
-                GP_4_14_FN, FN_IP10_2_0,
-                GP_4_13_FN, FN_IP9_29_28,
-                GP_4_12_FN, FN_IP9_27_26,
-                GP_4_11_FN, FN_IP9_9_8,
-                GP_4_10_FN, FN_IP9_7_6,
-                GP_4_9_FN, FN_IP9_5_4,
-                GP_4_8_FN, FN_IP9_3_2,
-                GP_4_7_FN, FN_IP9_17_16,
-                GP_4_6_FN, FN_IP9_15_14,
-                GP_4_5_FN, FN_IP9_13_12,
-                GP_4_4_FN, FN_IP9_11_10,
-                GP_4_3_FN, FN_IP9_25_24,
-                GP_4_2_FN, FN_IP9_23_22,
-                GP_4_1_FN, FN_IP9_21_20,
-                GP_4_0_FN, FN_IP9_19_18 }
-        },
-        { PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 28 */
-                0, 0, 0, 0, 0, 0, 0, 0, /* 27 - 24 */
-                0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 20 */
-                0, 0, 0, 0, 0, 0, 0, 0, /* 19 - 16 */
-                0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */
-                GP_5_11_FN, FN_IP10_29_28,
-                GP_5_10_FN, FN_IP10_27_26,
-                0, 0, 0, 0, 0, 0, 0, 0, /* 9 - 6 */
-                0, 0, 0, 0, /* 5, 4 */
-                GP_5_3_FN, FN_IRQ3_B,
-                GP_5_2_FN, FN_IRQ2_B,
-                GP_5_1_FN, FN_IP11_3,
-                GP_5_0_FN, FN_IP10_25 }
-        },
-
-        { PINMUX_CFG_REG_VAR("IPSR0", 0xFFFC001C, 32,
-                        2, 2, 2, 2, 2, 2, 2, 2,
-                        2, 2, 2, 2, 2, 2, 2, 2) {
-                /* IP0_31_30 [2] */
-                FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A,
-                        FN_TIOC3D_C,
-                /* IP0_29_28 [2] */
-                FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C, 0,
-                /* IP0_27_26 [2] */
-                FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C, 0,
-                /* IP0_25_24 [2] */
-                FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C, 0,
-                /* IP0_23_22 [2] */
-                FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C,
-                /* IP0_21_20 [2] */
-                FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C,
-                /* IP0_19_18 [2] */
-                FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C,
-                /* IP0_17_16 [2] */
-                FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C,
-                /* IP0_15_14 [2] */
-                FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C,
-                /* IP0_13_12 [2] */
-                FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C,
-                /* IP0_11_10 [2] */
-                FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C,
-                /* IP0_9_8 [2] */
-                FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C,
-                /* IP0_7_6 [2] */
-                FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C,
-                /* IP0_5_4 [2] */
-                FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C,
-                /* IP0_3_2 [2] */
-                FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C,
-                /* IP0_1_0 [2] */
-                FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR1", 0xFFFC0020, 32,
-                        3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) {
-                /* IP1_31_29 [3] */
-                FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6,
-                        FN_FD3_A, 0, 0, 0,
-                /* IP1_28_26 [3] */
-                FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5,
-                        FN_FD2_A, 0, 0, 0,
-                /* IP1_25_23 [3] */
-                FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4,
-                        FN_FD1_A, 0, 0, 0,
-                /* IP1_22_20 [3] */
-                FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3,
-                        FN_FD0_A, 0, 0, 0,
-                /* IP1_19_18 [2] */
-                FN_A25, FN_TX2_D, FN_ST1_D2, 0,
-                /* IP1_17_16 [2] */
-                FN_A24, FN_RX2_D, FN_ST1_D1, 0,
-                /* IP1_15_14 [2] */
-                FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A, 0,
-                /* IP1_13_12 [2] */
-                FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A, 0,
-                /* IP1_11_10 [2] */
-                FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A, 0,
-                /* IP1_9_8 [2] */
-                FN_A20, FN_ST1_REQ, FN_LCD_FLM_A, 0,
-                /* IP1_7_6 [2] */
-                FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A,     FN_TIOC4D_C,
-                /* IP1_5_4 [2] */
-                FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C,
-                /* IP1_3_2 [2] */
-                FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A, FN_TIOC4B_C,
-                /* IP1_1_0 [2] */
-                FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR2", 0xFFFC0024, 32,
-                             1, 3, 3, 2, 3, 3, 3, 3, 3, 3, 2, 3) {
-                /* IP2_31 [1] */
-                0, 0,
-                /* IP2_30_28 [3] */
-                FN_D14, FN_TX2_B, 0, FN_FSE_A,
-                        FN_ET0_TX_CLK_B, 0, 0, 0,
-                /* IP2_27_25 [3] */
-                FN_D13, FN_RX2_B, 0, FN_FRB_A,
-                        FN_ET0_ETXD6_B, 0, 0, 0,
-                /* IP2_24_23 [2] */
-                FN_D12, 0, FN_FWE_A, FN_ET0_ETXD5_B,
-                /* IP2_22_20 [3] */
-                FN_D11, FN_RSPI_MISO_A, 0, FN_QMI_QIO1_A,
-                        FN_FRE_A, FN_ET0_ETXD3_B, 0, 0,
-                /* IP2_19_17 [3] */
-                FN_D10, FN_RSPI_MOSI_A, 0, FN_QMO_QIO0_A,
-                        FN_FALE_A, FN_ET0_ETXD2_B, 0, 0,
-                /* IP2_16_14 [3] */
-                FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A,
-                        FN_FCLE_A, FN_ET0_ETXD1_B, 0, 0,
-                /* IP2_13_11 [3] */
-                FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A,
-                        FN_FCE_A, FN_ET0_GTX_CLK_B, 0, 0,
-                /* IP2_10_8 [3] */
-                FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A,
-                        FN_FD7_A, 0, 0, 0,
-                /* IP2_7_5 [3] */
-                FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A,
-                        FN_FD6_A, 0, 0, 0,
-                /* IP2_4_3 [2] */
-                FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A,
-                /* IP2_2_0 [3] */
-                FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7,
-                        FN_FD4_A, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR3", 0xFFFC0028, 32,
-                                2, 3, 3, 3, 1, 2, 3, 3, 3, 3, 3, 1, 2) {
-            /* IP3_31_30 [2] */
-                0, 0, 0, 0,
-            /* IP3_29_27 [3] */
-                FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A,
-                FN_ET0_ETXD7, 0, 0, 0,
-            /* IP3_26_24 [3] */
-                FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C,
-                FN_ET0_MAGIC_C, FN_ET0_ETXD6_A, 0, 0,
-            /* IP3_23_21 [3] */
-                FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C,
-                FN_ET0_LINK_C, FN_ET0_ETXD5_A, 0, 0,
-            /* IP3_20 [1] */
-                FN_EX_WAIT0, FN_TCLK1_B,
-            /* IP3_19_18 [2] */
-                FN_RD_WR, FN_TCLK1_B, 0, 0,
-            /* IP3_17_15 [3] */
-                FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B,
-                FN_ET0_ETXD3_A, 0, 0, 0,
-            /* IP3_14_12 [3] */
-                FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B,
-                FN_ET0_ETXD2_A, 0, 0, 0,
-            /* IP3_11_9 [3] */
-                FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B,
-                FN_ET0_ETXD1_A, 0, 0, 0,
-            /* IP3_8_6 [3] */
-                FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B,
-                FN_ET0_GTX_CLK_A, 0, 0, 0,
-            /* IP3_5_3 [3] */
-                FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B,
-                FN_ET0_ETXD0, 0, 0, 0,
-            /* IP3_2 [1] */
-                FN_CS1_A26, FN_QIO3_B,
-            /* IP3_1_0 [2] */
-                FN_D15, FN_SCK2_B, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR4", 0xFFFC002C, 32,
-                                2, 2, 2, 2, 2, 2 , 2, 3, 3, 3, 3, 3, 3) {
-            /* IP4_31_30 [2] */
-                0, FN_SCK2_A, FN_VI0_G3, 0,
-            /* IP4_29_28 [2] */
-                0, FN_RTS1_B, FN_VI0_G2, 0,
-            /* IP4_27_26 [2] */
-                0, FN_CTS1_B, FN_VI0_DATA7_VI0_G1, 0,
-            /* IP4_25_24 [2] */
-                0, FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A,
-            /* IP4_23_22 [2] */
-                0, FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A,
-            /* IP4_21_20 [2] */
-                0, FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A,
-            /* IP4_19_18 [2] */
-                0, FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A,
-            /* IP4_17_15 [3] */
-                0, FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A,
-                        FN_ET0_MDC, 0, 0, 0,
-            /* IP4_14_12 [3] */
-                FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A,
-                        FN_ET0_COL, 0, 0, 0,
-            /* IP4_11_9 [3] */
-                FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A,
-                        FN_ET0_CRS, 0, 0, 0,
-            /* IP4_8_6 [3] */
-                FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A,
-                        FN_ET0_RX_ER, 0, 0, 0,
-            /* IP4_5_3 [3] */
-                FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A,
-                        FN_ET0_RX_DV, 0, 0, 0,
-            /* IP4_2_0 [3] */
-                FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A,
-                        FN_ET0_ERXD7, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR5", 0xFFFC0030, 32,
-                                1, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3) {
-            /* IP5_31 [1] */
-            0, 0,
-            /* IP5_30 [1] */
-            0, 0,
-            /* IP5_29 [1] */
-            0, 0,
-            /* IP5_28 [1] */
-            0, 0,
-            /* IP5_27 [1] */
-            0, 0,
-            /* IP5_26_25 [2] */
-                FN_REF50CK, FN_CTS1_E, FN_HCTS0_D, 0,
-            /* IP5_24_23 [2] */
-                FN_REF125CK, FN_ADTRG, FN_RX5_C, 0,
-            /* IP5_22_21 [2] */
-                FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5, 0,
-            /* IP5_20_18 [3] */
-                FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, 0,
-                0, 0, 0, FN_ET0_PHY_INT_B,
-            /* IP5_17_15 [3] */
-                FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, 0,
-                0, 0, 0, FN_ET0_MAGIC_B,
-            /* IP5_14_12 [3] */
-                FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, 0,
-                0, 0, 0, FN_ET0_LINK_B,
-            /* IP5_11_9 [3] */
-                FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, 0,
-                0, 0, 0, FN_ET0_MDIO_B,
-            /* IP5_8_6 [3] */
-                FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, 0,
-                0, 0, 0, FN_ET0_ERXD3_B,
-            /* IP5_5_3 [3] */
-                FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, 0,
-                0, 0, 0, FN_ET0_ERXD2_B,
-            /* IP5_2_0 [3] */
-                FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, 0,
-                FN_ET0_RX_CLK_B, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR6", 0xFFFC0034, 32,
-                                1, 1, 1, 1, 1, 1, 1, 1,
-                                3, 3, 2, 2, 2, 2, 2, 2, 3, 3) {
-            /* IP5_31 [1] */
-            0, 0,
-            /* IP6_30 [1] */
-            0, 0,
-            /* IP6_29 [1] */
-            0, 0,
-            /* IP6_28 [1] */
-            0, 0,
-            /* IP6_27 [1] */
-            0, 0,
-            /* IP6_26 [1] */
-            0, 0,
-            /* IP6_25 [1] */
-            0, 0,
-            /* IP6_24 [1] */
-            0, 0,
-            /* IP6_23_21 [3] */
-                FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A,
-                FN_HIFD09, 0, 0, 0,
-            /* IP6_20_18 [3] */
-                FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A,
-                FN_TIOC1A_A, FN_HIFD08, 0, 0,
-            /* IP6_17_16 [2] */
-                FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07,
-            /* IP6_15_14 [2] */
-                FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06,
-            /* IP6_13_12 [2] */
-                FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05,
-            /* IP6_11_10 [2] */
-                FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04,
-            /* IP6_9_8 [2] */
-                FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03,
-            /* IP6_7_6 [2] */
-                FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02,
-            /* IP6_5_3 [3] */
-                FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A,
-                FN_TCLKB_A, FN_HIFD01, 0, 0,
-            /* IP6_2_0 [3] */
-                FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A,
-                FN_TCLKA_A, FN_HIFD00, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR7", 0xFFFC0038, 32,
-                             1, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
-            /* IP7_31 [1] */
-            0, 0,
-            /* IP7_30_29 [2] */
-                FN_DU0_DB4, 0, FN_HIFINT, 0,
-            /* IP7_28_27 [2] */
-                FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD,
-            /* IP7_26_24 [3] */
-                FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A,
-                FN_HIFWR, 0, 0, 0,
-            /* IP7_23_21 [3] */
-                FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A,
-                FN_HIFRS, 0, 0, 0,
-            /* IP7_20_18 [3] */
-                FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A,
-                FN_HIFCS, 0, 0, 0,
-            /* IP7_17_15 [3] */
-                FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A,
-                FN_HIFD15, 0, 0, 0,
-            /* IP7_14_12 [3] */
-                FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A,
-                FN_HIFD14, 0, 0, 0,
-            /* IP7_11_9 [3] */
-                FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A,
-                FN_HIFD13, 0, 0, 0,
-            /* IP7_8_6 [3] */
-                FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A,
-                FN_HIFD12, 0, 0, 0,
-            /* IP7_5_3 [3] */
-                FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A,
-                FN_HIFD11, 0, 0, 0,
-            /* IP7_2_0 [3] */
-                FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A,
-                FN_HIFD10, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR8", 0xFFFC003C, 32,
-                             2, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) {
-            /* IP9_31_30 [2] */
-            0, 0, 0, 0,
-            /* IP8_29_28 [2] */
-                FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A,
-            /* IP8_27_26 [2] */
-                FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A,
-            /* IP8_25_23 [3] */
-                FN_IRQ1_A, 0, FN_HSPI_RX_B, FN_TX3_E,
-                        FN_ET0_ERXD1, 0, 0, 0,
-            /* IP8_22_20 [3] */
-                FN_IRQ0_A, 0, FN_HSPI_TX_B, FN_RX3_E,
-                        FN_ET0_ERXD0, 0, 0, 0,
-            /* IP8_19_18 [2] */
-                FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B,
-            /* IP8_17_16 [2] */
-                FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B,
-            /* IP8_15_14 [2] */
-                FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B,
-                        FN_SSI_SDATA1_B,
-            /* IP8_13_12 [2] */
-                FN_DU0_EXVSYNC_DU0_VSYNC, 0, FN_HSPI_RX0_C, FN_SSI_WS1_B,
-            /* IP8_11_10 [2] */
-                FN_DU0_EXHSYNC_DU0_HSYNC, 0, FN_HSPI_TX0_C, FN_SSI_SCK1_B,
-            /* IP8_9_8 [2] */
-                FN_DU0_DOTCLKOUT, 0, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B,
-            /* IP8_7_6 [2] */
-                FN_DU0_DOTCLKIN, 0, FN_HSPI_CS0_C, FN_SSI_WS0_B,
-            /* IP8_5_4 [2] */
-                FN_DU0_DB7, 0, FN_SSI_SCK0_B, FN_HIFEBL_B,
-            /* IP8_3_2 [2] */
-                FN_DU0_DB6, 0, FN_HIFRDY, 0,
-            /* IP8_1_0 [2] */
-                FN_DU0_DB5, 0, FN_HIFDREQ, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR9", 0xFFFC0040, 32,
-                             2, 2, 2, 2, 2, 2, 2, 2,
-                             2, 2, 2, 2, 2, 2, 2, 2) {
-            /* IP9_31_30 [2] */
-            0, 0, 0, 0,
-            /* IP9_29_28 [2] */
-                FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B, 0,
-            /* IP9_27_26 [2] */
-                FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B, 0,
-            /* IP9_25_24 [2] */
-                FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B,
-            /* IP9_23_22 [2] */
-                FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B,
-            /* IP9_21_20 [2] */
-                FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B, 0,
-            /* IP9_19_18 [2] */
-                FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B, 0,
-            /* IP9_17_16 [2] */
-                FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B, 0,
-            /* IP9_15_14 [2] */
-                FN_VI1_6_A, 0, FN_FD7_B, FN_LCD_DATA7_B,
-            /* IP9_13_12 [2] */
-                FN_VI1_5_A, 0, FN_FD6_B, FN_LCD_DATA6_B,
-            /* IP9_11_10 [2] */
-                FN_VI1_4_A, 0, FN_FD5_B, FN_LCD_DATA5_B,
-            /* IP9_9_8 [2] */
-                FN_VI1_3_A, 0, FN_FD4_B, FN_LCD_DATA4_B,
-            /* IP9_7_6 [2] */
-                FN_VI1_2_A, 0, FN_FD3_B, FN_LCD_DATA3_B,
-            /* IP9_5_4 [2] */
-                FN_VI1_1_A, 0, FN_FD2_B, FN_LCD_DATA2_B,
-            /* IP9_3_2 [2] */
-                FN_VI1_0_A, 0, FN_FD1_B, FN_LCD_DATA1_B,
-            /* IP9_1_0 [2] */
-                FN_VI1_CLK_A, 0, FN_FD0_B, FN_LCD_DATA0_B }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR10", 0xFFFC0044, 32,
-                                        2, 2, 2, 1, 2, 1, 3,
-                                        3, 1, 3, 3, 3, 3, 3) {
-            /* IP9_31_30 [2] */
-            0, 0, 0, 0,
-            /* IP10_29_28 [2] */
-                FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT, 0,
-            /* IP10_27_26 [2] */
-                FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG, 0,
-            /* IP10_25 [1] */
-                FN_CAN1_RX_A, FN_IRQ1_B,
-            /* IP10_24_23 [2] */
-                FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK, 0,
-            /* IP10_22 [1] */
-                FN_CAN_CLK_A, FN_RX4_D,
-            /* IP10_21_19 [3] */
-                FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B,
-                FN_LCD_M_DISP_B, 0, 0, 0,
-            /* IP10_18_16 [3] */
-                FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B,
-                FN_LCD_VEPWC_B, 0, 0, 0,
-            /* IP10_15 [1] */
-                FN_AUDIO_CLKB_A, FN_LCD_CLK_B,
-            /* IP10_14_12 [3] */
-                FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B,
-                FN_LCD_FLM_B, 0, 0, 0,
-            /* IP10_11_9 [3] */
-                FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B,
-                FN_LCD_CL2_B, 0, 0, 0,
-            /* IP10_8_6 [3] */
-                FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B,
-                FN_LCD_CL1_B, 0, 0, 0,
-            /* IP10_5_3 [3] */
-                FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B,
-                FN_LCD_DON_B, 0, 0, 0,
-            /* IP10_2_0 [3] */
-                FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B,
-                FN_LCD_DATA15_B, 0, 0, 0 }
-        },
-        { PINMUX_CFG_REG_VAR("IPSR11", 0xFFFC0048, 32,
-                        3, 1, 2, 2, 2, 3, 3, 1, 2, 3, 3, 1, 1, 1, 1) {
-            /* IP11_31_29 [3] */
-            0, 0, 0, 0, 0, 0, 0, 0,
-            /* IP11_28 [1] */
-                FN_PRESETOUT, FN_ST_CLKOUT,
-            /* IP11_27_26 [2] */
-                FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A,
-            /* IP11_25_23 [3] */
-                FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C,
-                FN_ET0_TX_CLK_A, 0, 0, 0,
-            /* IP11_22_21 [2] */
-                FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER, 0,
-            /* IP11_20_19 [2] */
-                FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN, 0,
-            /* IP11_18_16 [3] */
-                FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D,
-                FN_IERX_B, 0, 0, 0,
-            /* IP11_15_13 [3] */
-                FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D,
-                FN_IETX_B, 0, 0, 0,
-            /* IP11_12 [1] */
-                FN_TX0_A, FN_HSPI_TX_A,
-            /* IP11_11_10 [2] */
-                FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6,
-            /* IP11_9_7 [3] */
-                FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A,
-                FN_ET0_ERXD5, 0, 0, 0,
-            /* IP11_6_4 [3] */
-                FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A,
-                FN_ET0_ERXD4, 0, 0, 0,
-            /* IP11_3 [1] */
-                FN_SDSELF, FN_RTS1_E,
-            /* IP11_2 [1] */
-                FN_SDA0, FN_HIFEBL_A,
-            /* IP11_1 [1] */
-                FN_SDA1, FN_RX1_E,
-            /* IP11_0 [1] */
-                FN_SCL1, FN_SCIF_CLK_C }
-        },
-        { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xFFFC004C, 32,
-                                3, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 2, 2,
-                                1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {
-                /* SEL1_31_29 [3] */
-                0, 0, 0, 0, 0, 0, 0, 0,
-                /* SEL1_28 [1] */
-                FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
-                /* SEL1_27 [1] */
-                FN_SEL_RQSPI_0, FN_SEL_RQSPI_1,
-                /* SEL1_26 [1] */
-                FN_SEL_VIN1_0, FN_SEL_VIN1_1,
-                /* SEL1_25 [1] */
-                FN_SEL_HIF_0, FN_SEL_HIF_1,
-                /* SEL1_24 [1] */
-                FN_SEL_RSPI_0, FN_SEL_RSPI_1,
-                /* SEL1_23 [1] */
-                FN_SEL_LCDC_0, FN_SEL_LCDC_1,
-                /* SEL1_22_21 [2] */
-                FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2, 0,
-                /* SEL1_20 [1] */
-                FN_SEL_ET0_0, FN_SEL_ET0_1,
-                /* SEL1_19 [1] */
-                FN_SEL_RMII_0, FN_SEL_RMII_1,
-                /* SEL1_18 [1] */
-                FN_SEL_TMU_0, FN_SEL_TMU_1,
-                /* SEL1_17_16 [2] */
-                FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2, 0,
-                /* SEL1_15_14 [2] */
-                FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3,
-                /* SEL1_13 [1] */
-                FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1,
-                /* SEL1_12_11 [2] */
-                FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2, 0,
-                /* SEL1_10 [1] */
-                FN_SEL_RCAN0_0, FN_SEL_RCAN0_1,
-                /* SEL1_9 [1] */
-                FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
-                /* SEL1_8 [1] */
-                FN_SEL_SDHI1_0, FN_SEL_SDHI1_1,
-                /* SEL1_7 [1] */
-                FN_SEL_SDHI0_0, FN_SEL_SDHI0_1,
-                /* SEL1_6 [1] */
-                FN_SEL_SSI1_0, FN_SEL_SSI1_1,
-                /* SEL1_5 [1] */
-                FN_SEL_SSI0_0, FN_SEL_SSI0_1,
-                /* SEL1_4 [1] */
-                FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1,
-                /* SEL1_3 [1] */
-                FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1,
-                /* SEL1_2 [1] */
-                FN_SEL_FLCTL_0, FN_SEL_FLCTL_1,
-                /* SEL1_1 [1] */
-                FN_SEL_MMC_0, FN_SEL_MMC_1,
-                /* SEL1_0 [1] */
-                FN_SEL_INTC_0, FN_SEL_INTC_1 }
-        },
-        { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xFFFC0050, 32,
-                                1, 1, 1, 1, 1, 1, 1, 1,
-                                1, 1, 1, 2, 2, 1, 2, 2, 3, 2, 3, 2, 2) {
-                /* SEL2_31 [1] */
-                0, 0,
-                /* SEL2_30 [1] */
-                0, 0,
-                /* SEL2_29 [1] */
-                0, 0,
-                /* SEL2_28 [1] */
-                0, 0,
-                /* SEL2_27 [1] */
-                0, 0,
-                /* SEL2_26 [1] */
-                0, 0,
-                /* SEL2_25 [1] */
-                0, 0,
-                /* SEL2_24 [1] */
-                0, 0,
-                /* SEL2_23 [1] */
-                FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1,
-                /* SEL2_22 [1] */
-                FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1,
-                /* SEL2_21 [1] */
-                FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1,
-                /* SEL2_20_19 [2] */
-                FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2, 0,
-                /* SEL2_18_17 [2] */
-                FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2, 0,
-                /* SEL2_16 [1] */
-                FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1,
-                /* SEL2_15_14 [2] */
-                FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
-                /* SEL2_13_12 [2] */
-                FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
-                /* SEL2_11_9 [3] */
-                FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
-                FN_SEL_SCIF3_4, 0, 0, 0,
-                /* SEL2_8_7 [2] */
-                FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,
-                /* SEL2_6_4 [3] */
-                FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
-                        FN_SEL_SCIF1_4, 0, 0, 0,
-                /* SEL2_3_2 [2] */
-                FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, 0,
-                /* SEL2_1_0 [2] */
-                FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2, 0  }
-        },
-        /* GPIO 0 - 5*/
-        { PINMUX_CFG_REG("INOUTSEL0", 0xFFC40004, 32, 1) { GP_INOUTSEL(0) } },
-        { PINMUX_CFG_REG("INOUTSEL1", 0xFFC41004, 32, 1) { GP_INOUTSEL(1) } },
-        { PINMUX_CFG_REG("INOUTSEL2", 0xFFC42004, 32, 1) { GP_INOUTSEL(2) } },
-        { PINMUX_CFG_REG("INOUTSEL3", 0xFFC43004, 32, 1) { GP_INOUTSEL(3) } },
-        { PINMUX_CFG_REG("INOUTSEL4", 0xFFC44004, 32, 1) { GP_INOUTSEL(4) } },
-        { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 24 */
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 16 */
-                0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */
-                GP_5_11_IN, GP_5_11_OUT,
-                GP_5_10_IN, GP_5_10_OUT,
-                GP_5_9_IN, GP_5_9_OUT,
-                GP_5_8_IN, GP_5_8_OUT,
-                GP_5_7_IN, GP_5_7_OUT,
-                GP_5_6_IN, GP_5_6_OUT,
-                GP_5_5_IN, GP_5_5_OUT,
-                GP_5_4_IN, GP_5_4_OUT,
-                GP_5_3_IN, GP_5_3_OUT,
-                GP_5_2_IN, GP_5_2_OUT,
-                GP_5_1_IN, GP_5_1_OUT,
-                GP_5_0_IN, GP_5_0_OUT }
-        },
-        { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
-        /* GPIO 0 - 5*/
-        { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } },
-        { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } },
-        { PINMUX_DATA_REG("INDT2", 0xFFC4200C, 32) { GP_INDT(2) } },
-        { PINMUX_DATA_REG("INDT3", 0xFFC4300C, 32) { GP_INDT(3) } },
-        { PINMUX_DATA_REG("INDT4", 0xFFC4400C, 32) { GP_INDT(4) } },
-        { PINMUX_DATA_REG("INDT5", 0xFFC4500C, 32) {
-                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-                0, 0, 0, 0,
-                GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
-                GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
-                GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
-        },
-        { },
-};
-
-static struct resource sh7734_pfc_resources[] = {
-        [0] = { /* PFC */
-                .start  = 0xFFFC0000,
-                .end    = 0xFFFC011C,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = { /* GPIO */
-                .start  = 0xFFC40000,
-                .end    = 0xFFC4502B,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct pinmux_info sh7734_pinmux_info = {
-        .name = "sh7734_pfc",
-
-        .resource = sh7734_pfc_resources,
-        .num_resources = ARRAY_SIZE(sh7734_pfc_resources),
-
-        .unlock_reg = 0xFFFC0000,
-
-        .reserved_id = PINMUX_RESERVED,
-        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
-        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
-        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
-        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
-        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
-        .first_gpio = GPIO_GP_0_0,
-        .last_gpio = GPIO_FN_ST_CLKOUT,
-
-        .gpios = pinmux_gpios,
-        .cfg_regs = pinmux_config_regs,
-        .data_regs = pinmux_data_regs,
-
-        .gpio_data = pinmux_data,
-        .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-static int __init plat_pinmux_setup(void)
-{
-        return register_pinmux(&sh7734_pinmux_info);
-}
-arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index b91ea8300a3..1b8848317e9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -13,7 +13,6 @@
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <asm/clock.h>
 
 /* Serial */
@@ -23,7 +22,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+        .irqs           = { 80, 80, 80, 80 },
 };
 
 static struct platform_device scif0_device = {
@@ -40,7 +39,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+        .irqs           = { 81, 81, 81, 81 },
 };
 
 static struct platform_device scif1_device = {
@@ -57,7 +56,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+        .irqs           = { 82, 82, 82, 82 },
 };
 
 static struct platform_device scif2_device = {
@@ -74,7 +73,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc60)),
+        .irqs           = { 83, 83, 83, 83 },
 };
 
 static struct platform_device scif3_device = {
@@ -93,8 +92,8 @@ static struct resource iic0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
-                .end    = evt2irq(0xe60),
+                .start  = 96,
+                .end    = 99,
                 .flags  = IORESOURCE_IRQ,
        },
 };
@@ -114,8 +113,8 @@ static struct resource iic1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x780),
-                .end    = evt2irq(0x7e0),
+                .start  = 44,
+                .end    = 47,
                 .flags  = IORESOURCE_IRQ,
        },
 };
@@ -130,7 +129,7 @@ static struct platform_device iic1_device = {
 static struct uio_info vpu_platform_data = {
         .name = "VPU4",
         .version = "0",
-        .irq = evt2irq(0x980),
+        .irq = 60,
 };
 
 static struct resource vpu_resources[] = {
@@ -158,7 +157,7 @@ static struct platform_device vpu_device = {
 static struct uio_info veu_platform_data = {
         .name = "VEU",
         .version = "0",
-        .irq = evt2irq(0x8c0),
+        .irq = 54,
 };
 
 static struct resource veu_resources[] = {
@@ -186,7 +185,7 @@ static struct platform_device veu_device = {
 static struct uio_info jpu_platform_data = {
         .name = "JPU",
         .version = "0",
-        .irq = evt2irq(0x560),
+        .irq = 27,
 };
 
 static struct resource jpu_resources[] = {
@@ -225,7 +224,7 @@ static struct resource cmt_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -253,7 +252,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -281,7 +280,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -308,7 +307,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 0bd09d51419..87773869a2f 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -15,7 +15,6 @@
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/usb/r8a66597.h>
 #include <asm/clock.h>
 
@@ -26,7 +25,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+        .irqs           = { 80, 80, 80, 80 },
 };
 
 static struct platform_device scif0_device = {
@@ -45,8 +44,8 @@ static struct resource iic_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
-                .end    = evt2irq(0xe60),
+                .start  = 96,
+                .end    = 99,
                 .flags  = IORESOURCE_IRQ,
        },
 };
@@ -69,8 +68,8 @@ static struct resource usb_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -90,7 +89,7 @@ static struct platform_device usb_host_device = {
 static struct uio_info vpu_platform_data = {
         .name = "VPU5",
         .version = "0",
-        .irq = evt2irq(0x980),
+        .irq = 60,
 };
 
 static struct resource vpu_resources[] = {
@@ -118,7 +117,7 @@ static struct platform_device vpu_device = {
 static struct uio_info veu0_platform_data = {
         .name = "VEU",
         .version = "0",
-        .irq = evt2irq(0x8c0),
+        .irq = 54,
 };
 
 static struct resource veu0_resources[] = {
@@ -146,7 +145,7 @@ static struct platform_device veu0_device = {
 static struct uio_info veu1_platform_data = {
         .name = "VEU",
         .version = "0",
-        .irq = evt2irq(0x560),
+        .irq = 27,
 };
 
 static struct resource veu1_resources[] = {
@@ -185,7 +184,7 @@ static struct resource cmt_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -241,7 +240,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -268,7 +267,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 6a868b091c2..278a0e57215 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -12,9 +12,7 @@
 #include <linux/platform_device.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
-#include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/uio_driver.h>
 #include <linux/usb/m66592.h>
 
@@ -148,21 +146,21 @@ static struct resource sh7722_dmae_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0xbc0),
-                .end    = evt2irq(0xbc0),
+                /* DMA error IRQ */
+                .start  = 78,
+                .end    = 78,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 0-3 */
-                .start  = evt2irq(0x800),
-                .end    = evt2irq(0x860),
+                .start  = 48,
+                .end    = 51,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 4-5 */
-                .start  = evt2irq(0xb80),
-                .end    = evt2irq(0xba0),
+                .start  = 76,
+                .end    = 77,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -175,6 +173,9 @@ struct platform_device dma_device = {
         .dev            = {
                 .platform_data  = &dma_platform_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC,
+        },
 };
 
 /* Serial */
@@ -184,7 +185,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+        .irqs           = { 80, 80, 80, 80 },
         .ops            = &sh7722_sci_port_ops,
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
@@ -203,7 +204,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+        .irqs           = { 81, 81, 81, 81 },
         .ops            = &sh7722_sci_port_ops,
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
@@ -222,7 +223,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+        .irqs           = { 82, 82, 82, 82 },
         .ops            = &sh7722_sci_port_ops,
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
@@ -243,17 +244,17 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Period IRQ */
-                .start  = evt2irq(0x7a0),
+                .start  = 45,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
                 /* Carry IRQ */
-                .start  = evt2irq(0x7c0),
+                .start  = 46,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
                 /* Alarm IRQ */
-                .start  = evt2irq(0x780),
+                .start  = 44,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -263,6 +264,9 @@ static struct platform_device rtc_device = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(rtc_resources),
         .resource       = rtc_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_RTC,
+        },
 };
 
 static struct m66592_platdata usbf_platdata = {
@@ -277,8 +281,8 @@ static struct resource usbf_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -293,6 +297,9 @@ static struct platform_device usbf_device = {
         },
         .num_resources  = ARRAY_SIZE(usbf_resources),
         .resource       = usbf_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USBF,
+        },
 };
 
 static struct resource iic_resources[] = {
@@ -303,8 +310,8 @@ static struct resource iic_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
-                .end    = evt2irq(0xe60),
+                .start  = 96,
+                .end    = 99,
                 .flags  = IORESOURCE_IRQ,
        },
 };
@@ -314,12 +321,15 @@ static struct platform_device iic_device = {
         .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC,
+        },
 };
 
 static struct uio_info vpu_platform_data = {
         .name = "VPU4",
         .version = "0",
-        .irq = evt2irq(0x980),
+        .irq = 60,
 };
 
 static struct resource vpu_resources[] = {
@@ -342,12 +352,15 @@ static struct platform_device vpu_device = {
         },
         .resource       = vpu_resources,
         .num_resources  = ARRAY_SIZE(vpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VPU,
+        },
 };
 
 static struct uio_info veu_platform_data = {
         .name = "VEU",
         .version = "0",
-        .irq = evt2irq(0x8c0),
+        .irq = 54,
 };
 
 static struct resource veu_resources[] = {
@@ -370,12 +383,15 @@ static struct platform_device veu_device = {
         },
         .resource       = veu_resources,
         .num_resources  = ARRAY_SIZE(veu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU,
+        },
 };
 
 static struct uio_info jpu_platform_data = {
         .name = "JPU",
         .version = "0",
-        .irq = evt2irq(0x560),
+        .irq = 27,
 };
 
 static struct resource jpu_resources[] = {
@@ -398,6 +414,9 @@ static struct platform_device jpu_device = {
         },
         .resource       = jpu_resources,
         .num_resources  = ARRAY_SIZE(jpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_JPU,
+        },
 };
 
 static struct sh_timer_config cmt_platform_data = {
@@ -414,7 +433,7 @@ static struct resource cmt_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -427,6 +446,9 @@ static struct platform_device cmt_device = {
         },
         .resource       = cmt_resources,
         .num_resources  = ARRAY_SIZE(cmt_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_CMT,
+        },
 };
 
 static struct sh_timer_config tmu0_platform_data = {
@@ -442,7 +464,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -455,6 +477,9 @@ static struct platform_device tmu0_device = {
         },
         .resource       = tmu0_resources,
         .num_resources  = ARRAY_SIZE(tmu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU,
+        },
 };
 
 static struct sh_timer_config tmu1_platform_data = {
@@ -470,7 +495,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -483,6 +508,9 @@ static struct platform_device tmu1_device = {
         },
         .resource       = tmu1_resources,
         .num_resources  = ARRAY_SIZE(tmu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU,
+        },
 };
 
 static struct sh_timer_config tmu2_platform_data = {
@@ -510,9 +538,13 @@ static struct platform_device tmu2_device = {
         },
         .resource       = tmu2_resources,
         .num_resources  = ARRAY_SIZE(tmu2_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU,
+        },
 };
 
 static struct siu_platform siu_platform_data = {
+        .dma_dev        = &dma_device.dev,
         .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
         .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
         .dma_slave_tx_b = SHDMA_SLAVE_SIUB_TX,
@@ -526,7 +558,7 @@ static struct resource siu_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf80),
+                .start  = 108,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -539,6 +571,9 @@ static struct platform_device siu_device = {
         },
         .resource       = siu_resources,
         .num_resources  = ARRAY_SIZE(siu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SIU,
+        },
 };
 
 static struct platform_device *sh7722_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 28d6fd835fe..3c2810d8f72 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -15,7 +15,6 @@
 #include <linux/uio_driver.h>
 #include <linux/usb/r8a66597.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/io.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
@@ -29,7 +28,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+        .irqs           = { 80, 80, 80, 80 },
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
@@ -48,7 +47,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+        .irqs           = { 81, 81, 81, 81 },
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
@@ -67,7 +66,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+        .irqs           = { 82, 82, 82, 82 },
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
@@ -86,7 +85,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_3,
         .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
+        .irqs           = { 56, 56, 56, 56 },
 };
 
 static struct platform_device scif3_device = {
@@ -104,7 +103,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_3,
         .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),
+        .irqs           = { 88, 88, 88, 88 },
 };
 
 static struct platform_device scif4_device = {
@@ -122,7 +121,7 @@ static struct plat_sci_port scif5_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_3,
         .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
+        .irqs           = { 109, 109, 109, 109 },
 };
 
 static struct platform_device scif5_device = {
@@ -136,7 +135,7 @@ static struct platform_device scif5_device = {
 static struct uio_info vpu_platform_data = {
         .name = "VPU5",
         .version = "0",
-        .irq = evt2irq(0x980),
+        .irq = 60,
 };
 
 static struct resource vpu_resources[] = {
@@ -159,12 +158,15 @@ static struct platform_device vpu_device = {
         },
         .resource       = vpu_resources,
         .num_resources  = ARRAY_SIZE(vpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VPU,
+        },
 };
 
 static struct uio_info veu0_platform_data = {
         .name = "VEU2H",
         .version = "0",
-        .irq = evt2irq(0x8c0),
+        .irq = 54,
 };
 
 static struct resource veu0_resources[] = {
@@ -187,12 +189,15 @@ static struct platform_device veu0_device = {
         },
         .resource       = veu0_resources,
         .num_resources  = ARRAY_SIZE(veu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU2H0,
+        },
 };
 
 static struct uio_info veu1_platform_data = {
         .name = "VEU2H",
         .version = "0",
-        .irq = evt2irq(0x560),
+        .irq = 27,
 };
 
 static struct resource veu1_resources[] = {
@@ -215,6 +220,9 @@ static struct platform_device veu1_device = {
         },
         .resource       = veu1_resources,
         .num_resources  = ARRAY_SIZE(veu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU2H1,
+        },
 };
 
 static struct sh_timer_config cmt_platform_data = {
@@ -231,7 +239,7 @@ static struct resource cmt_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -244,6 +252,9 @@ static struct platform_device cmt_device = {
         },
         .resource       = cmt_resources,
         .num_resources  = ARRAY_SIZE(cmt_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_CMT,
+        },
 };
 
 static struct sh_timer_config tmu0_platform_data = {
@@ -259,7 +270,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -272,6 +283,9 @@ static struct platform_device tmu0_device = {
         },
         .resource       = tmu0_resources,
         .num_resources  = ARRAY_SIZE(tmu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu1_platform_data = {
@@ -287,7 +301,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -300,6 +314,9 @@ static struct platform_device tmu1_device = {
         },
         .resource       = tmu1_resources,
         .num_resources  = ARRAY_SIZE(tmu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu2_platform_data = {
@@ -314,7 +331,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -327,6 +344,9 @@ static struct platform_device tmu2_device = {
         },
         .resource       = tmu2_resources,
         .num_resources  = ARRAY_SIZE(tmu2_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu3_platform_data = {
@@ -341,7 +361,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x920),
+                .start  = 57,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -354,6 +374,9 @@ static struct platform_device tmu3_device = {
         },
         .resource       = tmu3_resources,
         .num_resources  = ARRAY_SIZE(tmu3_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu4_platform_data = {
@@ -368,7 +391,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x940),
+                .start  = 58,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -381,6 +404,9 @@ static struct platform_device tmu4_device = {
         },
         .resource       = tmu4_resources,
         .num_resources  = ARRAY_SIZE(tmu4_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu5_platform_data = {
@@ -395,7 +421,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x920),
+                .start  = 57,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -408,6 +434,9 @@ static struct platform_device tmu5_device = {
         },
         .resource       = tmu5_resources,
         .num_resources  = ARRAY_SIZE(tmu5_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct resource rtc_resources[] = {
@@ -418,17 +447,17 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Period IRQ */
-                .start  = evt2irq(0xaa0),
+                .start  = 69,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
                 /* Carry IRQ */
-                .start  = evt2irq(0xac0),
+                .start  = 70,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
                 /* Alarm IRQ */
-                .start  = evt2irq(0xa80),
+                .start  = 68,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -438,6 +467,9 @@ static struct platform_device rtc_device = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(rtc_resources),
         .resource       = rtc_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_RTC,
+        },
 };
 
 static struct r8a66597_platdata r8a66597_data = {
@@ -451,8 +483,8 @@ static struct resource sh7723_usb_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xa20),
-                .end    = evt2irq(0xa20),
+                .start  = 65,
+                .end    = 65,
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -467,6 +499,9 @@ static struct platform_device sh7723_usb_host_device = {
         },
         .num_resources  = ARRAY_SIZE(sh7723_usb_host_resources),
         .resource       = sh7723_usb_host_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USB,
+        },
 };
 
 static struct resource iic_resources[] = {
@@ -477,8 +512,8 @@ static struct resource iic_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
-                .end    = evt2irq(0xe60),
+                .start  = 96,
+                .end    = 99,
                 .flags  = IORESOURCE_IRQ,
        },
 };
@@ -488,6 +523,9 @@ static struct platform_device iic_device = {
         .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC,
+        },
 };
 
 static struct platform_device *sh7723_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 26b74c2f949..a37dd72c367 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -20,7 +20,6 @@
 #include <linux/uio_driver.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/io.h>
 #include <linux/notifier.h>
 
@@ -215,21 +214,21 @@ static struct resource sh7724_dmae0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0xbc0),
-                .end    = evt2irq(0xbc0),
+                /* DMA error IRQ */
+                .start  = 78,
+                .end    = 78,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 0-3 */
-                .start  = evt2irq(0x800),
-                .end    = evt2irq(0x860),
+                .start  = 48,
+                .end    = 51,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 4-5 */
-                .start  = evt2irq(0xb80),
-                .end    = evt2irq(0xba0),
+                .start  = 76,
+                .end    = 77,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -249,21 +248,21 @@ static struct resource sh7724_dmae1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0xb40),
-                .end    = evt2irq(0xb40),
+                /* DMA error IRQ */
+                .start  = 74,
+                .end    = 74,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 0-3 */
-                .start  = evt2irq(0x700),
-                .end    = evt2irq(0x760),
+                .start  = 40,
+                .end    = 43,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 4-5 */
-                .start  = evt2irq(0xb00),
-                .end    = evt2irq(0xb20),
+                .start  = 72,
+                .end    = 73,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -276,6 +275,9 @@ static struct platform_device dma0_device = {
         .dev            = {
                 .platform_data  = &dma_platform_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC0,
+        },
 };
 
 static struct platform_device dma1_device = {
@@ -286,6 +288,9 @@ static struct platform_device dma1_device = {
         .dev            = {
                 .platform_data  = &dma_platform_data,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC1,
+        },
 };
 
 /* Serial */
@@ -296,7 +301,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
+        .irqs           = { 80, 80, 80, 80 },
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
@@ -315,7 +320,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
+        .irqs           = { 81, 81, 81, 81 },
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
@@ -334,7 +339,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
+        .irqs           = { 82, 82, 82, 82 },
         .regtype        = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
 };
 
@@ -353,7 +358,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE,
         .scbrr_algo_id  = SCBRR_ALGO_3,
         .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
+        .irqs           = { 56, 56, 56, 56 },
 };
 
 static struct platform_device scif3_device = {
@@ -371,7 +376,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE,
         .scbrr_algo_id  = SCBRR_ALGO_3,
         .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),
+        .irqs           = { 88, 88, 88, 88 },
 };
 
 static struct platform_device scif4_device = {
@@ -389,7 +394,7 @@ static struct plat_sci_port scif5_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE,
         .scbrr_algo_id  = SCBRR_ALGO_3,
         .type           = PORT_SCIFA,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
+        .irqs           = { 109, 109, 109, 109 },
 };
 
 static struct platform_device scif5_device = {
@@ -409,17 +414,17 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Period IRQ */
-                .start  = evt2irq(0xaa0),
+                .start  = 69,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
                 /* Carry IRQ */
-                .start  = evt2irq(0xac0),
+                .start  = 70,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
                 /* Alarm IRQ */
-                .start  = evt2irq(0xa80),
+                .start  = 68,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -429,6 +434,9 @@ static struct platform_device rtc_device = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(rtc_resources),
         .resource       = rtc_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_RTC,
+        },
 };
 
 /* I2C0 */
@@ -440,8 +448,8 @@ static struct resource iic0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
-                .end    = evt2irq(0xe60),
+                .start  = 96,
+                .end    = 99,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -451,6 +459,9 @@ static struct platform_device iic0_device = {
         .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic0_resources),
         .resource       = iic0_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC0,
+        },
 };
 
 /* I2C1 */
@@ -462,8 +473,8 @@ static struct resource iic1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xd80),
-                .end    = evt2irq(0xde0),
+                .start  = 92,
+                .end    = 95,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -473,13 +484,16 @@ static struct platform_device iic1_device = {
         .id             = 1, /* "i2c1" clock */
         .num_resources  = ARRAY_SIZE(iic1_resources),
         .resource       = iic1_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC1,
+        },
 };
 
 /* VPU */
 static struct uio_info vpu_platform_data = {
         .name = "VPU5F",
         .version = "0",
-        .irq = evt2irq(0x980),
+        .irq = 60,
 };
 
 static struct resource vpu_resources[] = {
@@ -502,13 +516,16 @@ static struct platform_device vpu_device = {
         },
         .resource       = vpu_resources,
         .num_resources  = ARRAY_SIZE(vpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VPU,
+        },
 };
 
 /* VEU0 */
 static struct uio_info veu0_platform_data = {
         .name = "VEU3F0",
         .version = "0",
-        .irq = evt2irq(0xc60),
+        .irq = 83,
 };
 
 static struct resource veu0_resources[] = {
@@ -531,13 +548,16 @@ static struct platform_device veu0_device = {
         },
         .resource       = veu0_resources,
         .num_resources  = ARRAY_SIZE(veu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU0,
+        },
 };
 
 /* VEU1 */
 static struct uio_info veu1_platform_data = {
         .name = "VEU3F1",
         .version = "0",
-        .irq = evt2irq(0x8c0),
+        .irq = 54,
 };
 
 static struct resource veu1_resources[] = {
@@ -560,6 +580,9 @@ static struct platform_device veu1_device = {
         },
         .resource       = veu1_resources,
         .num_resources  = ARRAY_SIZE(veu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU1,
+        },
 };
 
 /* BEU0 */
@@ -589,6 +612,9 @@ static struct platform_device beu0_device = {
         },
         .resource       = beu0_resources,
         .num_resources  = ARRAY_SIZE(beu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_BEU0,
+        },
 };
 
 /* BEU1 */
@@ -618,6 +644,9 @@ static struct platform_device beu1_device = {
         },
         .resource       = beu1_resources,
         .num_resources  = ARRAY_SIZE(beu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_BEU1,
+        },
 };
 
 static struct sh_timer_config cmt_platform_data = {
@@ -634,7 +663,7 @@ static struct resource cmt_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xf00),
+                .start  = 104,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -647,6 +676,9 @@ static struct platform_device cmt_device = {
         },
         .resource       = cmt_resources,
         .num_resources  = ARRAY_SIZE(cmt_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_CMT,
+        },
 };
 
 static struct sh_timer_config tmu0_platform_data = {
@@ -662,7 +694,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -675,6 +707,9 @@ static struct platform_device tmu0_device = {
         },
         .resource       = tmu0_resources,
         .num_resources  = ARRAY_SIZE(tmu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu1_platform_data = {
@@ -690,7 +725,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -703,6 +738,9 @@ static struct platform_device tmu1_device = {
         },
         .resource       = tmu1_resources,
         .num_resources  = ARRAY_SIZE(tmu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu2_platform_data = {
@@ -717,7 +755,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -730,6 +768,9 @@ static struct platform_device tmu2_device = {
         },
         .resource       = tmu2_resources,
         .num_resources  = ARRAY_SIZE(tmu2_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 
@@ -745,7 +786,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x920),
+                .start  = 57,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -758,6 +799,9 @@ static struct platform_device tmu3_device = {
         },
         .resource       = tmu3_resources,
         .num_resources  = ARRAY_SIZE(tmu3_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu4_platform_data = {
@@ -772,7 +816,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x940),
+                .start  = 58,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -785,6 +829,9 @@ static struct platform_device tmu4_device = {
         },
         .resource       = tmu4_resources,
         .num_resources  = ARRAY_SIZE(tmu4_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu5_platform_data = {
@@ -799,7 +846,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x920),
+                .start  = 57,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -812,13 +859,16 @@ static struct platform_device tmu5_device = {
         },
         .resource       = tmu5_resources,
         .num_resources  = ARRAY_SIZE(tmu5_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 /* JPU */
 static struct uio_info jpu_platform_data = {
         .name = "JPU",
         .version = "0",
-        .irq = evt2irq(0x560),
+        .irq = 27,
 };
 
 static struct resource jpu_resources[] = {
@@ -841,13 +891,16 @@ static struct platform_device jpu_device = {
         },
         .resource       = jpu_resources,
         .num_resources  = ARRAY_SIZE(jpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_JPU,
+        },
 };
 
 /* SPU2DSP0 */
 static struct uio_info spu0_platform_data = {
         .name = "SPU2DSP0",
         .version = "0",
-        .irq = evt2irq(0xcc0),
+        .irq = 86,
 };
 
 static struct resource spu0_resources[] = {
@@ -870,13 +923,16 @@ static struct platform_device spu0_device = {
         },
         .resource       = spu0_resources,
         .num_resources  = ARRAY_SIZE(spu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SPU,
+        },
 };
 
 /* SPU2DSP1 */
 static struct uio_info spu1_platform_data = {
         .name = "SPU2DSP1",
         .version = "0",
-        .irq = evt2irq(0xce0),
+        .irq = 87,
 };
 
 static struct resource spu1_resources[] = {
@@ -899,6 +955,9 @@ static struct platform_device spu1_device = {
         },
         .resource       = spu1_resources,
         .num_resources  = ARRAY_SIZE(spu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SPU,
+        },
 };
 
 static struct platform_device *sh7724_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
deleted file mode 100644
index f799971d453..00000000000
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
+++ /dev/null
@@ -1,800 +0,0 @@
-/*
- * arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-
- * SH7734 Setup
- *
- * Copyright (C) 2011,2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- * Copyright (C) 2011,2012 Renesas Solutions Corp.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/platform_device.h>
-#include <linux/init.h>
-#include <linux/serial.h>
-#include <linux/mm.h>
-#include <linux/dma-mapping.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_timer.h>
-#include <linux/io.h>
-#include <asm/clock.h>
-#include <asm/irq.h>
-#include <cpu/sh7734.h>
-
-/* SCIF */
-static struct plat_sci_port scif0_platform_data = {
-        .mapbase        = 0xFFE40000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x8C0)),
-        .regtype        = SCIx_SH4_SCIF_REGTYPE,
-};
-
-static struct platform_device scif0_device = {
-        .name           = "sh-sci",
-        .id                     = 0,
-        .dev            = {
-                .platform_data  = &scif0_platform_data,
-        },
-};
-
-static struct plat_sci_port scif1_platform_data = {
-        .mapbase        = 0xFFE41000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x8E0)),
-        .regtype        = SCIx_SH4_SCIF_REGTYPE,
-};
-
-static struct platform_device scif1_device = {
-        .name           = "sh-sci",
-        .id         = 1,
-        .dev            = {
-                .platform_data = &scif1_platform_data,
-        },
-};
-
-static struct plat_sci_port scif2_platform_data = {
-        .mapbase        = 0xFFE42000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
-        .regtype        = SCIx_SH4_SCIF_REGTYPE,
-};
-
-static struct platform_device scif2_device = {
-        .name           = "sh-sci",
-        .id         = 2,
-        .dev            = {
-                .platform_data = &scif2_platform_data,
-        },
-};
-
-static struct plat_sci_port scif3_platform_data = {
-        .mapbase        = 0xFFE43000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x920)),
-        .regtype        = SCIx_SH4_SCIF_REGTYPE,
-};
-
-static struct platform_device scif3_device = {
-        .name           = "sh-sci",
-        .id             = 3,
-        .dev            = {
-                .platform_data  = &scif3_platform_data,
-        },
-};
-
-static struct plat_sci_port scif4_platform_data = {
-        .mapbase        = 0xFFE44000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x940)),
-        .regtype        = SCIx_SH4_SCIF_REGTYPE,
-};
-
-static struct platform_device scif4_device = {
-        .name           = "sh-sci",
-        .id             = 4,
-        .dev            = {
-                .platform_data  = &scif4_platform_data,
-        },
-};
-
-static struct plat_sci_port scif5_platform_data = {
-        .mapbase        = 0xFFE43000,
-        .flags          = UPF_BOOT_AUTOCONF,
-        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
-        .scbrr_algo_id  = SCBRR_ALGO_2,
-        .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x960)),
-        .regtype                = SCIx_SH4_SCIF_REGTYPE,
-};
-
-static struct platform_device scif5_device = {
-        .name           = "sh-sci",
-        .id             = 5,
-        .dev            = {
-                .platform_data  = &scif5_platform_data,
-        },
-};
-
-/* RTC */
-static struct resource rtc_resources[] = {
-        [0] = {
-                .name   = "rtc",
-                .start  = 0xFFFC5000,
-                .end    = 0xFFFC5000 + 0x26 - 1,
-                .flags  = IORESOURCE_IO,
-        },
-        [1] = {
-                .start  = evt2irq(0xC00),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device rtc_device = {
-        .name           = "sh-rtc",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(rtc_resources),
-        .resource       = rtc_resources,
-};
-
-/* I2C 0 */
-static struct resource i2c0_resources[] = {
-        [0] = {
-                .name   = "IIC0",
-                .start  = 0xFFC70000,
-                .end    = 0xFFC7000A - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x860),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device i2c0_device = {
-        .name           = "i2c-sh7734",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(i2c0_resources),
-        .resource       = i2c0_resources,
-};
-
-/* TMU */
-static struct sh_timer_config tmu0_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-        .clockevent_rating = 200,
-};
-
-static struct resource tmu0_resources[] = {
-        [0] = {
-                .start  = 0xFFD80008,
-                .end    = 0xFFD80014 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x400),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu0_device = {
-        .name   = "sh_tmu",
-        .id             = 0,
-        .dev = {
-                .platform_data  = &tmu0_platform_data,
-        },
-        .resource       = tmu0_resources,
-        .num_resources  = ARRAY_SIZE(tmu0_resources),
-};
-
-static struct sh_timer_config tmu1_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-        .clocksource_rating = 200,
-};
-
-static struct resource tmu1_resources[] = {
-        [0] = {
-                .start  = 0xFFD80014,
-                .end    = 0xFFD80020 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x420),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu1_device = {
-        .name           = "sh_tmu",
-        .id                     = 1,
-        .dev = {
-                .platform_data  = &tmu1_platform_data,
-        },
-        .resource       = tmu1_resources,
-        .num_resources  = ARRAY_SIZE(tmu1_resources),
-};
-
-static struct sh_timer_config tmu2_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-
-static struct resource tmu2_resources[] = {
-        [0] = {
-                .start  = 0xFFD80020,
-                .end    = 0xFFD80030 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x440),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu2_device = {
-        .name           = "sh_tmu",
-        .id                     = 2,
-        .dev = {
-                .platform_data  = &tmu2_platform_data,
-        },
-        .resource       = tmu2_resources,
-        .num_resources  = ARRAY_SIZE(tmu2_resources),
-};
-
-
-static struct sh_timer_config tmu3_platform_data = {
-        .channel_offset = 0x04,
-        .timer_bit = 0,
-};
-
-static struct resource tmu3_resources[] = {
-        [0] = {
-                .start  = 0xFFD81008,
-                .end    = 0xFFD81014 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x480),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu3_device = {
-        .name           = "sh_tmu",
-        .id                     = 3,
-        .dev = {
-                .platform_data  = &tmu3_platform_data,
-        },
-        .resource       = tmu3_resources,
-        .num_resources  = ARRAY_SIZE(tmu3_resources),
-};
-
-static struct sh_timer_config tmu4_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-
-static struct resource tmu4_resources[] = {
-        [0] = {
-                .start  = 0xFFD81014,
-                .end    = 0xFFD81020 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4A0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu4_device = {
-        .name           = "sh_tmu",
-        .id                     = 4,
-        .dev = {
-                .platform_data  = &tmu4_platform_data,
-        },
-        .resource       = tmu4_resources,
-        .num_resources  = ARRAY_SIZE(tmu4_resources),
-};
-
-static struct sh_timer_config tmu5_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-
-static struct resource tmu5_resources[] = {
-        [0] = {
-                .start  = 0xFFD81020,
-                .end    = 0xFFD81030 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x4C0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu5_device = {
-        .name           = "sh_tmu",
-        .id                     = 5,
-        .dev = {
-                .platform_data  = &tmu5_platform_data,
-        },
-        .resource       = tmu5_resources,
-        .num_resources  = ARRAY_SIZE(tmu5_resources),
-};
-
-static struct sh_timer_config tmu6_platform_data = {
-        .channel_offset = 0x4,
-        .timer_bit = 0,
-};
-
-static struct resource tmu6_resources[] = {
-        [0] = {
-                .start  = 0xFFD82008,
-                .end    = 0xFFD82014 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x500),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu6_device = {
-        .name           = "sh_tmu",
-        .id                     = 6,
-        .dev = {
-                .platform_data  = &tmu6_platform_data,
-        },
-        .resource       = tmu6_resources,
-        .num_resources  = ARRAY_SIZE(tmu6_resources),
-};
-
-static struct sh_timer_config tmu7_platform_data = {
-        .channel_offset = 0x10,
-        .timer_bit = 1,
-};
-
-static struct resource tmu7_resources[] = {
-        [0] = {
-                .start  = 0xFFD82014,
-                .end    = 0xFFD82020 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x520),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu7_device = {
-        .name           = "sh_tmu",
-        .id                     = 7,
-        .dev = {
-                .platform_data  = &tmu7_platform_data,
-        },
-        .resource       = tmu7_resources,
-        .num_resources  = ARRAY_SIZE(tmu7_resources),
-};
-
-static struct sh_timer_config tmu8_platform_data = {
-        .channel_offset = 0x1c,
-        .timer_bit = 2,
-};
-
-static struct resource tmu8_resources[] = {
-        [0] = {
-                .start  = 0xFFD82020,
-                .end    = 0xFFD82030 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x540),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tmu8_device = {
-        .name           = "sh_tmu",
-        .id                     = 8,
-        .dev = {
-                .platform_data  = &tmu8_platform_data,
-        },
-        .resource       = tmu8_resources,
-        .num_resources  = ARRAY_SIZE(tmu8_resources),
-};
-
-static struct platform_device *sh7734_devices[] __initdata = {
-        &scif0_device,
-        &scif1_device,
-        &scif2_device,
-        &scif3_device,
-        &scif4_device,
-        &scif5_device,
-        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
-        &rtc_device,
-};
-
-static struct platform_device *sh7734_early_devices[] __initdata = {
-        &scif0_device,
-        &scif1_device,
-        &scif2_device,
-        &scif3_device,
-        &scif4_device,
-        &scif5_device,
-        &tmu0_device,
-        &tmu1_device,
-        &tmu2_device,
-        &tmu3_device,
-        &tmu4_device,
-        &tmu5_device,
-        &tmu6_device,
-        &tmu7_device,
-        &tmu8_device,
-};
-
-void __init plat_early_device_setup(void)
-{
-        early_platform_add_devices(sh7734_early_devices,
-                ARRAY_SIZE(sh7734_early_devices));
-}
-
-#define GROUP 0
-enum {
-        UNUSED = 0,
-
-        /* interrupt sources */
-
-        IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
-        IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
-        IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
-        IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,
-
-        IRQ0, IRQ1, IRQ2, IRQ3,
-        DU,
-        TMU00, TMU10, TMU20, TMU21,
-        TMU30, TMU40, TMU50, TMU51,
-        TMU60, TMU70, TMU80,
-        RESET_WDT,
-        USB,
-        HUDI,
-        SHDMAC,
-        SSI0, SSI1,     SSI2, SSI3,
-        VIN0,
-        RGPVG,
-        _2DG,
-        MMC,
-        HSPI,
-        LBSCATA,
-        I2C0,
-        RCAN0,
-        MIMLB,
-        SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5,
-        LBSCDMAC0, LBSCDMAC1, LBSCDMAC2,
-        RCAN1,
-        SDHI0, SDHI1,
-        IEBUS,
-        HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, HPBDMAC19_22, HPBDMAC23_25_27_28,
-        RTC,
-        VIN1,
-        LCDC,
-        SRC0, SRC1,
-        GETHER,
-        SDHI2,
-        GPIO0_3, GPIO4_5,
-        STIF0, STIF1,
-        ADMAC,
-        HIF,
-        FLCTL,
-        ADC,
-        MTU2,
-        RSPI,
-        QSPI,
-        HSCIF,
-        VEU3F_VE3,
-
-        /* Group */
-        /* Mask */
-        STIF_M,
-        GPIO_M,
-        HPBDMAC_M,
-        LBSCDMAC_M,
-        RCAN_M,
-        SRC_M,
-        SCIF_M,
-        LCDC_M,
-        _2DG_M,
-        VIN_M,
-        TMU_3_M,
-        TMU_0_M,
-
-        /* Priority */
-        RCAN_P,
-        LBSCDMAC_P,
-
-        /* Common */
-        SDHI,
-        SSI,
-        SPI,
-};
-
-static struct intc_vect vectors[] __initdata = {
-        INTC_VECT(DU, 0x3E0),
-        INTC_VECT(TMU00, 0x400),
-        INTC_VECT(TMU10, 0x420),
-        INTC_VECT(TMU20, 0x440),
-        INTC_VECT(TMU30, 0x480),
-        INTC_VECT(TMU40, 0x4A0),
-        INTC_VECT(TMU50, 0x4C0),
-        INTC_VECT(TMU51, 0x4E0),
-        INTC_VECT(TMU60, 0x500),
-        INTC_VECT(TMU70, 0x520),
-        INTC_VECT(TMU80, 0x540),
-        INTC_VECT(RESET_WDT, 0x560),
-        INTC_VECT(USB, 0x580),
-        INTC_VECT(HUDI, 0x600),
-        INTC_VECT(SHDMAC, 0x620),
-        INTC_VECT(SSI0, 0x6C0),
-        INTC_VECT(SSI1, 0x6E0),
-        INTC_VECT(SSI2, 0x700),
-        INTC_VECT(SSI3, 0x720),
-        INTC_VECT(VIN0, 0x740),
-        INTC_VECT(RGPVG, 0x760),
-        INTC_VECT(_2DG, 0x780),
-        INTC_VECT(MMC, 0x7A0),
-        INTC_VECT(HSPI, 0x7E0),
-        INTC_VECT(LBSCATA, 0x840),
-        INTC_VECT(I2C0, 0x860),
-        INTC_VECT(RCAN0, 0x880),
-        INTC_VECT(SCIF0, 0x8A0),
-        INTC_VECT(SCIF1, 0x8C0),
-        INTC_VECT(SCIF2, 0x900),
-        INTC_VECT(SCIF3, 0x920),
-        INTC_VECT(SCIF4, 0x940),
-        INTC_VECT(SCIF5, 0x960),
-        INTC_VECT(LBSCDMAC0, 0x9E0),
-        INTC_VECT(LBSCDMAC1, 0xA00),
-        INTC_VECT(LBSCDMAC2, 0xA20),
-        INTC_VECT(RCAN1, 0xA60),
-        INTC_VECT(SDHI0, 0xAE0),
-        INTC_VECT(SDHI1, 0xB00),
-        INTC_VECT(IEBUS, 0xB20),
-        INTC_VECT(HPBDMAC0_3, 0xB60),
-        INTC_VECT(HPBDMAC4_10, 0xB80),
-        INTC_VECT(HPBDMAC11_18, 0xBA0),
-        INTC_VECT(HPBDMAC19_22, 0xBC0),
-        INTC_VECT(HPBDMAC23_25_27_28, 0xBE0),
-        INTC_VECT(RTC, 0xC00),
-        INTC_VECT(VIN1, 0xC20),
-        INTC_VECT(LCDC, 0xC40),
-        INTC_VECT(SRC0, 0xC60),
-        INTC_VECT(SRC1, 0xC80),
-        INTC_VECT(GETHER, 0xCA0),
-        INTC_VECT(SDHI2, 0xCC0),
-        INTC_VECT(GPIO0_3, 0xCE0),
-        INTC_VECT(GPIO4_5, 0xD00),
-        INTC_VECT(STIF0, 0xD20),
-        INTC_VECT(STIF1, 0xD40),
-        INTC_VECT(ADMAC, 0xDA0),
-        INTC_VECT(HIF, 0xDC0),
-        INTC_VECT(FLCTL, 0xDE0),
-        INTC_VECT(ADC, 0xE00),
-        INTC_VECT(MTU2, 0xE20),
-        INTC_VECT(RSPI, 0xE40),
-        INTC_VECT(QSPI, 0xE60),
-        INTC_VECT(HSCIF, 0xFC0),
-        INTC_VECT(VEU3F_VE3, 0xF40),
-};
-
-static struct intc_group groups[] __initdata = {
-        /* Common */
-        INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),
-        INTC_GROUP(SPI, HSPI, RSPI, QSPI),
-        INTC_GROUP(SSI, SSI0, SSI1, SSI2, SSI3),
-
-        /* Mask group */
-        INTC_GROUP(STIF_M, STIF0, STIF1), /* 22 */
-        INTC_GROUP(GPIO_M, GPIO0_3, GPIO4_5), /* 21 */
-        INTC_GROUP(HPBDMAC_M, HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18,
-                        HPBDMAC19_22, HPBDMAC23_25_27_28), /* 19 */
-        INTC_GROUP(LBSCDMAC_M, LBSCDMAC0, LBSCDMAC1, LBSCDMAC2), /* 18 */
-        INTC_GROUP(RCAN_M, RCAN0, RCAN1, IEBUS), /* 17 */
-        INTC_GROUP(SRC_M, SRC0, SRC1), /* 16 */
-        INTC_GROUP(SCIF_M, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5,
-                        HSCIF), /* 14 */
-        INTC_GROUP(LCDC_M, LCDC, MIMLB), /* 13 */
-        INTC_GROUP(_2DG_M, _2DG, RGPVG), /* 12 */
-        INTC_GROUP(VIN_M, VIN0, VIN1), /* 10 */
-        INTC_GROUP(TMU_3_M, TMU30, TMU40, TMU50, TMU51,
-                        TMU60, TMU60, TMU70, TMU80), /* 2 */
-        INTC_GROUP(TMU_0_M, TMU00, TMU10, TMU20, TMU21), /* 1 */
-
-        /* Priority group*/
-        INTC_GROUP(RCAN_P, RCAN0, RCAN1), /* INT2PRI5 */
-        INTC_GROUP(LBSCDMAC_P, LBSCDMAC0, LBSCDMAC1), /* INT2PRI5 */
-};
-
-static struct intc_mask_reg mask_registers[] __initdata = {
-        { 0xFF804040, 0xFF804044, 32, /* INT2MSKRG / INT2MSKCR */
-          { 0,
-                VEU3F_VE3,
-                SDHI, /* SDHI 0-2 */
-                ADMAC,
-                FLCTL,
-                RESET_WDT,
-                HIF,
-                ADC,
-                MTU2,
-                STIF_M, /* STIF 0,1 */
-                GPIO_M, /* GPIO 0-5*/
-                GETHER,
-                HPBDMAC_M, /* HPBDMAC 0_3 - 23_25_27_28 */
-                LBSCDMAC_M, /* LBSCDMAC 0 - 2 */
-                RCAN_M, /* RCAN, IEBUS */
-                SRC_M,  /* SRC 0,1 */
-                LBSCATA,
-                SCIF_M, /* SCIF 0-5, HSCIF */
-                LCDC_M, /* LCDC, MIMLB */
-                _2DG_M, /* 2DG, RGPVG */
-                SPI, /* HSPI, RSPI, QSPI */
-                VIN_M,  /* VIN0, 1 */
-                SSI,    /* SSI 0-3 */
-                USB,
-                SHDMAC,
-                HUDI,
-                MMC,
-                RTC,
-                I2C0, /* I2C */ /* I2C 0, 1*/
-                TMU_3_M, /* TMU30 - TMU80 */
-                TMU_0_M, /* TMU00 - TMU21 */
-                DU } },
-};
-
-static struct intc_prio_reg prio_registers[] __initdata = {
-        { 0xFF804000, 0, 32, 8, /* INT2PRI0 */
-                { DU, TMU00, TMU10, TMU20 } },
-        { 0xFF804004, 0, 32, 8, /* INT2PRI1 */
-                { TMU30, TMU60, RTC, SDHI } },
-        { 0xFF804008, 0, 32, 8, /* INT2PRI2 */
-                { HUDI, SHDMAC, USB, SSI } },
-        { 0xFF80400C, 0, 32, 8, /* INT2PRI3 */
-                { VIN0, SPI, _2DG, LBSCATA } },
-        { 0xFF804010, 0, 32, 8, /* INT2PRI4 */
-                { SCIF0, SCIF3, HSCIF, LCDC } },
-        { 0xFF804014, 0, 32, 8, /* INT2PRI5 */
-                { RCAN_P, LBSCDMAC_P, LBSCDMAC2, MMC } },
-        { 0xFF804018, 0, 32, 8, /* INT2PRI6 */
-                { HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, HPBDMAC19_22 } },
-        { 0xFF80401C, 0, 32, 8, /* INT2PRI7 */
-                { HPBDMAC23_25_27_28, I2C0, SRC0, SRC1 } },
-        { 0xFF804020, 0, 32, 8, /* INT2PRI8 */
-                { 0 /* ADIF */, VIN1, RESET_WDT, HIF } },
-        { 0xFF804024, 0, 32, 8, /* INT2PRI9 */
-                { ADMAC, FLCTL, GPIO0_3, GPIO4_5 } },
-        { 0xFF804028, 0, 32, 8, /* INT2PRI10 */
-                { STIF0, STIF1, VEU3F_VE3, GETHER } },
-        { 0xFF80402C, 0, 32, 8, /* INT2PRI11 */
-                { MTU2, RGPVG, MIMLB, IEBUS } },
-};
-
-static DECLARE_INTC_DESC(intc_desc, "sh7734", vectors, groups,
-        mask_registers, prio_registers, NULL);
-
-/* Support for external interrupt pins in IRQ mode */
-
-static struct intc_vect irq3210_vectors[] __initdata = {
-        INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
-        INTC_VECT(IRQ2, 0x2C0), INTC_VECT(IRQ3, 0x300),
-};
-
-static struct intc_sense_reg irq3210_sense_registers[] __initdata = {
-        { 0xFF80201C, 32, 2, /* ICR1 */
-        { IRQ0, IRQ1, IRQ2, IRQ3, } },
-};
-
-static struct intc_mask_reg irq3210_ack_registers[] __initdata = {
-        { 0xFF802024, 0, 32, /* INTREQ */
-        { IRQ0, IRQ1, IRQ2, IRQ3, } },
-};
-
-static struct intc_mask_reg irq3210_mask_registers[] __initdata = {
-        { 0xFF802044, 0xFF802064, 32, /* INTMSK0 / INTMSKCLR0 */
-        { IRQ0, IRQ1, IRQ2, IRQ3, } },
-};
-
-static struct intc_prio_reg irq3210_prio_registers[] __initdata = {
-        { 0xFF802010, 0, 32, 4, /* INTPRI */
-        { IRQ0, IRQ1, IRQ2, IRQ3, } },
-};
-
-static DECLARE_INTC_DESC_ACK(intc_desc_irq3210, "sh7734-irq3210",
-        irq3210_vectors, NULL,
-        irq3210_mask_registers, irq3210_prio_registers,
-        irq3210_sense_registers, irq3210_ack_registers);
-
-/* External interrupt pins in IRL mode */
-
-static struct intc_vect vectors_irl3210[] __initdata = {
-        INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),
-        INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),
-        INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),
-        INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),
-        INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),
-        INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),
-        INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),
-        INTC_VECT(IRL0_HHHL, 0x3c0),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irl3210, "sh7734-irl3210",
-        vectors_irl3210, NULL, mask_registers, NULL, NULL);
-
-#define INTC_ICR0               0xFF802000
-#define INTC_INTMSK0    0xFF802044
-#define INTC_INTMSK1    0xFF802048
-#define INTC_INTMSKCLR0 0xFF802064
-#define INTC_INTMSKCLR1 0xFF802068
-
-void __init plat_irq_setup(void)
-{
-        /* disable IRQ3-0 */
-        __raw_writel(0xF0000000, INTC_INTMSK0);
-
-        /* disable IRL3-0 */
-        __raw_writel(0x80000000, INTC_INTMSK1);
-
-        /* select IRL mode for IRL3-0 */
-        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00800000, INTC_ICR0);
-
-        /* disable holding function, ie enable "SH-4 Mode (LVLMODE)" */
-        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
-
-        register_intc_controller(&intc_desc);
-}
-
-void __init plat_irq_setup_pins(int mode)
-{
-        switch (mode) {
-        case IRQ_MODE_IRQ3210:
-                /* select IRQ mode for IRL3-0 */
-                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
-                register_intc_controller(&intc_desc_irq3210);
-                break;
-        case IRQ_MODE_IRL3210:
-                /* enable IRL0-3 but don't provide any masking */
-                __raw_writel(0x80000000, INTC_INTMSKCLR1);
-                __raw_writel(0xf0000000, INTC_INTMSKCLR0);
-                break;
-        case IRQ_MODE_IRL3210_MASK:
-                /* enable IRL0-3 and mask using cpu intc controller */
-                __raw_writel(0x80000000, INTC_INTMSKCLR0);
-                register_intc_controller(&intc_desc_irl3210);
-                break;
-        default:
-                BUG();
-        }
-}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 9079a0f9ea9..05559295d2c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -18,8 +18,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/sh_timer.h>
 #include <linux/sh_dma.h>
-#include <linux/sh_intc.h>
-#include <linux/usb/ohci_pdriver.h>
+
 #include <cpu/dma-register.h>
 #include <cpu/sh7757.h>
 
@@ -29,7 +28,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x700)),
+        .irqs           = { 40, 40, 40, 40 },
 };
 
 static struct platform_device scif2_device = {
@@ -46,7 +45,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xb80)),
+        .irqs           = { 76, 76, 76, 76 },
 };
 
 static struct platform_device scif3_device = {
@@ -63,7 +62,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xF00)),
+        .irqs           = { 104, 104, 104, 104 },
 };
 
 static struct platform_device scif4_device = {
@@ -87,7 +86,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x580),
+                .start  = 28,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -115,7 +114,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5a0),
+                .start  = 29,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -134,10 +133,10 @@ static struct resource spi0_resources[] = {
         [0] = {
                 .start  = 0xfe002000,
                 .end    = 0xfe0020ff,
-                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+                .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xcc0),
+                .start  = 86,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -217,20 +216,6 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
                                   TS_INDEX2VAL(XMIT_SZ_8BIT),
                 .mid_rid        = 0x42,
         },
-        {
-                .slave_id       = SHDMA_SLAVE_RSPI_TX,
-                .addr           = 0xfe480004,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
-                                  TS_INDEX2VAL(XMIT_SZ_16BIT),
-                .mid_rid        = 0xc1,
-        },
-        {
-                .slave_id       = SHDMA_SLAVE_RSPI_RX,
-                .addr           = 0xfe480004,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
-                                  TS_INDEX2VAL(XMIT_SZ_16BIT),
-                .mid_rid        = 0xc2,
-        },
 };
 
 static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
@@ -480,9 +465,8 @@ static struct resource sh7757_dmae0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0x640),
-                .end    = evt2irq(0x640),
+                .start  = 34,
+                .end    = 34,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
@@ -502,57 +486,57 @@ static struct resource sh7757_dmae1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0x640),
-                .end    = evt2irq(0x640),
+                /* DMA error */
+                .start  = 34,
+                .end    = 34,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 4 */
-                .start  = evt2irq(0x7c0),
-                .end    = evt2irq(0x7c0),
+                .start  = 46,
+                .end    = 46,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 5 */
-                .start  = evt2irq(0x7c0),
-                .end    = evt2irq(0x7c0),
+                .start  = 46,
+                .end    = 46,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 6 */
-                .start  = evt2irq(0xd00),
-                .end    = evt2irq(0xd00),
+                .start  = 88,
+                .end    = 88,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 7 */
-                .start  = evt2irq(0xd00),
-                .end    = evt2irq(0xd00),
+                .start  = 88,
+                .end    = 88,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 8 */
-                .start  = evt2irq(0xd00),
-                .end    = evt2irq(0xd00),
+                .start  = 88,
+                .end    = 88,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 9 */
-                .start  = evt2irq(0xd00),
-                .end    = evt2irq(0xd00),
+                .start  = 88,
+                .end    = 88,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 10 */
-                .start  = evt2irq(0xd00),
-                .end    = evt2irq(0xd00),
+                .start  = 88,
+                .end    = 88,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
         {
                 /* IRQ for channels 11 */
-                .start  = evt2irq(0xd00),
-                .end    = evt2irq(0xd00),
+                .start  = 88,
+                .end    = 88,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
@@ -572,21 +556,21 @@ static struct resource sh7757_dmae2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0x2a60),
-                .end    = evt2irq(0x2a60),
+                /* DMA error */
+                .start  = 323,
+                .end    = 323,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 12 to 16 */
-                .start  = evt2irq(0x2400),
-                .end    = evt2irq(0x2480),
+                .start  = 272,
+                .end    = 276,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channel 17 */
-                .start  = evt2irq(0x24e0),
-                .end    = evt2irq(0x24e0),
+                .start  = 279,
+                .end    = 279,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -606,21 +590,21 @@ static struct resource sh7757_dmae3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .name   = "error_irq",
-                .start  = evt2irq(0x2a80),
-                .end    = evt2irq(0x2a80),
+                /* DMA error */
+                .start  = 324,
+                .end    = 324,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 18 to 22 */
-                .start  = evt2irq(0x2500),
-                .end    = evt2irq(0x2580),
+                .start  = 280,
+                .end    = 284,
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channel 23 */
-                .start  = evt2irq(0x2600),
-                .end    = evt2irq(0x2600),
+                .start  = 288,
+                .end    = 288,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -676,44 +660,6 @@ static struct platform_device spi0_device = {
         .resource       = spi0_resources,
 };
 
-static struct resource spi1_resources[] = {
-        {
-                .start  = 0xffd8ee70,
-                .end    = 0xffd8eeff,
-                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
-        },
-        {
-                .start  = evt2irq(0x8c0),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device spi1_device = {
-        .name   = "sh_spi",
-        .id     = 1,
-        .num_resources  = ARRAY_SIZE(spi1_resources),
-        .resource       = spi1_resources,
-};
-
-static struct resource rspi_resources[] = {
-        {
-                .start  = 0xfe480000,
-                .end    = 0xfe4800ff,
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .start  = evt2irq(0x1d80),
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device rspi_device = {
-        .name   = "rspi",
-        .id     = 2,
-        .num_resources  = ARRAY_SIZE(rspi_resources),
-        .resource       = rspi_resources,
-};
-
 static struct resource usb_ehci_resources[] = {
         [0] = {
                 .start  = 0xfe4f1000,
@@ -721,8 +667,8 @@ static struct resource usb_ehci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x920),
-                .end    = evt2irq(0x920),
+                .start  = 57,
+                .end    = 57,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -745,21 +691,18 @@ static struct resource usb_ohci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x920),
-                .end    = evt2irq(0x920),
+                .start  = 57,
+                .end    = 57,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-static struct usb_ohci_pdata usb_ohci_pdata;
-
 static struct platform_device usb_ohci_device = {
-        .name           = "ohci-platform",
+        .name           = "sh_ohci",
         .id             = -1,
         .dev = {
                 .dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
                 .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data  = &usb_ohci_pdata,
         },
         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
         .resource       = usb_ohci_resources,
@@ -776,8 +719,6 @@ static struct platform_device *sh7757_devices[] __initdata = {
         &dma2_device,
         &dma3_device,
         &spi0_device,
-        &spi1_device,
-        &rspi_device,
         &usb_ehci_device,
         &usb_ohci_device,
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 1686acaaf45..00113515f23 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -13,10 +13,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/io.h>
 #include <linux/serial_sci.h>
-#include <linux/usb/ohci_pdriver.h>
 
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xffe00000,
@@ -24,7 +22,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x700)),
+        .irqs           = { 40, 40, 40, 40 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -42,7 +40,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xb80)),
+        .irqs           = { 76, 76, 76, 76 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -60,7 +58,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xf00)),
+        .irqs           = { 104, 104, 104, 104 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -80,7 +78,7 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Shared Period/Carry/Alarm IRQ */
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -99,23 +97,19 @@ static struct resource usb_ohci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xc60),
-                .end    = evt2irq(0xc60),
+                .start  = 83,
+                .end    = 83,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static u64 usb_ohci_dma_mask = 0xffffffffUL;
-
-static struct usb_ohci_pdata usb_ohci_pdata;
-
 static struct platform_device usb_ohci_device = {
-        .name           = "ohci-platform",
+        .name           = "sh_ohci",
         .id             = -1,
         .dev = {
                 .dma_mask               = &usb_ohci_dma_mask,
                 .coherent_dma_mask      = 0xffffffff,
-                .platform_data          = &usb_ohci_pdata,
         },
         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
         .resource       = usb_ohci_resources,
@@ -128,8 +122,8 @@ static struct resource usbf_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xc80),
-                .end    = evt2irq(0xc80),
+                .start  = 84,
+                .end    = 84,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -158,7 +152,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x580),
+                .start  = 28,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -186,7 +180,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5a0),
+                .start  = 29,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -213,7 +207,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5c0),
+                .start  = 30,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -240,7 +234,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
+                .start  = 96,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -267,7 +261,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe20),
+                .start  = 97,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -294,7 +288,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe40),
+                .start  = 98,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 256ea7a4516..2c6aa22cf5f 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -12,7 +12,6 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <linux/io.h>
 
 static struct plat_sci_port scif0_platform_data = {
@@ -21,7 +20,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
+        .irqs           = { 61, 61, 61, 61 },
 };
 
 static struct platform_device scif0_device = {
@@ -38,7 +37,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
+        .irqs           = { 62, 62, 62, 62 },
 };
 
 static struct platform_device scif1_device = {
@@ -55,7 +54,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
+        .irqs           = { 63, 63, 63, 63 },
 };
 
 static struct platform_device scif2_device = {
@@ -72,7 +71,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xa00)),
+        .irqs           = { 64, 64, 64, 64 },
 };
 
 static struct platform_device scif3_device = {
@@ -89,7 +88,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xa20)),
+        .irqs           = { 65, 65, 65, 65 },
 };
 
 static struct platform_device scif4_device = {
@@ -106,7 +105,7 @@ static struct plat_sci_port scif5_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xa40)),
+        .irqs           = { 66, 66, 66, 66 },
 };
 
 static struct platform_device scif5_device = {
@@ -123,7 +122,7 @@ static struct plat_sci_port scif6_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xa60)),
+        .irqs           = { 67, 67, 67, 67 },
 };
 
 static struct platform_device scif6_device = {
@@ -140,7 +139,7 @@ static struct plat_sci_port scif7_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xa80)),
+        .irqs           = { 68, 68, 68, 68 },
 };
 
 static struct platform_device scif7_device = {
@@ -157,7 +156,7 @@ static struct plat_sci_port scif8_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xaa0)),
+        .irqs           = { 69, 69, 69, 69 },
 };
 
 static struct platform_device scif8_device = {
@@ -174,7 +173,7 @@ static struct plat_sci_port scif9_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xac0)),
+        .irqs           = { 70, 70, 70, 70 },
 };
 
 static struct platform_device scif9_device = {
@@ -198,7 +197,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -226,7 +225,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -253,7 +252,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -280,7 +279,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x460),
+                .start  = 19,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -307,7 +306,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -334,7 +333,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4a0),
+                .start  = 21,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -361,7 +360,7 @@ static struct resource tmu6_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4c0),
+                .start  = 22,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -388,7 +387,7 @@ static struct resource tmu7_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4e0),
+                .start  = 23,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -415,7 +414,7 @@ static struct resource tmu8_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x500),
+                .start  = 24,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index de45b704687..3d4d2075c19 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -14,7 +14,6 @@
 #include <linux/serial_sci.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <cpu/dma-register.h>
 
 static struct plat_sci_port scif0_platform_data = {
@@ -23,7 +22,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x700)),
+        .irqs           = { 40, 40, 40, 40 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -41,7 +40,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0xb80)),
+        .irqs           = { 76, 76, 76, 76 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -66,7 +65,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x580),
+                .start  = 28,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -94,7 +93,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5a0),
+                .start  = 29,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -121,7 +120,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5c0),
+                .start  = 30,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -148,7 +147,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
+                .start  = 96,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -175,7 +174,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe20),
+                .start  = 97,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -202,7 +201,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe40),
+                .start  = 98,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -225,7 +224,7 @@ static struct resource rtc_resources[] = {
         },
         [1] = {
                 /* Shared Period/Carry/Alarm IRQ */
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -322,13 +321,9 @@ static struct resource sh7780_dmae0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                /*
-                 * Real DMA error vector is 0x6c0, and channel
-                 * vectors are 0x640-0x6a0, 0x780-0x7a0
-                 */
-                .name   = "error_irq",
-                .start  = evt2irq(0x640),
-                .end    = evt2irq(0x640),
+                /* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */
+                .start  = 34,
+                .end    = 34,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
@@ -342,13 +337,9 @@ static struct resource sh7780_dmae1_resources[] = {
         },
         /* DMAC1 has no DMARS */
         {
-                /*
-                 * Real DMA error vector is 0x6c0, and channel
-                 * vectors are 0x7c0-0x7e0, 0xd80-0xde0
-                 */
-                .name   = "error_irq",
-                .start  = evt2irq(0x7c0),
-                .end    = evt2irq(0x7c0),
+                /* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */
+                .start  = 46,
+                .end    = 46,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 0968ecb962e..b29e6340414 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -15,7 +15,6 @@
 #include <linux/mm.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <asm/mmzone.h>
 #include <cpu/dma-register.h>
 
@@ -25,7 +24,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x700)),
+        .irqs           = { 40, 40, 40, 40 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -43,7 +42,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x780)),
+        .irqs           = { 44, 44, 44, 44 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -61,7 +60,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x980)),
+        .irqs           = { 60, 60, 60, 60 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -79,7 +78,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
+        .irqs           = { 61, 61, 61, 61 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -97,7 +96,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
+        .irqs           = { 62, 62, 62, 62 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -115,7 +114,7 @@ static struct plat_sci_port scif5_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
+        .irqs           = { 63, 63, 63, 63 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -140,7 +139,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x580),
+                .start  = 28,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -168,7 +167,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5a0),
+                .start  = 29,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -195,7 +194,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x5c0),
+                .start  = 30,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -222,7 +221,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe00),
+                .start  = 96,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -249,7 +248,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe20),
+                .start  = 97,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -276,7 +275,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xe40),
+                .start  = 98,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -376,13 +375,9 @@ static struct resource sh7785_dmae0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                /*
-                 * Real DMA error vector is 0x6e0, and channel
-                 * vectors are 0x620-0x6c0
-                 */
-                .name   = "error_irq",
-                .start  = evt2irq(0x620),
-                .end    = evt2irq(0x620),
+                /* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
+                .start  = 33,
+                .end    = 33,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
@@ -396,13 +391,9 @@ static struct resource sh7785_dmae1_resources[] = {
         },
         /* DMAC1 has no DMARS */
         {
-                /*
-                 * Real DMA error vector is 0x940, and channel
-                 * vectors are 0x880-0x920
-                 */
-                .name   = "error_irq",
-                .start  = evt2irq(0x880),
-                .end    = evt2irq(0x880),
+                /* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
+                .start  = 52,
+                .end    = 52,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index ab52d4d4484..dd5e709f982 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -23,7 +23,6 @@
 #include <linux/sh_timer.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_intc.h>
-#include <linux/usb/ohci_pdriver.h>
 #include <cpu/dma-register.h>
 #include <asm/mmzone.h>
 
@@ -33,10 +32,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0x700),
-                            evt2irq(0x720),
-                            evt2irq(0x760),
-                            evt2irq(0x740) },
+        .irqs           = { 40, 41, 43, 42 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -57,7 +53,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x780)),
+        .irqs           = { 44, 44, 44, 44 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -75,7 +71,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x840)),
+        .irqs           = { 50, 50, 50, 50 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -93,7 +89,7 @@ static struct plat_sci_port scif3_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x860)),
+        .irqs           = { 51, 51, 51, 51 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -111,7 +107,7 @@ static struct plat_sci_port scif4_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x880)),
+        .irqs           = { 52, 52, 52, 52 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -129,7 +125,7 @@ static struct plat_sci_port scif5_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
         .scbrr_algo_id  = SCBRR_ALGO_1,
         .type           = PORT_SCIF,
-        .irqs           = SCIx_IRQ_MUXED(evt2irq(0x8a0)),
+        .irqs           = { 53, 53, 53, 53 },
         .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -154,7 +150,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -182,7 +178,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -209,7 +205,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -236,7 +232,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -263,7 +259,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4a0),
+                .start  = 21,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -290,7 +286,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4c0),
+                .start  = 22,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -317,7 +313,7 @@ static struct resource tmu6_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x7a0),
+                .start  = 45,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -344,7 +340,7 @@ static struct resource tmu7_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x7a0),
+                .start  = 45,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -371,7 +367,7 @@ static struct resource tmu8_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x7a0),
+                .start  = 45,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -398,7 +394,7 @@ static struct resource tmu9_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x7c0),
+                .start  = 46,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -425,7 +421,7 @@ static struct resource tmu10_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x7c0),
+                .start  = 46,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -452,7 +448,7 @@ static struct resource tmu11_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x7c0),
+                .start  = 46,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -522,7 +518,7 @@ static struct resource dmac0_resources[] = {
                 .end    = 0xfe00900b,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .name   = "error_irq",
+                /* DMA error IRQ */
                 .start  = evt2irq(0x5c0),
                 .end    = evt2irq(0x5c0),
                 .flags  = IORESOURCE_IRQ,
@@ -554,8 +550,8 @@ static struct resource usb_ehci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xba0),
-                .end    = evt2irq(0xba0),
+                .start  = 77,
+                .end    = 77,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -578,21 +574,18 @@ static struct resource usb_ohci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0xba0),
-                .end    = evt2irq(0xba0),
+                .start  = 77,
+                .end    = 77,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-static struct usb_ohci_pdata usb_ohci_pdata;
-
 static struct platform_device usb_ohci_device = {
-        .name           = "ohci-platform",
+        .name           = "sh_ohci",
         .id             = -1,
         .dev = {
                 .dma_mask               = &usb_ohci_device.dev.coherent_dma_mask,
                 .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data          = &usb_ohci_pdata,
         },
         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
         .resource       = usb_ohci_resources,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 688f7ed1bab..bb208806dc1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -14,7 +14,6 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
 #include <cpu/shx3.h>
 #include <asm/mmzone.h>
 
@@ -33,10 +32,7 @@ static struct plat_sci_port scif0_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0x700),
-                            evt2irq(0x720),
-                            evt2irq(0x760),
-                            evt2irq(0x740) },
+        .irqs           = { 40, 41, 43, 42 },
 };
 
 static struct platform_device scif0_device = {
@@ -53,10 +49,7 @@ static struct plat_sci_port scif1_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0x780),
-                            evt2irq(0x7a0),
-                            evt2irq(0x7e0),
-                            evt2irq(0x7c0) },
+        .irqs           = { 44, 45, 47, 46 },
 };
 
 static struct platform_device scif1_device = {
@@ -73,10 +66,7 @@ static struct plat_sci_port scif2_platform_data = {
         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
         .scbrr_algo_id  = SCBRR_ALGO_2,
         .type           = PORT_SCIF,
-        .irqs           = { evt2irq(0x880),
-                            evt2irq(0x8a0),
-                            evt2irq(0x8e0),
-                            evt2irq(0x8c0) },
+        .irqs           = { 52, 53, 55, 54 },
 };
 
 static struct platform_device scif2_device = {
@@ -100,7 +90,7 @@ static struct resource tmu0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x400),
+                .start  = 16,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -128,7 +118,7 @@ static struct resource tmu1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x420),
+                .start  = 17,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -155,7 +145,7 @@ static struct resource tmu2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x440),
+                .start  = 18,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -182,7 +172,7 @@ static struct resource tmu3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x460),
+                .start  = 19,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -209,7 +199,7 @@ static struct resource tmu4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x480),
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -236,7 +226,7 @@ static struct resource tmu5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x4a0),
+                .start  = 21,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -494,6 +484,9 @@ void __init plat_irq_setup_pins(int mode)
 
 void __init plat_irq_setup(void)
 {
+        reserve_intc_vectors(vectors_irq, ARRAY_SIZE(vectors_irq));
+        reserve_intc_vectors(vectors_irl, ARRAY_SIZE(vectors_irl));
+
         register_intc_controller(&intc_desc);
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 03f2b55757c..de865cac02e 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -79,7 +79,7 @@ static void shx3_prepare_cpus(unsigned int max_cpus)
 
         for (i = 0; i < SMP_MSG_NR; i++)
                 request_irq(104 + i, ipi_interrupt_handler,
-                            IRQF_PERCPU, "IPI", (void *)(long)i);
+                            IRQF_DISABLED | IRQF_PERCPU, "IPI", (void *)(long)i);
 
         for (i = 0; i < max_cpus; i++)
                 set_cpu_present(i, true);
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index c48b93d4c08..9cfc19b8dbe 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -28,7 +28,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= ifc_table[idx];
 }
 
-static struct sh_clk_ops sh5_master_clk_ops = {
+static struct clk_ops sh5_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -38,7 +38,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_table[idx];
 }
 
-static struct sh_clk_ops sh5_module_clk_ops = {
+static struct clk_ops sh5_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -48,7 +48,7 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_table[idx];
 }
 
-static struct sh_clk_ops sh5_bus_clk_ops = {
+static struct clk_ops sh5_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
@@ -58,18 +58,18 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
         return clk->parent->rate / ifc_table[idx];
 }
 
-static struct sh_clk_ops sh5_cpu_clk_ops = {
+static struct clk_ops sh5_cpu_clk_ops = {
         .recalc         = cpu_clk_recalc,
 };
 
-static struct sh_clk_ops *sh5_clk_ops[] = {
+static struct clk_ops *sh5_clk_ops[] = {
         &sh5_master_clk_ops,
         &sh5_module_clk_ops,
         &sh5_bus_clk_ops,
         &sh5_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
         cprc_base = (unsigned long)ioremap_nocache(CPRC_BASE, 1024);
         BUG_ON(!cprc_base);
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 0c8d0377d40..6b80295dd7a 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -335,7 +335,7 @@ tlb_miss:
         /* If the fast path handler fixed the fault, just drop through quickly
            to the restore code right away to return to the excepting context.
            */
-        bnei/u  r2, 0, tr1
+        beqi/u  r2, 0, tr1
 
 fast_tlb_miss_restore:
         ld.q    SP, SAVED_TR0, r2
@@ -933,7 +933,7 @@ ret_with_reschedule:
 
         pta     restore_all, tr1
 
-        movi    (_TIF_SIGPENDING|_TIF_NOTIFY_RESUME), r8
+        movi    _TIF_SIGPENDING, r8
         and     r8, r7, r8
         pta     work_notifysig, tr0
         bne     r8, ZERO, tr0
@@ -1079,8 +1079,9 @@ restore_all:
  *
  * Kernel TLB fault handlers will get a slightly different interface.
  * (r2)   struct pt_regs *, original register's frame pointer
- * (r3)   page fault error code (see asm/thread_info.h)
- * (r4)   Effective Address of fault
+ * (r3)   writeaccess, whether it's a store fault as opposed to load fault
+ * (r4)   execaccess, whether it's a ITLB fault as opposed to DTLB fault
+ * (r5)   Effective Address of fault
  * (LINK) return address
  * (SP)   = r2
  *
@@ -1091,25 +1092,26 @@ restore_all:
 tlb_miss_load:
         or      SP, ZERO, r2
         or      ZERO, ZERO, r3          /* Read */
-        getcon  TEA, r4
+        or      ZERO, ZERO, r4          /* Data */
+        getcon  TEA, r5
         pta     call_do_page_fault, tr0
         beq     ZERO, ZERO, tr0
 
 tlb_miss_store:
         or      SP, ZERO, r2
-        movi    FAULT_CODE_WRITE, r3            /* Write */
-        getcon  TEA, r4
+        movi    1, r3                   /* Write */
+        or      ZERO, ZERO, r4          /* Data */
+        getcon  TEA, r5
         pta     call_do_page_fault, tr0
         beq     ZERO, ZERO, tr0
 
 itlb_miss_or_IRQ:
         pta     its_IRQ, tr0
         beqi/u  r4, EVENT_INTERRUPT, tr0
-
-        /* ITLB miss */
         or      SP, ZERO, r2
-        movi    FAULT_CODE_ITLB, r3
-        getcon  TEA, r4
+        or      ZERO, ZERO, r3          /* Read */
+        movi    1, r4                   /* Text */
+        getcon  TEA, r5
         /* Fall through */
 
 call_do_page_fault:
@@ -1228,25 +1230,6 @@ ret_from_fork:
         pta     ret_from_syscall, tr0
         blink   tr0, ZERO
 
-.global ret_from_kernel_thread
-ret_from_kernel_thread:
-
-        movi    schedule_tail,r5
-        ori     r5, 1, r5
-        ptabs   r5, tr0
-        blink   tr0, LINK
-
-        ld.q    SP, FRAME_R(2), r2
-        ld.q    SP, FRAME_R(3), r3
-        ptabs   r3, tr0
-        blink   tr0, LINK
-
-        ld.q    SP, FRAME_S(FSPC), r2
-        addi    r2, 4, r2               /* Move PC, being pre-execution event */
-        st.q    SP, FRAME_S(FSPC), r2
-        pta     ret_from_syscall, tr0
-        blink   tr0, ZERO
-
 syscall_allowed:
         /* Use LINK to deflect the exit point, default is syscall_ret */
         pta     syscall_ret, tr0
@@ -1588,6 +1571,86 @@ ___clear_user_exit:
 #endif /* CONFIG_MMU */
 
 /*
+ * int __strncpy_from_user(unsigned long __dest, unsigned long __src,
+ *                         int __count)
+ *
+ * Inputs:
+ * (r2)  target address
+ * (r3)  source address
+ * (r4)  maximum size in bytes
+ *
+ * Ouputs:
+ * (*r2) copied data
+ * (r2)  -EFAULT (in case of faulting)
+ *       copied data (otherwise)
+ */
+        .global __strncpy_from_user
+__strncpy_from_user:
+        pta     ___strncpy_from_user1, tr0
+        pta     ___strncpy_from_user_done, tr1
+        or      r4, ZERO, r5            /* r5 = original count */
+        beq/u   r4, r63, tr1            /* early exit if r4==0 */
+        movi    -(EFAULT), r6           /* r6 = reply, no real fixup */
+        or      ZERO, ZERO, r7          /* r7 = data, clear top byte of data */
+
+___strncpy_from_user1:
+        ld.b    r3, 0, r7               /* Fault address: only in reading */
+        st.b    r2, 0, r7
+        addi    r2, 1, r2
+        addi    r3, 1, r3
+        beq/u   ZERO, r7, tr1
+        addi    r4, -1, r4              /* return real number of copied bytes */
+        bne/l   ZERO, r4, tr0
+
+___strncpy_from_user_done:
+        sub     r5, r4, r6              /* If done, return copied */
+
+___strncpy_from_user_exit:
+        or      r6, ZERO, r2
+        ptabs   LINK, tr0
+        blink   tr0, ZERO
+
+/*
+ * extern long __strnlen_user(const char *__s, long __n)
+ *
+ * Inputs:
+ * (r2)  source address
+ * (r3)  source size in bytes
+ *
+ * Ouputs:
+ * (r2)  -EFAULT (in case of faulting)
+ *       string length (otherwise)
+ */
+        .global __strnlen_user
+__strnlen_user:
+        pta     ___strnlen_user_set_reply, tr0
+        pta     ___strnlen_user1, tr1
+        or      ZERO, ZERO, r5          /* r5 = counter */
+        movi    -(EFAULT), r6           /* r6 = reply, no real fixup */
+        or      ZERO, ZERO, r7          /* r7 = data, clear top byte of data */
+        beq     r3, ZERO, tr0
+
+___strnlen_user1:
+        ldx.b   r2, r5, r7              /* Fault address: only in reading */
+        addi    r3, -1, r3              /* No real fixup */
+        addi    r5, 1, r5
+        beq     r3, ZERO, tr0
+        bne     r7, ZERO, tr1
+! The line below used to be active.  This meant led to a junk byte lying between each pair
+! of entries in the argv & envp structures in memory.  Whilst the program saw the right data
+! via the argv and envp arguments to main, it meant the 'flat' representation visible through
+! /proc/$pid/cmdline was corrupt, causing trouble with ps, for example.
+!       addi    r5, 1, r5               /* Include '\0' */
+
+___strnlen_user_set_reply:
+        or      r5, ZERO, r6            /* If done, return counter */
+
+___strnlen_user_exit:
+        or      r6, ZERO, r2
+        ptabs   LINK, tr0
+        blink   tr0, ZERO
+
+/*
  * extern long __get_user_asm_?(void *val, long addr)
  *
  * Inputs:
@@ -1921,6 +1984,8 @@ asm_uaccess_start:
         .long   ___copy_user2, ___copy_user_exit
         .long   ___clear_user1, ___clear_user_exit
 #endif
+        .long   ___strncpy_from_user1, ___strncpy_from_user_exit
+        .long   ___strnlen_user1, ___strnlen_user_exit
         .long   ___get_user_asm_b1, ___get_user_asm_b_exit
         .long   ___get_user_asm_w1, ___get_user_asm_w_exit
         .long   ___get_user_asm_l1, ___get_user_asm_l_exit
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index 9f8713aa718..4b3bb35e99f 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -107,5 +107,8 @@ asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs)
 
         regs->pc += 4;
 
+        tsk->thread.trap_no = 11;
+        tsk->thread.error_code = 0;
+
         force_sig(SIGFPE, tsk);
 }
diff --git a/arch/sh/kernel/cpu/sh5/unwind.c b/arch/sh/kernel/cpu/sh5/unwind.c
index 10aed41757f..b205b25eaf4 100644
--- a/arch/sh/kernel/cpu/sh5/unwind.c
+++ b/arch/sh/kernel/cpu/sh5/unwind.c
@@ -16,8 +16,6 @@
 #include <asm/ptrace.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <asm/unwinder.h>
-#include <asm/stacktrace.h>
 
 static u8 regcache[63];
 
@@ -201,11 +199,8 @@ static int lookup_prev_stack_frame(unsigned long fp, unsigned long pc,
         return 0;
 }
 
-/*
- * Don't put this on the stack since we'll want to call in to
- * sh64_unwinder_dump() when we're close to underflowing the stack
- * anyway.
- */
+/* Don't put this on the stack since we'll want to call sh64_unwind
+ * when we're close to underflowing the stack anyway. */
 static struct pt_regs here_regs;
 
 extern const char syscall_ret;
@@ -213,19 +208,17 @@ extern const char ret_from_syscall;
 extern const char ret_from_exception;
 extern const char ret_from_irq;
 
-static void sh64_unwind_inner(const struct stacktrace_ops *ops,
-                              void *data, struct pt_regs *regs);
+static void sh64_unwind_inner(struct pt_regs *regs);
 
-static inline void unwind_nested(const struct stacktrace_ops *ops, void *data,
-                                 unsigned long pc, unsigned long fp)
+static void unwind_nested (unsigned long pc, unsigned long fp)
 {
         if ((fp >= __MEMORY_START) &&
-            ((fp & 7) == 0))
-                sh64_unwind_inner(ops, data, (struct pt_regs *)fp);
+            ((fp & 7) == 0)) {
+                sh64_unwind_inner((struct pt_regs *) fp);
+        }
 }
 
-static void sh64_unwind_inner(const struct stacktrace_ops *ops,
-                              void *data, struct pt_regs *regs)
+static void sh64_unwind_inner(struct pt_regs *regs)
 {
         unsigned long pc, fp;
         int ofs = 0;
@@ -239,29 +232,29 @@ static void sh64_unwind_inner(const struct stacktrace_ops *ops,
                 int cond;
                 unsigned long next_fp, next_pc;
 
-                if (pc == ((unsigned long)&syscall_ret & ~1)) {
+                if (pc == ((unsigned long) &syscall_ret & ~1)) {
                         printk("SYSCALL\n");
-                        unwind_nested(ops, data, pc, fp);
+                        unwind_nested(pc,fp);
                         return;
                 }
 
-                if (pc == ((unsigned long)&ret_from_syscall & ~1)) {
+                if (pc == ((unsigned long) &ret_from_syscall & ~1)) {
                         printk("SYSCALL (PREEMPTED)\n");
-                        unwind_nested(ops, data, pc, fp);
+                        unwind_nested(pc,fp);
                         return;
                 }
 
                 /* In this case, the PC is discovered by lookup_prev_stack_frame but
                    it has 4 taken off it to look like the 'caller' */
-                if (pc == ((unsigned long)&ret_from_exception & ~1)) {
+                if (pc == ((unsigned long) &ret_from_exception & ~1)) {
                         printk("EXCEPTION\n");
-                        unwind_nested(ops, data, pc, fp);
+                        unwind_nested(pc,fp);
                         return;
                 }
 
-                if (pc == ((unsigned long)&ret_from_irq & ~1)) {
+                if (pc == ((unsigned long) &ret_from_irq & ~1)) {
                         printk("IRQ\n");
-                        unwind_nested(ops, data, pc, fp);
+                        unwind_nested(pc,fp);
                         return;
                 }
 
@@ -270,7 +263,8 @@ static void sh64_unwind_inner(const struct stacktrace_ops *ops,
 
                 pc -= ofs;
 
-                ops->address(data, pc, 1);
+                printk("[<%08lx>] ", pc);
+                print_symbol("%s\n", pc);
 
                 if (first_pass) {
                         /* If the innermost frame is a leaf function, it's
@@ -293,13 +287,10 @@ static void sh64_unwind_inner(const struct stacktrace_ops *ops,
         }
 
         printk("\n");
+
 }
 
-static void sh64_unwinder_dump(struct task_struct *task,
-                               struct pt_regs *regs,
-                               unsigned long *sp,
-                               const struct stacktrace_ops *ops,
-                               void *data)
+void sh64_unwind(struct pt_regs *regs)
 {
         if (!regs) {
                 /*
@@ -329,17 +320,7 @@ static void sh64_unwinder_dump(struct task_struct *task,
                 );
         }
 
-        sh64_unwind_inner(ops, data, regs);
+        printk("\nCall Trace:\n");
+        sh64_unwind_inner(regs);
 }
 
-static struct unwinder sh64_unwinder = {
-        .name   = "sh64-unwinder",
-        .dump   = sh64_unwinder_dump,
-        .rating = 150,
-};
-
-static int __init sh64_unwinder_init(void)
-{
-        return unwinder_register(&sh64_unwinder);
-}
-early_initcall(sh64_unwinder_init);
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile
index e8a5111e848..a39f88ea1a8 100644
--- a/arch/sh/kernel/cpu/shmobile/Makefile
+++ b/arch/sh/kernel/cpu/shmobile/Makefile
@@ -5,3 +5,4 @@
 # Power Management & Sleep mode
 obj-$(CONFIG_PM)        += pm.o sleep.o
 obj-$(CONFIG_CPU_IDLE)  += cpuidle.o
+obj-$(CONFIG_PM_RUNTIME)        += pm_runtime.o
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c
index 1ddc876d3b2..e4469e7233c 100644
--- a/arch/sh/kernel/cpu/shmobile/cpuidle.c
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -14,9 +14,9 @@
 #include <linux/io.h>
 #include <linux/suspend.h>
 #include <linux/cpuidle.h>
-#include <linux/export.h>
 #include <asm/suspend.h>
 #include <asm/uaccess.h>
+#include <asm/hwblk.h>
 
 static unsigned long cpuidle_mode[] = {
         SUSP_SH_SLEEP, /* regular sleep mode */
@@ -25,11 +25,11 @@ static unsigned long cpuidle_mode[] = {
 };
 
 static int cpuidle_sleep_enter(struct cpuidle_device *dev,
-                                struct cpuidle_driver *drv,
-                                int index)
+                               struct cpuidle_state *state)
 {
-        unsigned long allowed_mode = SUSP_SH_SLEEP;
-        int requested_state = index;
+        unsigned long allowed_mode = arch_hwblk_sleep_mode();
+        ktime_t before, after;
+        int requested_state = state - &dev->states[0];
         int allowed_state;
         int k;
 
@@ -46,34 +46,35 @@ static int cpuidle_sleep_enter(struct cpuidle_device *dev,
          */
         k = min_t(int, allowed_state, requested_state);
 
+        dev->last_state = &dev->states[k];
+        before = ktime_get();
         sh_mobile_call_standby(cpuidle_mode[k]);
-
-        return k;
+        after = ktime_get();
+        return ktime_to_ns(ktime_sub(after, before)) >> 10;
 }
 
 static struct cpuidle_device cpuidle_dev;
 static struct cpuidle_driver cpuidle_driver = {
-        .name                   = "sh_idle",
-        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
+        .name =         "sh_idle",
+        .owner =        THIS_MODULE,
 };
 
 void sh_mobile_setup_cpuidle(void)
 {
         struct cpuidle_device *dev = &cpuidle_dev;
-        struct cpuidle_driver *drv = &cpuidle_driver;
         struct cpuidle_state *state;
         int i;
 
+        cpuidle_register_driver(&cpuidle_driver);
 
         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
-                drv->states[i].name[0] = '\0';
-                drv->states[i].desc[0] = '\0';
+                dev->states[i].name[0] = '\0';
+                dev->states[i].desc[0] = '\0';
         }
 
         i = CPUIDLE_DRIVER_STATE_START;
 
-        state = &drv->states[i++];
+        state = &dev->states[i++];
         snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
         strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN);
         state->exit_latency = 1;
@@ -83,10 +84,10 @@ void sh_mobile_setup_cpuidle(void)
         state->flags |= CPUIDLE_FLAG_TIME_VALID;
         state->enter = cpuidle_sleep_enter;
 
-        drv->safe_state_index = i-1;
+        dev->safe_state = state;
 
         if (sh_mobile_sleep_supported & SUSP_SH_SF) {
-                state = &drv->states[i++];
+                state = &dev->states[i++];
                 snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
                 strncpy(state->desc, "SuperH Sleep Mode [SF]",
                         CPUIDLE_DESC_LEN);
@@ -99,7 +100,7 @@ void sh_mobile_setup_cpuidle(void)
         }
 
         if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) {
-                state = &drv->states[i++];
+                state = &dev->states[i++];
                 snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
                 strncpy(state->desc, "SuperH Mobile Standby Mode [SF]",
                         CPUIDLE_DESC_LEN);
@@ -111,10 +112,7 @@ void sh_mobile_setup_cpuidle(void)
                 state->enter = cpuidle_sleep_enter;
         }
 
-        drv->state_count = i;
         dev->state_count = i;
 
-        cpuidle_register_driver(&cpuidle_driver);
-
         cpuidle_register_device(dev);
 }
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index 08d27fac8d0..a6f95ae4aae 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -16,7 +16,6 @@
 #include <asm/suspend.h>
 #include <asm/uaccess.h>
 #include <asm/cacheflush.h>
-#include <asm/bl_bit.h>
 
 /*
  * Notifier lists for pre/post sleep notification
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index e68b45b6f3f..0fffacea6ed 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -3,7 +3,7 @@
  *
  * cpufreq driver for the SuperH processors.
  *
- * Copyright (C) 2002 - 2012 Paul Mundt
+ * Copyright (C) 2002 - 2007 Paul Mundt
  * Copyright (C) 2002 M. R. Brown
  *
  * Clock framework bits from arch/avr32/mach-at32ap/cpufreq.c
@@ -14,8 +14,6 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#define pr_fmt(fmt) "cpufreq: " fmt
-
 #include <linux/types.h>
 #include <linux/cpufreq.h>
 #include <linux/kernel.h>
@@ -23,18 +21,15 @@
 #include <linux/init.h>
 #include <linux/err.h>
 #include <linux/cpumask.h>
-#include <linux/cpu.h>
 #include <linux/smp.h>
 #include <linux/sched.h>        /* set_cpus_allowed() */
 #include <linux/clk.h>
-#include <linux/percpu.h>
-#include <linux/sh_clk.h>
 
-static DEFINE_PER_CPU(struct clk, sh_cpuclk);
+static struct clk *cpuclk;
 
 static unsigned int sh_cpufreq_get(unsigned int cpu)
 {
-        return (clk_get_rate(&per_cpu(sh_cpuclk, cpu)) + 500) / 1000;
+        return (clk_get_rate(cpuclk) + 500) / 1000;
 }
 
 /*
@@ -45,10 +40,8 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
                              unsigned int relation)
 {
         unsigned int cpu = policy->cpu;
-        struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu);
         cpumask_t cpus_allowed;
         struct cpufreq_freqs freqs;
-        struct device *dev;
         long freq;
 
         if (!cpu_online(cpu))
@@ -59,15 +52,13 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
 
         BUG_ON(smp_processor_id() != cpu);
 
-        dev = get_cpu_device(cpu);
-
         /* Convert target_freq from kHz to Hz */
         freq = clk_round_rate(cpuclk, target_freq * 1000);
 
         if (freq < (policy->min * 1000) || freq > (policy->max * 1000))
                 return -EINVAL;
 
-        dev_dbg(dev, "requested frequency %u Hz\n", target_freq * 1000);
+        pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
 
         freqs.cpu       = cpu;
         freqs.old       = sh_cpufreq_get(cpu);
@@ -79,112 +70,78 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
         clk_set_rate(cpuclk, freq);
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
-        dev_dbg(dev, "set frequency %lu Hz\n", freq);
-
-        return 0;
-}
-
-static int sh_cpufreq_verify(struct cpufreq_policy *policy)
-{
-        struct clk *cpuclk = &per_cpu(sh_cpuclk, policy->cpu);
-        struct cpufreq_frequency_table *freq_table;
-
-        freq_table = cpuclk->nr_freqs ? cpuclk->freq_table : NULL;
-        if (freq_table)
-                return cpufreq_frequency_table_verify(policy, freq_table);
-
-        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-                                     policy->cpuinfo.max_freq);
-
-        policy->min = (clk_round_rate(cpuclk, 1) + 500) / 1000;
-        policy->max = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
-
-        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-                                     policy->cpuinfo.max_freq);
+        pr_debug("cpufreq: set frequency %lu Hz\n", freq);
 
         return 0;
 }
 
 static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy)
 {
-        unsigned int cpu = policy->cpu;
-        struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu);
-        struct cpufreq_frequency_table *freq_table;
-        struct device *dev;
-
-        if (!cpu_online(cpu))
+        if (!cpu_online(policy->cpu))
                 return -ENODEV;
 
-        dev = get_cpu_device(cpu);
-
-        cpuclk = clk_get(dev, "cpu_clk");
+        cpuclk = clk_get(NULL, "cpu_clk");
         if (IS_ERR(cpuclk)) {
-                dev_err(dev, "couldn't get CPU clk\n");
+                printk(KERN_ERR "cpufreq: couldn't get CPU#%d clk\n",
+                       policy->cpu);
                 return PTR_ERR(cpuclk);
         }
 
-        policy->cur = policy->min = policy->max = sh_cpufreq_get(cpu);
+        /* cpuinfo and default policy values */
+        policy->cpuinfo.min_freq = (clk_round_rate(cpuclk, 1) + 500) / 1000;
+        policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
+        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 
-        freq_table = cpuclk->nr_freqs ? cpuclk->freq_table : NULL;
-        if (freq_table) {
-                int result;
+        policy->cur             = sh_cpufreq_get(policy->cpu);
+        policy->min             = policy->cpuinfo.min_freq;
+        policy->max             = policy->cpuinfo.max_freq;
 
-                result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
-                if (!result)
-                        cpufreq_frequency_table_get_attr(freq_table, cpu);
-        } else {
-                dev_notice(dev, "no frequency table found, falling back "
-                           "to rate rounding.\n");
+        /*
+         * Catch the cases where the clock framework hasn't been wired up
+         * properly to support scaling.
+         */
+        if (unlikely(policy->min == policy->max)) {
+                printk(KERN_ERR "cpufreq: clock framework rate rounding "
+                       "not supported on CPU#%d.\n", policy->cpu);
 
-                policy->cpuinfo.min_freq =
-                        (clk_round_rate(cpuclk, 1) + 500) / 1000;
-                policy->cpuinfo.max_freq =
-                        (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
+                clk_put(cpuclk);
+                return -EINVAL;
         }
 
-        policy->min = policy->cpuinfo.min_freq;
-        policy->max = policy->cpuinfo.max_freq;
-
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-
-        dev_info(dev, "CPU Frequencies - Minimum %u.%03u MHz, "
+        printk(KERN_INFO "cpufreq: CPU#%d Frequencies - Minimum %u.%03u MHz, "
                "Maximum %u.%03u MHz.\n",
-               policy->min / 1000, policy->min % 1000,
+               policy->cpu, policy->min / 1000, policy->min % 1000,
                policy->max / 1000, policy->max % 1000);
 
         return 0;
 }
 
-static int sh_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+static int sh_cpufreq_verify(struct cpufreq_policy *policy)
 {
-        unsigned int cpu = policy->cpu;
-        struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu);
+        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+                                     policy->cpuinfo.max_freq);
+        return 0;
+}
 
-        cpufreq_frequency_table_put_attr(cpu);
+static int sh_cpufreq_exit(struct cpufreq_policy *policy)
+{
         clk_put(cpuclk);
-
         return 0;
 }
 
-static struct freq_attr *sh_freq_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-
 static struct cpufreq_driver sh_cpufreq_driver = {
         .owner          = THIS_MODULE,
         .name           = "sh",
-        .get            = sh_cpufreq_get,
-        .target         = sh_cpufreq_target,
-        .verify         = sh_cpufreq_verify,
         .init           = sh_cpufreq_cpu_init,
-        .exit           = sh_cpufreq_cpu_exit,
-        .attr           = sh_freq_attr,
+        .verify         = sh_cpufreq_verify,
+        .target         = sh_cpufreq_target,
+        .get            = sh_cpufreq_get,
+        .exit           = sh_cpufreq_exit,
 };
 
 static int __init sh_cpufreq_module_init(void)
 {
-        pr_notice("SuperH CPU frequency driver.\n");
+        printk(KERN_INFO "cpufreq: SuperH CPU frequency driver.\n");
         return cpufreq_register_driver(&sh_cpufreq_driver);
 }
 
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
index 5b0bfcda6d0..3c55b87f8b6 100644
--- a/arch/sh/kernel/dma-nommu.c
+++ b/arch/sh/kernel/dma-nommu.c
@@ -63,8 +63,8 @@ static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
 #endif
 
 struct dma_map_ops nommu_dma_ops = {
-        .alloc                  = dma_generic_alloc_coherent,
-        .free                   = dma_generic_free_coherent,
+        .alloc_coherent         = dma_generic_alloc_coherent,
+        .free_coherent          = dma_generic_free_coherent,
         .map_page               = nommu_map_page,
         .map_sg                 = nommu_map_sg,
 #ifdef CONFIG_DMA_NONCOHERENT
diff --git a/arch/sh/kernel/dumpstack.c b/arch/sh/kernel/dumpstack.c
index 7617dc4129a..694158b9a50 100644
--- a/arch/sh/kernel/dumpstack.c
+++ b/arch/sh/kernel/dumpstack.c
@@ -2,48 +2,13 @@
  *  Copyright (C) 1991, 1992  Linus Torvalds
  *  Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
  *  Copyright (C) 2009  Matt Fleming
- *  Copyright (C) 2002 - 2012  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
  */
 #include <linux/kallsyms.h>
 #include <linux/ftrace.h>
 #include <linux/debug_locks.h>
-#include <linux/kdebug.h>
-#include <linux/export.h>
-#include <linux/uaccess.h>
 #include <asm/unwinder.h>
 #include <asm/stacktrace.h>
 
-void dump_mem(const char *str, unsigned long bottom, unsigned long top)
-{
-        unsigned long p;
-        int i;
-
-        printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
-
-        for (p = bottom & ~31; p < top; ) {
-                printk("%04lx: ", p & 0xffff);
-
-                for (i = 0; i < 8; i++, p += 4) {
-                        unsigned int val;
-
-                        if (p < bottom || p >= top)
-                                printk("         ");
-                        else {
-                                if (__get_user(val, (unsigned int __user *)p)) {
-                                        printk("\n");
-                                        return;
-                                }
-                                printk("%08x ", val);
-                        }
-                }
-                printk("\n");
-        }
-}
-
 void printk_address(unsigned long address, int reliable)
 {
         printk(" [<%p>] %s%pS\n", (void *) address,
@@ -141,26 +106,3 @@ void show_trace(struct task_struct *tsk, unsigned long *sp,
 
         debug_show_held_locks(tsk);
 }
-
-void show_stack(struct task_struct *tsk, unsigned long *sp)
-{
-        unsigned long stack;
-
-        if (!tsk)
-                tsk = current;
-        if (tsk == current)
-                sp = (unsigned long *)current_stack_pointer;
-        else
-                sp = (unsigned long *)tsk->thread.sp;
-
-        stack = (unsigned long)sp;
-        dump_mem("Stack: ", stack, THREAD_SIZE +
-                 (unsigned long)task_stack_page(tsk));
-        show_trace(tsk, sp, NULL);
-}
-
-void dump_stack(void)
-{
-        show_stack(NULL, NULL);
-}
-EXPORT_SYMBOL(dump_stack);
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 9b6e4beeb29..2b15ae60c3a 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -139,13 +139,12 @@ work_pending:
         ! r8: current_thread_info
         ! t:  result of "tst    #_TIF_NEED_RESCHED, r0"
         bf/s    work_resched
-         tst    #(_TIF_SIGPENDING | _TIF_NOTIFY_RESUME), r0
+         tst    #_TIF_SIGPENDING, r0
 work_notifysig:
         bt/s    __restore_all
          mov    r15, r4
         mov     r12, r5         ! set arg1(save_r0)
         mov     r0, r6
-        sti
         mov.l   2f, r1
         mov.l   3f, r0
         jmp     @r1
@@ -297,19 +296,6 @@ ret_from_fork:
          mov    r0, r4
         bra     syscall_exit
          nop
-
-        .align  2
-        .globl  ret_from_kernel_thread
-ret_from_kernel_thread:
-        mov.l   1f, r8
-        jsr     @r8
-         mov    r0, r4
-        mov.l   @(OFF_R5,r15), r5   ! fn
-        jsr     @r5
-         mov.l  @(OFF_R4,r15), r4   ! arg
-        bra     syscall_exit
-         nop
-
         .align  2
 1:      .long   schedule_tail
 
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
index f9173766ec4..efae6ab3d54 100644
--- a/arch/sh/kernel/hw_breakpoint.c
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -22,7 +22,6 @@
 #include <asm/hw_breakpoint.h>
 #include <asm/mmu_context.h>
 #include <asm/ptrace.h>
-#include <asm/traps.h>
 
 /*
  * Stores the breakpoints currently in use on each breakpoint address
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 0c910163caa..db4ecd731a0 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -17,10 +17,10 @@
 #include <linux/irqflags.h>
 #include <linux/smp.h>
 #include <linux/cpuidle.h>
-#include <linux/atomic.h>
 #include <asm/pgalloc.h>
+#include <asm/system.h>
+#include <linux/atomic.h>
 #include <asm/smp.h>
-#include <asm/bl_bit.h>
 
 void (*pm_idle)(void);
 
@@ -89,8 +89,7 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_idle_enter();
-                rcu_idle_enter();
+                tick_nohz_stop_sched_tick(1);
 
                 while (!need_resched()) {
                         check_pgt_cache();
@@ -112,9 +111,10 @@ void cpu_idle(void)
                         start_critical_timings();
                 }
 
-                rcu_idle_exit();
-                tick_nohz_idle_exit();
-                schedule_preempt_disabled();
+                tick_nohz_restart_sched_tick();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
         }
 }
 
@@ -132,6 +132,10 @@ void __init select_idle_routine(void)
                 pm_idle = poll_idle;
 }
 
+static void do_nothing(void *unused)
+{
+}
+
 void stop_this_cpu(void *unused)
 {
         local_irq_disable();
@@ -140,3 +144,19 @@ void stop_this_cpu(void *unused)
         for (;;)
                 cpu_sleep();
 }
+
+/*
+ * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
+ * pm_idle and update to new pm_idle value. Required while changing pm_idle
+ * handler on SMP systems.
+ *
+ * Caller must have changed pm_idle to the new value before the call. Old
+ * pm_idle value will not be used by any CPU after the return of this function.
+ */
+void cpu_idle_wait(void)
+{
+        smp_mb();
+        /* kick all the CPUs so that they exit out of pm_idle */
+        smp_call_function(do_nothing, NULL, 1);
+}
+EXPORT_SYMBOL_GPL(cpu_idle_wait);
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index c0a9761f2f8..0f62f467275 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -15,6 +15,7 @@
 #include <linux/vmalloc.h>
 #include <linux/module.h>
 #include <linux/init.h>
+#include <asm/system.h>
 #include <asm/mmu_context.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
diff --git a/arch/sh/kernel/ioport.c b/arch/sh/kernel/ioport.c
index cca14ba84a3..e3ad6103e7c 100644
--- a/arch/sh/kernel/ioport.c
+++ b/arch/sh/kernel/ioport.c
@@ -11,7 +11,7 @@
 #include <linux/module.h>
 #include <linux/io.h>
 
-unsigned long sh_io_port_base __read_mostly = -1;
+const unsigned long sh_io_port_base __read_mostly = -1;
 EXPORT_SYMBOL(sh_io_port_base);
 
 void __iomem *__ioport_map(unsigned long addr, unsigned int size)
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 063af10ff3c..a3ee9197112 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -231,6 +231,14 @@ void __init init_IRQ(void)
         irq_ctx_init(smp_processor_id());
 }
 
+#ifdef CONFIG_SPARSE_IRQ
+int __init arch_probe_nr_irqs(void)
+{
+        nr_irqs = sh_mv.mv_nr_irqs;
+        return NR_IRQS_LEGACY;
+}
+#endif
+
 #ifdef CONFIG_HOTPLUG_CPU
 static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
 {
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 38b313909ac..efb6d398dec 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -1,7 +1,7 @@
 /*
  * SuperH KGDB support
  *
- * Copyright (C) 2008 - 2012  Paul Mundt
+ * Copyright (C) 2008 - 2009  Paul Mundt
  *
  * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
  *
@@ -14,7 +14,6 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <asm/cacheflush.h>
-#include <asm/traps.h>
 
 /* Macros for single step instruction identification */
 #define OPCODE_BT(op)           (((op) & 0xff00) == 0x8900)
@@ -164,89 +163,42 @@ static void undo_single_step(struct pt_regs *linux_regs)
         stepped_opcode = 0;
 }
 
-struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = {
-        { "r0",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[0]) },
-        { "r1",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[1]) },
-        { "r2",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[2]) },
-        { "r3",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[3]) },
-        { "r4",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[4]) },
-        { "r5",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[5]) },
-        { "r6",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[6]) },
-        { "r7",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[7]) },
-        { "r8",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[8]) },
-        { "r9",         GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[9]) },
-        { "r10",        GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[10]) },
-        { "r11",        GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[11]) },
-        { "r12",        GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[12]) },
-        { "r13",        GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[13]) },
-        { "r14",        GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[14]) },
-        { "r15",        GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[15]) },
-        { "pc",         GDB_SIZEOF_REG, offsetof(struct pt_regs, pc) },
-        { "pr",         GDB_SIZEOF_REG, offsetof(struct pt_regs, pr) },
-        { "sr",         GDB_SIZEOF_REG, offsetof(struct pt_regs, sr) },
-        { "gbr",        GDB_SIZEOF_REG, offsetof(struct pt_regs, gbr) },
-        { "mach",       GDB_SIZEOF_REG, offsetof(struct pt_regs, mach) },
-        { "macl",       GDB_SIZEOF_REG, offsetof(struct pt_regs, macl) },
-        { "vbr",        GDB_SIZEOF_REG, -1 },
-};
-
-int dbg_set_reg(int regno, void *mem, struct pt_regs *regs)
+void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
-        if (regno < 0 || regno >= DBG_MAX_REG_NUM)
-                return -EINVAL;
+        int i;
+
+        for (i = 0; i < 16; i++)
+                gdb_regs[GDB_R0 + i] = regs->regs[i];
 
-        if (dbg_reg_def[regno].offset != -1)
-                memcpy((void *)regs + dbg_reg_def[regno].offset, mem,
-                       dbg_reg_def[regno].size);
+        gdb_regs[GDB_PC] = regs->pc;
+        gdb_regs[GDB_PR] = regs->pr;
+        gdb_regs[GDB_SR] = regs->sr;
+        gdb_regs[GDB_GBR] = regs->gbr;
+        gdb_regs[GDB_MACH] = regs->mach;
+        gdb_regs[GDB_MACL] = regs->macl;
 
-        return 0;
+        __asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR]));
 }
 
-char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs)
+void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
-        if (regno >= DBG_MAX_REG_NUM || regno < 0)
-                return NULL;
+        int i;
 
-        if (dbg_reg_def[regno].size != -1)
-                memcpy(mem, (void *)regs + dbg_reg_def[regno].offset,
-                       dbg_reg_def[regno].size);
-
-        switch (regno) {
-        case GDB_VBR:
-                __asm__ __volatile__ ("stc vbr, %0" : "=r" (mem));
-                break;
-        }
+        for (i = 0; i < 16; i++)
+                regs->regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i];
 
-        return dbg_reg_def[regno].name;
+        regs->pc = gdb_regs[GDB_PC];
+        regs->pr = gdb_regs[GDB_PR];
+        regs->sr = gdb_regs[GDB_SR];
+        regs->gbr = gdb_regs[GDB_GBR];
+        regs->mach = gdb_regs[GDB_MACH];
+        regs->macl = gdb_regs[GDB_MACL];
 }
 
 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
 {
-        struct pt_regs *thread_regs = task_pt_regs(p);
-        int reg;
-
-        /* Initialize to zero */
-        for (reg = 0; reg < DBG_MAX_REG_NUM; reg++)
-                gdb_regs[reg] = 0;
-
-        /*
-         * Copy out GP regs 8 to 14.
-         *
-         * switch_to() relies on SR.RB toggling, so regs 0->7 are banked
-         * and need privileged instructions to get to. The r15 value we
-         * fetch from the thread info directly.
-         */
-        for (reg = GDB_R8; reg < GDB_R15; reg++)
-                gdb_regs[reg] = thread_regs->regs[reg];
-
         gdb_regs[GDB_R15] = p->thread.sp;
         gdb_regs[GDB_PC] = p->thread.pc;
-
-        /*
-         * Additional registers we have context for
-         */
-        gdb_regs[GDB_PR] = thread_regs->pr;
-        gdb_regs[GDB_GBR] = thread_regs->gbr;
 }
 
 int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
@@ -311,18 +263,6 @@ BUILD_TRAP_HANDLER(singlestep)
         local_irq_restore(flags);
 }
 
-static void kgdb_call_nmi_hook(void *ignored)
-{
-        kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
-}
-
-void kgdb_roundup_cpus(unsigned long flags)
-{
-        local_irq_enable();
-        smp_call_function(kgdb_call_nmi_hook, NULL, 0);
-        local_irq_disable();
-}
-
 static int __kgdb_notify(struct die_args *args, unsigned long cmd)
 {
         int ret;
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 9fea49f6e66..c5a33f007f8 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -157,6 +157,9 @@ void __init reserve_crashkernel(void)
         unsigned long long crash_size, crash_base;
         int ret;
 
+        /* this is necessary because of memblock_phys_mem_size() */
+        memblock_analyze();
+
         ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
                         &crash_size, &crash_base);
         if (ret == 0 && crash_size > 0) {
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index ec05f491c34..3d722e49db0 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -121,4 +121,7 @@ void __init sh_mv_setup(void)
         mv_set(irq_demux);
         mv_set(mode_pins);
         mv_set(mem_init);
+
+        if (!sh_mv.mv_nr_irqs)
+                sh_mv.mv_nr_irqs = NR_IRQS;
 }
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 068b8a2759b..2ee21a47b5a 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -25,7 +25,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/perf_event.h>
-#include <linux/export.h>
 #include <asm/processor.h>
 
 struct cpu_hw_events {
@@ -310,10 +309,6 @@ static int sh_pmu_event_init(struct perf_event *event)
 {
         int err;
 
-        /* does not support taken branch sampling */
-        if (has_branch_stack(event))
-                return -EOPNOTSUPP;
-
         switch (event->attr.type) {
         case PERF_TYPE_RAW:
         case PERF_TYPE_HW_CACHE:
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 055d91b7030..325f98b1736 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -2,27 +2,12 @@
 #include <linux/kernel.h>
 #include <linux/slab.h>
 #include <linux/sched.h>
-#include <linux/export.h>
-#include <linux/stackprotector.h>
-#include <asm/fpu.h>
 
 struct kmem_cache *task_xstate_cachep = NULL;
 unsigned int xstate_size;
 
-#ifdef CONFIG_CC_STACKPROTECTOR
-unsigned long __stack_chk_guard __read_mostly;
-EXPORT_SYMBOL(__stack_chk_guard);
-#endif
-
-/*
- * this gets called so that we can store lazy state into memory and copy the
- * current task into the new thread.
- */
 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 {
-#ifdef CONFIG_SUPERH32
-        unlazy_fpu(src, task_pt_regs(src));
-#endif
         *dst = *src;
 
         if (src->thread.xstate) {
@@ -44,10 +29,52 @@ void free_thread_xstate(struct task_struct *tsk)
         }
 }
 
-void arch_release_task_struct(struct task_struct *tsk)
+#if THREAD_SHIFT < PAGE_SHIFT
+static struct kmem_cache *thread_info_cache;
+
+struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
+{
+        struct thread_info *ti;
+#ifdef CONFIG_DEBUG_STACK_USAGE
+        gfp_t mask = GFP_KERNEL | __GFP_ZERO;
+#else
+        gfp_t mask = GFP_KERNEL;
+#endif
+
+        ti = kmem_cache_alloc_node(thread_info_cache, mask, node);
+        return ti;
+}
+
+void free_thread_info(struct thread_info *ti)
+{
+        free_thread_xstate(ti->task);
+        kmem_cache_free(thread_info_cache, ti);
+}
+
+void thread_info_cache_init(void)
+{
+        thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
+                                              THREAD_SIZE, SLAB_PANIC, NULL);
+}
+#else
+struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
+{
+#ifdef CONFIG_DEBUG_STACK_USAGE
+        gfp_t mask = GFP_KERNEL | __GFP_ZERO;
+#else
+        gfp_t mask = GFP_KERNEL;
+#endif
+        struct page *page = alloc_pages_node(node, mask, THREAD_SIZE_ORDER);
+
+        return page ? page_address(page) : NULL;
+}
+
+void free_thread_info(struct thread_info *ti)
 {
-        free_thread_xstate(tsk);
+        free_thread_xstate(ti->task);
+        free_pages((unsigned long)ti, THREAD_SIZE_ORDER);
 }
+#endif /* THREAD_SHIFT < PAGE_SHIFT */
 
 void arch_task_cache_init(void)
 {
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 73eb66fc625..aaf6d59c201 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -22,12 +22,11 @@
 #include <linux/ftrace.h>
 #include <linux/hw_breakpoint.h>
 #include <linux/prefetch.h>
-#include <linux/stackprotector.h>
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
+#include <asm/system.h>
 #include <asm/fpu.h>
 #include <asm/syscalls.h>
-#include <asm/switch_to.h>
 
 void show_regs(struct pt_regs * regs)
 {
@@ -68,6 +67,38 @@ void show_regs(struct pt_regs * regs)
         show_code(regs);
 }
 
+/*
+ * Create a kernel thread
+ */
+ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *))
+{
+        do_exit(fn(arg));
+}
+
+/* Don't use this in BL=1(cli).  Or else, CPU resets! */
+int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
+{
+        struct pt_regs regs;
+        int pid;
+
+        memset(&regs, 0, sizeof(regs));
+        regs.regs[4] = (unsigned long)arg;
+        regs.regs[5] = (unsigned long)fn;
+
+        regs.pc = (unsigned long)kernel_thread_helper;
+        regs.sr = SR_MD;
+#if defined(CONFIG_SH_FPU)
+        regs.sr |= SR_FD;
+#endif
+
+        /* Ok, create the new process.. */
+        pid = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
+                      &regs, 0, NULL, NULL);
+
+        return pid;
+}
+EXPORT_SYMBOL(kernel_thread);
+
 void start_thread(struct pt_regs *regs, unsigned long new_pc,
                   unsigned long new_sp)
 {
@@ -124,11 +155,20 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
 }
 EXPORT_SYMBOL(dump_fpu);
 
+/*
+ * This gets called before we allocate a new thread and copy
+ * the current task into it.
+ */
+void prepare_to_copy(struct task_struct *tsk)
+{
+        unlazy_fpu(tsk, task_pt_regs(tsk));
+}
+
 asmlinkage void ret_from_fork(void);
-asmlinkage void ret_from_kernel_thread(void);
 
 int copy_thread(unsigned long clone_flags, unsigned long usp,
-                unsigned long arg, struct task_struct *p)
+                unsigned long unused,
+                struct task_struct *p, struct pt_regs *regs)
 {
         struct thread_info *ti = task_thread_info(p);
         struct pt_regs *childregs;
@@ -145,35 +185,29 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         }
 #endif
 
-        memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
-
         childregs = task_pt_regs(p);
-        p->thread.sp = (unsigned long) childregs;
-        if (unlikely(p->flags & PF_KTHREAD)) {
-                memset(childregs, 0, sizeof(struct pt_regs));
-                p->thread.pc = (unsigned long) ret_from_kernel_thread;
-                childregs->regs[4] = arg;
-                childregs->regs[5] = usp;
-                childregs->sr = SR_MD;
-#if defined(CONFIG_SH_FPU)
-                childregs->sr |= SR_FD;
-#endif
+        *childregs = *regs;
+
+        if (user_mode(regs)) {
+                childregs->regs[15] = usp;
+                ti->addr_limit = USER_DS;
+        } else {
+                childregs->regs[15] = (unsigned long)childregs;
                 ti->addr_limit = KERNEL_DS;
                 ti->status &= ~TS_USEDFPU;
                 p->fpu_counter = 0;
-                return 0;
         }
-        *childregs = *current_pt_regs();
-
-        if (usp)
-                childregs->regs[15] = usp;
-        ti->addr_limit = USER_DS;
 
         if (clone_flags & CLONE_SETTLS)
                 childregs->gbr = childregs->regs[0];
 
         childregs->regs[0] = 0; /* Set return value for child */
+
+        p->thread.sp = (unsigned long) childregs;
         p->thread.pc = (unsigned long) ret_from_fork;
+
+        memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
+
         return 0;
 }
 
@@ -186,10 +220,6 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
 {
         struct thread_struct *next_t = &next->thread;
 
-#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
-        __stack_chk_guard = next->stack_canary;
-#endif
-
         unlazy_fpu(prev, task_pt_regs(prev));
 
         /* we're going to use this soon, after a few expensive things */
@@ -217,6 +247,74 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
         return prev;
 }
 
+asmlinkage int sys_fork(unsigned long r4, unsigned long r5,
+                        unsigned long r6, unsigned long r7,
+                        struct pt_regs __regs)
+{
+#ifdef CONFIG_MMU
+        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
+        return do_fork(SIGCHLD, regs->regs[15], regs, 0, NULL, NULL);
+#else
+        /* fork almost works, enough to trick you into looking elsewhere :-( */
+        return -EINVAL;
+#endif
+}
+
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+                         unsigned long parent_tidptr,
+                         unsigned long child_tidptr,
+                         struct pt_regs __regs)
+{
+        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
+        if (!newsp)
+                newsp = regs->regs[15];
+        return do_fork(clone_flags, newsp, regs, 0,
+                        (int __user *)parent_tidptr,
+                        (int __user *)child_tidptr);
+}
+
+/*
+ * This is trivial, and on the face of it looks like it
+ * could equally well be done in user mode.
+ *
+ * Not so, for quite unobvious reasons - register pressure.
+ * In user mode vfork() cannot have a stack frame, and if
+ * done by calling the "clone()" system call directly, you
+ * do not have enough call-clobbered registers to hold all
+ * the information you need.
+ */
+asmlinkage int sys_vfork(unsigned long r4, unsigned long r5,
+                         unsigned long r6, unsigned long r7,
+                         struct pt_regs __regs)
+{
+        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->regs[15], regs,
+                       0, NULL, NULL);
+}
+
+/*
+ * sys_execve() executes a new program.
+ */
+asmlinkage int sys_execve(const char __user *ufilename,
+                          const char __user *const __user *uargv,
+                          const char __user *const __user *uenvp,
+                          unsigned long r7, struct pt_regs __regs)
+{
+        struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
+        int error;
+        char *filename;
+
+        filename = getname(ufilename);
+        error = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                goto out;
+
+        error = do_execve(filename, uargv, uenvp, regs);
+        putname(filename);
+out:
+        return error;
+}
+
 unsigned long get_wchan(struct task_struct *p)
 {
         unsigned long pc;
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index e611c85144b..210c1cabcb7 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -30,10 +30,8 @@
 #include <asm/pgtable.h>
 #include <asm/mmu_context.h>
 #include <asm/fpu.h>
-#include <asm/switch_to.h>
 
 struct task_struct *last_task_used_math = NULL;
-struct pt_regs fake_swapper_regs = { 0, };
 
 void show_regs(struct pt_regs *regs)
 {
@@ -285,6 +283,39 @@ void show_regs(struct pt_regs *regs)
 }
 
 /*
+ * Create a kernel thread
+ */
+ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *))
+{
+        do_exit(fn(arg));
+}
+
+/*
+ * This is the mechanism for creating a new kernel thread.
+ *
+ * NOTE! Only a kernel-only process(ie the swapper or direct descendants
+ * who haven't done an "execve()") should use this: it will work within
+ * a system call from a "real" process, but the process memory space will
+ * not be freed until both the parent and the child have exited.
+ */
+int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
+{
+        struct pt_regs regs;
+
+        memset(&regs, 0, sizeof(regs));
+        regs.regs[2] = (unsigned long)arg;
+        regs.regs[3] = (unsigned long)fn;
+
+        regs.pc = (unsigned long)kernel_thread_helper;
+        regs.sr = (1 << 30);
+
+        /* Ok, create the new process.. */
+        return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
+                      &regs, 0, NULL, NULL);
+}
+EXPORT_SYMBOL(kernel_thread);
+
+/*
  * Free current thread data structures etc..
  */
 void exit_thread(void)
@@ -368,37 +399,26 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
 EXPORT_SYMBOL(dump_fpu);
 
 asmlinkage void ret_from_fork(void);
-asmlinkage void ret_from_kernel_thread(void);
 
 int copy_thread(unsigned long clone_flags, unsigned long usp,
-                unsigned long arg, struct task_struct *p)
+                unsigned long unused,
+                struct task_struct *p, struct pt_regs *regs)
 {
-        struct pt_regs *childregs, *regs = current_pt_regs();
+        struct pt_regs *childregs;
 
 #ifdef CONFIG_SH_FPU
-        /* can't happen for a kernel thread */
-        if (last_task_used_math == current) {
+        if(last_task_used_math == current) {
                 enable_fpu();
                 save_fpu(current);
                 disable_fpu();
                 last_task_used_math = NULL;
-                current_pt_regs()->sr |= SR_FD;
+                regs->sr |= SR_FD;
         }
 #endif
         /* Copy from sh version */
         childregs = (struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1;
-        p->thread.sp = (unsigned long) childregs;
 
-        if (unlikely(p->flags & PF_KTHREAD)) {
-                memset(childregs, 0, sizeof(struct pt_regs));
-                childregs->regs[2] = (unsigned long)arg;
-                childregs->regs[3] = (unsigned long)fn;
-                childregs->sr = (1 << 30); /* not user_mode */
-                childregs->sr |= SR_FD; /* Invalidate FPU flag */
-                p->thread.pc = (unsigned long) ret_from_kernel_thread;
-                return 0;
-        }
-        *childregs = *current_pt_regs();
+        *childregs = *regs;
 
         /*
          * Sign extend the edited stack.
@@ -406,18 +426,85 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
          * 32-bit wide and context switch must take care
          * of NEFF sign extension.
          */
-        if (usp)
+        if (user_mode(regs)) {
                 childregs->regs[15] = neff_sign_extend(usp);
-        p->thread.uregs = childregs;
+                p->thread.uregs = childregs;
+        } else {
+                childregs->regs[15] =
+                        neff_sign_extend((unsigned long)task_stack_page(p) +
+                                         THREAD_SIZE);
+        }
 
         childregs->regs[9] = 0; /* Set return value for child */
         childregs->sr |= SR_FD; /* Invalidate FPU flag */
 
+        p->thread.sp = (unsigned long) childregs;
         p->thread.pc = (unsigned long) ret_from_fork;
 
         return 0;
 }
 
+asmlinkage int sys_fork(unsigned long r2, unsigned long r3,
+                        unsigned long r4, unsigned long r5,
+                        unsigned long r6, unsigned long r7,
+                        struct pt_regs *pregs)
+{
+        return do_fork(SIGCHLD, pregs->regs[15], pregs, 0, 0, 0);
+}
+
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+                         unsigned long r4, unsigned long r5,
+                         unsigned long r6, unsigned long r7,
+                         struct pt_regs *pregs)
+{
+        if (!newsp)
+                newsp = pregs->regs[15];
+        return do_fork(clone_flags, newsp, pregs, 0, 0, 0);
+}
+
+/*
+ * This is trivial, and on the face of it looks like it
+ * could equally well be done in user mode.
+ *
+ * Not so, for quite unobvious reasons - register pressure.
+ * In user mode vfork() cannot have a stack frame, and if
+ * done by calling the "clone()" system call directly, you
+ * do not have enough call-clobbered registers to hold all
+ * the information you need.
+ */
+asmlinkage int sys_vfork(unsigned long r2, unsigned long r3,
+                         unsigned long r4, unsigned long r5,
+                         unsigned long r6, unsigned long r7,
+                         struct pt_regs *pregs)
+{
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, pregs->regs[15], pregs, 0, 0, 0);
+}
+
+/*
+ * sys_execve() executes a new program.
+ */
+asmlinkage int sys_execve(const char *ufilename, char **uargv,
+                          char **uenvp, unsigned long r5,
+                          unsigned long r6, unsigned long r7,
+                          struct pt_regs *pregs)
+{
+        int error;
+        char *filename;
+
+        filename = getname((char __user *)ufilename);
+        error = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                goto out;
+
+        error = do_execve(filename,
+                          (const char __user *const __user *)uargv,
+                          (const char __user *const __user *)uenvp,
+                          pregs);
+        putname(filename);
+out:
+        return error;
+}
+
 #ifdef CONFIG_FRAME_POINTER
 static int in_sh64_switch_to(unsigned long pc)
 {
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 81f999a672f..92b3c276339 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -28,6 +28,7 @@
 #include <linux/hw_breakpoint.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
+#include <asm/system.h>
 #include <asm/processor.h>
 #include <asm/mmu_context.h>
 #include <asm/syscalls.h>
@@ -503,7 +504,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
 {
         long ret = 0;
 
-        secure_computing_strict(regs->regs[0]);
+        secure_computing(regs->regs[0]);
 
         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
             tracehook_report_syscall_entry(regs))
@@ -517,9 +518,10 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
                 trace_sys_enter(regs, regs->regs[0]);
 
-        audit_syscall_entry(audit_arch(), regs->regs[3],
-                            regs->regs[4], regs->regs[5],
-                            regs->regs[6], regs->regs[7]);
+        if (unlikely(current->audit_context))
+                audit_syscall_entry(audit_arch(), regs->regs[3],
+                                    regs->regs[4], regs->regs[5],
+                                    regs->regs[6], regs->regs[7]);
 
         return ret ?: regs->regs[0];
 }
@@ -528,7 +530,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
 {
         int step;
 
-        audit_syscall_exit(regs);
+        if (unlikely(current->audit_context))
+                audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]),
+                                   regs->regs[0]);
 
         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
                 trace_sys_exit(regs, regs->regs[0]);
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index af90339dadc..c8f97649f35 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -34,11 +34,11 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
+#include <asm/system.h>
 #include <asm/processor.h>
 #include <asm/mmu_context.h>
 #include <asm/syscalls.h>
 #include <asm/fpu.h>
-#include <asm/traps.h>
 
 #define CREATE_TRACE_POINTS
 #include <trace/events/syscalls.h>
@@ -522,7 +522,7 @@ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs)
 {
         long long ret = 0;
 
-        secure_computing_strict(regs->regs[9]);
+        secure_computing(regs->regs[9]);
 
         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
             tracehook_report_syscall_entry(regs))
@@ -536,9 +536,10 @@ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs)
         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
                 trace_sys_enter(regs, regs->regs[9]);
 
-        audit_syscall_entry(audit_arch(), regs->regs[1],
-                            regs->regs[2], regs->regs[3],
-                            regs->regs[4], regs->regs[5]);
+        if (unlikely(current->audit_context))
+                audit_syscall_entry(audit_arch(), regs->regs[1],
+                                    regs->regs[2], regs->regs[3],
+                                    regs->regs[4], regs->regs[5]);
 
         return ret ?: regs->regs[9];
 }
@@ -547,7 +548,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
 {
         int step;
 
-        audit_syscall_exit(regs);
+        if (unlikely(current->audit_context))
+                audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]),
+                                   regs->regs[9]);
 
         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
                 trace_sys_exit(regs, regs->regs[9]);
diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c
index 04afe5b2066..ca6a5ca6401 100644
--- a/arch/sh/kernel/reboot.c
+++ b/arch/sh/kernel/reboot.c
@@ -8,8 +8,8 @@
 #endif
 #include <asm/addrspace.h>
 #include <asm/reboot.h>
+#include <asm/system.h>
 #include <asm/tlbflush.h>
-#include <asm/traps.h>
 
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index ebe7a7d9721..58bff45d115 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -211,16 +211,13 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
         }
 
         /*
-         * We don't know which RAM region contains kernel data or
-         * the reserved crashkernel region, so try it repeatedly
-         * and let the resource manager test it.
+         *  We don't know which RAM region contains kernel data,
+         *  so we try it repeatedly and let the resource manager
+         *  test it.
          */
         request_resource(res, &code_resource);
         request_resource(res, &data_resource);
         request_resource(res, &bss_resource);
-#ifdef CONFIG_KEXEC
-        request_resource(res, &crashk_res);
-#endif
 
         /*
          * Also make sure that there is a PMB mapping that covers this
@@ -230,8 +227,7 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
         pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
                          PAGE_KERNEL);
 
-        memblock_set_node(PFN_PHYS(start_pfn),
-                          PFN_PHYS(end_pfn - start_pfn), nid);
+        add_active_range(nid, start_pfn, end_pfn);
 }
 
 void __init __weak plat_early_device_setup(void)
@@ -273,7 +269,7 @@ void __init setup_arch(char **cmdline_p)
         data_resource.start = virt_to_phys(_etext);
         data_resource.end = virt_to_phys(_edata)-1;
         bss_resource.start = virt_to_phys(__bss_start);
-        bss_resource.end = virt_to_phys(__bss_stop)-1;
+        bss_resource.end = virt_to_phys(_ebss)-1;
 
 #ifdef CONFIG_CMDLINE_OVERWRITE
         strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 2a0a596ebf6..3896f26efa4 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -19,6 +19,7 @@ EXPORT_SYMBOL(csum_partial);
 EXPORT_SYMBOL(csum_partial_copy_generic);
 EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(__clear_user);
+EXPORT_SYMBOL(_ebss);
 EXPORT_SYMBOL(empty_zero_page);
 
 #define DECLARE_EXPORT(name)            \
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index 26a0774f527..45afa5c51f6 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -32,6 +32,8 @@ EXPORT_SYMBOL(__get_user_asm_b);
 EXPORT_SYMBOL(__get_user_asm_w);
 EXPORT_SYMBOL(__get_user_asm_l);
 EXPORT_SYMBOL(__get_user_asm_q);
+EXPORT_SYMBOL(__strnlen_user);
+EXPORT_SYMBOL(__strncpy_from_user);
 EXPORT_SYMBOL(__clear_user);
 EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(__copy_user);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 2f1f65356c0..579cd2ca358 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -22,8 +22,10 @@
 #include <linux/elf.h>
 #include <linux/personality.h>
 #include <linux/binfmts.h>
+#include <linux/freezer.h>
 #include <linux/io.h>
 #include <linux/tracehook.h>
+#include <asm/system.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -31,6 +33,8 @@
 #include <asm/syscalls.h>
 #include <asm/fpu.h>
 
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
 struct fdpic_func_descriptor {
         unsigned long   text;
         unsigned long   GOT;
@@ -50,11 +54,22 @@ struct fdpic_func_descriptor {
  * Atomically swap in the new signal mask, and wait for a signal.
  */
 asmlinkage int
-sys_sigsuspend(old_sigset_t mask)
+sys_sigsuspend(old_sigset_t mask,
+               unsigned long r5, unsigned long r6, unsigned long r7,
+               struct pt_regs __regs)
 {
-        sigset_t blocked;
-        siginitset(&blocked, mask);
-        return sigsuspend(&blocked);
+        mask &= _BLOCKABLE;
+        spin_lock_irq(&current->sighand->siglock);
+        current->saved_sigmask = current->blocked;
+        siginitset(&current->blocked, mask);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        current->state = TASK_INTERRUPTIBLE;
+        schedule();
+        set_restore_sigmask();
+
+        return -ERESTARTNOHAND;
 }
 
 asmlinkage int
@@ -68,10 +83,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
                 old_sigset_t mask;
                 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
                     __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
-                    __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
-                    __get_user(mask, &act->sa_mask))
+                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
                         return -EFAULT;
+                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+                __get_user(mask, &act->sa_mask);
                 siginitset(&new_ka.sa.sa_mask, mask);
         }
 
@@ -80,10 +95,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
         if (!ret && oact) {
                 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
                     __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
-                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
-                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
+                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
                         return -EFAULT;
+                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
+                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
         }
 
         return ret;
@@ -147,11 +162,12 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc,
         if (!(boot_cpu_data.flags & CPU_HAS_FPU))
                 return 0;
 
-        if (!used_math())
-                return __put_user(0, &sc->sc_ownedfp);
+        if (!used_math()) {
+                __put_user(0, &sc->sc_ownedfp);
+                return 0;
+        }
 
-        if (__put_user(1, &sc->sc_ownedfp))
-                return -EFAULT;
+        __put_user(1, &sc->sc_ownedfp);
 
         /* This will cause a "finit" to be triggered by the next
            attempted FPU operation by the 'current' process.
@@ -191,7 +207,7 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *r0_p
                 regs->sr |= SR_FD; /* Release FPU */
                 clear_fpu(tsk, regs);
                 clear_used_math();
-                err |= __get_user (owned_fp, &sc->sc_ownedfp);
+                __get_user (owned_fp, &sc->sc_ownedfp);
                 if (owned_fp)
                         err |= restore_sigcontext_fpu(sc);
         }
@@ -223,7 +239,12 @@ asmlinkage int sys_sigreturn(unsigned long r4, unsigned long r5,
                                     sizeof(frame->extramask))))
                 goto badframe;
 
-        set_current_blocked(&set);
+        sigdelsetmask(&set, ~_BLOCKABLE);
+
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
 
         if (restore_sigcontext(regs, &frame->sc, &r0))
                 goto badframe;
@@ -252,7 +273,11 @@ asmlinkage int sys_rt_sigreturn(unsigned long r4, unsigned long r5,
         if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
                 goto badframe;
 
-        set_current_blocked(&set);
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
 
         if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &r0))
                 goto badframe;
@@ -380,14 +405,11 @@ static int setup_frame(int sig, struct k_sigaction *ka,
                 struct fdpic_func_descriptor __user *funcptr =
                         (struct fdpic_func_descriptor __user *)ka->sa.sa_handler;
 
-                err |= __get_user(regs->pc, &funcptr->text);
-                err |= __get_user(regs->regs[12], &funcptr->GOT);
+                __get_user(regs->pc, &funcptr->text);
+                __get_user(regs->regs[12], &funcptr->GOT);
         } else
                 regs->pc = (unsigned long)ka->sa.sa_handler;
 
-        if (err)
-                goto give_sigsegv;
-
         set_fs(USER_DS);
 
         pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
@@ -467,14 +489,11 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                 struct fdpic_func_descriptor __user *funcptr =
                         (struct fdpic_func_descriptor __user *)ka->sa.sa_handler;
 
-                err |= __get_user(regs->pc, &funcptr->text);
-                err |= __get_user(regs->regs[12], &funcptr->GOT);
+                __get_user(regs->pc, &funcptr->text);
+                __get_user(regs->regs[12], &funcptr->GOT);
         } else
                 regs->pc = (unsigned long)ka->sa.sa_handler;
 
-        if (err)
-                goto give_sigsegv;
-
         set_fs(USER_DS);
 
         pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
@@ -517,11 +536,10 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,
 /*
  * OK, we're invoking a handler
  */
-static void
+static int
 handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
-              struct pt_regs *regs, unsigned int save_r0)
+              sigset_t *oldset, struct pt_regs *regs, unsigned int save_r0)
 {
-        sigset_t *oldset = sigmask_to_save();
         int ret;
 
         /* Set up the stack frame */
@@ -530,10 +548,19 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
         else
                 ret = setup_frame(sig, ka, oldset, regs);
 
-        if (ret)
-                return;
-        signal_delivered(sig, info, ka, regs,
-                        test_thread_flag(TIF_SINGLESTEP));
+        if (ka->sa.sa_flags & SA_ONESHOT)
+                ka->sa.sa_handler = SIG_DFL;
+
+        if (ret == 0) {
+                spin_lock_irq(&current->sighand->siglock);
+                sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+                if (!(ka->sa.sa_flags & SA_NODEFER))
+                        sigaddset(&current->blocked,sig);
+                recalc_sigpending();
+                spin_unlock_irq(&current->sighand->siglock);
+        }
+
+        return ret;
 }
 
 /*
@@ -550,6 +577,7 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
         siginfo_t info;
         int signr;
         struct k_sigaction ka;
+        sigset_t *oldset;
 
         /*
          * We want the common case to go fast, which
@@ -560,15 +588,37 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
         if (!user_mode(regs))
                 return;
 
+        if (try_to_freeze())
+                goto no_signal;
+
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK)
+                oldset = &current->saved_sigmask;
+        else
+                oldset = &current->blocked;
+
         signr = get_signal_to_deliver(&info, &ka, regs, NULL);
         if (signr > 0) {
                 handle_syscall_restart(save_r0, regs, &ka.sa);
 
                 /* Whee!  Actually deliver the signal.  */
-                handle_signal(signr, &ka, &info, regs, save_r0);
+                if (handle_signal(signr, &ka, &info, oldset,
+                                  regs, save_r0) == 0) {
+                        /*
+                         * A signal was successfully delivered; the saved
+                         * sigmask will have been stored in the signal frame,
+                         * and will be restored by sigreturn, so we can simply
+                         * clear the TS_RESTORE_SIGMASK flag
+                         */
+                        current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+
+                        tracehook_signal_handler(signr, &info, &ka, regs,
+                                        test_thread_flag(TIF_SINGLESTEP));
+                }
+
                 return;
         }
 
+no_signal:
         /* Did we come from a system call? */
         if (regs->tra >= 0) {
                 /* Restart the system call - no handlers present */
@@ -587,7 +637,10 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
          * If there's no signal to deliver, we just put the saved sigmask
          * back.
          */
-        restore_saved_sigmask();
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+                current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+        }
 }
 
 asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,
@@ -600,5 +653,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,
         if (thread_info_flags & _TIF_NOTIFY_RESUME) {
                 clear_thread_flag(TIF_NOTIFY_RESUME);
                 tracehook_notify_resume(regs);
+                if (current->replacement_session_keyring)
+                        key_replace_session_keyring();
         }
 }
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index d867cd95a62..5a9f1f10ebf 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -18,6 +18,7 @@
 #include <linux/errno.h>
 #include <linux/wait.h>
 #include <linux/personality.h>
+#include <linux/freezer.h>
 #include <linux/ptrace.h>
 #include <linux/unistd.h>
 #include <linux/stddef.h>
@@ -40,9 +41,11 @@
 
 #define DEBUG_SIG 0
 
-static void
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+static int
 handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
-                struct pt_regs * regs);
+                sigset_t *oldset, struct pt_regs * regs);
 
 static inline void
 handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa)
@@ -80,7 +83,7 @@ handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa)
  * the kernel can handle, and then we build all the user-level signal handling
  * stack-frames in one go after that.
  */
-static void do_signal(struct pt_regs *regs)
+static int do_signal(struct pt_regs *regs, sigset_t *oldset)
 {
         siginfo_t info;
         int signr;
@@ -93,17 +96,36 @@ static void do_signal(struct pt_regs *regs)
          * if so.
          */
         if (!user_mode(regs))
-                return;
+                return 1;
+
+        if (try_to_freeze())
+                goto no_signal;
+
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK)
+                oldset = &current->saved_sigmask;
+        else if (!oldset)
+                oldset = &current->blocked;
 
         signr = get_signal_to_deliver(&info, &ka, regs, 0);
         if (signr > 0) {
                 handle_syscall_restart(regs, &ka.sa);
 
                 /* Whee!  Actually deliver the signal.  */
-                handle_signal(signr, &info, &ka, regs);
-                return;
+                if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
+                        /*
+                         * If a signal was successfully delivered, the
+                         * saved sigmask is in its frame, and we can
+                         * clear the TS_RESTORE_SIGMASK flag.
+                         */
+                        current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+
+                        tracehook_signal_handler(signr, &info, &ka, regs,
+                                        test_thread_flag(TIF_SINGLESTEP));
+                        return 1;
+                }
         }
 
+no_signal:
         /* Did we come from a system call? */
         if (regs->syscall_nr >= 0) {
                 /* Restart the system call - no handlers present */
@@ -124,18 +146,80 @@ static void do_signal(struct pt_regs *regs)
         }
 
         /* No signal to deliver -- put the saved sigmask back */
-        restore_saved_sigmask();
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+                current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+        }
+
+        return 0;
 }
 
 /*
  * Atomically swap in the new signal mask, and wait for a signal.
  */
 asmlinkage int
-sys_sigsuspend(old_sigset_t mask)
+sys_sigsuspend(old_sigset_t mask,
+               unsigned long r3, unsigned long r4, unsigned long r5,
+               unsigned long r6, unsigned long r7,
+               struct pt_regs * regs)
+{
+        sigset_t saveset;
+
+        mask &= _BLOCKABLE;
+        spin_lock_irq(&current->sighand->siglock);
+        saveset = current->blocked;
+        siginitset(&current->blocked, mask);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        REF_REG_RET = -EINTR;
+        while (1) {
+                current->state = TASK_INTERRUPTIBLE;
+                schedule();
+                set_restore_sigmask();
+                regs->pc += 4;    /* because sys_sigreturn decrements the pc */
+                if (do_signal(regs, &saveset)) {
+                        /* pc now points at signal handler. Need to decrement
+                           it because entry.S will increment it. */
+                        regs->pc -= 4;
+                        return -EINTR;
+                }
+        }
+}
+
+asmlinkage int
+sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize,
+                  unsigned long r4, unsigned long r5, unsigned long r6,
+                  unsigned long r7,
+                  struct pt_regs * regs)
 {
-        sigset_t blocked;
-        siginitset(&blocked, mask);
-        return sigsuspend(&blocked);
+        sigset_t saveset, newset;
+
+        /* XXX: Don't preclude handling different sized sigset_t's.  */
+        if (sigsetsize != sizeof(sigset_t))
+                return -EINVAL;
+
+        if (copy_from_user(&newset, unewset, sizeof(newset)))
+                return -EFAULT;
+        sigdelsetmask(&newset, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        saveset = current->blocked;
+        current->blocked = newset;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        REF_REG_RET = -EINTR;
+        while (1) {
+                current->state = TASK_INTERRUPTIBLE;
+                schedule();
+                regs->pc += 4;    /* because sys_sigreturn decrements the pc */
+                if (do_signal(regs, &saveset)) {
+                        /* pc now points at signal handler. Need to decrement
+                           it because entry.S will increment it. */
+                        regs->pc -= 4;
+                        return -EINTR;
+                }
+        }
 }
 
 asmlinkage int
@@ -149,10 +233,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
                 old_sigset_t mask;
                 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
                     __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
-                    __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
-                    __get_user(mask, &act->sa_mask))
+                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
                         return -EFAULT;
+                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+                __get_user(mask, &act->sa_mask);
                 siginitset(&new_ka.sa.sa_mask, mask);
         }
 
@@ -161,10 +245,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
         if (!ret && oact) {
                 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
                     __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
-                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
-                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
+                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
                         return -EFAULT;
+                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
+                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
         }
 
         return ret;
@@ -327,7 +411,12 @@ asmlinkage int sys_sigreturn(unsigned long r2, unsigned long r3,
                                     sizeof(frame->extramask))))
                 goto badframe;
 
-        set_current_blocked(&set);
+        sigdelsetmask(&set, ~_BLOCKABLE);
+
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
 
         if (restore_sigcontext(regs, &frame->sc, &ret))
                 goto badframe;
@@ -347,6 +436,7 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
 {
         struct rt_sigframe __user *frame = (struct rt_sigframe __user *) (long) REF_REG_SP;
         sigset_t set;
+        stack_t __user st;
         long long ret;
 
         /* Always make any pending restarted system calls return -EINTR */
@@ -358,16 +448,21 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,
         if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
                 goto badframe;
 
-        set_current_blocked(&set);
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
 
         if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ret))
                 goto badframe;
         regs->pc -= 4;
 
+        if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st)))
+                goto badframe;
         /* It is more difficult to avoid calling this function than to
            call it and ignore errors.  */
-        if (do_sigaltstack(&frame->uc.uc_stack, NULL, REF_REG_SP) == -EFAULT)
-                goto badframe;
+        do_sigaltstack(&st, NULL, REF_REG_SP);
 
         return (int) ret;
 
@@ -631,11 +726,10 @@ give_sigsegv:
 /*
  * OK, we're invoking a handler
  */
-static void
+static int
 handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
-                struct pt_regs * regs)
+                sigset_t *oldset, struct pt_regs * regs)
 {
-        sigset_t *oldset = sigmask_to_save();
         int ret;
 
         /* Set up the stack frame */
@@ -644,20 +738,30 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
         else
                 ret = setup_frame(sig, ka, oldset, regs);
 
-        if (ret)
-                return;
+        if (ka->sa.sa_flags & SA_ONESHOT)
+                ka->sa.sa_handler = SIG_DFL;
 
-        signal_delivered(sig, info, ka, regs,
-                        test_thread_flag(TIF_SINGLESTEP));
+        if (ret == 0) {
+                spin_lock_irq(&current->sighand->siglock);
+                sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+                if (!(ka->sa.sa_flags & SA_NODEFER))
+                        sigaddset(&current->blocked,sig);
+                recalc_sigpending();
+                spin_unlock_irq(&current->sighand->siglock);
+        }
+
+        return ret;
 }
 
 asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
 {
         if (thread_info_flags & _TIF_SIGPENDING)
-                do_signal(regs);
+                do_signal(regs, 0);
 
         if (thread_info_flags & _TIF_NOTIFY_RESUME) {
                 clear_thread_flag(TIF_NOTIFY_RESUME);
                 tracehook_notify_resume(regs);
+                if (current->replacement_session_keyring)
+                        key_replace_session_keyring();
         }
 }
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 2062aa88af4..3147a9a6fb8 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -23,11 +23,11 @@
 #include <linux/sched.h>
 #include <linux/atomic.h>
 #include <asm/processor.h>
+#include <asm/system.h>
 #include <asm/mmu_context.h>
 #include <asm/smp.h>
 #include <asm/cacheflush.h>
 #include <asm/sections.h>
-#include <asm/setup.h>
 
 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
@@ -63,7 +63,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         mp_ops->prepare_cpus(max_cpus);
 
 #ifndef CONFIG_HOTPLUG_CPU
-        init_cpu_present(cpu_possible_mask);
+        init_cpu_present(&cpu_possible_map);
 #endif
 }
 
@@ -123,6 +123,7 @@ void native_play_dead(void)
 int __cpu_disable(void)
 {
         unsigned int cpu = smp_processor_id();
+        struct task_struct *p;
         int ret;
 
         ret = mp_ops->cpu_disable(cpu);
@@ -152,7 +153,11 @@ int __cpu_disable(void)
         flush_cache_all();
         local_flush_tlb_all();
 
-        clear_tasks_mm_cpumask(cpu);
+        read_lock(&tasklist_lock);
+        for_each_process(p)
+                if (p->mm)
+                        cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
+        read_unlock(&tasklist_lock);
 
         return 0;
 }
@@ -215,10 +220,22 @@ extern struct {
         void *thread_info;
 } stack_start;
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tsk)
+int __cpuinit __cpu_up(unsigned int cpu)
 {
+        struct task_struct *tsk;
         unsigned long timeout;
 
+        tsk = cpu_data[cpu].idle;
+        if (!tsk) {
+                tsk = fork_idle(cpu);
+                if (IS_ERR(tsk)) {
+                        pr_err("Failed forking idle task for cpu %d\n", cpu);
+                        return PTR_ERR(tsk);
+                }
+
+                cpu_data[cpu].idle = tsk;
+        }
+
         per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 
         /* Fill in data in head.S for secondary cpus */
diff --git a/arch/sh/kernel/sys_sh32.c b/arch/sh/kernel/sys_sh32.c
index 497bab3a040..f56b6fe5c5d 100644
--- a/arch/sh/kernel/sys_sh32.c
+++ b/arch/sh/kernel/sys_sh32.c
@@ -60,3 +60,27 @@ asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1,
                                 (u64)len0 << 32 | len1, advice);
 #endif
 }
+
+#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH2A)
+#define SYSCALL_ARG3    "trapa #0x23"
+#else
+#define SYSCALL_ARG3    "trapa #0x13"
+#endif
+
+/*
+ * Do a system call from kernel instead of calling sys_execve so we
+ * end up with proper pt_regs.
+ */
+int kernel_execve(const char *filename,
+                  const char *const argv[],
+                  const char *const envp[])
+{
+        register long __sc0 __asm__ ("r3") = __NR_execve;
+        register long __sc4 __asm__ ("r4") = (long) filename;
+        register long __sc5 __asm__ ("r5") = (long) argv;
+        register long __sc6 __asm__ ("r6") = (long) envp;
+        __asm__ __volatile__ (SYSCALL_ARG3 : "=z" (__sc0)
+                        : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6)
+                        : "memory");
+        return __sc0;
+}
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index fe97ae5e56f..293e39c59c0 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -204,8 +204,8 @@ ENTRY(sys_call_table)
         .long sys_capset           /* 185 */
         .long sys_sigaltstack
         .long sys_sendfile
-        .long sys_ni_syscall    /* getpmsg */
-        .long sys_ni_syscall    /* putpmsg */
+        .long sys_ni_syscall    /* streams1 */
+        .long sys_ni_syscall    /* streams2 */
         .long sys_vfork            /* 190 */
         .long sys_getrlimit
         .long sys_mmap2
@@ -259,8 +259,8 @@ ENTRY(sys_call_table)
         .long sys_futex         /* 240 */
         .long sys_sched_setaffinity
         .long sys_sched_getaffinity
-        .long sys_ni_syscall    /* reserved for set_thread_area */
-        .long sys_ni_syscall    /* reserved for get_thread_area */
+        .long sys_ni_syscall
+        .long sys_ni_syscall
         .long sys_io_setup      /* 245 */
         .long sys_io_destroy
         .long sys_io_getevents
@@ -382,6 +382,3 @@ ENTRY(sys_call_table)
         .long sys_syncfs
         .long sys_sendmmsg
         .long sys_setns
-        .long sys_process_vm_readv      /* 365 */
-        .long sys_process_vm_writev
-        .long sys_kcmp
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index 5c7b1c67bdc..ceb34b94afa 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -208,8 +208,8 @@ sys_call_table:
         .long sys_capset                /* 185 */
         .long sys_sigaltstack
         .long sys_sendfile
-        .long sys_ni_syscall    /* getpmsg */
-        .long sys_ni_syscall    /* putpmsg */
+        .long sys_ni_syscall    /* streams1 */
+        .long sys_ni_syscall    /* streams2 */
         .long sys_vfork                 /* 190 */
         .long sys_getrlimit
         .long sys_mmap2
@@ -296,8 +296,8 @@ sys_call_table:
         .long sys_futex
         .long sys_sched_setaffinity
         .long sys_sched_getaffinity     /* 270 */
-        .long sys_ni_syscall            /* reserved for set_thread_area */
-        .long sys_ni_syscall            /* reserved for get_thread_area */
+        .long sys_ni_syscall
+        .long sys_ni_syscall
         .long sys_io_setup
         .long sys_io_destroy
         .long sys_io_getevents          /* 275 */
@@ -402,6 +402,3 @@ sys_call_table:
         .long sys_syncfs
         .long sys_sendmmsg
         .long sys_setns                 /* 375 */
-        .long sys_process_vm_readv
-        .long sys_process_vm_writev
-        .long sys_kcmp
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 552c8fcf941..8a0072de2bc 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -21,6 +21,7 @@
 #include <linux/smp.h>
 #include <linux/rtc.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
 #include <asm/rtc.h>
 
 /* Dummy RTC ops */
@@ -109,6 +110,7 @@ void __init time_init(void)
         if (board_time_init)
                 board_time_init();
 
+        hwblk_init();
         clk_init();
 
         late_time_init = sh_late_time_init;
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 772caffba22..38e862852dd 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -11,10 +11,8 @@
 #include <linux/cpumask.h>
 #include <linux/init.h>
 #include <linux/percpu.h>
-#include <linux/topology.h>
 #include <linux/node.h>
 #include <linux/nodemask.h>
-#include <linux/export.h>
 
 static DEFINE_PER_CPU(struct cpu, cpu_devices);
 
@@ -27,7 +25,7 @@ static cpumask_t cpu_coregroup_map(unsigned int cpu)
          * Presently all SH-X3 SMP cores are multi-cores, so just keep it
          * simple until we have a method for determining topology..
          */
-        return *cpu_possible_mask;
+        return cpu_possible_map;
 }
 
 const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 72246bc0688..0830c2a9f71 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -6,79 +6,8 @@
 #include <linux/sched.h>
 #include <linux/uaccess.h>
 #include <linux/hardirq.h>
-#include <linux/kernel.h>
-#include <linux/kexec.h>
-#include <linux/module.h>
 #include <asm/unwinder.h>
-#include <asm/traps.h>
-
-static DEFINE_SPINLOCK(die_lock);
-
-void die(const char *str, struct pt_regs *regs, long err)
-{
-        static int die_counter;
-
-        oops_enter();
-
-        spin_lock_irq(&die_lock);
-        console_verbose();
-        bust_spinlocks(1);
-
-        printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
-        print_modules();
-        show_regs(regs);
-
-        printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
-                        task_pid_nr(current), task_stack_page(current) + 1);
-
-        if (!user_mode(regs) || in_interrupt())
-                dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
-                         (unsigned long)task_stack_page(current));
-
-        notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV);
-
-        bust_spinlocks(0);
-        add_taint(TAINT_DIE);
-        spin_unlock_irq(&die_lock);
-        oops_exit();
-
-        if (kexec_should_crash(current))
-                crash_kexec(regs);
-
-        if (in_interrupt())
-                panic("Fatal exception in interrupt");
-
-        if (panic_on_oops)
-                panic("Fatal exception");
-
-        do_exit(SIGSEGV);
-}
-
-void die_if_kernel(const char *str, struct pt_regs *regs, long err)
-{
-        if (!user_mode(regs))
-                die(str, regs, err);
-}
-
-/*
- * try and fix up kernelspace address errors
- * - userspace errors just cause EFAULT to be returned, resulting in SEGV
- * - kernel/userspace interfaces cause a jump to an appropriate handler
- * - other kernel errors are bad
- */
-void die_if_no_fixup(const char *str, struct pt_regs *regs, long err)
-{
-        if (!user_mode(regs)) {
-                const struct exception_table_entry *fixup;
-                fixup = search_exception_tables(regs->pc);
-                if (fixup) {
-                        regs->pc = fixup->fixup;
-                        return;
-                }
-
-                die(str, regs, err);
-        }
-}
+#include <asm/system.h>
 
 #ifdef CONFIG_GENERIC_BUG
 static void handle_BUG(struct pt_regs *regs)
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 5f513a64ded..7bbef95c9d1 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -16,20 +16,21 @@
 #include <linux/hardirq.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
+#include <linux/module.h>
 #include <linux/kallsyms.h>
 #include <linux/io.h>
 #include <linux/bug.h>
 #include <linux/debug_locks.h>
 #include <linux/kdebug.h>
+#include <linux/kexec.h>
 #include <linux/limits.h>
 #include <linux/sysfs.h>
 #include <linux/uaccess.h>
 #include <linux/perf_event.h>
+#include <asm/system.h>
 #include <asm/alignment.h>
 #include <asm/fpu.h>
 #include <asm/kprobes.h>
-#include <asm/traps.h>
-#include <asm/bl_bit.h>
 
 #ifdef CONFIG_CPU_SH2
 # define TRAP_RESERVED_INST     4
@@ -46,6 +47,102 @@
 #define TRAP_ILLEGAL_SLOT_INST  13
 #endif
 
+static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
+{
+        unsigned long p;
+        int i;
+
+        printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
+
+        for (p = bottom & ~31; p < top; ) {
+                printk("%04lx: ", p & 0xffff);
+
+                for (i = 0; i < 8; i++, p += 4) {
+                        unsigned int val;
+
+                        if (p < bottom || p >= top)
+                                printk("         ");
+                        else {
+                                if (__get_user(val, (unsigned int __user *)p)) {
+                                        printk("\n");
+                                        return;
+                                }
+                                printk("%08x ", val);
+                        }
+                }
+                printk("\n");
+        }
+}
+
+static DEFINE_SPINLOCK(die_lock);
+
+void die(const char * str, struct pt_regs * regs, long err)
+{
+        static int die_counter;
+
+        oops_enter();
+
+        spin_lock_irq(&die_lock);
+        console_verbose();
+        bust_spinlocks(1);
+
+        printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
+        print_modules();
+        show_regs(regs);
+
+        printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
+                        task_pid_nr(current), task_stack_page(current) + 1);
+
+        if (!user_mode(regs) || in_interrupt())
+                dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
+                         (unsigned long)task_stack_page(current));
+
+        notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV);
+
+        bust_spinlocks(0);
+        add_taint(TAINT_DIE);
+        spin_unlock_irq(&die_lock);
+        oops_exit();
+
+        if (kexec_should_crash(current))
+                crash_kexec(regs);
+
+        if (in_interrupt())
+                panic("Fatal exception in interrupt");
+
+        if (panic_on_oops)
+                panic("Fatal exception");
+
+        do_exit(SIGSEGV);
+}
+
+static inline void die_if_kernel(const char *str, struct pt_regs *regs,
+                                 long err)
+{
+        if (!user_mode(regs))
+                die(str, regs, err);
+}
+
+/*
+ * try and fix up kernelspace address errors
+ * - userspace errors just cause EFAULT to be returned, resulting in SEGV
+ * - kernel/userspace interfaces cause a jump to an appropriate handler
+ * - other kernel errors are bad
+ */
+static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
+{
+        if (!user_mode(regs)) {
+                const struct exception_table_entry *fixup;
+                fixup = search_exception_tables(regs->pc);
+                if (fixup) {
+                        regs->pc = fixup->fixup;
+                        return;
+                }
+
+                die(str, regs, err);
+        }
+}
+
 static inline void sign_extend(unsigned int count, unsigned char *dst)
 {
 #ifdef __LITTLE_ENDIAN__
@@ -802,3 +899,26 @@ void __init trap_init(void)
         set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler);
 #endif
 }
+
+void show_stack(struct task_struct *tsk, unsigned long *sp)
+{
+        unsigned long stack;
+
+        if (!tsk)
+                tsk = current;
+        if (tsk == current)
+                sp = (unsigned long *)current_stack_pointer;
+        else
+                sp = (unsigned long *)tsk->thread.sp;
+
+        stack = (unsigned long)sp;
+        dump_mem("Stack: ", stack, THREAD_SIZE +
+                 (unsigned long)task_stack_page(tsk));
+        show_trace(tsk, sp, NULL);
+}
+
+void dump_stack(void)
+{
+        show_stack(NULL, NULL);
+}
+EXPORT_SYMBOL(dump_stack);
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index f87d20da179..cd3a4048329 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -25,27 +25,288 @@
 #include <linux/sysctl.h>
 #include <linux/module.h>
 #include <linux/perf_event.h>
+#include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
-#include <asm/alignment.h>
+#include <linux/atomic.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
 #include <asm/fpu.h>
 
-static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_mode)
+#undef DEBUG_EXCEPTION
+#ifdef DEBUG_EXCEPTION
+/* implemented in ../lib/dbg.c */
+extern void show_excp_regs(char *fname, int trapnr, int signr,
+                           struct pt_regs *regs);
+#else
+#define show_excp_regs(a, b, c, d)
+#endif
+
+static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
+                unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk);
+
+#define DO_ERROR(trapnr, signr, str, name, tsk) \
+asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
+{ \
+        do_unhandled_exception(trapnr, signr, str, __stringify(name), error_code, regs, current); \
+}
+
+static DEFINE_SPINLOCK(die_lock);
+
+void die(const char * str, struct pt_regs * regs, long err)
+{
+        console_verbose();
+        spin_lock_irq(&die_lock);
+        printk("%s: %lx\n", str, (err & 0xffffff));
+        show_regs(regs);
+        spin_unlock_irq(&die_lock);
+        do_exit(SIGSEGV);
+}
+
+static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
+{
+        if (!user_mode(regs))
+                die(str, regs, err);
+}
+
+static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
+{
+        if (!user_mode(regs)) {
+                const struct exception_table_entry *fixup;
+                fixup = search_exception_tables(regs->pc);
+                if (fixup) {
+                        regs->pc = fixup->fixup;
+                        return;
+                }
+                die(str, regs, err);
+        }
+}
+
+DO_ERROR(13, SIGILL,  "illegal slot instruction", illegal_slot_inst, current)
+DO_ERROR(87, SIGSEGV, "address error (exec)", address_error_exec, current)
+
+
+/* Implement misaligned load/store handling for kernel (and optionally for user
+   mode too).  Limitation : only SHmedia mode code is handled - there is no
+   handling at all for misaligned accesses occurring in SHcompact code yet. */
+
+static int misaligned_fixup(struct pt_regs *regs);
+
+asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
+{
+        if (misaligned_fixup(regs) < 0) {
+                do_unhandled_exception(7, SIGSEGV, "address error(load)",
+                                "do_address_error_load",
+                                error_code, regs, current);
+        }
+        return;
+}
+
+asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
+{
+        if (misaligned_fixup(regs) < 0) {
+                do_unhandled_exception(8, SIGSEGV, "address error(store)",
+                                "do_address_error_store",
+                                error_code, regs, current);
+        }
+        return;
+}
+
+#if defined(CONFIG_SH64_ID2815_WORKAROUND)
+
+#define OPCODE_INVALID      0
+#define OPCODE_USER_VALID   1
+#define OPCODE_PRIV_VALID   2
+
+/* getcon/putcon - requires checking which control register is referenced. */
+#define OPCODE_CTRL_REG     3
+
+/* Table of valid opcodes for SHmedia mode.
+   Form a 10-bit value by concatenating the major/minor opcodes i.e.
+   opcode[31:26,20:16].  The 6 MSBs of this value index into the following
+   array.  The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
+   LSBs==4'b0000 etc). */
+static unsigned long shmedia_opcode_table[64] = {
+        0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
+        0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
+        0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
+        0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
+        0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
+        0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
+        0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
+        0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
+};
+
+void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
+{
+        /* Workaround SH5-101 cut2 silicon defect #2815 :
+           in some situations, inter-mode branches from SHcompact -> SHmedia
+           which should take ITLBMISS or EXECPROT exceptions at the target
+           falsely take RESINST at the target instead. */
+
+        unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
+        unsigned long pc, aligned_pc;
+        int get_user_error;
+        int trapnr = 12;
+        int signr = SIGILL;
+        char *exception_name = "reserved_instruction";
+
+        pc = regs->pc;
+        if ((pc & 3) == 1) {
+                /* SHmedia : check for defect.  This requires executable vmas
+                   to be readable too. */
+                aligned_pc = pc & ~3;
+                if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
+                        get_user_error = -EFAULT;
+                } else {
+                        get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
+                }
+                if (get_user_error >= 0) {
+                        unsigned long index, shift;
+                        unsigned long major, minor, combined;
+                        unsigned long reserved_field;
+                        reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
+                        major = (opcode >> 26) & 0x3f;
+                        minor = (opcode >> 16) & 0xf;
+                        combined = (major << 4) | minor;
+                        index = major;
+                        shift = minor << 1;
+                        if (reserved_field == 0) {
+                                int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
+                                switch (opcode_state) {
+                                        case OPCODE_INVALID:
+                                                /* Trap. */
+                                                break;
+                                        case OPCODE_USER_VALID:
+                                                /* Restart the instruction : the branch to the instruction will now be from an RTE
+                                                   not from SHcompact so the silicon defect won't be triggered. */
+                                                return;
+                                        case OPCODE_PRIV_VALID:
+                                                if (!user_mode(regs)) {
+                                                        /* Should only ever get here if a module has
+                                                           SHcompact code inside it.  If so, the same fix up is needed. */
+                                                        return; /* same reason */
+                                                }
+                                                /* Otherwise, user mode trying to execute a privileged instruction -
+                                                   fall through to trap. */
+                                                break;
+                                        case OPCODE_CTRL_REG:
+                                                /* If in privileged mode, return as above. */
+                                                if (!user_mode(regs)) return;
+                                                /* In user mode ... */
+                                                if (combined == 0x9f) { /* GETCON */
+                                                        unsigned long regno = (opcode >> 20) & 0x3f;
+                                                        if (regno >= 62) {
+                                                                return;
+                                                        }
+                                                        /* Otherwise, reserved or privileged control register, => trap */
+                                                } else if (combined == 0x1bf) { /* PUTCON */
+                                                        unsigned long regno = (opcode >> 4) & 0x3f;
+                                                        if (regno >= 62) {
+                                                                return;
+                                                        }
+                                                        /* Otherwise, reserved or privileged control register, => trap */
+                                                } else {
+                                                        /* Trap */
+                                                }
+                                                break;
+                                        default:
+                                                /* Fall through to trap. */
+                                                break;
+                                }
+                        }
+                        /* fall through to normal resinst processing */
+                } else {
+                        /* Error trying to read opcode.  This typically means a
+                           real fault, not a RESINST any more.  So change the
+                           codes. */
+                        trapnr = 87;
+                        exception_name = "address error (exec)";
+                        signr = SIGSEGV;
+                }
+        }
+
+        do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
+}
+
+#else /* CONFIG_SH64_ID2815_WORKAROUND */
+
+/* If the workaround isn't needed, this is just a straightforward reserved
+   instruction */
+DO_ERROR(12, SIGILL,  "reserved instruction", reserved_inst, current)
+
+#endif /* CONFIG_SH64_ID2815_WORKAROUND */
+
+/* Called with interrupts disabled */
+asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
+{
+        show_excp_regs(__func__, -1, -1, regs);
+        die_if_kernel("exception", regs, ex);
+}
+
+int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
+{
+        /* Syscall debug */
+        printk("System call ID error: [0x1#args:8 #syscall:16  0x%lx]\n", scId);
+
+        die_if_kernel("unknown trapa", regs, scId);
+
+        return -ENOSYS;
+}
+
+void show_stack(struct task_struct *tsk, unsigned long *sp)
+{
+#ifdef CONFIG_KALLSYMS
+        extern void sh64_unwind(struct pt_regs *regs);
+        struct pt_regs *regs;
+
+        regs = tsk ? tsk->thread.kregs : NULL;
+
+        sh64_unwind(regs);
+#else
+        printk(KERN_ERR "Can't backtrace on sh64 without CONFIG_KALLSYMS\n");
+#endif
+}
+
+void show_task(unsigned long *sp)
+{
+        show_stack(NULL, sp);
+}
+
+void dump_stack(void)
+{
+        show_task(NULL);
+}
+/* Needed by any user of WARN_ON in view of the defn in include/asm-sh/bug.h */
+EXPORT_SYMBOL(dump_stack);
+
+static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_name,
+                unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk)
+{
+        show_excp_regs(fn_name, trapnr, signr, regs);
+        tsk->thread.error_code = error_code;
+        tsk->thread.trap_no = trapnr;
+
+        if (user_mode(regs))
+                force_sig(signr, tsk);
+
+        die_if_no_fixup(str, regs, error_code);
+}
+
+static int read_opcode(unsigned long long pc, unsigned long *result_opcode, int from_user_mode)
 {
         int get_user_error;
         unsigned long aligned_pc;
-        insn_size_t opcode;
+        unsigned long opcode;
 
         if ((pc & 3) == 1) {
                 /* SHmedia */
                 aligned_pc = pc & ~3;
                 if (from_user_mode) {
-                        if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t))) {
+                        if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
                                 get_user_error = -EFAULT;
                         } else {
-                                get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);
+                                get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
                                 *result_opcode = opcode;
                         }
                         return get_user_error;
@@ -53,7 +314,7 @@ static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_
                         /* If the fault was in the kernel, we can either read
                          * this directly, or if not, we fault.
                         */
-                        *result_opcode = *(insn_size_t *)aligned_pc;
+                        *result_opcode = *(unsigned long *) aligned_pc;
                         return 0;
                 }
         } else if ((pc & 1) == 0) {
@@ -79,23 +340,17 @@ static int address_is_sign_extended(__u64 a)
 #endif
 }
 
-/* return -1 for fault, 0 for OK */
 static int generate_and_check_address(struct pt_regs *regs,
-                                      insn_size_t opcode,
+                                      __u32 opcode,
                                       int displacement_not_indexed,
                                       int width_shift,
                                       __u64 *address)
 {
+        /* return -1 for fault, 0 for OK */
+
         __u64 base_address, addr;
         int basereg;
 
-        switch (1 << width_shift) {
-        case 1: inc_unaligned_byte_access(); break;
-        case 2: inc_unaligned_word_access(); break;
-        case 4: inc_unaligned_dword_access(); break;
-        case 8: inc_unaligned_multi_access(); break;
-        }
-
         basereg = (opcode >> 20) & 0x3f;
         base_address = regs->regs[basereg];
         if (displacement_not_indexed) {
@@ -112,28 +367,28 @@ static int generate_and_check_address(struct pt_regs *regs,
         }
 
         /* Check sign extended */
-        if (!address_is_sign_extended(addr))
+        if (!address_is_sign_extended(addr)) {
                 return -1;
+        }
 
         /* Check accessible.  For misaligned access in the kernel, assume the
            address is always accessible (and if not, just fault when the
            load/store gets done.) */
         if (user_mode(regs)) {
-                inc_unaligned_user_access();
-
-                if (addr >= TASK_SIZE)
+                if (addr >= TASK_SIZE) {
                         return -1;
-        } else
-                inc_unaligned_kernel_access();
+                }
+                /* Do access_ok check later - it depends on whether it's a load or a store. */
+        }
 
         *address = addr;
-
-        perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, addr);
-        unaligned_fixups_notify(current, opcode, regs);
-
         return 0;
 }
 
+static int user_mode_unaligned_fixup_count = 10;
+static int user_mode_unaligned_fixup_enable = 1;
+static int kernel_mode_unaligned_fixup_count = 32;
+
 static void misaligned_kernel_word_load(__u64 address, int do_sign_extend, __u64 *result)
 {
         unsigned short x;
@@ -163,7 +418,7 @@ static void misaligned_kernel_word_store(__u64 address, __u64 value)
 }
 
 static int misaligned_load(struct pt_regs *regs,
-                           insn_size_t opcode,
+                           __u32 opcode,
                            int displacement_not_indexed,
                            int width_shift,
                            int do_sign_extend)
@@ -175,8 +430,11 @@ static int misaligned_load(struct pt_regs *regs,
 
         error = generate_and_check_address(regs, opcode,
                         displacement_not_indexed, width_shift, &address);
-        if (error < 0)
+        if (error < 0) {
                 return error;
+        }
+
+        perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);
 
         destreg = (opcode >> 4) & 0x3f;
         if (user_mode(regs)) {
@@ -235,10 +493,11 @@ static int misaligned_load(struct pt_regs *regs,
         }
 
         return 0;
+
 }
 
 static int misaligned_store(struct pt_regs *regs,
-                            insn_size_t opcode,
+                            __u32 opcode,
                             int displacement_not_indexed,
                             int width_shift)
 {
@@ -249,8 +508,11 @@ static int misaligned_store(struct pt_regs *regs,
 
         error = generate_and_check_address(regs, opcode,
                         displacement_not_indexed, width_shift, &address);
-        if (error < 0)
+        if (error < 0) {
                 return error;
+        }
+
+        perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);
 
         srcreg = (opcode >> 4) & 0x3f;
         if (user_mode(regs)) {
@@ -304,12 +566,13 @@ static int misaligned_store(struct pt_regs *regs,
         }
 
         return 0;
+
 }
 
 /* Never need to fix up misaligned FPU accesses within the kernel since that's a real
    error. */
 static int misaligned_fpu_load(struct pt_regs *regs,
-                           insn_size_t opcode,
+                           __u32 opcode,
                            int displacement_not_indexed,
                            int width_shift,
                            int do_paired_load)
@@ -321,8 +584,11 @@ static int misaligned_fpu_load(struct pt_regs *regs,
 
         error = generate_and_check_address(regs, opcode,
                         displacement_not_indexed, width_shift, &address);
-        if (error < 0)
+        if (error < 0) {
                 return error;
+        }
+
+        perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, address);
 
         destreg = (opcode >> 4) & 0x3f;
         if (user_mode(regs)) {
@@ -378,10 +644,12 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                 die ("Misaligned FPU load inside kernel", regs, 0);
                 return -1;
         }
+
+
 }
 
 static int misaligned_fpu_store(struct pt_regs *regs,
-                           insn_size_t opcode,
+                           __u32 opcode,
                            int displacement_not_indexed,
                            int width_shift,
                            int do_paired_load)
@@ -393,8 +661,11 @@ static int misaligned_fpu_store(struct pt_regs *regs,
 
         error = generate_and_check_address(regs, opcode,
                         displacement_not_indexed, width_shift, &address);
-        if (error < 0)
+        if (error < 0) {
                 return error;
+        }
+
+        perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, address);
 
         srcreg = (opcode >> 4) & 0x3f;
         if (user_mode(regs)) {
@@ -455,13 +726,11 @@ static int misaligned_fpu_store(struct pt_regs *regs,
 
 static int misaligned_fixup(struct pt_regs *regs)
 {
-        insn_size_t opcode;
+        unsigned long opcode;
         int error;
         int major, minor;
-        unsigned int user_action;
 
-        user_action = unaligned_user_action();
-        if (!(user_action & UM_FIXUP))
+        if (!user_mode_unaligned_fixup_enable)
                 return -1;
 
         error = read_opcode(regs->pc, &opcode, user_mode(regs));
@@ -471,6 +740,23 @@ static int misaligned_fixup(struct pt_regs *regs)
         major = (opcode >> 26) & 0x3f;
         minor = (opcode >> 16) & 0xf;
 
+        if (user_mode(regs) && (user_mode_unaligned_fixup_count > 0)) {
+                --user_mode_unaligned_fixup_count;
+                /* Only do 'count' worth of these reports, to remove a potential DoS against syslog */
+                printk("Fixing up unaligned userspace access in \"%s\" pid=%d pc=0x%08x ins=0x%08lx\n",
+                       current->comm, task_pid_nr(current), (__u32)regs->pc, opcode);
+        } else if (!user_mode(regs) && (kernel_mode_unaligned_fixup_count > 0)) {
+                --kernel_mode_unaligned_fixup_count;
+                if (in_interrupt()) {
+                        printk("Fixing up unaligned kernelspace access in interrupt pc=0x%08x ins=0x%08lx\n",
+                               (__u32)regs->pc, opcode);
+                } else {
+                        printk("Fixing up unaligned kernelspace access in \"%s\" pid=%d pc=0x%08x ins=0x%08lx\n",
+                               current->comm, task_pid_nr(current), (__u32)regs->pc, opcode);
+                }
+        }
+
+
         switch (major) {
                 case (0x84>>2): /* LD.W */
                         error = misaligned_load(regs, opcode, 1, 1, 1);
@@ -595,202 +881,59 @@ static int misaligned_fixup(struct pt_regs *regs)
                 regs->pc += 4; /* Skip the instruction that's just been emulated */
                 return 0;
         }
-}
-
-static void do_unhandled_exception(int signr, char *str, unsigned long error,
-                                   struct pt_regs *regs)
-{
-        if (user_mode(regs))
-                force_sig(signr, current);
 
-        die_if_no_fixup(str, regs, error);
-}
-
-#define DO_ERROR(signr, str, name) \
-asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
-{ \
-        do_unhandled_exception(signr, str, error_code, regs); \
 }
 
-DO_ERROR(SIGILL,  "illegal slot instruction", illegal_slot_inst)
-DO_ERROR(SIGSEGV, "address error (exec)", address_error_exec)
-
-#if defined(CONFIG_SH64_ID2815_WORKAROUND)
-
-#define OPCODE_INVALID      0
-#define OPCODE_USER_VALID   1
-#define OPCODE_PRIV_VALID   2
-
-/* getcon/putcon - requires checking which control register is referenced. */
-#define OPCODE_CTRL_REG     3
-
-/* Table of valid opcodes for SHmedia mode.
-   Form a 10-bit value by concatenating the major/minor opcodes i.e.
-   opcode[31:26,20:16].  The 6 MSBs of this value index into the following
-   array.  The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
-   LSBs==4'b0000 etc). */
-static unsigned long shmedia_opcode_table[64] = {
-        0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
-        0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
-        0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
-        0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
-        0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
-        0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
-        0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
-        0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
+static ctl_table unaligned_table[] = {
+        {
+                .procname       = "kernel_reports",
+                .data           = &kernel_mode_unaligned_fixup_count,
+                .maxlen         = sizeof(int),
+                .mode           = 0644,
+                .proc_handler   = proc_dointvec
+        },
+        {
+                .procname       = "user_reports",
+                .data           = &user_mode_unaligned_fixup_count,
+                .maxlen         = sizeof(int),
+                .mode           = 0644,
+                .proc_handler   = proc_dointvec
+        },
+        {
+                .procname       = "user_enable",
+                .data           = &user_mode_unaligned_fixup_enable,
+                .maxlen         = sizeof(int),
+                .mode           = 0644,
+                .proc_handler   = proc_dointvec},
+        {}
 };
 
-/* Workaround SH5-101 cut2 silicon defect #2815 :
-   in some situations, inter-mode branches from SHcompact -> SHmedia
-   which should take ITLBMISS or EXECPROT exceptions at the target
-   falsely take RESINST at the target instead. */
-void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
-{
-        insn_size_t opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
-        unsigned long pc, aligned_pc;
-        unsigned long index, shift;
-        unsigned long major, minor, combined;
-        unsigned long reserved_field;
-        int opcode_state;
-        int get_user_error;
-        int signr = SIGILL;
-        char *exception_name = "reserved_instruction";
-
-        pc = regs->pc;
-
-        /* SHcompact is not handled */
-        if (unlikely((pc & 3) == 0))
-                goto out;
-
-        /* SHmedia : check for defect.  This requires executable vmas
-           to be readable too. */
-        aligned_pc = pc & ~3;
-        if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t)))
-                get_user_error = -EFAULT;
-        else
-                get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);
-
-        if (get_user_error < 0) {
-                /*
-                 * Error trying to read opcode.  This typically means a
-                 * real fault, not a RESINST any more.  So change the
-                 * codes.
-                 */
-                exception_name = "address error (exec)";
-                signr = SIGSEGV;
-                goto out;
-        }
-
-        /* These bits are currently reserved as zero in all valid opcodes */
-        reserved_field = opcode & 0xf;
-        if (unlikely(reserved_field))
-                goto out;       /* invalid opcode */
-
-        major = (opcode >> 26) & 0x3f;
-        minor = (opcode >> 16) & 0xf;
-        combined = (major << 4) | minor;
-        index = major;
-        shift = minor << 1;
-        opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
-        switch (opcode_state) {
-        case OPCODE_INVALID:
-                /* Trap. */
-                break;
-        case OPCODE_USER_VALID:
-                /*
-                 * Restart the instruction: the branch to the instruction
-                 * will now be from an RTE not from SHcompact so the
-                 * silicon defect won't be triggered.
-                 */
-                return;
-        case OPCODE_PRIV_VALID:
-                if (!user_mode(regs)) {
-                        /*
-                         * Should only ever get here if a module has
-                         * SHcompact code inside it. If so, the same fix
-                         * up is needed.
-                         */
-                        return; /* same reason */
-                }
-
-                /*
-                 * Otherwise, user mode trying to execute a privileged
-                 * instruction - fall through to trap.
-                 */
-                break;
-        case OPCODE_CTRL_REG:
-                /* If in privileged mode, return as above. */
-                if (!user_mode(regs))
-                        return;
-
-                /* In user mode ... */
-                if (combined == 0x9f) { /* GETCON */
-                        unsigned long regno = (opcode >> 20) & 0x3f;
-
-                        if (regno >= 62)
-                                return;
-
-                        /* reserved/privileged control register => trap */
-                } else if (combined == 0x1bf) { /* PUTCON */
-                        unsigned long regno = (opcode >> 4) & 0x3f;
-
-                        if (regno >= 62)
-                                return;
-
-                        /* reserved/privileged control register => trap */
-                }
-
-                break;
-        default:
-                /* Fall through to trap. */
-                break;
-        }
-
-out:
-        do_unhandled_exception(signr, exception_name, error_code, regs);
-}
-
-#else /* CONFIG_SH64_ID2815_WORKAROUND */
-
-/* If the workaround isn't needed, this is just a straightforward reserved
-   instruction */
-DO_ERROR(SIGILL, "reserved instruction", reserved_inst)
-
-#endif /* CONFIG_SH64_ID2815_WORKAROUND */
-
-/* Called with interrupts disabled */
-asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
-{
-        die_if_kernel("exception", regs, ex);
-}
+static ctl_table unaligned_root[] = {
+        {
+                .procname       = "unaligned_fixup",
+                .mode           = 0555,
+                .child          = unaligned_table
+        },
+        {}
+};
 
-asmlinkage int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
+static ctl_table sh64_root[] = {
+        {
+                .procname       = "sh64",
+                .mode           = 0555,
+                .child          = unaligned_root
+        },
+        {}
+};
+static struct ctl_table_header *sysctl_header;
+static int __init init_sysctl(void)
 {
-        /* Syscall debug */
-        printk("System call ID error: [0x1#args:8 #syscall:16  0x%lx]\n", scId);
-
-        die_if_kernel("unknown trapa", regs, scId);
-
-        return -ENOSYS;
+        sysctl_header = register_sysctl_table(sh64_root);
+        return 0;
 }
 
-/* Implement misaligned load/store handling for kernel (and optionally for user
-   mode too).  Limitation : only SHmedia mode code is handled - there is no
-   handling at all for misaligned accesses occurring in SHcompact code yet. */
+__initcall(init_sysctl);
 
-asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
-{
-        if (misaligned_fixup(regs) < 0)
-                do_unhandled_exception(SIGSEGV, "address error(load)",
-                                       error_code, regs);
-}
-
-asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
-{
-        if (misaligned_fixup(regs) < 0)
-                do_unhandled_exception(SIGSEGV, "address error(store)",
-                                error_code, regs);
-}
 
 asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
 {
@@ -802,9 +945,10 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
            of access we make to them - just go direct to their physical
            addresses. */
         exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY);
-        if (exp_cause & ~4)
+        if (exp_cause & ~4) {
                 printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n",
                         (unsigned long)(exp_cause & 0xffffffff));
+        }
         show_state();
         /* Clear all DEBUGINT causes */
         poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index db88cbf9eaf..731c10ce67b 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -23,7 +23,7 @@ OUTPUT_ARCH(sh)
 ENTRY(_start)
 SECTIONS
 {
-        . = PAGE_OFFSET + MEMORY_OFFSET + PHYSICAL_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
+        . = PAGE_OFFSET + MEMORY_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
 
         _text = .;              /* Text and read-only data */
 
@@ -78,6 +78,7 @@ SECTIONS
         . = ALIGN(PAGE_SIZE);
         __init_end = .;
         BSS_SECTION(0, PAGE_SIZE, 4)
+        _ebss = .;                      /* uClinux MTD sucks */
         _end = . ;
 
         STABS_DEBUG
diff --git a/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
index 23af1758405..555a64f124c 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
@@ -34,41 +34,6 @@ __kernel_rt_sigreturn:
 1:      .short  __NR_rt_sigreturn
 .LEND_rt_sigreturn:
         .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
-        .previous
 
         .section .eh_frame,"a",@progbits
-.LCIE1:
-        .ualong .LCIE1_end - .LCIE1_start
-.LCIE1_start:
-        .ualong 0               /* CIE ID */
-        .byte   0x1             /* Version number */
-        .string "zRS"           /* NUL-terminated augmentation string */
-        .uleb128 0x1            /* Code alignment factor */
-        .sleb128 -4             /* Data alignment factor */
-        .byte   0x11            /* Return address register column */
-        .uleb128 0x1            /* Augmentation length and data */
-        .byte 0x1b              /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
-        .byte   0xc, 0xf, 0x0   /* DW_CFA_def_cfa: r15 ofs 0 */
-
-        .align 2
-.LCIE1_end:
-
-        .ualong .LFDE0_end-.LFDE0_start /* Length FDE0 */
-.LFDE0_start:
-        .ualong .LFDE0_start-.LCIE1     /* CIE pointer */
-        .ualong .LSTART_sigreturn-.     /* PC-relative start address */
-        .ualong .LEND_sigreturn-.LSTART_sigreturn
-        .uleb128 0                      /* Augmentation */
-        .align 2
-.LFDE0_end:
-
-        .ualong .LFDE1_end-.LFDE1_start /* Length FDE1 */
-.LFDE1_start:
-        .ualong .LFDE1_start-.LCIE1     /* CIE pointer */
-        .ualong .LSTART_rt_sigreturn-.  /* PC-relative start address */
-        .ualong .LEND_rt_sigreturn-.LSTART_rt_sigreturn
-        .uleb128 0                      /* Augmentation */
-        .align 2
-.LFDE1_end:
-
         .previous
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
index 0eb74d00690..3e70f851cdc 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
@@ -3,34 +3,37 @@
         .type __kernel_vsyscall,@function
 __kernel_vsyscall:
 .LSTART_vsyscall:
-        trapa   #0x10
-         nop
+        /* XXX: We'll have to do something here once we opt to use the vDSO
+         * page for something other than the signal trampoline.. as well as
+         * fill out .eh_frame -- PFM. */
 .LEND_vsyscall:
         .size __kernel_vsyscall,.-.LSTART_vsyscall
-        .previous
 
         .section .eh_frame,"a",@progbits
+        .previous
 .LCIE:
         .ualong .LCIE_end - .LCIE_start
 .LCIE_start:
         .ualong 0               /* CIE ID */
         .byte   0x1             /* Version number */
-        .string "zR"            /* NUL-terminated augmentation string */
+        .string "zRS"           /* NUL-terminated augmentation string */
         .uleb128 0x1            /* Code alignment factor */
         .sleb128 -4             /* Data alignment factor */
         .byte   0x11            /* Return address register column */
-        .uleb128 0x1            /* Augmentation length and data */
-        .byte 0x1b              /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
-        .byte   0xc,0xf,0x0     /* DW_CFA_def_cfa: r15 ofs 0 */
+                                /* Augmentation length and data (none) */
+        .byte   0xc             /* DW_CFA_def_cfa */
+        .uleb128 0xf            /* r15 */
+        .uleb128 0x0            /* offset 0 */
+
         .align 2
 .LCIE_end:
 
         .ualong .LFDE_end-.LFDE_start   /* Length FDE */
 .LFDE_start:
-        .ualong .LFDE_start-.LCIE       /* CIE pointer */
-        .ualong .LSTART_vsyscall-.      /* PC-relative start address */
+        .ualong .LCIE                   /* CIE pointer */
+        .ualong .LSTART_vsyscall-.      /* start address */
         .ualong .LEND_vsyscall-.LSTART_vsyscall
-        .uleb128 0                      /* Augmentation */
+        .uleb128 0
         .align 2
 .LFDE_end:
         .previous
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 5ca579720a0..1d6d51a1ce7 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -73,7 +73,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 
         ret = install_special_mapping(mm, addr, PAGE_SIZE,
                                       VM_READ | VM_EXEC |
-                                      VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
+                                      VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC |
+                                      VM_ALWAYSDUMP,
                                       syscall_pages);
         if (unlikely(ret))
                 goto up_fail;
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
index 60164e65d66..84a57761f17 100644
--- a/arch/sh/lib/mcount.S
+++ b/arch/sh/lib/mcount.S
@@ -39,7 +39,7 @@
  *
  * Make sure the stack pointer contains a valid address. Valid
  * addresses for kernel stacks are anywhere after the bss
- * (after __bss_stop) and anywhere in init_thread_union (init_stack).
+ * (after _ebss) and anywhere in init_thread_union (init_stack).
  */
 #define STACK_CHECK()                                   \
         mov     #(THREAD_SIZE >> 10), r0;               \
@@ -60,7 +60,7 @@
         cmp/hi  r2, r1;                                 \
         bf      stack_panic;                            \
                                                         \
-        /* If sp > __bss_stop then we're OK. */         \
+        /* If sp > _ebss then we're OK. */              \
         mov.l   .L_ebss, r1;                            \
         cmp/hi  r1, r15;                                \
         bt      1f;                                     \
@@ -70,7 +70,7 @@
         cmp/hs  r1, r15;                                \
         bf      stack_panic;                            \
                                                         \
-        /* If sp > init_stack && sp < __bss_stop, not OK. */    \
+        /* If sp > init_stack && sp < _ebss, not OK. */ \
         add     r0, r1;                                 \
         cmp/hs  r1, r15;                                \
         bt      stack_panic;                            \
@@ -292,6 +292,8 @@ stack_panic:
          nop
 
         .align 2
+.L_ebss:
+        .long   _ebss
 .L_init_thread_union:
         .long   init_thread_union
 .Lpanic:
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
index 69779ff741d..1fee75aa1f9 100644
--- a/arch/sh/lib64/Makefile
+++ b/arch/sh/lib64/Makefile
@@ -10,7 +10,7 @@
 #
 
 # Panic should really be compiled as PIC
-lib-y  := udelay.o panic.o memcpy.o memset.o \
+lib-y  := udelay.o dbg.o panic.o memcpy.o memset.o \
           copy_user_memcpy.o copy_page.o strcpy.o strlen.o
 
 # Extracted from libgcc
diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c
index b876780c1e1..97719521065 100644
--- a/arch/sh/math-emu/math.c
+++ b/arch/sh/math-emu/math.c
@@ -14,6 +14,7 @@
 #include <linux/signal.h>
 #include <linux/perf_event.h>
 
+#include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/processor.h>
 #include <asm/io.h>
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 0f7c852f355..c3e61b36649 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -111,7 +111,6 @@ config VSYSCALL
 config NUMA
         bool "Non Uniform Memory Access (NUMA) Support"
         depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
-        select ARCH_WANT_NUMA_VARIABLE_LOCALITY
         default n
         help
           Some SH systems have many various memories scattered around
@@ -144,6 +143,9 @@ config MAX_ACTIVE_REGIONS
                        CPU_SUBTYPE_SH7785)
         default "1"
 
+config ARCH_POPULATES_NODE_MAP
+        def_bool y
+
 config ARCH_SELECT_MEMORY_MODEL
         def_bool y
 
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index cee6b9999d8..2228c8cee4d 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -15,8 +15,8 @@ cacheops-$(CONFIG_CPU_SHX3)		+= cache-shx3.o
 obj-y                   += $(cacheops-y)
 
 mmu-y                   := nommu.o extable_32.o
-mmu-$(CONFIG_MMU)       := extable_$(BITS).o fault.o gup.o ioremap.o kmap.o \
-                           pgtable.o tlbex_$(BITS).o tlbflush_$(BITS).o
+mmu-$(CONFIG_MMU)       := extable_$(BITS).o fault_$(BITS).o gup.o \
+                           ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
 
 obj-y                   += $(mmu-y)
 
@@ -44,7 +44,7 @@ obj-$(CONFIG_HAVE_SRAM_POOL)	+= sram.o
 
 GCOV_PROFILE_pmb.o := n
 
-# Special flags for tlbex_64.o.  This puts restrictions on the number of
+# Special flags for fault_64.o.  This puts restrictions on the number of
 # caller-save registers that the compiler can target when building this file.
 # This is required because the code is called from a context in entry.S where
 # very few registers have been saved in the exception handler (for speed
@@ -59,7 +59,7 @@ GCOV_PROFILE_pmb.o := n
 # The resources not listed below are callee save, i.e. the compiler is free to
 # use any of them and will spill them to the stack itself.
 
-CFLAGS_tlbex_64.o += -ffixed-r7 \
+CFLAGS_fault_64.o += -ffixed-r7 \
         -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \
         -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
         -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 949e2d3138a..1f51225426a 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -15,80 +15,35 @@
 #include <asm/cacheflush.h>
 #include <asm/io.h>
 
-/*
- * The maximum number of pages we support up to when doing ranged dcache
- * flushing. Anything exceeding this will simply flush the dcache in its
- * entirety.
- */
-#define MAX_OCACHE_PAGES        32
-#define MAX_ICACHE_PAGES        32
-
-#ifdef CONFIG_CACHE_WRITEBACK
-static void sh2a_flush_oc_line(unsigned long v, int way)
-{
-        unsigned long addr = (v & 0x000007f0) | (way << 11);
-        unsigned long data;
-
-        data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr);
-        if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
-                data &= ~SH_CACHE_UPDATED;
-                __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr);
-        }
-}
-#endif
-
-static void sh2a_invalidate_line(unsigned long cache_addr, unsigned long v)
-{
-        /* Set associative bit to hit all ways */
-        unsigned long addr = (v & 0x000007f0) | SH_CACHE_ASSOC;
-        __raw_writel((addr & CACHE_PHYSADDR_MASK), cache_addr | addr);
-}
-
-/*
- * Write back the dirty D-caches, but not invalidate them.
- */
 static void sh2a__flush_wback_region(void *start, int size)
 {
-#ifdef CONFIG_CACHE_WRITEBACK
         unsigned long v;
         unsigned long begin, end;
         unsigned long flags;
-        int nr_ways;
 
         begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
         end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
                 & ~(L1_CACHE_BYTES-1);
-        nr_ways = current_cpu_data.dcache.ways;
 
         local_irq_save(flags);
         jump_to_uncached();
 
-        /* If there are too many pages then flush the entire cache */
-        if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
-                begin = CACHE_OC_ADDRESS_ARRAY;
-                end = begin + (nr_ways * current_cpu_data.dcache.way_size);
-
-                for (v = begin; v < end; v += L1_CACHE_BYTES) {
-                        unsigned long data = __raw_readl(v);
-                        if (data & SH_CACHE_UPDATED)
-                                __raw_writel(data & ~SH_CACHE_UPDATED, v);
-                }
-        } else {
+        for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+                unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0);
                 int way;
-                for (way = 0; way < nr_ways; way++) {
-                        for (v = begin; v < end; v += L1_CACHE_BYTES)
-                                sh2a_flush_oc_line(v, way);
+                for (way = 0; way < 4; way++) {
+                        unsigned long data =  __raw_readl(addr | (way << 11));
+                        if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
+                                data &= ~SH_CACHE_UPDATED;
+                                __raw_writel(data, addr | (way << 11));
+                        }
                 }
         }
 
         back_to_cached();
         local_irq_restore(flags);
-#endif
 }
 
-/*
- * Write back the dirty D-caches and invalidate them.
- */
 static void sh2a__flush_purge_region(void *start, int size)
 {
         unsigned long v;
@@ -103,22 +58,13 @@ static void sh2a__flush_purge_region(void *start, int size)
         jump_to_uncached();
 
         for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-#ifdef CONFIG_CACHE_WRITEBACK
-                int way;
-                int nr_ways = current_cpu_data.dcache.ways;
-                for (way = 0; way < nr_ways; way++)
-                        sh2a_flush_oc_line(v, way);
-#endif
-                sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
+                          CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
         }
-
         back_to_cached();
         local_irq_restore(flags);
 }
 
-/*
- * Invalidate the D-caches, but no write back please
- */
 static void sh2a__flush_invalidate_region(void *start, int size)
 {
         unsigned long v;
@@ -128,25 +74,29 @@ static void sh2a__flush_invalidate_region(void *start, int size)
         begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
         end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
                 & ~(L1_CACHE_BYTES-1);
-
         local_irq_save(flags);
         jump_to_uncached();
 
-        /* If there are too many pages then just blow the cache */
-        if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
-                __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
-        } else {
-                for (v = begin; v < end; v += L1_CACHE_BYTES)
-                        sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
+#ifdef CONFIG_CACHE_WRITEBACK
+        __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
+        /* I-cache invalidate */
+        for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
+                          CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
         }
-
+#else
+        for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
+                          CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
+                __raw_writel((v & CACHE_PHYSADDR_MASK),
+                          CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
+        }
+#endif
         back_to_cached();
         local_irq_restore(flags);
 }
 
-/*
- * Write back the range of D-cache, and purge the I-cache.
- */
+/* WBack O-Cache and flush I-Cache */
 static void sh2a_flush_icache_range(void *args)
 {
         struct flusher_data *data = args;
@@ -157,20 +107,23 @@ static void sh2a_flush_icache_range(void *args)
         start = data->addr1 & ~(L1_CACHE_BYTES-1);
         end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
 
-#ifdef CONFIG_CACHE_WRITEBACK
-        sh2a__flush_wback_region((void *)start, end-start);
-#endif
-
         local_irq_save(flags);
         jump_to_uncached();
 
-        /* I-Cache invalidate */
-        /* If there are too many pages then just blow the cache */
-        if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
-                __raw_writel(__raw_readl(CCR) | CCR_ICACHE_INVALIDATE, CCR);
-        } else {
-                for (v = start; v < end; v += L1_CACHE_BYTES)
-                        sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v);
+        for (v = start; v < end; v+=L1_CACHE_BYTES) {
+                unsigned long addr = (v & 0x000007f0);
+                int way;
+                /* O-Cache writeback */
+                for (way = 0; way < 4; way++) {
+                        unsigned long data =  __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
+                        if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
+                                data &= ~SH_CACHE_UPDATED;
+                                __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr | (way << 11));
+                        }
+                }
+                /* I-Cache invalidate */
+                __raw_writel(addr,
+                          CACHE_IC_ADDRESS_ARRAY | addr | 0x00000008);
         }
 
         back_to_cached();
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 0e529285b28..92eb98633ab 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -18,7 +18,6 @@
 #include <linux/highmem.h>
 #include <asm/pgtable.h>
 #include <asm/mmu_context.h>
-#include <asm/cache_insns.h>
 #include <asm/cacheflush.h>
 
 /*
@@ -245,7 +244,7 @@ static void sh4_flush_cache_page(void *args)
                 if (map_coherent)
                         vaddr = kmap_coherent(page, address);
                 else
-                        vaddr = kmap_atomic(page);
+                        vaddr = kmap_atomic(page, KM_USER0);
 
                 address = (unsigned long)vaddr;
         }
@@ -260,7 +259,7 @@ static void sh4_flush_cache_page(void *args)
                 if (map_coherent)
                         kunmap_coherent(vaddr);
                 else
-                        kunmap_atomic(vaddr);
+                        kunmap_atomic(vaddr, KM_USER0);
         }
 }
 
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 616966a96cb..5a580ea0442 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -95,7 +95,7 @@ void copy_user_highpage(struct page *to, struct page *from,
 {
         void *vfrom, *vto;
 
-        vto = kmap_atomic(to);
+        vto = kmap_atomic(to, KM_USER1);
 
         if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
             test_bit(PG_dcache_clean, &from->flags)) {
@@ -103,16 +103,16 @@ void copy_user_highpage(struct page *to, struct page *from,
                 copy_page(vto, vfrom);
                 kunmap_coherent(vfrom);
         } else {
-                vfrom = kmap_atomic(from);
+                vfrom = kmap_atomic(from, KM_USER0);
                 copy_page(vto, vfrom);
-                kunmap_atomic(vfrom);
+                kunmap_atomic(vfrom, KM_USER0);
         }
 
         if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK) ||
             (vma->vm_flags & VM_EXEC))
                 __flush_purge_region(vto, PAGE_SIZE);
 
-        kunmap_atomic(vto);
+        kunmap_atomic(vto, KM_USER1);
         /* Make sure this page is cleared on other CPU's too before using it */
         smp_wmb();
 }
@@ -120,14 +120,14 @@ EXPORT_SYMBOL(copy_user_highpage);
 
 void clear_user_highpage(struct page *page, unsigned long vaddr)
 {
-        void *kaddr = kmap_atomic(page);
+        void *kaddr = kmap_atomic(page, KM_USER0);
 
         clear_page(kaddr);
 
         if (pages_do_alias((unsigned long)kaddr, vaddr & PAGE_MASK))
                 __flush_purge_region(kaddr, PAGE_SIZE);
 
-        kunmap_atomic(kaddr);
+        kunmap_atomic(kaddr, KM_USER0);
 }
 EXPORT_SYMBOL(clear_user_highpage);
 
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index b81d9dbf9fe..f251b5f2765 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -33,8 +33,7 @@ static int __init dma_init(void)
 fs_initcall(dma_init);
 
 void *dma_generic_alloc_coherent(struct device *dev, size_t size,
-                                 dma_addr_t *dma_handle, gfp_t gfp,
-                                 struct dma_attrs *attrs)
+                                 dma_addr_t *dma_handle, gfp_t gfp)
 {
         void *ret, *ret_nocache;
         int order = get_order(size);
@@ -65,8 +64,7 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,
 }
 
 void dma_generic_free_coherent(struct device *dev, size_t size,
-                               void *vaddr, dma_addr_t dma_handle,
-                               struct dma_attrs *attrs)
+                               void *vaddr, dma_addr_t dma_handle)
 {
         int order = get_order(size);
         unsigned long pfn = dma_handle >> PAGE_SHIFT;
diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c
deleted file mode 100644
index 1f49c28affa..00000000000
--- a/arch/sh/mm/fault.c
+++ /dev/null
@@ -1,514 +0,0 @@
-/*
- * Page fault handler for SH with an MMU.
- *
- *  Copyright (C) 1999  Niibe Yutaka
- *  Copyright (C) 2003 - 2012  Paul Mundt
- *
- *  Based on linux/arch/i386/mm/fault.c:
- *   Copyright (C) 1995  Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/hardirq.h>
-#include <linux/kprobes.h>
-#include <linux/perf_event.h>
-#include <linux/kdebug.h>
-#include <asm/io_trapped.h>
-#include <asm/mmu_context.h>
-#include <asm/tlbflush.h>
-#include <asm/traps.h>
-
-static inline int notify_page_fault(struct pt_regs *regs, int trap)
-{
-        int ret = 0;
-
-        if (kprobes_built_in() && !user_mode(regs)) {
-                preempt_disable();
-                if (kprobe_running() && kprobe_fault_handler(regs, trap))
-                        ret = 1;
-                preempt_enable();
-        }
-
-        return ret;
-}
-
-static void
-force_sig_info_fault(int si_signo, int si_code, unsigned long address,
-                     struct task_struct *tsk)
-{
-        siginfo_t info;
-
-        info.si_signo   = si_signo;
-        info.si_errno   = 0;
-        info.si_code    = si_code;
-        info.si_addr    = (void __user *)address;
-
-        force_sig_info(si_signo, &info, tsk);
-}
-
-/*
- * This is useful to dump out the page tables associated with
- * 'addr' in mm 'mm'.
- */
-static void show_pte(struct mm_struct *mm, unsigned long addr)
-{
-        pgd_t *pgd;
-
-        if (mm) {
-                pgd = mm->pgd;
-        } else {
-                pgd = get_TTB();
-
-                if (unlikely(!pgd))
-                        pgd = swapper_pg_dir;
-        }
-
-        printk(KERN_ALERT "pgd = %p\n", pgd);
-        pgd += pgd_index(addr);
-        printk(KERN_ALERT "[%08lx] *pgd=%0*Lx", addr,
-               (u32)(sizeof(*pgd) * 2), (u64)pgd_val(*pgd));
-
-        do {
-                pud_t *pud;
-                pmd_t *pmd;
-                pte_t *pte;
-
-                if (pgd_none(*pgd))
-                        break;
-
-                if (pgd_bad(*pgd)) {
-                        printk("(bad)");
-                        break;
-                }
-
-                pud = pud_offset(pgd, addr);
-                if (PTRS_PER_PUD != 1)
-                        printk(", *pud=%0*Lx", (u32)(sizeof(*pud) * 2),
-                               (u64)pud_val(*pud));
-
-                if (pud_none(*pud))
-                        break;
-
-                if (pud_bad(*pud)) {
-                        printk("(bad)");
-                        break;
-                }
-
-                pmd = pmd_offset(pud, addr);
-                if (PTRS_PER_PMD != 1)
-                        printk(", *pmd=%0*Lx", (u32)(sizeof(*pmd) * 2),
-                               (u64)pmd_val(*pmd));
-
-                if (pmd_none(*pmd))
-                        break;
-
-                if (pmd_bad(*pmd)) {
-                        printk("(bad)");
-                        break;
-                }
-
-                /* We must not map this if we have highmem enabled */
-                if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT)))
-                        break;
-
-                pte = pte_offset_kernel(pmd, addr);
-                printk(", *pte=%0*Lx", (u32)(sizeof(*pte) * 2),
-                       (u64)pte_val(*pte));
-        } while (0);
-
-        printk("\n");
-}
-
-static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
-{
-        unsigned index = pgd_index(address);
-        pgd_t *pgd_k;
-        pud_t *pud, *pud_k;
-        pmd_t *pmd, *pmd_k;
-
-        pgd += index;
-        pgd_k = init_mm.pgd + index;
-
-        if (!pgd_present(*pgd_k))
-                return NULL;
-
-        pud = pud_offset(pgd, address);
-        pud_k = pud_offset(pgd_k, address);
-        if (!pud_present(*pud_k))
-                return NULL;
-
-        if (!pud_present(*pud))
-            set_pud(pud, *pud_k);
-
-        pmd = pmd_offset(pud, address);
-        pmd_k = pmd_offset(pud_k, address);
-        if (!pmd_present(*pmd_k))
-                return NULL;
-
-        if (!pmd_present(*pmd))
-                set_pmd(pmd, *pmd_k);
-        else {
-                /*
-                 * The page tables are fully synchronised so there must
-                 * be another reason for the fault. Return NULL here to
-                 * signal that we have not taken care of the fault.
-                 */
-                BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
-                return NULL;
-        }
-
-        return pmd_k;
-}
-
-#ifdef CONFIG_SH_STORE_QUEUES
-#define __FAULT_ADDR_LIMIT      P3_ADDR_MAX
-#else
-#define __FAULT_ADDR_LIMIT      VMALLOC_END
-#endif
-
-/*
- * Handle a fault on the vmalloc or module mapping area
- */
-static noinline int vmalloc_fault(unsigned long address)
-{
-        pgd_t *pgd_k;
-        pmd_t *pmd_k;
-        pte_t *pte_k;
-
-        /* Make sure we are in vmalloc/module/P3 area: */
-        if (!(address >= VMALLOC_START && address < __FAULT_ADDR_LIMIT))
-                return -1;
-
-        /*
-         * Synchronize this task's top level page-table
-         * with the 'reference' page table.
-         *
-         * Do _not_ use "current" here. We might be inside
-         * an interrupt in the middle of a task switch..
-         */
-        pgd_k = get_TTB();
-        pmd_k = vmalloc_sync_one(pgd_k, address);
-        if (!pmd_k)
-                return -1;
-
-        pte_k = pte_offset_kernel(pmd_k, address);
-        if (!pte_present(*pte_k))
-                return -1;
-
-        return 0;
-}
-
-static void
-show_fault_oops(struct pt_regs *regs, unsigned long address)
-{
-        if (!oops_may_print())
-                return;
-
-        printk(KERN_ALERT "BUG: unable to handle kernel ");
-        if (address < PAGE_SIZE)
-                printk(KERN_CONT "NULL pointer dereference");
-        else
-                printk(KERN_CONT "paging request");
-
-        printk(KERN_CONT " at %08lx\n", address);
-        printk(KERN_ALERT "PC:");
-        printk_address(regs->pc, 1);
-
-        show_pte(NULL, address);
-}
-
-static noinline void
-no_context(struct pt_regs *regs, unsigned long error_code,
-           unsigned long address)
-{
-        /* Are we prepared to handle this kernel fault?  */
-        if (fixup_exception(regs))
-                return;
-
-        if (handle_trapped_io(regs, address))
-                return;
-
-        /*
-         * Oops. The kernel tried to access some bad page. We'll have to
-         * terminate things with extreme prejudice.
-         */
-        bust_spinlocks(1);
-
-        show_fault_oops(regs, address);
-
-        die("Oops", regs, error_code);
-        bust_spinlocks(0);
-        do_exit(SIGKILL);
-}
-
-static void
-__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
-                       unsigned long address, int si_code)
-{
-        struct task_struct *tsk = current;
-
-        /* User mode accesses just cause a SIGSEGV */
-        if (user_mode(regs)) {
-                /*
-                 * It's possible to have interrupts off here:
-                 */
-                local_irq_enable();
-
-                force_sig_info_fault(SIGSEGV, si_code, address, tsk);
-
-                return;
-        }
-
-        no_context(regs, error_code, address);
-}
-
-static noinline void
-bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
-                     unsigned long address)
-{
-        __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);
-}
-
-static void
-__bad_area(struct pt_regs *regs, unsigned long error_code,
-           unsigned long address, int si_code)
-{
-        struct mm_struct *mm = current->mm;
-
-        /*
-         * Something tried to access memory that isn't in our memory map..
-         * Fix it, but check if it's kernel or user first..
-         */
-        up_read(&mm->mmap_sem);
-
-        __bad_area_nosemaphore(regs, error_code, address, si_code);
-}
-
-static noinline void
-bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)
-{
-        __bad_area(regs, error_code, address, SEGV_MAPERR);
-}
-
-static noinline void
-bad_area_access_error(struct pt_regs *regs, unsigned long error_code,
-                      unsigned long address)
-{
-        __bad_area(regs, error_code, address, SEGV_ACCERR);
-}
-
-static void
-do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
-{
-        struct task_struct *tsk = current;
-        struct mm_struct *mm = tsk->mm;
-
-        up_read(&mm->mmap_sem);
-
-        /* Kernel mode? Handle exceptions or die: */
-        if (!user_mode(regs))
-                no_context(regs, error_code, address);
-
-        force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
-}
-
-static noinline int
-mm_fault_error(struct pt_regs *regs, unsigned long error_code,
-               unsigned long address, unsigned int fault)
-{
-        /*
-         * Pagefault was interrupted by SIGKILL. We have no reason to
-         * continue pagefault.
-         */
-        if (fatal_signal_pending(current)) {
-                if (!(fault & VM_FAULT_RETRY))
-                        up_read(&current->mm->mmap_sem);
-                if (!user_mode(regs))
-                        no_context(regs, error_code, address);
-                return 1;
-        }
-
-        if (!(fault & VM_FAULT_ERROR))
-                return 0;
-
-        if (fault & VM_FAULT_OOM) {
-                /* Kernel mode? Handle exceptions or die: */
-                if (!user_mode(regs)) {
-                        up_read(&current->mm->mmap_sem);
-                        no_context(regs, error_code, address);
-                        return 1;
-                }
-                up_read(&current->mm->mmap_sem);
-
-                /*
-                 * We ran out of memory, call the OOM killer, and return the
-                 * userspace (which will retry the fault, or kill us if we got
-                 * oom-killed):
-                 */
-                pagefault_out_of_memory();
-        } else {
-                if (fault & VM_FAULT_SIGBUS)
-                        do_sigbus(regs, error_code, address);
-                else
-                        BUG();
-        }
-
-        return 1;
-}
-
-static inline int access_error(int error_code, struct vm_area_struct *vma)
-{
-        if (error_code & FAULT_CODE_WRITE) {
-                /* write, present and write, not present: */
-                if (unlikely(!(vma->vm_flags & VM_WRITE)))
-                        return 1;
-                return 0;
-        }
-
-        /* ITLB miss on NX page */
-        if (unlikely((error_code & FAULT_CODE_ITLB) &&
-                     !(vma->vm_flags & VM_EXEC)))
-                return 1;
-
-        /* read, not present: */
-        if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))))
-                return 1;
-
-        return 0;
-}
-
-static int fault_in_kernel_space(unsigned long address)
-{
-        return address >= TASK_SIZE;
-}
-
-/*
- * This routine handles page faults.  It determines the address,
- * and the problem, and then passes it off to one of the appropriate
- * routines.
- */
-asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
-                                        unsigned long error_code,
-                                        unsigned long address)
-{
-        unsigned long vec;
-        struct task_struct *tsk;
-        struct mm_struct *mm;
-        struct vm_area_struct * vma;
-        int fault;
-        int write = error_code & FAULT_CODE_WRITE;
-        unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
-                              (write ? FAULT_FLAG_WRITE : 0));
-
-        tsk = current;
-        mm = tsk->mm;
-        vec = lookup_exception_vector();
-
-        /*
-         * We fault-in kernel-space virtual memory on-demand. The
-         * 'reference' page table is init_mm.pgd.
-         *
-         * NOTE! We MUST NOT take any locks for this case. We may
-         * be in an interrupt or a critical region, and should
-         * only copy the information from the master page table,
-         * nothing more.
-         */
-        if (unlikely(fault_in_kernel_space(address))) {
-                if (vmalloc_fault(address) >= 0)
-                        return;
-                if (notify_page_fault(regs, vec))
-                        return;
-
-                bad_area_nosemaphore(regs, error_code, address);
-                return;
-        }
-
-        if (unlikely(notify_page_fault(regs, vec)))
-                return;
-
-        /* Only enable interrupts if they were on before the fault */
-        if ((regs->sr & SR_IMASK) != SR_IMASK)
-                local_irq_enable();
-
-        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
-
-        /*
-         * If we're in an interrupt, have no user context or are running
-         * in an atomic region then we must not take the fault:
-         */
-        if (unlikely(in_atomic() || !mm)) {
-                bad_area_nosemaphore(regs, error_code, address);
-                return;
-        }
-
-retry:
-        down_read(&mm->mmap_sem);
-
-        vma = find_vma(mm, address);
-        if (unlikely(!vma)) {
-                bad_area(regs, error_code, address);
-                return;
-        }
-        if (likely(vma->vm_start <= address))
-                goto good_area;
-        if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) {
-                bad_area(regs, error_code, address);
-                return;
-        }
-        if (unlikely(expand_stack(vma, address))) {
-                bad_area(regs, error_code, address);
-                return;
-        }
-
-        /*
-         * Ok, we have a good vm_area for this memory access, so
-         * we can handle it..
-         */
-good_area:
-        if (unlikely(access_error(error_code, vma))) {
-                bad_area_access_error(regs, error_code, address);
-                return;
-        }
-
-        set_thread_fault_code(error_code);
-
-        /*
-         * If for any reason at all we couldn't handle the fault,
-         * make sure we exit gracefully rather than endlessly redo
-         * the fault.
-         */
-        fault = handle_mm_fault(mm, vma, address, flags);
-
-        if (unlikely(fault & (VM_FAULT_RETRY | VM_FAULT_ERROR)))
-                if (mm_fault_error(regs, error_code, address, fault))
-                        return;
-
-        if (flags & FAULT_FLAG_ALLOW_RETRY) {
-                if (fault & VM_FAULT_MAJOR) {
-                        tsk->maj_flt++;
-                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
-                                      regs, address);
-                } else {
-                        tsk->min_flt++;
-                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
-                                      regs, address);
-                }
-                if (fault & VM_FAULT_RETRY) {
-                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
-                        flags |= FAULT_FLAG_TRIED;
-
-                        /*
-                         * No need to up_read(&mm->mmap_sem) as we would
-                         * have already released it in __lock_page_or_retry
-                         * in mm/filemap.c.
-                         */
-                        goto retry;
-                }
-        }
-
-        up_read(&mm->mmap_sem);
-}
diff --git a/arch/sh/mm/flush-sh4.c b/arch/sh/mm/flush-sh4.c
index 0b85dd9dd3a..cef402678f4 100644
--- a/arch/sh/mm/flush-sh4.c
+++ b/arch/sh/mm/flush-sh4.c
@@ -1,8 +1,6 @@
 #include <linux/mm.h>
 #include <asm/mmu_context.h>
-#include <asm/cache_insns.h>
 #include <asm/cacheflush.h>
-#include <asm/traps.h>
 
 /*
  * Write back the dirty D-caches, but not invalidate them.
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 82cc576fab1..58a93fb3d96 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -18,7 +18,6 @@
 #include <linux/io.h>
 #include <linux/memblock.h>
 #include <linux/dma-mapping.h>
-#include <linux/export.h>
 #include <asm/mmu_context.h>
 #include <asm/mmzone.h>
 #include <asm/kexec.h>
@@ -288,8 +287,6 @@ static void __init do_init_bootmem(void)
 static void __init early_reserve_mem(void)
 {
         unsigned long start_pfn;
-        u32 zero_base = (u32)__MEMORY_START + (u32)PHYSICAL_OFFSET;
-        u32 start = zero_base + (u32)CONFIG_ZERO_PAGE_OFFSET;
 
         /*
          * Partially used pages are not usable - thus
@@ -303,13 +300,15 @@ static void __init early_reserve_mem(void)
          * this catches the (definitely buggy) case of us accidentally
          * initializing the bootmem allocator with an invalid RAM area.
          */
-        memblock_reserve(start, (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) - start);
+        memblock_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
+                    (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) -
+                    (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
 
         /*
          * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
          */
         if (CONFIG_ZERO_PAGE_OFFSET != 0)
-                memblock_reserve(zero_base, CONFIG_ZERO_PAGE_OFFSET);
+                memblock_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
 
         /*
          * Handle additional early reservations
@@ -324,6 +323,7 @@ void __init paging_init(void)
         unsigned long vaddr, end;
         int nid;
 
+        memblock_init();
         sh_mv.mv_mem_init();
 
         early_reserve_mem();
@@ -336,7 +336,7 @@ void __init paging_init(void)
                 sh_mv.mv_mem_reserve();
 
         memblock_enforce_memory_limit(memory_limit);
-        memblock_allow_resize();
+        memblock_analyze();
 
         memblock_dump_all();
 
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index 6777177807c..afeb710ec5c 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -30,13 +30,25 @@ static inline unsigned long COLOUR_ALIGN(unsigned long addr,
         return base + off;
 }
 
+static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
+                                              unsigned long pgoff)
+{
+        unsigned long base = addr & ~shm_align_mask;
+        unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
+
+        if (base + off <= addr)
+                return base + off;
+
+        return base - off;
+}
+
 unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
         unsigned long len, unsigned long pgoff, unsigned long flags)
 {
         struct mm_struct *mm = current->mm;
         struct vm_area_struct *vma;
+        unsigned long start_addr;
         int do_colour_align;
-        struct vm_unmapped_area_info info;
 
         if (flags & MAP_FIXED) {
                 /* We do not accept a shared mapping if it would violate
@@ -67,13 +79,47 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
                         return addr;
         }
 
-        info.flags = 0;
-        info.length = len;
-        info.low_limit = TASK_UNMAPPED_BASE;
-        info.high_limit = TASK_SIZE;
-        info.align_mask = do_colour_align ? (PAGE_MASK & shm_align_mask) : 0;
-        info.align_offset = pgoff << PAGE_SHIFT;
-        return vm_unmapped_area(&info);
+        if (len > mm->cached_hole_size) {
+                start_addr = addr = mm->free_area_cache;
+        } else {
+                mm->cached_hole_size = 0;
+                start_addr = addr = TASK_UNMAPPED_BASE;
+        }
+
+full_search:
+        if (do_colour_align)
+                addr = COLOUR_ALIGN(addr, pgoff);
+        else
+                addr = PAGE_ALIGN(mm->free_area_cache);
+
+        for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
+                /* At this point:  (!vma || addr < vma->vm_end). */
+                if (unlikely(TASK_SIZE - len < addr)) {
+                        /*
+                         * Start a new search - just in case we missed
+                         * some holes.
+                         */
+                        if (start_addr != TASK_UNMAPPED_BASE) {
+                                start_addr = addr = TASK_UNMAPPED_BASE;
+                                mm->cached_hole_size = 0;
+                                goto full_search;
+                        }
+                        return -ENOMEM;
+                }
+                if (likely(!vma || addr + len <= vma->vm_start)) {
+                        /*
+                         * Remember the place where we stopped the search:
+                         */
+                        mm->free_area_cache = addr + len;
+                        return addr;
+                }
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+
+                addr = vma->vm_end;
+                if (do_colour_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+        }
 }
 
 unsigned long
@@ -85,7 +131,6 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
         struct mm_struct *mm = current->mm;
         unsigned long addr = addr0;
         int do_colour_align;
-        struct vm_unmapped_area_info info;
 
         if (flags & MAP_FIXED) {
                 /* We do not accept a shared mapping if it would violate
@@ -117,27 +162,73 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
                         return addr;
         }
 
-        info.flags = VM_UNMAPPED_AREA_TOPDOWN;
-        info.length = len;
-        info.low_limit = PAGE_SIZE;
-        info.high_limit = mm->mmap_base;
-        info.align_mask = do_colour_align ? (PAGE_MASK & shm_align_mask) : 0;
-        info.align_offset = pgoff << PAGE_SHIFT;
-        addr = vm_unmapped_area(&info);
+        /* check if free_area_cache is useful for us */
+        if (len <= mm->cached_hole_size) {
+                mm->cached_hole_size = 0;
+                mm->free_area_cache = mm->mmap_base;
+        }
+
+        /* either no address requested or can't fit in requested address hole */
+        addr = mm->free_area_cache;
+        if (do_colour_align) {
+                unsigned long base = COLOUR_ALIGN_DOWN(addr-len, pgoff);
 
+                addr = base + len;
+        }
+
+        /* make sure it can fit in the remaining address space */
+        if (likely(addr > len)) {
+                vma = find_vma(mm, addr-len);
+                if (!vma || addr <= vma->vm_start) {
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr-len);
+                }
+        }
+
+        if (unlikely(mm->mmap_base < len))
+                goto bottomup;
+
+        addr = mm->mmap_base-len;
+        if (do_colour_align)
+                addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+
+        do {
+                /*
+                 * Lookup failure means no vma is above this address,
+                 * else if new region fits below vma->vm_start,
+                 * return with success:
+                 */
+                vma = find_vma(mm, addr);
+                if (likely(!vma || addr+len <= vma->vm_start)) {
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr);
+                }
+
+                /* remember the largest hole we saw so far */
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+
+                /* try just below the current vma->vm_start */
+                addr = vma->vm_start-len;
+                if (do_colour_align)
+                        addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+        } while (likely(len < vma->vm_start));
+
+bottomup:
         /*
          * A failed mmap() very likely causes application failure,
          * so fall back to the bottom-up function here. This scenario
          * can happen with large stack limits and large mmap()
          * allocations.
          */
-        if (addr & ~PAGE_MASK) {
-                VM_BUG_ON(addr != -ENOMEM);
-                info.flags = 0;
-                info.low_limit = TASK_UNMAPPED_BASE;
-                info.high_limit = TASK_SIZE;
-                addr = vm_unmapped_area(&info);
-        }
+        mm->cached_hole_size = ~0UL;
+        mm->free_area_cache = TASK_UNMAPPED_BASE;
+        addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
+        /*
+         * Restore the topdown base:
+         */
+        mm->free_area_cache = mm->mmap_base;
+        mm->cached_hole_size = ~0UL;
 
         return addr;
 }
@@ -147,7 +238,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
  * You really shouldn't be using read() or write() on /dev/mem.  This
  * might go away in the future.
  */
-int valid_phys_addr_range(phys_addr_t addr, size_t count)
+int valid_phys_addr_range(unsigned long addr, size_t count)
 {
         if (addr < __MEMORY_START)
                 return 0;
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 7160c9fd6fe..fad52f1f681 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -25,6 +25,7 @@
 #include <linux/vmalloc.h>
 #include <asm/cacheflush.h>
 #include <asm/sizes.h>
+#include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
diff --git a/arch/sh/mm/sram.c b/arch/sh/mm/sram.c
index 2d8fa718d55..bc156ec4545 100644
--- a/arch/sh/mm/sram.c
+++ b/arch/sh/mm/sram.c
@@ -9,7 +9,6 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
-#include <linux/errno.h>
 #include <asm/sram.h>
 
 /*
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 4db21adfe5d..b71db6af806 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -12,6 +12,7 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/io.h>
+#include <asm/system.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 6554fb439f0..7a940dbfc2e 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -20,6 +20,7 @@
 #include <linux/smp.h>
 #include <linux/interrupt.h>
 
+#include <asm/system.h>
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/pgalloc.h>
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index d42dd7e443d..cfdf7930d29 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/io.h>
+#include <asm/system.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index ff1c40a31cb..f27dbe1c159 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -17,7 +17,7 @@
 /**
  * sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
  */
-int __cpuinit sh64_tlb_init(void)
+int __init sh64_tlb_init(void)
 {
         /* Assign some sane DTLB defaults */
         cpu_data->dtlb.entries  = 64;
@@ -182,43 +182,3 @@ void tlb_unwire_entry(void)
 
         local_irq_restore(flags);
 }
-
-void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
-{
-        unsigned long long ptel;
-        unsigned long long pteh=0;
-        struct tlb_info *tlbp;
-        unsigned long long next;
-        unsigned int fault_code = get_thread_fault_code();
-
-        /* Get PTEL first */
-        ptel = pte.pte_low;
-
-        /*
-         * Set PTEH register
-         */
-        pteh = neff_sign_extend(address & MMU_VPN_MASK);
-
-        /* Set the ASID. */
-        pteh |= get_asid() << PTEH_ASID_SHIFT;
-        pteh |= PTEH_VALID;
-
-        /* Set PTEL register, set_pte has performed the sign extension */
-        ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
-
-        if (fault_code & FAULT_CODE_ITLB)
-                tlbp = &cpu_data->itlb;
-        else
-                tlbp = &cpu_data->dtlb;
-
-        next = tlbp->next;
-        __flush_tlb_slot(next);
-        asm volatile ("putcfg %0,1,%2\n\n\t"
-                      "putcfg %0,0,%1\n"
-                      :  : "r" (next), "r" (pteh), "r" (ptel) );
-
-        next += TLB_STEP;
-        if (next > tlbp->last)
-                next = tlbp->first;
-        tlbp->next = next;
-}
diff --git a/arch/sh/mm/tlbex_32.c b/arch/sh/mm/tlbex_32.c
deleted file mode 100644
index 382262dc0c4..00000000000
--- a/arch/sh/mm/tlbex_32.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * TLB miss handler for SH with an MMU.
- *
- *  Copyright (C) 1999  Niibe Yutaka
- *  Copyright (C) 2003 - 2012  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/kprobes.h>
-#include <linux/kdebug.h>
-#include <asm/mmu_context.h>
-#include <asm/thread_info.h>
-
-/*
- * Called with interrupts disabled.
- */
-asmlinkage int __kprobes
-handle_tlbmiss(struct pt_regs *regs, unsigned long error_code,
-               unsigned long address)
-{
-        pgd_t *pgd;
-        pud_t *pud;
-        pmd_t *pmd;
-        pte_t *pte;
-        pte_t entry;
-
-        /*
-         * We don't take page faults for P1, P2, and parts of P4, these
-         * are always mapped, whether it be due to legacy behaviour in
-         * 29-bit mode, or due to PMB configuration in 32-bit mode.
-         */
-        if (address >= P3SEG && address < P3_ADDR_MAX) {
-                pgd = pgd_offset_k(address);
-        } else {
-                if (unlikely(address >= TASK_SIZE || !current->mm))
-                        return 1;
-
-                pgd = pgd_offset(current->mm, address);
-        }
-
-        pud = pud_offset(pgd, address);
-        if (pud_none_or_clear_bad(pud))
-                return 1;
-        pmd = pmd_offset(pud, address);
-        if (pmd_none_or_clear_bad(pmd))
-                return 1;
-        pte = pte_offset_kernel(pmd, address);
-        entry = *pte;
-        if (unlikely(pte_none(entry) || pte_not_present(entry)))
-                return 1;
-        if (unlikely(error_code && !pte_write(entry)))
-                return 1;
-
-        if (error_code)
-                entry = pte_mkdirty(entry);
-        entry = pte_mkyoung(entry);
-
-        set_pte(pte, entry);
-
-#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP)
-        /*
-         * SH-4 does not set MMUCR.RC to the corresponding TLB entry in
-         * the case of an initial page write exception, so we need to
-         * flush it in order to avoid potential TLB entry duplication.
-         */
-        if (error_code == FAULT_CODE_INITIAL)
-                local_flush_tlb_one(get_asid(), address & PAGE_MASK);
-#endif
-
-        set_thread_fault_code(error_code);
-        update_mmu_cache(NULL, address, pte);
-
-        return 0;
-}
diff --git a/arch/sh/mm/tlbex_64.c b/arch/sh/mm/tlbex_64.c
deleted file mode 100644
index 8557548fc53..00000000000
--- a/arch/sh/mm/tlbex_64.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * The SH64 TLB miss.
- *
- * Original code from fault.c
- * Copyright (C) 2000, 2001  Paolo Alberelli
- *
- * Fast PTE->TLB refill path
- * Copyright (C) 2003 Richard.Curnow@superh.com
- *
- * IMPORTANT NOTES :
- * The do_fast_page_fault function is called from a context in entry.S
- * where very few registers have been saved.  In particular, the code in
- * this file must be compiled not to use ANY caller-save registers that
- * are not part of the restricted save set.  Also, it means that code in
- * this file must not make calls to functions elsewhere in the kernel, or
- * else the excepting context will see corruption in its caller-save
- * registers.  Plus, the entry.S save area is non-reentrant, so this code
- * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic
- * on any exception.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/kprobes.h>
-#include <asm/tlb.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-
-static int handle_tlbmiss(unsigned long long protection_flags,
-                          unsigned long address)
-{
-        pgd_t *pgd;
-        pud_t *pud;
-        pmd_t *pmd;
-        pte_t *pte;
-        pte_t entry;
-
-        if (is_vmalloc_addr((void *)address)) {
-                pgd = pgd_offset_k(address);
-        } else {
-                if (unlikely(address >= TASK_SIZE || !current->mm))
-                        return 1;
-
-                pgd = pgd_offset(current->mm, address);
-        }
-
-        pud = pud_offset(pgd, address);
-        if (pud_none(*pud) || !pud_present(*pud))
-                return 1;
-
-        pmd = pmd_offset(pud, address);
-        if (pmd_none(*pmd) || !pmd_present(*pmd))
-                return 1;
-
-        pte = pte_offset_kernel(pmd, address);
-        entry = *pte;
-        if (pte_none(entry) || !pte_present(entry))
-                return 1;
-
-        /*
-         * If the page doesn't have sufficient protection bits set to
-         * service the kind of fault being handled, there's not much
-         * point doing the TLB refill.  Punt the fault to the general
-         * handler.
-         */
-        if ((pte_val(entry) & protection_flags) != protection_flags)
-                return 1;
-
-        update_mmu_cache(NULL, address, pte);
-
-        return 0;
-}
-
-/*
- * Put all this information into one structure so that everything is just
- * arithmetic relative to a single base address.  This reduces the number
- * of movi/shori pairs needed just to load addresses of static data.
- */
-struct expevt_lookup {
-        unsigned short protection_flags[8];
-        unsigned char  is_text_access[8];
-        unsigned char  is_write_access[8];
-};
-
-#define PRU (1<<9)
-#define PRW (1<<8)
-#define PRX (1<<7)
-#define PRR (1<<6)
-
-/* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether
-   the fault happened in user mode or privileged mode. */
-static struct expevt_lookup expevt_lookup_table = {
-        .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW},
-        .is_text_access   = {1,   1,   0, 0, 0,   0,   0,   0}
-};
-
-static inline unsigned int
-expevt_to_fault_code(unsigned long expevt)
-{
-        if (expevt == 0xa40)
-                return FAULT_CODE_ITLB;
-        else if (expevt == 0x060)
-                return FAULT_CODE_WRITE;
-
-        return 0;
-}
-
-/*
-   This routine handles page faults that can be serviced just by refilling a
-   TLB entry from an existing page table entry.  (This case represents a very
-   large majority of page faults.) Return 1 if the fault was successfully
-   handled.  Return 0 if the fault could not be handled.  (This leads into the
-   general fault handling in fault.c which deals with mapping file-backed
-   pages, stack growth, segmentation faults, swapping etc etc)
- */
-asmlinkage int __kprobes
-do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt,
-                   unsigned long address)
-{
-        unsigned long long protection_flags;
-        unsigned long long index;
-        unsigned long long expevt4;
-        unsigned int fault_code;
-
-        /* The next few lines implement a way of hashing EXPEVT into a
-         * small array index which can be used to lookup parameters
-         * specific to the type of TLBMISS being handled.
-         *
-         * Note:
-         *      ITLBMISS has EXPEVT==0xa40
-         *      RTLBMISS has EXPEVT==0x040
-         *      WTLBMISS has EXPEVT==0x060
-         */
-        expevt4 = (expevt >> 4);
-        /* TODO : xor ssr_md into this expression too. Then we can check
-         * that PRU is set when it needs to be. */
-        index = expevt4 ^ (expevt4 >> 5);
-        index &= 7;
-
-        fault_code = expevt_to_fault_code(expevt);
-
-        protection_flags = expevt_lookup_table.protection_flags[index];
-
-        if (expevt_lookup_table.is_text_access[index])
-                fault_code |= FAULT_CODE_ITLB;
-        if (!ssr_md)
-                fault_code |= FAULT_CODE_USER;
-
-        set_thread_fault_code(fault_code);
-
-        return handle_tlbmiss(protection_flags, address);
-}
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c
index f33fdd2558e..e3430e093d4 100644
--- a/arch/sh/mm/tlbflush_64.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2000, 2001  Paolo Alberelli
  * Copyright (C) 2003  Richard Curnow (/proc/tlb, bug fixes)
- * Copyright (C) 2003 - 2012 Paul Mundt
+ * Copyright (C) 2003 - 2009 Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -22,12 +22,301 @@
 #include <linux/smp.h>
 #include <linux/perf_event.h>
 #include <linux/interrupt.h>
+#include <asm/system.h>
 #include <asm/io.h>
 #include <asm/tlb.h>
 #include <asm/uaccess.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 
+extern void die(const char *,struct pt_regs *,long);
+
+#define PFLAG(val,flag)   (( (val) & (flag) ) ? #flag : "" )
+#define PPROT(flag) PFLAG(pgprot_val(prot),flag)
+
+static inline void print_prots(pgprot_t prot)
+{
+        printk("prot is 0x%016llx\n",pgprot_val(prot));
+
+        printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ),
+               PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER));
+}
+
+static inline void print_vma(struct vm_area_struct *vma)
+{
+        printk("vma start 0x%08lx\n", vma->vm_start);
+        printk("vma end   0x%08lx\n", vma->vm_end);
+
+        print_prots(vma->vm_page_prot);
+        printk("vm_flags 0x%08lx\n", vma->vm_flags);
+}
+
+static inline void print_task(struct task_struct *tsk)
+{
+        printk("Task pid %d\n", task_pid_nr(tsk));
+}
+
+static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address)
+{
+        pgd_t *dir;
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+        pte_t entry;
+
+        dir = pgd_offset(mm, address);
+        if (pgd_none(*dir))
+                return NULL;
+
+        pud = pud_offset(dir, address);
+        if (pud_none(*pud))
+                return NULL;
+
+        pmd = pmd_offset(pud, address);
+        if (pmd_none(*pmd))
+                return NULL;
+
+        pte = pte_offset_kernel(pmd, address);
+        entry = *pte;
+        if (pte_none(entry) || !pte_present(entry))
+                return NULL;
+
+        return pte;
+}
+
+/*
+ * This routine handles page faults.  It determines the address,
+ * and the problem, and then passes it off to one of the appropriate
+ * routines.
+ */
+asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
+                              unsigned long textaccess, unsigned long address)
+{
+        struct task_struct *tsk;
+        struct mm_struct *mm;
+        struct vm_area_struct * vma;
+        const struct exception_table_entry *fixup;
+        pte_t *pte;
+        int fault;
+
+        /* SIM
+         * Note this is now called with interrupts still disabled
+         * This is to cope with being called for a missing IO port
+         * address with interrupts disabled. This should be fixed as
+         * soon as we have a better 'fast path' miss handler.
+         *
+         * Plus take care how you try and debug this stuff.
+         * For example, writing debug data to a port which you
+         * have just faulted on is not going to work.
+         */
+
+        tsk = current;
+        mm = tsk->mm;
+
+        /* Not an IO address, so reenable interrupts */
+        local_irq_enable();
+
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
+
+        /*
+         * If we're in an interrupt or have no user
+         * context, we must not take the fault..
+         */
+        if (in_atomic() || !mm)
+                goto no_context;
+
+        /* TLB misses upon some cache flushes get done under cli() */
+        down_read(&mm->mmap_sem);
+
+        vma = find_vma(mm, address);
+
+        if (!vma) {
+#ifdef DEBUG_FAULT
+                print_task(tsk);
+                printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n",
+                       __func__, __LINE__,
+                       address,regs->pc,textaccess,writeaccess);
+                show_regs(regs);
+#endif
+                goto bad_area;
+        }
+        if (vma->vm_start <= address) {
+                goto good_area;
+        }
+
+        if (!(vma->vm_flags & VM_GROWSDOWN)) {
+#ifdef DEBUG_FAULT
+                print_task(tsk);
+                printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n",
+                       __func__, __LINE__,
+                       address,regs->pc,textaccess,writeaccess);
+                show_regs(regs);
+
+                print_vma(vma);
+#endif
+                goto bad_area;
+        }
+        if (expand_stack(vma, address)) {
+#ifdef DEBUG_FAULT
+                print_task(tsk);
+                printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n",
+                       __func__, __LINE__,
+                       address,regs->pc,textaccess,writeaccess);
+                show_regs(regs);
+#endif
+                goto bad_area;
+        }
+/*
+ * Ok, we have a good vm_area for this memory access, so
+ * we can handle it..
+ */
+good_area:
+        if (textaccess) {
+                if (!(vma->vm_flags & VM_EXEC))
+                        goto bad_area;
+        } else {
+                if (writeaccess) {
+                        if (!(vma->vm_flags & VM_WRITE))
+                                goto bad_area;
+                } else {
+                        if (!(vma->vm_flags & VM_READ))
+                                goto bad_area;
+                }
+        }
+
+        /*
+         * If for any reason at all we couldn't handle the fault,
+         * make sure we exit gracefully rather than endlessly redo
+         * the fault.
+         */
+        fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0);
+        if (unlikely(fault & VM_FAULT_ERROR)) {
+                if (fault & VM_FAULT_OOM)
+                        goto out_of_memory;
+                else if (fault & VM_FAULT_SIGBUS)
+                        goto do_sigbus;
+                BUG();
+        }
+
+        if (fault & VM_FAULT_MAJOR) {
+                tsk->maj_flt++;
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
+                                     regs, address);
+        } else {
+                tsk->min_flt++;
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+                                     regs, address);
+        }
+
+        /* If we get here, the page fault has been handled.  Do the TLB refill
+           now from the newly-setup PTE, to avoid having to fault again right
+           away on the same instruction. */
+        pte = lookup_pte (mm, address);
+        if (!pte) {
+                /* From empirical evidence, we can get here, due to
+                   !pte_present(pte).  (e.g. if a swap-in occurs, and the page
+                   is swapped back out again before the process that wanted it
+                   gets rescheduled?) */
+                goto no_pte;
+        }
+
+        __do_tlb_refill(address, textaccess, pte);
+
+no_pte:
+
+        up_read(&mm->mmap_sem);
+        return;
+
+/*
+ * Something tried to access memory that isn't in our memory map..
+ * Fix it, but check if it's kernel or user first..
+ */
+bad_area:
+#ifdef DEBUG_FAULT
+        printk("fault:bad area\n");
+#endif
+        up_read(&mm->mmap_sem);
+
+        if (user_mode(regs)) {
+                static int count=0;
+                siginfo_t info;
+                if (count < 4) {
+                        /* This is really to help debug faults when starting
+                         * usermode, so only need a few */
+                        count++;
+                        printk("user mode bad_area address=%08lx pid=%d (%s) pc=%08lx\n",
+                                address, task_pid_nr(current), current->comm,
+                                (unsigned long) regs->pc);
+#if 0
+                        show_regs(regs);
+#endif
+                }
+                if (is_global_init(tsk)) {
+                        panic("INIT had user mode bad_area\n");
+                }
+                tsk->thread.address = address;
+                tsk->thread.error_code = writeaccess;
+                info.si_signo = SIGSEGV;
+                info.si_errno = 0;
+                info.si_addr = (void *) address;
+                force_sig_info(SIGSEGV, &info, tsk);
+                return;
+        }
+
+no_context:
+#ifdef DEBUG_FAULT
+        printk("fault:No context\n");
+#endif
+        /* Are we prepared to handle this kernel fault?  */
+        fixup = search_exception_tables(regs->pc);
+        if (fixup) {
+                regs->pc = fixup->fixup;
+                return;
+        }
+
+/*
+ * Oops. The kernel tried to access some bad page. We'll have to
+ * terminate things with extreme prejudice.
+ *
+ */
+        if (address < PAGE_SIZE)
+                printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
+        else
+                printk(KERN_ALERT "Unable to handle kernel paging request");
+        printk(" at virtual address %08lx\n", address);
+        printk(KERN_ALERT "pc = %08Lx%08Lx\n", regs->pc >> 32, regs->pc & 0xffffffff);
+        die("Oops", regs, writeaccess);
+        do_exit(SIGKILL);
+
+/*
+ * We ran out of memory, or some other thing happened to us that made
+ * us unable to handle the page fault gracefully.
+ */
+out_of_memory:
+        up_read(&mm->mmap_sem);
+        if (!user_mode(regs))
+                goto no_context;
+        pagefault_out_of_memory();
+        return;
+
+do_sigbus:
+        printk("fault:Do sigbus\n");
+        up_read(&mm->mmap_sem);
+
+        /*
+         * Send a sigbus, regardless of whether we were in kernel
+         * or user mode.
+         */
+        tsk->thread.address = address;
+        tsk->thread.error_code = writeaccess;
+        tsk->thread.trap_no = 14;
+        force_sig(SIGBUS, tsk);
+
+        /* Kernel mode? Handle exceptions or die */
+        if (!user_mode(regs))
+                goto no_context;
+}
+
 void local_flush_tlb_one(unsigned long asid, unsigned long page)
 {
         unsigned long long match, pteh=0, lpage;
@@ -170,3 +459,7 @@ void __flush_tlb_global(void)
 {
         flush_tlb_all();
 }
+
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
+{
+}
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 569977e52c9..6dd56c4d005 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -51,8 +51,6 @@ SDK7780			SH_SDK7780
 MIGOR                   SH_MIGOR
 RSK7201                 SH_RSK7201
 RSK7203                 SH_RSK7203
-RSK7264                 SH_RSK7264
-RSK7269                 SH_RSK7269
 AP325RXA                SH_AP325RXA
 SH2007                  SH_SH2007
 SH7757LCR               SH_SH7757LCR