diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-shx3.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-shx3.c | 31 |
1 files changed, 12 insertions, 19 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index 688f7ed1bab..bb208806dc1 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/sh_timer.h> | 16 | #include <linux/sh_timer.h> |
17 | #include <linux/sh_intc.h> | ||
18 | #include <cpu/shx3.h> | 17 | #include <cpu/shx3.h> |
19 | #include <asm/mmzone.h> | 18 | #include <asm/mmzone.h> |
20 | 19 | ||
@@ -33,10 +32,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
33 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 32 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
34 | .scbrr_algo_id = SCBRR_ALGO_2, | 33 | .scbrr_algo_id = SCBRR_ALGO_2, |
35 | .type = PORT_SCIF, | 34 | .type = PORT_SCIF, |
36 | .irqs = { evt2irq(0x700), | 35 | .irqs = { 40, 41, 43, 42 }, |
37 | evt2irq(0x720), | ||
38 | evt2irq(0x760), | ||
39 | evt2irq(0x740) }, | ||
40 | }; | 36 | }; |
41 | 37 | ||
42 | static struct platform_device scif0_device = { | 38 | static struct platform_device scif0_device = { |
@@ -53,10 +49,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
53 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 49 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
54 | .scbrr_algo_id = SCBRR_ALGO_2, | 50 | .scbrr_algo_id = SCBRR_ALGO_2, |
55 | .type = PORT_SCIF, | 51 | .type = PORT_SCIF, |
56 | .irqs = { evt2irq(0x780), | 52 | .irqs = { 44, 45, 47, 46 }, |
57 | evt2irq(0x7a0), | ||
58 | evt2irq(0x7e0), | ||
59 | evt2irq(0x7c0) }, | ||
60 | }; | 53 | }; |
61 | 54 | ||
62 | static struct platform_device scif1_device = { | 55 | static struct platform_device scif1_device = { |
@@ -73,10 +66,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
73 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 66 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
74 | .scbrr_algo_id = SCBRR_ALGO_2, | 67 | .scbrr_algo_id = SCBRR_ALGO_2, |
75 | .type = PORT_SCIF, | 68 | .type = PORT_SCIF, |
76 | .irqs = { evt2irq(0x880), | 69 | .irqs = { 52, 53, 55, 54 }, |
77 | evt2irq(0x8a0), | ||
78 | evt2irq(0x8e0), | ||
79 | evt2irq(0x8c0) }, | ||
80 | }; | 70 | }; |
81 | 71 | ||
82 | static struct platform_device scif2_device = { | 72 | static struct platform_device scif2_device = { |
@@ -100,7 +90,7 @@ static struct resource tmu0_resources[] = { | |||
100 | .flags = IORESOURCE_MEM, | 90 | .flags = IORESOURCE_MEM, |
101 | }, | 91 | }, |
102 | [1] = { | 92 | [1] = { |
103 | .start = evt2irq(0x400), | 93 | .start = 16, |
104 | .flags = IORESOURCE_IRQ, | 94 | .flags = IORESOURCE_IRQ, |
105 | }, | 95 | }, |
106 | }; | 96 | }; |
@@ -128,7 +118,7 @@ static struct resource tmu1_resources[] = { | |||
128 | .flags = IORESOURCE_MEM, | 118 | .flags = IORESOURCE_MEM, |
129 | }, | 119 | }, |
130 | [1] = { | 120 | [1] = { |
131 | .start = evt2irq(0x420), | 121 | .start = 17, |
132 | .flags = IORESOURCE_IRQ, | 122 | .flags = IORESOURCE_IRQ, |
133 | }, | 123 | }, |
134 | }; | 124 | }; |
@@ -155,7 +145,7 @@ static struct resource tmu2_resources[] = { | |||
155 | .flags = IORESOURCE_MEM, | 145 | .flags = IORESOURCE_MEM, |
156 | }, | 146 | }, |
157 | [1] = { | 147 | [1] = { |
158 | .start = evt2irq(0x440), | 148 | .start = 18, |
159 | .flags = IORESOURCE_IRQ, | 149 | .flags = IORESOURCE_IRQ, |
160 | }, | 150 | }, |
161 | }; | 151 | }; |
@@ -182,7 +172,7 @@ static struct resource tmu3_resources[] = { | |||
182 | .flags = IORESOURCE_MEM, | 172 | .flags = IORESOURCE_MEM, |
183 | }, | 173 | }, |
184 | [1] = { | 174 | [1] = { |
185 | .start = evt2irq(0x460), | 175 | .start = 19, |
186 | .flags = IORESOURCE_IRQ, | 176 | .flags = IORESOURCE_IRQ, |
187 | }, | 177 | }, |
188 | }; | 178 | }; |
@@ -209,7 +199,7 @@ static struct resource tmu4_resources[] = { | |||
209 | .flags = IORESOURCE_MEM, | 199 | .flags = IORESOURCE_MEM, |
210 | }, | 200 | }, |
211 | [1] = { | 201 | [1] = { |
212 | .start = evt2irq(0x480), | 202 | .start = 20, |
213 | .flags = IORESOURCE_IRQ, | 203 | .flags = IORESOURCE_IRQ, |
214 | }, | 204 | }, |
215 | }; | 205 | }; |
@@ -236,7 +226,7 @@ static struct resource tmu5_resources[] = { | |||
236 | .flags = IORESOURCE_MEM, | 226 | .flags = IORESOURCE_MEM, |
237 | }, | 227 | }, |
238 | [1] = { | 228 | [1] = { |
239 | .start = evt2irq(0x4a0), | 229 | .start = 21, |
240 | .flags = IORESOURCE_IRQ, | 230 | .flags = IORESOURCE_IRQ, |
241 | }, | 231 | }, |
242 | }; | 232 | }; |
@@ -494,6 +484,9 @@ void __init plat_irq_setup_pins(int mode) | |||
494 | 484 | ||
495 | void __init plat_irq_setup(void) | 485 | void __init plat_irq_setup(void) |
496 | { | 486 | { |
487 | reserve_intc_vectors(vectors_irq, ARRAY_SIZE(vectors_irq)); | ||
488 | reserve_intc_vectors(vectors_irl, ARRAY_SIZE(vectors_irl)); | ||
489 | |||
497 | register_intc_controller(&intc_desc); | 490 | register_intc_controller(&intc_desc); |
498 | } | 491 | } |
499 | 492 | ||