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diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
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@@ -0,0 +1,325 @@
1/*
2 * P2041/P2040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&rio {
124 compatible = "fsl,srio";
125 interrupts = <16 2 1 11>;
126 #address-cells = <2>;
127 #size-cells = <2>;
128 ranges;
129
130 port1 {
131 #address-cells = <2>;
132 #size-cells = <2>;
133 cell-index = <1>;
134 };
135
136 port2 {
137 #address-cells = <2>;
138 #size-cells = <2>;
139 cell-index = <2>;
140 };
141};
142
143&dcsr {
144 #address-cells = <1>;
145 #size-cells = <1>;
146 compatible = "fsl,dcsr", "simple-bus";
147
148 dcsr-epu@0 {
149 compatible = "fsl,dcsr-epu";
150 interrupts = <52 2 0 0
151 84 2 0 0
152 85 2 0 0>;
153 reg = <0x0 0x1000>;
154 };
155 dcsr-npc {
156 compatible = "fsl,dcsr-npc";
157 reg = <0x1000 0x1000 0x1000000 0x8000>;
158 };
159 dcsr-nxc@2000 {
160 compatible = "fsl,dcsr-nxc";
161 reg = <0x2000 0x1000>;
162 };
163 dcsr-corenet {
164 compatible = "fsl,dcsr-corenet";
165 reg = <0x8000 0x1000 0xB0000 0x1000>;
166 };
167 dcsr-dpaa@9000 {
168 compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
169 reg = <0x9000 0x1000>;
170 };
171 dcsr-ocn@11000 {
172 compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
173 reg = <0x11000 0x1000>;
174 };
175 dcsr-ddr@12000 {
176 compatible = "fsl,dcsr-ddr";
177 dev-handle = <&ddr1>;
178 reg = <0x12000 0x1000>;
179 };
180 dcsr-nal@18000 {
181 compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
182 reg = <0x18000 0x1000>;
183 };
184 dcsr-rcpm@22000 {
185 compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
186 reg = <0x22000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@40000 {
189 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu0>;
191 reg = <0x40000 0x1000>;
192 };
193 dcsr-cpu-sb-proxy@41000 {
194 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
195 cpu-handle = <&cpu1>;
196 reg = <0x41000 0x1000>;
197 };
198 dcsr-cpu-sb-proxy@42000 {
199 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200 cpu-handle = <&cpu2>;
201 reg = <0x42000 0x1000>;
202 };
203 dcsr-cpu-sb-proxy@43000 {
204 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
205 cpu-handle = <&cpu3>;
206 reg = <0x43000 0x1000>;
207 };
208};
209
210&soc {
211 #address-cells = <1>;
212 #size-cells = <1>;
213 device_type = "soc";
214 compatible = "simple-bus";
215
216 soc-sram-error {
217 compatible = "fsl,soc-sram-error";
218 interrupts = <16 2 1 29>;
219 };
220
221 corenet-law@0 {
222 compatible = "fsl,corenet-law";
223 reg = <0x0 0x1000>;
224 fsl,num-laws = <32>;
225 };
226
227 ddr1: memory-controller@8000 {
228 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
229 reg = <0x8000 0x1000>;
230 interrupts = <16 2 1 23>;
231 };
232
233 cpc: l3-cache-controller@10000 {
234 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
235 reg = <0x10000 0x1000>;
236 interrupts = <16 2 1 27>;
237 };
238
239 corenet-cf@18000 {
240 compatible = "fsl,corenet-cf";
241 reg = <0x18000 0x1000>;
242 interrupts = <16 2 1 31>;
243 fsl,ccf-num-csdids = <32>;
244 fsl,ccf-num-snoopids = <32>;
245 };
246
247 iommu@20000 {
248 compatible = "fsl,pamu-v1.0", "fsl,pamu";
249 reg = <0x20000 0x4000>;
250 interrupts = <
251 24 2 0 0
252 16 2 1 30>;
253 };
254
255/include/ "qoriq-mpic.dtsi"
256
257 guts: global-utilities@e0000 {
258 compatible = "fsl,qoriq-device-config-1.0";
259 reg = <0xe0000 0xe00>;
260 fsl,has-rstcr;
261 #sleep-cells = <1>;
262 fsl,liodn-bits = <12>;
263 };
264
265 pins: global-utilities@e0e00 {
266 compatible = "fsl,qoriq-pin-control-1.0";
267 reg = <0xe0e00 0x200>;
268 #sleep-cells = <2>;
269 };
270
271 clockgen: global-utilities@e1000 {
272 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
273 reg = <0xe1000 0x1000>;
274 clock-frequency = <0>;
275 };
276
277 rcpm: global-utilities@e2000 {
278 compatible = "fsl,qoriq-rcpm-1.0";
279 reg = <0xe2000 0x1000>;
280 #sleep-cells = <1>;
281 };
282
283 sfp: sfp@e8000 {
284 compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
285 reg = <0xe8000 0x1000>;
286 };
287
288 serdes: serdes@ea000 {
289 compatible = "fsl,p2041-serdes";
290 reg = <0xea000 0x1000>;
291 };
292
293/include/ "qoriq-dma-0.dtsi"
294/include/ "qoriq-dma-1.dtsi"
295/include/ "qoriq-espi-0.dtsi"
296 spi@110000 {
297 fsl,espi-num-chipselects = <4>;
298 };
299
300/include/ "qoriq-esdhc-0.dtsi"
301 sdhc@114000 {
302 sdhci,auto-cmd12;
303 };
304
305/include/ "qoriq-i2c-0.dtsi"
306/include/ "qoriq-i2c-1.dtsi"
307/include/ "qoriq-duart-0.dtsi"
308/include/ "qoriq-duart-1.dtsi"
309/include/ "qoriq-gpio-0.dtsi"
310/include/ "qoriq-usb2-mph-0.dtsi"
311 usb0: usb@210000 {
312 phy_type = "utmi";
313 port0;
314 };
315
316/include/ "qoriq-usb2-dr-0.dtsi"
317 usb1: usb@211000 {
318 dr_mode = "host";
319 phy_type = "utmi";
320 };
321
322/include/ "qoriq-sata2-0.dtsi"
323/include/ "qoriq-sata2-1.dtsi"
324/include/ "qoriq-sec4.2-0.dtsi"
325};
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 15:18:25 -0400