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diff --git a/arch/arm/mach-tegra/p852/board-p852.h b/arch/arm/mach-tegra/p852/board-p852.h
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1/*
2 * arch/arm/mach-tegra/board-p852.h
3 *
4 * Copyright (c) 2010-2011, NVIDIA Corporation.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef _MACH_TEGRA_BOARD_P852M_H
18#define _MACH_TEGRA_BOARD_P852M_H
19
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/serial_8250.h>
24#include <linux/clk.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/partitions.h>
27#include <linux/dma-mapping.h>
28#include <linux/io.h>
29#include <linux/delay.h>
30#include <linux/i2c.h>
31#include <linux/spi/spi.h>
32#include <linux/i2c-tegra.h>
33#include <linux/platform_data/tegra_usb.h>
34#include <linux/platform_data/tegra_nor.h>
35#include <linux/gpio.h>
36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/time.h>
40#include <asm/setup.h>
41#include <asm/mach-types.h>
42#include <asm/mach/flash.h>
43
44#include <mach/sdhci.h>
45#include <mach/iomap.h>
46#include <mach/irqs.h>
47#include <mach/nand.h>
48#include <mach/usb_phy.h>
49#include <mach/clk.h>
50#include <mach/i2s.h>
51#include <mach/audio.h>
52
53#include "../clock.h"
54#include "../board.h"
55#include "../pm.h"
56#include "../devices.h"
57#include "../gpio-names.h"
58#include "../wakeups-t2.h"
59
60
61#define P852_SKU3 0x030000UL
62#define P852_SKU13 0x130000UL
63#define P852_SKU13_B00 0x130200UL
64#define P852_SKU13_C01 0x130401UL
65#define P852_SKU23 0x230000UL
66#define P852_SKU23_B00 0x230200UL
67#define P852_SKU23_C01 0x230401UL
68#define P852_SKU1 0x010000UL
69#define P852_SKU1_B00 0x010200UL
70#define P852_SKU1_C0X 0x010400UL
71#define P852_SKU11 0x110000UL
72#define P852_SKU5_B00 0x040200UL
73#define P852_SKU5_C01 0x050401UL
74#define P852_SKU8_B00 0x080200UL
75#define P852_SKU8_C01 0x080401UL
76#define P852_SKU9_B00 0x090200UL
77#define P852_SKU9_C01 0x090401UL
78
79int p852_regulator_init(void);
80int p852_panel_init(void);
81void p852_sdhci_init(void);
82void p852_i2c_init(void);
83void p852_i2c_set_default_clock(int adapter, unsigned long clock);
84void p852_pinmux_init(void);
85void p852_gpio_init(void);
86
87void p852_sku1_init(void);
88void p852_sku1_b00_init(void);
89void p852_sku1_c0x_init(void);
90void p852_sku3_init(void);
91void p852_sku5_b00_init(void);
92void p852_sku5_c01_init(void);
93void p852_sku8_b00_init(void);
94void p852_sku8_c00_init(void);
95void p852_sku9_b00_init(void);
96void p852_sku9_c00_init(void);
97void p852_sku13_init(void);
98void p852_sku13_b00_init(void);
99void p852_sku23_init(void);
100void p852_sku23_b00_init(void);
101void p852_sku23_c01_init(void);
102
103#ifndef CONFIG_P852_SKU1
104void p852_sku1_init(void);
105#endif
106#ifndef CONFIG_P852_SKU1_B00
107void p852_sku1_b00_init(void);
108#endif
109#ifndef CONFIG_P852_SKU1_C0x
110void p852_sku1_c0x_init(void);
111#endif
112#ifndef CONFIG_P852_SKU3
113void p852_sku3_init(void);
114#endif
115#ifndef CONFIG_P852_SKU5_B00
116void p852_sku5_b00_init(void){};
117#endif
118#ifndef CONFIG_P852_SKU5_C01
119void p852_sku5_c01_init(void){};
120#endif
121#ifndef CONFIG_P852_SKU8_B00
122void p852_sku8_b00_init(void){};
123#endif
124#ifndef CONFIG_P852_SKU8_C01
125void p852_sku8_c00_init(void){};
126#endif
127#ifndef CONFIG_P852_SKU9_B00
128void p852_sku9_b00_init(void){};
129#endif
130#ifndef CONFIG_P852_SKU9_C01
131void p852_sku9_c00_init(void){};
132#endif
133#ifndef CONFIG_P852_SKU13
134void p852_sku13_init(void){};
135#endif
136#ifndef CONFIG_P852_SKU13_B00
137void p852_sku13_b00_init(void){};
138#endif
139#ifndef CONFIG_P852_SKU23
140void p852_sku23_init(void){};
141#endif
142#ifndef CONFIG_P852_SKU23_B00
143void p852_sku23_b00_init(void){};
144#endif
145#ifndef CONFIG_P852_SKU23_C01
146void p852_sku23_c01_init(void){};
147#endif
148
149extern unsigned int system_rev;
150extern unsigned int p852_sku_peripherals;
151extern unsigned int p852_spi_peripherals;
152extern unsigned int p852_i2s_peripherals;
153extern unsigned int p852_uart_peripherals;
154extern unsigned int p852_sdhci_peripherals;
155extern unsigned int p852_display_peripherals;
156extern unsigned int p852_i2c_peripherals;
157extern struct tegra_sdhci_platform_data p852_sdhci_platform_data[];
158extern struct platform_device tegra_8250_uarta_device;
159extern struct platform_device tegra_8250_uartb_device;
160extern struct platform_device tegra_8250_uartc_device;
161extern struct platform_device tegra_8250_uartd_device;
162extern struct platform_device tegra_8250_uarte_device;
163
164#ifdef CONFIG_TEGRA_SPI_I2S
165extern void p852_spi_i2s_init(void);
166extern struct spi_board_info tegra_spi_i2s_device;
167#endif
168
169void tegra_p852_fixup(struct machine_desc *desc,
170 struct tag *tags, char **cmdline, struct meminfo *mi);
171
172void p852_common_init(void);
173
174#define P852_SDIO3_PINMUX_ENABLE 0x01
175
176#define P852_SKU_SPI_SHIFT 0x00
177#define P852_SKU_SPI_ENABLE (1 << P852_SKU_SPI_SHIFT)
178#define P852_SKU_SPI_MASK (1 << P852_SKU_SPI_SHIFT)
179
180#define P852_SKU_I2S_SHIFT 0x01
181#define P852_SKU_I2S_ENABLE (1 << P852_SKU_I2S_SHIFT)
182#define P852_SKU_I2S_MASK (1 << P852_SKU_I2S_SHIFT)
183
184#define P852_SKU_SDHCI_SHIFT 0x02
185#define P852_SKU_SDHCI_ENABLE (1 << P852_SKU_SDHCI_SHIFT)
186#define P852_SKU_SDHCI_MASK (1 << P852_SKU_SDHCI_SHIFT)
187
188#define P852_SKU_UART_SHIFT 0x03
189#define P852_SKU_UART_ENABLE (1 << P852_SKU_UART_SHIFT)
190#define P852_SKU_UART_MASK (1 << P852_SKU_UART_SHIFT)
191
192#define P852_SKU_NAND_SHIFT 0x04
193#define P852_SKU_NAND_ENABLE (1 << P852_SKU_NAND_SHIFT)
194#define P852_SKU_NAND_MASK (1 << P852_SKU_NAND_SHIFT)
195
196#define P852_SKU_NOR_SHIFT 0x05
197#define P852_SKU_NOR_ENABLE (1 << P852_SKU_NOR_SHIFT)
198#define P852_SKU_NOR_MASK (1 << P852_SKU_NOR_SHIFT)
199
200#define P852_SKU_DISPLAY_SHIFT 0x06
201#define P852_SKU_DISPLAY_ENABLE (1 << P852_SKU_DISPLAY_SHIFT)
202#define P852_SKU_DISPLAY_MASK (1 << P852_SKU_DISPLAY_SHIFT)
203
204#define P852_SKU_ULPI_SHIFT 0x07
205#define P852_SKU_ULPI_DISABLE (1 << P852_SKU_ULPI_SHIFT)
206
207#define P852_SKU_I2C_SHIFT 0x08
208#define P852_SKU_I2C_ENABLE (1 << P852_SKU_I2C_SHIFT)
209#define P852_SKU_I2C_MASK (1 << P852_SKU_I2C_SHIFT)
210
211#define P852_MAX_DISP 0x2
212#define P852_DISP_SHIFT 0x16
213#define P852_DISPA_SHIFT 0x0
214#define P852_DISPB_SHIFT 0x16
215
216#define P852_DISP_MASK 0x1
217#define P852_DISP_ENABLE 0x1
218#define P852_DISPA_MASK (P852_DISP_MASK << P852_DISPA_SHIFT)
219#define P852_DISPB_MASK (P852_DISP_MASK << P852_DISPB_SHIFT)
220
221#define P852_MAX_SPI 0x04
222#define P852_SPI_SHIFT 0x03
223#define P852_SPI1_SHIFT 0x00
224#define P852_SPI2_SHIFT 0x03
225#define P852_SPI3_SHIFT 0x06
226#define P852_SPI4_SHIFT 0x09
227
228#define P852_SPI_MASK 0x07
229#define P852_SPI1_MASK (P852_SPI_MASK << P852_SPI1_SHIFT)
230#define P852_SPI2_MASK (P852_SPI_MASK << P852_SPI2_SHIFT)
231#define P852_SPI3_MASK (P852_SPI_MASK << P852_SPI3_SHIFT)
232#define P852_SPI4_MASK (P852_SPI_MASK << P852_SPI4_SHIFT)
233
234#define P852_SPI_ENABLE 0x01
235#define P852_SPI_MASTER 0x02
236#define P852_SPI_SLAVE 0x04
237
238#define P852_I2S_SHIFT 0x05
239#define P852_I2S1_SHIFT 0x00
240#define P852_I2S2_SHIFT 0x05
241
242#define P852_I2S_MASK 0x1F
243#define P852_I2S1_MASK (P852_I2S_MASK << P852_I2S1_SHIFT)
244#define P852_I2S2_MASK (P852_I2S_MASK << P852_I2S2_SHIFT)
245
246#define P852_I2S_ENABLE 0x10
247#define P852_I2S_TDM 0x08
248#define P852_MAX_SDHCI 0x04
249#define P852_SDHCI_SHIFT 0x04
250#define P852_SDHCI1_SHIFT 0x00
251#define P852_SDHCI2_SHIFT 0x04
252#define P852_SDHCI3_SHIFT 0x08
253#define P852_SDHCI4_SHIFT 0x0C
254
255#define P852_SDHCI_MASK 0x0F
256#define P852_SDHCI1_MASK (P852_SDHCI_MASK << P852_SDHCI1_SHIFT)
257#define P852_SDHCI2_MASK (P852_SDHCI_MASK << P852_SDHCI2_SHIFT)
258#define P852_SDHCI3_MASK (P852_SDHCI_MASK << P852_SDHCI3_SHIFT)
259#define P852_SDHCI4_MASK (P852_SDHCI_MASK << P852_SDHCI4_SHIFT)
260
261#define P852_SDHCI_ENABLE 0x01
262#define P852_SDHCI_CD_EN 0x02
263#define P852_SDHCI_WP_EN 0x04
264#define P852_SDHCI_PW_EN 0x08
265
266#define P852_UART_SHIFT 0x04
267#define P852_UARTA_SHIFT 0x00
268#define P852_UARTB_SHIFT 0x04
269#define P852_UARTC_SHIFT 0x08
270#define P852_UARTD_SHIFT 0x0C
271
272#define P852_UART_MASK 0x0F
273#define P852_UARTA_MASK (P852_UART_MASK << P852_UARTA_SHIFT)
274#define P852_UARTB_MASK (P852_UART_MASK << P852_UARTB_SHIFT)
275#define P852_UARTC_MASK (P852_UART_MASK << P852_UARTC_SHIFT)
276#define P852_UARTD_MASK (P852_UART_MASK << P852_UARTD_SHIFT)
277
278#define P852_MAX_UART 0x4
279#define P852_UART_ALT_PIN_CFG 0x8
280#define P852_UART_ENABLE 0x4
281#define P852_UART_DB 0x1
282#define P852_UART_HS 0x2
283
284#define P852_MAX_I2C 0x4
285#define P852_I2C_SHIFT 0x01
286#define P852_I2C1_SHIFT 0x00
287#define P852_I2C2_SHIFT 0x01
288#define P852_I2C3_SHIFT 0x02
289#define P852_I2C4_SHIFT 0x03
290
291
292#define P852_I2C_MASK 0x01
293#define P852_I2C1_MASK (P852_I2C_MASK << P852_I2C1_SHIFT)
294#define P852_I2C2_MASK (P852_I2C_MASK << P852_I2C2_SHIFT)
295#define P852_I2C3_MASK (P852_I2C_MASK << P852_I2C3_SHIFT)
296#define P852_I2C4_MASK (P852_I2C_MASK << P852_I2C4_SHIFT)
297
298#define P852_I2C_ENABLE 0x01
299
300#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-20 11:37:16 -0400