aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra/p852/board-p852-gpio.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-tegra/p852/board-p852-gpio.c')
-rw-r--r--arch/arm/mach-tegra/p852/board-p852-gpio.c158
1 files changed, 158 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/p852/board-p852-gpio.c b/arch/arm/mach-tegra/p852/board-p852-gpio.c
new file mode 100644
index 00000000000..71f568087c5
--- /dev/null
+++ b/arch/arm/mach-tegra/p852/board-p852-gpio.c
@@ -0,0 +1,158 @@
1/*
2 * arch/arm/mach-tegra/board-p852-gpio.c
3 *
4 * Copyright (C) 2010-2011 NVIDIA Corporation.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/gpio.h>
19#include <linux/irq.h>
20
21#include "board-p852.h"
22
23static struct gpio p852_sku23_gpios[] = {
24 {TEGRA_GPIO_PW1, GPIOF_OUT_INIT_LOW, "usbpwr0_ena"},
25 {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_LOW, "usbpwr1_ena"},
26 {TEGRA_GPIO_PA0, GPIOF_OUT_INIT_LOW, "a0"},
27 {TEGRA_GPIO_PV2, GPIOF_OUT_INIT_HIGH, "v2"},
28 {TEGRA_GPIO_PT4, GPIOF_OUT_INIT_LOW, "t4"},
29 {TEGRA_GPIO_PD6, GPIOF_OUT_INIT_HIGH, "d6"},
30 {TEGRA_GPIO_PI3, GPIOF_OUT_INIT_LOW, "i3"},
31 {TEGRA_GPIO_PV3, GPIOF_OUT_INIT_HIGH, "v3"},
32 {TEGRA_GPIO_PW4, GPIOF_IN, "w4"},
33 {TEGRA_GPIO_PW5, GPIOF_IN, "w5"},
34 {TEGRA_GPIO_PT1, GPIOF_OUT_INIT_LOW, "t1"},
35 {TEGRA_GPIO_PW3, GPIOF_OUT_INIT_HIGH, "w3"},
36 {TEGRA_GPIO_PD5, GPIOF_IN, "d5"},
37 {TEGRA_GPIO_PBB1, GPIOF_OUT_INIT_LOW, "bb1"},
38};
39
40static struct gpio p852_sku23_b00_gpios[] = {
41 {TEGRA_GPIO_PW1, GPIOF_OUT_INIT_HIGH, "usbpwr0_ena"},
42 {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_HIGH, "usbpwr1_ena"},
43 {TEGRA_GPIO_PA0, GPIOF_OUT_INIT_LOW, "a0"},
44 {TEGRA_GPIO_PV2, GPIOF_OUT_INIT_HIGH, "v2"},
45 {TEGRA_GPIO_PT4, GPIOF_OUT_INIT_LOW, "t4"},
46 {TEGRA_GPIO_PD6, GPIOF_OUT_INIT_HIGH, "d6"},
47 {TEGRA_GPIO_PI3, GPIOF_OUT_INIT_LOW, "i3"},
48 {TEGRA_GPIO_PV3, GPIOF_OUT_INIT_HIGH, "v3"},
49 {TEGRA_GPIO_PW4, GPIOF_IN, "w4"},
50 {TEGRA_GPIO_PW5, GPIOF_IN, "w5"},
51 {TEGRA_GPIO_PT1, GPIOF_OUT_INIT_LOW, "t1"},
52 {TEGRA_GPIO_PW3, GPIOF_OUT_INIT_HIGH, "w3"},
53 {TEGRA_GPIO_PD5, GPIOF_IN, "d5"},
54 {TEGRA_GPIO_PBB1, GPIOF_OUT_INIT_LOW, "bb1"},
55};
56
57static struct gpio p852_sku5_gpios[] = {
58 {TEGRA_GPIO_PW1, GPIOF_OUT_INIT_HIGH, "usbpwr0_ena"},
59 {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_HIGH, "usbpwr1_ena"},
60 {TEGRA_GPIO_PA0, GPIOF_OUT_INIT_LOW, "a0"},
61 {TEGRA_GPIO_PV2, GPIOF_OUT_INIT_HIGH, "v2"},
62 {TEGRA_GPIO_PT4, GPIOF_OUT_INIT_LOW, "t4"},
63 {TEGRA_GPIO_PD6, GPIOF_OUT_INIT_HIGH, "d6"},
64 {TEGRA_GPIO_PI3, GPIOF_OUT_INIT_LOW, "i3"},
65 {TEGRA_GPIO_PV3, GPIOF_OUT_INIT_HIGH, "v3"},
66 {TEGRA_GPIO_PW4, GPIOF_IN, "w4"},
67 {TEGRA_GPIO_PW5, GPIOF_IN, "w5"},
68 {TEGRA_GPIO_PT1, GPIOF_OUT_INIT_LOW, "t1"},
69 {TEGRA_GPIO_PW3, GPIOF_OUT_INIT_HIGH, "w3"},
70 {TEGRA_GPIO_PD5, GPIOF_IN, "d5"},
71 {TEGRA_GPIO_PBB1, GPIOF_OUT_INIT_LOW, "bb1"},
72 {TEGRA_GPIO_PS3, GPIOF_IN, "s3"},
73};
74
75static struct gpio p852_sku8_gpios[] = {
76 {TEGRA_GPIO_PW1, GPIOF_OUT_INIT_HIGH, "w1"},
77 {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_HIGH, "b2"},
78};
79
80static struct gpio p852_sku13_b00_gpios[] = {
81 {TEGRA_GPIO_PW1, GPIOF_OUT_INIT_HIGH, "w1"},
82 {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_HIGH, "b2"},
83 {TEGRA_GPIO_PW2, GPIOF_IN, "w2"},
84 {TEGRA_GPIO_PW3, GPIOF_IN, "w3"},
85 {TEGRA_GPIO_PD5, GPIOF_OUT_INIT_LOW, "d5"},
86 {TEGRA_GPIO_PBB1, GPIOF_OUT_INIT_LOW, "bb1"},
87 {TEGRA_GPIO_PN7, GPIOF_OUT_INIT_LOW, "n7"},
88 {TEGRA_GPIO_PA6, GPIOF_OUT_INIT_HIGH, "a6"},
89 {TEGRA_GPIO_PA7, GPIOF_OUT_INIT_HIGH, "a7"},
90};
91
92static struct gpio p852_gpios[] = {
93 {TEGRA_GPIO_PW1, GPIOF_OUT_INIT_LOW, "w1"},
94 {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_LOW, "b2"},
95 {TEGRA_GPIO_PW2, GPIOF_IN, "w2"},
96 {TEGRA_GPIO_PW3, GPIOF_IN, "w3"},
97 {TEGRA_GPIO_PD5, GPIOF_OUT_INIT_LOW, "d5"},
98 {TEGRA_GPIO_PBB1, GPIOF_OUT_INIT_LOW, "bb1"},
99 {TEGRA_GPIO_PN7, GPIOF_OUT_INIT_LOW, "n7"},
100 {TEGRA_GPIO_PA6, GPIOF_OUT_INIT_HIGH, "a6"},
101 {TEGRA_GPIO_PA7, GPIOF_OUT_INIT_HIGH, "a7"},
102};
103
104void __init p852_gpio_init(void)
105{
106 int pin_count = 0;
107 int i;
108 struct gpio *gpios_info = NULL;
109
110 switch (system_rev) {
111 case P852_SKU23:
112 {
113 gpios_info = p852_sku23_gpios;
114 pin_count = ARRAY_SIZE(p852_sku23_gpios);
115 }
116 break;
117 case P852_SKU23_B00:
118 case P852_SKU23_C01:
119 {
120 gpios_info = p852_sku23_b00_gpios;
121 pin_count = ARRAY_SIZE(p852_sku23_b00_gpios);
122 }
123 break;
124 case P852_SKU5_B00:
125 case P852_SKU5_C01:
126 {
127 gpios_info = p852_sku5_gpios;
128 pin_count = ARRAY_SIZE(p852_sku5_gpios);
129 }
130 break;
131 case P852_SKU8_B00:
132 case P852_SKU8_C01:
133 case P852_SKU9_B00:
134 case P852_SKU9_C01:
135 {
136 gpios_info = p852_sku8_gpios;
137 pin_count = ARRAY_SIZE(p852_sku8_gpios);
138 }
139 break;
140 case P852_SKU13_B00:
141 {
142 gpios_info = p852_sku13_b00_gpios;
143 pin_count = ARRAY_SIZE(p852_sku13_b00_gpios);
144 }
145 break;
146 default:
147 {
148 gpios_info = p852_gpios;
149 pin_count = ARRAY_SIZE(p852_gpios);
150 }
151 }
152
153 gpio_request_array(gpios_info, pin_count);
154 for (i = 0; i < pin_count; i++) {
155 tegra_gpio_enable(gpios_info[i].gpio);
156 gpio_export(gpios_info[i].gpio, true);
157 }
158}