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-rw-r--r--arch/arm/mach-mx5/Kconfig14
-rw-r--r--arch/arm/mach-mx5/Makefile2
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c2
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c26
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c6
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikasb.c15
-rw-r--r--arch/arm/mach-mx5/board-mx53_ard.c254
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c17
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c39
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c64
-rw-r--r--arch/arm/mach-mx5/crm_regs.h2
-rw-r--r--arch/arm/mach-mx5/devices-imx53.h8
-rw-r--r--arch/arm/mach-mx5/mm.c44
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c6
-rw-r--r--arch/arm/mach-mx5/pm-imx5.c73
15 files changed, 534 insertions, 38 deletions
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index f25e9d7bf0f..b4e7c58bbb3 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -180,6 +180,7 @@ config MACH_MX53_EVK
180 select IMX_HAVE_PLATFORM_IMX_I2C 180 select IMX_HAVE_PLATFORM_IMX_I2C
181 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 181 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
182 select IMX_HAVE_PLATFORM_SPI_IMX 182 select IMX_HAVE_PLATFORM_SPI_IMX
183 select LEDS_GPIO_REGISTER
183 help 184 help
184 Include support for MX53 EVK platform. This includes specific 185 Include support for MX53 EVK platform. This includes specific
185 configurations for the board and its peripherals. 186 configurations for the board and its peripherals.
@@ -203,10 +204,23 @@ config MACH_MX53_LOCO
203 select IMX_HAVE_PLATFORM_IMX_UART 204 select IMX_HAVE_PLATFORM_IMX_UART
204 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 205 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
205 select IMX_HAVE_PLATFORM_GPIO_KEYS 206 select IMX_HAVE_PLATFORM_GPIO_KEYS
207 select LEDS_GPIO_REGISTER
206 help 208 help
207 Include support for MX53 LOCO platform. This includes specific 209 Include support for MX53 LOCO platform. This includes specific
208 configurations for the board and its peripherals. 210 configurations for the board and its peripherals.
209 211
212config MACH_MX53_ARD
213 bool "Support MX53 ARD platforms"
214 select SOC_IMX53
215 select IMX_HAVE_PLATFORM_IMX2_WDT
216 select IMX_HAVE_PLATFORM_IMX_I2C
217 select IMX_HAVE_PLATFORM_IMX_UART
218 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
219 select IMX_HAVE_PLATFORM_GPIO_KEYS
220 help
221 Include support for MX53 ARD platform. This includes specific
222 configurations for the board and its peripherals.
223
210endif # ARCH_MX53_SUPPORTED 224endif # ARCH_MX53_SUPPORTED
211 225
212endif 226endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 0b9338cec51..383e7cd3fbc 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -6,12 +6,14 @@
6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o 7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 8
9obj-$(CONFIG_PM) += pm-imx5.o
9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 10obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
10obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o 11obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
11obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o 12obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
12obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o 13obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o
13obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o 14obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o
14obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o 15obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o
16obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o
15obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o 17obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
16obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o 18obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
17obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o 19obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 7c893fa7026..68934ea8725 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -81,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
82 }, { 82 }, {
83 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), 83 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
84 .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), 84 .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO),
85 .irqflags = IRQF_TRIGGER_HIGH, 85 .irqflags = IRQF_TRIGGER_HIGH,
86 .uartclk = CPUIMX51_QUART_XTAL, 86 .uartclk = CPUIMX51_QUART_XTAL,
87 .regshift = CPUIMX51_QUART_REGSHIFT, 87 .regshift = CPUIMX51_QUART_REGSHIFT,
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index e54e4bf61cf..11b0ff67f89 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -41,6 +41,8 @@
41#define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) 41#define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21)
42#define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) 42#define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24)
43#define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25) 43#define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25)
44#define BABBAGE_SD2_CD IMX_GPIO_NR(1, 6)
45#define BABBAGE_SD2_WP IMX_GPIO_NR(1, 5)
44 46
45/* USB_CTRL_1 */ 47/* USB_CTRL_1 */
46#define MX51_USB_CTRL_1_OFFSET 0x10 48#define MX51_USB_CTRL_1_OFFSET 0x10
@@ -142,6 +144,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
142 MX51_PAD_SD1_DATA1__SD1_DATA1, 144 MX51_PAD_SD1_DATA1__SD1_DATA1,
143 MX51_PAD_SD1_DATA2__SD1_DATA2, 145 MX51_PAD_SD1_DATA2__SD1_DATA2,
144 MX51_PAD_SD1_DATA3__SD1_DATA3, 146 MX51_PAD_SD1_DATA3__SD1_DATA3,
147 /* CD/WP from controller */
148 MX51_PAD_GPIO1_0__SD1_CD,
149 MX51_PAD_GPIO1_1__SD1_WP,
145 150
146 /* SD 2 */ 151 /* SD 2 */
147 MX51_PAD_SD2_CMD__SD2_CMD, 152 MX51_PAD_SD2_CMD__SD2_CMD,
@@ -150,6 +155,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
150 MX51_PAD_SD2_DATA1__SD2_DATA1, 155 MX51_PAD_SD2_DATA1__SD2_DATA1,
151 MX51_PAD_SD2_DATA2__SD2_DATA2, 156 MX51_PAD_SD2_DATA2__SD2_DATA2,
152 MX51_PAD_SD2_DATA3__SD2_DATA3, 157 MX51_PAD_SD2_DATA3__SD2_DATA3,
158 /* CD/WP gpio */
159 MX51_PAD_GPIO1_6__GPIO1_6,
160 MX51_PAD_GPIO1_5__GPIO1_5,
153 161
154 /* eCSPI1 */ 162 /* eCSPI1 */
155 MX51_PAD_CSPI1_MISO__ECSPI1_MISO, 163 MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
@@ -331,6 +339,18 @@ static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
331 .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs), 339 .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
332}; 340};
333 341
342static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = {
343 .cd_type = ESDHC_CD_CONTROLLER,
344 .wp_type = ESDHC_WP_CONTROLLER,
345};
346
347static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
348 .cd_gpio = BABBAGE_SD2_CD,
349 .wp_gpio = BABBAGE_SD2_WP,
350 .cd_type = ESDHC_CD_GPIO,
351 .wp_type = ESDHC_WP_GPIO,
352};
353
334/* 354/*
335 * Board specific initialization. 355 * Board specific initialization.
336 */ 356 */
@@ -349,7 +369,7 @@ static void __init mx51_babbage_init(void)
349 ARRAY_SIZE(mx51babbage_pads)); 369 ARRAY_SIZE(mx51babbage_pads));
350 370
351 imx51_add_imx_uart(0, &uart_pdata); 371 imx51_add_imx_uart(0, &uart_pdata);
352 imx51_add_imx_uart(1, &uart_pdata); 372 imx51_add_imx_uart(1, NULL);
353 imx51_add_imx_uart(2, &uart_pdata); 373 imx51_add_imx_uart(2, &uart_pdata);
354 374
355 babbage_fec_reset(); 375 babbage_fec_reset();
@@ -376,8 +396,8 @@ static void __init mx51_babbage_init(void)
376 mxc_iomux_v3_setup_pad(usbh1stp); 396 mxc_iomux_v3_setup_pad(usbh1stp);
377 babbage_usbhub_reset(); 397 babbage_usbhub_reset();
378 398
379 imx51_add_sdhci_esdhc_imx(0, NULL); 399 imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data);
380 imx51_add_sdhci_esdhc_imx(1, NULL); 400 imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data);
381 401
382 spi_register_board_info(mx51_babbage_spi_board_info, 402 spi_register_board_info(mx51_babbage_spi_board_info,
383 ARRAY_SIZE(mx51_babbage_spi_board_info)); 403 ARRAY_SIZE(mx51_babbage_spi_board_info));
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index f70700dc0ec..551daf85ff8 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -108,9 +108,9 @@ static void __init mx51_efikamx_board_id(void)
108 gpio_request(EFIKAMX_PCBID2, "pcbid2"); 108 gpio_request(EFIKAMX_PCBID2, "pcbid2");
109 gpio_direction_input(EFIKAMX_PCBID2); 109 gpio_direction_input(EFIKAMX_PCBID2);
110 110
111 id = gpio_get_value(EFIKAMX_PCBID0); 111 id = gpio_get_value(EFIKAMX_PCBID0) ? 1 : 0;
112 id |= gpio_get_value(EFIKAMX_PCBID1) << 1; 112 id |= (gpio_get_value(EFIKAMX_PCBID1) ? 1 : 0) << 1;
113 id |= gpio_get_value(EFIKAMX_PCBID2) << 2; 113 id |= (gpio_get_value(EFIKAMX_PCBID2) ? 1 : 0) << 2;
114 114
115 switch (id) { 115 switch (id) {
116 case 7: 116 case 7:
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 2e4d9d32a87..8a9bca22beb 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -156,23 +156,24 @@ static struct gpio_keys_button mx51_efikasb_keys[] = {
156 { 156 {
157 .code = KEY_POWER, 157 .code = KEY_POWER,
158 .gpio = EFIKASB_PWRKEY, 158 .gpio = EFIKASB_PWRKEY,
159 .type = EV_PWR, 159 .type = EV_KEY,
160 .desc = "Power Button", 160 .desc = "Power Button",
161 .wakeup = 1, 161 .wakeup = 1,
162 .debounce_interval = 10, /* ms */ 162 .active_low = 1,
163 }, 163 },
164 { 164 {
165 .code = SW_LID, 165 .code = SW_LID,
166 .gpio = EFIKASB_LID, 166 .gpio = EFIKASB_LID,
167 .type = EV_SW, 167 .type = EV_SW,
168 .desc = "Lid Switch", 168 .desc = "Lid Switch",
169 .active_low = 1,
169 }, 170 },
170 { 171 {
171 /* SW_RFKILLALL vs KEY_RFKILL ? */ 172 .code = KEY_RFKILL,
172 .code = SW_RFKILL_ALL,
173 .gpio = EFIKASB_RFKILL, 173 .gpio = EFIKASB_RFKILL,
174 .type = EV_SW, 174 .type = EV_KEY,
175 .desc = "rfkill", 175 .desc = "rfkill",
176 .active_low = 1,
176 }, 177 },
177}; 178};
178 179
@@ -224,8 +225,8 @@ static void __init mx51_efikasb_board_id(void)
224 gpio_request(EFIKASB_PCBID1, "pcb id1"); 225 gpio_request(EFIKASB_PCBID1, "pcb id1");
225 gpio_direction_input(EFIKASB_PCBID1); 226 gpio_direction_input(EFIKASB_PCBID1);
226 227
227 id = gpio_get_value(EFIKASB_PCBID0); 228 id = gpio_get_value(EFIKASB_PCBID0) ? 1 : 0;
228 id |= gpio_get_value(EFIKASB_PCBID1) << 1; 229 id |= (gpio_get_value(EFIKASB_PCBID1) ? 1 : 0) << 1;
229 230
230 switch (id) { 231 switch (id) {
231 default: 232 default:
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
new file mode 100644
index 00000000000..76a67c4a2a0
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -0,0 +1,254 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/init.h>
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/gpio.h>
25#include <linux/smsc911x.h>
26
27#include <mach/common.h>
28#include <mach/hardware.h>
29#include <mach/iomux-mx53.h>
30
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33#include <asm/mach/time.h>
34
35#include "crm_regs.h"
36#include "devices-imx53.h"
37
38#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31)
39#define ARD_SD1_CD IMX_GPIO_NR(1, 1)
40#define ARD_SD1_WP IMX_GPIO_NR(1, 9)
41#define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3)
42#define ARD_VOLUMEDOWN IMX_GPIO_NR(4, 0)
43#define ARD_HOME IMX_GPIO_NR(5, 10)
44#define ARD_BACK IMX_GPIO_NR(5, 11)
45#define ARD_PROG IMX_GPIO_NR(5, 12)
46#define ARD_VOLUMEUP IMX_GPIO_NR(5, 13)
47
48static iomux_v3_cfg_t mx53_ard_pads[] = {
49 /* UART1 */
50 MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
51 MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
52 /* WEIM for CS1 */
53 MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */
54 MX53_PAD_EIM_D16__EMI_WEIM_D_16,
55 MX53_PAD_EIM_D17__EMI_WEIM_D_17,
56 MX53_PAD_EIM_D18__EMI_WEIM_D_18,
57 MX53_PAD_EIM_D19__EMI_WEIM_D_19,
58 MX53_PAD_EIM_D20__EMI_WEIM_D_20,
59 MX53_PAD_EIM_D21__EMI_WEIM_D_21,
60 MX53_PAD_EIM_D22__EMI_WEIM_D_22,
61 MX53_PAD_EIM_D23__EMI_WEIM_D_23,
62 MX53_PAD_EIM_D24__EMI_WEIM_D_24,
63 MX53_PAD_EIM_D25__EMI_WEIM_D_25,
64 MX53_PAD_EIM_D26__EMI_WEIM_D_26,
65 MX53_PAD_EIM_D27__EMI_WEIM_D_27,
66 MX53_PAD_EIM_D28__EMI_WEIM_D_28,
67 MX53_PAD_EIM_D29__EMI_WEIM_D_29,
68 MX53_PAD_EIM_D30__EMI_WEIM_D_30,
69 MX53_PAD_EIM_D31__EMI_WEIM_D_31,
70 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0,
71 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1,
72 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2,
73 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3,
74 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4,
75 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5,
76 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6,
77 MX53_PAD_EIM_OE__EMI_WEIM_OE,
78 MX53_PAD_EIM_RW__EMI_WEIM_RW,
79 MX53_PAD_EIM_CS1__EMI_WEIM_CS_1,
80 /* SDHC1 */
81 MX53_PAD_SD1_CMD__ESDHC1_CMD,
82 MX53_PAD_SD1_CLK__ESDHC1_CLK,
83 MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
84 MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
85 MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
86 MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
87 MX53_PAD_PATA_DATA8__ESDHC1_DAT4,
88 MX53_PAD_PATA_DATA9__ESDHC1_DAT5,
89 MX53_PAD_PATA_DATA10__ESDHC1_DAT6,
90 MX53_PAD_PATA_DATA11__ESDHC1_DAT7,
91 MX53_PAD_GPIO_1__GPIO1_1,
92 MX53_PAD_GPIO_9__GPIO1_9,
93 /* I2C2 */
94 MX53_PAD_EIM_EB2__I2C2_SCL,
95 MX53_PAD_KEY_ROW3__I2C2_SDA,
96 /* I2C3 */
97 MX53_PAD_GPIO_3__I2C3_SCL,
98 MX53_PAD_GPIO_16__I2C3_SDA,
99 /* GPIO */
100 MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */
101 MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */
102 MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */
103 MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */
104 MX53_PAD_GPIO_10__GPIO4_0, /* vol down */
105};
106
107#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
108{ \
109 .gpio = gpio_num, \
110 .type = EV_KEY, \
111 .code = ev_code, \
112 .active_low = act_low, \
113 .desc = "btn " descr, \
114 .wakeup = wake, \
115}
116
117static struct gpio_keys_button ard_buttons[] = {
118 GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0),
119 GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0),
120 GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0),
121 GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0),
122 GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0),
123};
124
125static const struct gpio_keys_platform_data ard_button_data __initconst = {
126 .buttons = ard_buttons,
127 .nbuttons = ARRAY_SIZE(ard_buttons),
128};
129
130static struct resource ard_smsc911x_resources[] = {
131 {
132 .start = MX53_CS1_64MB_BASE_ADDR,
133 .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1,
134 .flags = IORESOURCE_MEM,
135 },
136 {
137 .start = gpio_to_irq(ARD_ETHERNET_INT_B),
138 .end = gpio_to_irq(ARD_ETHERNET_INT_B),
139 .flags = IORESOURCE_IRQ,
140 },
141};
142
143struct smsc911x_platform_config ard_smsc911x_config = {
144 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
145 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
146 .flags = SMSC911X_USE_32BIT,
147};
148
149static struct platform_device ard_smsc_lan9220_device = {
150 .name = "smsc911x",
151 .id = -1,
152 .num_resources = ARRAY_SIZE(ard_smsc911x_resources),
153 .resource = ard_smsc911x_resources,
154 .dev = {
155 .platform_data = &ard_smsc911x_config,
156 },
157};
158
159static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = {
160 .cd_gpio = ARD_SD1_CD,
161 .wp_gpio = ARD_SD1_WP,
162};
163
164static struct imxi2c_platform_data mx53_ard_i2c2_data = {
165 .bitrate = 50000,
166};
167
168static struct imxi2c_platform_data mx53_ard_i2c3_data = {
169 .bitrate = 400000,
170};
171
172static void __init mx53_ard_io_init(void)
173{
174 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
175 ARRAY_SIZE(mx53_ard_pads));
176
177 gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
178 gpio_direction_input(ARD_ETHERNET_INT_B);
179
180 gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst");
181 gpio_direction_output(ARD_I2CPORTEXP_B, 1);
182}
183
184/* Config CS1 settings for ethernet controller */
185static int weim_cs_config(void)
186{
187 u32 reg;
188 void __iomem *weim_base, *iomuxc_base;
189
190 weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K);
191 if (!weim_base)
192 return -ENOMEM;
193
194 iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K);
195 if (!iomuxc_base)
196 return -ENOMEM;
197
198 /* CS1 timings for LAN9220 */
199 writel(0x20001, (weim_base + 0x18));
200 writel(0x0, (weim_base + 0x1C));
201 writel(0x16000202, (weim_base + 0x20));
202 writel(0x00000002, (weim_base + 0x24));
203 writel(0x16002082, (weim_base + 0x28));
204 writel(0x00000000, (weim_base + 0x2C));
205 writel(0x00000000, (weim_base + 0x90));
206
207 /* specify 64 MB on CS1 and CS0 on GPR1 */
208 reg = readl(iomuxc_base + 0x4);
209 reg &= ~0x3F;
210 reg |= 0x1B;
211 writel(reg, (iomuxc_base + 0x4));
212
213 iounmap(iomuxc_base);
214 iounmap(weim_base);
215
216 return 0;
217}
218
219static struct platform_device *devices[] __initdata = {
220 &ard_smsc_lan9220_device,
221};
222
223static void __init mx53_ard_board_init(void)
224{
225 imx53_soc_init();
226 imx53_add_imx_uart(0, NULL);
227
228 mx53_ard_io_init();
229 weim_cs_config();
230 platform_add_devices(devices, ARRAY_SIZE(devices));
231
232 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
233 imx53_add_imx2_wdt(0, NULL);
234 imx53_add_imx_i2c(1, &mx53_ard_i2c2_data);
235 imx53_add_imx_i2c(2, &mx53_ard_i2c3_data);
236 imx_add_gpio_keys(&ard_button_data);
237}
238
239static void __init mx53_ard_timer_init(void)
240{
241 mx53_clocks_init(32768, 24000000, 22579200, 0);
242}
243
244static struct sys_timer mx53_ard_timer = {
245 .init = mx53_ard_timer_init,
246};
247
248MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
249 .map_io = mx53_map_io,
250 .init_early = imx53_init_early,
251 .init_irq = mx53_init_irq,
252 .timer = &mx53_ard_timer,
253 .init_machine = mx53_ard_board_init,
254MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 0d9218a6e2d..1b417b06b73 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -35,6 +35,7 @@
35#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) 35#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6)
36#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) 36#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
37#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) 37#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
38#define MX53EVK_LED IMX_GPIO_NR(7, 7)
38 39
39#include "crm_regs.h" 40#include "crm_regs.h"
40#include "devices-imx53.h" 41#include "devices-imx53.h"
@@ -58,12 +59,27 @@ static iomux_v3_cfg_t mx53_evk_pads[] = {
58 /* ecspi chip select lines */ 59 /* ecspi chip select lines */
59 MX53_PAD_EIM_EB2__GPIO2_30, 60 MX53_PAD_EIM_EB2__GPIO2_30,
60 MX53_PAD_EIM_D19__GPIO3_19, 61 MX53_PAD_EIM_D19__GPIO3_19,
62 /* LED */
63 MX53_PAD_PATA_DA_1__GPIO7_7,
61}; 64};
62 65
63static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { 66static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = {
64 .flags = IMXUART_HAVE_RTSCTS, 67 .flags = IMXUART_HAVE_RTSCTS,
65}; 68};
66 69
70static const struct gpio_led mx53evk_leds[] __initconst = {
71 {
72 .name = "green",
73 .default_trigger = "heartbeat",
74 .gpio = MX53EVK_LED,
75 },
76};
77
78static const struct gpio_led_platform_data mx53evk_leds_data __initconst = {
79 .leds = mx53evk_leds,
80 .num_leds = ARRAY_SIZE(mx53evk_leds),
81};
82
67static inline void mx53_evk_init_uart(void) 83static inline void mx53_evk_init_uart(void)
68{ 84{
69 imx53_add_imx_uart(0, NULL); 85 imx53_add_imx_uart(0, NULL);
@@ -135,6 +151,7 @@ static void __init mx53_evk_board_init(void)
135 ARRAY_SIZE(mx53_evk_spi_board_info)); 151 ARRAY_SIZE(mx53_evk_spi_board_info));
136 imx53_add_ecspi(0, &mx53_evk_spi_data); 152 imx53_add_ecspi(0, &mx53_evk_spi_data);
137 imx53_add_imx2_wdt(0, NULL); 153 imx53_add_imx2_wdt(0, NULL);
154 gpio_led_register_device(-1, &mx53evk_leds_data);
138} 155}
139 156
140static void __init mx53_evk_timer_init(void) 157static void __init mx53_evk_timer_init(void)
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 359c3e248ad..4e1d51d252d 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -38,6 +38,10 @@
38#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) 38#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14)
39#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) 39#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15)
40#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) 40#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
41#define LOCO_LED IMX_GPIO_NR(7, 7)
42#define LOCO_SD3_CD IMX_GPIO_NR(3, 11)
43#define LOCO_SD3_WP IMX_GPIO_NR(3, 12)
44#define LOCO_SD1_CD IMX_GPIO_NR(3, 13)
41 45
42static iomux_v3_cfg_t mx53_loco_pads[] = { 46static iomux_v3_cfg_t mx53_loco_pads[] = {
43 /* FEC */ 47 /* FEC */
@@ -70,6 +74,8 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
70 MX53_PAD_SD1_DATA1__ESDHC1_DAT1, 74 MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
71 MX53_PAD_SD1_DATA2__ESDHC1_DAT2, 75 MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
72 MX53_PAD_SD1_DATA3__ESDHC1_DAT3, 76 MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
77 /* SD1_CD */
78 MX53_PAD_EIM_DA13__GPIO3_13,
73 /* SD3 */ 79 /* SD3 */
74 MX53_PAD_PATA_DATA8__ESDHC3_DAT0, 80 MX53_PAD_PATA_DATA8__ESDHC3_DAT0,
75 MX53_PAD_PATA_DATA9__ESDHC3_DAT1, 81 MX53_PAD_PATA_DATA9__ESDHC3_DAT1,
@@ -163,7 +169,7 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
163 MX53_PAD_GPIO_7__SPDIF_PLOCK, 169 MX53_PAD_GPIO_7__SPDIF_PLOCK,
164 MX53_PAD_GPIO_17__SPDIF_OUT1, 170 MX53_PAD_GPIO_17__SPDIF_OUT1,
165 /* GPIO */ 171 /* GPIO */
166 MX53_PAD_PATA_DA_1__GPIO7_7, 172 MX53_PAD_PATA_DA_1__GPIO7_7, /* LED */
167 MX53_PAD_PATA_DA_2__GPIO7_8, 173 MX53_PAD_PATA_DA_2__GPIO7_8,
168 MX53_PAD_PATA_DATA5__GPIO2_5, 174 MX53_PAD_PATA_DATA5__GPIO2_5,
169 MX53_PAD_PATA_DATA6__GPIO2_6, 175 MX53_PAD_PATA_DATA6__GPIO2_6,
@@ -202,6 +208,19 @@ static const struct gpio_keys_platform_data loco_button_data __initconst = {
202 .nbuttons = ARRAY_SIZE(loco_buttons), 208 .nbuttons = ARRAY_SIZE(loco_buttons),
203}; 209};
204 210
211static const struct esdhc_platform_data mx53_loco_sd1_data __initconst = {
212 .cd_gpio = LOCO_SD1_CD,
213 .cd_type = ESDHC_CD_GPIO,
214 .wp_type = ESDHC_WP_NONE,
215};
216
217static const struct esdhc_platform_data mx53_loco_sd3_data __initconst = {
218 .cd_gpio = LOCO_SD3_CD,
219 .wp_gpio = LOCO_SD3_WP,
220 .cd_type = ESDHC_CD_GPIO,
221 .wp_type = ESDHC_WP_GPIO,
222};
223
205static inline void mx53_loco_fec_reset(void) 224static inline void mx53_loco_fec_reset(void)
206{ 225{
207 int ret; 226 int ret;
@@ -225,6 +244,19 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = {
225 .bitrate = 100000, 244 .bitrate = 100000,
226}; 245};
227 246
247static const struct gpio_led mx53loco_leds[] __initconst = {
248 {
249 .name = "green",
250 .default_trigger = "heartbeat",
251 .gpio = LOCO_LED,
252 },
253};
254
255static const struct gpio_led_platform_data mx53loco_leds_data __initconst = {
256 .leds = mx53loco_leds,
257 .num_leds = ARRAY_SIZE(mx53loco_leds),
258};
259
228static void __init mx53_loco_board_init(void) 260static void __init mx53_loco_board_init(void)
229{ 261{
230 imx53_soc_init(); 262 imx53_soc_init();
@@ -237,9 +269,10 @@ static void __init mx53_loco_board_init(void)
237 imx53_add_imx2_wdt(0, NULL); 269 imx53_add_imx2_wdt(0, NULL);
238 imx53_add_imx_i2c(0, &mx53_loco_i2c_data); 270 imx53_add_imx_i2c(0, &mx53_loco_i2c_data);
239 imx53_add_imx_i2c(1, &mx53_loco_i2c_data); 271 imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
240 imx53_add_sdhci_esdhc_imx(0, NULL); 272 imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data);
241 imx53_add_sdhci_esdhc_imx(2, NULL); 273 imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data);
242 imx_add_gpio_keys(&loco_button_data); 274 imx_add_gpio_keys(&loco_button_data);
275 gpio_led_register_device(-1, &mx53loco_leds_data);
243} 276}
244 277
245static void __init mx53_loco_timer_init(void) 278static void __init mx53_loco_timer_init(void)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 0adeea17d12..f7bf996f463 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -271,7 +271,11 @@ static int _clk_pll_enable(struct clk *clk)
271 int i = 0; 271 int i = 0;
272 272
273 pllbase = _get_pll_base(clk); 273 pllbase = _get_pll_base(clk);
274 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; 274 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
275 if (reg & MXC_PLL_DP_CTL_UPEN)
276 return 0;
277
278 reg |= MXC_PLL_DP_CTL_UPEN;
275 __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); 279 __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
276 280
277 /* Wait for lock */ 281 /* Wait for lock */
@@ -1254,12 +1258,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,
1254 NULL, NULL, &ipg_clk, &aips_tz1_clk); 1258 NULL, NULL, &ipg_clk, &aips_tz1_clk);
1255DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, 1259DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
1256 NULL, NULL, &ipg_clk, &spba_clk); 1260 NULL, NULL, &ipg_clk, &spba_clk);
1261DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET,
1262 NULL, NULL, &ipg_clk, &spba_clk);
1263DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET,
1264 NULL, NULL, &ipg_clk, &spba_clk);
1257DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, 1265DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,
1258 NULL, NULL, &uart_root_clk, &uart1_ipg_clk); 1266 NULL, NULL, &uart_root_clk, &uart1_ipg_clk);
1259DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, 1267DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,
1260 NULL, NULL, &uart_root_clk, &uart2_ipg_clk); 1268 NULL, NULL, &uart_root_clk, &uart2_ipg_clk);
1261DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, 1269DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,
1262 NULL, NULL, &uart_root_clk, &uart3_ipg_clk); 1270 NULL, NULL, &uart_root_clk, &uart3_ipg_clk);
1271DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET,
1272 NULL, NULL, &uart_root_clk, &uart4_ipg_clk);
1273DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET,
1274 NULL, NULL, &uart_root_clk, &uart5_ipg_clk);
1263 1275
1264/* GPT */ 1276/* GPT */
1265DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, 1277DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
@@ -1279,6 +1291,8 @@ DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET,
1279 NULL, NULL, &ipg_perclk, NULL); 1291 NULL, NULL, &ipg_perclk, NULL);
1280DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, 1292DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET,
1281 NULL, NULL, &ipg_clk, NULL); 1293 NULL, NULL, &ipg_clk, NULL);
1294DEFINE_CLOCK(i2c3_mx53_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET,
1295 NULL, NULL, &ipg_perclk, NULL);
1282 1296
1283/* FEC */ 1297/* FEC */
1284DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, 1298DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,
@@ -1412,11 +1426,13 @@ DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
1412 }, 1426 },
1413 1427
1414static struct clk_lookup mx51_lookups[] = { 1428static struct clk_lookup mx51_lookups[] = {
1415 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) 1429 /* i.mx51 has the i.mx21 type uart */
1416 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) 1430 _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
1417 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) 1431 _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
1432 _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
1418 _REGISTER_CLOCK(NULL, "gpt", gpt_clk) 1433 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
1419 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 1434 /* i.mx51 has the i.mx27 type fec */
1435 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
1420 _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk) 1436 _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
1421 _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk) 1437 _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
1422 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) 1438 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
@@ -1436,7 +1452,8 @@ static struct clk_lookup mx51_lookups[] = {
1436 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) 1452 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
1437 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) 1453 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
1438 _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) 1454 _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
1439 _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) 1455 /* i.mx51 has the i.mx35 type sdma */
1456 _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
1440 _REGISTER_CLOCK(NULL, "ckih", ckih_clk) 1457 _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
1441 _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk) 1458 _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
1442 _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk) 1459 _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)
@@ -1444,10 +1461,10 @@ static struct clk_lookup mx51_lookups[] = {
1444 _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) 1461 _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)
1445 /* i.mx51 has the i.mx35 type cspi */ 1462 /* i.mx51 has the i.mx35 type cspi */
1446 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk) 1463 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)
1447 _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) 1464 _REGISTER_CLOCK("sdhci-esdhc-imx51.0", NULL, esdhc1_clk)
1448 _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) 1465 _REGISTER_CLOCK("sdhci-esdhc-imx51.1", NULL, esdhc2_clk)
1449 _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_clk) 1466 _REGISTER_CLOCK("sdhci-esdhc-imx51.2", NULL, esdhc3_clk)
1450 _REGISTER_CLOCK("sdhci-esdhc-imx.3", NULL, esdhc4_clk) 1467 _REGISTER_CLOCK("sdhci-esdhc-imx51.3", NULL, esdhc4_clk)
1451 _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk) 1468 _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk)
1452 _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) 1469 _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
1453 _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) 1470 _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
@@ -1460,25 +1477,36 @@ static struct clk_lookup mx51_lookups[] = {
1460}; 1477};
1461 1478
1462static struct clk_lookup mx53_lookups[] = { 1479static struct clk_lookup mx53_lookups[] = {
1463 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) 1480 /* i.mx53 has the i.mx21 type uart */
1464 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) 1481 _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)
1465 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) 1482 _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)
1483 _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)
1484 _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)
1485 _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)
1466 _REGISTER_CLOCK(NULL, "gpt", gpt_clk) 1486 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
1467 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 1487 /* i.mx53 has the i.mx25 type fec */
1488 _REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)
1468 _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) 1489 _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
1469 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) 1490 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
1470 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) 1491 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
1471 _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) 1492 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk)
1472 _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_mx53_clk)
1473 _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_mx53_clk)
1474 _REGISTER_CLOCK("sdhci-esdhc-imx.3", NULL, esdhc4_mx53_clk)
1475 /* i.mx53 has the i.mx51 type ecspi */ 1493 /* i.mx53 has the i.mx51 type ecspi */
1476 _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) 1494 _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)
1477 _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) 1495 _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)
1478 /* i.mx53 has the i.mx25 type cspi */ 1496 /* i.mx53 has the i.mx25 type cspi */
1479 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk) 1497 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)
1498 _REGISTER_CLOCK("sdhci-esdhc-imx53.0", NULL, esdhc1_clk)
1499 _REGISTER_CLOCK("sdhci-esdhc-imx53.1", NULL, esdhc2_mx53_clk)
1500 _REGISTER_CLOCK("sdhci-esdhc-imx53.2", NULL, esdhc3_mx53_clk)
1501 _REGISTER_CLOCK("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk)
1480 _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) 1502 _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
1481 _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) 1503 _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
1504 /* i.mx53 has the i.mx35 type sdma */
1505 _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
1506 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
1507 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
1508 _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
1509 _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
1482}; 1510};
1483 1511
1484static void clk_tree_init(void) 1512static void clk_tree_init(void)
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
index 87c0c58f27a..5e11ba7daee 100644
--- a/arch/arm/mach-mx5/crm_regs.h
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -114,6 +114,8 @@
114#define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) 114#define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78)
115#define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C) 115#define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C)
116#define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) 116#define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80)
117#define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84)
118
117#define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84) 119#define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84)
118 120
119/* Define the bits in register CCR */ 121/* Define the bits in register CCR */
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
index 48f4c8cc42f..c27fe8bb476 100644
--- a/arch/arm/mach-mx5/devices-imx53.h
+++ b/arch/arm/mach-mx5/devices-imx53.h
@@ -32,3 +32,11 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[];
32extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; 32extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[];
33#define imx53_add_imx2_wdt(id, pdata) \ 33#define imx53_add_imx2_wdt(id, pdata) \
34 imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) 34 imx_add_imx2_wdt(&imx53_imx2_wdt_data[id])
35
36extern const struct imx_imx_ssi_data imx53_imx_ssi_data[];
37#define imx53_add_imx_ssi(id, pdata) \
38 imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata)
39
40extern const struct imx_imx_keypad_data imx53_imx_keypad_data;
41#define imx53_add_imx_keypad(pdata) \
42 imx_add_imx_keypad(&imx53_imx_keypad_data, pdata)
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 665843d6c2b..baea6e5cddd 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20#include <mach/common.h> 20#include <mach/common.h>
21#include <mach/devices-common.h>
21#include <mach/iomux-v3.h> 22#include <mach/iomux-v3.h>
22 23
23/* 24/*
@@ -100,6 +101,43 @@ void __init mx53_init_irq(void)
100 tzic_init_irq(tzic_virt); 101 tzic_init_irq(tzic_virt);
101} 102}
102 103
104static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
105 .ap_2_ap_addr = 642,
106 .uart_2_mcu_addr = 817,
107 .mcu_2_app_addr = 747,
108 .mcu_2_shp_addr = 961,
109 .ata_2_mcu_addr = 1473,
110 .mcu_2_ata_addr = 1392,
111 .app_2_per_addr = 1033,
112 .app_2_mcu_addr = 683,
113 .shp_2_per_addr = 1251,
114 .shp_2_mcu_addr = 892,
115};
116
117static struct sdma_platform_data imx51_sdma_pdata __initdata = {
118 .fw_name = "sdma-imx51.bin",
119 .script_addrs = &imx51_sdma_script,
120};
121
122static struct sdma_script_start_addrs imx53_sdma_script __initdata = {
123 .ap_2_ap_addr = 642,
124 .app_2_mcu_addr = 683,
125 .mcu_2_app_addr = 747,
126 .uart_2_mcu_addr = 817,
127 .shp_2_mcu_addr = 891,
128 .mcu_2_shp_addr = 960,
129 .uartsh_2_mcu_addr = 1032,
130 .spdif_2_mcu_addr = 1100,
131 .mcu_2_spdif_addr = 1134,
132 .firi_2_mcu_addr = 1193,
133 .mcu_2_firi_addr = 1290,
134};
135
136static struct sdma_platform_data imx53_sdma_pdata __initdata = {
137 .fw_name = "sdma-imx53.bin",
138 .script_addrs = &imx53_sdma_script,
139};
140
103void __init imx51_soc_init(void) 141void __init imx51_soc_init(void)
104{ 142{
105 /* i.mx51 has the i.mx31 type gpio */ 143 /* i.mx51 has the i.mx31 type gpio */
@@ -107,6 +145,9 @@ void __init imx51_soc_init(void)
107 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); 145 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
108 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); 146 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
109 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); 147 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
148
149 /* i.mx51 has the i.mx35 type sdma */
150 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
110} 151}
111 152
112void __init imx53_soc_init(void) 153void __init imx53_soc_init(void)
@@ -119,4 +160,7 @@ void __init imx53_soc_init(void)
119 mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); 160 mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
120 mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); 161 mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
121 mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); 162 mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
163
164 /* i.mx53 has the i.mx35 type sdma */
165 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
122} 166}
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 56739c23aca..c9209454807 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -186,7 +186,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
186 186
187 mdelay(10); 187 mdelay(10);
188 188
189 return mx51_initialize_usb_hw(0, MXC_EHCI_ITC_NO_THRESHOLD); 189 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
190} 190}
191 191
192static struct mxc_usbh_platform_data usbh1_config = { 192static struct mxc_usbh_platform_data usbh1_config = {
@@ -260,8 +260,8 @@ static struct regulator_consumer_supply vvideo_consumers[] = {
260}; 260};
261 261
262static struct regulator_consumer_supply vsd_consumers[] = { 262static struct regulator_consumer_supply vsd_consumers[] = {
263 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.0"), 263 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx51.0"),
264 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"), 264 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx51.1"),
265}; 265};
266 266
267static struct regulator_consumer_supply pwgt1_consumer[] = { 267static struct regulator_consumer_supply pwgt1_consumer[] = {
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c
new file mode 100644
index 00000000000..e4529af0da7
--- /dev/null
+++ b/arch/arm/mach-mx5/pm-imx5.c
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11#include <linux/suspend.h>
12#include <linux/clk.h>
13#include <linux/io.h>
14#include <linux/err.h>
15#include <asm/cacheflush.h>
16#include <asm/tlbflush.h>
17#include <mach/system.h>
18#include "crm_regs.h"
19
20static struct clk *gpc_dvfs_clk;
21
22static int mx5_suspend_enter(suspend_state_t state)
23{
24 clk_enable(gpc_dvfs_clk);
25 switch (state) {
26 case PM_SUSPEND_MEM:
27 mx5_cpu_lp_set(STOP_POWER_OFF);
28 break;
29 case PM_SUSPEND_STANDBY:
30 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
31 break;
32 default:
33 return -EINVAL;
34 }
35
36 if (state == PM_SUSPEND_MEM) {
37 local_flush_tlb_all();
38 flush_cache_all();
39
40 /*clear the EMPGC0/1 bits */
41 __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
42 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
43 }
44 cpu_do_idle();
45 clk_disable(gpc_dvfs_clk);
46
47 return 0;
48}
49
50static int mx5_pm_valid(suspend_state_t state)
51{
52 return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
53}
54
55static const struct platform_suspend_ops mx5_suspend_ops = {
56 .valid = mx5_pm_valid,
57 .enter = mx5_suspend_enter,
58};
59
60static int __init mx5_pm_init(void)
61{
62 if (gpc_dvfs_clk == NULL)
63 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
64
65 if (!IS_ERR(gpc_dvfs_clk)) {
66 if (cpu_is_mx51())
67 suspend_set_ops(&mx5_suspend_ops);
68 } else
69 return -EPERM;
70
71 return 0;
72}
73device_initcall(mx5_pm_init);