diff options
Diffstat (limited to 'arch/arm/mach-mx5/clock-mx51-mx53.c')
-rw-r--r-- | arch/arm/mach-mx5/clock-mx51-mx53.c | 64 |
1 files changed, 46 insertions, 18 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 0adeea17d12..f7bf996f463 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c | |||
@@ -271,7 +271,11 @@ static int _clk_pll_enable(struct clk *clk) | |||
271 | int i = 0; | 271 | int i = 0; |
272 | 272 | ||
273 | pllbase = _get_pll_base(clk); | 273 | pllbase = _get_pll_base(clk); |
274 | reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; | 274 | reg = __raw_readl(pllbase + MXC_PLL_DP_CTL); |
275 | if (reg & MXC_PLL_DP_CTL_UPEN) | ||
276 | return 0; | ||
277 | |||
278 | reg |= MXC_PLL_DP_CTL_UPEN; | ||
275 | __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); | 279 | __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); |
276 | 280 | ||
277 | /* Wait for lock */ | 281 | /* Wait for lock */ |
@@ -1254,12 +1258,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, | |||
1254 | NULL, NULL, &ipg_clk, &aips_tz1_clk); | 1258 | NULL, NULL, &ipg_clk, &aips_tz1_clk); |
1255 | DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, | 1259 | DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, |
1256 | NULL, NULL, &ipg_clk, &spba_clk); | 1260 | NULL, NULL, &ipg_clk, &spba_clk); |
1261 | DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET, | ||
1262 | NULL, NULL, &ipg_clk, &spba_clk); | ||
1263 | DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET, | ||
1264 | NULL, NULL, &ipg_clk, &spba_clk); | ||
1257 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, | 1265 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, |
1258 | NULL, NULL, &uart_root_clk, &uart1_ipg_clk); | 1266 | NULL, NULL, &uart_root_clk, &uart1_ipg_clk); |
1259 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, | 1267 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, |
1260 | NULL, NULL, &uart_root_clk, &uart2_ipg_clk); | 1268 | NULL, NULL, &uart_root_clk, &uart2_ipg_clk); |
1261 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, | 1269 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, |
1262 | NULL, NULL, &uart_root_clk, &uart3_ipg_clk); | 1270 | NULL, NULL, &uart_root_clk, &uart3_ipg_clk); |
1271 | DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET, | ||
1272 | NULL, NULL, &uart_root_clk, &uart4_ipg_clk); | ||
1273 | DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET, | ||
1274 | NULL, NULL, &uart_root_clk, &uart5_ipg_clk); | ||
1263 | 1275 | ||
1264 | /* GPT */ | 1276 | /* GPT */ |
1265 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, | 1277 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, |
@@ -1279,6 +1291,8 @@ DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, | |||
1279 | NULL, NULL, &ipg_perclk, NULL); | 1291 | NULL, NULL, &ipg_perclk, NULL); |
1280 | DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, | 1292 | DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, |
1281 | NULL, NULL, &ipg_clk, NULL); | 1293 | NULL, NULL, &ipg_clk, NULL); |
1294 | DEFINE_CLOCK(i2c3_mx53_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, | ||
1295 | NULL, NULL, &ipg_perclk, NULL); | ||
1282 | 1296 | ||
1283 | /* FEC */ | 1297 | /* FEC */ |
1284 | DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, | 1298 | DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, |
@@ -1412,11 +1426,13 @@ DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET, | |||
1412 | }, | 1426 | }, |
1413 | 1427 | ||
1414 | static struct clk_lookup mx51_lookups[] = { | 1428 | static struct clk_lookup mx51_lookups[] = { |
1415 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | 1429 | /* i.mx51 has the i.mx21 type uart */ |
1416 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | 1430 | _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk) |
1417 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 1431 | _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk) |
1432 | _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk) | ||
1418 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 1433 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
1419 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 1434 | /* i.mx51 has the i.mx27 type fec */ |
1435 | _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) | ||
1420 | _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk) | 1436 | _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk) |
1421 | _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk) | 1437 | _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk) |
1422 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) | 1438 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) |
@@ -1436,7 +1452,8 @@ static struct clk_lookup mx51_lookups[] = { | |||
1436 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) | 1452 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
1437 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) | 1453 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
1438 | _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) | 1454 | _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) |
1439 | _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) | 1455 | /* i.mx51 has the i.mx35 type sdma */ |
1456 | _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) | ||
1440 | _REGISTER_CLOCK(NULL, "ckih", ckih_clk) | 1457 | _REGISTER_CLOCK(NULL, "ckih", ckih_clk) |
1441 | _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk) | 1458 | _REGISTER_CLOCK(NULL, "ckih2", ckih2_clk) |
1442 | _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk) | 1459 | _REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk) |
@@ -1444,10 +1461,10 @@ static struct clk_lookup mx51_lookups[] = { | |||
1444 | _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) | 1461 | _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) |
1445 | /* i.mx51 has the i.mx35 type cspi */ | 1462 | /* i.mx51 has the i.mx35 type cspi */ |
1446 | _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk) | 1463 | _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk) |
1447 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) | 1464 | _REGISTER_CLOCK("sdhci-esdhc-imx51.0", NULL, esdhc1_clk) |
1448 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) | 1465 | _REGISTER_CLOCK("sdhci-esdhc-imx51.1", NULL, esdhc2_clk) |
1449 | _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_clk) | 1466 | _REGISTER_CLOCK("sdhci-esdhc-imx51.2", NULL, esdhc3_clk) |
1450 | _REGISTER_CLOCK("sdhci-esdhc-imx.3", NULL, esdhc4_clk) | 1467 | _REGISTER_CLOCK("sdhci-esdhc-imx51.3", NULL, esdhc4_clk) |
1451 | _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk) | 1468 | _REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk) |
1452 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) | 1469 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) |
1453 | _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) | 1470 | _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) |
@@ -1460,25 +1477,36 @@ static struct clk_lookup mx51_lookups[] = { | |||
1460 | }; | 1477 | }; |
1461 | 1478 | ||
1462 | static struct clk_lookup mx53_lookups[] = { | 1479 | static struct clk_lookup mx53_lookups[] = { |
1463 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | 1480 | /* i.mx53 has the i.mx21 type uart */ |
1464 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | 1481 | _REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk) |
1465 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 1482 | _REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk) |
1483 | _REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk) | ||
1484 | _REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk) | ||
1485 | _REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk) | ||
1466 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 1486 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
1467 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 1487 | /* i.mx53 has the i.mx25 type fec */ |
1488 | _REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk) | ||
1468 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) | 1489 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) |
1469 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) | 1490 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) |
1470 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) | 1491 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) |
1471 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) | 1492 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk) |
1472 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_mx53_clk) | ||
1473 | _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_mx53_clk) | ||
1474 | _REGISTER_CLOCK("sdhci-esdhc-imx.3", NULL, esdhc4_mx53_clk) | ||
1475 | /* i.mx53 has the i.mx51 type ecspi */ | 1493 | /* i.mx53 has the i.mx51 type ecspi */ |
1476 | _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) | 1494 | _REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk) |
1477 | _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) | 1495 | _REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk) |
1478 | /* i.mx53 has the i.mx25 type cspi */ | 1496 | /* i.mx53 has the i.mx25 type cspi */ |
1479 | _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk) | 1497 | _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk) |
1498 | _REGISTER_CLOCK("sdhci-esdhc-imx53.0", NULL, esdhc1_clk) | ||
1499 | _REGISTER_CLOCK("sdhci-esdhc-imx53.1", NULL, esdhc2_mx53_clk) | ||
1500 | _REGISTER_CLOCK("sdhci-esdhc-imx53.2", NULL, esdhc3_mx53_clk) | ||
1501 | _REGISTER_CLOCK("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk) | ||
1480 | _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) | 1502 | _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) |
1481 | _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) | 1503 | _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) |
1504 | /* i.mx53 has the i.mx35 type sdma */ | ||
1505 | _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) | ||
1506 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) | ||
1507 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) | ||
1508 | _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) | ||
1509 | _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk) | ||
1482 | }; | 1510 | }; |
1483 | 1511 | ||
1484 | static void clk_tree_init(void) | 1512 | static void clk_tree_init(void) |