22 files changed, 2326 insertions, 0 deletions

diff --git a/arch/arm/mach-ixp23xx/Kconfig b/arch/arm/mach-ixp23xx/Kconfig
new file mode 100644
index 00000000000..982670ec386
--- /dev/null
+++ b/arch/arm/mach-ixp23xx/Kconfig
@@ -0,0 +1,25 @@
+if ARCH_IXP23XX
+
+config ARCH_SUPPORTS_BIG_ENDIAN
+        bool
+        default y
+
+menu "Intel IXP23xx Implementation Options"
+
+comment "IXP23xx Platforms"
+
+config MACH_ESPRESSO
+        bool "Support IP Fabrics Double Espresso platform"
+        help
+
+config MACH_IXDP2351
+        bool "Support Intel IXDP2351 platform"
+        help
+
+config MACH_ROADRUNNER
+        bool "Support ADI RoadRunner platform"
+        help
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-ixp23xx/Makefile b/arch/arm/mach-ixp23xx/Makefile
new file mode 100644
index 00000000000..288b371b6d0
--- /dev/null
+++ b/arch/arm/mach-ixp23xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for the linux kernel.
+#
+obj-y                   := core.o pci.o
+obj-m                   :=
+obj-n                   :=
+obj-                    :=
+
+obj-$(CONFIG_MACH_ESPRESSO)     += espresso.o
+obj-$(CONFIG_MACH_IXDP2351)     += ixdp2351.o
+obj-$(CONFIG_MACH_ROADRUNNER)   += roadrunner.o
diff --git a/arch/arm/mach-ixp23xx/Makefile.boot b/arch/arm/mach-ixp23xx/Makefile.boot
new file mode 100644
index 00000000000..d5561ad15ba
--- /dev/null
+++ b/arch/arm/mach-ixp23xx/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x00008000
+params_phys-y   := 0x00000100
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
new file mode 100644
index 00000000000..a1bee33d183
--- /dev/null
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -0,0 +1,446 @@
+/*
+ * arch/arm/mach-ixp23xx/core.c
+ *
+ * Core routines for IXP23xx chips
+ *
+ * Author: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * Copyright 2005 (c) MontaVista Software, Inc.
+ *
+ * Based on 2.4 code Copyright 2004 (c) Intel Corporation
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/serial.h>
+#include <linux/tty.h>
+#include <linux/bitops.h>
+#include <linux/serial_8250.h>
+#include <linux/serial_core.h>
+#include <linux/device.h>
+#include <linux/mm.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+
+#include <asm/types.h>
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <mach/hardware.h>
+#include <asm/irq.h>
+#include <asm/system.h>
+#include <asm/tlbflush.h>
+#include <asm/pgtable.h>
+
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/arch.h>
+
+
+/*************************************************************************
+ * Chip specific mappings shared by all IXP23xx systems
+ *************************************************************************/
+static struct map_desc ixp23xx_io_desc[] __initdata = {
+        { /* XSI-CPP CSRs */
+                .virtual        = IXP23XX_XSI2CPP_CSR_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_XSI2CPP_CSR_PHYS),
+                .length         = IXP23XX_XSI2CPP_CSR_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* Expansion Bus Config */
+                .virtual        = IXP23XX_EXP_CFG_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_EXP_CFG_PHYS),
+                .length         = IXP23XX_EXP_CFG_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACS,.... */
+                .virtual        = IXP23XX_PERIPHERAL_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_PERIPHERAL_PHYS),
+                .length         = IXP23XX_PERIPHERAL_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* CAP CSRs */
+                .virtual        = IXP23XX_CAP_CSR_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_CAP_CSR_PHYS),
+                .length         = IXP23XX_CAP_CSR_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* MSF CSRs */
+                .virtual        = IXP23XX_MSF_CSR_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_MSF_CSR_PHYS),
+                .length         = IXP23XX_MSF_CSR_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* PCI I/O Space */
+                .virtual        = IXP23XX_PCI_IO_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_PCI_IO_PHYS),
+                .length         = IXP23XX_PCI_IO_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* PCI Config Space */
+                .virtual        = IXP23XX_PCI_CFG_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_PCI_CFG_PHYS),
+                .length         = IXP23XX_PCI_CFG_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* PCI local CFG CSRs */
+                .virtual        = IXP23XX_PCI_CREG_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_PCI_CREG_PHYS),
+                .length         = IXP23XX_PCI_CREG_SIZE,
+                .type           = MT_DEVICE,
+        }, { /* PCI MEM Space */
+                .virtual        = IXP23XX_PCI_MEM_VIRT,
+                .pfn            = __phys_to_pfn(IXP23XX_PCI_MEM_PHYS),
+                .length         = IXP23XX_PCI_MEM_SIZE,
+                .type           = MT_DEVICE,
+        }
+};
+
+void __init ixp23xx_map_io(void)
+{
+        iotable_init(ixp23xx_io_desc, ARRAY_SIZE(ixp23xx_io_desc));
+}
+
+
+/***************************************************************************
+ * IXP23xx Interrupt Handling
+ ***************************************************************************/
+enum ixp23xx_irq_type {
+        IXP23XX_IRQ_LEVEL, IXP23XX_IRQ_EDGE
+};
+
+static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type);
+
+static int ixp23xx_irq_set_type(struct irq_data *d, unsigned int type)
+{
+        int line = d->irq - IRQ_IXP23XX_GPIO6 + 6;
+        u32 int_style;
+        enum ixp23xx_irq_type irq_type;
+        volatile u32 *int_reg;
+
+        /*
+         * Only GPIOs 6-15 are wired to interrupts on IXP23xx
+         */
+        if (line < 6 || line > 15)
+                return -EINVAL;
+
+        switch (type) {
+        case IRQ_TYPE_EDGE_BOTH:
+                int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL;
+                irq_type = IXP23XX_IRQ_EDGE;
+                break;
+        case IRQ_TYPE_EDGE_RISING:
+                int_style = IXP23XX_GPIO_STYLE_RISING_EDGE;
+                irq_type = IXP23XX_IRQ_EDGE;
+                break;
+        case IRQ_TYPE_EDGE_FALLING:
+                int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE;
+                irq_type = IXP23XX_IRQ_EDGE;
+                break;
+        case IRQ_TYPE_LEVEL_HIGH:
+                int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH;
+                irq_type = IXP23XX_IRQ_LEVEL;