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-* EMIF family of TI SDRAM controllers
-
-EMIF - External Memory Interface - is an SDRAM controller used in
-TI SoCs. EMIF supports, based on the IP revision, one or more of
-DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
-of the EMIF IP and memory parts attached to it.
-
-Required properties:
-- compatible    : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
-  is the IP revision of the specific EMIF instance.
-
-- phy-type      : <u32> indicating the DDR phy type. Following are the
-  allowed values
-  <1>   : Attila PHY
-  <2>   : Intelli PHY
-
-- device-handle : phandle to a "lpddr2" node representing the memory part
-
-- ti,hwmods     : For TI hwmods processing and omap device creation
-  the value shall be "emif<n>" where <n> is the number of the EMIF
-  instance with base 1.
-
-Optional properties:
-- cs1-used              : Have this property if CS1 of this EMIF
-  instance has a memory part attached to it. If there is a memory
-  part attached to CS1, it should be the same type as the one on CS0,
-  so there is no need to give the details of this memory part.
-
-- cal-resistor-per-cs   : Have this property if the board has one
-  calibration resistor per chip-select.
-
-- hw-caps-read-idle-ctrl: Have this property if the controller
-  supports read idle window programming
-
-- hw-caps-dll-calib-ctrl: Have this property if the controller
-  supports dll calibration control
-
-- hw-caps-ll-interface  : Have this property if the controller
-  has a low latency interface and corresponding interrupt events
-
-- hw-caps-temp-alert    : Have this property if the controller
-  has capability for generating SDRAM temperature alerts
-
-Example:
-
-emif1: emif@0x4c000000 {
-        compatible      = "ti,emif-4d";
-        ti,hwmods       = "emif2";
-        phy-type        = <1>;
-        device-handle   = <&elpida_ECB240ABACN>;
-        cs1-used;
-        hw-caps-read-idle-ctrl;
-        hw-caps-ll-interface;
-        hw-caps-temp-alert;
-};