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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-09-01 09:22:39 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 11:18:49 -0400
commit0dcdbe6add26719e956299eb519542f7d2f7d0a8 (patch)
tree25e77163c868914e5529670616cba8955942b0ea /include/asm-mips
parentae027ead87b13cff99b4f48da7696aa4fe75393b (diff)
MIPS: TXx9: Add TX4939 SoC support
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/pci/pci-tx4939.c create mode 100644 arch/mips/txx9/generic/irq_tx4939.c create mode 100644 arch/mips/txx9/generic/setup_tx4939.c create mode 100644 include/asm-mips/txx9/tx4939.h
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/txx9/tx4939.h544
1 files changed, 544 insertions, 0 deletions
diff --git a/include/asm-mips/txx9/tx4939.h b/include/asm-mips/txx9/tx4939.h
new file mode 100644
index 00000000000..7ce2dff3b7c
--- /dev/null
+++ b/include/asm-mips/txx9/tx4939.h
@@ -0,0 +1,544 @@
1/*
2 * Definitions for TX4939
3 *
4 * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 */
10#ifndef __ASM_TXX9_TX4939_H
11#define __ASM_TXX9_TX4939_H
12
13/* some controllers are compatible with 4927/4938 */
14#include <asm/txx9/tx4938.h>
15
16#ifdef CONFIG_64BIT
17#define TX4939_REG_BASE 0xffffffffff1f0000UL /* == TX4938_REG_BASE */
18#else
19#define TX4939_REG_BASE 0xff1f0000UL /* == TX4938_REG_BASE */
20#endif
21#define TX4939_REG_SIZE 0x00010000 /* == TX4938_REG_SIZE */
22
23#define TX4939_ATA_REG(ch) (TX4939_REG_BASE + 0x3000 + (ch) * 0x1000)
24#define TX4939_NDFMC_REG (TX4939_REG_BASE + 0x5000)
25#define TX4939_SRAMC_REG (TX4939_REG_BASE + 0x6000)
26#define TX4939_CRYPTO_REG (TX4939_REG_BASE + 0x6800)
27#define TX4939_PCIC1_REG (TX4939_REG_BASE + 0x7000)
28#define TX4939_DDRC_REG (TX4939_REG_BASE + 0x8000)
29#define TX4939_EBUSC_REG (TX4939_REG_BASE + 0x9000)
30#define TX4939_VPC_REG (TX4939_REG_BASE + 0xa000)
31#define TX4939_DMA_REG(ch) (TX4939_REG_BASE + 0xb000 + (ch) * 0x800)
32#define TX4939_PCIC_REG (TX4939_REG_BASE + 0xd000)
33#define TX4939_CCFG_REG (TX4939_REG_BASE + 0xe000)
34#define TX4939_IRC_REG (TX4939_REG_BASE + 0xe800)
35#define TX4939_NR_TMR 6 /* 0xf000,0xf100,0xf200,0xfd00,0xfe00,0xff00 */
36#define TX4939_TMR_REG(ch) \
37 (TX4939_REG_BASE + 0xf000 + ((ch) + ((ch) >= 3) * 10) * 0x100)
38#define TX4939_NR_SIO 4 /* 0xf300, 0xf400, 0xf380, 0xf480 */
39#define TX4939_SIO_REG(ch) \
40 (TX4939_REG_BASE + 0xf300 + (((ch) & 1) << 8) + (((ch) & 2) << 6))
41#define TX4939_ACLC_REG (TX4939_REG_BASE + 0xf700)
42#define TX4939_SPI_REG (TX4939_REG_BASE + 0xf800)
43#define TX4939_I2C_REG (TX4939_REG_BASE + 0xf900)
44#define TX4939_I2S_REG (TX4939_REG_BASE + 0xfa00)
45#define TX4939_RTC_REG (TX4939_REG_BASE + 0xfb00)
46#define TX4939_CIR_REG (TX4939_REG_BASE + 0xfc00)
47
48struct tx4939_le_reg {
49 __u32 r;
50 __u32 unused;
51};
52
53struct tx4939_ddrc_reg {
54 struct tx4939_le_reg ctl[47];
55 __u64 unused0[17];
56 __u64 winen;
57 __u64 win[4];
58};
59
60struct tx4939_ccfg_reg {
61 __u64 ccfg;
62 __u64 crir;
63 __u64 pcfg;
64 __u64 toea;
65 __u64 clkctr;
66 __u64 unused0;
67 __u64 garbc;
68 __u64 unused1[2];
69 __u64 ramp;
70 __u64 unused2[2];
71 __u64 dskwctrl;
72 __u64 mclkosc;
73 __u64 mclkctl;
74 __u64 unused3[17];
75 struct {
76 __u64 mr;
77 __u64 dr;
78 } gpio[2];
79};
80
81struct tx4939_irc_reg {
82 struct tx4939_le_reg den;
83 struct tx4939_le_reg scipb;
84 struct tx4939_le_reg dm[2];
85 struct tx4939_le_reg lvl[16];
86 struct tx4939_le_reg msk;
87 struct tx4939_le_reg edc;
88 struct tx4939_le_reg pnd0;
89 struct tx4939_le_reg cs;
90 struct tx4939_le_reg pnd1;
91 struct tx4939_le_reg dm2[2];
92 struct tx4939_le_reg dbr[2];
93 struct tx4939_le_reg dben;
94 struct tx4939_le_reg unused0[2];
95 struct tx4939_le_reg flag[2];
96 struct tx4939_le_reg pol;
97 struct tx4939_le_reg cnt;
98 struct tx4939_le_reg maskint;
99 struct tx4939_le_reg maskext;
100};
101
102struct tx4939_rtc_reg {
103 __u32 ctl;
104 __u32 adr;
105 __u32 dat;
106 __u32 tbc;
107};
108
109struct tx4939_crypto_reg {
110 struct tx4939_le_reg csr;
111 struct tx4939_le_reg idesptr;
112 struct tx4939_le_reg cdesptr;
113 struct tx4939_le_reg buserr;
114 struct tx4939_le_reg cip_tout;
115 struct tx4939_le_reg cir;
116 union {
117 struct {
118 struct tx4939_le_reg data[8];
119 struct tx4939_le_reg ctrl;
120 } gen;
121 struct {
122 struct {
123 struct tx4939_le_reg l;
124 struct tx4939_le_reg u;
125 } key[3], ini;
126 struct tx4939_le_reg ctrl;
127 } des;
128 struct {
129 struct tx4939_le_reg key[4];
130 struct tx4939_le_reg ini[4];
131 struct tx4939_le_reg ctrl;
132 } aes;
133 struct {
134 struct {
135 struct tx4939_le_reg l;
136 struct tx4939_le_reg u;
137 } cnt;
138 struct tx4939_le_reg ini[5];
139 struct tx4939_le_reg unused;
140 struct tx4939_le_reg ctrl;
141 } hash;
142 } cdr;
143 struct tx4939_le_reg unused0[7];
144 struct tx4939_le_reg rcsr;
145 struct tx4939_le_reg rpr;
146 __u64 rdr;
147 __u64 ror[3];
148 struct tx4939_le_reg unused1[2];
149 struct tx4939_le_reg xorslr;
150 struct tx4939_le_reg xorsur;
151};
152
153struct tx4939_crypto_desc {
154 __u32 src;
155 __u32 dst;
156 __u32 next;
157 __u32 ctrl;
158 __u32 index;
159 __u32 xor;
160};
161
162struct tx4939_vpc_reg {
163 struct tx4939_le_reg csr;
164 struct {
165 struct tx4939_le_reg ctrlA;
166 struct tx4939_le_reg ctrlB;
167 struct tx4939_le_reg idesptr;
168 struct tx4939_le_reg cdesptr;
169 } port[3];
170 struct tx4939_le_reg buserr;
171};
172
173struct tx4939_vpc_desc {
174 __u32 src;
175 __u32 next;
176 __u32 ctrl1;
177 __u32 ctrl2;
178};
179
180/*
181 * IRC
182 */
183#define TX4939_IR_NONE 0
184#define TX4939_IR_DDR 1
185#define TX4939_IR_WTOERR 2
186#define TX4939_NUM_IR_INT 3
187#define TX4939_IR_INT(n) (3 + (n))
188#define TX4939_NUM_IR_ETH 2
189#define TX4939_IR_ETH(n) ((n) ? 43 : 6)
190#define TX4939_IR_VIDEO 7
191#define TX4939_IR_CIR 8
192#define TX4939_NUM_IR_SIO 4
193#define TX4939_IR_SIO(n) ((n) ? 43 + (n) : 9) /* 9,44-46 */
194#define TX4939_NUM_IR_DMA 4
195#define TX4939_IR_DMA(ch, n) (((ch) ? 22 : 10) + (n)) /* 10-13,22-25 */
196#define TX4939_IR_IRC 14
197#define TX4939_IR_PDMAC 15
198#define TX4939_NUM_IR_TMR 6
199#define TX4939_IR_TMR(n) (((n) >= 3 ? 45 : 16) + (n)) /* 16-18,48-50 */
200#define TX4939_NUM_IR_ATA 2
201#define TX4939_IR_ATA(n) (19 + (n))
202#define TX4939_IR_ACLC 21
203#define TX4939_IR_CIPHER 26
204#define TX4939_IR_INTA 27
205#define TX4939_IR_INTB 28
206#define TX4939_IR_INTC 29
207#define TX4939_IR_INTD 30
208#define TX4939_IR_I2C 33
209#define TX4939_IR_SPI 34
210#define TX4939_IR_PCIC 35