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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2009-12-11 15:23:14 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-12-11 15:23:14 -0500
commit52b81c89e564cdde8f2b4ccd0e314f04f8f23ab9 (patch)
treea748b608d37aed19749ab3b815b03e4806fed561 /drivers/staging/rt2860
parent0f65bec15b2184dcf98dbdbf03187057de842eb5 (diff)
Staging: rt28x0: run *.h files through Lindent
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/rt2860')
-rw-r--r--drivers/staging/rt2860/ap.h42
-rw-r--r--drivers/staging/rt2860/chip/mac_pci.h149
-rw-r--r--drivers/staging/rt2860/chip/mac_usb.h252
-rw-r--r--drivers/staging/rt2860/chip/rt2860.h6
-rw-r--r--drivers/staging/rt2860/chip/rt2870.h3
-rw-r--r--drivers/staging/rt2860/chip/rt3070.h1
-rw-r--r--drivers/staging/rt2860/chip/rt3090.h6
-rw-r--r--drivers/staging/rt2860/chip/rt30xx.h1
-rw-r--r--drivers/staging/rt2860/chip/rtmp_mac.h1664
-rw-r--r--drivers/staging/rt2860/chip/rtmp_phy.h46
-rw-r--r--drivers/staging/rt2860/chlist.h39
-rw-r--r--drivers/staging/rt2860/common/action.h27
-rw-r--r--drivers/staging/rt2860/crypt_hmac.h22
-rw-r--r--drivers/staging/rt2860/crypt_md5.h34
-rw-r--r--drivers/staging/rt2860/crypt_sha2.h34
-rw-r--r--drivers/staging/rt2860/dfs.h4
-rw-r--r--drivers/staging/rt2860/eeprom.h25
-rw-r--r--drivers/staging/rt2860/iface/rtmp_pci.h3
-rw-r--r--drivers/staging/rt2860/iface/rtmp_usb.h18
-rw-r--r--drivers/staging/rt2860/mlme.h1229
-rw-r--r--drivers/staging/rt2860/oid.h871
-rw-r--r--drivers/staging/rt2860/rt_config.h3
-rw-r--r--drivers/staging/rt2860/rt_linux.h155
-rw-r--r--drivers/staging/rt2860/rtmp.h6889
-rw-r--r--drivers/staging/rt2860/rtmp_chip.h164
-rw-r--r--drivers/staging/rt2860/rtmp_ckipmic.h43
-rw-r--r--drivers/staging/rt2860/rtmp_def.h358
-rw-r--r--drivers/staging/rt2860/rtmp_dot11.h106
-rw-r--r--drivers/staging/rt2860/rtmp_iface.h47
-rw-r--r--drivers/staging/rt2860/rtmp_mcu.h16
-rw-r--r--drivers/staging/rt2860/rtmp_os.h50
-rw-r--r--drivers/staging/rt2860/rtmp_timer.h63
-rw-r--r--drivers/staging/rt2860/rtmp_type.h123
-rw-r--r--drivers/staging/rt2860/rtusb_io.h52
-rw-r--r--drivers/staging/rt2860/spectrum.h176
-rw-r--r--drivers/staging/rt2860/spectrum_def.h79
-rw-r--r--drivers/staging/rt2860/wpa.h353
37 files changed, 5734 insertions, 7419 deletions
diff --git a/drivers/staging/rt2860/ap.h b/drivers/staging/rt2860/ap.h
index 6c58ce8ef95..97da74984e2 100644
--- a/drivers/staging/rt2860/ap.h
+++ b/drivers/staging/rt2860/ap.h
@@ -41,40 +41,26 @@
41#define __AP_H__ 41#define __AP_H__
42 42
43// ap_wpa.c 43// ap_wpa.c
44VOID WpaStateMachineInit( 44VOID WpaStateMachineInit(IN PRTMP_ADAPTER pAd,
45 IN PRTMP_ADAPTER pAd, 45 IN STATE_MACHINE * Sm, OUT STATE_MACHINE_FUNC Trans[]);
46 IN STATE_MACHINE *Sm,
47 OUT STATE_MACHINE_FUNC Trans[]);
48 46
49#ifdef RTMP_MAC_USB 47#ifdef RTMP_MAC_USB
50VOID BeaconUpdateExec( 48VOID BeaconUpdateExec(IN PVOID SystemSpecific1,
51 IN PVOID SystemSpecific1, 49 IN PVOID FunctionContext,
52 IN PVOID FunctionContext, 50 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
53 IN PVOID SystemSpecific2,
54 IN PVOID SystemSpecific3);
55#endif // RTMP_MAC_USB // 51#endif // RTMP_MAC_USB //
56 52
57VOID RTMPSetPiggyBack( 53VOID RTMPSetPiggyBack(IN PRTMP_ADAPTER pAd, IN BOOLEAN bPiggyBack);
58 IN PRTMP_ADAPTER pAd,
59 IN BOOLEAN bPiggyBack);
60 54
61VOID MacTableReset( 55VOID MacTableReset(IN PRTMP_ADAPTER pAd);
62 IN PRTMP_ADAPTER pAd);
63 56
64MAC_TABLE_ENTRY *MacTableInsertEntry( 57MAC_TABLE_ENTRY *MacTableInsertEntry(IN PRTMP_ADAPTER pAd,
65 IN PRTMP_ADAPTER pAd, 58 IN PUCHAR pAddr,
66 IN PUCHAR pAddr, 59 IN UCHAR apidx, IN BOOLEAN CleanAll);
67 IN UCHAR apidx,
68 IN BOOLEAN CleanAll);
69 60
70BOOLEAN MacTableDeleteEntry( 61BOOLEAN MacTableDeleteEntry(IN PRTMP_ADAPTER pAd,
71 IN PRTMP_ADAPTER pAd, 62 IN USHORT wcid, IN PUCHAR pAddr);
72 IN USHORT wcid,
73 IN PUCHAR pAddr);
74 63
75MAC_TABLE_ENTRY *MacTableLookup( 64MAC_TABLE_ENTRY *MacTableLookup(IN PRTMP_ADAPTER pAd, IN PUCHAR pAddr);
76 IN PRTMP_ADAPTER pAd,
77 IN PUCHAR pAddr);
78
79#endif // __AP_H__
80 65
66#endif // __AP_H__
diff --git a/drivers/staging/rt2860/chip/mac_pci.h b/drivers/staging/rt2860/chip/mac_pci.h
index 61b3f82315a..b0aa0d37a61 100644
--- a/drivers/staging/rt2860/chip/mac_pci.h
+++ b/drivers/staging/rt2860/chip/mac_pci.h
@@ -43,7 +43,6 @@
43#include "../rtmp_iface.h" 43#include "../rtmp_iface.h"
44#include "../rtmp_dot11.h" 44#include "../rtmp_dot11.h"
45 45
46
47// 46//
48// Device ID & Vendor ID related definitions, 47// Device ID & Vendor ID related definitions,
49// NOTE: you should not add the new VendorID/DeviceID here unless you not sure it belongs to what chip. 48// NOTE: you should not add the new VendorID/DeviceID here unless you not sure it belongs to what chip.
@@ -61,10 +60,6 @@
61#define PCI_CLASS_BRIDGE_PCI 0x0604 60#define PCI_CLASS_BRIDGE_PCI 0x0604
62#endif 61#endif
63 62
64
65
66
67
68#define TXINFO_SIZE 0 63#define TXINFO_SIZE 0
69#define RTMP_PKT_TAIL_PADDING 0 64#define RTMP_PKT_TAIL_PADDING 0
70#define fRTMP_ADAPTER_NEED_STOP_TX 0 65#define fRTMP_ADAPTER_NEED_STOP_TX 0
@@ -72,86 +67,83 @@
72#define AUX_CTRL 0x10c 67#define AUX_CTRL 0x10c
73 68
74// 69//
75// TX descriptor format, Tx ring, Mgmt Ring 70// TX descriptor format, Tx ring, Mgmt Ring
76// 71//
77typedef struct PACKED _TXD_STRUC { 72typedef struct PACKED _TXD_STRUC {
78 // Word 0 73 // Word 0
79 UINT32 SDPtr0; 74 UINT32 SDPtr0;
80 // Word 1 75 // Word 1
81 UINT32 SDLen1:14; 76 UINT32 SDLen1:14;
82 UINT32 LastSec1:1; 77 UINT32 LastSec1:1;
83 UINT32 Burst:1; 78 UINT32 Burst:1;
84 UINT32 SDLen0:14; 79 UINT32 SDLen0:14;
85 UINT32 LastSec0:1; 80 UINT32 LastSec0:1;
86 UINT32 DMADONE:1; 81 UINT32 DMADONE:1;
87 //Word2 82 //Word2
88 UINT32 SDPtr1; 83 UINT32 SDPtr1;
89 //Word3 84 //Word3
90 UINT32 rsv2:24; 85 UINT32 rsv2:24;
91 UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition 86 UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition
92 UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA 87 UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
93 UINT32 rsv:2; 88 UINT32 rsv:2;
94 UINT32 TCO:1; // 89 UINT32 TCO:1; //
95 UINT32 UCO:1; // 90 UINT32 UCO:1; //
96 UINT32 ICO:1; // 91 UINT32 ICO:1; //
97} TXD_STRUC, *PTXD_STRUC; 92} TXD_STRUC, *PTXD_STRUC;
98
99 93
100// 94//
101// Rx descriptor format, Rx Ring 95// Rx descriptor format, Rx Ring
102// 96//
103typedef struct PACKED _RXD_STRUC{ 97typedef struct PACKED _RXD_STRUC {
104 // Word 0 98 // Word 0
105 UINT32 SDP0; 99 UINT32 SDP0;
106 // Word 1 100 // Word 1
107 UINT32 SDL1:14; 101 UINT32 SDL1:14;
108 UINT32 Rsv:2; 102 UINT32 Rsv:2;
109 UINT32 SDL0:14; 103 UINT32 SDL0:14;
110 UINT32 LS0:1; 104 UINT32 LS0:1;
111 UINT32 DDONE:1; 105 UINT32 DDONE:1;
112 // Word 2 106 // Word 2
113 UINT32 SDP1; 107 UINT32 SDP1;
114 // Word 3 108 // Word 3
115 UINT32 BA:1; 109 UINT32 BA:1;
116 UINT32 DATA:1; 110 UINT32 DATA:1;
117 UINT32 NULLDATA:1; 111 UINT32 NULLDATA:1;
118 UINT32 FRAG:1; 112 UINT32 FRAG:1;
119 UINT32 U2M:1; // 1: this RX frame is unicast to me 113 UINT32 U2M:1; // 1: this RX frame is unicast to me
120 UINT32 Mcast:1; // 1: this is a multicast frame 114 UINT32 Mcast:1; // 1: this is a multicast frame
121 UINT32 Bcast:1; // 1: this is a broadcast frame 115 UINT32 Bcast:1; // 1: this is a broadcast frame
122 UINT32 MyBss:1; // 1: this frame belongs to the same BSSID 116 UINT32 MyBss:1; // 1: this frame belongs to the same BSSID
123 UINT32 Crc:1; // 1: CRC error 117 UINT32 Crc:1; // 1: CRC error
124 UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid 118 UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
125 UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header. 119 UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header.
126 UINT32 HTC:1; 120 UINT32 HTC:1;
127 UINT32 RSSI:1; 121 UINT32 RSSI:1;
128 UINT32 L2PAD:1; 122 UINT32 L2PAD:1;
129 UINT32 AMPDU:1; 123 UINT32 AMPDU:1;
130 UINT32 Decrypted:1; // this frame is being decrypted. 124 UINT32 Decrypted:1; // this frame is being decrypted.
131 UINT32 PlcpSignal:1; // To be moved 125 UINT32 PlcpSignal:1; // To be moved
132 UINT32 PlcpRssil:1;// To be moved 126 UINT32 PlcpRssil:1; // To be moved
133 UINT32 Rsv1:13; 127 UINT32 Rsv1:13;
134} RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC; 128} RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
135 129
136typedef union _TX_ATTENUATION_CTRL_STRUC { 130typedef union _TX_ATTENUATION_CTRL_STRUC {
137 struct 131 struct {
138 { 132 ULONG RF_ISOLATION_ENABLE:1;
139 ULONG RF_ISOLATION_ENABLE:1; 133 ULONG Reserve2:7;
140 ULONG Reserve2:7; 134 ULONG PCIE_PHY_TX_ATTEN_VALUE:3;
141 ULONG PCIE_PHY_TX_ATTEN_VALUE:3; 135 ULONG PCIE_PHY_TX_ATTEN_EN:1;
142 ULONG PCIE_PHY_TX_ATTEN_EN:1; 136 ULONG Reserve1:20;
143 ULONG Reserve1:20;
144 } field; 137 } field;
145 138
146 ULONG word; 139 ULONG word;
147} TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC; 140} TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC;
148 141
149/* ----------------- EEPROM Related MACRO ----------------- */ 142/* ----------------- EEPROM Related MACRO ----------------- */
150 143
151// 8051 firmware image for RT2860 - base address = 0x4000 144// 8051 firmware image for RT2860 - base address = 0x4000
152#define FIRMWARE_IMAGE_BASE 0x2000 145#define FIRMWARE_IMAGE_BASE 0x2000
153#define MAX_FIRMWARE_IMAGE_SIZE 0x2000 // 8kbyte 146#define MAX_FIRMWARE_IMAGE_SIZE 0x2000 // 8kbyte
154
155 147
156/* ----------------- Frimware Related MACRO ----------------- */ 148/* ----------------- Frimware Related MACRO ----------------- */
157#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \ 149#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
@@ -175,14 +167,12 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
175 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \ 167 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \
176 }while(0) 168 }while(0)
177 169
178
179/* ----------------- TX Related MACRO ----------------- */ 170/* ----------------- TX Related MACRO ----------------- */
180#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0) 171#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
181#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0) 172#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
182 173
183
184#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \ 174#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
185 ((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */ 175 ((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
186#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \ 176#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
187 do{}while(0) 177 do{}while(0)
188 178
@@ -190,12 +180,11 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
190 (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3)) 180 (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
191 //(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/)) 181 //(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
192 182
193
194#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \ 183#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
195 RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) 184 RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
196 185
197#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \ 186#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
198 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)*/ 187 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) */
199 188
200#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \ 189#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \
201 RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) 190 RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
@@ -210,7 +199,7 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
210 RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) 199 RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
211 200
212#define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \ 201#define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \
213 /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx)*/ 202 /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx) */
214 203
215#define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \ 204#define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \
216 RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx) 205 RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx)
@@ -225,17 +214,14 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
225 : \ 214 : \
226 (_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1); 215 (_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1);
227 216
228
229#define GET_MGMTRING_FREENO(_pAd) \ 217#define GET_MGMTRING_FREENO(_pAd) \
230 (_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \ 218 (_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \
231 (_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \ 219 (_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \
232 : \ 220 : \
233 (_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1); 221 (_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1);
234 222
235
236/* ----------------- RX Related MACRO ----------------- */ 223/* ----------------- RX Related MACRO ----------------- */
237 224
238
239/* ----------------- ASIC Related MACRO ----------------- */ 225/* ----------------- ASIC Related MACRO ----------------- */
240// reset MAC of a station entry to 0x000000000000 226// reset MAC of a station entry to 0x000000000000
241#define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid) \ 227#define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid) \
@@ -272,7 +258,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
272 pAd->SharedKey[apidx][KeyID].CipherAlg, \ 258 pAd->SharedKey[apidx][KeyID].CipherAlg, \
273 pEntry); } 259 pEntry); }
274 260
275
276// Insert the BA bitmap to ASIC for the Wcid entry 261// Insert the BA bitmap to ASIC for the Wcid entry
277#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \ 262#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
278 do{ \ 263 do{ \
@@ -283,9 +268,8 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
283 RTMP_IO_WRITE32((_pAd), _Offset, _Value);\ 268 RTMP_IO_WRITE32((_pAd), _Offset, _Value);\
284 }while(0) 269 }while(0)
285 270
286
287// Remove the BA bitmap from ASIC for the Wcid entry 271// Remove the BA bitmap from ASIC for the Wcid entry
288// bitmap field starts at 0x10000 in ASIC WCID table 272// bitmap field starts at 0x10000 in ASIC WCID table
289#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \ 273#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
290 do{ \ 274 do{ \
291 UINT32 _Value = 0, _Offset; \ 275 UINT32 _Value = 0, _Offset; \
@@ -295,7 +279,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
295 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \ 279 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
296 }while(0) 280 }while(0)
297 281
298
299/* ----------------- Interface Related MACRO ----------------- */ 282/* ----------------- Interface Related MACRO ----------------- */
300 283
301// 284//
@@ -314,7 +297,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
314 RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \ 297 RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \
315 }while(0) 298 }while(0)
316 299
317
318#define RTMP_IRQ_INIT(pAd) \ 300#define RTMP_IRQ_INIT(pAd) \
319 { pAd->int_enable_reg = ((DELAYINTMASK) | \ 301 { pAd->int_enable_reg = ((DELAYINTMASK) | \
320 (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \ 302 (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \
@@ -326,7 +308,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
326 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\ 308 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\
327 RTMP_ASIC_INTERRUPT_ENABLE(pAd); } 309 RTMP_ASIC_INTERRUPT_ENABLE(pAd); }
328 310
329
330/* ----------------- MLME Related MACRO ----------------- */ 311/* ----------------- MLME Related MACRO ----------------- */
331#define RTMP_MLME_HANDLER(pAd) MlmeHandler(pAd) 312#define RTMP_MLME_HANDLER(pAd) MlmeHandler(pAd)
332 313
@@ -344,7 +325,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
344/* ----------------- Power Save Related MACRO ----------------- */ 325/* ----------------- Power Save Related MACRO ----------------- */
345#define RTMP_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd) 326#define RTMP_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd)
346 327
347
348// For RTMPPCIePowerLinkCtrlRestore () function 328// For RTMPPCIePowerLinkCtrlRestore () function
349#define RESTORE_HALT 1 329#define RESTORE_HALT 1
350#define RESTORE_WAKEUP 2 330#define RESTORE_WAKEUP 2
@@ -358,7 +338,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
358#define CID2MASK 0x00ff0000 338#define CID2MASK 0x00ff0000
359#define CID3MASK 0xff000000 339#define CID3MASK 0xff000000
360 340
361
362#define RTMP_STA_FORCE_WAKEUP(pAd, bFromTx) \ 341#define RTMP_STA_FORCE_WAKEUP(pAd, bFromTx) \
363 RT28xxPciStaAsicForceWakeup(pAd, bFromTx); 342 RT28xxPciStaAsicForceWakeup(pAd, bFromTx);
364 343
diff --git a/drivers/staging/rt2860/chip/mac_usb.h b/drivers/staging/rt2860/chip/mac_usb.h
index 5a858837742..8ce69697492 100644
--- a/drivers/staging/rt2860/chip/mac_usb.h
+++ b/drivers/staging/rt2860/chip/mac_usb.h
@@ -43,13 +43,12 @@
43#include "../rtmp_iface.h" 43#include "../rtmp_iface.h"
44#include "../rtmp_dot11.h" 44#include "../rtmp_dot11.h"
45 45
46
47#define USB_CYC_CFG 0x02a4 46#define USB_CYC_CFG 0x02a4
48 47
49#define BEACON_RING_SIZE 2 48#define BEACON_RING_SIZE 2
50#define MGMTPIPEIDX 0 // EP6 is highest priority 49#define MGMTPIPEIDX 0 // EP6 is highest priority
51 50
52#define RTMP_PKT_TAIL_PADDING 11 // 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding) 51#define RTMP_PKT_TAIL_PADDING 11 // 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding)
53 52
54#define fRTMP_ADAPTER_NEED_STOP_TX \ 53#define fRTMP_ADAPTER_NEED_STOP_TX \
55 (fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS | \ 54 (fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_HALT_IN_PROGRESS | \
@@ -62,157 +61,146 @@
62#define RXINFO_SIZE 4 61#define RXINFO_SIZE 4
63#define RT2870_RXDMALEN_FIELD_SIZE 4 62#define RT2870_RXDMALEN_FIELD_SIZE 4
64 63
65typedef struct PACKED _RXINFO_STRUC { 64typedef struct PACKED _RXINFO_STRUC {
66 UINT32 BA:1; 65 UINT32 BA:1;
67 UINT32 DATA:1; 66 UINT32 DATA:1;
68 UINT32 NULLDATA:1; 67 UINT32 NULLDATA:1;
69 UINT32 FRAG:1; 68 UINT32 FRAG:1;
70 UINT32 U2M:1; // 1: this RX frame is unicast to me 69 UINT32 U2M:1; // 1: this RX frame is unicast to me
71 UINT32 Mcast:1; // 1: this is a multicast frame 70 UINT32 Mcast:1; // 1: this is a multicast frame
72 UINT32 Bcast:1; // 1: this is a broadcast frame 71 UINT32 Bcast:1; // 1: this is a broadcast frame
73 UINT32 MyBss:1; // 1: this frame belongs to the same BSSID 72 UINT32 MyBss:1; // 1: this frame belongs to the same BSSID
74 UINT32 Crc:1; // 1: CRC error 73 UINT32 Crc:1; // 1: CRC error
75 UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid 74 UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
76 UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header. 75 UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header.
77 UINT32 HTC:1; 76 UINT32 HTC:1;
78 UINT32 RSSI:1; 77 UINT32 RSSI:1;
79 UINT32 L2PAD:1; 78 UINT32 L2PAD:1;
80 UINT32 AMPDU:1; // To be moved 79 UINT32 AMPDU:1; // To be moved
81 UINT32 Decrypted:1; 80 UINT32 Decrypted:1;
82 UINT32 PlcpRssil:1; 81 UINT32 PlcpRssil:1;
83 UINT32 CipherAlg:1; 82 UINT32 CipherAlg:1;
84 UINT32 LastAMSDU:1; 83 UINT32 LastAMSDU:1;
85 UINT32 PlcpSignal:12; 84 UINT32 PlcpSignal:12;
86} RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC; 85} RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
87
88 86
89// 87//
90// TXINFO 88// TXINFO
91// 89//
92#define TXINFO_SIZE 4 90#define TXINFO_SIZE 4
93 91
94typedef struct _TXINFO_STRUC { 92typedef struct _TXINFO_STRUC {
95 // Word 0 93 // Word 0
96 UINT32 USBDMATxPktLen:16; //used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame. 94 UINT32 USBDMATxPktLen:16; //used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame.
97 UINT32 rsv:8; 95 UINT32 rsv:8;
98 UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition 96 UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition
99 UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA 97 UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
100 UINT32 SwUseLastRound:1; // Software use. 98 UINT32 SwUseLastRound:1; // Software use.
101 UINT32 rsv2:2; // Software use. 99 UINT32 rsv2:2; // Software use.
102 UINT32 USBDMANextVLD:1; //used ONLY in USB bulk Aggregation, NextValid 100 UINT32 USBDMANextVLD:1; //used ONLY in USB bulk Aggregation, NextValid
103 UINT32 USBDMATxburst:1;//used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint 101 UINT32 USBDMATxburst:1; //used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint
104} TXINFO_STRUC, *PTXINFO_STRUC; 102} TXINFO_STRUC, *PTXINFO_STRUC;
105
106 103
107// 104//
108// Management ring buffer format 105// Management ring buffer format
109// 106//
110typedef struct _MGMT_STRUC { 107typedef struct _MGMT_STRUC {
111 BOOLEAN Valid; 108 BOOLEAN Valid;
112 PUCHAR pBuffer; 109 PUCHAR pBuffer;
113 ULONG Length; 110 ULONG Length;
114} MGMT_STRUC, *PMGMT_STRUC; 111} MGMT_STRUC, *PMGMT_STRUC;
115
116 112
117//////////////////////////////////////////////////////////////////////////// 113////////////////////////////////////////////////////////////////////////////
118// The TX_BUFFER structure forms the transmitted USB packet to the device 114// The TX_BUFFER structure forms the transmitted USB packet to the device
119//////////////////////////////////////////////////////////////////////////// 115////////////////////////////////////////////////////////////////////////////
120typedef struct __TX_BUFFER{ 116typedef struct __TX_BUFFER {
121 union{ 117 union {
122 UCHAR WirelessPacket[TX_BUFFER_NORMSIZE]; 118 UCHAR WirelessPacket[TX_BUFFER_NORMSIZE];
123 HEADER_802_11 NullFrame; 119 HEADER_802_11 NullFrame;
124 PSPOLL_FRAME PsPollPacket; 120 PSPOLL_FRAME PsPollPacket;
125 RTS_FRAME RTSFrame; 121 RTS_FRAME RTSFrame;
126 }field; 122 } field;
127 UCHAR Aggregation[4]; //Buffer for save Aggregation size. 123 UCHAR Aggregation[4]; //Buffer for save Aggregation size.
128} TX_BUFFER, *PTX_BUFFER; 124} TX_BUFFER, *PTX_BUFFER;
129 125
130typedef struct __HTTX_BUFFER{ 126typedef struct __HTTX_BUFFER {
131 union{ 127 union {
132 UCHAR WirelessPacket[MAX_TXBULK_SIZE]; 128 UCHAR WirelessPacket[MAX_TXBULK_SIZE];
133 HEADER_802_11 NullFrame; 129 HEADER_802_11 NullFrame;
134 PSPOLL_FRAME PsPollPacket; 130 PSPOLL_FRAME PsPollPacket;
135 RTS_FRAME RTSFrame; 131 RTS_FRAME RTSFrame;
136 }field; 132 } field;
137 UCHAR Aggregation[4]; //Buffer for save Aggregation size. 133 UCHAR Aggregation[4]; //Buffer for save Aggregation size.
138} HTTX_BUFFER, *PHTTX_BUFFER; 134} HTTX_BUFFER, *PHTTX_BUFFER;
139 135
140
141// used to track driver-generated write irps 136// used to track driver-generated write irps
142typedef struct _TX_CONTEXT 137typedef struct _TX_CONTEXT {
143{ 138 PVOID pAd; //Initialized in MiniportInitialize
144 PVOID pAd; //Initialized in MiniportInitialize 139 PURB pUrb; //Initialized in MiniportInitialize
145 PURB pUrb; //Initialized in MiniportInitialize 140 PIRP pIrp; //used to cancel pending bulk out.
146 PIRP pIrp; //used to cancel pending bulk out. 141 //Initialized in MiniportInitialize
147 //Initialized in MiniportInitialize 142 PTX_BUFFER TransferBuffer; //Initialized in MiniportInitialize
148 PTX_BUFFER TransferBuffer; //Initialized in MiniportInitialize 143 ULONG BulkOutSize;
149 ULONG BulkOutSize; 144 UCHAR BulkOutPipeId;
150 UCHAR BulkOutPipeId; 145 UCHAR SelfIdx;
151 UCHAR SelfIdx; 146 BOOLEAN InUse;
152 BOOLEAN InUse; 147 BOOLEAN bWaitingBulkOut; // at least one packet is in this TxContext, ready for making IRP anytime.
153 BOOLEAN bWaitingBulkOut; // at least one packet is in this TxContext, ready for making IRP anytime. 148 BOOLEAN bFullForBulkOut; // all tx buffer are full , so waiting for tx bulkout.
154 BOOLEAN bFullForBulkOut; // all tx buffer are full , so waiting for tx bulkout. 149 BOOLEAN IRPPending;
155 BOOLEAN IRPPending; 150 BOOLEAN LastOne;
156 BOOLEAN LastOne; 151 BOOLEAN bAggregatible;
157 BOOLEAN bAggregatible; 152 UCHAR Header_802_3[LENGTH_802_3];
158 UCHAR Header_802_3[LENGTH_802_3]; 153 UCHAR Rsv[2];
159 UCHAR Rsv[2]; 154 ULONG DataOffset;
160 ULONG DataOffset; 155 UINT TxRate;
161 UINT TxRate; 156 dma_addr_t data_dma; // urb dma on linux
162 dma_addr_t data_dma; // urb dma on linux 157
163 158} TX_CONTEXT, *PTX_CONTEXT, **PPTX_CONTEXT;
164} TX_CONTEXT, *PTX_CONTEXT, **PPTX_CONTEXT;
165
166 159
167// used to track driver-generated write irps 160// used to track driver-generated write irps
168typedef struct _HT_TX_CONTEXT 161typedef struct _HT_TX_CONTEXT {
169{ 162 PVOID pAd; //Initialized in MiniportInitialize
170 PVOID pAd; //Initialized in MiniportInitialize 163 PURB pUrb; //Initialized in MiniportInitialize
171 PURB pUrb; //Initialized in MiniportInitialize 164 PIRP pIrp; //used to cancel pending bulk out.
172 PIRP pIrp; //used to cancel pending bulk out. 165 //Initialized in MiniportInitialize
173 //Initialized in MiniportInitialize 166 PHTTX_BUFFER TransferBuffer; //Initialized in MiniportInitialize
174 PHTTX_BUFFER TransferBuffer; //Initialized in MiniportInitialize 167 ULONG BulkOutSize; // Indicate the total bulk-out size in bytes in one bulk-transmission
175 ULONG BulkOutSize; // Indicate the total bulk-out size in bytes in one bulk-transmission 168 UCHAR BulkOutPipeId;
176 UCHAR BulkOutPipeId; 169 BOOLEAN IRPPending;
177 BOOLEAN IRPPending; 170 BOOLEAN LastOne;
178 BOOLEAN LastOne; 171 BOOLEAN bCurWriting;
179 BOOLEAN bCurWriting; 172 BOOLEAN bRingEmpty;
180 BOOLEAN bRingEmpty; 173 BOOLEAN bCopySavePad;
181 BOOLEAN bCopySavePad; 174 UCHAR SavedPad[8];
182 UCHAR SavedPad[8]; 175 UCHAR Header_802_3[LENGTH_802_3];
183 UCHAR Header_802_3[LENGTH_802_3]; 176 ULONG CurWritePosition; // Indicate the buffer offset which packet will be inserted start from.
184 ULONG CurWritePosition; // Indicate the buffer offset which packet will be inserted start from. 177 ULONG CurWriteRealPos; // Indicate the buffer offset which packet now are writing to.
185 ULONG CurWriteRealPos; // Indicate the buffer offset which packet now are writing to. 178 ULONG NextBulkOutPosition; // Indicate the buffer start offset of a bulk-transmission
186 ULONG NextBulkOutPosition; // Indicate the buffer start offset of a bulk-transmission 179 ULONG ENextBulkOutPosition; // Indicate the buffer end offset of a bulk-transmission
187 ULONG ENextBulkOutPosition; // Indicate the buffer end offset of a bulk-transmission 180 UINT TxRate;
188 UINT TxRate; 181 dma_addr_t data_dma; // urb dma on linux
189 dma_addr_t data_dma; // urb dma on linux 182} HT_TX_CONTEXT, *PHT_TX_CONTEXT, **PPHT_TX_CONTEXT;
190} HT_TX_CONTEXT, *PHT_TX_CONTEXT, **PPHT_TX_CONTEXT;
191
192 183
193// 184//
194// Structure to keep track of receive packets and buffers to indicate 185// Structure to keep track of receive packets and buffers to indicate
195// receive data to the protocol. 186// receive data to the protocol.
196// 187//
197typedef struct _RX_CONTEXT 188typedef struct _RX_CONTEXT {
198{ 189 PUCHAR TransferBuffer;
199 PUCHAR TransferBuffer; 190 PVOID pAd;
200 PVOID pAd; 191 PIRP pIrp; //used to cancel pending bulk in.
201 PIRP pIrp;//used to cancel pending bulk in. 192 PURB pUrb;
202 PURB pUrb;
203 //These 2 Boolean shouldn't both be 1 at the same time. 193 //These 2 Boolean shouldn't both be 1 at the same time.
204 ULONG BulkInOffset; // number of packets waiting for reordering . 194 ULONG BulkInOffset; // number of packets waiting for reordering .
205// BOOLEAN ReorderInUse; // At least one packet in this buffer are in reordering buffer and wait for receive indication 195// BOOLEAN ReorderInUse; // At least one packet in this buffer are in reordering buffer and wait for receive indication
206 BOOLEAN bRxHandling; // Notify this packet is being process now. 196 BOOLEAN bRxHandling; // Notify this packet is being process now.
207 BOOLEAN InUse; // USB Hardware Occupied. Wait for USB HW to put packet. 197 BOOLEAN InUse; // USB Hardware Occupied. Wait for USB HW to put packet.
208 BOOLEAN Readable; // Receive Complete back. OK for driver to indicate receiving packet. 198 BOOLEAN Readable; // Receive Complete back. OK for driver to indicate receiving packet.
209 BOOLEAN IRPPending; // TODO: To be removed 199 BOOLEAN IRPPending; // TODO: To be removed
210 atomic_t IrpLock; 200 atomic_t IrpLock;
211 NDIS_SPIN_LOCK RxContextLock; 201 NDIS_SPIN_LOCK RxContextLock;
212 dma_addr_t data_dma; // urb dma on linux 202 dma_addr_t data_dma; // urb dma on linux
213} RX_CONTEXT, *PRX_CONTEXT; 203} RX_CONTEXT, *PRX_CONTEXT;
214
215
216 204
217/****************************************************************************** 205/******************************************************************************
218 206
@@ -221,13 +209,11 @@ typedef struct _RX_CONTEXT
221******************************************************************************/ 209******************************************************************************/
222// 8051 firmware image for usb - use last-half base address = 0x3000 210// 8051 firmware image for usb - use last-half base address = 0x3000
223#define FIRMWARE_IMAGE_BASE 0x3000 211#define FIRMWARE_IMAGE_BASE 0x3000
224#define MAX_FIRMWARE_IMAGE_SIZE 0x1000 // 4kbyte 212#define MAX_FIRMWARE_IMAGE_SIZE 0x1000 // 4kbyte
225 213
226#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \ 214#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
227 RTUSBFirmwareWrite(_pAd, _pFwImage, _FwLen) 215 RTUSBFirmwareWrite(_pAd, _pFwImage, _FwLen)
228 216
229
230
231/****************************************************************************** 217/******************************************************************************
232 218
233 USB TX Related MACRO 219 USB TX Related MACRO
@@ -281,7 +267,7 @@ typedef struct _RX_CONTEXT
281 RtmpUSB_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx) 267 RtmpUSB_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx)
282 268
283#define HAL_LastTxIdx(pAd, QueIdx,TxIdx) \ 269#define HAL_LastTxIdx(pAd, QueIdx,TxIdx) \
284 /*RtmpUSBDataLastTxIdx(pAd, QueIdx,TxIdx)*/ 270 /*RtmpUSBDataLastTxIdx(pAd, QueIdx,TxIdx) */
285 271
286#define HAL_KickOutTx(pAd, pTxBlk, QueIdx) \ 272#define HAL_KickOutTx(pAd, pTxBlk, QueIdx) \
287 RtmpUSBDataKickOut(pAd, pTxBlk, QueIdx) 273 RtmpUSBDataKickOut(pAd, pTxBlk, QueIdx)
@@ -292,20 +278,17 @@ typedef struct _RX_CONTEXT
292#define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \ 278#define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \
293 RtmpUSBNullFrameKickOut(_pAd, _QueIdx, _pNullFrame, _frameLen) 279 RtmpUSBNullFrameKickOut(_pAd, _QueIdx, _pNullFrame, _frameLen)
294 280
295#define GET_TXRING_FREENO(_pAd, _QueIdx) (_QueIdx) //(_pAd->TxRing[_QueIdx].TxSwFreeIdx) 281#define GET_TXRING_FREENO(_pAd, _QueIdx) (_QueIdx) //(_pAd->TxRing[_QueIdx].TxSwFreeIdx)
296#define GET_MGMTRING_FREENO(_pAd) (_pAd->MgmtRing.TxSwFreeIdx) 282#define GET_MGMTRING_FREENO(_pAd) (_pAd->MgmtRing.TxSwFreeIdx)
297 283
298
299/* ----------------- RX Related MACRO ----------------- */ 284/* ----------------- RX Related MACRO ----------------- */
300 285
301
302/* 286/*
303 * Device Hardware Interface Related MACRO 287 * Device Hardware Interface Related MACRO
304 */ 288 */
305#define RTMP_IRQ_INIT(pAd) do{}while(0) 289#define RTMP_IRQ_INIT(pAd) do{}while(0)
306#define RTMP_IRQ_ENABLE(pAd) do{}while(0) 290#define RTMP_IRQ_ENABLE(pAd) do{}while(0)
307 291
308
309/* 292/*
310 * MLME Related MACRO 293 * MLME Related MACRO
311 */ 294 */
@@ -330,7 +313,6 @@ typedef struct _RX_CONTEXT
330 RTUSBMlmeUp(_pAd); \ 313 RTUSBMlmeUp(_pAd); \
331 } 314 }
332 315
333
334/* 316/*
335 * Power Save Related MACRO 317 * Power Save Related MACRO
336 */ 318 */
diff --git a/drivers/staging/rt2860/chip/rt2860.h b/drivers/staging/rt2860/chip/rt2860.h
index 2989d09556b..6b976b47ad8 100644
--- a/drivers/staging/rt2860/chip/rt2860.h
+++ b/drivers/staging/rt2860/chip/rt2860.h
@@ -43,14 +43,12 @@
43// 43//
44#define NIC2860_PCI_DEVICE_ID 0x0601 44#define NIC2860_PCI_DEVICE_ID 0x0601
45#define NIC2860_PCIe_DEVICE_ID 0x0681 45#define NIC2860_PCIe_DEVICE_ID 0x0681
46#define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ??? 46#define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ???
47#define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard 47#define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard
48
49 48
50#define VEN_AWT_PCIe_DEVICE_ID 0x1059 49#define VEN_AWT_PCIe_DEVICE_ID 0x1059
51#define VEN_AWT_PCI_VENDOR_ID 0x1A3B 50#define VEN_AWT_PCI_VENDOR_ID 0x1A3B
52 51
53#define EDIMAX_PCI_VENDOR_ID 0x1432 52#define EDIMAX_PCI_VENDOR_ID 0x1432
54 53
55
56#endif //__RT2860_H__ // 54#endif //__RT2860_H__ //
diff --git a/drivers/staging/rt2860/chip/rt2870.h b/drivers/staging/rt2860/chip/rt2870.h
index a9309253b20..5115a3797e2 100644
--- a/drivers/staging/rt2860/chip/rt2870.h
+++ b/drivers/staging/rt2860/chip/rt2870.h
@@ -40,8 +40,7 @@
40#include "../rtmp_type.h" 40#include "../rtmp_type.h"
41#include "mac_usb.h" 41#include "mac_usb.h"
42 42
43 43//#define RTMP_CHIP_NAME "RT2870"
44//#define RTMP_CHIP_NAME "RT2870"
45 44
46#endif // RT2870 // 45#endif // RT2870 //
47#endif //__RT2870_H__ // 46#endif //__RT2870_H__ //
diff --git a/drivers/staging/rt2860/chip/rt3070.h b/drivers/staging/rt2860/chip/rt3070.h
index 87df99ad929..3781d9d9a92 100644
--- a/drivers/staging/rt2860/chip/rt3070.h
+++ b/drivers/staging/rt2860/chip/rt3070.h
@@ -39,7 +39,6 @@
39 39
40#ifdef RT3070 40#ifdef RT3070
41 41
42
43#ifndef RTMP_USB_SUPPORT 42#ifndef RTMP_USB_SUPPORT
44#error "For RT3070, you should define the compile flag -DRTMP_USB_SUPPORT" 43#error "For RT3070, you should define the compile flag -DRTMP_USB_SUPPORT"
45#endif 44#endif
diff --git a/drivers/staging/rt2860/chip/rt3090.h b/drivers/staging/rt2860/chip/rt3090.h
index c2249a47123..92481ccabf3 100644
--- a/drivers/staging/rt2860/chip/rt3090.h
+++ b/drivers/staging/rt2860/chip/rt3090.h
@@ -63,9 +63,9 @@
63// 63//
64// Device ID & Vendor ID, these values should match EEPROM value 64// Device ID & Vendor ID, these values should match EEPROM value
65// 65//
66#define NIC3090_PCIe_DEVICE_ID 0x3090 // 1T/1R miniCard 66#define NIC3090_PCIe_DEVICE_ID 0x3090 // 1T/1R miniCard
67#define NIC3091_PCIe_DEVICE_ID 0x3091 // 1T/2R miniCard 67#define NIC3091_PCIe_DEVICE_ID 0x3091 // 1T/2R miniCard
68#define NIC3092_PCIe_DEVICE_ID 0x3092 // 2T/2R miniCard 68#define NIC3092_PCIe_DEVICE_ID 0x3092 // 2T/2R miniCard
69 69
70#endif // RT3090 // 70#endif // RT3090 //
71 71
diff --git a/drivers/staging/rt2860/chip/rt30xx.h b/drivers/staging/rt2860/chip/rt30xx.h
index 70971a06260..e6aa1756b4f 100644
--- a/drivers/staging/rt2860/chip/rt30xx.h
+++ b/drivers/staging/rt2860/chip/rt30xx.h
@@ -39,7 +39,6 @@
39 39
40#ifdef RT30xx 40#ifdef RT30xx
41 41
42
43extern REG_PAIR RT30xx_RFRegTable[]; 42extern REG_PAIR RT30xx_RFRegTable[];
44extern UCHAR NUM_RF_REG_PARMS; 43extern UCHAR NUM_RF_REG_PARMS;
45 44
diff --git a/drivers/staging/rt2860/chip/rtmp_mac.h b/drivers/staging/rt2860/chip/rtmp_mac.h
index 3ddb0bf03c6..06321c0deaf 100644
--- a/drivers/staging/rt2860/chip/rtmp_mac.h
+++ b/drivers/staging/rt2860/chip/rtmp_mac.h
@@ -38,8 +38,6 @@
38#ifndef __RTMP_MAC_H__ 38#ifndef __RTMP_MAC_H__
39#define __RTMP_MAC_H__ 39#define __RTMP_MAC_H__
40 40
41
42
43// ================================================================================= 41// =================================================================================
44// TX / RX ring descriptor format 42// TX / RX ring descriptor format
45// ================================================================================= 43// =================================================================================
@@ -50,89 +48,85 @@
50#define FIFO_HCCA 1 48#define FIFO_HCCA 1
51#define FIFO_EDCA 2 49#define FIFO_EDCA 2
52 50
53
54// 51//
55// TXD Wireless Information format for Tx ring and Mgmt Ring 52// TXD Wireless Information format for Tx ring and Mgmt Ring
56// 53//
57//txop : for txop mode 54//txop : for txop mode
58// 0:txop for the MPDU frame will be handles by ASIC by register 55// 0:txop for the MPDU frame will be handles by ASIC by register
59// 1/2/3:the MPDU frame is send after PIFS/backoff/SIFS 56// 1/2/3:the MPDU frame is send after PIFS/backoff/SIFS
60typedef struct PACKED _TXWI_STRUC { 57typedef struct PACKED _TXWI_STRUC {
61 // Word 0 58 // Word 0
62 // ex: 00 03 00 40 means txop = 3, PHYMODE = 1 59 // ex: 00 03 00 40 means txop = 3, PHYMODE = 1
63 UINT32 FRAG:1; // 1 to inform TKIP engine this is a fragment. 60 UINT32 FRAG:1; // 1 to inform TKIP engine this is a fragment.
64 UINT32 MIMOps:1; // the remote peer is in dynamic MIMO-PS mode 61 UINT32 MIMOps:1; // the remote peer is in dynamic MIMO-PS mode
65 UINT32 CFACK:1; 62 UINT32 CFACK:1;
66 UINT32 TS:1; 63 UINT32 TS:1;
67 64
68 UINT32 AMPDU:1; 65 UINT32 AMPDU:1;
69 UINT32 MpduDensity:3; 66 UINT32 MpduDensity:3;
70 UINT32 txop:2; //FOR "THIS" frame. 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs only when previous frame exchange is successful. 67 UINT32 txop:2; //FOR "THIS" frame. 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs only when previous frame exchange is successful.
71 UINT32 rsv:6; 68 UINT32 rsv:6;
72 69
73 UINT32 MCS:7; 70 UINT32 MCS:7;
74 UINT32 BW:1; //channel bandwidth 20MHz or 40 MHz 71 UINT32 BW:1; //channel bandwidth 20MHz or 40 MHz
75 UINT32 ShortGI:1; 72 UINT32 ShortGI:1;
76 UINT32 STBC:2; // 1: STBC support MCS =0-7, 2,3 : RESERVE 73 UINT32 STBC:2; // 1: STBC support MCS =0-7, 2,3 : RESERVE
77 UINT32 Ifs:1; // 74 UINT32 Ifs:1; //
78// UINT32 rsv2:2; //channel bandwidth 20MHz or 40 MHz 75// UINT32 rsv2:2; //channel bandwidth 20MHz or 40 MHz
79 UINT32 rsv2:1; 76 UINT32 rsv2:1;
80 UINT32 TxBF:1; // 3*3 77 UINT32 TxBF:1; // 3*3
81 UINT32 PHYMODE:2; 78 UINT32 PHYMODE:2;
82 // Word1 79 // Word1
83 // ex: 1c ff 38 00 means ACK=0, BAWinSize=7, MPDUtotalByteCount = 0x38 80 // ex: 1c ff 38 00 means ACK=0, BAWinSize=7, MPDUtotalByteCount = 0x38
84 UINT32 ACK:1; 81 UINT32 ACK:1;
85 UINT32 NSEQ:1; 82 UINT32 NSEQ:1;
86 UINT32 BAWinSize:6; 83 UINT32 BAWinSize:6;
87 UINT32 WirelessCliID:8; 84 UINT32 WirelessCliID:8;
88 UINT32 MPDUtotalByteCount:12; 85 UINT32 MPDUtotalByteCount:12;
89 UINT32 PacketId:4; 86 UINT32 PacketId:4;
90 //Word2 87 //Word2
91 UINT32 IV; 88 UINT32 IV;
92 //Word3 89 //Word3
93 UINT32 EIV; 90 UINT32 EIV;
94} TXWI_STRUC, *PTXWI_STRUC; 91} TXWI_STRUC, *PTXWI_STRUC;
95
96 92
97// 93//
98// RXWI wireless information format, in PBF. invisible in driver. 94// RXWI wireless information format, in PBF. invisible in driver.
99// 95//
100typedef struct PACKED _RXWI_STRUC { 96typedef struct PACKED _RXWI_STRUC {
101 // Word 0 97 // Word 0
102 UINT32 WirelessCliID:8; 98 UINT32 WirelessCliID:8;
103 UINT32 KeyIndex:2; 99 UINT32 KeyIndex:2;
104 UINT32 BSSID:3; 100 UINT32 BSSID:3;
105 UINT32 UDF:3; 101 UINT32 UDF:3;
106 UINT32 MPDUtotalByteCount:12; 102 UINT32 MPDUtotalByteCount:12;
107 UINT32 TID:4; 103 UINT32 TID:4;
108 // Word 1 104 // Word 1
109 UINT32 FRAG:4; 105 UINT32 FRAG:4;
110 UINT32 SEQUENCE:12; 106 UINT32 SEQUENCE:12;
111 UINT32 MCS:7; 107 UINT32 MCS:7;
112 UINT32 BW:1; 108 UINT32 BW:1;
113 UINT32 ShortGI:1; 109 UINT32 ShortGI:1;
114 UINT32 STBC:2; 110 UINT32 STBC:2;
115 UINT32 rsv:3; 111 UINT32 rsv:3;
116 UINT32 PHYMODE:2; // 1: this RX frame is unicast to me 112 UINT32 PHYMODE:2; // 1: this RX frame is unicast to me
117 //Word2 113 //Word2
118 UINT32 RSSI0:8; 114 UINT32 RSSI0:8;
119 UINT32 RSSI1:8; 115 UINT32 RSSI1:8;
120 UINT32 RSSI2:8; 116 UINT32 RSSI2:8;
121 UINT32 rsv1:8; 117 UINT32 rsv1:8;
122 //Word3 118 //Word3
123 UINT32 SNR0:8; 119 UINT32 SNR0:8;
124 UINT32 SNR1:8; 120 UINT32 SNR1:8;
125 UINT32 FOFFSET:8; // RT35xx 121 UINT32 FOFFSET:8; // RT35xx
126 UINT32 rsv2:8; 122 UINT32 rsv2:8;
127 /*UINT32 rsv2:16;*/ 123 /*UINT32 rsv2:16; */
128} RXWI_STRUC, *PRXWI_STRUC; 124} RXWI_STRUC, *PRXWI_STRUC;
129
130 125
131// ================================================================================= 126// =================================================================================
132// Register format 127// Register format
133// ================================================================================= 128// =================================================================================
134 129
135
136// 130//
137// SCH/DMA registers - base address 0x0200 131// SCH/DMA registers - base address 0x0200
138// 132//
@@ -140,163 +134,161 @@ typedef struct PACKED _RXWI_STRUC {
140// 134//
141#define DMA_CSR0 0x200 135#define DMA_CSR0 0x200
142#define INT_SOURCE_CSR 0x200 136#define INT_SOURCE_CSR 0x200
143typedef union _INT_SOURCE_CSR_STRUC { 137typedef union _INT_SOURCE_CSR_STRUC {
144 struct { 138 struct {
145 UINT32 RxDelayINT:1; 139 UINT32 RxDelayINT:1;
146 UINT32 TxDelayINT:1; 140 UINT32 TxDelayINT:1;
147 UINT32 RxDone:1; 141 UINT32 RxDone:1;
148 UINT32 Ac0DmaDone:1;//4 142 UINT32 Ac0DmaDone:1; //4
149 UINT32 Ac1DmaDone:1; 143 UINT32 Ac1DmaDone:1;
150 UINT32 Ac2DmaDone:1; 144 UINT32 Ac2DmaDone:1;
151 UINT32 Ac3DmaDone:1; 145 UINT32 Ac3DmaDone:1;
152 UINT32 HccaDmaDone:1; // bit7 146 UINT32 HccaDmaDone:1; // bit7
153 UINT32 MgmtDmaDone:1; 147 UINT32 MgmtDmaDone:1;
154 UINT32 MCUCommandINT:1;//bit 9 148 UINT32 MCUCommandINT:1; //bit 9
155 UINT32 RxTxCoherent:1; 149 UINT32 RxTxCoherent:1;
156 UINT32 TBTTInt:1; 150 UINT32 TBTTInt:1;
157 UINT32 PreTBTT:1; 151 UINT32 PreTBTT:1;
158 UINT32 TXFifoStatusInt:1;//FIFO Statistics is full, sw should read 0x171c 152 UINT32 TXFifoStatusInt:1; //FIFO Statistics is full, sw should read 0x171c
159 UINT32 AutoWakeup:1;//bit14 153 UINT32 AutoWakeup:1; //bit14
160 UINT32 GPTimer:1; 154 UINT32 GPTimer:1;
161 UINT32 RxCoherent:1;//bit16 155 UINT32 RxCoherent:1; //bit16
162 UINT32 TxCoherent:1; 156 UINT32 TxCoherent:1;
163 UINT32 :14; 157 UINT32:14;
164 } field; 158 } field;
165 UINT32 word; 159 UINT32 word;
166} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC; 160} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
167 161
168// 162//
169// INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF 163// INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF
170// 164//
171#define INT_MASK_CSR 0x204 165#define INT_MASK_CSR 0x204
172typedef union _INT_MASK_CSR_STRUC { 166typedef union _INT_MASK_CSR_STRUC {
173 struct { 167 struct {
174 UINT32 RXDelay_INT_MSK:1; 168 UINT32 RXDelay_INT_MSK:1;
175 UINT32 TxDelay:1; 169 UINT32 TxDelay:1;
176 UINT32 RxDone:1; 170 UINT32 RxDone:1;
177 UINT32 Ac0DmaDone:1; 171 UINT32 Ac0DmaDone:1;
178 UINT32 Ac1DmaDone:1; 172 UINT32 Ac1DmaDone:1;
179 UINT32 Ac2DmaDone:1; 173 UINT32 Ac2DmaDone:1;
180 UINT32 Ac3DmaDone:1; 174 UINT32 Ac3DmaDone:1;
181 UINT32 HccaDmaDone:1; 175 UINT32 HccaDmaDone:1;
182 UINT32 MgmtDmaDone:1; 176 UINT32 MgmtDmaDone:1;
183 UINT32 MCUCommandINT:1; 177 UINT32 MCUCommandINT:1;
184 UINT32 :20; 178 UINT32:20;
185 UINT32 RxCoherent:1; 179 UINT32 RxCoherent:1;
186 UINT32 TxCoherent:1; 180 UINT32 TxCoherent:1;
187 } field; 181 } field;
188 UINT32 word; 182 UINT32 word;
189} INT_MASK_CSR_STRUC, *PINT_MASK_CSR_STRUC; 183} INT_MASK_CSR_STRUC, *PINT_MASK_CSR_STRUC;
190 184
191#define WPDMA_GLO_CFG 0x208 185#define WPDMA_GLO_CFG 0x208
192typedef union _WPDMA_GLO_CFG_STRUC { 186typedef union _WPDMA_GLO_CFG_STRUC {
193 struct { 187 struct {
194 UINT32 EnableTxDMA:1; 188 UINT32 EnableTxDMA:1;
195 UINT32 TxDMABusy:1; 189 UINT32 TxDMABusy:1;
196 UINT32 EnableRxDMA:1; 190 UINT32 EnableRxDMA:1;
197 UINT32 RxDMABusy:1; 191 UINT32 RxDMABusy:1;
198 UINT32 WPDMABurstSIZE:2; 192 UINT32 WPDMABurstSIZE:2;
199 UINT32 EnTXWriteBackDDONE:1; 193 UINT32 EnTXWriteBackDDONE:1;
200 UINT32 BigEndian:1; 194 UINT32 BigEndian:1;
201 UINT32 RXHdrScater:8; 195 UINT32 RXHdrScater:8;
202 UINT32 HDR_SEG_LEN:16; 196 UINT32 HDR_SEG_LEN:16;
203 } field; 197 } field;
204 UINT32 word; 198 UINT32 word;
205} WPDMA_GLO_CFG_STRUC, *PWPDMA_GLO_CFG_STRUC; 199} WPDMA_GLO_CFG_STRUC, *PWPDMA_GLO_CFG_STRUC;
206 200
207#define WPDMA_RST_IDX 0x20c 201#define WPDMA_RST_IDX 0x20c
208typedef union _WPDMA_RST_IDX_STRUC { 202typedef union _WPDMA_RST_IDX_STRUC {
209 struct { 203 struct {
210 UINT32 RST_DTX_IDX0:1; 204 UINT32 RST_DTX_IDX0:1;
211 UINT32 RST_DTX_IDX1:1; 205 UINT32 RST_DTX_IDX1:1;
212 UINT32 RST_DTX_IDX2:1; 206 UINT32 RST_DTX_IDX2:1;
213 UINT32 RST_DTX_IDX3:1; 207 UINT32 RST_DTX_IDX3:1;
214 UINT32 RST_DTX_IDX4:1; 208 UINT32 RST_DTX_IDX4:1;
215 UINT32 RST_DTX_IDX5:1; 209 UINT32 RST_DTX_IDX5:1;
216 UINT32 rsv:10; 210 UINT32 rsv:10;
217 UINT32 RST_DRX_IDX0:1; 211 UINT32 RST_DRX_IDX0:1;
218 UINT32 :15; 212 UINT32:15;
219 } field; 213 } field;
220 UINT32 word; 214 UINT32 word;
221} WPDMA_RST_IDX_STRUC, *PWPDMA_RST_IDX_STRUC; 215} WPDMA_RST_IDX_STRUC, *PWPDMA_RST_IDX_STRUC;
222#define DELAY_INT_CFG 0x0210 216#define DELAY_INT_CFG 0x0210
223typedef union _DELAY_INT_CFG_STRUC { 217typedef union _DELAY_INT_CFG_STRUC {
224 struct { 218 struct {
225 UINT32 RXMAX_PTIME:8; 219 UINT32 RXMAX_PTIME:8;
226 UINT32 RXMAX_PINT:7; 220 UINT32 RXMAX_PINT:7;
227 UINT32 RXDLY_INT_EN:1; 221 UINT32 RXDLY_INT_EN:1;
228 UINT32 TXMAX_PTIME:8; 222 UINT32 TXMAX_PTIME:8;
229 UINT32 TXMAX_PINT:7; 223 UINT32 TXMAX_PINT:7;
230 UINT32 TXDLY_INT_EN:1; 224 UINT32 TXDLY_INT_EN:1;
231 } field; 225 } field;
232 UINT32 word; 226 UINT32 word;
233} DELAY_INT_CFG_STRUC, *PDELAY_INT_CFG_STRUC; 227} DELAY_INT_CFG_STRUC, *PDELAY_INT_CFG_STRUC;
234#define WMM_AIFSN_CFG 0x0214 228#define WMM_AIFSN_CFG 0x0214
235typedef union _AIFSN_CSR_STRUC { 229typedef union _AIFSN_CSR_STRUC {
236 struct { 230 struct {
237 UINT32 Aifsn0:4; // for AC_BE 231 UINT32 Aifsn0:4; // for AC_BE
238 UINT32 Aifsn1:4; // for AC_BK 232 UINT32 Aifsn1:4; // for AC_BK
239 UINT32 Aifsn2:4; // for AC_VI 233 UINT32 Aifsn2:4; // for AC_VI
240 UINT32 Aifsn3:4; // for AC_VO 234 UINT32 Aifsn3:4; // for AC_VO
241 UINT32 Rsv:16; 235 UINT32 Rsv:16;
242 } field; 236 } field;
243 UINT32 word; 237 UINT32 word;
244} AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC; 238} AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
245// 239//
246// CWMIN_CSR: CWmin for each EDCA AC 240// CWMIN_CSR: CWmin for each EDCA AC
247// 241//
248#define WMM_CWMIN_CFG 0x0218 242#define WMM_CWMIN_CFG 0x0218
249typedef union _CWMIN_CSR_STRUC { 243typedef union _CWMIN_CSR_STRUC {
250 struct { 244 struct {
251 UINT32 Cwmin0:4; // for AC_BE 245 UINT32 Cwmin0:4; // for AC_BE
252 UINT32 Cwmin1:4; // for AC_BK 246 UINT32 Cwmin1:4; // for AC_BK
253 UINT32 Cwmin2:4; // for AC_VI 247 UINT32 Cwmin2:4; // for AC_VI
254 UINT32 Cwmin3:4; // for AC_VO 248 UINT32 Cwmin3:4; // for AC_VO
255 UINT32 Rsv:16; 249 UINT32 Rsv:16;
256 } field; 250 } field;
257 UINT32 word; 251 UINT32 word;
258} CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC; 252} CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC;
259 253
260// 254//
261// CWMAX_CSR: CWmin for each EDCA AC 255// CWMAX_CSR: CWmin for each EDCA AC
262// 256//
263#define WMM_CWMAX_CFG 0x021c 257#define WMM_CWMAX_CFG 0x021c
264typedef union _CWMAX_CSR_STRUC { 258typedef union _CWMAX_CSR_STRUC {
265 struct { 259 struct {
266 UINT32 Cwmax0:4; // for AC_BE 260 UINT32 Cwmax0:4; // for AC_BE
267 UINT32 Cwmax1:4; // for AC_BK 261 UINT32 Cwmax1:4; // for AC_BK
268 UINT32 Cwmax2:4; // for AC_VI 262 UINT32 Cwmax2:4; // for AC_VI
269 UINT32 Cwmax3:4; // for AC_VO 263 UINT32 Cwmax3:4; // for AC_VO
270 UINT32 Rsv:16; 264 UINT32 Rsv:16;
271 } field; 265 } field;
272 UINT32 word; 266 UINT32 word;
273} CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC; 267} CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC;
274
275 268
276// 269//
277// AC_TXOP_CSR0: AC_BK/AC_BE TXOP register 270// AC_TXOP_CSR0: AC_BK/AC_BE TXOP register
278// 271//
279#define WMM_TXOP0_CFG 0x0220 272#define WMM_TXOP0_CFG 0x0220
280typedef union _AC_TXOP_CSR0_STRUC { 273typedef union _AC_TXOP_CSR0_STRUC {
281 struct { 274 struct {
282 USHORT Ac0Txop; // for AC_BK, in unit of 32us 275 USHORT Ac0Txop; // for AC_BK, in unit of 32us
283 USHORT Ac1Txop; // for AC_BE, in unit of 32us 276 USHORT Ac1Txop; // for AC_BE, in unit of 32us
284 } field; 277 } field;
285 UINT32 word; 278 UINT32 word;
286} AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC; 279} AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC;
287 280
288// 281//
289// AC_TXOP_CSR1: AC_VO/AC_VI TXOP register 282// AC_TXOP_CSR1: AC_VO/AC_VI TXOP register
290// 283//
291#define WMM_TXOP1_CFG 0x0224 284#define WMM_TXOP1_CFG 0x0224
292typedef union _AC_TXOP_CSR1_STRUC { 285typedef union _AC_TXOP_CSR1_STRUC {
293 struct { 286 struct {
294 USHORT Ac2Txop; // for AC_VI, in unit of 32us 287 USHORT Ac2Txop; // for AC_VI, in unit of 32us
295 USHORT Ac3Txop; // for AC_VO, in unit of 32us 288 USHORT Ac3Txop; // for AC_VO, in unit of 32us
296 } field; 289 } field;
297 UINT32 word; 290 UINT32 word;
298} AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC; 291} AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC;
299
300 292
301#define RINGREG_DIFF 0x10 293#define RINGREG_DIFF 0x10
302#define GPIO_CTRL_CFG 0x0228 //MAC_CSR13 294#define GPIO_CTRL_CFG 0x0228 //MAC_CSR13
@@ -305,23 +297,23 @@ typedef union _AC_TXOP_CSR1_STRUC {
305#define TX_MAX_CNT0 0x0234 297#define TX_MAX_CNT0 0x0234
306#define TX_CTX_IDX0 0x0238 298#define TX_CTX_IDX0 0x0238
307#define TX_DTX_IDX0 0x023c 299#define TX_DTX_IDX0 0x023c
308#define TX_BASE_PTR1 0x0240 //AC_BE base address 300#define TX_BASE_PTR1 0x0240 //AC_BE base address
309#define TX_MAX_CNT1 0x0244 301#define TX_MAX_CNT1 0x0244
310#define TX_CTX_IDX1 0x0248 302#define TX_CTX_IDX1 0x0248
311#define TX_DTX_IDX1 0x024c 303#define TX_DTX_IDX1 0x024c
312#define TX_BASE_PTR2 0x0250 //AC_VI base address 304#define TX_BASE_PTR2 0x0250 //AC_VI base address
313#define TX_MAX_CNT2 0x0254 305#define TX_MAX_CNT2 0x0254
314#define TX_CTX_IDX2 0x0258 306#define TX_CTX_IDX2 0x0258
315#define TX_DTX_IDX2 0x025c 307#define TX_DTX_IDX2 0x025c
316#define TX_BASE_PTR3 0x0260 //AC_VO base address 308#define TX_BASE_PTR3 0x0260 //AC_VO base address
317#define TX_MAX_CNT3 0x0264 309#define TX_MAX_CNT3 0x0264
318#define TX_CTX_IDX3 0x0268 310#define TX_CTX_IDX3 0x0268
319#define TX_DTX_IDX3 0x026c 311#define TX_DTX_IDX3 0x026c
320#define TX_BASE_PTR4 0x0270 //HCCA base address 312#define TX_BASE_PTR4 0x0270 //HCCA base address
321#define TX_MAX_CNT4 0x0274 313#define TX_MAX_CNT4 0x0274
322#define TX_CTX_IDX4 0x0278 314#define TX_CTX_IDX4 0x0278
323#define TX_DTX_IDX4 0x027c 315#define TX_DTX_IDX4 0x027c
324#define TX_BASE_PTR5 0x0280 //MGMT base address 316#define TX_BASE_PTR5 0x0280 //MGMT base address
325#define TX_MAX_CNT5 0x0284 317#define TX_MAX_CNT5 0x0284
326#define TX_CTX_IDX5 0x0288 318#define TX_CTX_IDX5 0x0288
327#define TX_DTX_IDX5 0x028c 319#define TX_DTX_IDX5 0x028c
@@ -333,26 +325,24 @@ typedef union _AC_TXOP_CSR1_STRUC {
333#define RX_CRX_IDX 0x0298 325#define RX_CRX_IDX 0x0298
334#define RX_DRX_IDX 0x029c 326#define RX_DRX_IDX 0x029c
335 327
336
337#define USB_DMA_CFG 0x02a0 328#define USB_DMA_CFG 0x02a0
338typedef union _USB_DMA_CFG_STRUC { 329typedef union _USB_DMA_CFG_STRUC {
339 struct { 330 struct {
340 UINT32 RxBulkAggTOut:8; //Rx Bulk Aggregation TimeOut in unit of 33ns 331 UINT32 RxBulkAggTOut:8; //Rx Bulk Aggregation TimeOut in unit of 33ns
341 UINT32 RxBulkAggLmt:8; //Rx Bulk Aggregation Limit in unit of 256 bytes 332 UINT32 RxBulkAggLmt:8; //Rx Bulk Aggregation Limit in unit of 256 bytes
342 UINT32 phyclear:1; //phy watch dog enable. write 1 333 UINT32 phyclear:1; //phy watch dog enable. write 1
343 UINT32 rsv:2; 334 UINT32 rsv:2;
344 UINT32 TxClear:1; //Clear USB DMA TX path 335 UINT32 TxClear:1; //Clear USB DMA TX path
345 UINT32 TxopHalt:1; //Halt TXOP count down when TX buffer is full. 336 UINT32 TxopHalt:1; //Halt TXOP count down when TX buffer is full.
346 UINT32 RxBulkAggEn:1; //Enable Rx Bulk Aggregation 337 UINT32 RxBulkAggEn:1; //Enable Rx Bulk Aggregation
347 UINT32 RxBulkEn:1; //Enable USB DMA Rx 338 UINT32 RxBulkEn:1; //Enable USB DMA Rx
348 UINT32 TxBulkEn:1; //Enable USB DMA Tx 339 UINT32 TxBulkEn:1; //Enable USB DMA Tx
349 UINT32 EpoutValid:6; //OUT endpoint data valid 340 UINT32 EpoutValid:6; //OUT endpoint data valid
350 UINT32 RxBusy:1; //USB DMA RX FSM busy 341 UINT32 RxBusy:1; //USB DMA RX FSM busy
351 UINT32 TxBusy:1; //USB DMA TX FSM busy 342 UINT32 TxBusy:1; //USB DMA TX FSM busy
352 } field; 343 } field;
353 UINT32 word; 344 UINT32 word;
354} USB_DMA_CFG_STRUC, *PUSB_DMA_CFG_STRUC; 345} USB_DMA_CFG_STRUC, *PUSB_DMA_CFG_STRUC;
355
356 346
357// 347//
358// 3 PBF registers 348// 3 PBF registers
@@ -385,7 +375,6 @@ typedef union _USB_DMA_CFG_STRUC {
385#define LDO_CFG0 0x05d4 375#define LDO_CFG0 0x05d4
386#define GPIO_SWITCH 0x05dc 376#define GPIO_SWITCH 0x05dc
387 377
388
389// 378//
390// 4 MAC registers 379// 4 MAC registers
391// 380//
@@ -393,143 +382,143 @@ typedef union _USB_DMA_CFG_STRUC {
393// 4.1 MAC SYSTEM configuration registers (offset:0x1000) 382// 4.1 MAC SYSTEM configuration registers (offset:0x1000)
394// 383//
395#define MAC_CSR0 0x1000 384#define MAC_CSR0 0x1000
396typedef union _ASIC_VER_ID_STRUC { 385typedef union _ASIC_VER_ID_STRUC {
397 struct { 386 struct {
398 USHORT ASICRev; // reversion : 0 387 USHORT ASICRev; // reversion : 0
399 USHORT ASICVer; // version : 2860 388 USHORT ASICVer; // version : 2860
400 } field; 389 } field;
401 UINT32 word; 390 UINT32 word;
402} ASIC_VER_ID_STRUC, *PASIC_VER_ID_STRUC; 391} ASIC_VER_ID_STRUC, *PASIC_VER_ID_STRUC;
403#define MAC_SYS_CTRL 0x1004 //MAC_CSR1 392#define MAC_SYS_CTRL 0x1004 //MAC_CSR1
404#define MAC_ADDR_DW0 0x1008 // MAC ADDR DW0 393#define MAC_ADDR_DW0 0x1008 // MAC ADDR DW0
405#define MAC_ADDR_DW1 0x100c // MAC ADDR DW1 394#define MAC_ADDR_DW1 0x100c // MAC ADDR DW1
406// 395//
407// MAC_CSR2: STA MAC register 0 396// MAC_CSR2: STA MAC register 0
408// 397//
409typedef union _MAC_DW0_STRUC { 398typedef union _MAC_DW0_STRUC {
410 struct { 399 struct {
411 UCHAR Byte0; // MAC address byte 0 400 UCHAR Byte0; // MAC address byte 0
412 UCHAR Byte1; // MAC address byte 1 401 UCHAR Byte1; // MAC address byte 1
413 UCHAR Byte2; // MAC address byte 2 402 UCHAR Byte2; // MAC address byte 2
414 UCHAR Byte3; // MAC address byte 3 403 UCHAR Byte3; // MAC address byte 3
415 } field; 404 } field;
416 UINT32 word; 405 UINT32 word;
417} MAC_DW0_STRUC, *PMAC_DW0_STRUC; 406} MAC_DW0_STRUC, *PMAC_DW0_STRUC;
418 407
419// 408//
420// MAC_CSR3: STA MAC register 1 409// MAC_CSR3: STA MAC register 1
421// 410//
422typedef union _MAC_DW1_STRUC { 411typedef union _MAC_DW1_STRUC {
423 struct { 412 struct {
424 UCHAR Byte4; // MAC address byte 4 413 UCHAR Byte4; // MAC address byte 4
425 UCHAR Byte5; // MAC address byte 5 414 UCHAR Byte5; // MAC address byte 5
426 UCHAR U2MeMask; 415 UCHAR U2MeMask;
427 UCHAR Rsvd1; 416 UCHAR Rsvd1;
428 } field; 417 } field;
429 UINT32 word; 418 UINT32 word;
430} MAC_DW1_STRUC, *PMAC_DW1_STRUC; 419} MAC_DW1_STRUC, *PMAC_DW1_STRUC;
431 420
432#define MAC_BSSID_DW0 0x1010 // MAC BSSID DW0 421#define MAC_BSSID_DW0 0x1010 // MAC BSSID DW0
433#define MAC_BSSID_DW1 0x1014 // MAC BSSID DW1 422#define MAC_BSSID_DW1 0x1014 // MAC BSSID DW1
434 423
435// 424//
436// MAC_CSR5: BSSID register 1 425// MAC_CSR5: BSSID register 1
437// 426//
438typedef union _MAC_CSR5_STRUC { 427typedef union _MAC_CSR5_STRUC {
439 struct { 428 struct {
440 UCHAR Byte4; // BSSID byte 4 429 UCHAR Byte4; // BSSID byte 4
441 UCHAR Byte5; // BSSID byte 5 430 UCHAR Byte5; // BSSID byte 5
442 USHORT BssIdMask:2; // 0: one BSSID, 10: 4 BSSID, 01: 2 BSSID , 11: 8BSSID 431 USHORT BssIdMask:2; // 0: one BSSID, 10: 4 BSSID, 01: 2 BSSID , 11: 8BSSID
443 USHORT MBssBcnNum:3; 432 USHORT MBssBcnNum:3;
444 USHORT Rsvd:11; 433 USHORT Rsvd:11;
445 } field; 434 } field;
446 UINT32 word; 435 UINT32 word;
447} MAC_CSR5_STRUC, *PMAC_CSR5_STRUC; 436} MAC_CSR5_STRUC, *PMAC_CSR5_STRUC;
448 437
449#define MAX_LEN_CFG 0x1018 // rt2860b max 16k bytes. bit12:13 Maximum PSDU length (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16 438#define MAX_LEN_CFG 0x1018 // rt2860b max 16k bytes. bit12:13 Maximum PSDU length (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
450#define BBP_CSR_CFG 0x101c // 439#define BBP_CSR_CFG 0x101c //
451// 440//
452// BBP_CSR_CFG: BBP serial control register 441// BBP_CSR_CFG: BBP serial control register
453// 442//
454typedef union _BBP_CSR_CFG_STRUC { 443typedef union _BBP_CSR_CFG_STRUC {
455 struct { 444 struct {
456 UINT32 Value:8; // Register value to program into BBP 445 UINT32 Value:8; // Register value to program into BBP
457 UINT32 RegNum:8; // Selected BBP register 446 UINT32 RegNum:8; // Selected BBP register
458 UINT32 fRead:1; // 0: Write BBP, 1: Read BBP 447 UINT32 fRead:1; // 0: Write BBP, 1: Read BBP
459 UINT32 Busy:1; // 1: ASIC is busy execute BBP programming. 448 UINT32 Busy:1; // 1: ASIC is busy execute BBP programming.
460 UINT32 BBP_PAR_DUR:1; // 0: 4 MAC clock cycles 1: 8 MAC clock cycles 449 UINT32 BBP_PAR_DUR:1; // 0: 4 MAC clock cycles 1: 8 MAC clock cycles
461 UINT32 BBP_RW_MODE:1; // 0: use serial mode 1:parallel 450 UINT32 BBP_RW_MODE:1; // 0: use serial mode 1:parallel
462 UINT32 :12; 451 UINT32:12;
463 } field; 452 } field;
464 UINT32 word; 453 UINT32 word;
465} BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC; 454} BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC;
466#define RF_CSR_CFG0 0x1020 455#define RF_CSR_CFG0 0x1020
467// 456//
468// RF_CSR_CFG: RF control register 457// RF_CSR_CFG: RF control register
469// 458//
470typedef union _RF_CSR_CFG0_STRUC { 459typedef union _RF_CSR_CFG0_STRUC {
471 struct { 460 struct {
472 UINT32 RegIdAndContent:24; // Register value to program into BBP 461 UINT32 RegIdAndContent:24; // Register value to program into BBP
473 UINT32 bitwidth:5; // Selected BBP register 462 UINT32 bitwidth:5; // Selected BBP register
474 UINT32 StandbyMode:1; // 0: high when stand by 1: low when standby 463 UINT32 StandbyMode:1; // 0: high when stand by 1: low when standby
475 UINT32 Sel:1; // 0:RF_LE0 activate 1:RF_LE1 activate 464 UINT32 Sel:1; // 0:RF_LE0 activate 1:RF_LE1 activate
476 UINT32 Busy:1; // 0: idle 1: 8busy 465 UINT32 Busy:1; // 0: idle 1: 8busy
477 } field; 466 } field;
478 UINT32 word; 467 UINT32 word;
479} RF_CSR_CFG0_STRUC, *PRF_CSR_CFG0_STRUC; 468} RF_CSR_CFG0_STRUC, *PRF_CSR_CFG0_STRUC;
480#define RF_CSR_CFG1 0x1024 469#define RF_CSR_CFG1 0x1024
481typedef union _RF_CSR_CFG1_STRUC { 470typedef union _RF_CSR_CFG1_STRUC {
482 struct { 471 struct {
483 UINT32 RegIdAndContent:24; // Register value to program into BBP 472 UINT32 RegIdAndContent:24; // Register value to program into BBP
484 UINT32 RFGap:5; // Gap between BB_CONTROL_RF and RF_LE. 0: 3 system clock cycle (37.5usec) 1: 5 system clock cycle (62.5usec) 473 UINT32 RFGap:5; // Gap between BB_CONTROL_RF and RF_LE. 0: 3 system clock cycle (37.5usec) 1: 5 system clock cycle (62.5usec)
485 UINT32 rsv:7; // 0: idle 1: 8busy 474 UINT32 rsv:7; // 0: idle 1: 8busy
486 } field; 475 } field;
487 UINT32 word; 476 UINT32 word;
488} RF_CSR_CFG1_STRUC, *PRF_CSR_CFG1_STRUC; 477} RF_CSR_CFG1_STRUC, *PRF_CSR_CFG1_STRUC;
489#define RF_CSR_CFG2 0x1028 // 478#define RF_CSR_CFG2 0x1028 //
490typedef union _RF_CSR_CFG2_STRUC { 479typedef union _RF_CSR_CFG2_STRUC {
491 struct { 480 struct {
492 UINT32 RegIdAndContent:24; // Register value to program into BBP 481 UINT32 RegIdAndContent:24; // Register value to program into BBP
493 UINT32 rsv:8; // 0: idle 1: 8busy 482 UINT32 rsv:8; // 0: idle 1: 8busy
494 } field; 483 } field;
495 UINT32 word; 484 UINT32 word;
496} RF_CSR_CFG2_STRUC, *PRF_CSR_CFG2_STRUC; 485} RF_CSR_CFG2_STRUC, *PRF_CSR_CFG2_STRUC;
497#define LED_CFG 0x102c // MAC_CSR14 486#define LED_CFG 0x102c // MAC_CSR14
498typedef union _LED_CFG_STRUC { 487typedef union _LED_CFG_STRUC {
499 struct { 488 struct {
500 UINT32 OnPeriod:8; // blinking on period unit 1ms 489 UINT32 OnPeriod:8; // blinking on period unit 1ms
501 UINT32 OffPeriod:8; // blinking off period unit 1ms 490 UINT32 OffPeriod:8; // blinking off period unit 1ms
502 UINT32 SlowBlinkPeriod:6; // slow blinking period. unit:1ms 491 UINT32 SlowBlinkPeriod:6; // slow blinking period. unit:1ms
503 UINT32 rsv:2; 492 UINT32 rsv:2;
504 UINT32 RLedMode:2; // red Led Mode 0: off1: blinking upon TX2: periodic slow blinking3: always on 493 UINT32 RLedMode:2; // red Led Mode 0: off1: blinking upon TX2: periodic slow blinking3: always on
505 UINT32 GLedMode:2; // green Led Mode 494 UINT32 GLedMode:2; // green Led Mode
506 UINT32 YLedMode:2; // yellow Led Mode 495 UINT32 YLedMode:2; // yellow Led Mode
507 UINT32 LedPolar:1; // Led Polarity. 0: active low1: active high 496 UINT32 LedPolar:1; // Led Polarity. 0: active low1: active high
508 UINT32 :1; 497 UINT32:1;
509 } field; 498 } field;
510 UINT32 word; 499 UINT32 word;
511} LED_CFG_STRUC, *PLED_CFG_STRUC; 500} LED_CFG_STRUC, *PLED_CFG_STRUC;
512// 501//
513// 4.2 MAC TIMING configuration registers (offset:0x1100) 502// 4.2 MAC TIMING configuration registers (offset:0x1100)
514// 503//
515#define XIFS_TIME_CFG 0x1100 // MAC_CSR8 MAC_CSR9 504#define XIFS_TIME_CFG 0x1100 // MAC_CSR8 MAC_CSR9
516typedef union _IFS_SLOT_CFG_STRUC { 505typedef union _IFS_SLOT_CFG_STRUC {
517 struct { 506 struct {
518 UINT32 CckmSifsTime:8; // unit 1us. Applied after CCK RX/TX 507 UINT32 CckmSifsTime:8; // unit 1us. Applied after CCK RX/TX
519 UINT32 OfdmSifsTime:8; // unit 1us. Applied after OFDM RX/TX 508 UINT32 OfdmSifsTime:8; // unit 1us. Applied after OFDM RX/TX
520 UINT32 OfdmXifsTime:4; //OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND 509 UINT32 OfdmXifsTime:4; //OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND
521 UINT32 EIFS:9; // unit 1us 510 UINT32 EIFS:9; // unit 1us
522 UINT32 BBRxendEnable:1; // reference RXEND signal to begin XIFS defer 511 UINT32 BBRxendEnable:1; // reference RXEND signal to begin XIFS defer
523 UINT32 rsv:2; 512 UINT32 rsv:2;
524 } field; 513 } field;
525 UINT32 word; 514 UINT32 word;
526} IFS_SLOT_CFG_STRUC, *PIFS_SLOT_CFG_STRUC; 515} IFS_SLOT_CFG_STRUC, *PIFS_SLOT_CFG_STRUC;
527 516
528#define BKOFF_SLOT_CFG 0x1104 // mac_csr9 last 8 bits 517#define BKOFF_SLOT_CFG 0x1104 // mac_csr9 last 8 bits
529#define NAV_TIME_CFG 0x1108 // NAV (MAC_CSR15) 518#define NAV_TIME_CFG 0x1108 // NAV (MAC_CSR15)
530#define CH_TIME_CFG 0x110C // Count as channel busy 519#define CH_TIME_CFG 0x110C // Count as channel busy
531#define PBF_LIFE_TIMER 0x1110 //TX/RX MPDU timestamp timer (free run)Unit: 1us 520#define PBF_LIFE_TIMER 0x1110 //TX/RX MPDU timestamp timer (free run)Unit: 1us
532#define BCN_TIME_CFG 0x1114 // TXRX_CSR9 521#define BCN_TIME_CFG 0x1114 // TXRX_CSR9
533 522
534#define BCN_OFFSET0 0x042C 523#define BCN_OFFSET0 0x042C
535#define BCN_OFFSET1 0x0430 524#define BCN_OFFSET1 0x0430
@@ -537,62 +526,62 @@ typedef union _IFS_SLOT_CFG_STRUC {
537// 526//
538// BCN_TIME_CFG : Synchronization control register 527// BCN_TIME_CFG : Synchronization control register
539// 528//
540typedef union _BCN_TIME_CFG_STRUC { 529typedef union _BCN_TIME_CFG_STRUC {
541 struct { 530 struct {
542 UINT32 BeaconInterval:16; // in unit of 1/16 TU 531 UINT32 BeaconInterval:16; // in unit of 1/16 TU
543 UINT32 bTsfTicking:1; // Enable TSF auto counting 532 UINT32 bTsfTicking:1; // Enable TSF auto counting
544 UINT32 TsfSyncMode:2; // Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode 533 UINT32 TsfSyncMode:2; // Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
545 UINT32 bTBTTEnable:1; 534 UINT32 bTBTTEnable:1;
546 UINT32 bBeaconGen:1; // Enable beacon generator 535 UINT32 bBeaconGen:1; // Enable beacon generator
547 UINT32 :3; 536 UINT32:3;
548 UINT32 TxTimestampCompensate:8; 537 UINT32 TxTimestampCompensate:8;
549 } field; 538 } field;
550 UINT32 word; 539 UINT32 word;
551} BCN_TIME_CFG_STRUC, *PBCN_TIME_CFG_STRUC; 540} BCN_TIME_CFG_STRUC, *PBCN_TIME_CFG_STRUC;
552#define TBTT_SYNC_CFG 0x1118 // txrx_csr10 541#define TBTT_SYNC_CFG 0x1118 // txrx_csr10
553#define TSF_TIMER_DW0 0x111C // Local TSF timer lsb 32 bits. Read-only 542#define TSF_TIMER_DW0 0x111C // Local TSF timer lsb 32 bits. Read-only
554#define TSF_TIMER_DW1 0x1120 // msb 32 bits. Read-only. 543#define TSF_TIMER_DW1 0x1120 // msb 32 bits. Read-only.
555#define TBTT_TIMER 0x1124 // TImer remains till next TBTT. Read-only. TXRX_CSR14 544#define TBTT_TIMER 0x1124 // TImer remains till next TBTT. Read-only. TXRX_CSR14
556#define INT_TIMER_CFG 0x1128 // 545#define INT_TIMER_CFG 0x1128 //
557#define INT_TIMER_EN 0x112c // GP-timer and pre-tbtt Int enable 546#define INT_TIMER_EN 0x112c // GP-timer and pre-tbtt Int enable
558#define CH_IDLE_STA 0x1130 // channel idle time 547#define CH_IDLE_STA 0x1130 // channel idle time
559#define CH_BUSY_STA 0x1134 // channle busy time 548#define CH_BUSY_STA 0x1134 // channle busy time
560// 549//
561// 4.2 MAC POWER configuration registers (offset:0x1200) 550// 4.2 MAC POWER configuration registers (offset:0x1200)
562// 551//
563#define MAC_STATUS_CFG 0x1200 // old MAC_CSR12 552#define MAC_STATUS_CFG 0x1200 // old MAC_CSR12
564#define PWR_PIN_CFG 0x1204 // old MAC_CSR12 553#define PWR_PIN_CFG 0x1204 // old MAC_CSR12
565#define AUTO_WAKEUP_CFG 0x1208 // old MAC_CSR10 554#define AUTO_WAKEUP_CFG 0x1208 // old MAC_CSR10
566// 555//
567// AUTO_WAKEUP_CFG: Manual power control / status register 556// AUTO_WAKEUP_CFG: Manual power control / status register
568// 557//
569typedef union _AUTO_WAKEUP_STRUC { 558typedef union _AUTO_WAKEUP_STRUC {
570 struct { 559 struct {
571 UINT32 AutoLeadTime:8; 560 UINT32 AutoLeadTime:8;
572 UINT32 NumofSleepingTbtt:7; // ForceWake has high privilege than PutToSleep when both set 561 UINT32 NumofSleepingTbtt:7; // ForceWake has high privilege than PutToSleep when both set
573 UINT32 EnableAutoWakeup:1; // 0:sleep, 1:awake 562 UINT32 EnableAutoWakeup:1; // 0:sleep, 1:awake
574 UINT32 :16; 563 UINT32:16;
575 } field; 564 } field;
576 UINT32 word; 565 UINT32 word;
577} AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC; 566} AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC;
578// 567//
579// 4.3 MAC TX configuration registers (offset:0x1300) 568// 4.3 MAC TX configuration registers (offset:0x1300)
580// 569//
581 570
582#define EDCA_AC0_CFG 0x1300 //AC_TXOP_CSR0 0x3474 571#define EDCA_AC0_CFG 0x1300 //AC_TXOP_CSR0 0x3474
583#define EDCA_AC1_CFG 0x1304 572#define EDCA_AC1_CFG 0x1304
584#define EDCA_AC2_CFG 0x1308 573#define EDCA_AC2_CFG 0x1308
585#define EDCA_AC3_CFG 0x130c 574#define EDCA_AC3_CFG 0x130c
586typedef union _EDCA_AC_CFG_STRUC { 575typedef union _EDCA_AC_CFG_STRUC {
587 struct { 576 struct {
588 UINT32 AcTxop:8; // in unit of 32us 577 UINT32 AcTxop:8; // in unit of 32us
589 UINT32 Aifsn:4; // # of slot time 578 UINT32 Aifsn:4; // # of slot time
590 UINT32 Cwmin:4; // 579 UINT32 Cwmin:4; //
591 UINT32 Cwmax:4; //unit power of 2 580 UINT32 Cwmax:4; //unit power of 2
592 UINT32 :12; // 581 UINT32:12; //
593 } field; 582 } field;
594 UINT32 word; 583 UINT32 word;
595} EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC; 584} EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC;
596 585
597#define EDCA_TID_AC_MAP 0x1310 586#define EDCA_TID_AC_MAP 0x1310
598#define TX_PWR_CFG_0 0x1314 587#define TX_PWR_CFG_0 0x1314
@@ -601,7 +590,7 @@ typedef union _EDCA_AC_CFG_STRUC {
601#define TX_PWR_CFG_3 0x1320 590#define TX_PWR_CFG_3 0x1320
602#define TX_PWR_CFG_4 0x1324 591#define TX_PWR_CFG_4 0x1324
603#define TX_PIN_CFG 0x1328 592#define TX_PIN_CFG 0x1328
604#define TX_BAND_CFG 0x132c // 0x1 use upper 20MHz. 0 juse lower 20MHz 593#define TX_BAND_CFG 0x132c // 0x1 use upper 20MHz. 0 juse lower 20MHz
605#define TX_SW_CFG0 0x1330 594#define TX_SW_CFG0 0x1330
606#define TX_SW_CFG1 0x1334 595#define TX_SW_CFG1 0x1334
607#define TX_SW_CFG2 0x1338 596#define TX_SW_CFG2 0x1338
@@ -609,163 +598,162 @@ typedef union _EDCA_AC_CFG_STRUC {
609#define TXOP_CTRL_CFG 0x1340 598#define TXOP_CTRL_CFG 0x1340
610#define TX_RTS_CFG 0x1344 599#define TX_RTS_CFG 0x1344
611 600
612typedef union _TX_RTS_CFG_STRUC { 601typedef union _TX_RTS_CFG_STRUC {
613 struct { 602 struct {
614 UINT32 AutoRtsRetryLimit:8; 603 UINT32 AutoRtsRetryLimit:8;
615 UINT32 RtsThres:16; // unit:byte 604 UINT32 RtsThres:16; // unit:byte
616 UINT32 RtsFbkEn:1; // enable rts rate fallback 605 UINT32 RtsFbkEn:1; // enable rts rate fallback
617 UINT32 rsv:7; // 1: HT non-STBC control frame enable 606 UINT32 rsv:7; // 1: HT non-STBC control frame enable
618 } field; 607 } field;
619 UINT32 word; 608 UINT32 word;
620} TX_RTS_CFG_STRUC, *PTX_RTS_CFG_STRUC; 609} TX_RTS_CFG_STRUC, *PTX_RTS_CFG_STRUC;
621#define TX_TIMEOUT_CFG 0x1348 610#define TX_TIMEOUT_CFG 0x1348
622typedef union _TX_TIMEOUT_CFG_STRUC { 611typedef union _TX_TIMEOUT_CFG_STRUC {
623 struct { 612 struct {
624 UINT32 rsv:4; 613 UINT32 rsv:4;
625 UINT32 MpduLifeTime:4; // expiration time = 2^(9+MPDU LIFE TIME) us 614 UINT32 MpduLifeTime:4; // expiration time = 2^(9+MPDU LIFE TIME) us
626 UINT32 RxAckTimeout:8; // unit:slot. Used for TX precedure 615 UINT32 RxAckTimeout:8; // unit:slot. Used for TX precedure
627 UINT32 TxopTimeout:8; //TXOP timeout value for TXOP truncation. It is recommended that (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT) 616 UINT32 TxopTimeout:8; //TXOP timeout value for TXOP truncation. It is recommended that (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
628 UINT32 rsv2:8; // 1: HT non-STBC control frame enable 617 UINT32 rsv2:8; // 1: HT non-STBC control frame enable
629 } field; 618 } field;
630 UINT32 word; 619 UINT32 word;
631} TX_TIMEOUT_CFG_STRUC, *PTX_TIMEOUT_CFG_STRUC; 620} TX_TIMEOUT_CFG_STRUC, *PTX_TIMEOUT_CFG_STRUC;
632#define TX_RTY_CFG 0x134c 621#define TX_RTY_CFG 0x134c
633typedef union PACKED _TX_RTY_CFG_STRUC { 622typedef union PACKED _TX_RTY_CFG_STRUC {
634 struct { 623 struct {
635 UINT32 ShortRtyLimit:8; // short retry limit 624 UINT32 ShortRtyLimit:8; // short retry limit
636 UINT32 LongRtyLimit:8; //long retry limit 625 UINT32 LongRtyLimit:8; //long retry limit
637 UINT32 LongRtyThre:12; // Long retry threshoold 626 UINT32 LongRtyThre:12; // Long retry threshoold
638 UINT32 NonAggRtyMode:1; // Non-Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer 627 UINT32 NonAggRtyMode:1; // Non-Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer
639 UINT32 AggRtyMode:1; // Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer 628 UINT32 AggRtyMode:1; // Aggregate MPDU retry mode. 0:expired by retry limit, 1: expired by mpdu life timer
640 UINT32 TxautoFBEnable:1; // Tx retry PHY rate auto fallback enable 629 UINT32 TxautoFBEnable:1; // Tx retry PHY rate auto fallback enable
641 UINT32 rsv:1; // 1: HT non-STBC control frame enable 630 UINT32 rsv:1; // 1: HT non-STBC control frame enable
642 } field; 631 } field;
643 UINT32 word; 632 UINT32 word;
644} TX_RTY_CFG_STRUC, *PTX_RTY_CFG_STRUC; 633} TX_RTY_CFG_STRUC, *PTX_RTY_CFG_STRUC;
645#define TX_LINK_CFG 0x1350 634#define TX_LINK_CFG 0x1350
646typedef union PACKED _TX_LINK_CFG_STRUC { 635typedef union PACKED _TX_LINK_CFG_STRUC {
647 struct PACKED { 636 struct PACKED {
648 UINT32 RemoteMFBLifeTime:8; //remote MFB life time. unit : 32us 637 UINT32 RemoteMFBLifeTime:8; //remote MFB life time. unit : 32us
649 UINT32 MFBEnable:1; // TX apply remote MFB 1:enable 638 UINT32 MFBEnable:1; // TX apply remote MFB 1:enable
650 UINT32 RemoteUMFSEnable:1; // remote unsolicit MFB enable. 0: not apply remote remote unsolicit (MFS=7) 639 UINT32 RemoteUMFSEnable:1; // remote unsolicit MFB enable. 0: not apply remote remote unsolicit (MFS=7)
651 UINT32 TxMRQEn:1; // MCS request TX enable 640 UINT32 TxMRQEn:1; // MCS request TX enable
652 UINT32 TxRDGEn:1; // RDG TX enable 641 UINT32 TxRDGEn:1; // RDG TX enable
653 UINT32 TxCFAckEn:1; // Piggyback CF-ACK enable 642 UINT32 TxCFAckEn:1; // Piggyback CF-ACK enable
654 UINT32 rsv:3; // 643 UINT32 rsv:3; //
655 UINT32 RemotMFB:8; // remote MCS feedback 644 UINT32 RemotMFB:8; // remote MCS feedback
656 UINT32 RemotMFS:8; //remote MCS feedback sequence number 645 UINT32 RemotMFS:8; //remote MCS feedback sequence number
657 } field; 646 } field;
658 UINT32 word; 647 UINT32 word;
659} TX_LINK_CFG_STRUC, *PTX_LINK_CFG_STRUC; 648} TX_LINK_CFG_STRUC, *PTX_LINK_CFG_STRUC;
660#define HT_FBK_CFG0 0x1354 649#define HT_FBK_CFG0 0x1354
661typedef union PACKED _HT_FBK_CFG0_STRUC { 650typedef union PACKED _HT_FBK_CFG0_STRUC {
662 struct { 651 struct {
663 UINT32 HTMCS0FBK:4; 652 UINT32 HTMCS0FBK:4;
664 UINT32 HTMCS1FBK:4; 653 UINT32 HTMCS1FBK:4;
665 UINT32 HTMCS2FBK:4; 654 UINT32 HTMCS2FBK:4;
666 UINT32 HTMCS3FBK:4; 655 UINT32 HTMCS3FBK:4;
667 UINT32 HTMCS4FBK:4; 656 UINT32 HTMCS4FBK:4;
668 UINT32 HTMCS5FBK:4; 657 UINT32 HTMCS5FBK:4;
669 UINT32 HTMCS6FBK:4; 658 UINT32 HTMCS6FBK:4;
670 UINT32 HTMCS7FBK:4; 659 UINT32 HTMCS7FBK:4;
671 } field; 660 } field;
672 UINT32 word; 661 UINT32 word;
673} HT_FBK_CFG0_STRUC, *PHT_FBK_CFG0_STRUC; 662} HT_FBK_CFG0_STRUC, *PHT_FBK_CFG0_STRUC;
674#define HT_FBK_CFG1 0x1358 663#define HT_FBK_CFG1 0x1358
675typedef union _HT_FBK_CFG1_STRUC { 664typedef union _HT_FBK_CFG1_STRUC {
676 struct { 665 struct {
677 UINT32 HTMCS8FBK:4; 666 UINT32 HTMCS8FBK:4;
678 UINT32 HTMCS9FBK:4; 667 UINT32 HTMCS9FBK:4;
679 UINT32 HTMCS10FBK:4; 668 UINT32 HTMCS10FBK:4;
680 UINT32 HTMCS11FBK:4; 669 UINT32 HTMCS11FBK:4;
681 UINT32 HTMCS12FBK:4; 670 UINT32 HTMCS12FBK:4;
682 UINT32 HTMCS13FBK:4; 671 UINT32 HTMCS13FBK:4;
683 UINT32 HTMCS14FBK:4; 672 UINT32 HTMCS14FBK:4;
684 UINT32 HTMCS15FBK:4; 673 UINT32 HTMCS15FBK:4;
685 } field; 674 } field;
686 UINT32 word; 675 UINT32 word;
687} HT_FBK_CFG1_STRUC, *PHT_FBK_CFG1_STRUC; 676} HT_FBK_CFG1_STRUC, *PHT_FBK_CFG1_STRUC;
688#define LG_FBK_CFG0 0x135c 677#define LG_FBK_CFG0 0x135c
689typedef union _LG_FBK_CFG0_STRUC { 678typedef union _LG_FBK_CFG0_STRUC {
690 struct { 679 struct {
691 UINT32 OFDMMCS0FBK:4; //initial value is 0 680 UINT32 OFDMMCS0FBK:4; //initial value is 0
692 UINT32 OFDMMCS1FBK:4; //initial value is 0 681 UINT32 OFDMMCS1FBK:4; //initial value is 0
693 UINT32 OFDMMCS2FBK:4; //initial value is 1 682 UINT32 OFDMMCS2FBK:4; //initial value is 1
694 UINT32 OFDMMCS3FBK:4; //initial value is 2 683 UINT32 OFDMMCS3FBK:4; //initial value is 2
695 UINT32 OFDMMCS4FBK:4; //initial value is 3 684 UINT32 OFDMMCS4FBK:4; //initial value is 3
696 UINT32 OFDMMCS5FBK:4; //initial value is 4 685 UINT32 OFDMMCS5FBK:4; //initial value is 4
697 UINT32 OFDMMCS6FBK:4; //initial value is 5 686 UINT32 OFDMMCS6FBK:4; //initial value is 5
698 UINT32 OFDMMCS7FBK:4; //initial value is 6 687 UINT32 OFDMMCS7FBK:4; //initial value is 6
699 } field; 688 } field;
700 UINT32 word; 689 UINT32 word;
701} LG_FBK_CFG0_STRUC, *PLG_FBK_CFG0_STRUC; 690} LG_FBK_CFG0_STRUC, *PLG_FBK_CFG0_STRUC;
702#define LG_FBK_CFG1 0x1360 691#define LG_FBK_CFG1 0x1360
703typedef union _LG_FBK_CFG1_STRUC { 692typedef union _LG_FBK_CFG1_STRUC {
704 struct { 693 struct {
705 UINT32 CCKMCS0FBK:4; //initial value is 0 694 UINT32 CCKMCS0FBK:4; //initial value is 0
706 UINT32 CCKMCS1FBK:4; //initial value is 0 695 UINT32 CCKMCS1FBK:4; //initial value is 0
707 UINT32 CCKMCS2FBK:4; //initial value is 1 696 UINT32 CCKMCS2FBK:4; //initial value is 1
708 UINT32 CCKMCS3FBK:4; //initial value is 2 697 UINT32 CCKMCS3FBK:4; //initial value is 2
709 UINT32 rsv:16; 698 UINT32 rsv:16;
710 } field; 699 } field;
711 UINT32 word; 700 UINT32 word;
712} LG_FBK_CFG1_STRUC, *PLG_FBK_CFG1_STRUC; 701} LG_FBK_CFG1_STRUC, *PLG_FBK_CFG1_STRUC;
713
714 702
715//======================================================= 703//=======================================================
716//================ Protection Paramater================================ 704//================ Protection Paramater================================
717//======================================================= 705//=======================================================
718#define CCK_PROT_CFG 0x1364 //CCK Protection 706#define CCK_PROT_CFG 0x1364 //CCK Protection
719#define ASIC_SHORTNAV 1 707#define ASIC_SHORTNAV 1
720#define ASIC_LONGNAV 2 708#define ASIC_LONGNAV 2
721#define ASIC_RTS 1 709#define ASIC_RTS 1
722#define ASIC_CTS 2 710#define ASIC_CTS 2
723typedef union _PROT_CFG_STRUC { 711typedef union _PROT_CFG_STRUC {
724 struct { 712 struct {
725 UINT32 ProtectRate:16; //Protection control frame rate for CCK TX(RTS/CTS/CFEnd). 713 UINT32 ProtectRate:16; //Protection control frame rate for CCK TX(RTS/CTS/CFEnd).
726 UINT32 ProtectCtrl:2; //Protection control frame type for CCK TX. 1:RTS/CTS, 2:CTS-to-self, 0:None, 3:rsv 714 UINT32 ProtectCtrl:2; //Protection control frame type for CCK TX. 1:RTS/CTS, 2:CTS-to-self, 0:None, 3:rsv
727 UINT32 ProtectNav:2; //TXOP protection type for CCK TX. 0:None, 1:ShortNAVprotect, 2:LongNAVProtect, 3:rsv 715 UINT32 ProtectNav:2; //TXOP protection type for CCK TX. 0:None, 1:ShortNAVprotect, 2:LongNAVProtect, 3:rsv
728 UINT32 TxopAllowCck:1; //CCK TXOP allowance.0:disallow. 716 UINT32 TxopAllowCck:1; //CCK TXOP allowance.0:disallow.
729 UINT32 TxopAllowOfdm:1; //CCK TXOP allowance.0:disallow. 717 UINT32 TxopAllowOfdm:1; //CCK TXOP allowance.0:disallow.
730 UINT32 TxopAllowMM20:1; //CCK TXOP allowance. 0:disallow. 718 UINT32 TxopAllowMM20:1; //CCK TXOP allowance. 0:disallow.
731 UINT32 TxopAllowMM40:1; //CCK TXOP allowance.0:disallow. 719 UINT32 TxopAllowMM40:1; //CCK TXOP allowance.0:disallow.
732 UINT32 TxopAllowGF20:1; //CCK TXOP allowance.0:disallow. 720 UINT32 TxopAllowGF20:1; //CCK TXOP allowance.0:disallow.
733 UINT32 TxopAllowGF40:1; //CCK TXOP allowance.0:disallow. 721 UINT32 TxopAllowGF40:1; //CCK TXOP allowance.0:disallow.
734 UINT32 RTSThEn:1; //RTS threshold enable on CCK TX 722 UINT32 RTSThEn:1; //RTS threshold enable on CCK TX
735 UINT32 rsv:5; 723 UINT32 rsv:5;
736 } field; 724 } field;
737 UINT32 word; 725 UINT32 word;
738} PROT_CFG_STRUC, *PPROT_CFG_STRUC; 726} PROT_CFG_STRUC, *PPROT_CFG_STRUC;
739 727
740#define OFDM_PROT_CFG 0x1368 //OFDM Protection 728#define OFDM_PROT_CFG 0x1368 //OFDM Protection
741#define MM20_PROT_CFG 0x136C //MM20 Protection 729#define MM20_PROT_CFG 0x136C //MM20 Protection
742#define MM40_PROT_CFG 0x1370 //MM40 Protection 730#define MM40_PROT_CFG 0x1370 //MM40 Protection
743#define GF20_PROT_CFG 0x1374 //GF20 Protection 731#define GF20_PROT_CFG 0x1374 //GF20 Protection
744#define GF40_PROT_CFG 0x1378 //GR40 Protection 732#define GF40_PROT_CFG 0x1378 //GR40 Protection
745#define EXP_CTS_TIME 0x137C // 733#define EXP_CTS_TIME 0x137C //
746#define EXP_ACK_TIME 0x1380 // 734#define EXP_ACK_TIME 0x1380 //
747 735
748// 736//
749// 4.4 MAC RX configuration registers (offset:0x1400) 737// 4.4 MAC RX configuration registers (offset:0x1400)
750// 738//
751#define RX_FILTR_CFG 0x1400 //TXRX_CSR0 739#define RX_FILTR_CFG 0x1400 //TXRX_CSR0
752#define AUTO_RSP_CFG 0x1404 //TXRX_CSR4 740#define AUTO_RSP_CFG 0x1404 //TXRX_CSR4
753// 741//
754// TXRX_CSR4: Auto-Responder/ 742// TXRX_CSR4: Auto-Responder/
755// 743//
756typedef union _AUTO_RSP_CFG_STRUC { 744typedef union _AUTO_RSP_CFG_STRUC {
757 struct { 745 struct {
758 UINT32 AutoResponderEnable:1; 746 UINT32 AutoResponderEnable:1;
759 UINT32 BACAckPolicyEnable:1; // 0:long, 1:short preamble 747 UINT32 BACAckPolicyEnable:1; // 0:long, 1:short preamble
760 UINT32 CTS40MMode:1; // Response CTS 40MHz duplicate mode 748 UINT32 CTS40MMode:1; // Response CTS 40MHz duplicate mode
761 UINT32 CTS40MRef:1; // Response CTS 40MHz duplicate mode 749 UINT32 CTS40MRef:1; // Response CTS 40MHz duplicate mode
762 UINT32 AutoResponderPreamble:1; // 0:long, 1:short preamble 750 UINT32 AutoResponderPreamble:1; // 0:long, 1:short preamble
763 UINT32 rsv:1; // Power bit value in conrtrol frame 751 UINT32 rsv:1; // Power bit value in conrtrol frame
764 UINT32 DualCTSEn:1; // Power bit value in conrtrol frame 752 UINT32 DualCTSEn:1; // Power bit value in conrtrol frame
765 UINT32 AckCtsPsmBit:1; // Power bit value in conrtrol frame 753 UINT32 AckCtsPsmBit:1; // Power bit value in conrtrol frame
766 UINT32 :24; 754 UINT32:24;
767 } field; 755 } field;
768 UINT32 word; 756 UINT32 word;
769} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC; 757} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC;
770 758
771#define LEGACY_BASIC_RATE 0x1408 // TXRX_CSR5 0x3054 759#define LEGACY_BASIC_RATE 0x1408 // TXRX_CSR5 0x3054
@@ -777,9 +765,9 @@ typedef union _AUTO_RSP_CFG_STRUC {
777// 765//
778// 4.5 MAC Security configuration (offset:0x1500) 766// 4.5 MAC Security configuration (offset:0x1500)
779// 767//
780#define TX_SEC_CNT0 0x1500 // 768#define TX_SEC_CNT0 0x1500 //
781#define RX_SEC_CNT0 0x1504 // 769#define RX_SEC_CNT0 0x1504 //
782#define CCMP_FC_MUTE 0x1508 // 770#define CCMP_FC_MUTE 0x1508 //
783// 771//
784// 4.6 HCCA/PSMP (offset:0x1600) 772// 4.6 HCCA/PSMP (offset:0x1600)
785// 773//
@@ -792,179 +780,179 @@ typedef union _AUTO_RSP_CFG_STRUC {
792// 780//
793// 4.7 MAC Statistis registers (offset:0x1700) 781// 4.7 MAC Statistis registers (offset:0x1700)
794// 782//
795#define RX_STA_CNT0 0x1700 // 783#define RX_STA_CNT0 0x1700 //
796#define RX_STA_CNT1 0x1704 // 784#define RX_STA_CNT1 0x1704 //
797#define RX_STA_CNT2 0x1708 // 785#define RX_STA_CNT2 0x1708 //
798 786
799// 787//
800// RX_STA_CNT0_STRUC: RX PLCP error count & RX CRC error count 788// RX_STA_CNT0_STRUC: RX PLCP error count & RX CRC error count
801// 789//
802typedef union _RX_STA_CNT0_STRUC { 790typedef union _RX_STA_CNT0_STRUC {
803 struct { 791 struct {
804 USHORT CrcErr; 792 USHORT CrcErr;
805 USHORT PhyErr; 793 USHORT PhyErr;
806 } field; 794 } field;
807 UINT32 word; 795 UINT32 word;
808} RX_STA_CNT0_STRUC, *PRX_STA_CNT0_STRUC; 796} RX_STA_CNT0_STRUC, *PRX_STA_CNT0_STRUC;
809 797
810// 798//
811// RX_STA_CNT1_STRUC: RX False CCA count & RX LONG frame count 799// RX_STA_CNT1_STRUC: RX False CCA count & RX LONG frame count
812// 800//
813typedef union _RX_STA_CNT1_STRUC { 801typedef union _RX_STA_CNT1_STRUC {
814 struct { 802 struct {
815 USHORT FalseCca; 803 USHORT FalseCca;
816 USHORT PlcpErr; 804 USHORT PlcpErr;
817 } field; 805 } field;
818 UINT32 word; 806 UINT32 word;
819} RX_STA_CNT1_STRUC, *PRX_STA_CNT1_STRUC; 807} RX_STA_CNT1_STRUC, *PRX_STA_CNT1_STRUC;
820 808
821// 809//
822// RX_STA_CNT2_STRUC: 810// RX_STA_CNT2_STRUC:
823// 811//
824typedef union _RX_STA_CNT2_STRUC { 812typedef union _RX_STA_CNT2_STRUC {
825 struct { 813 struct {
826 USHORT RxDupliCount; 814 USHORT RxDupliCount;
827 USHORT RxFifoOverflowCount; 815 USHORT RxFifoOverflowCount;
828 } field; 816 } field;
829 UINT32 word; 817 UINT32 word;
830} RX_STA_CNT2_STRUC, *PRX_STA_CNT2_STRUC; 818} RX_STA_CNT2_STRUC, *PRX_STA_CNT2_STRUC;
831#define TX_STA_CNT0 0x170C // 819#define TX_STA_CNT0 0x170C //
832// 820//
833// STA_CSR3: TX Beacon count 821// STA_CSR3: TX Beacon count
834// 822//
835typedef union _TX_STA_CNT0_STRUC { 823typedef union _TX_STA_CNT0_STRUC {
836 struct { 824 struct {
837 USHORT TxFailCount; 825 USHORT TxFailCount;
838 USHORT TxBeaconCount; 826 USHORT TxBeaconCount;
839 } field; 827 } field;
840 UINT32 word; 828 UINT32 word;
841} TX_STA_CNT0_STRUC, *PTX_STA_CNT0_STRUC; 829} TX_STA_CNT0_STRUC, *PTX_STA_CNT0_STRUC;
842#define TX_STA_CNT1 0x1710 // 830#define TX_STA_CNT1 0x1710 //
843// 831//
844// TX_STA_CNT1: TX tx count 832// TX_STA_CNT1: TX tx count
845// 833//
846typedef union _TX_STA_CNT1_STRUC { 834typedef union _TX_STA_CNT1_STRUC {
847 struct { 835 struct {
848 USHORT TxSuccess; 836 USHORT TxSuccess;
849 USHORT TxRetransmit; 837 USHORT TxRetransmit;
850 } field; 838 } field;
851 UINT32 word; 839 UINT32 word;
852} TX_STA_CNT1_STRUC, *PTX_STA_CNT1_STRUC; 840} TX_STA_CNT1_STRUC, *PTX_STA_CNT1_STRUC;
853#define TX_STA_CNT2 0x1714 // 841#define TX_STA_CNT2 0x1714 //
854// 842//
855// TX_STA_CNT2: TX tx count 843// TX_STA_CNT2: TX tx count
856// 844//
857typedef union _TX_STA_CNT2_STRUC { 845typedef union _TX_STA_CNT2_STRUC {
858 struct { 846 struct {
859 USHORT TxZeroLenCount; 847 USHORT TxZeroLenCount;
860 USHORT TxUnderFlowCount; 848 USHORT TxUnderFlowCount;
861 } field; 849 } field;
862 UINT32 word; 850 UINT32 word;
863} TX_STA_CNT2_STRUC, *PTX_STA_CNT2_STRUC; 851} TX_STA_CNT2_STRUC, *PTX_STA_CNT2_STRUC;
864#define TX_STA_FIFO 0x1718 // 852#define TX_STA_FIFO 0x1718 //
865// 853//
866// TX_STA_FIFO_STRUC: TX Result for specific PID status fifo register 854// TX_STA_FIFO_STRUC: TX Result for specific PID status fifo register
867// 855//
868typedef union PACKED _TX_STA_FIFO_STRUC { 856typedef union PACKED _TX_STA_FIFO_STRUC {
869 struct { 857 struct {
870 UINT32 bValid:1; // 1:This register contains a valid TX result 858 UINT32 bValid:1; // 1:This register contains a valid TX result
871 UINT32 PidType:4; 859 UINT32 PidType:4;
872 UINT32 TxSuccess:1; // Tx No retry success 860 UINT32 TxSuccess:1; // Tx No retry success
873 UINT32 TxAggre:1; // Tx Retry Success 861 UINT32 TxAggre:1; // Tx Retry Success
874 UINT32 TxAckRequired:1; // Tx fail 862 UINT32 TxAckRequired:1; // Tx fail
875 UINT32 wcid:8; //wireless client index 863 UINT32 wcid:8; //wireless client index
876// UINT32 SuccessRate:16; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. 864// UINT32 SuccessRate:16; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16.
877 UINT32 SuccessRate:13; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16. 865 UINT32 SuccessRate:13; //include MCS, mode ,shortGI, BW settingSame format as TXWI Word 0 Bit 31-16.
878 UINT32 TxBF:1; 866 UINT32 TxBF:1;
879 UINT32 Reserve:2; 867 UINT32 Reserve:2;
880 } field; 868 } field;
881 UINT32 word; 869 UINT32 word;
882} TX_STA_FIFO_STRUC, *PTX_STA_FIFO_STRUC; 870} TX_STA_FIFO_STRUC, *PTX_STA_FIFO_STRUC;
883// Debug counter 871// Debug counter
884#define TX_AGG_CNT 0x171c 872#define TX_AGG_CNT 0x171c
885typedef union _TX_AGG_CNT_STRUC { 873typedef union _TX_AGG_CNT_STRUC {
886 struct { 874 struct {
887 USHORT NonAggTxCount; 875 USHORT NonAggTxCount;
888 USHORT AggTxCount; 876 USHORT AggTxCount;
889 } field; 877 } field;
890 UINT32 word; 878 UINT32 word;
891} TX_AGG_CNT_STRUC, *PTX_AGG_CNT_STRUC; 879} TX_AGG_CNT_STRUC, *PTX_AGG_CNT_STRUC;
892// Debug counter 880// Debug counter
893#define TX_AGG_CNT0 0x1720 881#define TX_AGG_CNT0 0x1720
894typedef union _TX_AGG_CNT0_STRUC { 882typedef union _TX_AGG_CNT0_STRUC {
895 struct { 883 struct {
896 USHORT AggSize1Count; 884 USHORT AggSize1Count;
897 USHORT AggSize2Count; 885 USHORT AggSize2Count;
898 } field; 886 } field;
899 UINT32 word; 887 UINT32 word;
900} TX_AGG_CNT0_STRUC, *PTX_AGG_CNT0_STRUC; 888} TX_AGG_CNT0_STRUC, *PTX_AGG_CNT0_STRUC;
901// Debug counter 889// Debug counter
902#define TX_AGG_CNT1 0x1724 890#define TX_AGG_CNT1 0x1724
903typedef union _TX_AGG_CNT1_STRUC { 891typedef union _TX_AGG_CNT1_STRUC {
904 struct { 892 struct {
905 USHORT AggSize3Count; 893 USHORT AggSize3Count;
906 USHORT AggSize4Count; 894 USHORT AggSize4Count;
907 } field; 895 } field;
908 UINT32 word; 896 UINT32 word;
909} TX_AGG_CNT1_STRUC, *PTX_AGG_CNT1_STRUC; 897} TX_AGG_CNT1_STRUC, *PTX_AGG_CNT1_STRUC;
910#define TX_AGG_CNT2 0x1728 898#define TX_AGG_CNT2 0x1728
911typedef union _TX_AGG_CNT2_STRUC { 899typedef union _TX_AGG_CNT2_STRUC {
912 struct { 900 struct {
913 USHORT AggSize5Count; 901 USHORT AggSize5Count;
914 USHORT AggSize6Count; 902 USHORT AggSize6Count;
915 } field; 903 } field;
916 UINT32 word; 904 UINT32 word;
917} TX_AGG_CNT2_STRUC, *PTX_AGG_CNT2_STRUC; 905} TX_AGG_CNT2_STRUC, *PTX_AGG_CNT2_STRUC;
918// Debug counter 906// Debug counter
919#define TX_AGG_CNT3 0x172c 907#define TX_AGG_CNT3 0x172c
920typedef union _TX_AGG_CNT3_STRUC { 908typedef union _TX_AGG_CNT3_STRUC {
921 struct { 909 struct {
922 USHORT AggSize7Count; 910 USHORT AggSize7Count;
923 USHORT AggSize8Count; 911 USHORT AggSize8Count;
924 } field; 912 } field;
925 UINT32 word; 913 UINT32 word;
926} TX_AGG_CNT3_STRUC, *PTX_AGG_CNT3_STRUC; 914} TX_AGG_CNT3_STRUC, *PTX_AGG_CNT3_STRUC;
927// Debug counter 915// Debug counter
928#define TX_AGG_CNT4 0x1730 916#define TX_AGG_CNT4 0x1730
929typedef union _TX_AGG_CNT4_STRUC { 917typedef union _TX_AGG_CNT4_STRUC {
930 struct { 918 struct {
931 USHORT AggSize9Count; 919 USHORT AggSize9Count;
932 USHORT AggSize10Count; 920 USHORT AggSize10Count;
933 } field; 921 } field;
934 UINT32 word; 922 UINT32 word;
935} TX_AGG_CNT4_STRUC, *PTX_AGG_CNT4_STRUC; 923} TX_AGG_CNT4_STRUC, *PTX_AGG_CNT4_STRUC;
936#define TX_AGG_CNT5 0x1734 924#define TX_AGG_CNT5 0x1734
937typedef union _TX_AGG_CNT5_STRUC { 925typedef union _TX_AGG_CNT5_STRUC {
938 struct { 926 struct {
939 USHORT AggSize11Count; 927 USHORT AggSize11Count;
940 USHORT AggSize12Count; 928 USHORT AggSize12Count;
941 } field; 929 } field;
942 UINT32 word; 930 UINT32 word;
943} TX_AGG_CNT5_STRUC, *PTX_AGG_CNT5_STRUC; 931} TX_AGG_CNT5_STRUC, *PTX_AGG_CNT5_STRUC;
944#define TX_AGG_CNT6 0x1738 932#define TX_AGG_CNT6 0x1738
945typedef union _TX_AGG_CNT6_STRUC { 933typedef union _TX_AGG_CNT6_STRUC {
946 struct { 934 struct {
947 USHORT AggSize13Count; 935 USHORT AggSize13Count;
948 USHORT AggSize14Count; 936 USHORT AggSize14Count;
949 } field; 937 } field;
950 UINT32 word; 938 UINT32 word;
951} TX_AGG_CNT6_STRUC, *PTX_AGG_CNT6_STRUC; 939} TX_AGG_CNT6_STRUC, *PTX_AGG_CNT6_STRUC;
952#define TX_AGG_CNT7 0x173c 940#define TX_AGG_CNT7 0x173c
953typedef union _TX_AGG_CNT7_STRUC { 941typedef union _TX_AGG_CNT7_STRUC {
954 struct { 942 struct {
955 USHORT AggSize15Count; 943 USHORT AggSize15Count;
956 USHORT AggSize16Count; 944 USHORT AggSize16Count;
957 } field; 945 } field;
958 UINT32 word; 946 UINT32 word;
959} TX_AGG_CNT7_STRUC, *PTX_AGG_CNT7_STRUC; 947} TX_AGG_CNT7_STRUC, *PTX_AGG_CNT7_STRUC;
960#define MPDU_DENSITY_CNT 0x1740 948#define MPDU_DENSITY_CNT 0x1740
961typedef union _MPDU_DEN_CNT_STRUC { 949typedef union _MPDU_DEN_CNT_STRUC {
962 struct { 950 struct {
963 USHORT TXZeroDelCount; //TX zero length delimiter count 951 USHORT TXZeroDelCount; //TX zero length delimiter count
964 USHORT RXZeroDelCount; //RX zero length delimiter count 952 USHORT RXZeroDelCount; //RX zero length delimiter count
965 } field; 953 } field;
966 UINT32 word; 954 UINT32 word;
967} MPDU_DEN_CNT_STRUC, *PMPDU_DEN_CNT_STRUC; 955} MPDU_DEN_CNT_STRUC, *PMPDU_DEN_CNT_STRUC;
968// 956//
969// TXRX control registers - base address 0x3000 957// TXRX control registers - base address 0x3000
970// 958//
@@ -974,80 +962,77 @@ typedef union _MPDU_DEN_CNT_STRUC {
974// 962//
975// Security key table memory, base address = 0x1000 963// Security key table memory, base address = 0x1000
976// 964//
977#define MAC_WCID_BASE 0x1800 //8-bytes(use only 6-bytes) * 256 entry = 965#define MAC_WCID_BASE 0x1800 //8-bytes(use only 6-bytes) * 256 entry =
978#define HW_WCID_ENTRY_SIZE 8 966#define HW_WCID_ENTRY_SIZE 8
979#define PAIRWISE_KEY_TABLE_BASE 0x4000 // 32-byte * 256-entry = -byte 967#define PAIRWISE_KEY_TABLE_BASE 0x4000 // 32-byte * 256-entry = -byte
980#define HW_KEY_ENTRY_SIZE 0x20 968#define HW_KEY_ENTRY_SIZE 0x20
981#define PAIRWISE_IVEIV_TABLE_BASE 0x6000 // 8-byte * 256-entry = -byte 969#define PAIRWISE_IVEIV_TABLE_BASE 0x6000 // 8-byte * 256-entry = -byte
982#define MAC_IVEIV_TABLE_BASE 0x6000 // 8-byte * 256-entry = -byte 970#define MAC_IVEIV_TABLE_BASE 0x6000 // 8-byte * 256-entry = -byte
983#define HW_IVEIV_ENTRY_SIZE 8 971#define HW_IVEIV_ENTRY_SIZE 8
984#define MAC_WCID_ATTRIBUTE_BASE 0x6800 // 4-byte * 256-entry = -byte 972#define MAC_WCID_ATTRIBUTE_BASE 0x6800 // 4-byte * 256-entry = -byte
985#define HW_WCID_ATTRI_SIZE 4 973#define HW_WCID_ATTRI_SIZE 4
986#define WCID_RESERVED 0x6bfc 974#define WCID_RESERVED 0x6bfc
987#define SHARED_KEY_TABLE_BASE 0x6c00 // 32-byte * 16-entry = 512-byte 975#define SHARED_KEY_TABLE_BASE 0x6c00 // 32-byte * 16-entry = 512-byte
988#define SHARED_KEY_MODE_BASE 0x7000 // 32-byte * 16-entry = 512-byte 976#define SHARED_KEY_MODE_BASE 0x7000 // 32-byte * 16-entry = 512-byte
989#define HW_SHARED_KEY_MODE_SIZE 4 977#define HW_SHARED_KEY_MODE_SIZE 4
990#define SHAREDKEYTABLE 0 978#define SHAREDKEYTABLE 0
991#define PAIRWISEKEYTABLE 1 979#define PAIRWISEKEYTABLE 1
992 980
993 981typedef union _SHAREDKEY_MODE_STRUC {
994typedef union _SHAREDKEY_MODE_STRUC { 982 struct {
995 struct { 983 UINT32 Bss0Key0CipherAlg:3;
996 UINT32 Bss0Key0CipherAlg:3; 984 UINT32:1;
997 UINT32 :1; 985 UINT32 Bss0Key1CipherAlg:3;
998 UINT32 Bss0Key1CipherAlg:3; 986 UINT32:1;
999 UINT32 :1; 987 UINT32 Bss0Key2CipherAlg:3;
1000 UINT32 Bss0Key2CipherAlg:3; 988 UINT32:1;
1001 UINT32 :1; 989 UINT32 Bss0Key3CipherAlg:3;
1002 UINT32 Bss0Key3CipherAlg:3; 990 UINT32:1;
1003 UINT32 :1; 991 UINT32 Bss1Key0CipherAlg:3;
1004 UINT32 Bss1Key0CipherAlg:3; 992 UINT32:1;
1005 UINT32 :1; 993 UINT32 Bss1Key1CipherAlg:3;
1006 UINT32 Bss1Key1CipherAlg:3; 994 UINT32:1;
1007 UINT32 :1; 995 UINT32 Bss1Key2CipherAlg:3;
1008 UINT32 Bss1Key2CipherAlg:3; 996 UINT32:1;
1009 UINT32 :1; 997 UINT32 Bss1Key3CipherAlg:3;
1010 UINT32 Bss1Key3CipherAlg:3; 998 UINT32:1;
1011 UINT32 :1; 999 } field;
1012 } field; 1000 UINT32 word;
1013 UINT32 word; 1001} SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC;
1014} SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC;
1015// 64-entry for pairwise key table 1002// 64-entry for pairwise key table
1016typedef struct _HW_WCID_ENTRY { // 8-byte per entry 1003typedef struct _HW_WCID_ENTRY { // 8-byte per entry
1017 UCHAR Address[6]; 1004 UCHAR Address[6];
1018 UCHAR Rsv[2]; 1005 UCHAR Rsv[2];
1019} HW_WCID_ENTRY, PHW_WCID_ENTRY; 1006} HW_WCID_ENTRY, PHW_WCID_ENTRY;
1020 1007
1021
1022// ================================================================================= 1008// =================================================================================
1023// WCID format 1009// WCID format
1024// ================================================================================= 1010// =================================================================================
1025//7.1 WCID ENTRY format : 8bytes 1011//7.1 WCID ENTRY format : 8bytes
1026typedef struct _WCID_ENTRY_STRUC { 1012typedef struct _WCID_ENTRY_STRUC {
1027 UCHAR RXBABitmap7; // bit0 for TID8, bit7 for TID 15 1013 UCHAR RXBABitmap7; // bit0 for TID8, bit7 for TID 15
1028 UCHAR RXBABitmap0; // bit0 for TID0, bit7 for TID 7 1014 UCHAR RXBABitmap0; // bit0 for TID0, bit7 for TID 7
1029 UCHAR MAC[6]; // 0 for shared key table. 1 for pairwise key table 1015 UCHAR MAC[6]; // 0 for shared key table. 1 for pairwise key table
1030} WCID_ENTRY_STRUC, *PWCID_ENTRY_STRUC; 1016} WCID_ENTRY_STRUC, *PWCID_ENTRY_STRUC;
1031 1017
1032//8.1.1 SECURITY KEY format : 8DW 1018//8.1.1 SECURITY KEY format : 8DW
1033// 32-byte per entry, total 16-entry for shared key table, 64-entry for pairwise key table 1019// 32-byte per entry, total 16-entry for shared key table, 64-entry for pairwise key table
1034typedef struct _HW_KEY_ENTRY { // 32-byte per entry 1020typedef struct _HW_KEY_ENTRY { // 32-byte per entry
1035 UCHAR Key[16]; 1021 UCHAR Key[16];
1036 UCHAR TxMic[8]; 1022 UCHAR TxMic[8];
1037 UCHAR RxMic[8]; 1023 UCHAR RxMic[8];
1038} HW_KEY_ENTRY, *PHW_KEY_ENTRY; 1024} HW_KEY_ENTRY, *PHW_KEY_ENTRY;
1039 1025
1040//8.1.2 IV/EIV format : 2DW 1026//8.1.2 IV/EIV format : 2DW
1041
1042//8.1.3 RX attribute entry format : 1DW
1043typedef struct _MAC_ATTRIBUTE_STRUC {
1044 UINT32 KeyTab:1; // 0 for shared key table. 1 for pairwise key table
1045 UINT32 PairKeyMode:3;
1046 UINT32 BSSIDIdx:3; //multipleBSS index for the WCID
1047 UINT32 RXWIUDF:3;
1048 UINT32 rsv:22;
1049} MAC_ATTRIBUTE_STRUC, *PMAC_ATTRIBUTE_STRUC;
1050 1027
1028//8.1.3 RX attribute entry format : 1DW
1029typedef struct _MAC_ATTRIBUTE_STRUC {
1030 UINT32 KeyTab:1; // 0 for shared key table. 1 for pairwise key table
1031 UINT32 PairKeyMode:3;
1032 UINT32 BSSIDIdx:3; //multipleBSS index for the WCID
1033 UINT32 RXWIUDF:3;
1034 UINT32 rsv:22;
1035} MAC_ATTRIBUTE_STRUC, *PMAC_ATTRIBUTE_STRUC;
1051 1036
1052// ================================================================================= 1037// =================================================================================
1053// HOST-MCU communication data structure 1038// HOST-MCU communication data structure
@@ -1056,192 +1041,181 @@ typedef struct _MAC_ATTRIBUTE_STRUC {
1056// 1041//
1057// H2M_MAILBOX_CSR: Host-to-MCU Mailbox 1042// H2M_MAILBOX_CSR: Host-to-MCU Mailbox
1058// 1043//
1059typedef union _H2M_MAILBOX_STRUC { 1044typedef union _H2M_MAILBOX_STRUC {
1060 struct { 1045 struct {
1061 UINT32 LowByte:8; 1046 UINT32 LowByte:8;
1062 UINT32 HighByte:8; 1047 UINT32 HighByte:8;
1063 UINT32 CmdToken:8; 1048 UINT32 CmdToken:8;
1064 UINT32 Owner:8; 1049 UINT32 Owner:8;
1065 } field; 1050 } field;
1066 UINT32 word; 1051 UINT32 word;
1067} H2M_MAILBOX_STRUC, *PH2M_MAILBOX_STRUC; 1052} H2M_MAILBOX_STRUC, *PH2M_MAILBOX_STRUC;
1068 1053
1069// 1054//
1070// M2H_CMD_DONE_CSR: MCU-to-Host command complete indication 1055// M2H_CMD_DONE_CSR: MCU-to-Host command complete indication
1071// 1056//
1072typedef union _M2H_CMD_DONE_STRUC { 1057typedef union _M2H_CMD_DONE_STRUC {
1073 struct { 1058 struct {
1074 UINT32 CmdToken0; 1059 UINT32 CmdToken0;
1075 UINT32 CmdToken1; 1060 UINT32 CmdToken1;
1076 UINT32 CmdToken2; 1061 UINT32 CmdToken2;
1077 UINT32 CmdToken3; 1062 UINT32 CmdToken3;
1078 } field; 1063 } field;
1079 UINT32 word; 1064 UINT32 word;
1080} M2H_CMD_DONE_STRUC, *PM2H_CMD_DONE_STRUC; 1065} M2H_CMD_DONE_STRUC, *PM2H_CMD_DONE_STRUC;
1081 1066
1082
1083//NAV_TIME_CFG :NAV 1067//NAV_TIME_CFG :NAV
1084typedef union _NAV_TIME_CFG_STRUC { 1068typedef union _NAV_TIME_CFG_STRUC {
1085 struct { 1069 struct {
1086 UCHAR Sifs; // in unit of 1-us 1070 UCHAR Sifs; // in unit of 1-us
1087 UCHAR SlotTime; // in unit of 1-us 1071 UCHAR SlotTime; // in unit of 1-us
1088 USHORT Eifs:9; // in unit of 1-us 1072 USHORT Eifs:9; // in unit of 1-us
1089 USHORT ZeroSifs:1; // Applied zero SIFS timer after OFDM RX 0: disable 1073 USHORT ZeroSifs:1; // Applied zero SIFS timer after OFDM RX 0: disable
1090 USHORT rsv:6; 1074 USHORT rsv:6;
1091 } field; 1075 } field;
1092 UINT32 word; 1076 UINT32 word;
1093} NAV_TIME_CFG_STRUC, *PNAV_TIME_CFG_STRUC; 1077} NAV_TIME_CFG_STRUC, *PNAV_TIME_CFG_STRUC;
1094
1095 1078
1096// 1079//
1097// RX_FILTR_CFG: /RX configuration register 1080// RX_FILTR_CFG: /RX configuration register
1098// 1081//
1099typedef union _RX_FILTR_CFG_STRUC { 1082typedef union _RX_FILTR_CFG_STRUC {
1100 struct { 1083 struct {
1101 UINT32 DropCRCErr:1; // Drop CRC error 1084 UINT32 DropCRCErr:1; // Drop CRC error
1102 UINT32 DropPhyErr:1; // Drop physical error 1085 UINT32 DropPhyErr:1; // Drop physical error
1103 UINT32 DropNotToMe:1; // Drop not to me unicast frame 1086 UINT32 DropNotToMe:1; // Drop not to me unicast frame
1104 UINT32 DropNotMyBSSID:1; // Drop fram ToDs bit is true 1087 UINT32 DropNotMyBSSID:1; // Drop fram ToDs bit is true
1105
1106 UINT32 DropVerErr:1; // Drop version error frame
1107 UINT32 DropMcast:1; // Drop multicast frames
1108 UINT32 DropBcast:1; // Drop broadcast frames
1109 UINT32 DropDuplicate:1; // Drop duplicate frame
1110 1088
1111 UINT32 DropCFEndAck:1; // Drop Ps-Poll 1089 UINT32 DropVerErr:1; // Drop version error frame
1112 UINT32 DropCFEnd:1; // Drop Ps-Poll 1090 UINT32 DropMcast:1; // Drop multicast frames
1113 UINT32 DropAck:1; // Drop Ps-Poll 1091 UINT32 DropBcast:1; // Drop broadcast frames
1114 UINT32 DropCts:1; // Drop Ps-Poll 1092 UINT32 DropDuplicate:1; // Drop duplicate frame
1115
1116 UINT32 DropRts:1; // Drop Ps-Poll
1117 UINT32 DropPsPoll:1; // Drop Ps-Poll
1118 UINT32 DropBA:1; //
1119 UINT32 DropBAR:1; //
1120
1121 UINT32 DropRsvCntlType:1;
1122 UINT32 :15;
1123 } field;
1124 UINT32 word;
1125} RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC;
1126 1093
1094 UINT32 DropCFEndAck:1; // Drop Ps-Poll
1095 UINT32 DropCFEnd:1; // Drop Ps-Poll
1096 UINT32 DropAck:1; // Drop Ps-Poll
1097 UINT32 DropCts:1; // Drop Ps-Poll
1127 1098
1099 UINT32 DropRts:1; // Drop Ps-Poll
1100 UINT32 DropPsPoll:1; // Drop Ps-Poll
1101 UINT32 DropBA:1; //
1102 UINT32 DropBAR:1; //
1128 1103
1104 UINT32 DropRsvCntlType:1;
1105 UINT32:15;
1106 } field;
1107 UINT32 word;
1108} RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC;
1129 1109
1130// 1110//
1131// PHY_CSR4: RF serial control register 1111// PHY_CSR4: RF serial control register
1132// 1112//
1133typedef union _PHY_CSR4_STRUC { 1113typedef union _PHY_CSR4_STRUC {
1134 struct { 1114 struct {
1135 UINT32 RFRegValue:24; // Register value (include register id) serial out to RF/IF chip. 1115 UINT32 RFRegValue:24; // Register value (include register id) serial out to RF/IF chip.
1136 UINT32 NumberOfBits:5; // Number of bits used in RFRegValue (I:20, RFMD:22) 1116 UINT32 NumberOfBits:5; // Number of bits used in RFRegValue (I:20, RFMD:22)
1137 UINT32 IFSelect:1; // 1: select IF to program, 0: select RF to program 1117 UINT32 IFSelect:1; // 1: select IF to program, 0: select RF to program
1138 UINT32 PLL_LD:1; // RF PLL_LD status 1118 UINT32 PLL_LD:1; // RF PLL_LD status
1139 UINT32 Busy:1; // 1: ASIC is busy execute RF programming. 1119 UINT32 Busy:1; // 1: ASIC is busy execute RF programming.
1140 } field; 1120 } field;
1141 UINT32 word; 1121 UINT32 word;
1142} PHY_CSR4_STRUC, *PPHY_CSR4_STRUC; 1122} PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
1143
1144 1123
1145// 1124//
1146// SEC_CSR5: shared key table security mode register 1125// SEC_CSR5: shared key table security mode register
1147// 1126//
1148typedef union _SEC_CSR5_STRUC { 1127typedef union _SEC_CSR5_STRUC {
1149 struct { 1128 struct {
1150 UINT32 Bss2Key0CipherAlg:3; 1129 UINT32 Bss2Key0CipherAlg:3;
1151 UINT32 :1; 1130 UINT32:1;
1152 UINT32 Bss2Key1CipherAlg:3; 1131 UINT32 Bss2Key1CipherAlg:3;
1153 UINT32 :1; 1132 UINT32:1;
1154 UINT32 Bss2Key2CipherAlg:3; 1133 UINT32 Bss2Key2CipherAlg:3;
1155 UINT32 :1; 1134 UINT32:1;
1156 UINT32 Bss2Key3CipherAlg:3; 1135 UINT32 Bss2Key3CipherAlg:3;
1157 UINT32 :1; 1136 UINT32:1;
1158 UINT32 Bss3Key0CipherAlg:3; 1137 UINT32 Bss3Key0CipherAlg:3;
1159 UINT32 :1; 1138 UINT32:1;
1160 UINT32 Bss3Key1CipherAlg:3; 1139 UINT32 Bss3Key1CipherAlg:3;
1161 UINT32 :1; 1140 UINT32:1;
1162 UINT32 Bss3Key2CipherAlg:3; 1141 UINT32 Bss3Key2CipherAlg:3;
1163 UINT32 :1; 1142 UINT32:1;
1164 UINT32 Bss3Key3CipherAlg:3; 1143 UINT32 Bss3Key3CipherAlg:3;
1165 UINT32 :1; 1144 UINT32:1;
1166 } field; 1145 } field;
1167 UINT32 word; 1146 UINT32 word;
1168} SEC_CSR5_STRUC, *PSEC_CSR5_STRUC; 1147} SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
1169
1170 1148
1171// 1149//
1172// HOST_CMD_CSR: For HOST to interrupt embedded processor 1150// HOST_CMD_CSR: For HOST to interrupt embedded processor
1173// 1151//
1174typedef union _HOST_CMD_CSR_STRUC { 1152typedef union _HOST_CMD_CSR_STRUC {
1175 struct { 1153 struct {
1176 UINT32 HostCommand:8; 1154 UINT32 HostCommand:8;
1177 UINT32 Rsv:24; 1155 UINT32 Rsv:24;
1178 } field; 1156 } field;
1179 UINT32 word; 1157 UINT32 word;
1180} HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC; 1158} HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC;
1181
1182 1159
1183// 1160//
1184// AIFSN_CSR: AIFSN for each EDCA AC 1161// AIFSN_CSR: AIFSN for each EDCA AC
1185// 1162//
1186 1163
1187
1188
1189// 1164//
1190// E2PROM_CSR: EEPROM control register 1165// E2PROM_CSR: EEPROM control register
1191// 1166//
1192typedef union _E2PROM_CSR_STRUC { 1167typedef union _E2PROM_CSR_STRUC {
1193 struct { 1168 struct {
1194 UINT32 Reload:1; // Reload EEPROM content, write one to reload, self-cleared. 1169 UINT32 Reload:1; // Reload EEPROM content, write one to reload, self-cleared.
1195 UINT32 EepromSK:1; 1170 UINT32 EepromSK:1;
1196 UINT32 EepromCS:1; 1171 UINT32 EepromCS:1;
1197 UINT32 EepromDI:1; 1172 UINT32 EepromDI:1;
1198 UINT32 EepromDO:1; 1173 UINT32 EepromDO:1;
1199 UINT32 Type:1; // 1: 93C46, 0:93C66 1174 UINT32 Type:1; // 1: 93C46, 0:93C66
1200 UINT32 LoadStatus:1; // 1:loading, 0:done 1175 UINT32 LoadStatus:1; // 1:loading, 0:done
1201 UINT32 Rsvd:25; 1176 UINT32 Rsvd:25;
1202 } field; 1177 } field;
1203 UINT32 word; 1178 UINT32 word;
1204} E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC; 1179} E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC;
1205 1180
1206// 1181//
1207// QOS_CSR0: TXOP holder address0 register 1182// QOS_CSR0: TXOP holder address0 register
1208// 1183//
1209typedef union _QOS_CSR0_STRUC { 1184typedef union _QOS_CSR0_STRUC {
1210 struct { 1185 struct {
1211 UCHAR Byte0; // MAC address byte 0 1186 UCHAR Byte0; // MAC address byte 0
1212 UCHAR Byte1; // MAC address byte 1 1187 UCHAR Byte1; // MAC address byte 1
1213 UCHAR Byte2; // MAC address byte 2 1188 UCHAR Byte2; // MAC address byte 2
1214 UCHAR Byte3; // MAC address byte 3 1189 UCHAR Byte3; // MAC address byte 3
1215 } field; 1190 } field;
1216 UINT32 word; 1191 UINT32 word;
1217} QOS_CSR0_STRUC, *PQOS_CSR0_STRUC; 1192} QOS_CSR0_STRUC, *PQOS_CSR0_STRUC;
1218 1193
1219// 1194//
1220// QOS_CSR1: TXOP holder address1 register 1195// QOS_CSR1: TXOP holder address1 register
1221// 1196//
1222typedef union _QOS_CSR1_STRUC { 1197typedef union _QOS_CSR1_STRUC {
1223 struct { 1198 struct {
1224 UCHAR Byte4; // MAC address byte 4 1199 UCHAR Byte4; // MAC address byte 4
1225 UCHAR Byte5; // MAC address byte 5 1200 UCHAR Byte5; // MAC address byte 5
1226 UCHAR Rsvd0; 1201 UCHAR Rsvd0;
1227 UCHAR Rsvd1; 1202 UCHAR Rsvd1;
1228 } field; 1203 } field;
1229 UINT32 word; 1204 UINT32 word;
1230} QOS_CSR1_STRUC, *PQOS_CSR1_STRUC; 1205} QOS_CSR1_STRUC, *PQOS_CSR1_STRUC;
1231 1206
1232#define RF_CSR_CFG 0x500 1207#define RF_CSR_CFG 0x500
1233typedef union _RF_CSR_CFG_STRUC { 1208typedef union _RF_CSR_CFG_STRUC {
1234 struct { 1209 struct {
1235 UINT RF_CSR_DATA:8; // DATA 1210 UINT RF_CSR_DATA:8; // DATA
1236 UINT TESTCSR_RFACC_REGNUM:5; // RF register ID 1211 UINT TESTCSR_RFACC_REGNUM:5; // RF register ID
1237 UINT Rsvd2:3; // Reserved 1212 UINT Rsvd2:3; // Reserved
1238 UINT RF_CSR_WR:1; // 0: read 1: write 1213 UINT RF_CSR_WR:1; // 0: read 1: write
1239 UINT RF_CSR_KICK:1; // kick RF register read/write 1214 UINT RF_CSR_KICK:1; // kick RF register read/write
1240 UINT Rsvd1:14; // Reserved 1215 UINT Rsvd1:14; // Reserved
1241 } field; 1216 } field;
1242 UINT word; 1217 UINT word;
1243} RF_CSR_CFG_STRUC, *PRF_CSR_CFG_STRUC; 1218} RF_CSR_CFG_STRUC, *PRF_CSR_CFG_STRUC;
1244
1245 1219
1246// 1220//
1247// Other on-chip shared memory space, base = 0x2000 1221// Other on-chip shared memory space, base = 0x2000
@@ -1258,17 +1232,17 @@ typedef union _RF_CSR_CFG_STRUC {
1258 1232
1259// 2004-11-08 john - since NULL frame won't be that long (256 byte). We steal 16 tail bytes 1233// 2004-11-08 john - since NULL frame won't be that long (256 byte). We steal 16 tail bytes
1260// to save debugging settings 1234// to save debugging settings
1261#define HW_DEBUG_SETTING_BASE 0x77f0 // 0x77f0~0x77ff total 16 bytes 1235#define HW_DEBUG_SETTING_BASE 0x77f0 // 0x77f0~0x77ff total 16 bytes
1262#define HW_DEBUG_SETTING_BASE2 0x7770 // 0x77f0~0x77ff total 16 bytes 1236#define HW_DEBUG_SETTING_BASE2 0x7770 // 0x77f0~0x77ff total 16 bytes
1263 1237
1264// In order to support maximum 8 MBSS and its maximum length is 512 for each beacon 1238// In order to support maximum 8 MBSS and its maximum length is 512 for each beacon
1265// Three section discontinue memory segments will be used. 1239// Three section discontinue memory segments will be used.
1266// 1. The original region for BCN 0~3 1240// 1. The original region for BCN 0~3
1267// 2. Extract memory from FCE table for BCN 4~5 1241// 2. Extract memory from FCE table for BCN 4~5
1268// 3. Extract memory from Pair-wise key table for BCN 6~7 1242// 3. Extract memory from Pair-wise key table for BCN 6~7
1269// It occupied those memory of wcid 238~253 for BCN 6 1243// It occupied those memory of wcid 238~253 for BCN 6
1270// and wcid 222~237 for BCN 7 1244// and wcid 222~237 for BCN 7
1271#define HW_BEACON_MAX_SIZE 0x1000 /* unit: byte */ 1245#define HW_BEACON_MAX_SIZE 0x1000 /* unit: byte */
1272#define HW_BEACON_BASE0 0x7800 1246#define HW_BEACON_BASE0 0x7800
1273#define HW_BEACON_BASE1 0x7A00 1247#define HW_BEACON_BASE1 0x7A00
1274#define HW_BEACON_BASE2 0x7C00 1248#define HW_BEACON_BASE2 0x7C00
@@ -1290,11 +1264,11 @@ typedef union _RF_CSR_CFG_STRUC {
1290#define H2M_INT_SRC 0x7024 1264#define H2M_INT_SRC 0x7024
1291#define H2M_BBP_AGENT 0x7028 1265#define H2M_BBP_AGENT 0x7028
1292#define M2H_CMD_DONE_CSR 0x000c 1266#define M2H_CMD_DONE_CSR 0x000c
1293#define MCU_TXOP_ARRAY_BASE 0x000c // TODO: to be provided by Albert 1267#define MCU_TXOP_ARRAY_BASE 0x000c // TODO: to be provided by Albert
1294#define MCU_TXOP_ENTRY_SIZE 32 // TODO: to be provided by Albert 1268#define MCU_TXOP_ENTRY_SIZE 32 // TODO: to be provided by Albert
1295#define MAX_NUM_OF_TXOP_ENTRY 16 // TODO: must be same with 8051 firmware 1269#define MAX_NUM_OF_TXOP_ENTRY 16 // TODO: must be same with 8051 firmware
1296#define MCU_MBOX_VERSION 0x01 // TODO: to be confirmed by Albert 1270#define MCU_MBOX_VERSION 0x01 // TODO: to be confirmed by Albert
1297#define MCU_MBOX_VERSION_OFFSET 5 // TODO: to be provided by Albert 1271#define MCU_MBOX_VERSION_OFFSET 5 // TODO: to be provided by Albert
1298 1272
1299// 1273//
1300// Host DMA registers - base address 0x200 . TX0-3=EDCAQid0-3, TX4=HCCA, TX5=MGMT, 1274// Host DMA registers - base address 0x200 . TX0-3=EDCAQid0-3, TX4=HCCA, TX5=MGMT,
@@ -1305,10 +1279,8 @@ typedef union _RF_CSR_CFG_STRUC {
1305#define E2PROM_CSR 0x0004 1279#define E2PROM_CSR 0x0004
1306#define IO_CNTL_CSR 0x77d0 1280#define IO_CNTL_CSR 0x77d0
1307 1281
1308
1309
1310// ================================================================ 1282// ================================================================
1311// Tx / Rx / Mgmt ring descriptor definition 1283// Tx / Rx / Mgmt ring descriptor definition
1312// ================================================================ 1284// ================================================================
1313 1285
1314// the following PID values are used to mark outgoing frame type in TXD->PID so that 1286// the following PID values are used to mark outgoing frame type in TXD->PID so that
@@ -1321,8 +1293,8 @@ typedef union _RF_CSR_CFG_STRUC {
1321#define PID_DATA_NO_ACK 0x08 1293#define PID_DATA_NO_ACK 0x08
1322#define PID_DATA_NOT_NORM_ACK 0x03 1294#define PID_DATA_NOT_NORM_ACK 0x03
1323// value domain of pTxD->HostQId (4-bit: 0~15) 1295// value domain of pTxD->HostQId (4-bit: 0~15)
1324#define QID_AC_BK 1 // meet ACI definition in 802.11e 1296#define QID_AC_BK 1 // meet ACI definition in 802.11e
1325#define QID_AC_BE 0 // meet ACI definition in 802.11e 1297#define QID_AC_BE 0 // meet ACI definition in 802.11e
1326#define QID_AC_VI 2 1298#define QID_AC_VI 2
1327#define QID_AC_VO 3 1299#define QID_AC_VO 3
1328#define QID_HCCA 4 1300#define QID_HCCA 4
diff --git a/drivers/staging/rt2860/chip/rtmp_phy.h b/drivers/staging/rt2860/chip/rtmp_phy.h
index 36f438b8215..bbf920d818d 100644
--- a/drivers/staging/rt2860/chip/rtmp_phy.h
+++ b/drivers/staging/rt2860/chip/rtmp_phy.h
@@ -38,7 +38,6 @@
38#ifndef __RTMP_PHY_H__ 38#ifndef __RTMP_PHY_H__
39#define __RTMP_PHY_H__ 39#define __RTMP_PHY_H__
40 40
41
42/* 41/*
43 RF sections 42 RF sections
44*/ 43*/
@@ -75,31 +74,30 @@
75#define RF_R30 30 74#define RF_R30 30
76#define RF_R31 31 75#define RF_R31 31
77 76
78
79// value domain of pAd->RfIcType 77// value domain of pAd->RfIcType
80#define RFIC_2820 1 // 2.4G 2T3R 78#define RFIC_2820 1 // 2.4G 2T3R
81#define RFIC_2850 2 // 2.4G/5G 2T3R 79#define RFIC_2850 2 // 2.4G/5G 2T3R
82#define RFIC_2720 3 // 2.4G 1T2R 80#define RFIC_2720 3 // 2.4G 1T2R
83#define RFIC_2750 4 // 2.4G/5G 1T2R 81#define RFIC_2750 4 // 2.4G/5G 1T2R
84#define RFIC_3020 5 // 2.4G 1T1R 82#define RFIC_3020 5 // 2.4G 1T1R
85#define RFIC_2020 6 // 2.4G B/G 83#define RFIC_2020 6 // 2.4G B/G
86#define RFIC_3021 7 // 2.4G 1T2R 84#define RFIC_3021 7 // 2.4G 1T2R
87#define RFIC_3022 8 // 2.4G 2T2R 85#define RFIC_3022 8 // 2.4G 2T2R
88#define RFIC_3052 9 // 2.4G/5G 2T2R 86#define RFIC_3052 9 // 2.4G/5G 2T2R
89 87
90/* 88/*
91 BBP sections 89 BBP sections
92*/ 90*/
93#define BBP_R0 0 // version 91#define BBP_R0 0 // version
94#define BBP_R1 1 // TSSI 92#define BBP_R1 1 // TSSI
95#define BBP_R2 2 // TX configure 93#define BBP_R2 2 // TX configure
96#define BBP_R3 3 94#define BBP_R3 3
97#define BBP_R4 4 95#define BBP_R4 4
98#define BBP_R5 5 96#define BBP_R5 5
99#define BBP_R6 6 97#define BBP_R6 6
100#define BBP_R14 14 // RX configure 98#define BBP_R14 14 // RX configure
101#define BBP_R16 16 99#define BBP_R16 16
102#define BBP_R17 17 // RX sensibility 100#define BBP_R17 17 // RX sensibility
103#define BBP_R18 18 101#define BBP_R18 18
104#define BBP_R21 21 102#define BBP_R21 21
105#define BBP_R22 22 103#define BBP_R22 22
@@ -108,12 +106,12 @@
108#define BBP_R26 26 106#define BBP_R26 26
109#define BBP_R27 27 107#define BBP_R27 27
110#define BBP_R31 31 108#define BBP_R31 31
111#define BBP_R49 49 //TSSI 109#define BBP_R49 49 //TSSI
112#define BBP_R50 50 110#define BBP_R50 50
113#define BBP_R51 51 111#define BBP_R51 51
114#define BBP_R52 52 112#define BBP_R52 52
115#define BBP_R55 55 113#define BBP_R55 55
116#define BBP_R62 62 // Rx SQ0 Threshold HIGH 114#define BBP_R62 62 // Rx SQ0 Threshold HIGH
117#define BBP_R63 63 115#define BBP_R63 63
118#define BBP_R64 64 116#define BBP_R64 64
119#define BBP_R65 65 117#define BBP_R65 65
@@ -121,7 +119,7 @@
121#define BBP_R67 67 119#define BBP_R67 67
122#define BBP_R68 68 120#define BBP_R68 68
123#define BBP_R69 69 121#define BBP_R69 69
124#define BBP_R70 70 // Rx AGC SQ CCK Xcorr threshold 122#define BBP_R70 70 // Rx AGC SQ CCK Xcorr threshold
125#define BBP_R73 73 123#define BBP_R73 73
126#define BBP_R75 75 124#define BBP_R75 75
127#define BBP_R77 77 125#define BBP_R77 77
@@ -135,7 +133,7 @@
135#define BBP_R86 86 133#define BBP_R86 86
136#define BBP_R91 91 134#define BBP_R91 91
137#define BBP_R92 92 135#define BBP_R92 92
138#define BBP_R94 94 // Tx Gain Control 136#define BBP_R94 94 // Tx Gain Control
139#define BBP_R103 103 137#define BBP_R103 103
140#define BBP_R105 105 138#define BBP_R105 105
141#define BBP_R106 106 139#define BBP_R106 106
@@ -151,16 +149,16 @@
151#define BBP_R122 122 149#define BBP_R122 122
152#define BBP_R123 123 150#define BBP_R123 123
153#ifdef RT30xx 151#ifdef RT30xx
154#define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control 152#define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control
155#endif // RT30xx // 153#endif // RT30xx //
156 154
157#define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db 155#define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db
158 156
159// 157//
160// BBP & RF are using indirect access. Before write any value into it. 158// BBP & RF are using indirect access. Before write any value into it.
161// We have to make sure there is no outstanding command pending via checking busy bit. 159// We have to make sure there is no outstanding command pending via checking busy bit.
162// 160//
163#define MAX_BUSY_COUNT 100 // Number of retry before failing access BBP & RF indirect register 161#define MAX_BUSY_COUNT 100 // Number of retry before failing access BBP & RF indirect register
164 162
165//#define PHY_TR_SWITCH_TIME 5 // usec 163//#define PHY_TR_SWITCH_TIME 5 // usec
166 164
@@ -416,7 +414,6 @@
416 } \ 414 } \
417 }while(0) 415 }while(0)
418 416
419
420/* 417/*
421 This marco used for the BBP write operation which didn't need via MCU. 418 This marco used for the BBP write operation which didn't need via MCU.
422*/ 419*/
@@ -539,7 +536,6 @@
539 RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \ 536 RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \
540 }while(0) 537 }while(0)
541 538
542
543#define RTMP_ASIC_MMPS_ENABLE(_pAd) \ 539#define RTMP_ASIC_MMPS_ENABLE(_pAd) \
544 do{ \ 540 do{ \
545 UINT32 _macData; \ 541 UINT32 _macData; \
diff --git a/drivers/staging/rt2860/chlist.h b/drivers/staging/rt2860/chlist.h
index 9ce91541546..e3d55b429fb 100644
--- a/drivers/staging/rt2860/chlist.h
+++ b/drivers/staging/rt2860/chlist.h
@@ -41,7 +41,6 @@
41#include "rtmp_type.h" 41#include "rtmp_type.h"
42#include "rtmp_def.h" 42#include "rtmp_def.h"
43 43
44
45#define ODOR 0 44#define ODOR 0
46#define IDOR 1 45#define IDOR 1
47#define BOTH 2 46#define BOTH 2
@@ -53,28 +52,27 @@
53typedef struct _CH_DESP { 52typedef struct _CH_DESP {
54 UCHAR FirstChannel; 53 UCHAR FirstChannel;
55 UCHAR NumOfCh; 54 UCHAR NumOfCh;
56 CHAR MaxTxPwr; // dBm 55 CHAR MaxTxPwr; // dBm
57 UCHAR Geography; // 0:out door, 1:in door, 2:both 56 UCHAR Geography; // 0:out door, 1:in door, 2:both
58 BOOLEAN DfsReq; // Dfs require, 0: No, 1: yes. 57 BOOLEAN DfsReq; // Dfs require, 0: No, 1: yes.
59} CH_DESP, *PCH_DESP; 58} CH_DESP, *PCH_DESP;
60 59
61typedef struct _CH_REGION { 60typedef struct _CH_REGION {
62 UCHAR CountReg[3]; 61 UCHAR CountReg[3];
63 UCHAR DfsType; // 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56 62 UCHAR DfsType; // 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56
64 CH_DESP ChDesp[10]; 63 CH_DESP ChDesp[10];
65} CH_REGION, *PCH_REGION; 64} CH_REGION, *PCH_REGION;
66 65
67extern CH_REGION ChRegion[]; 66extern CH_REGION ChRegion[];
68 67
69typedef struct _CH_FREQ_MAP_{ 68typedef struct _CH_FREQ_MAP_ {
70 UINT16 channel; 69 UINT16 channel;
71 UINT16 freqKHz; 70 UINT16 freqKHz;
72}CH_FREQ_MAP; 71} CH_FREQ_MAP;
73 72
74extern CH_FREQ_MAP CH_HZ_ID_MAP[]; 73extern CH_FREQ_MAP CH_HZ_ID_MAP[];
75extern int CH_HZ_ID_MAP_NUM; 74extern int CH_HZ_ID_MAP_NUM;
76 75
77
78#define MAP_CHANNEL_ID_TO_KHZ(_ch, _khz) \ 76#define MAP_CHANNEL_ID_TO_KHZ(_ch, _khz) \
79 do{ \ 77 do{ \
80 int _chIdx; \ 78 int _chIdx; \
@@ -105,24 +103,15 @@ extern int CH_HZ_ID_MAP_NUM;
105 (_ch) = 1; \ 103 (_ch) = 1; \
106 }while(0) 104 }while(0)
107 105
106VOID BuildChannelListEx(IN PRTMP_ADAPTER pAd);
108 107
109VOID BuildChannelListEx( 108VOID BuildBeaconChList(IN PRTMP_ADAPTER pAd,
110 IN PRTMP_ADAPTER pAd); 109 OUT PUCHAR pBuf, OUT PULONG pBufLen);
111 110
112VOID BuildBeaconChList( 111VOID N_ChannelCheck(IN PRTMP_ADAPTER pAd);
113 IN PRTMP_ADAPTER pAd,
114 OUT PUCHAR pBuf,
115 OUT PULONG pBufLen);
116 112
117VOID N_ChannelCheck( 113VOID N_SetCenCh(IN PRTMP_ADAPTER pAd);
118 IN PRTMP_ADAPTER pAd);
119 114
120VOID N_SetCenCh( 115UINT8 GetCuntryMaxTxPwr(IN PRTMP_ADAPTER pAd, IN UINT8 channel);
121 IN PRTMP_ADAPTER pAd);
122
123UINT8 GetCuntryMaxTxPwr(
124 IN PRTMP_ADAPTER pAd,
125 IN UINT8 channel);
126 116
127#endif // __CHLIST_H__ 117#endif // __CHLIST_H__
128
diff --git a/drivers/staging/rt2860/common/action.h b/drivers/staging/rt2860/common/action.h
index cfc2a5f8d1a..2484c2ebf51 100644
--- a/drivers/staging/rt2860/common/action.h
+++ b/drivers/staging/rt2860/common/action.h
@@ -39,23 +39,18 @@
39#ifndef __ACTION_H__ 39#ifndef __ACTION_H__
40#define __ACTION_H__ 40#define __ACTION_H__
41 41
42typedef struct PACKED __HT_INFO_OCTET 42typedef struct PACKED __HT_INFO_OCTET {
43{ 43 UCHAR Request:1;
44 UCHAR Request:1; 44 UCHAR Forty_MHz_Intolerant:1;
45 UCHAR Forty_MHz_Intolerant:1; 45 UCHAR STA_Channel_Width:1;
46 UCHAR STA_Channel_Width:1; 46 UCHAR Reserved:5;
47 UCHAR Reserved:5;
48} HT_INFORMATION_OCTET; 47} HT_INFORMATION_OCTET;
49 48
50 49typedef struct PACKED __FRAME_HT_INFO {
51typedef struct PACKED __FRAME_HT_INFO 50 HEADER_802_11 Hdr;
52{ 51 UCHAR Category;
53 HEADER_802_11 Hdr; 52 UCHAR Action;
54 UCHAR Category; 53 HT_INFORMATION_OCTET HT_Info;
55 UCHAR Action; 54} FRAME_HT_INFO, *PFRAME_HT_INFO;
56 HT_INFORMATION_OCTET HT_Info;
57} FRAME_HT_INFO, *PFRAME_HT_INFO;
58 55
59#endif /* __ACTION_H__ */ 56#endif /* __ACTION_H__ */
60
61
diff --git a/drivers/staging/rt2860/crypt_hmac.h b/drivers/staging/rt2860/crypt_hmac.h
index 717b8a26fd1..6211640001c 100644
--- a/drivers/staging/rt2860/crypt_hmac.h
+++ b/drivers/staging/rt2860/crypt_hmac.h
@@ -48,24 +48,18 @@
48 48
49#ifdef SHA1_SUPPORT 49#ifdef SHA1_SUPPORT
50#define HMAC_SHA1_SUPPORT 50#define HMAC_SHA1_SUPPORT
51VOID HMAC_SHA1 ( 51VOID HMAC_SHA1(IN const UINT8 Key[],
52 IN const UINT8 Key[], 52 IN UINT KeyLen,
53 IN UINT KeyLen, 53 IN const UINT8 Message[],
54 IN const UINT8 Message[], 54 IN UINT MessageLen, OUT UINT8 MAC[], IN UINT MACLen);
55 IN UINT MessageLen,
56 OUT UINT8 MAC[],
57 IN UINT MACLen);
58#endif /* SHA1_SUPPORT */ 55#endif /* SHA1_SUPPORT */
59 56
60#ifdef MD5_SUPPORT 57#ifdef MD5_SUPPORT
61#define HMAC_MD5_SUPPORT 58#define HMAC_MD5_SUPPORT
62VOID HMAC_MD5 ( 59VOID HMAC_MD5(IN const UINT8 Key[],
63 IN const UINT8 Key[], 60 IN UINT KeyLen,
64 IN UINT KeyLen, 61 IN const UINT8 Message[],
65 IN const UINT8 Message[], 62 IN UINT MessageLen, OUT UINT8 MAC[], IN UINT MACLen);
66 IN UINT MessageLen,
67 OUT UINT8 MAC[],
68 IN UINT MACLen);
69#endif /* MD5_SUPPORT */ 63#endif /* MD5_SUPPORT */
70 64
71#endif /* __CRYPT_HMAC_H__ */ 65#endif /* __CRYPT_HMAC_H__ */
diff --git a/drivers/staging/rt2860/crypt_md5.h b/drivers/staging/rt2860/crypt_md5.h
index 66ae42466ce..ecc67e47ef0 100644
--- a/drivers/staging/rt2860/crypt_md5.h
+++ b/drivers/staging/rt2860/crypt_md5.h
@@ -51,30 +51,22 @@
51#define MD5_SUPPORT 51#define MD5_SUPPORT
52 52
53#ifdef MD5_SUPPORT 53#ifdef MD5_SUPPORT
54#define MD5_BLOCK_SIZE 64 /* 512 bits = 64 bytes */ 54#define MD5_BLOCK_SIZE 64 /* 512 bits = 64 bytes */
55#define MD5_DIGEST_SIZE 16 /* 128 bits = 16 bytes */ 55#define MD5_DIGEST_SIZE 16 /* 128 bits = 16 bytes */
56typedef struct { 56typedef struct {
57 UINT32 HashValue[4]; 57 UINT32 HashValue[4];
58 UINT64 MessageLen; 58 UINT64 MessageLen;
59 UINT8 Block[MD5_BLOCK_SIZE]; 59 UINT8 Block[MD5_BLOCK_SIZE];
60 UINT BlockLen; 60 UINT BlockLen;
61} MD5_CTX_STRUC, *PMD5_CTX_STRUC; 61} MD5_CTX_STRUC, *PMD5_CTX_STRUC;
62 62
63VOID MD5_Init ( 63VOID MD5_Init(IN MD5_CTX_STRUC * pMD5_CTX);
64 IN MD5_CTX_STRUC *pMD5_CTX); 64VOID MD5_Hash(IN MD5_CTX_STRUC * pMD5_CTX);
65VOID MD5_Hash ( 65VOID MD5_Append(IN MD5_CTX_STRUC * pMD5_CTX,
66 IN MD5_CTX_STRUC *pMD5_CTX); 66 IN const UINT8 Message[], IN UINT MessageLen);
67VOID MD5_Append ( 67VOID MD5_End(IN MD5_CTX_STRUC * pMD5_CTX, OUT UINT8 DigestMessage[]);
68 IN MD5_CTX_STRUC *pMD5_CTX, 68VOID RT_MD5(IN const UINT8 Message[],
69 IN const UINT8 Message[], 69 IN UINT MessageLen, OUT UINT8 DigestMessage[]);
70 IN UINT MessageLen);
71VOID MD5_End (
72 IN MD5_CTX_STRUC *pMD5_CTX,
73 OUT UINT8 DigestMessage[]);
74VOID RT_MD5 (
75 IN const UINT8 Message[],
76 IN UINT MessageLen,
77 OUT UINT8 DigestMessage[]);
78#endif /* MD5_SUPPORT */ 70#endif /* MD5_SUPPORT */
79 71
80#endif /* __CRYPT_MD5_H__ */ 72#endif /* __CRYPT_MD5_H__ */
diff --git a/drivers/staging/rt2860/crypt_sha2.h b/drivers/staging/rt2860/crypt_sha2.h
index 5b95965e4d1..33d999d7007 100644
--- a/drivers/staging/rt2860/crypt_sha2.h
+++ b/drivers/staging/rt2860/crypt_sha2.h
@@ -52,30 +52,22 @@
52#define SHA1_SUPPORT 52#define SHA1_SUPPORT
53 53
54#ifdef SHA1_SUPPORT 54#ifdef SHA1_SUPPORT
55#define SHA1_BLOCK_SIZE 64 /* 512 bits = 64 bytes */ 55#define SHA1_BLOCK_SIZE 64 /* 512 bits = 64 bytes */
56#define SHA1_DIGEST_SIZE 20 /* 160 bits = 20 bytes */ 56#define SHA1_DIGEST_SIZE 20 /* 160 bits = 20 bytes */
57typedef struct _SHA1_CTX_STRUC { 57typedef struct _SHA1_CTX_STRUC {
58 UINT32 HashValue[5]; /* 5 = (SHA1_DIGEST_SIZE / 32) */ 58 UINT32 HashValue[5]; /* 5 = (SHA1_DIGEST_SIZE / 32) */
59 UINT64 MessageLen; /* total size */ 59 UINT64 MessageLen; /* total size */
60 UINT8 Block[SHA1_BLOCK_SIZE]; 60 UINT8 Block[SHA1_BLOCK_SIZE];
61 UINT BlockLen; 61 UINT BlockLen;
62} SHA1_CTX_STRUC, *PSHA1_CTX_STRUC; 62} SHA1_CTX_STRUC, *PSHA1_CTX_STRUC;
63 63
64VOID RT_SHA1_Init ( 64VOID RT_SHA1_Init(IN SHA1_CTX_STRUC * pSHA_CTX);
65 IN SHA1_CTX_STRUC *pSHA_CTX); 65VOID SHA1_Hash(IN SHA1_CTX_STRUC * pSHA_CTX);
66VOID SHA1_Hash ( 66VOID SHA1_Append(IN SHA1_CTX_STRUC * pSHA_CTX,
67 IN SHA1_CTX_STRUC *pSHA_CTX); 67 IN const UINT8 Message[], IN UINT MessageLen);
68VOID SHA1_Append ( 68VOID SHA1_End(IN SHA1_CTX_STRUC * pSHA_CTX, OUT UINT8 DigestMessage[]);
69 IN SHA1_CTX_STRUC *pSHA_CTX, 69VOID RT_SHA1(IN const UINT8 Message[],
70 IN const UINT8 Message[], 70 IN UINT MessageLen, OUT UINT8 DigestMessage[]);
71 IN UINT MessageLen);
72VOID SHA1_End (
73 IN SHA1_CTX_STRUC *pSHA_CTX,
74 OUT UINT8 DigestMessage[]);
75VOID RT_SHA1 (
76 IN const UINT8 Message[],
77 IN UINT MessageLen,
78 OUT UINT8 DigestMessage[]);
79#endif /* SHA1_SUPPORT */ 71#endif /* SHA1_SUPPORT */
80 72
81#endif /* __CRYPT_SHA2_H__ */ 73#endif /* __CRYPT_SHA2_H__ */
diff --git a/drivers/staging/rt2860/dfs.h b/drivers/staging/rt2860/dfs.h
index 9ab445c736d..9e5e74d6783 100644
--- a/drivers/staging/rt2860/dfs.h
+++ b/drivers/staging/rt2860/dfs.h
@@ -36,6 +36,4 @@
36 Fonchi 03-12-2007 created 36 Fonchi 03-12-2007 created
37*/ 37*/
38 38
39BOOLEAN RadarChannelCheck( 39BOOLEAN RadarChannelCheck(IN PRTMP_ADAPTER pAd, IN UCHAR Ch);
40 IN PRTMP_ADAPTER pAd,
41 IN UCHAR Ch);
diff --git a/drivers/staging/rt2860/eeprom.h b/drivers/staging/rt2860/eeprom.h
index 9979fef97b0..56aa58300c7 100644
--- a/drivers/staging/rt2860/eeprom.h
+++ b/drivers/staging/rt2860/eeprom.h
@@ -24,7 +24,6 @@
24 * * 24 * *
25 ************************************************************************* 25 *************************************************************************
26 26
27
28 Module Name: 27 Module Name:
29 eeprom.h 28 eeprom.h
30 29
@@ -38,41 +37,31 @@
38#ifndef __EEPROM_H__ 37#ifndef __EEPROM_H__
39#define __EEPROM_H__ 38#define __EEPROM_H__
40 39
41
42
43#ifdef RTMP_PCI_SUPPORT 40#ifdef RTMP_PCI_SUPPORT
44/************************************************************************* 41/*************************************************************************
45 * Public function declarations for prom-based chipset 42 * Public function declarations for prom-based chipset
46 ************************************************************************/ 43 ************************************************************************/
47int rtmp_ee_prom_read16( 44int rtmp_ee_prom_read16(IN PRTMP_ADAPTER pAd,
48 IN PRTMP_ADAPTER pAd, 45 IN USHORT Offset, OUT USHORT * pValue);
49 IN USHORT Offset,
50 OUT USHORT *pValue);
51#endif // RTMP_PCI_SUPPORT // 46#endif // RTMP_PCI_SUPPORT //
52#ifdef RTMP_USB_SUPPORT 47#ifdef RTMP_USB_SUPPORT
53/************************************************************************* 48/*************************************************************************
54 * Public function declarations for usb-based prom chipset 49 * Public function declarations for usb-based prom chipset
55 ************************************************************************/ 50 ************************************************************************/
56NTSTATUS RTUSBReadEEPROM16( 51NTSTATUS RTUSBReadEEPROM16(IN PRTMP_ADAPTER pAd,
57 IN PRTMP_ADAPTER pAd, 52 IN USHORT offset, OUT PUSHORT pData);
58 IN USHORT offset,
59 OUT PUSHORT pData);
60#endif // RTMP_USB_SUPPORT // 53#endif // RTMP_USB_SUPPORT //
61 54
62#ifdef RT30xx 55#ifdef RT30xx
63#ifdef RTMP_EFUSE_SUPPORT 56#ifdef RTMP_EFUSE_SUPPORT
64int rtmp_ee_efuse_read16( 57int rtmp_ee_efuse_read16(IN RTMP_ADAPTER * pAd,
65 IN RTMP_ADAPTER *pAd, 58 IN USHORT Offset, OUT USHORT * pValue);
66 IN USHORT Offset,
67 OUT USHORT *pValue);
68#endif // RTMP_EFUSE_SUPPORT // 59#endif // RTMP_EFUSE_SUPPORT //
69#endif // RT30xx // 60#endif // RT30xx //
70 61
71/************************************************************************* 62/*************************************************************************
72 * Public function declarations for prom operation callback functions setting 63 * Public function declarations for prom operation callback functions setting
73 ************************************************************************/ 64 ************************************************************************/
74INT RtmpChipOpsEepromHook( 65INT RtmpChipOpsEepromHook(IN RTMP_ADAPTER * pAd, IN INT infType);
75 IN RTMP_ADAPTER *pAd,
76 IN INT infType);
77 66
78#endif // __EEPROM_H__ // 67#endif // __EEPROM_H__ //
diff --git a/drivers/staging/rt2860/iface/rtmp_pci.h b/drivers/staging/rt2860/iface/rtmp_pci.h
index 7d7efbd9e27..4f42158321c 100644
--- a/drivers/staging/rt2860/iface/rtmp_pci.h
+++ b/drivers/staging/rt2860/iface/rtmp_pci.h
@@ -31,7 +31,6 @@
31#define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \ 31#define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \
32 ((POS_COOKIE)handle)->pci_dev = dev_p; 32 ((POS_COOKIE)handle)->pci_dev = dev_p;
33 33
34
35#ifdef LINUX 34#ifdef LINUX
36// set driver data 35// set driver data
37#define RT28XX_DRVDATA_SET(_a) pci_set_drvdata(_a, net_dev); 36#define RT28XX_DRVDATA_SET(_a) pci_set_drvdata(_a, net_dev);
@@ -64,7 +63,6 @@
64 pci_resource_len(dev_p, 0)); } \ 63 pci_resource_len(dev_p, 0)); } \
65 if (net_dev->irq) pci_release_regions(dev_p); } 64 if (net_dev->irq) pci_release_regions(dev_p); }
66 65
67
68#define PCI_REG_READ_WORD(pci_dev, offset, Configuration) \ 66#define PCI_REG_READ_WORD(pci_dev, offset, Configuration) \
69 if (pci_read_config_word(pci_dev, offset, &reg16) == 0) \ 67 if (pci_read_config_word(pci_dev, offset, &reg16) == 0) \
70 Configuration = le2cpu16(reg16); \ 68 Configuration = le2cpu16(reg16); \
@@ -77,5 +75,4 @@
77 75
78#endif // LINUX // 76#endif // LINUX //
79 77
80
81#endif // __RTMP_PCI_H__ // 78#endif // __RTMP_PCI_H__ //
diff --git a/drivers/staging/rt2860/iface/rtmp_usb.h b/drivers/staging/rt2860/iface/rtmp_usb.h
index 2e9165effb9..26591b000b0 100644
--- a/drivers/staging/rt2860/iface/rtmp_usb.h
+++ b/drivers/staging/rt2860/iface/rtmp_usb.h
@@ -28,28 +28,24 @@
28#ifndef __RTMP_USB_H__ 28#ifndef __RTMP_USB_H__
29#define __RTMP_USB_H__ 29#define __RTMP_USB_H__
30 30
31
32#include "../rtusb_io.h" 31#include "../rtusb_io.h"
33 32
34
35#ifdef LINUX 33#ifdef LINUX
36#include <linux/usb.h> 34#include <linux/usb.h>
37 35
38typedef struct usb_device * PUSB_DEV; 36typedef struct usb_device *PUSB_DEV;
39typedef struct urb *purbb_t; 37typedef struct urb *purbb_t;
40typedef struct usb_ctrlrequest devctrlrequest; 38typedef struct usb_ctrlrequest devctrlrequest;
41#endif // LINUX // 39#endif // LINUX //
42 40
43extern UCHAR EpToQueue[6]; 41extern UCHAR EpToQueue[6];
44 42
45
46#define RXBULKAGGRE_ZISE 12 43#define RXBULKAGGRE_ZISE 12
47#define MAX_TXBULK_LIMIT (LOCAL_TXBUF_SIZE*(BULKAGGRE_ZISE-1)) 44#define MAX_TXBULK_LIMIT (LOCAL_TXBUF_SIZE*(BULKAGGRE_ZISE-1))
48#define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE) 45#define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE)
49#define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE) 46#define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE)
50#define MAX_MLME_HANDLER_MEMORY 20 47#define MAX_MLME_HANDLER_MEMORY 20
51 48
52
53// Flags for Bulkflags control for bulk out data 49// Flags for Bulkflags control for bulk out data
54// 50//
55#define fRTUSB_BULK_OUT_DATA_NULL 0x00000001 51#define fRTUSB_BULK_OUT_DATA_NULL 0x00000001
@@ -69,7 +65,6 @@ extern UCHAR EpToQueue[6];
69 65
70// TODO:move to ./ate/include/iface/ate_usb.h 66// TODO:move to ./ate/include/iface/ate_usb.h
71 67
72
73#define FREE_HTTX_RING(_pCookie, _pipeId, _txContext) \ 68#define FREE_HTTX_RING(_pCookie, _pipeId, _txContext) \
74{ \ 69{ \
75 if ((_txContext)->ENextBulkOutPosition == (_txContext)->CurWritePosition) \ 70 if ((_txContext)->ENextBulkOutPosition == (_txContext)->CurWritePosition) \
@@ -79,8 +74,6 @@ extern UCHAR EpToQueue[6];
79 /*NdisInterlockedDecrement(&(_p)->TxCount); */\ 74 /*NdisInterlockedDecrement(&(_p)->TxCount); */\
80} 75}
81 76
82
83
84/****************************************************************************** 77/******************************************************************************
85 78
86 USB Bulk operation related definitions 79 USB Bulk operation related definitions
@@ -100,7 +93,7 @@ extern UCHAR EpToQueue[6];
100// unlink urb 93// unlink urb
101#define RTUSB_UNLINK_URB(pUrb) usb_kill_urb(pUrb) 94#define RTUSB_UNLINK_URB(pUrb) usb_kill_urb(pUrb)
102 95
103extern void dump_urb(struct urb* purb); 96extern void dump_urb(struct urb *purb);
104 97
105#define InterlockedIncrement atomic_inc 98#define InterlockedIncrement atomic_inc
106#define NdisInterlockedIncrement atomic_inc 99#define NdisInterlockedIncrement atomic_inc
@@ -110,12 +103,8 @@ extern void dump_urb(struct urb* purb);
110 103
111#endif // LINUX // 104#endif // LINUX //
112 105
113
114
115#define NT_SUCCESS(status) (((status) >=0) ? (TRUE):(FALSE)) 106#define NT_SUCCESS(status) (((status) >=0) ? (TRUE):(FALSE))
116 107
117
118
119#define USBD_TRANSFER_DIRECTION_OUT 0 108#define USBD_TRANSFER_DIRECTION_OUT 0
120#define USBD_TRANSFER_DIRECTION_IN 0 109#define USBD_TRANSFER_DIRECTION_IN 0
121#define USBD_SHORT_TRANSFER_OK 0 110#define USBD_SHORT_TRANSFER_OK 0
@@ -131,7 +120,6 @@ extern void dump_urb(struct urb* purb);
131#define CONTROL_TIMEOUT_JIFFIES ( (100 * OS_HZ) / 1000) 120#define CONTROL_TIMEOUT_JIFFIES ( (100 * OS_HZ) / 1000)
132#define UNLINK_TIMEOUT_MS 3 121#define UNLINK_TIMEOUT_MS 3
133 122
134
135VOID RTUSBBulkOutDataPacketComplete(purbb_t purb, struct pt_regs *pt_regs); 123VOID RTUSBBulkOutDataPacketComplete(purbb_t purb, struct pt_regs *pt_regs);
136VOID RTUSBBulkOutMLMEPacketComplete(purbb_t pUrb, struct pt_regs *pt_regs); 124VOID RTUSBBulkOutMLMEPacketComplete(purbb_t pUrb, struct pt_regs *pt_regs);
137VOID RTUSBBulkOutNullFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs); 125VOID RTUSBBulkOutNullFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs);
@@ -139,7 +127,6 @@ VOID RTUSBBulkOutRTSFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs);
139VOID RTUSBBulkOutPsPollComplete(purbb_t pUrb, struct pt_regs *pt_regs); 127VOID RTUSBBulkOutPsPollComplete(purbb_t pUrb, struct pt_regs *pt_regs);
140VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs); 128VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs);
141 129
142
143#ifdef KTHREAD_SUPPORT 130#ifdef KTHREAD_SUPPORT
144#define RTUSBMlmeUp(pAd) \ 131#define RTUSBMlmeUp(pAd) \
145 do{ \ 132 do{ \
@@ -196,5 +183,4 @@ VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs);
196#define RTMP_IRQ_REQUEST(net_dev) do{}while(0) 183#define RTMP_IRQ_REQUEST(net_dev) do{}while(0)
197#define RTMP_IRQ_RELEASE(net_dev) do{}while(0) 184#define RTMP_IRQ_RELEASE(net_dev) do{}while(0)
198 185
199
200#endif // __RTMP_USB_H__ // 186#endif // __RTMP_USB_H__ //
diff --git a/drivers/staging/rt2860/mlme.h b/drivers/staging/rt2860/mlme.h
index f609ea5660a..cb3cc9bbc1f 100644
--- a/drivers/staging/rt2860/mlme.h
+++ b/drivers/staging/rt2860/mlme.h
@@ -41,18 +41,16 @@
41 41
42#include "rtmp_dot11.h" 42#include "rtmp_dot11.h"
43 43
44
45
46// maximum supported capability information - 44// maximum supported capability information -
47// ESS, IBSS, Privacy, Short Preamble, Spectrum mgmt, Short Slot 45// ESS, IBSS, Privacy, Short Preamble, Spectrum mgmt, Short Slot
48#define SUPPORTED_CAPABILITY_INFO 0x0533 46#define SUPPORTED_CAPABILITY_INFO 0x0533
49 47
50#define END_OF_ARGS -1 48#define END_OF_ARGS -1
51#define LFSR_MASK 0x80000057 49#define LFSR_MASK 0x80000057
52#define MLME_TASK_EXEC_INTV 100/*200*/ // 50#define MLME_TASK_EXEC_INTV 100/*200*/ //
53#define LEAD_TIME 5 51#define LEAD_TIME 5
54#define MLME_TASK_EXEC_MULTIPLE 10 /*5*/ // MLME_TASK_EXEC_MULTIPLE * MLME_TASK_EXEC_INTV = 1 sec 52#define MLME_TASK_EXEC_MULTIPLE 10 /*5*/ // MLME_TASK_EXEC_MULTIPLE * MLME_TASK_EXEC_INTV = 1 sec
55#define REORDER_EXEC_INTV 100 // 0.1 sec 53#define REORDER_EXEC_INTV 100 // 0.1 sec
56 54
57// The definition of Radar detection duration region 55// The definition of Radar detection duration region
58#define CE 0 56#define CE 0
@@ -62,34 +60,32 @@
62#define JAP_W56 4 60#define JAP_W56 4
63#define MAX_RD_REGION 5 61#define MAX_RD_REGION 5
64 62
65#define BEACON_LOST_TIME 4 * OS_HZ // 2048 msec = 2 sec 63#define BEACON_LOST_TIME 4 * OS_HZ // 2048 msec = 2 sec
66
67#define DLS_TIMEOUT 1200 // unit: msec
68#define AUTH_TIMEOUT 300 // unit: msec
69#define ASSOC_TIMEOUT 300 // unit: msec
70#define JOIN_TIMEOUT 2000 // unit: msec
71#define SHORT_CHANNEL_TIME 90 // unit: msec
72#define MIN_CHANNEL_TIME 110 // unit: msec, for dual band scan
73#define MAX_CHANNEL_TIME 140 // unit: msec, for single band scan
74#define FAST_ACTIVE_SCAN_TIME 30 // Active scan waiting for probe response time
75#define CW_MIN_IN_BITS 4 // actual CwMin = 2^CW_MIN_IN_BITS - 1
76#define LINK_DOWN_TIMEOUT 20000 // unit: msec
77#define AUTO_WAKEUP_TIMEOUT 70 //unit: msec
78 64
65#define DLS_TIMEOUT 1200 // unit: msec
66#define AUTH_TIMEOUT 300 // unit: msec
67#define ASSOC_TIMEOUT 300 // unit: msec
68#define JOIN_TIMEOUT 2000 // unit: msec
69#define SHORT_CHANNEL_TIME 90 // unit: msec
70#define MIN_CHANNEL_TIME 110 // unit: msec, for dual band scan
71#define MAX_CHANNEL_TIME 140 // unit: msec, for single band scan
72#define FAST_ACTIVE_SCAN_TIME 30 // Active scan waiting for probe response time
73#define CW_MIN_IN_BITS 4 // actual CwMin = 2^CW_MIN_IN_BITS - 1
74#define LINK_DOWN_TIMEOUT 20000 // unit: msec
75#define AUTO_WAKEUP_TIMEOUT 70 //unit: msec
79 76
80#define CW_MAX_IN_BITS 10 // actual CwMax = 2^CW_MAX_IN_BITS - 1 77#define CW_MAX_IN_BITS 10 // actual CwMax = 2^CW_MAX_IN_BITS - 1
81
82 78
83// Note: RSSI_TO_DBM_OFFSET has been changed to variable for new RF (2004-0720). 79// Note: RSSI_TO_DBM_OFFSET has been changed to variable for new RF (2004-0720).
84// SHould not refer to this constant anymore 80// SHould not refer to this constant anymore
85//#define RSSI_TO_DBM_OFFSET 120 // for RT2530 RSSI-115 = dBm 81//#define RSSI_TO_DBM_OFFSET 120 // for RT2530 RSSI-115 = dBm
86#define RSSI_FOR_MID_TX_POWER -55 // -55 db is considered mid-distance 82#define RSSI_FOR_MID_TX_POWER -55 // -55 db is considered mid-distance
87#define RSSI_FOR_LOW_TX_POWER -45 // -45 db is considered very short distance and 83#define RSSI_FOR_LOW_TX_POWER -45 // -45 db is considered very short distance and
88 // eligible to use a lower TX power 84 // eligible to use a lower TX power
89#define RSSI_FOR_LOWEST_TX_POWER -30 85#define RSSI_FOR_LOWEST_TX_POWER -30
90//#define MID_TX_POWER_DELTA 0 // 0 db from full TX power upon mid-distance to AP 86//#define MID_TX_POWER_DELTA 0 // 0 db from full TX power upon mid-distance to AP
91#define LOW_TX_POWER_DELTA 6 // -3 db from full TX power upon very short distance. 1 grade is 0.5 db 87#define LOW_TX_POWER_DELTA 6 // -3 db from full TX power upon very short distance. 1 grade is 0.5 db
92#define LOWEST_TX_POWER_DELTA 16 // -8 db from full TX power upon shortest distance. 1 grade is 0.5 db 88#define LOWEST_TX_POWER_DELTA 16 // -8 db from full TX power upon shortest distance. 1 grade is 0.5 db
93 89
94#define RSSI_TRIGGERED_UPON_BELOW_THRESHOLD 0 90#define RSSI_TRIGGERED_UPON_BELOW_THRESHOLD 0
95#define RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD 1 91#define RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD 1
@@ -99,7 +95,7 @@
99// Channel Quality Indication 95// Channel Quality Indication
100#define CQI_IS_GOOD(cqi) ((cqi) >= 50) 96#define CQI_IS_GOOD(cqi) ((cqi) >= 50)
101//#define CQI_IS_FAIR(cqi) (((cqi) >= 20) && ((cqi) < 50)) 97//#define CQI_IS_FAIR(cqi) (((cqi) >= 20) && ((cqi) < 50))
102#define CQI_IS_POOR(cqi) (cqi < 50) //(((cqi) >= 5) && ((cqi) < 20)) 98#define CQI_IS_POOR(cqi) (cqi < 50) //(((cqi) >= 5) && ((cqi) < 20))
103#define CQI_IS_BAD(cqi) (cqi < 5) 99#define CQI_IS_BAD(cqi) (cqi < 5)
104#define CQI_IS_DEAD(cqi) (cqi == 0) 100#define CQI_IS_DEAD(cqi) (cqi == 0)
105 101
@@ -110,15 +106,15 @@
110 106
111#define BSS_NOT_FOUND 0xFFFFFFFF 107#define BSS_NOT_FOUND 0xFFFFFFFF
112 108
113#define MAX_LEN_OF_MLME_QUEUE 40 //10 109#define MAX_LEN_OF_MLME_QUEUE 40 //10
114 110
115#define SCAN_PASSIVE 18 // scan with no probe request, only wait beacon and probe response 111#define SCAN_PASSIVE 18 // scan with no probe request, only wait beacon and probe response
116#define SCAN_ACTIVE 19 // scan with probe request, and wait beacon and probe response 112#define SCAN_ACTIVE 19 // scan with probe request, and wait beacon and probe response
117#define SCAN_CISCO_PASSIVE 20 // Single channel passive scan 113#define SCAN_CISCO_PASSIVE 20 // Single channel passive scan
118#define SCAN_CISCO_ACTIVE 21 // Single channel active scan 114#define SCAN_CISCO_ACTIVE 21 // Single channel active scan
119#define SCAN_CISCO_NOISE 22 // Single channel passive scan for noise histogram collection 115#define SCAN_CISCO_NOISE 22 // Single channel passive scan for noise histogram collection
120#define SCAN_CISCO_CHANNEL_LOAD 23 // Single channel passive scan for channel load collection 116#define SCAN_CISCO_CHANNEL_LOAD 23 // Single channel passive scan for channel load collection
121#define FAST_SCAN_ACTIVE 24 // scan with probe request, and wait beacon and probe response 117#define FAST_SCAN_ACTIVE 24 // scan with probe request, and wait beacon and probe response
122 118
123#define MAC_ADDR_IS_GROUP(Addr) (((Addr[0]) & 0x01)) 119#define MAC_ADDR_IS_GROUP(Addr) (((Addr[0]) & 0x01))
124#define MAC_ADDR_HASH(Addr) (Addr[0] ^ Addr[1] ^ Addr[2] ^ Addr[3] ^ Addr[4] ^ Addr[5]) 120#define MAC_ADDR_HASH(Addr) (Addr[0] ^ Addr[1] ^ Addr[2] ^ Addr[3] ^ Addr[4] ^ Addr[5])
@@ -141,21 +137,21 @@
141#define CAP_IS_SHORT_PREAMBLE_ON(x) (((x) & 0x0020) != 0) 137#define CAP_IS_SHORT_PREAMBLE_ON(x) (((x) & 0x0020) != 0)
142#define CAP_IS_PBCC_ON(x) (((x) & 0x0040) != 0) 138#define CAP_IS_PBCC_ON(x) (((x) & 0x0040) != 0)
143#define CAP_IS_AGILITY_ON(x) (((x) & 0x0080) != 0) 139#define CAP_IS_AGILITY_ON(x) (((x) & 0x0080) != 0)
144#define CAP_IS_SPECTRUM_MGMT(x) (((x) & 0x0100) != 0) // 802.11e d9 140#define CAP_IS_SPECTRUM_MGMT(x) (((x) & 0x0100) != 0) // 802.11e d9
145#define CAP_IS_QOS(x) (((x) & 0x0200) != 0) // 802.11e d9 141#define CAP_IS_QOS(x) (((x) & 0x0200) != 0) // 802.11e d9
146#define CAP_IS_SHORT_SLOT(x) (((x) & 0x0400) != 0) 142#define CAP_IS_SHORT_SLOT(x) (((x) & 0x0400) != 0)
147#define CAP_IS_APSD(x) (((x) & 0x0800) != 0) // 802.11e d9 143#define CAP_IS_APSD(x) (((x) & 0x0800) != 0) // 802.11e d9
148#define CAP_IS_IMMED_BA(x) (((x) & 0x1000) != 0) // 802.11e d9 144#define CAP_IS_IMMED_BA(x) (((x) & 0x1000) != 0) // 802.11e d9
149#define CAP_IS_DSSS_OFDM(x) (((x) & 0x2000) != 0) 145#define CAP_IS_DSSS_OFDM(x) (((x) & 0x2000) != 0)
150#define CAP_IS_DELAY_BA(x) (((x) & 0x4000) != 0) // 802.11e d9 146#define CAP_IS_DELAY_BA(x) (((x) & 0x4000) != 0) // 802.11e d9
151 147
152#define CAP_GENERATE(ess,ibss,priv,s_pre,s_slot,spectrum) (((ess) ? 0x0001 : 0x0000) | ((ibss) ? 0x0002 : 0x0000) | ((priv) ? 0x0010 : 0x0000) | ((s_pre) ? 0x0020 : 0x0000) | ((s_slot) ? 0x0400 : 0x0000) | ((spectrum) ? 0x0100 : 0x0000)) 148#define CAP_GENERATE(ess,ibss,priv,s_pre,s_slot,spectrum) (((ess) ? 0x0001 : 0x0000) | ((ibss) ? 0x0002 : 0x0000) | ((priv) ? 0x0010 : 0x0000) | ((s_pre) ? 0x0020 : 0x0000) | ((s_slot) ? 0x0400 : 0x0000) | ((spectrum) ? 0x0100 : 0x0000))
153 149
154#define ERP_IS_NON_ERP_PRESENT(x) (((x) & 0x01) != 0) // 802.11g 150#define ERP_IS_NON_ERP_PRESENT(x) (((x) & 0x01) != 0) // 802.11g
155#define ERP_IS_USE_PROTECTION(x) (((x) & 0x02) != 0) // 802.11g 151#define ERP_IS_USE_PROTECTION(x) (((x) & 0x02) != 0) // 802.11g
156#define ERP_IS_USE_BARKER_PREAMBLE(x) (((x) & 0x04) != 0) // 802.11g 152#define ERP_IS_USE_BARKER_PREAMBLE(x) (((x) & 0x04) != 0) // 802.11g
157 153
158#define DRS_TX_QUALITY_WORST_BOUND 8// 3 // just test by gary 154#define DRS_TX_QUALITY_WORST_BOUND 8 // 3 // just test by gary
159#define DRS_PENALTY 8 155#define DRS_PENALTY 8
160 156
161#define BA_NOTUSE 2 157#define BA_NOTUSE 2
@@ -192,500 +188,485 @@ if (((__pEntry)) != NULL) \
192// 188//
193// HT Capability INFO field in HT Cap IE . 189// HT Capability INFO field in HT Cap IE .
194typedef struct PACKED { 190typedef struct PACKED {
195 USHORT AdvCoding:1; 191 USHORT AdvCoding:1;
196 USHORT ChannelWidth:1; 192 USHORT ChannelWidth:1;
197 USHORT MimoPs:2;//momi power safe 193 USHORT MimoPs:2; //momi power safe
198 USHORT GF:1; //green field 194 USHORT GF:1; //green field
199 USHORT ShortGIfor20:1; 195 USHORT ShortGIfor20:1;
200 USHORT ShortGIfor40:1; //for40MHz 196 USHORT ShortGIfor40:1; //for40MHz
201 USHORT TxSTBC:1; 197 USHORT TxSTBC:1;
202 USHORT RxSTBC:2; 198 USHORT RxSTBC:2;
203 USHORT DelayedBA:1; //rt2860c not support 199 USHORT DelayedBA:1; //rt2860c not support
204 USHORT AMsduSize:1; // only support as zero 200 USHORT AMsduSize:1; // only support as zero
205 USHORT CCKmodein40:1; 201 USHORT CCKmodein40:1;
206 USHORT PSMP:1; 202 USHORT PSMP:1;
207 USHORT Forty_Mhz_Intolerant:1; 203 USHORT Forty_Mhz_Intolerant:1;
208 USHORT LSIGTxopProSup:1; 204 USHORT LSIGTxopProSup:1;
209} HT_CAP_INFO, *PHT_CAP_INFO; 205} HT_CAP_INFO, *PHT_CAP_INFO;
210 206
211// HT Capability INFO field in HT Cap IE . 207// HT Capability INFO field in HT Cap IE .
212typedef struct PACKED { 208typedef struct PACKED {
213 UCHAR MaxRAmpduFactor:2; 209 UCHAR MaxRAmpduFactor:2;
214 UCHAR MpduDensity:3; 210 UCHAR MpduDensity:3;
215 UCHAR rsv:3;//momi power safe 211 UCHAR rsv:3; //momi power safe
216} HT_CAP_PARM, *PHT_CAP_PARM; 212} HT_CAP_PARM, *PHT_CAP_PARM;
217 213
218// HT Capability INFO field in HT Cap IE . 214// HT Capability INFO field in HT Cap IE .
219typedef struct PACKED { 215typedef struct PACKED {
220 UCHAR MCSSet[10]; 216 UCHAR MCSSet[10];
221 UCHAR SupRate[2]; // unit : 1Mbps 217 UCHAR SupRate[2]; // unit : 1Mbps
222 UCHAR TxMCSSetDefined:1; 218 UCHAR TxMCSSetDefined:1;
223 UCHAR TxRxNotEqual:1; 219 UCHAR TxRxNotEqual:1;
224 UCHAR TxStream:2; 220 UCHAR TxStream:2;
225 UCHAR MpduDensity:1; 221 UCHAR MpduDensity:1;
226 UCHAR rsv:3; 222 UCHAR rsv:3;
227 UCHAR rsv3[3]; 223 UCHAR rsv3[3];
228} HT_MCS_SET, *PHT_MCS_SET; 224} HT_MCS_SET, *PHT_MCS_SET;
229 225
230// HT Capability INFO field in HT Cap IE . 226// HT Capability INFO field in HT Cap IE .
231typedef struct PACKED { 227typedef struct PACKED {
232 USHORT Pco:1; 228 USHORT Pco:1;
233 USHORT TranTime:2; 229 USHORT TranTime:2;
234 USHORT rsv:5;//momi power safe 230 USHORT rsv:5; //momi power safe
235 USHORT MCSFeedback:2; //0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback, 1:rsv. 231 USHORT MCSFeedback:2; //0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback, 1:rsv.
236 USHORT PlusHTC:1; //+HTC control field support 232 USHORT PlusHTC:1; //+HTC control field support
237 USHORT RDGSupport:1; //reverse Direction Grant support 233 USHORT RDGSupport:1; //reverse Direction Grant support
238 USHORT rsv2:4; 234 USHORT rsv2:4;
239} EXT_HT_CAP_INFO, *PEXT_HT_CAP_INFO; 235} EXT_HT_CAP_INFO, *PEXT_HT_CAP_INFO;
240 236
241// HT Beamforming field in HT Cap IE . 237// HT Beamforming field in HT Cap IE .
242typedef struct PACKED _HT_BF_CAP{ 238typedef struct PACKED _HT_BF_CAP {
243 ULONG TxBFRecCapable:1; 239 ULONG TxBFRecCapable:1;
244 ULONG RxSoundCapable:1; 240 ULONG RxSoundCapable:1;
245 ULONG TxSoundCapable:1; 241 ULONG TxSoundCapable:1;
246 ULONG RxNDPCapable:1; 242 ULONG RxNDPCapable:1;
247 ULONG TxNDPCapable:1; 243 ULONG TxNDPCapable:1;
248 ULONG ImpTxBFCapable:1; 244 ULONG ImpTxBFCapable:1;
249 ULONG Calibration:2; 245 ULONG Calibration:2;
250 ULONG ExpCSICapable:1; 246 ULONG ExpCSICapable:1;
251 ULONG ExpNoComSteerCapable:1; 247 ULONG ExpNoComSteerCapable:1;
252 ULONG ExpComSteerCapable:1; 248 ULONG ExpComSteerCapable:1;
253 ULONG ExpCSIFbk:2; 249 ULONG ExpCSIFbk:2;
254 ULONG ExpNoComBF:2; 250 ULONG ExpNoComBF:2;
255 ULONG ExpComBF:2; 251 ULONG ExpComBF:2;
256 ULONG MinGrouping:2; 252 ULONG MinGrouping:2;
257 ULONG CSIBFAntSup:2; 253 ULONG CSIBFAntSup:2;
258 ULONG NoComSteerBFAntSup:2; 254 ULONG NoComSteerBFAntSup:2;
259 ULONG ComSteerBFAntSup:2; 255 ULONG ComSteerBFAntSup:2;
260 ULONG CSIRowBFSup:2; 256 ULONG CSIRowBFSup:2;
261 ULONG ChanEstimation:2; 257 ULONG ChanEstimation:2;
262 ULONG rsv:3; 258 ULONG rsv:3;
263} HT_BF_CAP, *PHT_BF_CAP; 259} HT_BF_CAP, *PHT_BF_CAP;
264 260
265// HT antenna selection field in HT Cap IE . 261// HT antenna selection field in HT Cap IE .
266typedef struct PACKED _HT_AS_CAP{ 262typedef struct PACKED _HT_AS_CAP {
267 UCHAR AntSelect:1; 263 UCHAR AntSelect:1;
268 UCHAR ExpCSIFbkTxASEL:1; 264 UCHAR ExpCSIFbkTxASEL:1;
269 UCHAR AntIndFbkTxASEL:1; 265 UCHAR AntIndFbkTxASEL:1;
270 UCHAR ExpCSIFbk:1; 266 UCHAR ExpCSIFbk:1;
271 UCHAR AntIndFbk:1; 267 UCHAR AntIndFbk:1;
272 UCHAR RxASel:1; 268 UCHAR RxASel:1;
273 UCHAR TxSoundPPDU:1; 269 UCHAR TxSoundPPDU:1;
274 UCHAR rsv:1; 270 UCHAR rsv:1;
275} HT_AS_CAP, *PHT_AS_CAP; 271} HT_AS_CAP, *PHT_AS_CAP;
276 272
277// Draft 1.0 set IE length 26, but is extensible.. 273// Draft 1.0 set IE length 26, but is extensible..
278#define SIZE_HT_CAP_IE 26 274#define SIZE_HT_CAP_IE 26
279// The structure for HT Capability IE. 275// The structure for HT Capability IE.
280typedef struct PACKED _HT_CAPABILITY_IE{ 276typedef struct PACKED _HT_CAPABILITY_IE {
281 HT_CAP_INFO HtCapInfo; 277 HT_CAP_INFO HtCapInfo;
282 HT_CAP_PARM HtCapParm; 278 HT_CAP_PARM HtCapParm;
283// HT_MCS_SET HtMCSSet; 279// HT_MCS_SET HtMCSSet;
284 UCHAR MCSSet[16]; 280 UCHAR MCSSet[16];
285 EXT_HT_CAP_INFO ExtHtCapInfo; 281 EXT_HT_CAP_INFO ExtHtCapInfo;
286 HT_BF_CAP TxBFCap; // beamforming cap. rt2860c not support beamforming. 282 HT_BF_CAP TxBFCap; // beamforming cap. rt2860c not support beamforming.
287 HT_AS_CAP ASCap; //antenna selection. 283 HT_AS_CAP ASCap; //antenna selection.
288} HT_CAPABILITY_IE, *PHT_CAPABILITY_IE; 284} HT_CAPABILITY_IE, *PHT_CAPABILITY_IE;
289 285
290
291// 802.11n draft3 related structure definitions. 286// 802.11n draft3 related structure definitions.
292// 7.3.2.60 287// 7.3.2.60
293#define dot11OBSSScanPassiveDwell 20 // in TU. min amount of time that the STA continously scans each channel when performing an active OBSS scan. 288#define dot11OBSSScanPassiveDwell 20 // in TU. min amount of time that the STA continously scans each channel when performing an active OBSS scan.
294#define dot11OBSSScanActiveDwell 10 // in TU.min amount of time that the STA continously scans each channel when performing an passive OBSS scan. 289#define dot11OBSSScanActiveDwell 10 // in TU.min amount of time that the STA continously scans each channel when performing an passive OBSS scan.
295#define dot11BSSWidthTriggerScanInterval 300 // in sec. max interval between scan operations to be performed to detect BSS channel width trigger events. 290#define dot11BSSWidthTriggerScanInterval 300 // in sec. max interval between scan operations to be performed to detect BSS channel width trigger events.
296#define dot11OBSSScanPassiveTotalPerChannel 200 // in TU. min total amount of time that the STA scans each channel when performing a passive OBSS scan. 291#define dot11OBSSScanPassiveTotalPerChannel 200 // in TU. min total amount of time that the STA scans each channel when performing a passive OBSS scan.
297#define dot11OBSSScanActiveTotalPerChannel 20 //in TU. min total amount of time that the STA scans each channel when performing a active OBSS scan 292#define dot11OBSSScanActiveTotalPerChannel 20 //in TU. min total amount of time that the STA scans each channel when performing a active OBSS scan
298#define dot11BSSWidthChannelTransactionDelayFactor 5 // min ratio between the delay time in performing a switch from 20MHz BSS to 20/40 BSS operation and the maximum 293#define dot11BSSWidthChannelTransactionDelayFactor 5 // min ratio between the delay time in performing a switch from 20MHz BSS to 20/40 BSS operation and the maximum
299 // interval between overlapping BSS scan operations. 294 // interval between overlapping BSS scan operations.
300#define dot11BSSScanActivityThreshold 25 // in %%, max total time that a STA may be active on the medium during a period of 295#define dot11BSSScanActivityThreshold 25 // in %%, max total time that a STA may be active on the medium during a period of
301 // (dot11BSSWidthChannelTransactionDelayFactor * dot11BSSWidthTriggerScanInterval) seconds without 296 // (dot11BSSWidthChannelTransactionDelayFactor * dot11BSSWidthTriggerScanInterval) seconds without
302 // being obligated to perform OBSS Scan operations. default is 25(== 0.25%) 297 // being obligated to perform OBSS Scan operations. default is 25(== 0.25%)
303 298
304typedef struct PACKED _OVERLAP_BSS_SCAN_IE{ 299typedef struct PACKED _OVERLAP_BSS_SCAN_IE {
305 USHORT ScanPassiveDwell; 300 USHORT ScanPassiveDwell;
306 USHORT ScanActiveDwell; 301 USHORT ScanActiveDwell;
307 USHORT TriggerScanInt; // Trigger scan interval 302 USHORT TriggerScanInt; // Trigger scan interval
308 USHORT PassiveTalPerChannel; // passive total per channel 303 USHORT PassiveTalPerChannel; // passive total per channel
309 USHORT ActiveTalPerChannel; // active total per channel 304 USHORT ActiveTalPerChannel; // active total per channel
310 USHORT DelayFactor; // BSS width channel transition delay factor 305 USHORT DelayFactor; // BSS width channel transition delay factor
311 USHORT ScanActThre; // Scan Activity threshold 306 USHORT ScanActThre; // Scan Activity threshold
312}OVERLAP_BSS_SCAN_IE, *POVERLAP_BSS_SCAN_IE; 307} OVERLAP_BSS_SCAN_IE, *POVERLAP_BSS_SCAN_IE;
313
314 308
315// 7.3.2.56. 20/40 Coexistence element used in Element ID = 72 = IE_2040_BSS_COEXIST 309// 7.3.2.56. 20/40 Coexistence element used in Element ID = 72 = IE_2040_BSS_COEXIST
316typedef union PACKED _BSS_2040_COEXIST_IE{ 310typedef union PACKED _BSS_2040_COEXIST_IE {
317 struct PACKED { 311 struct PACKED {
318 UCHAR InfoReq:1; 312 UCHAR InfoReq:1;
319 UCHAR Intolerant40:1; // Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS. 313 UCHAR Intolerant40:1; // Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS.
320 UCHAR BSS20WidthReq:1; // Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS. 314 UCHAR BSS20WidthReq:1; // Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS.
321 UCHAR rsv:5; 315 UCHAR rsv:5;
322 } field; 316 } field;
323 UCHAR word; 317 UCHAR word;
324} BSS_2040_COEXIST_IE, *PBSS_2040_COEXIST_IE; 318} BSS_2040_COEXIST_IE, *PBSS_2040_COEXIST_IE;
325 319
326 320typedef struct _TRIGGER_EVENTA {
327typedef struct _TRIGGER_EVENTA{ 321 BOOLEAN bValid;
328 BOOLEAN bValid; 322 UCHAR BSSID[6];
329 UCHAR BSSID[6]; 323 UCHAR RegClass; // Regulatory Class
330 UCHAR RegClass; // Regulatory Class 324 USHORT Channel;
331 USHORT Channel; 325 ULONG CDCounter; // Maintain a seperate count down counter for each Event A.
332 ULONG CDCounter; // Maintain a seperate count down counter for each Event A.
333} TRIGGER_EVENTA, *PTRIGGER_EVENTA; 326} TRIGGER_EVENTA, *PTRIGGER_EVENTA;
334 327
335// 20/40 trigger event table 328// 20/40 trigger event table
336// If one Event A delete or created, or if Event B is detected or not detected, STA should send 2040BSSCoexistence to AP. 329// If one Event A delete or created, or if Event B is detected or not detected, STA should send 2040BSSCoexistence to AP.
337#define MAX_TRIGGER_EVENT 64 330#define MAX_TRIGGER_EVENT 64
338typedef struct _TRIGGER_EVENT_TAB{ 331typedef struct _TRIGGER_EVENT_TAB {
339 UCHAR EventANo; 332 UCHAR EventANo;
340 TRIGGER_EVENTA EventA[MAX_TRIGGER_EVENT]; 333 TRIGGER_EVENTA EventA[MAX_TRIGGER_EVENT];
341 ULONG EventBCountDown; // Count down counter for Event B. 334 ULONG EventBCountDown; // Count down counter for Event B.
342} TRIGGER_EVENT_TAB, *PTRIGGER_EVENT_TAB; 335} TRIGGER_EVENT_TAB, *PTRIGGER_EVENT_TAB;
343 336
344// 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY). 337// 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY).
345// This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0 338// This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0
346typedef struct PACKED _EXT_CAP_INFO_ELEMENT{ 339typedef struct PACKED _EXT_CAP_INFO_ELEMENT {
347 UCHAR BssCoexistMgmtSupport:1; 340 UCHAR BssCoexistMgmtSupport:1;
348 UCHAR rsv:1; 341 UCHAR rsv:1;
349 UCHAR ExtendChannelSwitch:1; 342 UCHAR ExtendChannelSwitch:1;
350 UCHAR rsv2:5; 343 UCHAR rsv2:5;
351}EXT_CAP_INFO_ELEMENT, *PEXT_CAP_INFO_ELEMENT; 344} EXT_CAP_INFO_ELEMENT, *PEXT_CAP_INFO_ELEMENT;
352
353 345
354// 802.11n 7.3.2.61 346// 802.11n 7.3.2.61
355typedef struct PACKED _BSS_2040_COEXIST_ELEMENT{ 347typedef struct PACKED _BSS_2040_COEXIST_ELEMENT {
356 UCHAR ElementID; // ID = IE_2040_BSS_COEXIST = 72 348 UCHAR ElementID; // ID = IE_2040_BSS_COEXIST = 72
357 UCHAR Len; 349 UCHAR Len;
358 BSS_2040_COEXIST_IE BssCoexistIe; 350 BSS_2040_COEXIST_IE BssCoexistIe;
359}BSS_2040_COEXIST_ELEMENT, *PBSS_2040_COEXIST_ELEMENT; 351} BSS_2040_COEXIST_ELEMENT, *PBSS_2040_COEXIST_ELEMENT;
360
361 352
362//802.11n 7.3.2.59 353//802.11n 7.3.2.59
363typedef struct PACKED _BSS_2040_INTOLERANT_CH_REPORT{ 354typedef struct PACKED _BSS_2040_INTOLERANT_CH_REPORT {
364 UCHAR ElementID; // ID = IE_2040_BSS_INTOLERANT_REPORT = 73 355 UCHAR ElementID; // ID = IE_2040_BSS_INTOLERANT_REPORT = 73
365 UCHAR Len; 356 UCHAR Len;
366 UCHAR RegulatoryClass; 357 UCHAR RegulatoryClass;
367 UCHAR ChList[0]; 358 UCHAR ChList[0];
368}BSS_2040_INTOLERANT_CH_REPORT, *PBSS_2040_INTOLERANT_CH_REPORT; 359} BSS_2040_INTOLERANT_CH_REPORT, *PBSS_2040_INTOLERANT_CH_REPORT;
369
370 360
371// The structure for channel switch annoucement IE. This is in 802.11n D3.03 361// The structure for channel switch annoucement IE. This is in 802.11n D3.03
372typedef struct PACKED _CHA_SWITCH_ANNOUNCE_IE{ 362typedef struct PACKED _CHA_SWITCH_ANNOUNCE_IE {
373 UCHAR SwitchMode; //channel switch mode 363 UCHAR SwitchMode; //channel switch mode
374 UCHAR NewChannel; // 364 UCHAR NewChannel; //
375 UCHAR SwitchCount; // 365 UCHAR SwitchCount; //
376} CHA_SWITCH_ANNOUNCE_IE, *PCHA_SWITCH_ANNOUNCE_IE; 366} CHA_SWITCH_ANNOUNCE_IE, *PCHA_SWITCH_ANNOUNCE_IE;
377 367
378
379// The structure for channel switch annoucement IE. This is in 802.11n D3.03 368// The structure for channel switch annoucement IE. This is in 802.11n D3.03
380typedef struct PACKED _SEC_CHA_OFFSET_IE{ 369typedef struct PACKED _SEC_CHA_OFFSET_IE {
381 UCHAR SecondaryChannelOffset; // 1: Secondary above, 3: Secondary below, 0: no Secondary 370 UCHAR SecondaryChannelOffset; // 1: Secondary above, 3: Secondary below, 0: no Secondary
382} SEC_CHA_OFFSET_IE, *PSEC_CHA_OFFSET_IE; 371} SEC_CHA_OFFSET_IE, *PSEC_CHA_OFFSET_IE;
383 372
384
385// This structure is extracted from struct RT_HT_CAPABILITY 373// This structure is extracted from struct RT_HT_CAPABILITY
386typedef struct { 374typedef struct {
387 BOOLEAN bHtEnable; // If we should use ht rate. 375 BOOLEAN bHtEnable; // If we should use ht rate.
388 BOOLEAN bPreNHt; // If we should use ht rate. 376 BOOLEAN bPreNHt; // If we should use ht rate.
389 //Substract from HT Capability IE 377 //Substract from HT Capability IE
390 UCHAR MCSSet[16]; 378 UCHAR MCSSet[16];
391} RT_HT_PHY_INFO, *PRT_HT_PHY_INFO; 379} RT_HT_PHY_INFO, *PRT_HT_PHY_INFO;
392 380
393//This structure substracts ralink supports from all 802.11n-related features. 381//This structure substracts ralink supports from all 802.11n-related features.
394//Features not listed here but contained in 802.11n spec are not supported in rt2860. 382//Features not listed here but contained in 802.11n spec are not supported in rt2860.
395typedef struct { 383typedef struct {
396 USHORT ChannelWidth:1; 384 USHORT ChannelWidth:1;
397 USHORT MimoPs:2;//mimo power safe MMPS_ 385 USHORT MimoPs:2; //mimo power safe MMPS_
398 USHORT GF:1; //green field 386 USHORT GF:1; //green field
399 USHORT ShortGIfor20:1; 387 USHORT ShortGIfor20:1;
400 USHORT ShortGIfor40:1; //for40MHz 388 USHORT ShortGIfor40:1; //for40MHz
401 USHORT TxSTBC:1; 389 USHORT TxSTBC:1;
402 USHORT RxSTBC:2; // 2 bits 390 USHORT RxSTBC:2; // 2 bits
403 USHORT AmsduEnable:1; // Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n 391 USHORT AmsduEnable:1; // Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n
404 USHORT AmsduSize:1; // Max receiving A-MSDU size 392 USHORT AmsduSize:1; // Max receiving A-MSDU size
405 USHORT rsv:5; 393 USHORT rsv:5;
406 394
407 //Substract from Addiont HT INFO IE 395 //Substract from Addiont HT INFO IE
408 UCHAR MaxRAmpduFactor:2; 396 UCHAR MaxRAmpduFactor:2;
409 UCHAR MpduDensity:3; 397 UCHAR MpduDensity:3;
410 UCHAR ExtChanOffset:2; // Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n 398 UCHAR ExtChanOffset:2; // Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n
411 UCHAR RecomWidth:1; 399 UCHAR RecomWidth:1;
412 400
413 USHORT OperaionMode:2; 401 USHORT OperaionMode:2;
414 USHORT NonGfPresent:1; 402 USHORT NonGfPresent:1;
415 USHORT rsv3:1; 403 USHORT rsv3:1;
416 USHORT OBSS_NonHTExist:1; 404 USHORT OBSS_NonHTExist:1;
417 USHORT rsv2:11; 405 USHORT rsv2:11;
418 406
419 // New Extension Channel Offset IE 407 // New Extension Channel Offset IE
420 UCHAR NewExtChannelOffset; 408 UCHAR NewExtChannelOffset;
421 // Extension Capability IE = 127 409 // Extension Capability IE = 127
422 UCHAR BSSCoexist2040; 410 UCHAR BSSCoexist2040;
423} RT_HT_CAPABILITY, *PRT_HT_CAPABILITY; 411} RT_HT_CAPABILITY, *PRT_HT_CAPABILITY;
424 412
425// field in Addtional HT Information IE . 413// field in Addtional HT Information IE .
426typedef struct PACKED { 414typedef struct PACKED {
427 UCHAR ExtChanOffset:2; 415 UCHAR ExtChanOffset:2;
428 UCHAR RecomWidth:1; 416 UCHAR RecomWidth:1;
429 UCHAR RifsMode:1; 417 UCHAR RifsMode:1;
430 UCHAR S_PSMPSup:1; //Indicate support for scheduled PSMP 418 UCHAR S_PSMPSup:1; //Indicate support for scheduled PSMP
431 UCHAR SerInterGranu:3; //service interval granularity 419 UCHAR SerInterGranu:3; //service interval granularity
432} ADD_HTINFO, *PADD_HTINFO; 420} ADD_HTINFO, *PADD_HTINFO;
433 421
434typedef struct PACKED{ 422typedef struct PACKED {
435 USHORT OperaionMode:2; 423 USHORT OperaionMode:2;
436 USHORT NonGfPresent:1; 424 USHORT NonGfPresent:1;
437 USHORT rsv:1; 425 USHORT rsv:1;
438 USHORT OBSS_NonHTExist:1; 426 USHORT OBSS_NonHTExist:1;
439 USHORT rsv2:11; 427 USHORT rsv2:11;
440} ADD_HTINFO2, *PADD_HTINFO2; 428} ADD_HTINFO2, *PADD_HTINFO2;
441 429
442
443// TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved. 430// TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved.
444typedef struct PACKED{ 431typedef struct PACKED {
445 USHORT StbcMcs:6; 432 USHORT StbcMcs:6;
446 USHORT DualBeacon:1; 433 USHORT DualBeacon:1;
447 USHORT DualCTSProtect:1; 434 USHORT DualCTSProtect:1;
448 USHORT STBCBeacon:1; 435 USHORT STBCBeacon:1;
449 USHORT LsigTxopProt:1; // L-SIG TXOP protection full support 436 USHORT LsigTxopProt:1; // L-SIG TXOP protection full support
450 USHORT PcoActive:1; 437 USHORT PcoActive:1;
451 USHORT PcoPhase:1; 438 USHORT PcoPhase:1;
452 USHORT rsv:4; 439 USHORT rsv:4;
453} ADD_HTINFO3, *PADD_HTINFO3; 440} ADD_HTINFO3, *PADD_HTINFO3;
454 441
455#define SIZE_ADD_HT_INFO_IE 22 442#define SIZE_ADD_HT_INFO_IE 22
456typedef struct PACKED{ 443typedef struct PACKED {
457 UCHAR ControlChan; 444 UCHAR ControlChan;
458 ADD_HTINFO AddHtInfo; 445 ADD_HTINFO AddHtInfo;
459 ADD_HTINFO2 AddHtInfo2; 446 ADD_HTINFO2 AddHtInfo2;
460 ADD_HTINFO3 AddHtInfo3; 447 ADD_HTINFO3 AddHtInfo3;
461 UCHAR MCSSet[16]; // Basic MCS set 448 UCHAR MCSSet[16]; // Basic MCS set
462} ADD_HT_INFO_IE, *PADD_HT_INFO_IE; 449} ADD_HT_INFO_IE, *PADD_HT_INFO_IE;
463 450
464typedef struct PACKED{ 451typedef struct PACKED {
465 UCHAR NewExtChanOffset; 452 UCHAR NewExtChanOffset;
466} NEW_EXT_CHAN_IE, *PNEW_EXT_CHAN_IE; 453} NEW_EXT_CHAN_IE, *PNEW_EXT_CHAN_IE;
467 454
468typedef struct PACKED _FRAME_802_11 { 455typedef struct PACKED _FRAME_802_11 {
469 HEADER_802_11 Hdr; 456 HEADER_802_11 Hdr;
470 UCHAR Octet[1]; 457 UCHAR Octet[1];
471} FRAME_802_11, *PFRAME_802_11; 458} FRAME_802_11, *PFRAME_802_11;
472 459
473// QoSNull embedding of management action. When HT Control MA field set to 1. 460// QoSNull embedding of management action. When HT Control MA field set to 1.
474typedef struct PACKED _MA_BODY { 461typedef struct PACKED _MA_BODY {
475 UCHAR Category; 462 UCHAR Category;
476 UCHAR Action; 463 UCHAR Action;
477 UCHAR Octet[1]; 464 UCHAR Octet[1];
478} MA_BODY, *PMA_BODY; 465} MA_BODY, *PMA_BODY;
479 466
480typedef struct PACKED _HEADER_802_3 { 467typedef struct PACKED _HEADER_802_3 {
481 UCHAR DAAddr1[MAC_ADDR_LEN]; 468 UCHAR DAAddr1[MAC_ADDR_LEN];
482 UCHAR SAAddr2[MAC_ADDR_LEN]; 469 UCHAR SAAddr2[MAC_ADDR_LEN];
483 UCHAR Octet[2]; 470 UCHAR Octet[2];
484} HEADER_802_3, *PHEADER_802_3; 471} HEADER_802_3, *PHEADER_802_3;
485////Block ACK related format 472////Block ACK related format
486// 2-byte BA Parameter field in DELBA frames to terminate an already set up bA 473// 2-byte BA Parameter field in DELBA frames to terminate an already set up bA
487typedef struct PACKED{ 474typedef struct PACKED {
488 USHORT Rsv:11; // always set to 0 475 USHORT Rsv:11; // always set to 0
489 USHORT Initiator:1; // 1: originator 0:recipient 476 USHORT Initiator:1; // 1: originator 0:recipient
490 USHORT TID:4; // value of TC os TS 477 USHORT TID:4; // value of TC os TS
491} DELBA_PARM, *PDELBA_PARM; 478} DELBA_PARM, *PDELBA_PARM;
492 479
493// 2-byte BA Parameter Set field in ADDBA frames to signal parm for setting up a BA 480// 2-byte BA Parameter Set field in ADDBA frames to signal parm for setting up a BA
494typedef struct PACKED { 481typedef struct PACKED {
495 USHORT AMSDUSupported:1; // 0: not permitted 1: permitted 482 USHORT AMSDUSupported:1; // 0: not permitted 1: permitted
496 USHORT BAPolicy:1; // 1: immediately BA 0:delayed BA 483 USHORT BAPolicy:1; // 1: immediately BA 0:delayed BA
497 USHORT TID:4; // value of TC os TS 484 USHORT TID:4; // value of TC os TS
498 USHORT BufSize:10; // number of buffe of size 2304 octetsr 485 USHORT BufSize:10; // number of buffe of size 2304 octetsr
499} BA_PARM, *PBA_PARM; 486} BA_PARM, *PBA_PARM;
500 487
501// 2-byte BA Starting Seq CONTROL field 488// 2-byte BA Starting Seq CONTROL field
502typedef union PACKED { 489typedef union PACKED {
503 struct PACKED { 490 struct PACKED {
504 USHORT FragNum:4; // always set to 0 491 USHORT FragNum:4; // always set to 0
505 USHORT StartSeq:12; // sequence number of the 1st MSDU for which this BAR is sent 492 USHORT StartSeq:12; // sequence number of the 1st MSDU for which this BAR is sent
506 } field; 493 } field;
507 USHORT word; 494 USHORT word;
508} BASEQ_CONTROL, *PBASEQ_CONTROL; 495} BASEQ_CONTROL, *PBASEQ_CONTROL;
509 496
510//BAControl and BARControl are the same 497//BAControl and BARControl are the same
511// 2-byte BA CONTROL field in BA frame 498// 2-byte BA CONTROL field in BA frame
512typedef struct PACKED { 499typedef struct PACKED {
513 USHORT ACKPolicy:1; // only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK 500 USHORT ACKPolicy:1; // only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK
514 USHORT MTID:1; //EWC V1.24 501 USHORT MTID:1; //EWC V1.24
515 USHORT Compressed:1; 502 USHORT Compressed:1;
516 USHORT Rsv:9; 503 USHORT Rsv:9;
517 USHORT TID:4; 504 USHORT TID:4;
518} BA_CONTROL, *PBA_CONTROL; 505} BA_CONTROL, *PBA_CONTROL;
519 506
520// 2-byte BAR CONTROL field in BAR frame 507// 2-byte BAR CONTROL field in BAR frame
521typedef struct PACKED { 508typedef struct PACKED {
522 USHORT ACKPolicy:1; // 0:normal ack, 1:no ack. 509 USHORT ACKPolicy:1; // 0:normal ack, 1:no ack.
523 USHORT MTID:1; //if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ 510 USHORT MTID:1; //if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ
524 USHORT Compressed:1; 511 USHORT Compressed:1;
525 USHORT Rsv1:9; 512 USHORT Rsv1:9;
526 USHORT TID:4; 513 USHORT TID:4;
527} BAR_CONTROL, *PBAR_CONTROL; 514} BAR_CONTROL, *PBAR_CONTROL;
528 515
529// BARControl in MTBAR frame 516// BARControl in MTBAR frame
530typedef struct PACKED { 517typedef struct PACKED {
531 USHORT ACKPolicy:1; 518 USHORT ACKPolicy:1;
532 USHORT MTID:1; 519 USHORT MTID:1;
533 USHORT Compressed:1; 520 USHORT Compressed:1;
534 USHORT Rsv1:9; 521 USHORT Rsv1:9;
535 USHORT NumTID:4; 522 USHORT NumTID:4;
536} MTBAR_CONTROL, *PMTBAR_CONTROL; 523} MTBAR_CONTROL, *PMTBAR_CONTROL;
537 524
538typedef struct PACKED { 525typedef struct PACKED {
539 USHORT Rsv1:12; 526 USHORT Rsv1:12;
540 USHORT TID:4; 527 USHORT TID:4;
541} PER_TID_INFO, *PPER_TID_INFO; 528} PER_TID_INFO, *PPER_TID_INFO;
542 529
543typedef struct { 530typedef struct {
544 PER_TID_INFO PerTID; 531 PER_TID_INFO PerTID;
545 BASEQ_CONTROL BAStartingSeq; 532 BASEQ_CONTROL BAStartingSeq;
546} EACH_TID, *PEACH_TID; 533} EACH_TID, *PEACH_TID;
547 534
548
549// BAREQ AND MTBAREQ have the same subtype BAR, 802.11n BAR use compressed bitmap. 535// BAREQ AND MTBAREQ have the same subtype BAR, 802.11n BAR use compressed bitmap.
550typedef struct PACKED _FRAME_BA_REQ { 536typedef struct PACKED _FRAME_BA_REQ {
551 FRAME_CONTROL FC; 537 FRAME_CONTROL FC;
552 USHORT Duration; 538 USHORT Duration;
553 UCHAR Addr1[MAC_ADDR_LEN]; 539 UCHAR Addr1[MAC_ADDR_LEN];
554 UCHAR Addr2[MAC_ADDR_LEN]; 540 UCHAR Addr2[MAC_ADDR_LEN];
555 BAR_CONTROL BARControl; 541 BAR_CONTROL BARControl;
556 BASEQ_CONTROL BAStartingSeq; 542 BASEQ_CONTROL BAStartingSeq;
557} FRAME_BA_REQ, *PFRAME_BA_REQ; 543} FRAME_BA_REQ, *PFRAME_BA_REQ;
558 544
559typedef struct PACKED _FRAME_MTBA_REQ { 545typedef struct PACKED _FRAME_MTBA_REQ {
560 FRAME_CONTROL FC; 546 FRAME_CONTROL FC;
561 USHORT Duration; 547 USHORT Duration;
562 UCHAR Addr1[MAC_ADDR_LEN]; 548 UCHAR Addr1[MAC_ADDR_LEN];
563 UCHAR Addr2[MAC_ADDR_LEN]; 549 UCHAR Addr2[MAC_ADDR_LEN];
564 MTBAR_CONTROL MTBARControl; 550 MTBAR_CONTROL MTBARControl;
565 PER_TID_INFO PerTIDInfo; 551 PER_TID_INFO PerTIDInfo;
566 BASEQ_CONTROL BAStartingSeq; 552 BASEQ_CONTROL BAStartingSeq;
567} FRAME_MTBA_REQ, *PFRAME_MTBA_REQ; 553} FRAME_MTBA_REQ, *PFRAME_MTBA_REQ;
568 554
569// Compressed format is mandantory in HT STA 555// Compressed format is mandantory in HT STA
570typedef struct PACKED _FRAME_MTBA { 556typedef struct PACKED _FRAME_MTBA {
571 FRAME_CONTROL FC; 557 FRAME_CONTROL FC;
572 USHORT Duration; 558 USHORT Duration;
573 UCHAR Addr1[MAC_ADDR_LEN]; 559 UCHAR Addr1[MAC_ADDR_LEN];
574 UCHAR Addr2[MAC_ADDR_LEN]; 560 UCHAR Addr2[MAC_ADDR_LEN];
575 BA_CONTROL BAControl; 561 BA_CONTROL BAControl;
576 BASEQ_CONTROL BAStartingSeq; 562 BASEQ_CONTROL BAStartingSeq;
577 UCHAR BitMap[8]; 563 UCHAR BitMap[8];
578} FRAME_MTBA, *PFRAME_MTBA; 564} FRAME_MTBA, *PFRAME_MTBA;
579 565
580typedef struct PACKED _FRAME_PSMP_ACTION { 566typedef struct PACKED _FRAME_PSMP_ACTION {
581 HEADER_802_11 Hdr; 567 HEADER_802_11 Hdr;
582 UCHAR Category; 568 UCHAR Category;
583 UCHAR Action; 569 UCHAR Action;
584 UCHAR Psmp; // 7.3.1.25 570 UCHAR Psmp; // 7.3.1.25
585} FRAME_PSMP_ACTION, *PFRAME_PSMP_ACTION; 571} FRAME_PSMP_ACTION, *PFRAME_PSMP_ACTION;
586 572
587typedef struct PACKED _FRAME_ACTION_HDR { 573typedef struct PACKED _FRAME_ACTION_HDR {
588 HEADER_802_11 Hdr; 574 HEADER_802_11 Hdr;
589 UCHAR Category; 575 UCHAR Category;
590 UCHAR Action; 576 UCHAR Action;
591} FRAME_ACTION_HDR, *PFRAME_ACTION_HDR; 577} FRAME_ACTION_HDR, *PFRAME_ACTION_HDR;
592 578
593//Action Frame 579//Action Frame
594//Action Frame Category:Spectrum, Action:Channel Switch. 7.3.2.20 580//Action Frame Category:Spectrum, Action:Channel Switch. 7.3.2.20
595typedef struct PACKED _CHAN_SWITCH_ANNOUNCE { 581typedef struct PACKED _CHAN_SWITCH_ANNOUNCE {
596 UCHAR ElementID; // ID = IE_CHANNEL_SWITCH_ANNOUNCEMENT = 37 582 UCHAR ElementID; // ID = IE_CHANNEL_SWITCH_ANNOUNCEMENT = 37
597 UCHAR Len; 583 UCHAR Len;
598 CHA_SWITCH_ANNOUNCE_IE CSAnnounceIe; 584 CHA_SWITCH_ANNOUNCE_IE CSAnnounceIe;
599} CHAN_SWITCH_ANNOUNCE, *PCHAN_SWITCH_ANNOUNCE; 585} CHAN_SWITCH_ANNOUNCE, *PCHAN_SWITCH_ANNOUNCE;
600
601 586
602//802.11n : 7.3.2.20a 587//802.11n : 7.3.2.20a
603typedef struct PACKED _SECOND_CHAN_OFFSET { 588typedef struct PACKED _SECOND_CHAN_OFFSET {
604 UCHAR ElementID; // ID = IE_SECONDARY_CH_OFFSET = 62 589 UCHAR ElementID; // ID = IE_SECONDARY_CH_OFFSET = 62
605 UCHAR Len; 590 UCHAR Len;
606 SEC_CHA_OFFSET_IE SecChOffsetIe; 591 SEC_CHA_OFFSET_IE SecChOffsetIe;
607} SECOND_CHAN_OFFSET, *PSECOND_CHAN_OFFSET; 592} SECOND_CHAN_OFFSET, *PSECOND_CHAN_OFFSET;
608
609 593
610typedef struct PACKED _FRAME_SPETRUM_CS { 594typedef struct PACKED _FRAME_SPETRUM_CS {
611 HEADER_802_11 Hdr; 595 HEADER_802_11 Hdr;
612 UCHAR Category; 596 UCHAR Category;
613 UCHAR Action; 597 UCHAR Action;
614 CHAN_SWITCH_ANNOUNCE CSAnnounce; 598 CHAN_SWITCH_ANNOUNCE CSAnnounce;
615 SECOND_CHAN_OFFSET SecondChannel; 599 SECOND_CHAN_OFFSET SecondChannel;
616} FRAME_SPETRUM_CS, *PFRAME_SPETRUM_CS; 600} FRAME_SPETRUM_CS, *PFRAME_SPETRUM_CS;
617
618 601
619typedef struct PACKED _FRAME_ADDBA_REQ { 602typedef struct PACKED _FRAME_ADDBA_REQ {
620 HEADER_802_11 Hdr; 603 HEADER_802_11 Hdr;
621 UCHAR Category; 604 UCHAR Category;
622 UCHAR Action; 605 UCHAR Action;
623 UCHAR Token; // 1 606 UCHAR Token; // 1
624 BA_PARM BaParm; // 2 - 10 607 BA_PARM BaParm; // 2 - 10
625 USHORT TimeOutValue; // 0 - 0 608 USHORT TimeOutValue; // 0 - 0
626 BASEQ_CONTROL BaStartSeq; // 0-0 609 BASEQ_CONTROL BaStartSeq; // 0-0
627} FRAME_ADDBA_REQ, *PFRAME_ADDBA_REQ; 610} FRAME_ADDBA_REQ, *PFRAME_ADDBA_REQ;
628 611
629typedef struct PACKED _FRAME_ADDBA_RSP { 612typedef struct PACKED _FRAME_ADDBA_RSP {
630 HEADER_802_11 Hdr; 613 HEADER_802_11 Hdr;
631 UCHAR Category; 614 UCHAR Category;
632 UCHAR Action; 615 UCHAR Action;
633 UCHAR Token; 616 UCHAR Token;
634 USHORT StatusCode; 617 USHORT StatusCode;
635 BA_PARM BaParm; //0 - 2 618 BA_PARM BaParm; //0 - 2
636 USHORT TimeOutValue; 619 USHORT TimeOutValue;
637} FRAME_ADDBA_RSP, *PFRAME_ADDBA_RSP; 620} FRAME_ADDBA_RSP, *PFRAME_ADDBA_RSP;
638 621
639typedef struct PACKED _FRAME_DELBA_REQ { 622typedef struct PACKED _FRAME_DELBA_REQ {
640 HEADER_802_11 Hdr; 623 HEADER_802_11 Hdr;
641 UCHAR Category; 624 UCHAR Category;
642 UCHAR Action; 625 UCHAR Action;
643 DELBA_PARM DelbaParm; 626 DELBA_PARM DelbaParm;
644 USHORT ReasonCode; 627 USHORT ReasonCode;
645} FRAME_DELBA_REQ, *PFRAME_DELBA_REQ; 628} FRAME_DELBA_REQ, *PFRAME_DELBA_REQ;
646
647 629
648//7.2.1.7 630//7.2.1.7
649typedef struct PACKED _FRAME_BAR { 631typedef struct PACKED _FRAME_BAR {
650 FRAME_CONTROL FC; 632 FRAME_CONTROL FC;
651 USHORT Duration; 633 USHORT Duration;
652 UCHAR Addr1[MAC_ADDR_LEN]; 634 UCHAR Addr1[MAC_ADDR_LEN];
653 UCHAR Addr2[MAC_ADDR_LEN]; 635 UCHAR Addr2[MAC_ADDR_LEN];
654 BAR_CONTROL BarControl; 636 BAR_CONTROL BarControl;
655 BASEQ_CONTROL StartingSeq; 637 BASEQ_CONTROL StartingSeq;
656} FRAME_BAR, *PFRAME_BAR; 638} FRAME_BAR, *PFRAME_BAR;
657 639
658//7.2.1.7 640//7.2.1.7
659typedef struct PACKED _FRAME_BA { 641typedef struct PACKED _FRAME_BA {
660 FRAME_CONTROL FC; 642 FRAME_CONTROL FC;
661 USHORT Duration; 643 USHORT Duration;
662 UCHAR Addr1[MAC_ADDR_LEN]; 644 UCHAR Addr1[MAC_ADDR_LEN];
663 UCHAR Addr2[MAC_ADDR_LEN]; 645 UCHAR Addr2[MAC_ADDR_LEN];
664 BAR_CONTROL BarControl; 646 BAR_CONTROL BarControl;
665 BASEQ_CONTROL StartingSeq; 647 BASEQ_CONTROL StartingSeq;
666 UCHAR bitmask[8]; 648 UCHAR bitmask[8];
667} FRAME_BA, *PFRAME_BA; 649} FRAME_BA, *PFRAME_BA;
668
669 650
670// Radio Measuement Request Frame Format 651// Radio Measuement Request Frame Format
671typedef struct PACKED _FRAME_RM_REQ_ACTION { 652typedef struct PACKED _FRAME_RM_REQ_ACTION {
672 HEADER_802_11 Hdr; 653 HEADER_802_11 Hdr;
673 UCHAR Category; 654 UCHAR Category;
674 UCHAR Action; 655 UCHAR Action;
675 UCHAR Token; 656 UCHAR Token;
676 USHORT Repetition; 657 USHORT Repetition;
677 UCHAR data[0]; 658 UCHAR data[0];
678} FRAME_RM_REQ_ACTION, *PFRAME_RM_REQ_ACTION; 659} FRAME_RM_REQ_ACTION, *PFRAME_RM_REQ_ACTION;
679 660
680typedef struct PACKED { 661typedef struct PACKED {
681 UCHAR ID; 662 UCHAR ID;
682 UCHAR Length; 663 UCHAR Length;
683 UCHAR ChannelSwitchMode; 664 UCHAR ChannelSwitchMode;
684 UCHAR NewRegClass; 665 UCHAR NewRegClass;
685 UCHAR NewChannelNum; 666 UCHAR NewChannelNum;
686 UCHAR ChannelSwitchCount; 667 UCHAR ChannelSwitchCount;
687} HT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE, *PHT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE; 668} HT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE,
688 669 *PHT_EXT_CHANNEL_SWITCH_ANNOUNCEMENT_IE;
689 670
690// 671//
691// _Limit must be the 2**n - 1 672// _Limit must be the 2**n - 1
@@ -701,183 +682,181 @@ typedef struct PACKED {
701// Contention-free parameter (without ID and Length) 682// Contention-free parameter (without ID and Length)
702// 683//
703typedef struct PACKED { 684typedef struct PACKED {
704 BOOLEAN bValid; // 1: variable contains valid value 685 BOOLEAN bValid; // 1: variable contains valid value
705 UCHAR CfpCount; 686 UCHAR CfpCount;
706 UCHAR CfpPeriod; 687 UCHAR CfpPeriod;
707 USHORT CfpMaxDuration; 688 USHORT CfpMaxDuration;
708 USHORT CfpDurRemaining; 689 USHORT CfpDurRemaining;
709} CF_PARM, *PCF_PARM; 690} CF_PARM, *PCF_PARM;
710 691
711typedef struct _CIPHER_SUITE { 692typedef struct _CIPHER_SUITE {
712 NDIS_802_11_ENCRYPTION_STATUS PairCipher; // Unicast cipher 1, this one has more secured cipher suite 693 NDIS_802_11_ENCRYPTION_STATUS PairCipher; // Unicast cipher 1, this one has more secured cipher suite
713 NDIS_802_11_ENCRYPTION_STATUS PairCipherAux; // Unicast cipher 2 if AP announce two unicast cipher suite 694 NDIS_802_11_ENCRYPTION_STATUS PairCipherAux; // Unicast cipher 2 if AP announce two unicast cipher suite
714 NDIS_802_11_ENCRYPTION_STATUS GroupCipher; // Group cipher 695 NDIS_802_11_ENCRYPTION_STATUS GroupCipher; // Group cipher
715 USHORT RsnCapability; // RSN capability from beacon 696 USHORT RsnCapability; // RSN capability from beacon
716 BOOLEAN bMixMode; // Indicate Pair & Group cipher might be different 697 BOOLEAN bMixMode; // Indicate Pair & Group cipher might be different
717} CIPHER_SUITE, *PCIPHER_SUITE; 698} CIPHER_SUITE, *PCIPHER_SUITE;
718 699
719// EDCA configuration from AP's BEACON/ProbeRsp 700// EDCA configuration from AP's BEACON/ProbeRsp
720typedef struct { 701typedef struct {
721 BOOLEAN bValid; // 1: variable contains valid value 702 BOOLEAN bValid; // 1: variable contains valid value
722 BOOLEAN bAdd; // 1: variable contains valid value 703 BOOLEAN bAdd; // 1: variable contains valid value
723 BOOLEAN bQAck; 704 BOOLEAN bQAck;
724 BOOLEAN bQueueRequest; 705 BOOLEAN bQueueRequest;
725 BOOLEAN bTxopRequest; 706 BOOLEAN bTxopRequest;
726 BOOLEAN bAPSDCapable; 707 BOOLEAN bAPSDCapable;
727// BOOLEAN bMoreDataAck; 708// BOOLEAN bMoreDataAck;
728 UCHAR EdcaUpdateCount; 709 UCHAR EdcaUpdateCount;
729 UCHAR Aifsn[4]; // 0:AC_BK, 1:AC_BE, 2:AC_VI, 3:AC_VO 710 UCHAR Aifsn[4]; // 0:AC_BK, 1:AC_BE, 2:AC_VI, 3:AC_VO
730 UCHAR Cwmin[4]; 711 UCHAR Cwmin[4];
731 UCHAR Cwmax[4]; 712 UCHAR Cwmax[4];
732 USHORT Txop[4]; // in unit of 32-us 713 USHORT Txop[4]; // in unit of 32-us
733 BOOLEAN bACM[4]; // 1: Admission Control of AC_BK is mandattory 714 BOOLEAN bACM[4]; // 1: Admission Control of AC_BK is mandattory
734} EDCA_PARM, *PEDCA_PARM; 715} EDCA_PARM, *PEDCA_PARM;
735 716
736// QBSS LOAD information from QAP's BEACON/ProbeRsp 717// QBSS LOAD information from QAP's BEACON/ProbeRsp
737typedef struct { 718typedef struct {
738 BOOLEAN bValid; // 1: variable contains valid value 719 BOOLEAN bValid; // 1: variable contains valid value
739 USHORT StaNum; 720 USHORT StaNum;
740 UCHAR ChannelUtilization; 721 UCHAR ChannelUtilization;
741 USHORT RemainingAdmissionControl; // in unit of 32-us 722 USHORT RemainingAdmissionControl; // in unit of 32-us
742} QBSS_LOAD_PARM, *PQBSS_LOAD_PARM; 723} QBSS_LOAD_PARM, *PQBSS_LOAD_PARM;
743 724
744// QBSS Info field in QSTA's assoc req 725// QBSS Info field in QSTA's assoc req
745typedef struct PACKED { 726typedef struct PACKED {
746 UCHAR UAPSD_AC_VO:1; 727 UCHAR UAPSD_AC_VO:1;
747 UCHAR UAPSD_AC_VI:1; 728 UCHAR UAPSD_AC_VI:1;
748 UCHAR UAPSD_AC_BK:1; 729 UCHAR UAPSD_AC_BK:1;
749 UCHAR UAPSD_AC_BE:1; 730 UCHAR UAPSD_AC_BE:1;
750 UCHAR Rsv1:1; 731 UCHAR Rsv1:1;
751 UCHAR MaxSPLength:2; 732 UCHAR MaxSPLength:2;
752 UCHAR Rsv2:1; 733 UCHAR Rsv2:1;
753} QBSS_STA_INFO_PARM, *PQBSS_STA_INFO_PARM; 734} QBSS_STA_INFO_PARM, *PQBSS_STA_INFO_PARM;
754 735
755// QBSS Info field in QAP's Beacon/ProbeRsp 736// QBSS Info field in QAP's Beacon/ProbeRsp
756typedef struct PACKED { 737typedef struct PACKED {
757 UCHAR ParamSetCount:4; 738 UCHAR ParamSetCount:4;
758 UCHAR Rsv:3; 739 UCHAR Rsv:3;
759 UCHAR UAPSD:1; 740 UCHAR UAPSD:1;
760} QBSS_AP_INFO_PARM, *PQBSS_AP_INFO_PARM; 741} QBSS_AP_INFO_PARM, *PQBSS_AP_INFO_PARM;
761 742
762// QOS Capability reported in QAP's BEACON/ProbeRsp 743// QOS Capability reported in QAP's BEACON/ProbeRsp
763// QOS Capability sent out in QSTA's AssociateReq/ReAssociateReq 744// QOS Capability sent out in QSTA's AssociateReq/ReAssociateReq
764typedef struct { 745typedef struct {
765 BOOLEAN bValid; // 1: variable contains valid value 746 BOOLEAN bValid; // 1: variable contains valid value
766 BOOLEAN bQAck; 747 BOOLEAN bQAck;
767 BOOLEAN bQueueRequest; 748 BOOLEAN bQueueRequest;
768 BOOLEAN bTxopRequest; 749 BOOLEAN bTxopRequest;
769// BOOLEAN bMoreDataAck; 750// BOOLEAN bMoreDataAck;
770 UCHAR EdcaUpdateCount; 751 UCHAR EdcaUpdateCount;
771} QOS_CAPABILITY_PARM, *PQOS_CAPABILITY_PARM; 752} QOS_CAPABILITY_PARM, *PQOS_CAPABILITY_PARM;
772 753
773typedef struct { 754typedef struct {
774 UCHAR IELen; 755 UCHAR IELen;
775 UCHAR IE[MAX_CUSTOM_LEN]; 756 UCHAR IE[MAX_CUSTOM_LEN];
776} WPA_IE_; 757} WPA_IE_;
777 758
778typedef struct { 759typedef struct {
779 UCHAR Bssid[MAC_ADDR_LEN]; 760 UCHAR Bssid[MAC_ADDR_LEN];
780 UCHAR Channel; 761 UCHAR Channel;
781 UCHAR CentralChannel; //Store the wide-band central channel for 40MHz. .used in 40MHz AP. Or this is the same as Channel. 762 UCHAR CentralChannel; //Store the wide-band central channel for 40MHz. .used in 40MHz AP. Or this is the same as Channel.
782 UCHAR BssType; 763 UCHAR BssType;
783 USHORT AtimWin; 764 USHORT AtimWin;
784 USHORT BeaconPeriod; 765 USHORT BeaconPeriod;
785 766
786 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES]; 767 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
787 UCHAR SupRateLen; 768 UCHAR SupRateLen;
788 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES]; 769 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
789 UCHAR ExtRateLen; 770 UCHAR ExtRateLen;
790 HT_CAPABILITY_IE HtCapability; 771 HT_CAPABILITY_IE HtCapability;
791 UCHAR HtCapabilityLen; 772 UCHAR HtCapabilityLen;
792 ADD_HT_INFO_IE AddHtInfo; // AP might use this additional ht info IE 773 ADD_HT_INFO_IE AddHtInfo; // AP might use this additional ht info IE
793 UCHAR AddHtInfoLen; 774 UCHAR AddHtInfoLen;
794 UCHAR NewExtChanOffset; 775 UCHAR NewExtChanOffset;
795 CHAR Rssi; 776 CHAR Rssi;
796 UCHAR Privacy; // Indicate security function ON/OFF. Don't mess up with auth mode. 777 UCHAR Privacy; // Indicate security function ON/OFF. Don't mess up with auth mode.
797 UCHAR Hidden; 778 UCHAR Hidden;
798 779
799 USHORT DtimPeriod; 780 USHORT DtimPeriod;
800 USHORT CapabilityInfo; 781 USHORT CapabilityInfo;
801 782
802 USHORT CfpCount; 783 USHORT CfpCount;
803 USHORT CfpPeriod; 784 USHORT CfpPeriod;
804 USHORT CfpMaxDuration; 785 USHORT CfpMaxDuration;
805 USHORT CfpDurRemaining; 786 USHORT CfpDurRemaining;
806 UCHAR SsidLen; 787 UCHAR SsidLen;
807 CHAR Ssid[MAX_LEN_OF_SSID]; 788 CHAR Ssid[MAX_LEN_OF_SSID];
808 789
809 ULONG LastBeaconRxTime; // OS's timestamp 790 ULONG LastBeaconRxTime; // OS's timestamp
810 791
811 BOOLEAN bSES; 792 BOOLEAN bSES;
812 793
813 // New for WPA2 794 // New for WPA2
814 CIPHER_SUITE WPA; // AP announced WPA cipher suite 795 CIPHER_SUITE WPA; // AP announced WPA cipher suite
815 CIPHER_SUITE WPA2; // AP announced WPA2 cipher suite 796 CIPHER_SUITE WPA2; // AP announced WPA2 cipher suite
816 797
817 // New for microsoft WPA support 798 // New for microsoft WPA support
818 NDIS_802_11_FIXED_IEs FixIEs; 799 NDIS_802_11_FIXED_IEs FixIEs;
819 NDIS_802_11_AUTHENTICATION_MODE AuthModeAux; // Addition mode for WPA2 / WPA capable AP 800 NDIS_802_11_AUTHENTICATION_MODE AuthModeAux; // Addition mode for WPA2 / WPA capable AP
820 NDIS_802_11_AUTHENTICATION_MODE AuthMode; 801 NDIS_802_11_AUTHENTICATION_MODE AuthMode;
821 NDIS_802_11_WEP_STATUS WepStatus; // Unicast Encryption Algorithm extract from VAR_IE 802 NDIS_802_11_WEP_STATUS WepStatus; // Unicast Encryption Algorithm extract from VAR_IE
822 USHORT VarIELen; // Length of next VIE include EID & Length 803 USHORT VarIELen; // Length of next VIE include EID & Length
823 UCHAR VarIEs[MAX_VIE_LEN]; 804 UCHAR VarIEs[MAX_VIE_LEN];
824 805
825 // CCX Ckip information 806 // CCX Ckip information
826 UCHAR CkipFlag; 807 UCHAR CkipFlag;
827 808
828 // CCX 2 TSF 809 // CCX 2 TSF
829 UCHAR PTSF[4]; // Parent TSF 810 UCHAR PTSF[4]; // Parent TSF
830 UCHAR TTSF[8]; // Target TSF 811 UCHAR TTSF[8]; // Target TSF
831 812
832 // 802.11e d9, and WMM 813 // 802.11e d9, and WMM
833 EDCA_PARM EdcaParm; 814 EDCA_PARM EdcaParm;
834 QOS_CAPABILITY_PARM QosCapability; 815 QOS_CAPABILITY_PARM QosCapability;
835 QBSS_LOAD_PARM QbssLoad; 816 QBSS_LOAD_PARM QbssLoad;
836 WPA_IE_ WpaIE; 817 WPA_IE_ WpaIE;
837 WPA_IE_ RsnIE; 818 WPA_IE_ RsnIE;
838} BSS_ENTRY, *PBSS_ENTRY; 819} BSS_ENTRY, *PBSS_ENTRY;
839 820
840typedef struct { 821typedef struct {
841 UCHAR BssNr; 822 UCHAR BssNr;
842 UCHAR BssOverlapNr; 823 UCHAR BssOverlapNr;
843 BSS_ENTRY BssEntry[MAX_LEN_OF_BSS_TABLE]; 824 BSS_ENTRY BssEntry[MAX_LEN_OF_BSS_TABLE];
844} BSS_TABLE, *PBSS_TABLE; 825} BSS_TABLE, *PBSS_TABLE;
845 826
846
847typedef struct _MLME_QUEUE_ELEM { 827typedef struct _MLME_QUEUE_ELEM {
848 ULONG Machine; 828 ULONG Machine;
849 ULONG MsgType; 829 ULONG MsgType;
850 ULONG MsgLen; 830 ULONG MsgLen;
851 UCHAR Msg[MGMT_DMA_BUFFER_SIZE]; 831 UCHAR Msg[MGMT_DMA_BUFFER_SIZE];
852 LARGE_INTEGER TimeStamp; 832 LARGE_INTEGER TimeStamp;
853 UCHAR Rssi0; 833 UCHAR Rssi0;
854 UCHAR Rssi1; 834 UCHAR Rssi1;
855 UCHAR Rssi2; 835 UCHAR Rssi2;
856 UCHAR Signal; 836 UCHAR Signal;
857 UCHAR Channel; 837 UCHAR Channel;
858 UCHAR Wcid; 838 UCHAR Wcid;
859 BOOLEAN Occupied; 839 BOOLEAN Occupied;
860} MLME_QUEUE_ELEM, *PMLME_QUEUE_ELEM; 840} MLME_QUEUE_ELEM, *PMLME_QUEUE_ELEM;
861 841
862typedef struct _MLME_QUEUE { 842typedef struct _MLME_QUEUE {
863 ULONG Num; 843 ULONG Num;
864 ULONG Head; 844 ULONG Head;
865 ULONG Tail; 845 ULONG Tail;
866 NDIS_SPIN_LOCK Lock; 846 NDIS_SPIN_LOCK Lock;
867 MLME_QUEUE_ELEM Entry[MAX_LEN_OF_MLME_QUEUE]; 847 MLME_QUEUE_ELEM Entry[MAX_LEN_OF_MLME_QUEUE];
868} MLME_QUEUE, *PMLME_QUEUE; 848} MLME_QUEUE, *PMLME_QUEUE;
869 849
870typedef VOID (*STATE_MACHINE_FUNC)(VOID *Adaptor, MLME_QUEUE_ELEM *Elem); 850typedef VOID(*STATE_MACHINE_FUNC) (VOID * Adaptor, MLME_QUEUE_ELEM * Elem);
871 851
872typedef struct _STATE_MACHINE { 852typedef struct _STATE_MACHINE {
873 ULONG Base; 853 ULONG Base;
874 ULONG NrState; 854 ULONG NrState;
875 ULONG NrMsg; 855 ULONG NrMsg;
876 ULONG CurrState; 856 ULONG CurrState;
877 STATE_MACHINE_FUNC *TransFunc; 857 STATE_MACHINE_FUNC *TransFunc;
878} STATE_MACHINE, *PSTATE_MACHINE; 858} STATE_MACHINE, *PSTATE_MACHINE;
879 859
880
881// MLME AUX data structure that hold temporarliy settings during a connection attempt. 860// MLME AUX data structure that hold temporarliy settings during a connection attempt.
882// Once this attemp succeeds, all settings will be copy to pAd->StaActive. 861// Once this attemp succeeds, all settings will be copy to pAd->StaActive.
883// A connection attempt (user set OID, roaming, CCX fast roaming,..) consists of 862// A connection attempt (user set OID, roaming, CCX fast roaming,..) consists of
@@ -885,191 +864,189 @@ typedef struct _STATE_MACHINE {
885// separate this under-trial settings away from pAd->StaActive so that once 864// separate this under-trial settings away from pAd->StaActive so that once
886// this new attempt failed, driver can auto-recover back to the active settings. 865// this new attempt failed, driver can auto-recover back to the active settings.
887typedef struct _MLME_AUX { 866typedef struct _MLME_AUX {
888 UCHAR BssType; 867 UCHAR BssType;
889 UCHAR Ssid[MAX_LEN_OF_SSID]; 868 UCHAR Ssid[MAX_LEN_OF_SSID];
890 UCHAR SsidLen; 869 UCHAR SsidLen;
891 UCHAR Bssid[MAC_ADDR_LEN]; 870 UCHAR Bssid[MAC_ADDR_LEN];
892 UCHAR AutoReconnectSsid[MAX_LEN_OF_SSID]; 871 UCHAR AutoReconnectSsid[MAX_LEN_OF_SSID];
893 UCHAR AutoReconnectSsidLen; 872 UCHAR AutoReconnectSsidLen;
894 USHORT Alg; 873 USHORT Alg;
895 UCHAR ScanType; 874 UCHAR ScanType;
896 UCHAR Channel; 875 UCHAR Channel;
897 UCHAR CentralChannel; 876 UCHAR CentralChannel;
898 USHORT Aid; 877 USHORT Aid;
899 USHORT CapabilityInfo; 878 USHORT CapabilityInfo;
900 USHORT BeaconPeriod; 879 USHORT BeaconPeriod;
901 USHORT CfpMaxDuration; 880 USHORT CfpMaxDuration;
902 USHORT CfpPeriod; 881 USHORT CfpPeriod;
903 USHORT AtimWin; 882 USHORT AtimWin;
904 883
905 // Copy supported rate from desired AP's beacon. We are trying to match 884 // Copy supported rate from desired AP's beacon. We are trying to match
906 // AP's supported and extended rate settings. 885 // AP's supported and extended rate settings.
907 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES]; 886 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
908 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES]; 887 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
909 UCHAR SupRateLen; 888 UCHAR SupRateLen;
910 UCHAR ExtRateLen; 889 UCHAR ExtRateLen;
911 HT_CAPABILITY_IE HtCapability; 890 HT_CAPABILITY_IE HtCapability;
912 UCHAR HtCapabilityLen; 891 UCHAR HtCapabilityLen;
913 ADD_HT_INFO_IE AddHtInfo; // AP might use this additional ht info IE 892 ADD_HT_INFO_IE AddHtInfo; // AP might use this additional ht info IE
914 UCHAR NewExtChannelOffset; 893 UCHAR NewExtChannelOffset;
915 //RT_HT_CAPABILITY SupportedHtPhy; 894 //RT_HT_CAPABILITY SupportedHtPhy;
916 895
917 // new for QOS 896 // new for QOS
918 QOS_CAPABILITY_PARM APQosCapability; // QOS capability of the current associated AP 897 QOS_CAPABILITY_PARM APQosCapability; // QOS capability of the current associated AP
919 EDCA_PARM APEdcaParm; // EDCA parameters of the current associated AP 898 EDCA_PARM APEdcaParm; // EDCA parameters of the current associated AP
920 QBSS_LOAD_PARM APQbssLoad; // QBSS load of the current associated AP 899 QBSS_LOAD_PARM APQbssLoad; // QBSS load of the current associated AP
921 900
922 // new to keep Ralink specific feature 901 // new to keep Ralink specific feature
923 ULONG APRalinkIe; 902 ULONG APRalinkIe;
924 903
925 BSS_TABLE SsidBssTab; // AP list for the same SSID 904 BSS_TABLE SsidBssTab; // AP list for the same SSID
926 BSS_TABLE RoamTab; // AP list eligible for roaming 905 BSS_TABLE RoamTab; // AP list eligible for roaming
927 ULONG BssIdx; 906 ULONG BssIdx;
928 ULONG RoamIdx; 907 ULONG RoamIdx;
929 908
930 BOOLEAN CurrReqIsFromNdis; 909 BOOLEAN CurrReqIsFromNdis;
931 910
932 RALINK_TIMER_STRUCT BeaconTimer, ScanTimer; 911 RALINK_TIMER_STRUCT BeaconTimer, ScanTimer;
933 RALINK_TIMER_STRUCT AuthTimer; 912 RALINK_TIMER_STRUCT AuthTimer;
934 RALINK_TIMER_STRUCT AssocTimer, ReassocTimer, DisassocTimer; 913 RALINK_TIMER_STRUCT AssocTimer, ReassocTimer, DisassocTimer;
935} MLME_AUX, *PMLME_AUX; 914} MLME_AUX, *PMLME_AUX;
936 915
937typedef struct _MLME_ADDBA_REQ_STRUCT{ 916typedef struct _MLME_ADDBA_REQ_STRUCT {
938 UCHAR Wcid; // 917 UCHAR Wcid; //
939 UCHAR pAddr[MAC_ADDR_LEN]; 918 UCHAR pAddr[MAC_ADDR_LEN];
940 UCHAR BaBufSize; 919 UCHAR BaBufSize;
941 USHORT TimeOutValue; 920 USHORT TimeOutValue;
942 UCHAR TID; 921 UCHAR TID;
943 UCHAR Token; 922 UCHAR Token;
944 USHORT BaStartSeq; 923 USHORT BaStartSeq;
945} MLME_ADDBA_REQ_STRUCT, *PMLME_ADDBA_REQ_STRUCT; 924} MLME_ADDBA_REQ_STRUCT, *PMLME_ADDBA_REQ_STRUCT;
946 925
947 926typedef struct _MLME_DELBA_REQ_STRUCT {
948typedef struct _MLME_DELBA_REQ_STRUCT{ 927 UCHAR Wcid; //
949 UCHAR Wcid; // 928 UCHAR Addr[MAC_ADDR_LEN];
950 UCHAR Addr[MAC_ADDR_LEN]; 929 UCHAR TID;
951 UCHAR TID; 930 UCHAR Initiator;
952 UCHAR Initiator;
953} MLME_DELBA_REQ_STRUCT, *PMLME_DELBA_REQ_STRUCT; 931} MLME_DELBA_REQ_STRUCT, *PMLME_DELBA_REQ_STRUCT;
954 932
955// assoc struct is equal to reassoc 933// assoc struct is equal to reassoc
956typedef struct _MLME_ASSOC_REQ_STRUCT{ 934typedef struct _MLME_ASSOC_REQ_STRUCT {
957 UCHAR Addr[MAC_ADDR_LEN]; 935 UCHAR Addr[MAC_ADDR_LEN];
958 USHORT CapabilityInfo; 936 USHORT CapabilityInfo;
959 USHORT ListenIntv; 937 USHORT ListenIntv;
960 ULONG Timeout; 938 ULONG Timeout;
961} MLME_ASSOC_REQ_STRUCT, *PMLME_ASSOC_REQ_STRUCT, MLME_REASSOC_REQ_STRUCT, *PMLME_REASSOC_REQ_STRUCT; 939} MLME_ASSOC_REQ_STRUCT, *PMLME_ASSOC_REQ_STRUCT, MLME_REASSOC_REQ_STRUCT,
962 940 *PMLME_REASSOC_REQ_STRUCT;
963typedef struct _MLME_DISASSOC_REQ_STRUCT{ 941
964 UCHAR Addr[MAC_ADDR_LEN]; 942typedef struct _MLME_DISASSOC_REQ_STRUCT {
965 USHORT Reason; 943 UCHAR Addr[MAC_ADDR_LEN];
944 USHORT Reason;
966} MLME_DISASSOC_REQ_STRUCT, *PMLME_DISASSOC_REQ_STRUCT; 945} MLME_DISASSOC_REQ_STRUCT, *PMLME_DISASSOC_REQ_STRUCT;
967 946
968typedef struct _MLME_AUTH_REQ_STRUCT { 947typedef struct _MLME_AUTH_REQ_STRUCT {
969 UCHAR Addr[MAC_ADDR_LEN]; 948 UCHAR Addr[MAC_ADDR_LEN];
970 USHORT Alg; 949 USHORT Alg;
971 ULONG Timeout; 950 ULONG Timeout;
972} MLME_AUTH_REQ_STRUCT, *PMLME_AUTH_REQ_STRUCT; 951} MLME_AUTH_REQ_STRUCT, *PMLME_AUTH_REQ_STRUCT;
973 952
974typedef struct _MLME_DEAUTH_REQ_STRUCT { 953typedef struct _MLME_DEAUTH_REQ_STRUCT {
975 UCHAR Addr[MAC_ADDR_LEN]; 954 UCHAR Addr[MAC_ADDR_LEN];
976 USHORT Reason; 955 USHORT Reason;
977} MLME_DEAUTH_REQ_STRUCT, *PMLME_DEAUTH_REQ_STRUCT; 956} MLME_DEAUTH_REQ_STRUCT, *PMLME_DEAUTH_REQ_STRUCT;
978 957
979typedef struct { 958typedef struct {
980 ULONG BssIdx; 959 ULONG BssIdx;
981} MLME_JOIN_REQ_STRUCT; 960} MLME_JOIN_REQ_STRUCT;
982 961
983typedef struct _MLME_SCAN_REQ_STRUCT { 962typedef struct _MLME_SCAN_REQ_STRUCT {
984 UCHAR Bssid[MAC_ADDR_LEN]; 963 UCHAR Bssid[MAC_ADDR_LEN];
985 UCHAR BssType; 964 UCHAR BssType;
986 UCHAR ScanType; 965 UCHAR ScanType;
987 UCHAR SsidLen; 966 UCHAR SsidLen;
988 CHAR Ssid[MAX_LEN_OF_SSID]; 967 CHAR Ssid[MAX_LEN_OF_SSID];
989} MLME_SCAN_REQ_STRUCT, *PMLME_SCAN_REQ_STRUCT; 968} MLME_SCAN_REQ_STRUCT, *PMLME_SCAN_REQ_STRUCT;
990 969
991typedef struct _MLME_START_REQ_STRUCT { 970typedef struct _MLME_START_REQ_STRUCT {
992 CHAR Ssid[MAX_LEN_OF_SSID]; 971 CHAR Ssid[MAX_LEN_OF_SSID];
993 UCHAR SsidLen; 972 UCHAR SsidLen;
994} MLME_START_REQ_STRUCT, *PMLME_START_REQ_STRUCT; 973} MLME_START_REQ_STRUCT, *PMLME_START_REQ_STRUCT;
995 974
996typedef struct PACKED { 975typedef struct PACKED {
997 UCHAR Eid; 976 UCHAR Eid;
998 UCHAR Len; 977 UCHAR Len;
999 UCHAR Octet[1]; 978 UCHAR Octet[1];
1000} EID_STRUCT,*PEID_STRUCT, BEACON_EID_STRUCT, *PBEACON_EID_STRUCT; 979} EID_STRUCT, *PEID_STRUCT, BEACON_EID_STRUCT, *PBEACON_EID_STRUCT;
1001 980
1002typedef struct PACKED _RTMP_TX_RATE_SWITCH 981typedef struct PACKED _RTMP_TX_RATE_SWITCH {
1003{ 982 UCHAR ItemNo;
1004 UCHAR ItemNo; 983 UCHAR STBC:1;
1005 UCHAR STBC:1; 984 UCHAR ShortGI:1;
1006 UCHAR ShortGI:1; 985 UCHAR BW:1;
1007 UCHAR BW:1; 986 UCHAR Rsv1:1;
1008 UCHAR Rsv1:1; 987 UCHAR Mode:2;
1009 UCHAR Mode:2; 988 UCHAR Rsv2:2;
1010 UCHAR Rsv2:2; 989 UCHAR CurrMCS;
1011 UCHAR CurrMCS; 990 UCHAR TrainUp;
1012 UCHAR TrainUp; 991 UCHAR TrainDown;
1013 UCHAR TrainDown;
1014} RRTMP_TX_RATE_SWITCH, *PRTMP_TX_RATE_SWITCH; 992} RRTMP_TX_RATE_SWITCH, *PRTMP_TX_RATE_SWITCH;
1015 993
1016// ========================== AP mlme.h =============================== 994// ========================== AP mlme.h ===============================
1017#define TBTT_PRELOAD_TIME 384 // usec. LomgPreamble + 24-byte at 1Mbps 995#define TBTT_PRELOAD_TIME 384 // usec. LomgPreamble + 24-byte at 1Mbps
1018#define DEFAULT_DTIM_PERIOD 1 996#define DEFAULT_DTIM_PERIOD 1
1019 997
1020#define MAC_TABLE_AGEOUT_TIME 300 // unit: sec 998#define MAC_TABLE_AGEOUT_TIME 300 // unit: sec
1021#define MAC_TABLE_ASSOC_TIMEOUT 5 // unit: sec 999#define MAC_TABLE_ASSOC_TIMEOUT 5 // unit: sec
1022#define MAC_TABLE_FULL(Tab) ((Tab).size == MAX_LEN_OF_MAC_TABLE) 1000#define MAC_TABLE_FULL(Tab) ((Tab).size == MAX_LEN_OF_MAC_TABLE)
1023 1001
1024// AP shall drop the sta if contine Tx fail count reach it. 1002// AP shall drop the sta if contine Tx fail count reach it.
1025#define MAC_ENTRY_LIFE_CHECK_CNT 20 // packet cnt. 1003#define MAC_ENTRY_LIFE_CHECK_CNT 20 // packet cnt.
1026 1004
1027// Value domain of pMacEntry->Sst 1005// Value domain of pMacEntry->Sst
1028typedef enum _Sst { 1006typedef enum _Sst {
1029 SST_NOT_AUTH, // 0: equivalent to IEEE 802.11/1999 state 1 1007 SST_NOT_AUTH, // 0: equivalent to IEEE 802.11/1999 state 1
1030 SST_AUTH, // 1: equivalent to IEEE 802.11/1999 state 2 1008 SST_AUTH, // 1: equivalent to IEEE 802.11/1999 state 2
1031 SST_ASSOC // 2: equivalent to IEEE 802.11/1999 state 3 1009 SST_ASSOC // 2: equivalent to IEEE 802.11/1999 state 3
1032} SST; 1010} SST;
1033 1011
1034// value domain of pMacEntry->AuthState 1012// value domain of pMacEntry->AuthState
1035typedef enum _AuthState { 1013typedef enum _AuthState {
1036 AS_NOT_AUTH, 1014 AS_NOT_AUTH,
1037 AS_AUTH_OPEN, // STA has been authenticated using OPEN SYSTEM 1015 AS_AUTH_OPEN, // STA has been authenticated using OPEN SYSTEM
1038 AS_AUTH_KEY, // STA has been authenticated using SHARED KEY 1016 AS_AUTH_KEY, // STA has been authenticated using SHARED KEY
1039 AS_AUTHENTICATING // STA is waiting for AUTH seq#3 using SHARED KEY 1017 AS_AUTHENTICATING // STA is waiting for AUTH seq#3 using SHARED KEY
1040} AUTH_STATE; 1018} AUTH_STATE;
1041 1019
1042//for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114 1020//for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114
1043typedef enum _ApWpaState { 1021typedef enum _ApWpaState {
1044 AS_NOTUSE, // 0 1022 AS_NOTUSE, // 0
1045 AS_DISCONNECT, // 1 1023 AS_DISCONNECT, // 1
1046 AS_DISCONNECTED, // 2 1024 AS_DISCONNECTED, // 2
1047 AS_INITIALIZE, // 3 1025 AS_INITIALIZE, // 3
1048 AS_AUTHENTICATION, // 4 1026 AS_AUTHENTICATION, // 4
1049 AS_AUTHENTICATION2, // 5 1027 AS_AUTHENTICATION2, // 5
1050 AS_INITPMK, // 6 1028 AS_INITPMK, // 6
1051 AS_INITPSK, // 7 1029 AS_INITPSK, // 7
1052 AS_PTKSTART, // 8 1030 AS_PTKSTART, // 8
1053 AS_PTKINIT_NEGOTIATING, // 9 1031 AS_PTKINIT_NEGOTIATING, // 9
1054 AS_PTKINITDONE, // 10 1032 AS_PTKINITDONE, // 10
1055 AS_UPDATEKEYS, // 11 1033 AS_UPDATEKEYS, // 11
1056 AS_INTEGRITY_FAILURE, // 12 1034 AS_INTEGRITY_FAILURE, // 12
1057 AS_KEYUPDATE, // 13 1035 AS_KEYUPDATE, // 13
1058} AP_WPA_STATE; 1036} AP_WPA_STATE;
1059 1037
1060// for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114 1038// for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114
1061typedef enum _GTKState { 1039typedef enum _GTKState {
1062 REKEY_NEGOTIATING, 1040 REKEY_NEGOTIATING,
1063 REKEY_ESTABLISHED, 1041 REKEY_ESTABLISHED,
1064 KEYERROR, 1042 KEYERROR,
1065} GTK_STATE; 1043} GTK_STATE;
1066 1044
1067// for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114 1045// for-wpa value domain of pMacEntry->WpaState 802.1i D3 p.114
1068typedef enum _WpaGTKState { 1046typedef enum _WpaGTKState {
1069 SETKEYS, 1047 SETKEYS,
1070 SETKEYS_DONE, 1048 SETKEYS_DONE,
1071} WPA_GTK_STATE; 1049} WPA_GTK_STATE;
1072// ====================== end of AP mlme.h ============================ 1050// ====================== end of AP mlme.h ============================
1073 1051
1074 1052#endif // MLME_H__
1075#endif // MLME_H__
diff --git a/drivers/staging/rt2860/oid.h b/drivers/staging/rt2860/oid.h
index f3fb5ff7406..54fac1c135b 100644
--- a/drivers/staging/rt2860/oid.h
+++ b/drivers/staging/rt2860/oid.h
@@ -48,12 +48,12 @@
48// 48//
49// IEEE 802.11 Structures and definitions 49// IEEE 802.11 Structures and definitions
50// 50//
51#define MAX_TX_POWER_LEVEL 100 /* mW */ 51#define MAX_TX_POWER_LEVEL 100 /* mW */
52#define MAX_RSSI_TRIGGER -10 /* dBm */ 52#define MAX_RSSI_TRIGGER -10 /* dBm */
53#define MIN_RSSI_TRIGGER -200 /* dBm */ 53#define MIN_RSSI_TRIGGER -200 /* dBm */
54#define MAX_FRAG_THRESHOLD 2346 /* byte count */ 54#define MAX_FRAG_THRESHOLD 2346 /* byte count */
55#define MIN_FRAG_THRESHOLD 256 /* byte count */ 55#define MIN_FRAG_THRESHOLD 256 /* byte count */
56#define MAX_RTS_THRESHOLD 2347 /* byte count */ 56#define MAX_RTS_THRESHOLD 2347 /* byte count */
57 57
58// new types for Media Specific Indications 58// new types for Media Specific Indications
59// Extension channel offset 59// Extension channel offset
@@ -78,15 +78,14 @@
78#define NDIS_802_11_LENGTH_RATES 8 78#define NDIS_802_11_LENGTH_RATES 8
79#define NDIS_802_11_LENGTH_RATES_EX 16 79#define NDIS_802_11_LENGTH_RATES_EX 16
80#define MAC_ADDR_LENGTH 6 80#define MAC_ADDR_LENGTH 6
81//#define MAX_NUM_OF_CHS 49 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL terminationc 81//#define MAX_NUM_OF_CHS 49 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL terminationc
82#define MAX_NUM_OF_CHS 54 // 14 channels @2.4G + 12@UNII(lower/middle) + 16@HiperLAN2 + 11@UNII(upper) + 0 @Japan + 1 as NULL termination 82#define MAX_NUM_OF_CHS 54 // 14 channels @2.4G + 12@UNII(lower/middle) + 16@HiperLAN2 + 11@UNII(upper) + 0 @Japan + 1 as NULL termination
83#define MAX_NUMBER_OF_EVENT 10 // entry # in EVENT table 83#define MAX_NUMBER_OF_EVENT 10 // entry # in EVENT table
84#define MAX_NUMBER_OF_MAC 32 // if MAX_MBSSID_NUM is 8, this value can't be larger than 211 84#define MAX_NUMBER_OF_MAC 32 // if MAX_MBSSID_NUM is 8, this value can't be larger than 211
85#define MAX_NUMBER_OF_ACL 64 85#define MAX_NUMBER_OF_ACL 64
86#define MAX_LENGTH_OF_SUPPORT_RATES 12 // 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 86#define MAX_LENGTH_OF_SUPPORT_RATES 12 // 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54
87#define MAX_NUMBER_OF_DLS_ENTRY 4 87#define MAX_NUMBER_OF_DLS_ENTRY 4
88 88
89
90#define RT_QUERY_SIGNAL_CONTEXT 0x0402 89#define RT_QUERY_SIGNAL_CONTEXT 0x0402
91#define RT_SET_IAPP_PID 0x0404 90#define RT_SET_IAPP_PID 0x0404
92#define RT_SET_APD_PID 0x0405 91#define RT_SET_APD_PID 0x0405
@@ -129,19 +128,17 @@
129#define RT_OID_DRIVER_DEVICE_NAME 0x0645 128#define RT_OID_DRIVER_DEVICE_NAME 0x0645
130#define RT_OID_QUERY_MULTIPLE_CARD_SUPPORT 0x0647 129#define RT_OID_QUERY_MULTIPLE_CARD_SUPPORT 0x0647
131 130
132typedef enum _NDIS_802_11_STATUS_TYPE 131typedef enum _NDIS_802_11_STATUS_TYPE {
133{ 132 Ndis802_11StatusType_Authentication,
134 Ndis802_11StatusType_Authentication, 133 Ndis802_11StatusType_MediaStreamMode,
135 Ndis802_11StatusType_MediaStreamMode, 134 Ndis802_11StatusType_PMKID_CandidateList,
136 Ndis802_11StatusType_PMKID_CandidateList, 135 Ndis802_11StatusTypeMax // not a real type, defined as an upper bound
137 Ndis802_11StatusTypeMax // not a real type, defined as an upper bound
138} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; 136} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE;
139 137
140typedef UCHAR NDIS_802_11_MAC_ADDRESS[6]; 138typedef UCHAR NDIS_802_11_MAC_ADDRESS[6];
141 139
142typedef struct _NDIS_802_11_STATUS_INDICATION 140typedef struct _NDIS_802_11_STATUS_INDICATION {
143{ 141 NDIS_802_11_STATUS_TYPE StatusType;
144 NDIS_802_11_STATUS_TYPE StatusType;
145} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; 142} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION;
146 143
147// mask for authentication/integrity fields 144// mask for authentication/integrity fields
@@ -152,313 +149,283 @@ typedef struct _NDIS_802_11_STATUS_INDICATION
152#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 149#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06
153#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E 150#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E
154 151
155typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST 152typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST {
156{ 153 ULONG Length; // Length of structure
157 ULONG Length; // Length of structure 154 NDIS_802_11_MAC_ADDRESS Bssid;
158 NDIS_802_11_MAC_ADDRESS Bssid; 155 ULONG Flags;
159 ULONG Flags;
160} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; 156} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST;
161 157
162//Added new types for PMKID Candidate lists. 158//Added new types for PMKID Candidate lists.
163typedef struct _PMKID_CANDIDATE { 159typedef struct _PMKID_CANDIDATE {
164 NDIS_802_11_MAC_ADDRESS BSSID; 160 NDIS_802_11_MAC_ADDRESS BSSID;
165 ULONG Flags; 161 ULONG Flags;
166} PMKID_CANDIDATE, *PPMKID_CANDIDATE; 162} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
167 163
168typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST 164typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST {
169{ 165 ULONG Version; // Version of the structure
170 ULONG Version; // Version of the structure 166 ULONG NumCandidates; // No. of pmkid candidates
171 ULONG NumCandidates; // No. of pmkid candidates 167 PMKID_CANDIDATE CandidateList[1];
172 PMKID_CANDIDATE CandidateList[1];
173} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST; 168} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST;
174 169
175//Flags for PMKID Candidate list structure 170//Flags for PMKID Candidate list structure
176#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED 0x01 171#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED 0x01
177 172
178// Added new types for OFDM 5G and 2.4G 173// Added new types for OFDM 5G and 2.4G
179typedef enum _NDIS_802_11_NETWORK_TYPE 174typedef enum _NDIS_802_11_NETWORK_TYPE {
180{ 175 Ndis802_11FH,
181 Ndis802_11FH, 176 Ndis802_11DS,
182 Ndis802_11DS, 177 Ndis802_11OFDM5,
183 Ndis802_11OFDM5, 178 Ndis802_11OFDM24,
184 Ndis802_11OFDM24, 179 Ndis802_11Automode,
185 Ndis802_11Automode, 180 Ndis802_11OFDM5_N,
186 Ndis802_11OFDM5_N, 181 Ndis802_11OFDM24_N,
187 Ndis802_11OFDM24_N, 182 Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound
188 Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound
189} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; 183} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE;
190 184
191typedef struct _NDIS_802_11_NETWORK_TYPE_LIST 185typedef struct _NDIS_802_11_NETWORK_TYPE_LIST {
192{ 186 UINT NumberOfItems; // in list below, at least 1
193 UINT NumberOfItems; // in list below, at least 1 187 NDIS_802_11_NETWORK_TYPE NetworkType[1];
194 NDIS_802_11_NETWORK_TYPE NetworkType [1];
195} NDIS_802_11_NETWORK_TYPE_LIST, *PNDIS_802_11_NETWORK_TYPE_LIST; 188} NDIS_802_11_NETWORK_TYPE_LIST, *PNDIS_802_11_NETWORK_TYPE_LIST;
196 189
197typedef enum _NDIS_802_11_POWER_MODE 190typedef enum _NDIS_802_11_POWER_MODE {
198{ 191 Ndis802_11PowerModeCAM,
199 Ndis802_11PowerModeCAM, 192 Ndis802_11PowerModeMAX_PSP,
200 Ndis802_11PowerModeMAX_PSP, 193 Ndis802_11PowerModeFast_PSP,
201 Ndis802_11PowerModeFast_PSP, 194 Ndis802_11PowerModeLegacy_PSP,
202 Ndis802_11PowerModeLegacy_PSP, 195 Ndis802_11PowerModeMax // not a real mode, defined as an upper bound
203 Ndis802_11PowerModeMax // not a real mode, defined as an upper bound
204} NDIS_802_11_POWER_MODE, *PNDIS_802_11_POWER_MODE; 196} NDIS_802_11_POWER_MODE, *PNDIS_802_11_POWER_MODE;
205 197
206typedef ULONG NDIS_802_11_TX_POWER_LEVEL; // in milliwatts 198typedef ULONG NDIS_802_11_TX_POWER_LEVEL; // in milliwatts
207 199
208// 200//
209// Received Signal Strength Indication 201// Received Signal Strength Indication
210// 202//
211typedef LONG NDIS_802_11_RSSI; // in dBm 203typedef LONG NDIS_802_11_RSSI; // in dBm
212 204
213typedef struct _NDIS_802_11_CONFIGURATION_FH 205typedef struct _NDIS_802_11_CONFIGURATION_FH {
214{ 206 ULONG Length; // Length of structure
215 ULONG Length; // Length of structure 207 ULONG HopPattern; // As defined by 802.11, MSB set
216 ULONG HopPattern; // As defined by 802.11, MSB set 208 ULONG HopSet; // to one if non-802.11
217 ULONG HopSet; // to one if non-802.11 209 ULONG DwellTime; // units are Kusec
218 ULONG DwellTime; // units are Kusec
219} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; 210} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH;
220 211
221typedef struct _NDIS_802_11_CONFIGURATION 212typedef struct _NDIS_802_11_CONFIGURATION {
222{ 213 ULONG Length; // Length of structure
223 ULONG Length; // Length of structure 214 ULONG BeaconPeriod; // units are Kusec
224 ULONG BeaconPeriod; // units are Kusec 215 ULONG ATIMWindow; // units are Kusec
225 ULONG ATIMWindow; // units are Kusec 216 ULONG DSConfig; // Frequency, units are kHz
226 ULONG DSConfig; // Frequency, units are kHz 217 NDIS_802_11_CONFIGURATION_FH FHConfig;
227 NDIS_802_11_CONFIGURATION_FH FHConfig;
228} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; 218} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION;
229 219
230typedef struct _NDIS_802_11_STATISTICS 220typedef struct _NDIS_802_11_STATISTICS {
231{ 221 ULONG Length; // Length of structure
232 ULONG Length; // Length of structure 222 LARGE_INTEGER TransmittedFragmentCount;
233 LARGE_INTEGER TransmittedFragmentCount; 223 LARGE_INTEGER MulticastTransmittedFrameCount;
234 LARGE_INTEGER MulticastTransmittedFrameCount; 224 LARGE_INTEGER FailedCount;
235 LARGE_INTEGER FailedCount; 225 LARGE_INTEGER RetryCount;
236 LARGE_INTEGER RetryCount; 226 LARGE_INTEGER MultipleRetryCount;
237 LARGE_INTEGER MultipleRetryCount; 227 LARGE_INTEGER RTSSuccessCount;
238 LARGE_INTEGER RTSSuccessCount; 228 LARGE_INTEGER RTSFailureCount;
239 LARGE_INTEGER RTSFailureCount; 229 LARGE_INTEGER ACKFailureCount;
240 LARGE_INTEGER ACKFailureCount; 230 LARGE_INTEGER FrameDuplicateCount;
241 LARGE_INTEGER FrameDuplicateCount; 231 LARGE_INTEGER ReceivedFragmentCount;
242 LARGE_INTEGER ReceivedFragmentCount; 232 LARGE_INTEGER MulticastReceivedFrameCount;
243 LARGE_INTEGER MulticastReceivedFrameCount; 233 LARGE_INTEGER FCSErrorCount;
244 LARGE_INTEGER FCSErrorCount; 234 LARGE_INTEGER TKIPLocalMICFailures;
245 LARGE_INTEGER TKIPLocalMICFailures; 235 LARGE_INTEGER TKIPRemoteMICErrors;
246 LARGE_INTEGER TKIPRemoteMICErrors; 236 LARGE_INTEGER TKIPICVErrors;
247 LARGE_INTEGER TKIPICVErrors; 237 LARGE_INTEGER TKIPCounterMeasuresInvoked;
248 LARGE_INTEGER TKIPCounterMeasuresInvoked; 238 LARGE_INTEGER TKIPReplays;
249 LARGE_INTEGER TKIPReplays; 239 LARGE_INTEGER CCMPFormatErrors;
250 LARGE_INTEGER CCMPFormatErrors; 240 LARGE_INTEGER CCMPReplays;
251 LARGE_INTEGER CCMPReplays; 241 LARGE_INTEGER CCMPDecryptErrors;
252 LARGE_INTEGER CCMPDecryptErrors; 242 LARGE_INTEGER FourWayHandshakeFailures;
253 LARGE_INTEGER FourWayHandshakeFailures;
254} NDIS_802_11_STATISTICS, *PNDIS_802_11_STATISTICS; 243} NDIS_802_11_STATISTICS, *PNDIS_802_11_STATISTICS;
255 244
256typedef ULONG NDIS_802_11_KEY_INDEX; 245typedef ULONG NDIS_802_11_KEY_INDEX;
257typedef ULONGLONG NDIS_802_11_KEY_RSC; 246typedef ULONGLONG NDIS_802_11_KEY_RSC;
258 247
259#define MAX_RADIUS_SRV_NUM 2 // 802.1x failover number 248#define MAX_RADIUS_SRV_NUM 2 // 802.1x failover number
260 249
261typedef struct PACKED _RADIUS_SRV_INFO { 250typedef struct PACKED _RADIUS_SRV_INFO {
262 UINT32 radius_ip; 251 UINT32 radius_ip;
263 UINT32 radius_port; 252 UINT32 radius_port;
264 UCHAR radius_key[64]; 253 UCHAR radius_key[64];
265 UCHAR radius_key_len; 254 UCHAR radius_key_len;
266} RADIUS_SRV_INFO, *PRADIUS_SRV_INFO; 255} RADIUS_SRV_INFO, *PRADIUS_SRV_INFO;
267 256
268typedef struct PACKED _RADIUS_KEY_INFO 257typedef struct PACKED _RADIUS_KEY_INFO {
269{ 258 UCHAR radius_srv_num;
270 UCHAR radius_srv_num; 259 RADIUS_SRV_INFO radius_srv_info[MAX_RADIUS_SRV_NUM];
271 RADIUS_SRV_INFO radius_srv_info[MAX_RADIUS_SRV_NUM]; 260 UCHAR ieee8021xWEP; // dynamic WEP
272 UCHAR ieee8021xWEP; // dynamic WEP 261 UCHAR key_index;
273 UCHAR key_index; 262 UCHAR key_length; // length of key in bytes
274 UCHAR key_length; // length of key in bytes 263 UCHAR key_material[13];
275 UCHAR key_material[13];
276} RADIUS_KEY_INFO, *PRADIUS_KEY_INFO; 264} RADIUS_KEY_INFO, *PRADIUS_KEY_INFO;
277 265
278// It's used by 802.1x daemon to require relative configuration 266// It's used by 802.1x daemon to require relative configuration
279typedef struct PACKED _RADIUS_CONF 267typedef struct PACKED _RADIUS_CONF {
280{ 268 UINT32 Length; // Length of this structure
281 UINT32 Length; // Length of this structure 269 UCHAR mbss_num; // indicate multiple BSS number
282 UCHAR mbss_num; // indicate multiple BSS number 270 UINT32 own_ip_addr;
283 UINT32 own_ip_addr; 271 UINT32 retry_interval;
284 UINT32 retry_interval; 272 UINT32 session_timeout_interval;
285 UINT32 session_timeout_interval; 273 UCHAR EAPifname[8][IFNAMSIZ];
286 UCHAR EAPifname[8][IFNAMSIZ]; 274 UCHAR EAPifname_len[8];
287 UCHAR EAPifname_len[8]; 275 UCHAR PreAuthifname[8][IFNAMSIZ];
288 UCHAR PreAuthifname[8][IFNAMSIZ]; 276 UCHAR PreAuthifname_len[8];
289 UCHAR PreAuthifname_len[8]; 277 RADIUS_KEY_INFO RadiusInfo[8];
290 RADIUS_KEY_INFO RadiusInfo[8];
291} RADIUS_CONF, *PRADIUS_CONF; 278} RADIUS_CONF, *PRADIUS_CONF;
292 279
293
294
295// Key mapping keys require a BSSID 280// Key mapping keys require a BSSID
296typedef struct _NDIS_802_11_KEY 281typedef struct _NDIS_802_11_KEY {
297{ 282 UINT Length; // Length of this structure
298 UINT Length; // Length of this structure 283 UINT KeyIndex;
299 UINT KeyIndex; 284 UINT KeyLength; // length of key in bytes
300 UINT KeyLength; // length of key in bytes 285 NDIS_802_11_MAC_ADDRESS BSSID;
301 NDIS_802_11_MAC_ADDRESS BSSID; 286 NDIS_802_11_KEY_RSC KeyRSC;
302 NDIS_802_11_KEY_RSC KeyRSC; 287 UCHAR KeyMaterial[1]; // variable length depending on above field
303 UCHAR KeyMaterial[1]; // variable length depending on above field
304} NDIS_802_11_KEY, *PNDIS_802_11_KEY; 288} NDIS_802_11_KEY, *PNDIS_802_11_KEY;
305 289
306typedef struct _NDIS_802_11_PASSPHRASE 290typedef struct _NDIS_802_11_PASSPHRASE {
307{ 291 UINT KeyLength; // length of key in bytes
308 UINT KeyLength; // length of key in bytes 292 NDIS_802_11_MAC_ADDRESS BSSID;
309 NDIS_802_11_MAC_ADDRESS BSSID; 293 UCHAR KeyMaterial[1]; // variable length depending on above field
310 UCHAR KeyMaterial[1]; // variable length depending on above field
311} NDIS_802_11_PASSPHRASE, *PNDIS_802_11_PASSPHRASE; 294} NDIS_802_11_PASSPHRASE, *PNDIS_802_11_PASSPHRASE;
312 295
313typedef struct _NDIS_802_11_REMOVE_KEY 296typedef struct _NDIS_802_11_REMOVE_KEY {
314{ 297 UINT Length; // Length of this structure
315 UINT Length; // Length of this structure 298 UINT KeyIndex;
316 UINT KeyIndex; 299 NDIS_802_11_MAC_ADDRESS BSSID;
317 NDIS_802_11_MAC_ADDRESS BSSID;
318} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; 300} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY;
319 301
320typedef struct _NDIS_802_11_WEP 302typedef struct _NDIS_802_11_WEP {
321{ 303 UINT Length; // Length of this structure
322 UINT Length; // Length of this structure 304 UINT KeyIndex; // 0 is the per-client key, 1-N are the
323 UINT KeyIndex; // 0 is the per-client key, 1-N are the 305 // global keys
324 // global keys 306 UINT KeyLength; // length of key in bytes
325 UINT KeyLength; // length of key in bytes 307 UCHAR KeyMaterial[1]; // variable length depending on above field
326 UCHAR KeyMaterial[1];// variable length depending on above field
327} NDIS_802_11_WEP, *PNDIS_802_11_WEP; 308} NDIS_802_11_WEP, *PNDIS_802_11_WEP;
328 309
329 310typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE {
330typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE 311 Ndis802_11IBSS,
331{ 312 Ndis802_11Infrastructure,
332 Ndis802_11IBSS, 313 Ndis802_11AutoUnknown,
333 Ndis802_11Infrastructure, 314 Ndis802_11Monitor,
334 Ndis802_11AutoUnknown, 315 Ndis802_11InfrastructureMax // Not a real value, defined as upper bound
335 Ndis802_11Monitor,
336 Ndis802_11InfrastructureMax // Not a real value, defined as upper bound
337} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; 316} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
338 317
339// Add new authentication modes 318// Add new authentication modes
340typedef enum _NDIS_802_11_AUTHENTICATION_MODE 319typedef enum _NDIS_802_11_AUTHENTICATION_MODE {
341{ 320 Ndis802_11AuthModeOpen,
342 Ndis802_11AuthModeOpen, 321 Ndis802_11AuthModeShared,
343 Ndis802_11AuthModeShared, 322 Ndis802_11AuthModeAutoSwitch,
344 Ndis802_11AuthModeAutoSwitch, 323 Ndis802_11AuthModeWPA,
345 Ndis802_11AuthModeWPA, 324 Ndis802_11AuthModeWPAPSK,
346 Ndis802_11AuthModeWPAPSK, 325 Ndis802_11AuthModeWPANone,
347 Ndis802_11AuthModeWPANone, 326 Ndis802_11AuthModeWPA2,
348 Ndis802_11AuthModeWPA2, 327 Ndis802_11AuthModeWPA2PSK,
349 Ndis802_11AuthModeWPA2PSK, 328 Ndis802_11AuthModeWPA1WPA2,
350 Ndis802_11AuthModeWPA1WPA2,
351 Ndis802_11AuthModeWPA1PSKWPA2PSK, 329 Ndis802_11AuthModeWPA1PSKWPA2PSK,
352 Ndis802_11AuthModeMax // Not a real mode, defined as upper bound 330 Ndis802_11AuthModeMax // Not a real mode, defined as upper bound
353} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; 331} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE;
354 332
355typedef UCHAR NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates 333typedef UCHAR NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates
356typedef UCHAR NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates 334typedef UCHAR NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates
357 335
358typedef struct PACKED _NDIS_802_11_SSID 336typedef struct PACKED _NDIS_802_11_SSID {
359{ 337 UINT SsidLength; // length of SSID field below, in bytes;
360 UINT SsidLength; // length of SSID field below, in bytes; 338 // this can be zero.
361 // this can be zero. 339 UCHAR Ssid[NDIS_802_11_LENGTH_SSID]; // SSID information field
362 UCHAR Ssid[NDIS_802_11_LENGTH_SSID]; // SSID information field
363} NDIS_802_11_SSID, *PNDIS_802_11_SSID; 340} NDIS_802_11_SSID, *PNDIS_802_11_SSID;
364 341
365 342typedef struct PACKED _NDIS_WLAN_BSSID {
366typedef struct PACKED _NDIS_WLAN_BSSID 343 ULONG Length; // Length of this structure
367{ 344 NDIS_802_11_MAC_ADDRESS MacAddress; // BSSID
368 ULONG Length; // Length of this structure 345 UCHAR Reserved[2];
369 NDIS_802_11_MAC_ADDRESS MacAddress; // BSSID 346 NDIS_802_11_SSID Ssid; // SSID
370 UCHAR Reserved[2]; 347 ULONG Privacy; // WEP encryption requirement
371 NDIS_802_11_SSID Ssid; // SSID 348 NDIS_802_11_RSSI Rssi; // receive signal strength in dBm
372 ULONG Privacy; // WEP encryption requirement 349 NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
373 NDIS_802_11_RSSI Rssi; // receive signal strength in dBm 350 NDIS_802_11_CONFIGURATION Configuration;
374 NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; 351 NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
375 NDIS_802_11_CONFIGURATION Configuration; 352 NDIS_802_11_RATES SupportedRates;
376 NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
377 NDIS_802_11_RATES SupportedRates;
378} NDIS_WLAN_BSSID, *PNDIS_WLAN_BSSID; 353} NDIS_WLAN_BSSID, *PNDIS_WLAN_BSSID;
379 354
380typedef struct PACKED _NDIS_802_11_BSSID_LIST 355typedef struct PACKED _NDIS_802_11_BSSID_LIST {
381{ 356 UINT NumberOfItems; // in list below, at least 1
382 UINT NumberOfItems; // in list below, at least 1 357 NDIS_WLAN_BSSID Bssid[1];
383 NDIS_WLAN_BSSID Bssid[1];
384} NDIS_802_11_BSSID_LIST, *PNDIS_802_11_BSSID_LIST; 358} NDIS_802_11_BSSID_LIST, *PNDIS_802_11_BSSID_LIST;
385 359
386// Added Capabilities, IELength and IEs for each BSSID 360// Added Capabilities, IELength and IEs for each BSSID
387typedef struct PACKED _NDIS_WLAN_BSSID_EX 361typedef struct PACKED _NDIS_WLAN_BSSID_EX {
388{ 362 ULONG Length; // Length of this structure
389 ULONG Length; // Length of this structure 363 NDIS_802_11_MAC_ADDRESS MacAddress; // BSSID
390 NDIS_802_11_MAC_ADDRESS MacAddress; // BSSID 364 UCHAR Reserved[2];
391 UCHAR Reserved[2]; 365 NDIS_802_11_SSID Ssid; // SSID
392 NDIS_802_11_SSID Ssid; // SSID 366 UINT Privacy; // WEP encryption requirement
393 UINT Privacy; // WEP encryption requirement 367 NDIS_802_11_RSSI Rssi; // receive signal
394 NDIS_802_11_RSSI Rssi; // receive signal 368 // strength in dBm
395 // strength in dBm 369 NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
396 NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; 370 NDIS_802_11_CONFIGURATION Configuration;
397 NDIS_802_11_CONFIGURATION Configuration; 371 NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
398 NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; 372 NDIS_802_11_RATES_EX SupportedRates;
399 NDIS_802_11_RATES_EX SupportedRates; 373 ULONG IELength;
400 ULONG IELength; 374 UCHAR IEs[1];
401 UCHAR IEs[1];
402} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; 375} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX;
403 376
404typedef struct PACKED _NDIS_802_11_BSSID_LIST_EX 377typedef struct PACKED _NDIS_802_11_BSSID_LIST_EX {
405{ 378 UINT NumberOfItems; // in list below, at least 1
406 UINT NumberOfItems; // in list below, at least 1 379 NDIS_WLAN_BSSID_EX Bssid[1];
407 NDIS_WLAN_BSSID_EX Bssid[1];
408} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; 380} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX;
409 381
410typedef struct PACKED _NDIS_802_11_FIXED_IEs 382typedef struct PACKED _NDIS_802_11_FIXED_IEs {
411{ 383 UCHAR Timestamp[8];
412 UCHAR Timestamp[8]; 384 USHORT BeaconInterval;
413 USHORT BeaconInterval; 385 USHORT Capabilities;
414 USHORT Capabilities;
415} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; 386} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs;
416 387
417typedef struct _NDIS_802_11_VARIABLE_IEs 388typedef struct _NDIS_802_11_VARIABLE_IEs {
418{ 389 UCHAR ElementID;
419 UCHAR ElementID; 390 UCHAR Length; // Number of bytes in data field
420 UCHAR Length; // Number of bytes in data field 391 UCHAR data[1];
421 UCHAR data[1];
422} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; 392} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs;
423 393
424typedef ULONG NDIS_802_11_FRAGMENTATION_THRESHOLD; 394typedef ULONG NDIS_802_11_FRAGMENTATION_THRESHOLD;
425 395
426typedef ULONG NDIS_802_11_RTS_THRESHOLD; 396typedef ULONG NDIS_802_11_RTS_THRESHOLD;
427 397
428typedef ULONG NDIS_802_11_ANTENNA; 398typedef ULONG NDIS_802_11_ANTENNA;
429 399
430typedef enum _NDIS_802_11_PRIVACY_FILTER 400typedef enum _NDIS_802_11_PRIVACY_FILTER {
431{ 401 Ndis802_11PrivFilterAcceptAll,
432 Ndis802_11PrivFilterAcceptAll, 402 Ndis802_11PrivFilter8021xWEP
433 Ndis802_11PrivFilter8021xWEP
434} NDIS_802_11_PRIVACY_FILTER, *PNDIS_802_11_PRIVACY_FILTER; 403} NDIS_802_11_PRIVACY_FILTER, *PNDIS_802_11_PRIVACY_FILTER;
435 404
436// Added new encryption types 405// Added new encryption types
437// Also aliased typedef to new name 406// Also aliased typedef to new name
438typedef enum _NDIS_802_11_WEP_STATUS 407typedef enum _NDIS_802_11_WEP_STATUS {
439{ 408 Ndis802_11WEPEnabled,
440 Ndis802_11WEPEnabled, 409 Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
441 Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, 410 Ndis802_11WEPDisabled,
442 Ndis802_11WEPDisabled, 411 Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
443 Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, 412 Ndis802_11WEPKeyAbsent,
444 Ndis802_11WEPKeyAbsent, 413 Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
445 Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, 414 Ndis802_11WEPNotSupported,
446 Ndis802_11WEPNotSupported, 415 Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
447 Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, 416 Ndis802_11Encryption2Enabled,
448 Ndis802_11Encryption2Enabled, 417 Ndis802_11Encryption2KeyAbsent,
449 Ndis802_11Encryption2KeyAbsent, 418 Ndis802_11Encryption3Enabled,
450 Ndis802_11Encryption3Enabled, 419 Ndis802_11Encryption3KeyAbsent,
451 Ndis802_11Encryption3KeyAbsent, 420 Ndis802_11Encryption4Enabled, // TKIP or AES mix
452 Ndis802_11Encryption4Enabled, // TKIP or AES mix 421 Ndis802_11Encryption4KeyAbsent,
453 Ndis802_11Encryption4KeyAbsent, 422 Ndis802_11GroupWEP40Enabled,
454 Ndis802_11GroupWEP40Enabled,
455 Ndis802_11GroupWEP104Enabled, 423 Ndis802_11GroupWEP104Enabled,
456} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, 424} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
457 NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; 425 NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
458 426
459typedef enum _NDIS_802_11_RELOAD_DEFAULTS 427typedef enum _NDIS_802_11_RELOAD_DEFAULTS {
460{ 428 Ndis802_11ReloadWEPKeys
461 Ndis802_11ReloadWEPKeys
462} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; 429} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS;
463 430
464#define NDIS_802_11_AI_REQFI_CAPABILITIES 1 431#define NDIS_802_11_AI_REQFI_CAPABILITIES 1
@@ -469,122 +436,110 @@ typedef enum _NDIS_802_11_RELOAD_DEFAULTS
469#define NDIS_802_11_AI_RESFI_STATUSCODE 2 436#define NDIS_802_11_AI_RESFI_STATUSCODE 2
470#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 437#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4
471 438
472typedef struct _NDIS_802_11_AI_REQFI 439typedef struct _NDIS_802_11_AI_REQFI {
473{ 440 USHORT Capabilities;
474 USHORT Capabilities; 441 USHORT ListenInterval;
475 USHORT ListenInterval; 442 NDIS_802_11_MAC_ADDRESS CurrentAPAddress;
476 NDIS_802_11_MAC_ADDRESS CurrentAPAddress;
477} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; 443} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI;
478 444
479typedef struct _NDIS_802_11_AI_RESFI 445typedef struct _NDIS_802_11_AI_RESFI {
480{ 446 USHORT Capabilities;
481 USHORT Capabilities; 447 USHORT StatusCode;
482 USHORT StatusCode; 448 USHORT AssociationId;
483 USHORT AssociationId;
484} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; 449} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI;
485 450
486typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION 451typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION {
487{ 452 ULONG Length;
488 ULONG Length; 453 USHORT AvailableRequestFixedIEs;
489 USHORT AvailableRequestFixedIEs; 454 NDIS_802_11_AI_REQFI RequestFixedIEs;
490 NDIS_802_11_AI_REQFI RequestFixedIEs; 455 ULONG RequestIELength;
491 ULONG RequestIELength; 456 ULONG OffsetRequestIEs;
492 ULONG OffsetRequestIEs; 457 USHORT AvailableResponseFixedIEs;
493 USHORT AvailableResponseFixedIEs; 458 NDIS_802_11_AI_RESFI ResponseFixedIEs;
494 NDIS_802_11_AI_RESFI ResponseFixedIEs; 459 ULONG ResponseIELength;
495 ULONG ResponseIELength; 460 ULONG OffsetResponseIEs;
496 ULONG OffsetResponseIEs;
497} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; 461} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION;
498 462
499typedef struct _NDIS_802_11_AUTHENTICATION_EVENT 463typedef struct _NDIS_802_11_AUTHENTICATION_EVENT {
500{ 464 NDIS_802_11_STATUS_INDICATION Status;
501 NDIS_802_11_STATUS_INDICATION Status; 465 NDIS_802_11_AUTHENTICATION_REQUEST Request[1];
502 NDIS_802_11_AUTHENTICATION_REQUEST Request[1];
503} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; 466} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT;
504 467
505// 802.11 Media stream constraints, associated with OID_802_11_MEDIA_STREAM_MODE 468// 802.11 Media stream constraints, associated with OID_802_11_MEDIA_STREAM_MODE
506typedef enum _NDIS_802_11_MEDIA_STREAM_MODE 469typedef enum _NDIS_802_11_MEDIA_STREAM_MODE {
507{ 470 Ndis802_11MediaStreamOff,
508 Ndis802_11MediaStreamOff, 471 Ndis802_11MediaStreamOn,
509 Ndis802_11MediaStreamOn,
510} NDIS_802_11_MEDIA_STREAM_MODE, *PNDIS_802_11_MEDIA_STREAM_MODE; 472} NDIS_802_11_MEDIA_STREAM_MODE, *PNDIS_802_11_MEDIA_STREAM_MODE;
511 473
512// PMKID Structures 474// PMKID Structures
513typedef UCHAR NDIS_802_11_PMKID_VALUE[16]; 475typedef UCHAR NDIS_802_11_PMKID_VALUE[16];
514 476
515typedef struct _BSSID_INFO 477typedef struct _BSSID_INFO {
516{ 478 NDIS_802_11_MAC_ADDRESS BSSID;
517 NDIS_802_11_MAC_ADDRESS BSSID; 479 NDIS_802_11_PMKID_VALUE PMKID;
518 NDIS_802_11_PMKID_VALUE PMKID;
519} BSSID_INFO, *PBSSID_INFO; 480} BSSID_INFO, *PBSSID_INFO;
520 481
521typedef struct _NDIS_802_11_PMKID 482typedef struct _NDIS_802_11_PMKID {
522{ 483 UINT Length;
523 UINT Length; 484 UINT BSSIDInfoCount;
524 UINT BSSIDInfoCount; 485 BSSID_INFO BSSIDInfo[1];
525 BSSID_INFO BSSIDInfo[1];
526} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID; 486} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID;
527 487
528typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION 488typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION {
529{ 489 NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported;
530 NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported; 490 NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported;
531 NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported; 491} NDIS_802_11_AUTHENTICATION_ENCRYPTION,
532} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION; 492 *PNDIS_802_11_AUTHENTICATION_ENCRYPTION;
533 493
534typedef struct _NDIS_802_11_CAPABILITY 494typedef struct _NDIS_802_11_CAPABILITY {
535{ 495 ULONG Length;
536 ULONG Length; 496 ULONG Version;
537 ULONG Version; 497 ULONG NoOfPMKIDs;
538 ULONG NoOfPMKIDs; 498 ULONG NoOfAuthEncryptPairsSupported;
539 ULONG NoOfAuthEncryptPairsSupported; 499 NDIS_802_11_AUTHENTICATION_ENCRYPTION
540 NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1]; 500 AuthenticationEncryptionSupported[1];
541} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY; 501} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY;
542 502
543#define RT_PRIV_IOCTL (SIOCIWFIRSTPRIV + 0x01) // Sync. with AP for wsc upnp daemon 503#define RT_PRIV_IOCTL (SIOCIWFIRSTPRIV + 0x01) // Sync. with AP for wsc upnp daemon
544#define RTPRIV_IOCTL_SET (SIOCIWFIRSTPRIV + 0x02) 504#define RTPRIV_IOCTL_SET (SIOCIWFIRSTPRIV + 0x02)
545 505
546#define RTPRIV_IOCTL_STATISTICS (SIOCIWFIRSTPRIV + 0x09) 506#define RTPRIV_IOCTL_STATISTICS (SIOCIWFIRSTPRIV + 0x09)
547#define RTPRIV_IOCTL_ADD_PMKID_CACHE (SIOCIWFIRSTPRIV + 0x0A) 507#define RTPRIV_IOCTL_ADD_PMKID_CACHE (SIOCIWFIRSTPRIV + 0x0A)
548#define RTPRIV_IOCTL_RADIUS_DATA (SIOCIWFIRSTPRIV + 0x0C) 508#define RTPRIV_IOCTL_RADIUS_DATA (SIOCIWFIRSTPRIV + 0x0C)
549#define RTPRIV_IOCTL_GSITESURVEY (SIOCIWFIRSTPRIV + 0x0D) 509#define RTPRIV_IOCTL_GSITESURVEY (SIOCIWFIRSTPRIV + 0x0D)
550#define RT_PRIV_IOCTL_EXT (SIOCIWFIRSTPRIV + 0x0E) // Sync. with RT61 (for wpa_supplicant) 510#define RT_PRIV_IOCTL_EXT (SIOCIWFIRSTPRIV + 0x0E) // Sync. with RT61 (for wpa_supplicant)
551#define RTPRIV_IOCTL_GET_MAC_TABLE (SIOCIWFIRSTPRIV + 0x0F) 511#define RTPRIV_IOCTL_GET_MAC_TABLE (SIOCIWFIRSTPRIV + 0x0F)
552 512
553#define RTPRIV_IOCTL_SHOW (SIOCIWFIRSTPRIV + 0x11) 513#define RTPRIV_IOCTL_SHOW (SIOCIWFIRSTPRIV + 0x11)
554enum { 514enum {
555 SHOW_CONN_STATUS = 4, 515 SHOW_CONN_STATUS = 4,
556 SHOW_DRVIER_VERION = 5, 516 SHOW_DRVIER_VERION = 5,
557 SHOW_BA_INFO = 6, 517 SHOW_BA_INFO = 6,
558 SHOW_DESC_INFO = 7, 518 SHOW_DESC_INFO = 7,
559#ifdef RTMP_MAC_USB 519#ifdef RTMP_MAC_USB
560 SHOW_RXBULK_INFO = 8, 520 SHOW_RXBULK_INFO = 8,
561 SHOW_TXBULK_INFO = 9, 521 SHOW_TXBULK_INFO = 9,
562#endif // RTMP_MAC_USB // 522#endif // RTMP_MAC_USB //
563 RAIO_OFF = 10, 523 RAIO_OFF = 10,
564 RAIO_ON = 11, 524 RAIO_ON = 11,
565 SHOW_CFG_VALUE = 20, 525 SHOW_CFG_VALUE = 20,
566 SHOW_ADHOC_ENTRY_INFO = 21, 526 SHOW_ADHOC_ENTRY_INFO = 21,
567}; 527};
568 528
569
570
571
572
573
574#define OID_802_11_BUILD_CHANNEL_EX 0x0714 529#define OID_802_11_BUILD_CHANNEL_EX 0x0714
575#define OID_802_11_GET_CH_LIST 0x0715 530#define OID_802_11_GET_CH_LIST 0x0715
576#define OID_802_11_GET_COUNTRY_CODE 0x0716 531#define OID_802_11_GET_COUNTRY_CODE 0x0716
577#define OID_802_11_GET_CHANNEL_GEOGRAPHY 0x0717 532#define OID_802_11_GET_CHANNEL_GEOGRAPHY 0x0717
578 533
579#define RT_OID_WSC_SET_PASSPHRASE 0x0740 // passphrase for wpa(2)-psk 534#define RT_OID_WSC_SET_PASSPHRASE 0x0740 // passphrase for wpa(2)-psk
580#define RT_OID_WSC_DRIVER_AUTO_CONNECT 0x0741 535#define RT_OID_WSC_DRIVER_AUTO_CONNECT 0x0741
581#define RT_OID_WSC_QUERY_DEFAULT_PROFILE 0x0742 536#define RT_OID_WSC_QUERY_DEFAULT_PROFILE 0x0742
582#define RT_OID_WSC_SET_CONN_BY_PROFILE_INDEX 0x0743 537#define RT_OID_WSC_SET_CONN_BY_PROFILE_INDEX 0x0743
583#define RT_OID_WSC_SET_ACTION 0x0744 538#define RT_OID_WSC_SET_ACTION 0x0744
584#define RT_OID_WSC_SET_SSID 0x0745 539#define RT_OID_WSC_SET_SSID 0x0745
585#define RT_OID_WSC_SET_PIN_CODE 0x0746 540#define RT_OID_WSC_SET_PIN_CODE 0x0746
586#define RT_OID_WSC_SET_MODE 0x0747 // PIN or PBC 541#define RT_OID_WSC_SET_MODE 0x0747 // PIN or PBC
587#define RT_OID_WSC_SET_CONF_MODE 0x0748 // Enrollee or Registrar 542#define RT_OID_WSC_SET_CONF_MODE 0x0748 // Enrollee or Registrar
588#define RT_OID_WSC_SET_PROFILE 0x0749 543#define RT_OID_WSC_SET_PROFILE 0x0749
589#define RT_OID_WSC_CONFIG_STATUS 0x074F 544#define RT_OID_WSC_CONFIG_STATUS 0x074F
590#define RT_OID_802_11_WSC_QUERY_PROFILE 0x0750 545#define RT_OID_802_11_WSC_QUERY_PROFILE 0x0750
@@ -604,24 +559,24 @@ enum {
604#define OID_MH_802_1X_SUPPORTED 0xFFEDC100 559#define OID_MH_802_1X_SUPPORTED 0xFFEDC100
605 560
606// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!! 561// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!!
607typedef union _HTTRANSMIT_SETTING { 562typedef union _HTTRANSMIT_SETTING {
608 struct { 563 struct {
609 USHORT MCS:7; // MCS 564 USHORT MCS:7; // MCS
610 USHORT BW:1; //channel bandwidth 20MHz or 40 MHz 565 USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
611 USHORT ShortGI:1; 566 USHORT ShortGI:1;
612 USHORT STBC:2; //SPACE 567 USHORT STBC:2; //SPACE
613// USHORT rsv:3; 568// USHORT rsv:3;
614 USHORT rsv:2; 569 USHORT rsv:2;
615 USHORT TxBF:1; 570 USHORT TxBF:1;
616 USHORT MODE:2; // Use definition MODE_xxx. 571 USHORT MODE:2; // Use definition MODE_xxx.
617 } field; 572 } field;
618 USHORT word; 573 USHORT word;
619 } HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING; 574} HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING;
620 575
621typedef enum _RT_802_11_PREAMBLE { 576typedef enum _RT_802_11_PREAMBLE {
622 Rt802_11PreambleLong, 577 Rt802_11PreambleLong,
623 Rt802_11PreambleShort, 578 Rt802_11PreambleShort,
624 Rt802_11PreambleAuto 579 Rt802_11PreambleAuto
625} RT_802_11_PREAMBLE, *PRT_802_11_PREAMBLE; 580} RT_802_11_PREAMBLE, *PRT_802_11_PREAMBLE;
626 581
627typedef enum _RT_802_11_PHY_MODE { 582typedef enum _RT_802_11_PHY_MODE {
@@ -631,200 +586,194 @@ typedef enum _RT_802_11_PHY_MODE {
631 PHY_11ABG_MIXED, 586 PHY_11ABG_MIXED,
632 PHY_11G, 587 PHY_11G,
633 PHY_11ABGN_MIXED, // both band 5 588 PHY_11ABGN_MIXED, // both band 5
634 PHY_11N_2_4G, // 11n-only with 2.4G band 6 589 PHY_11N_2_4G, // 11n-only with 2.4G band 6
635 PHY_11GN_MIXED, // 2.4G band 7 590 PHY_11GN_MIXED, // 2.4G band 7
636 PHY_11AN_MIXED, // 5G band 8 591 PHY_11AN_MIXED, // 5G band 8
637 PHY_11BGN_MIXED, // if check 802.11b. 9 592 PHY_11BGN_MIXED, // if check 802.11b. 9
638 PHY_11AGN_MIXED, // if check 802.11b. 10 593 PHY_11AGN_MIXED, // if check 802.11b. 10
639 PHY_11N_5G, // 11n-only with 5G band 11 594 PHY_11N_5G, // 11n-only with 5G band 11
640} RT_802_11_PHY_MODE; 595} RT_802_11_PHY_MODE;
641 596
642// put all proprietery for-query objects here to reduce # of Query_OID 597// put all proprietery for-query objects here to reduce # of Query_OID
643typedef struct _RT_802_11_LINK_STATUS { 598typedef struct _RT_802_11_LINK_STATUS {
644 ULONG CurrTxRate; // in units of 0.5Mbps 599 ULONG CurrTxRate; // in units of 0.5Mbps
645 ULONG ChannelQuality; // 0..100 % 600 ULONG ChannelQuality; // 0..100 %
646 ULONG TxByteCount; // both ok and fail 601 ULONG TxByteCount; // both ok and fail
647 ULONG RxByteCount; // both ok and fail 602 ULONG RxByteCount; // both ok and fail
648 ULONG CentralChannel; // 40MHz central channel number 603 ULONG CentralChannel; // 40MHz central channel number
649} RT_802_11_LINK_STATUS, *PRT_802_11_LINK_STATUS; 604} RT_802_11_LINK_STATUS, *PRT_802_11_LINK_STATUS;
650 605
651typedef struct _RT_802_11_EVENT_LOG { 606typedef struct _RT_802_11_EVENT_LOG {
652 LARGE_INTEGER SystemTime; // timestammp via NdisGetCurrentSystemTime() 607 LARGE_INTEGER SystemTime; // timestammp via NdisGetCurrentSystemTime()
653 UCHAR Addr[MAC_ADDR_LENGTH]; 608 UCHAR Addr[MAC_ADDR_LENGTH];
654 USHORT Event; // EVENT_xxx 609 USHORT Event; // EVENT_xxx
655} RT_802_11_EVENT_LOG, *PRT_802_11_EVENT_LOG; 610} RT_802_11_EVENT_LOG, *PRT_802_11_EVENT_LOG;
656 611
657typedef struct _RT_802_11_EVENT_TABLE { 612typedef struct _RT_802_11_EVENT_TABLE {
658 ULONG Num; 613 ULONG Num;
659 ULONG Rsv; // to align Log[] at LARGE_INEGER boundary 614 ULONG Rsv; // to align Log[] at LARGE_INEGER boundary
660 RT_802_11_EVENT_LOG Log[MAX_NUMBER_OF_EVENT]; 615 RT_802_11_EVENT_LOG Log[MAX_NUMBER_OF_EVENT];
661} RT_802_11_EVENT_TABLE, PRT_802_11_EVENT_TABLE; 616} RT_802_11_EVENT_TABLE, PRT_802_11_EVENT_TABLE;
662 617
663// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!! 618// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!!
664typedef union _MACHTTRANSMIT_SETTING { 619typedef union _MACHTTRANSMIT_SETTING {
665 struct { 620 struct {
666 USHORT MCS:7; // MCS 621 USHORT MCS:7; // MCS
667 USHORT BW:1; //channel bandwidth 20MHz or 40 MHz 622 USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
668 USHORT ShortGI:1; 623 USHORT ShortGI:1;
669 USHORT STBC:2; //SPACE 624 USHORT STBC:2; //SPACE
670 USHORT rsv:3; 625 USHORT rsv:3;
671 USHORT MODE:2; // Use definition MODE_xxx. 626 USHORT MODE:2; // Use definition MODE_xxx.
672 } field; 627 } field;
673 USHORT word; 628 USHORT word;
674 } MACHTTRANSMIT_SETTING, *PMACHTTRANSMIT_SETTING; 629} MACHTTRANSMIT_SETTING, *PMACHTTRANSMIT_SETTING;
675 630
676typedef struct _RT_802_11_MAC_ENTRY { 631typedef struct _RT_802_11_MAC_ENTRY {
677 UCHAR Addr[MAC_ADDR_LENGTH]; 632 UCHAR Addr[MAC_ADDR_LENGTH];
678 UCHAR Aid; 633 UCHAR Aid;
679 UCHAR Psm; // 0:PWR_ACTIVE, 1:PWR_SAVE 634 UCHAR Psm; // 0:PWR_ACTIVE, 1:PWR_SAVE
680 UCHAR MimoPs; // 0:MMPS_STATIC, 1:MMPS_DYNAMIC, 3:MMPS_Enabled 635 UCHAR MimoPs; // 0:MMPS_STATIC, 1:MMPS_DYNAMIC, 3:MMPS_Enabled
681 CHAR AvgRssi0; 636 CHAR AvgRssi0;
682 CHAR AvgRssi1; 637 CHAR AvgRssi1;
683 CHAR AvgRssi2; 638 CHAR AvgRssi2;
684 UINT32 ConnectedTime; 639 UINT32 ConnectedTime;
685 MACHTTRANSMIT_SETTING TxRate; 640 MACHTTRANSMIT_SETTING TxRate;
686} RT_802_11_MAC_ENTRY, *PRT_802_11_MAC_ENTRY; 641} RT_802_11_MAC_ENTRY, *PRT_802_11_MAC_ENTRY;
687 642
688typedef struct _RT_802_11_MAC_TABLE { 643typedef struct _RT_802_11_MAC_TABLE {
689 ULONG Num; 644 ULONG Num;
690 RT_802_11_MAC_ENTRY Entry[MAX_NUMBER_OF_MAC]; 645 RT_802_11_MAC_ENTRY Entry[MAX_NUMBER_OF_MAC];
691} RT_802_11_MAC_TABLE, *PRT_802_11_MAC_TABLE; 646} RT_802_11_MAC_TABLE, *PRT_802_11_MAC_TABLE;
692 647
693// structure for query/set hardware register - MAC, BBP, RF register 648// structure for query/set hardware register - MAC, BBP, RF register
694typedef struct _RT_802_11_HARDWARE_REGISTER { 649typedef struct _RT_802_11_HARDWARE_REGISTER {
695 ULONG HardwareType; // 0:MAC, 1:BBP, 2:RF register, 3:EEPROM 650 ULONG HardwareType; // 0:MAC, 1:BBP, 2:RF register, 3:EEPROM
696 ULONG Offset; // Q/S register offset addr 651 ULONG Offset; // Q/S register offset addr
697 ULONG Data; // R/W data buffer 652 ULONG Data; // R/W data buffer
698} RT_802_11_HARDWARE_REGISTER, *PRT_802_11_HARDWARE_REGISTER; 653} RT_802_11_HARDWARE_REGISTER, *PRT_802_11_HARDWARE_REGISTER;
699 654
700typedef struct _RT_802_11_AP_CONFIG { 655typedef struct _RT_802_11_AP_CONFIG {
701 ULONG EnableTxBurst; // 0-disable, 1-enable 656 ULONG EnableTxBurst; // 0-disable, 1-enable
702 ULONG EnableTurboRate; // 0-disable, 1-enable 72/100mbps turbo rate 657 ULONG EnableTurboRate; // 0-disable, 1-enable 72/100mbps turbo rate
703 ULONG IsolateInterStaTraffic; // 0-disable, 1-enable isolation 658 ULONG IsolateInterStaTraffic; // 0-disable, 1-enable isolation
704 ULONG HideSsid; // 0-disable, 1-enable hiding 659 ULONG HideSsid; // 0-disable, 1-enable hiding
705 ULONG UseBGProtection; // 0-AUTO, 1-always ON, 2-always OFF 660 ULONG UseBGProtection; // 0-AUTO, 1-always ON, 2-always OFF
706 ULONG UseShortSlotTime; // 0-no use, 1-use 9-us short slot time 661 ULONG UseShortSlotTime; // 0-no use, 1-use 9-us short slot time
707 ULONG Rsv1; // must be 0 662 ULONG Rsv1; // must be 0
708 ULONG SystemErrorBitmap; // ignore upon SET, return system error upon QUERY 663 ULONG SystemErrorBitmap; // ignore upon SET, return system error upon QUERY
709} RT_802_11_AP_CONFIG, *PRT_802_11_AP_CONFIG; 664} RT_802_11_AP_CONFIG, *PRT_802_11_AP_CONFIG;
710 665
711// structure to query/set STA_CONFIG 666// structure to query/set STA_CONFIG
712typedef struct _RT_802_11_STA_CONFIG { 667typedef struct _RT_802_11_STA_CONFIG {
713 ULONG EnableTxBurst; // 0-disable, 1-enable 668 ULONG EnableTxBurst; // 0-disable, 1-enable
714 ULONG EnableTurboRate; // 0-disable, 1-enable 72/100mbps turbo rate 669 ULONG EnableTurboRate; // 0-disable, 1-enable 72/100mbps turbo rate
715 ULONG UseBGProtection; // 0-AUTO, 1-always ON, 2-always OFF 670 ULONG UseBGProtection; // 0-AUTO, 1-always ON, 2-always OFF
716 ULONG UseShortSlotTime; // 0-no use, 1-use 9-us short slot time when applicable 671 ULONG UseShortSlotTime; // 0-no use, 1-use 9-us short slot time when applicable
717 ULONG AdhocMode; // 0-11b rates only (WIFI spec), 1 - b/g mixed, 2 - g only 672 ULONG AdhocMode; // 0-11b rates only (WIFI spec), 1 - b/g mixed, 2 - g only
718 ULONG HwRadioStatus; // 0-OFF, 1-ON, default is 1, Read-Only 673 ULONG HwRadioStatus; // 0-OFF, 1-ON, default is 1, Read-Only
719 ULONG Rsv1; // must be 0 674 ULONG Rsv1; // must be 0
720 ULONG SystemErrorBitmap; // ignore upon SET, return system error upon QUERY 675 ULONG SystemErrorBitmap; // ignore upon SET, return system error upon QUERY
721} RT_802_11_STA_CONFIG, *PRT_802_11_STA_CONFIG; 676} RT_802_11_STA_CONFIG, *PRT_802_11_STA_CONFIG;
722 677
723// 678//
724// For OID Query or Set about BA structure 679// For OID Query or Set about BA structure
725// 680//
726typedef struct _OID_BACAP_STRUC { 681typedef struct _OID_BACAP_STRUC {
727 UCHAR RxBAWinLimit; 682 UCHAR RxBAWinLimit;
728 UCHAR TxBAWinLimit; 683 UCHAR TxBAWinLimit;
729 UCHAR Policy; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid 684 UCHAR Policy; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid
730 UCHAR MpduDensity; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid 685 UCHAR MpduDensity; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use. other value invalid
731 UCHAR AmsduEnable; //Enable AMSDU transmisstion 686 UCHAR AmsduEnable; //Enable AMSDU transmisstion
732 UCHAR AmsduSize; // 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935}; 687 UCHAR AmsduSize; // 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935};
733 UCHAR MMPSmode; // MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable 688 UCHAR MMPSmode; // MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable
734 BOOLEAN AutoBA; // Auto BA will automatically 689 BOOLEAN AutoBA; // Auto BA will automatically
735} OID_BACAP_STRUC, *POID_BACAP_STRUC; 690} OID_BACAP_STRUC, *POID_BACAP_STRUC;
736 691
737typedef struct _RT_802_11_ACL_ENTRY { 692typedef struct _RT_802_11_ACL_ENTRY {
738 UCHAR Addr[MAC_ADDR_LENGTH]; 693 UCHAR Addr[MAC_ADDR_LENGTH];
739 USHORT Rsv; 694 USHORT Rsv;
740} RT_802_11_ACL_ENTRY, *PRT_802_11_ACL_ENTRY; 695} RT_802_11_ACL_ENTRY, *PRT_802_11_ACL_ENTRY;
741 696
742typedef struct PACKED _RT_802_11_ACL { 697typedef struct PACKED _RT_802_11_ACL {
743 ULONG Policy; // 0-disable, 1-positive list, 2-negative list 698 ULONG Policy; // 0-disable, 1-positive list, 2-negative list
744 ULONG Num; 699 ULONG Num;
745 RT_802_11_ACL_ENTRY Entry[MAX_NUMBER_OF_ACL]; 700 RT_802_11_ACL_ENTRY Entry[MAX_NUMBER_OF_ACL];
746} RT_802_11_ACL, *PRT_802_11_ACL; 701} RT_802_11_ACL, *PRT_802_11_ACL;
747 702
748typedef struct _RT_802_11_WDS { 703typedef struct _RT_802_11_WDS {
749 ULONG Num; 704 ULONG Num;
750 NDIS_802_11_MAC_ADDRESS Entry[24/*MAX_NUM_OF_WDS_LINK*/]; 705 NDIS_802_11_MAC_ADDRESS Entry[24 /*MAX_NUM_OF_WDS_LINK */ ];
751 ULONG KeyLength; 706 ULONG KeyLength;
752 UCHAR KeyMaterial[32]; 707 UCHAR KeyMaterial[32];
753} RT_802_11_WDS, *PRT_802_11_WDS; 708} RT_802_11_WDS, *PRT_802_11_WDS;
754 709
755typedef struct _RT_802_11_TX_RATES_ { 710typedef struct _RT_802_11_TX_RATES_ {
756 UCHAR SupRateLen; 711 UCHAR SupRateLen;
757 UCHAR SupRate[MAX_LENGTH_OF_SUPPORT_RATES]; 712 UCHAR SupRate[MAX_LENGTH_OF_SUPPORT_RATES];
758 UCHAR ExtRateLen; 713 UCHAR ExtRateLen;
759 UCHAR ExtRate[MAX_LENGTH_OF_SUPPORT_RATES]; 714 UCHAR ExtRate[MAX_LENGTH_OF_SUPPORT_RATES];
760} RT_802_11_TX_RATES, *PRT_802_11_TX_RATES; 715} RT_802_11_TX_RATES, *PRT_802_11_TX_RATES;
761 716
762
763// Definition of extra information code 717// Definition of extra information code
764#define GENERAL_LINK_UP 0x0 // Link is Up 718#define GENERAL_LINK_UP 0x0 // Link is Up
765#define GENERAL_LINK_DOWN 0x1 // Link is Down 719#define GENERAL_LINK_DOWN 0x1 // Link is Down
766#define HW_RADIO_OFF 0x2 // Hardware radio off 720#define HW_RADIO_OFF 0x2 // Hardware radio off
767#define SW_RADIO_OFF 0x3 // Software radio off 721#define SW_RADIO_OFF 0x3 // Software radio off
768#define AUTH_FAIL 0x4 // Open authentication fail 722#define AUTH_FAIL 0x4 // Open authentication fail
769#define AUTH_FAIL_KEYS 0x5 // Shared authentication fail 723#define AUTH_FAIL_KEYS 0x5 // Shared authentication fail
770#define ASSOC_FAIL 0x6 // Association failed 724#define ASSOC_FAIL 0x6 // Association failed
771#define EAP_MIC_FAILURE 0x7 // Deauthencation because MIC failure 725#define EAP_MIC_FAILURE 0x7 // Deauthencation because MIC failure
772#define EAP_4WAY_TIMEOUT 0x8 // Deauthencation on 4-way handshake timeout 726#define EAP_4WAY_TIMEOUT 0x8 // Deauthencation on 4-way handshake timeout
773#define EAP_GROUP_KEY_TIMEOUT 0x9 // Deauthencation on group key handshake timeout 727#define EAP_GROUP_KEY_TIMEOUT 0x9 // Deauthencation on group key handshake timeout
774#define EAP_SUCCESS 0xa // EAP succeed 728#define EAP_SUCCESS 0xa // EAP succeed
775#define DETECT_RADAR_SIGNAL 0xb // Radar signal occur in current channel 729#define DETECT_RADAR_SIGNAL 0xb // Radar signal occur in current channel
776#define EXTRA_INFO_MAX 0xb // Indicate Last OID 730#define EXTRA_INFO_MAX 0xb // Indicate Last OID
777 731
778#define EXTRA_INFO_CLEAR 0xffffffff 732#define EXTRA_INFO_CLEAR 0xffffffff
779 733
780// This is OID setting structure. So only GF or MM as Mode. This is valid when our wirelss mode has 802.11n in use. 734// This is OID setting structure. So only GF or MM as Mode. This is valid when our wirelss mode has 802.11n in use.
781typedef struct { 735typedef struct {
782 RT_802_11_PHY_MODE PhyMode; // 736 RT_802_11_PHY_MODE PhyMode; //
783 UCHAR TransmitNo; 737 UCHAR TransmitNo;
784 UCHAR HtMode; //HTMODE_GF or HTMODE_MM 738 UCHAR HtMode; //HTMODE_GF or HTMODE_MM
785 UCHAR ExtOffset; //extension channel above or below 739 UCHAR ExtOffset; //extension channel above or below
786 UCHAR MCS; 740 UCHAR MCS;
787 UCHAR BW; 741 UCHAR BW;
788 UCHAR STBC; 742 UCHAR STBC;
789 UCHAR SHORTGI; 743 UCHAR SHORTGI;
790 UCHAR rsv; 744 UCHAR rsv;
791} OID_SET_HT_PHYMODE, *POID_SET_HT_PHYMODE; 745} OID_SET_HT_PHYMODE, *POID_SET_HT_PHYMODE;
792 746
793#define MAX_CUSTOM_LEN 128 747#define MAX_CUSTOM_LEN 128
794 748
795typedef enum _RT_802_11_D_CLIENT_MODE 749typedef enum _RT_802_11_D_CLIENT_MODE {
796{ 750 Rt802_11_D_None,
797 Rt802_11_D_None, 751 Rt802_11_D_Flexible,
798 Rt802_11_D_Flexible, 752 Rt802_11_D_Strict,
799 Rt802_11_D_Strict,
800} RT_802_11_D_CLIENT_MODE, *PRT_802_11_D_CLIENT_MODE; 753} RT_802_11_D_CLIENT_MODE, *PRT_802_11_D_CLIENT_MODE;
801 754
802typedef struct _RT_CHANNEL_LIST_INFO 755typedef struct _RT_CHANNEL_LIST_INFO {
803{ 756 UCHAR ChannelList[MAX_NUM_OF_CHS]; // list all supported channels for site survey
804 UCHAR ChannelList[MAX_NUM_OF_CHS]; // list all supported channels for site survey 757 UCHAR ChannelListNum; // number of channel in ChannelList[]
805 UCHAR ChannelListNum; // number of channel in ChannelList[]
806} RT_CHANNEL_LIST_INFO, *PRT_CHANNEL_LIST_INFO; 758} RT_CHANNEL_LIST_INFO, *PRT_CHANNEL_LIST_INFO;
807 759
808// WSC configured credential 760// WSC configured credential
809typedef struct _WSC_CREDENTIAL 761typedef struct _WSC_CREDENTIAL {
810{ 762 NDIS_802_11_SSID SSID; // mandatory
811 NDIS_802_11_SSID SSID; // mandatory 763 USHORT AuthType; // mandatory, 1: open, 2: wpa-psk, 4: shared, 8:wpa, 0x10: wpa2, 0x20: wpa2-psk
812 USHORT AuthType; // mandatory, 1: open, 2: wpa-psk, 4: shared, 8:wpa, 0x10: wpa2, 0x20: wpa2-psk 764 USHORT EncrType; // mandatory, 1: none, 2: wep, 4: tkip, 8: aes
813 USHORT EncrType; // mandatory, 1: none, 2: wep, 4: tkip, 8: aes 765 UCHAR Key[64]; // mandatory, Maximum 64 byte
814 UCHAR Key[64]; // mandatory, Maximum 64 byte 766 USHORT KeyLength;
815 USHORT KeyLength; 767 UCHAR MacAddr[6]; // mandatory, AP MAC address
816 UCHAR MacAddr[6]; // mandatory, AP MAC address 768 UCHAR KeyIndex; // optional, default is 1
817 UCHAR KeyIndex; // optional, default is 1 769 UCHAR Rsvd[3]; // Make alignment
818 UCHAR Rsvd[3]; // Make alignment 770} WSC_CREDENTIAL, *PWSC_CREDENTIAL;
819} WSC_CREDENTIAL, *PWSC_CREDENTIAL;
820 771
821// WSC configured profiles 772// WSC configured profiles
822typedef struct _WSC_PROFILE 773typedef struct _WSC_PROFILE {
823{ 774 UINT ProfileCnt;
824 UINT ProfileCnt; 775 UINT ApplyProfileIdx; // add by johnli, fix WPS test plan 5.1.1
825 UINT ApplyProfileIdx; // add by johnli, fix WPS test plan 5.1.1 776 WSC_CREDENTIAL Profile[8]; // Support up to 8 profiles
826 WSC_CREDENTIAL Profile[8]; // Support up to 8 profiles 777} WSC_PROFILE, *PWSC_PROFILE;
827} WSC_PROFILE, *PWSC_PROFILE;
828 778
829#endif // _OID_H_ 779#endif // _OID_H_
830
diff --git a/drivers/staging/rt2860/rt_config.h b/drivers/staging/rt2860/rt_config.h
index 9e684ae1f4b..8fa3f118c92 100644
--- a/drivers/staging/rt2860/rt_config.h
+++ b/drivers/staging/rt2860/rt_config.h
@@ -68,5 +68,4 @@
68#include "igmp_snoop.h" 68#include "igmp_snoop.h"
69#endif // IGMP_SNOOP_SUPPORT // 69#endif // IGMP_SNOOP_SUPPORT //
70 70
71#endif // __RT_CONFIG_H__ 71#endif // __RT_CONFIG_H__
72
diff --git a/drivers/staging/rt2860/rt_linux.h b/drivers/staging/rt2860/rt_linux.h
index d16bcf3bbd3..478c8d0d6e9 100644
--- a/drivers/staging/rt2860/rt_linux.h
+++ b/drivers/staging/rt2860/rt_linux.h
@@ -79,7 +79,6 @@
79 * Profile related sections 79 * Profile related sections
80 ***********************************************************************************/ 80 ***********************************************************************************/
81 81
82
83#ifdef RTMP_MAC_PCI 82#ifdef RTMP_MAC_PCI
84#define STA_PROFILE_PATH "/etc/Wireless/RT2860STA/RT2860STA.dat" 83#define STA_PROFILE_PATH "/etc/Wireless/RT2860STA/RT2860STA.dat"
85#define STA_DRIVER_VERSION "2.1.0.0" 84#define STA_DRIVER_VERSION "2.1.0.0"
@@ -90,8 +89,7 @@
90// RT3070 version: 2.1.1.0 89// RT3070 version: 2.1.1.0
91#endif // RTMP_MAC_USB // 90#endif // RTMP_MAC_USB //
92 91
93extern const struct iw_handler_def rt28xx_iw_handler_def; 92extern const struct iw_handler_def rt28xx_iw_handler_def;
94
95 93
96/*********************************************************************************** 94/***********************************************************************************
97 * Compiler related definitions 95 * Compiler related definitions
@@ -103,23 +101,23 @@ extern const struct iw_handler_def rt28xx_iw_handler_def;
103#define INOUT 101#define INOUT
104#define NDIS_STATUS INT 102#define NDIS_STATUS INT
105 103
106
107/*********************************************************************************** 104/***********************************************************************************
108 * OS Specific definitions and data structures 105 * OS Specific definitions and data structures
109 ***********************************************************************************/ 106 ***********************************************************************************/
110typedef struct pci_dev * PPCI_DEV; 107typedef struct pci_dev *PPCI_DEV;
111typedef struct net_device * PNET_DEV; 108typedef struct net_device *PNET_DEV;
112typedef void * PNDIS_PACKET; 109typedef void *PNDIS_PACKET;
113typedef char NDIS_PACKET; 110typedef char NDIS_PACKET;
114typedef PNDIS_PACKET * PPNDIS_PACKET; 111typedef PNDIS_PACKET *PPNDIS_PACKET;
115typedef dma_addr_t NDIS_PHYSICAL_ADDRESS; 112typedef dma_addr_t NDIS_PHYSICAL_ADDRESS;
116typedef dma_addr_t * PNDIS_PHYSICAL_ADDRESS; 113typedef dma_addr_t *PNDIS_PHYSICAL_ADDRESS;
117typedef void * NDIS_HANDLE; 114typedef void *NDIS_HANDLE;
118typedef char * PNDIS_BUFFER; 115typedef char *PNDIS_BUFFER;
119typedef struct pid * RTMP_OS_PID; 116typedef struct pid *RTMP_OS_PID;
120typedef struct semaphore RTMP_OS_SEM; 117typedef struct semaphore RTMP_OS_SEM;
121 118
122typedef int (*HARD_START_XMIT_FUNC)(struct sk_buff *skb, struct net_device *net_dev); 119typedef int (*HARD_START_XMIT_FUNC) (struct sk_buff * skb,
120 struct net_device * net_dev);
123 121
124#ifdef RTMP_MAC_PCI 122#ifdef RTMP_MAC_PCI
125#ifndef PCI_DEVICE 123#ifndef PCI_DEVICE
@@ -142,11 +140,8 @@ typedef int (*HARD_START_XMIT_FUNC)(struct sk_buff *skb, struct net_device *net_
142#define RTMP_DEC_REF(_A) 0 140#define RTMP_DEC_REF(_A) 0
143#define RTMP_GET_REF(_A) 0 141#define RTMP_GET_REF(_A) 0
144 142
145
146// This function will be called when query /proc 143// This function will be called when query /proc
147struct iw_statistics *rt28xx_get_wireless_stats( 144struct iw_statistics *rt28xx_get_wireless_stats(IN struct net_device *net_dev);
148 IN struct net_device *net_dev);
149
150 145
151/*********************************************************************************** 146/***********************************************************************************
152 * Network related constant definitions 147 * Network related constant definitions
@@ -178,18 +173,16 @@ struct iw_statistics *rt28xx_get_wireless_stats(
178#define STATS_INC_RX_DROPPED(_pAd, _dev) 173#define STATS_INC_RX_DROPPED(_pAd, _dev)
179#define STATS_INC_TX_DROPPED(_pAd, _dev) 174#define STATS_INC_TX_DROPPED(_pAd, _dev)
180 175
181
182/*********************************************************************************** 176/***********************************************************************************
183 * Ralink Specific network related constant definitions 177 * Ralink Specific network related constant definitions
184 ***********************************************************************************/ 178 ***********************************************************************************/
185#define MIN_NET_DEVICE_FOR_AID 0x00 //0x00~0x3f 179#define MIN_NET_DEVICE_FOR_AID 0x00 //0x00~0x3f
186#define MIN_NET_DEVICE_FOR_MBSSID 0x00 //0x00,0x10,0x20,0x30 180#define MIN_NET_DEVICE_FOR_MBSSID 0x00 //0x00,0x10,0x20,0x30
187#define MIN_NET_DEVICE_FOR_WDS 0x10 //0x40,0x50,0x60,0x70 181#define MIN_NET_DEVICE_FOR_WDS 0x10 //0x40,0x50,0x60,0x70
188#define MIN_NET_DEVICE_FOR_APCLI 0x20 182#define MIN_NET_DEVICE_FOR_APCLI 0x20
189#define MIN_NET_DEVICE_FOR_MESH 0x30 183#define MIN_NET_DEVICE_FOR_MESH 0x30
190#define MIN_NET_DEVICE_FOR_DLS 0x40 184#define MIN_NET_DEVICE_FOR_DLS 0x40
191#define NET_DEVICE_REAL_IDX_MASK 0x0f // for each operation mode, we maximum support 15 entities. 185#define NET_DEVICE_REAL_IDX_MASK 0x0f // for each operation mode, we maximum support 15 entities.
192
193 186
194#define NDIS_PACKET_TYPE_DIRECTED 0 187#define NDIS_PACKET_TYPE_DIRECTED 0
195#define NDIS_PACKET_TYPE_MULTICAST 1 188#define NDIS_PACKET_TYPE_MULTICAST 1
@@ -197,36 +190,32 @@ struct iw_statistics *rt28xx_get_wireless_stats(
197#define NDIS_PACKET_TYPE_ALL_MULTICAST 3 190#define NDIS_PACKET_TYPE_ALL_MULTICAST 3
198#define NDIS_PACKET_TYPE_PROMISCUOUS 4 191#define NDIS_PACKET_TYPE_PROMISCUOUS 4
199 192
200
201/*********************************************************************************** 193/***********************************************************************************
202 * OS signaling related constant definitions 194 * OS signaling related constant definitions
203 ***********************************************************************************/ 195 ***********************************************************************************/
204 196
205
206/*********************************************************************************** 197/***********************************************************************************
207 * OS file operation related data structure definitions 198 * OS file operation related data structure definitions
208 ***********************************************************************************/ 199 ***********************************************************************************/
209typedef struct file* RTMP_OS_FD; 200typedef struct file *RTMP_OS_FD;
210 201
211typedef struct _RTMP_OS_FS_INFO_ 202typedef struct _RTMP_OS_FS_INFO_ {
212{ 203 int fsuid;
213 int fsuid; 204 int fsgid;
214 int fsgid; 205 mm_segment_t fs;
215 mm_segment_t fs; 206} RTMP_OS_FS_INFO;
216}RTMP_OS_FS_INFO;
217 207
218#define IS_FILE_OPEN_ERR(_fd) IS_ERR((_fd)) 208#define IS_FILE_OPEN_ERR(_fd) IS_ERR((_fd))
219 209
220
221/*********************************************************************************** 210/***********************************************************************************
222 * OS semaphore related data structure and definitions 211 * OS semaphore related data structure and definitions
223 ***********************************************************************************/ 212 ***********************************************************************************/
224struct os_lock { 213struct os_lock {
225 spinlock_t lock; 214 spinlock_t lock;
226 unsigned long flags; 215 unsigned long flags;
227}; 216};
228 217
229typedef spinlock_t NDIS_SPIN_LOCK; 218typedef spinlock_t NDIS_SPIN_LOCK;
230 219
231// 220//
232// spin_lock enhanced for Nested spin lock 221// spin_lock enhanced for Nested spin lock
@@ -239,7 +228,6 @@ typedef spinlock_t NDIS_SPIN_LOCK;
239#define NdisFreeSpinLock(lock) \ 228#define NdisFreeSpinLock(lock) \
240 do{}while(0) 229 do{}while(0)
241 230
242
243#define RTMP_SEM_LOCK(__lock) \ 231#define RTMP_SEM_LOCK(__lock) \
244{ \ 232{ \
245 spin_lock_bh((spinlock_t *)(__lock)); \ 233 spin_lock_bh((spinlock_t *)(__lock)); \
@@ -250,7 +238,6 @@ typedef spinlock_t NDIS_SPIN_LOCK;
250 spin_unlock_bh((spinlock_t *)(__lock)); \ 238 spin_unlock_bh((spinlock_t *)(__lock)); \
251} 239}
252 240
253
254// sample, use semaphore lock to replace IRQ lock, 2007/11/15 241// sample, use semaphore lock to replace IRQ lock, 2007/11/15
255#define RTMP_IRQ_LOCK(__lock, __irqflags) \ 242#define RTMP_IRQ_LOCK(__lock, __irqflags) \
256{ \ 243{ \
@@ -343,7 +330,7 @@ do { \
343/*********************************************************************************** 330/***********************************************************************************
344 * OS Memory Access related data structure and definitions 331 * OS Memory Access related data structure and definitions
345 ***********************************************************************************/ 332 ***********************************************************************************/
346#define MEM_ALLOC_FLAG (GFP_ATOMIC) //(GFP_DMA | GFP_ATOMIC) 333#define MEM_ALLOC_FLAG (GFP_ATOMIC) //(GFP_DMA | GFP_ATOMIC)
347 334
348#define NdisMoveMemory(Destination, Source, Length) memmove(Destination, Source, Length) 335#define NdisMoveMemory(Destination, Source, Length) memmove(Destination, Source, Length)
349#define NdisCopyMemory(Destination, Source, Length) memcpy(Destination, Source, Length) 336#define NdisCopyMemory(Destination, Source, Length) memcpy(Destination, Source, Length)
@@ -358,32 +345,29 @@ do { \
358 345
359#define COPY_MAC_ADDR(Addr1, Addr2) memcpy((Addr1), (Addr2), MAC_ADDR_LEN) 346#define COPY_MAC_ADDR(Addr1, Addr2) memcpy((Addr1), (Addr2), MAC_ADDR_LEN)
360 347
361
362/*********************************************************************************** 348/***********************************************************************************
363 * OS task related data structure and definitions 349 * OS task related data structure and definitions
364 ***********************************************************************************/ 350 ***********************************************************************************/
365#define RTMP_OS_MGMT_TASK_FLAGS CLONE_VM 351#define RTMP_OS_MGMT_TASK_FLAGS CLONE_VM
366 352
367typedef struct pid * THREAD_PID; 353typedef struct pid *THREAD_PID;
368#define THREAD_PID_INIT_VALUE NULL 354#define THREAD_PID_INIT_VALUE NULL
369#define GET_PID(_v) find_get_pid((_v)) 355#define GET_PID(_v) find_get_pid((_v))
370#define GET_PID_NUMBER(_v) pid_nr((_v)) 356#define GET_PID_NUMBER(_v) pid_nr((_v))
371#define CHECK_PID_LEGALITY(_pid) if (pid_nr((_pid)) > 0) 357#define CHECK_PID_LEGALITY(_pid) if (pid_nr((_pid)) > 0)
372#define KILL_THREAD_PID(_A, _B, _C) kill_pid((_A), (_B), (_C)) 358#define KILL_THREAD_PID(_A, _B, _C) kill_pid((_A), (_B), (_C))
373 359
374typedef struct tasklet_struct RTMP_NET_TASK_STRUCT; 360typedef struct tasklet_struct RTMP_NET_TASK_STRUCT;
375typedef struct tasklet_struct *PRTMP_NET_TASK_STRUCT; 361typedef struct tasklet_struct *PRTMP_NET_TASK_STRUCT;
376
377 362
378/*********************************************************************************** 363/***********************************************************************************
379 * Timer related definitions and data structures. 364 * Timer related definitions and data structures.
380 **********************************************************************************/ 365 **********************************************************************************/
381#define OS_HZ HZ 366#define OS_HZ HZ
382 367
383typedef struct timer_list NDIS_MINIPORT_TIMER; 368typedef struct timer_list NDIS_MINIPORT_TIMER;
384typedef struct timer_list RTMP_OS_TIMER; 369typedef struct timer_list RTMP_OS_TIMER;
385typedef void (*TIMER_FUNCTION)(unsigned long); 370typedef void (*TIMER_FUNCTION) (unsigned long);
386
387 371
388#define OS_WAIT(_time) \ 372#define OS_WAIT(_time) \
389{ int _i; \ 373{ int _i; \
@@ -406,26 +390,25 @@ typedef void (*TIMER_FUNCTION)(unsigned long);
406 390
407#define ONE_TICK 1 391#define ONE_TICK 1
408 392
409static inline void NdisGetSystemUpTime(ULONG *time) 393static inline void NdisGetSystemUpTime(ULONG * time)
410{ 394{
411 *time = jiffies; 395 *time = jiffies;
412} 396}
413 397
414
415/*********************************************************************************** 398/***********************************************************************************
416 * OS specific cookie data structure binding to RTMP_ADAPTER 399 * OS specific cookie data structure binding to RTMP_ADAPTER
417 ***********************************************************************************/ 400 ***********************************************************************************/
418 401
419struct os_cookie { 402struct os_cookie {
420#ifdef RTMP_MAC_PCI 403#ifdef RTMP_MAC_PCI
421 struct pci_dev *pci_dev; 404 struct pci_dev *pci_dev;
422 struct pci_dev *parent_pci_dev; 405 struct pci_dev *parent_pci_dev;
423 USHORT DeviceID; 406 USHORT DeviceID;
424 dma_addr_t pAd_pa; 407 dma_addr_t pAd_pa;
425#endif // RTMP_MAC_PCI // 408#endif // RTMP_MAC_PCI //
426#ifdef RTMP_MAC_USB 409#ifdef RTMP_MAC_USB
427 struct usb_device *pUsb_Dev; 410 struct usb_device *pUsb_Dev;
428#endif // RTMP_MAC_USB // 411#endif // RTMP_MAC_USB //
429 412
430 RTMP_NET_TASK_STRUCT rx_done_task; 413 RTMP_NET_TASK_STRUCT rx_done_task;
431 RTMP_NET_TASK_STRUCT mgmt_dma_done_task; 414 RTMP_NET_TASK_STRUCT mgmt_dma_done_task;
@@ -436,21 +419,19 @@ struct os_cookie {
436 RTMP_NET_TASK_STRUCT tbtt_task; 419 RTMP_NET_TASK_STRUCT tbtt_task;
437#ifdef RTMP_MAC_PCI 420#ifdef RTMP_MAC_PCI
438 RTMP_NET_TASK_STRUCT fifo_statistic_full_task; 421 RTMP_NET_TASK_STRUCT fifo_statistic_full_task;
439#endif // RTMP_MAC_PCI // 422#endif // RTMP_MAC_PCI //
440#ifdef RTMP_MAC_USB 423#ifdef RTMP_MAC_USB
441 RTMP_NET_TASK_STRUCT null_frame_complete_task; 424 RTMP_NET_TASK_STRUCT null_frame_complete_task;
442 RTMP_NET_TASK_STRUCT rts_frame_complete_task; 425 RTMP_NET_TASK_STRUCT rts_frame_complete_task;
443 RTMP_NET_TASK_STRUCT pspoll_frame_complete_task; 426 RTMP_NET_TASK_STRUCT pspoll_frame_complete_task;
444#endif // RTMP_MAC_USB // 427#endif // RTMP_MAC_USB //
445 428
446 unsigned long apd_pid; //802.1x daemon pid 429 unsigned long apd_pid; //802.1x daemon pid
447 INT ioctl_if_type; 430 INT ioctl_if_type;
448 INT ioctl_if; 431 INT ioctl_if;
449}; 432};
450 433
451typedef struct os_cookie * POS_COOKIE; 434typedef struct os_cookie *POS_COOKIE;
452
453
454 435
455/*********************************************************************************** 436/***********************************************************************************
456 * OS debugging and printing related definitions and data structure 437 * OS debugging and printing related definitions and data structure
@@ -459,7 +440,7 @@ typedef struct os_cookie * POS_COOKIE;
459 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5] 440 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
460 441
461#ifdef DBG 442#ifdef DBG
462extern ULONG RTDebugLevel; 443extern ULONG RTDebugLevel;
463 444
464#define DBGPRINT_RAW(Level, Fmt) \ 445#define DBGPRINT_RAW(Level, Fmt) \
465do{ \ 446do{ \
@@ -471,7 +452,6 @@ do{ \
471 452
472#define DBGPRINT(Level, Fmt) DBGPRINT_RAW(Level, Fmt) 453#define DBGPRINT(Level, Fmt) DBGPRINT_RAW(Level, Fmt)
473 454
474
475#define DBGPRINT_ERR(Fmt) \ 455#define DBGPRINT_ERR(Fmt) \
476{ \ 456{ \
477 printk("ERROR!!! "); \ 457 printk("ERROR!!! "); \
@@ -483,7 +463,6 @@ do{ \
483 printk Fmt; \ 463 printk Fmt; \
484} 464}
485 465
486
487#else 466#else
488#define DBGPRINT(Level, Fmt) 467#define DBGPRINT(Level, Fmt)
489#define DBGPRINT_RAW(Level, Fmt) 468#define DBGPRINT_RAW(Level, Fmt)
@@ -495,18 +474,18 @@ do{ \
495 474
496void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen); 475void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen);
497 476
498
499/********************************************************************************************************* 477/*********************************************************************************************************
500 The following code are not revised, temporary put it here. 478 The following code are not revised, temporary put it here.
501 *********************************************************************************************************/ 479 *********************************************************************************************************/
502 480
503
504/*********************************************************************************** 481/***********************************************************************************
505 * Device DMA Access related definitions and data structures. 482 * Device DMA Access related definitions and data structures.
506 **********************************************************************************/ 483 **********************************************************************************/
507#ifdef RTMP_MAC_PCI 484#ifdef RTMP_MAC_PCI
508dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size, int sd_idx, int direction); 485dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size,
509void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, int direction); 486 int sd_idx, int direction);
487void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
488 int direction);
510 489
511#define PCI_MAP_SINGLE(_handle, _ptr, _size, _sd_idx, _dir) \ 490#define PCI_MAP_SINGLE(_handle, _ptr, _size, _sd_idx, _dir) \
512 linux_pci_map_single(_handle, _ptr, _size, _sd_idx, _dir) 491 linux_pci_map_single(_handle, _ptr, _size, _sd_idx, _dir)
@@ -562,8 +541,6 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, int
562 541
563#define NdisMIndicateStatus(_w, _x, _y, _z) 542#define NdisMIndicateStatus(_w, _x, _y, _z)
564 543
565
566
567/*********************************************************************************** 544/***********************************************************************************
568 * Device Register I/O Access related definitions and data structures. 545 * Device Register I/O Access related definitions and data structures.
569 **********************************************************************************/ 546 **********************************************************************************/
@@ -729,7 +706,6 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, int
729#define GET_OS_PKT_NEXT(_pkt) \ 706#define GET_OS_PKT_NEXT(_pkt) \
730 (RTPKT_TO_OSPKT(_pkt)->next) 707 (RTPKT_TO_OSPKT(_pkt)->next)
731 708
732
733#define OS_PKT_CLONED(_pkt) skb_cloned(RTPKT_TO_OSPKT(_pkt)) 709#define OS_PKT_CLONED(_pkt) skb_cloned(RTPKT_TO_OSPKT(_pkt))
734 710
735#define OS_NTOHS(_Val) \ 711#define OS_NTOHS(_Val) \
@@ -783,9 +759,8 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, int
783#define RTMP_SET_PACKET_MOREDATA(_p, _morebit) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7] = _morebit) 759#define RTMP_SET_PACKET_MOREDATA(_p, _morebit) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7] = _morebit)
784#define RTMP_GET_PACKET_MOREDATA(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7]) 760#define RTMP_GET_PACKET_MOREDATA(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+7])
785 761
786
787// 762//
788// Sepcific Pakcet Type definition 763// Sepcific Pakcet Type definition
789// 764//
790#define RTMP_PACKET_SPECIFIC_CB_OFFSET 11 765#define RTMP_PACKET_SPECIFIC_CB_OFFSET 11
791 766
@@ -863,13 +838,10 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, int
863 838
864#define RTMP_GET_PACKET_IPV4(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_IPV4) 839#define RTMP_GET_PACKET_IPV4(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+11] & RTMP_PACKET_SPECIFIC_IPV4)
865 840
866
867// If this flag is set, it indicates that this EAPoL frame MUST be clear. 841// If this flag is set, it indicates that this EAPoL frame MUST be clear.
868#define RTMP_SET_PACKET_CLEAR_EAP_FRAME(_p, _flg) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12] = _flg) 842#define RTMP_SET_PACKET_CLEAR_EAP_FRAME(_p, _flg) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12] = _flg)
869#define RTMP_GET_PACKET_CLEAR_EAP_FRAME(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12]) 843#define RTMP_GET_PACKET_CLEAR_EAP_FRAME(_p) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+12])
870 844
871
872
873/* use bit3 of cb[CB_OFF+16] */ 845/* use bit3 of cb[CB_OFF+16] */
874 846
875#define RTMP_SET_PACKET_5VT(_p, _flg) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+22] = _flg) 847#define RTMP_SET_PACKET_5VT(_p, _flg) (RTPKT_TO_OSPKT(_p)->cb[CB_OFF+22] = _flg)
@@ -877,12 +849,10 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, int
877 849
878/* Max skb->cb = 48B = [CB_OFF+38] */ 850/* Max skb->cb = 48B = [CB_OFF+38] */
879 851
880
881
882/*********************************************************************************** 852/***********************************************************************************
883 * Other function prototypes definitions 853 * Other function prototypes definitions
884 ***********************************************************************************/ 854 ***********************************************************************************/
885void RTMP_GetCurrentSystemTime(LARGE_INTEGER *time); 855void RTMP_GetCurrentSystemTime(LARGE_INTEGER * time);
886int rt28xx_packet_xmit(struct sk_buff *skb); 856int rt28xx_packet_xmit(struct sk_buff *skb);
887 857
888#ifdef RTMP_MAC_PCI 858#ifdef RTMP_MAC_PCI
@@ -892,13 +862,10 @@ int rt28xx_packet_xmit(struct sk_buff *skb);
892IRQ_HANDLE_TYPE rt2860_interrupt(int irq, void *dev_instance); 862IRQ_HANDLE_TYPE rt2860_interrupt(int irq, void *dev_instance);
893#endif // RTMP_MAC_PCI // 863#endif // RTMP_MAC_PCI //
894 864
895INT rt28xx_sta_ioctl( 865INT rt28xx_sta_ioctl(IN PNET_DEV net_dev, IN OUT struct ifreq *rq, IN INT cmd);
896 IN PNET_DEV net_dev,
897 IN OUT struct ifreq *rq,
898 IN INT cmd);
899 866
900extern int ra_mtd_write(int num, loff_t to, size_t len, const u_char *buf); 867extern int ra_mtd_write(int num, loff_t to, size_t len, const u_char * buf);
901extern int ra_mtd_read(int num, loff_t from, size_t len, u_char *buf); 868extern int ra_mtd_read(int num, loff_t from, size_t len, u_char * buf);
902 869
903#define GET_PAD_FROM_NET_DEV(_pAd, _net_dev) (_pAd) = (PRTMP_ADAPTER)(_net_dev)->ml_priv; 870#define GET_PAD_FROM_NET_DEV(_pAd, _net_dev) (_pAd) = (PRTMP_ADAPTER)(_net_dev)->ml_priv;
904 871
diff --git a/drivers/staging/rt2860/rtmp.h b/drivers/staging/rt2860/rtmp.h
index 2ca1ca68b81..f6b8f622af2 100644
--- a/drivers/staging/rt2860/rtmp.h
+++ b/drivers/staging/rt2860/rtmp.h
@@ -44,17 +44,14 @@
44#include "rtmp_dot11.h" 44#include "rtmp_dot11.h"
45#include "rtmp_chip.h" 45#include "rtmp_chip.h"
46 46
47 47typedef struct _RTMP_ADAPTER RTMP_ADAPTER;
48typedef struct _RTMP_ADAPTER RTMP_ADAPTER; 48typedef struct _RTMP_ADAPTER *PRTMP_ADAPTER;
49typedef struct _RTMP_ADAPTER *PRTMP_ADAPTER;
50 49
51typedef struct _RTMP_CHIP_OP_ RTMP_CHIP_OP; 50typedef struct _RTMP_CHIP_OP_ RTMP_CHIP_OP;
52 51
52//#define DBG 1
53 53
54//#define DBG 1 54//#define DBG_DIAGNOSE 1
55
56//#define DBG_DIAGNOSE 1
57
58 55
59//+++Add by shiang for merge MiniportMMRequest() and MiniportDataMMRequest() into one function 56//+++Add by shiang for merge MiniportMMRequest() and MiniportDataMMRequest() into one function
60#define MAX_DATAMM_RETRY 3 57#define MAX_DATAMM_RETRY 3
@@ -63,17 +60,17 @@ typedef struct _RTMP_CHIP_OP_ RTMP_CHIP_OP;
63 60
64#define MAXSEQ (0xFFF) 61#define MAXSEQ (0xFFF)
65 62
66extern unsigned char SNAP_AIRONET[]; 63extern unsigned char SNAP_AIRONET[];
67extern unsigned char CISCO_OUI[]; 64extern unsigned char CISCO_OUI[];
68extern UCHAR BaSizeArray[4]; 65extern UCHAR BaSizeArray[4];
69 66
70extern UCHAR BROADCAST_ADDR[MAC_ADDR_LEN]; 67extern UCHAR BROADCAST_ADDR[MAC_ADDR_LEN];
71extern UCHAR ZERO_MAC_ADDR[MAC_ADDR_LEN]; 68extern UCHAR ZERO_MAC_ADDR[MAC_ADDR_LEN];
72extern ULONG BIT32[32]; 69extern ULONG BIT32[32];
73extern UCHAR BIT8[8]; 70extern UCHAR BIT8[8];
74extern char* CipherName[]; 71extern char *CipherName[];
75extern char* MCSToMbps[]; 72extern char *MCSToMbps[];
76extern UCHAR RxwiMCSToOfdmRate[12]; 73extern UCHAR RxwiMCSToOfdmRate[12];
77extern UCHAR SNAP_802_1H[6]; 74extern UCHAR SNAP_802_1H[6];
78extern UCHAR SNAP_BRIDGE_TUNNEL[6]; 75extern UCHAR SNAP_BRIDGE_TUNNEL[6];
79extern UCHAR SNAP_AIRONET[8]; 76extern UCHAR SNAP_AIRONET[8];
@@ -82,9 +79,9 @@ extern UCHAR EAPOL_LLC_SNAP[8];
82extern UCHAR EAPOL[2]; 79extern UCHAR EAPOL[2];
83extern UCHAR IPX[2]; 80extern UCHAR IPX[2];
84extern UCHAR APPLE_TALK[2]; 81extern UCHAR APPLE_TALK[2];
85extern UCHAR RateIdToPlcpSignal[12]; // see IEEE802.11a-1999 p.14 82extern UCHAR RateIdToPlcpSignal[12]; // see IEEE802.11a-1999 p.14
86extern UCHAR OfdmRateToRxwiMCS[]; 83extern UCHAR OfdmRateToRxwiMCS[];
87extern UCHAR OfdmSignalToRateId[16] ; 84extern UCHAR OfdmSignalToRateId[16];
88extern UCHAR default_cwmin[4]; 85extern UCHAR default_cwmin[4];
89extern UCHAR default_cwmax[4]; 86extern UCHAR default_cwmax[4];
90extern UCHAR default_sta_aifsn[4]; 87extern UCHAR default_sta_aifsn[4];
@@ -92,92 +89,88 @@ extern UCHAR MapUserPriorityToAccessCategory[8];
92 89
93extern USHORT RateUpPER[]; 90extern USHORT RateUpPER[];
94extern USHORT RateDownPER[]; 91extern USHORT RateDownPER[];
95extern UCHAR Phy11BNextRateDownward[]; 92extern UCHAR Phy11BNextRateDownward[];
96extern UCHAR Phy11BNextRateUpward[]; 93extern UCHAR Phy11BNextRateUpward[];
97extern UCHAR Phy11BGNextRateDownward[]; 94extern UCHAR Phy11BGNextRateDownward[];
98extern UCHAR Phy11BGNextRateUpward[]; 95extern UCHAR Phy11BGNextRateUpward[];
99extern UCHAR Phy11ANextRateDownward[]; 96extern UCHAR Phy11ANextRateDownward[];
100extern UCHAR Phy11ANextRateUpward[]; 97extern UCHAR Phy11ANextRateUpward[];
101extern CHAR RssiSafeLevelForTxRate[]; 98extern CHAR RssiSafeLevelForTxRate[];
102extern UCHAR RateIdToMbps[]; 99extern UCHAR RateIdToMbps[];
103extern USHORT RateIdTo500Kbps[]; 100extern USHORT RateIdTo500Kbps[];
104 101
105extern UCHAR CipherSuiteWpaNoneTkip[]; 102extern UCHAR CipherSuiteWpaNoneTkip[];
106extern UCHAR CipherSuiteWpaNoneTkipLen; 103extern UCHAR CipherSuiteWpaNoneTkipLen;
107 104
108extern UCHAR CipherSuiteWpaNoneAes[]; 105extern UCHAR CipherSuiteWpaNoneAes[];
109extern UCHAR CipherSuiteWpaNoneAesLen; 106extern UCHAR CipherSuiteWpaNoneAesLen;
110 107
111extern UCHAR SsidIe; 108extern UCHAR SsidIe;
112extern UCHAR SupRateIe; 109extern UCHAR SupRateIe;
113extern UCHAR ExtRateIe; 110extern UCHAR ExtRateIe;
114 111
115extern UCHAR HtCapIe; 112extern UCHAR HtCapIe;
116extern UCHAR AddHtInfoIe; 113extern UCHAR AddHtInfoIe;
117extern UCHAR NewExtChanIe; 114extern UCHAR NewExtChanIe;
118 115
119extern UCHAR ErpIe; 116extern UCHAR ErpIe;
120extern UCHAR DsIe; 117extern UCHAR DsIe;
121extern UCHAR TimIe; 118extern UCHAR TimIe;
122extern UCHAR WpaIe; 119extern UCHAR WpaIe;
123extern UCHAR Wpa2Ie; 120extern UCHAR Wpa2Ie;
124extern UCHAR IbssIe; 121extern UCHAR IbssIe;
125extern UCHAR Ccx2Ie; 122extern UCHAR Ccx2Ie;
126extern UCHAR WapiIe; 123extern UCHAR WapiIe;
127 124
128extern UCHAR WPA_OUI[]; 125extern UCHAR WPA_OUI[];
129extern UCHAR RSN_OUI[]; 126extern UCHAR RSN_OUI[];
130extern UCHAR WAPI_OUI[]; 127extern UCHAR WAPI_OUI[];
131extern UCHAR WME_INFO_ELEM[]; 128extern UCHAR WME_INFO_ELEM[];
132extern UCHAR WME_PARM_ELEM[]; 129extern UCHAR WME_PARM_ELEM[];
133extern UCHAR Ccx2QosInfo[]; 130extern UCHAR Ccx2QosInfo[];
134extern UCHAR Ccx2IeInfo[]; 131extern UCHAR Ccx2IeInfo[];
135extern UCHAR RALINK_OUI[]; 132extern UCHAR RALINK_OUI[];
136extern UCHAR PowerConstraintIE[]; 133extern UCHAR PowerConstraintIE[];
137 134
138 135extern UCHAR RateSwitchTable[];
139extern UCHAR RateSwitchTable[]; 136extern UCHAR RateSwitchTable11B[];
140extern UCHAR RateSwitchTable11B[]; 137extern UCHAR RateSwitchTable11G[];
141extern UCHAR RateSwitchTable11G[]; 138extern UCHAR RateSwitchTable11BG[];
142extern UCHAR RateSwitchTable11BG[]; 139
143 140extern UCHAR RateSwitchTable11BGN1S[];
144extern UCHAR RateSwitchTable11BGN1S[]; 141extern UCHAR RateSwitchTable11BGN2S[];
145extern UCHAR RateSwitchTable11BGN2S[]; 142extern UCHAR RateSwitchTable11BGN2SForABand[];
146extern UCHAR RateSwitchTable11BGN2SForABand[]; 143extern UCHAR RateSwitchTable11N1S[];
147extern UCHAR RateSwitchTable11N1S[]; 144extern UCHAR RateSwitchTable11N2S[];
148extern UCHAR RateSwitchTable11N2S[]; 145extern UCHAR RateSwitchTable11N2SForABand[];
149extern UCHAR RateSwitchTable11N2SForABand[]; 146
150 147extern UCHAR PRE_N_HT_OUI[];
151extern UCHAR PRE_N_HT_OUI[]; 148
152 149typedef struct _RSSI_SAMPLE {
153 150 CHAR LastRssi0; // last received RSSI
154 151 CHAR LastRssi1; // last received RSSI
155 152 CHAR LastRssi2; // last received RSSI
156typedef struct _RSSI_SAMPLE { 153 CHAR AvgRssi0;
157 CHAR LastRssi0; // last received RSSI 154 CHAR AvgRssi1;
158 CHAR LastRssi1; // last received RSSI 155 CHAR AvgRssi2;
159 CHAR LastRssi2; // last received RSSI 156 SHORT AvgRssi0X8;
160 CHAR AvgRssi0; 157 SHORT AvgRssi1X8;
161 CHAR AvgRssi1; 158 SHORT AvgRssi2X8;
162 CHAR AvgRssi2;
163 SHORT AvgRssi0X8;
164 SHORT AvgRssi1X8;
165 SHORT AvgRssi2X8;
166} RSSI_SAMPLE; 159} RSSI_SAMPLE;
167 160
168// 161//
169// Queue structure and macros 162// Queue structure and macros
170// 163//
171typedef struct _QUEUE_ENTRY { 164typedef struct _QUEUE_ENTRY {
172 struct _QUEUE_ENTRY *Next; 165 struct _QUEUE_ENTRY *Next;
173} QUEUE_ENTRY, *PQUEUE_ENTRY; 166} QUEUE_ENTRY, *PQUEUE_ENTRY;
174 167
175// Queue structure 168// Queue structure
176typedef struct _QUEUE_HEADER { 169typedef struct _QUEUE_HEADER {
177 PQUEUE_ENTRY Head; 170 PQUEUE_ENTRY Head;
178 PQUEUE_ENTRY Tail; 171 PQUEUE_ENTRY Tail;
179 ULONG Number; 172 ULONG Number;
180} QUEUE_HEADER, *PQUEUE_HEADER; 173} QUEUE_HEADER, *PQUEUE_HEADER;
181 174
182#define InitializeQueueHeader(QueueHeader) \ 175#define InitializeQueueHeader(QueueHeader) \
183{ \ 176{ \
@@ -231,8 +224,6 @@ typedef struct _QUEUE_HEADER {
231 (QueueHeader)->Number++; \ 224 (QueueHeader)->Number++; \
232} 225}
233 226
234
235
236// 227//
237// Macros for flag and ref count operations 228// Macros for flag and ref count operations
238// 229//
@@ -270,13 +261,11 @@ typedef struct _QUEUE_HEADER {
270#define CKIP_KP_ON(_p) ((((_p)->StaCfg.CkipFlag) & 0x10) && ((_p)->StaCfg.bCkipCmicOn == TRUE)) 261#define CKIP_KP_ON(_p) ((((_p)->StaCfg.CkipFlag) & 0x10) && ((_p)->StaCfg.bCkipCmicOn == TRUE))
271#define CKIP_CMIC_ON(_p) ((((_p)->StaCfg.CkipFlag) & 0x08) && ((_p)->StaCfg.bCkipCmicOn == TRUE)) 262#define CKIP_CMIC_ON(_p) ((((_p)->StaCfg.CkipFlag) & 0x08) && ((_p)->StaCfg.bCkipCmicOn == TRUE))
272 263
273
274#define INC_RING_INDEX(_idx, _RingSize) \ 264#define INC_RING_INDEX(_idx, _RingSize) \
275{ \ 265{ \
276 (_idx) = (_idx+1) % (_RingSize); \ 266 (_idx) = (_idx+1) % (_RingSize); \
277} 267}
278 268
279
280// StaActive.SupportedHtPhy.MCSSet is copied from AP beacon. Don't need to update here. 269// StaActive.SupportedHtPhy.MCSSet is copied from AP beacon. Don't need to update here.
281#define COPY_HTSETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(_pAd) \ 270#define COPY_HTSETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(_pAd) \
282{ \ 271{ \
@@ -315,7 +304,6 @@ typedef struct _QUEUE_HEADER {
315// ULONG Value) 304// ULONG Value)
316// 305//
317 306
318
319// 307//
320// Common fragment list structure - Identical to the scatter gather frag list structure 308// Common fragment list structure - Identical to the scatter gather frag list structure
321// 309//
@@ -324,16 +312,15 @@ typedef struct _QUEUE_HEADER {
324#define NIC_MAX_PHYS_BUF_COUNT 8 312#define NIC_MAX_PHYS_BUF_COUNT 8
325 313
326typedef struct _RTMP_SCATTER_GATHER_ELEMENT { 314typedef struct _RTMP_SCATTER_GATHER_ELEMENT {
327 PVOID Address; 315 PVOID Address;
328 ULONG Length; 316 ULONG Length;
329 PULONG Reserved; 317 PULONG Reserved;
330} RTMP_SCATTER_GATHER_ELEMENT, *PRTMP_SCATTER_GATHER_ELEMENT; 318} RTMP_SCATTER_GATHER_ELEMENT, *PRTMP_SCATTER_GATHER_ELEMENT;
331 319
332
333typedef struct _RTMP_SCATTER_GATHER_LIST { 320typedef struct _RTMP_SCATTER_GATHER_LIST {
334 ULONG NumberOfElements; 321 ULONG NumberOfElements;
335 PULONG Reserved; 322 PULONG Reserved;
336 RTMP_SCATTER_GATHER_ELEMENT Elements[NIC_MAX_PHYS_BUF_COUNT]; 323 RTMP_SCATTER_GATHER_ELEMENT Elements[NIC_MAX_PHYS_BUF_COUNT];
337} RTMP_SCATTER_GATHER_LIST, *PRTMP_SCATTER_GATHER_LIST; 324} RTMP_SCATTER_GATHER_LIST, *PRTMP_SCATTER_GATHER_LIST;
338 325
339// 326//
@@ -396,7 +383,6 @@ typedef struct _RTMP_SCATTER_GATHER_LIST {
396 } \ 383 } \
397} 384}
398 385
399
400#define MAKE_802_3_HEADER(_p, _pMac1, _pMac2, _pType) \ 386#define MAKE_802_3_HEADER(_p, _pMac1, _pMac2, _pType) \
401{ \ 387{ \
402 NdisMoveMemory(_p, _pMac1, MAC_ADDR_LEN); \ 388 NdisMoveMemory(_p, _pMac1, MAC_ADDR_LEN); \
@@ -444,7 +430,6 @@ typedef struct _RTMP_SCATTER_GATHER_LIST {
444 } \ 430 } \
445} 431}
446 432
447
448// Enqueue this frame to MLME engine 433// Enqueue this frame to MLME engine
449// We need to enqueue the whole frame because MLME need to pass data type 434// We need to enqueue the whole frame because MLME need to pass data type
450// information from 802.11 header 435// information from 802.11 header
@@ -487,20 +472,16 @@ typedef struct _RTMP_SCATTER_GATHER_LIST {
487 STA_EXTRA_SETTING(_pAd); \ 472 STA_EXTRA_SETTING(_pAd); \
488} 473}
489 474
490
491
492// 475//
493// Data buffer for DMA operation, the buffer must be contiguous physical memory 476// Data buffer for DMA operation, the buffer must be contiguous physical memory
494// Both DMA to / from CPU use the same structure. 477// Both DMA to / from CPU use the same structure.
495// 478//
496typedef struct _RTMP_DMABUF 479typedef struct _RTMP_DMABUF {
497{ 480 ULONG AllocSize;
498 ULONG AllocSize; 481 PVOID AllocVa; // TxBuf virtual address
499 PVOID AllocVa; // TxBuf virtual address 482 NDIS_PHYSICAL_ADDRESS AllocPa; // TxBuf physical address
500 NDIS_PHYSICAL_ADDRESS AllocPa; // TxBuf physical address
501} RTMP_DMABUF, *PRTMP_DMABUF; 483} RTMP_DMABUF, *PRTMP_DMABUF;
502 484
503
504// 485//
505// Control block (Descriptor) for all ring descriptor DMA operation, buffer must be 486// Control block (Descriptor) for all ring descriptor DMA operation, buffer must be
506// contiguous physical memory. NDIS_PACKET stored the binding Rx packet descriptor 487// contiguous physical memory. NDIS_PACKET stored the binding Rx packet descriptor
@@ -509,206 +490,195 @@ typedef struct _RTMP_DMABUF
509// to describe the packet buffer. For Tx, NDIS_PACKET stored the tx packet descriptor 490// to describe the packet buffer. For Tx, NDIS_PACKET stored the tx packet descriptor
510// which driver should ACK upper layer when the tx is physically done or failed. 491// which driver should ACK upper layer when the tx is physically done or failed.
511// 492//
512typedef struct _RTMP_DMACB 493typedef struct _RTMP_DMACB {
513{ 494 ULONG AllocSize; // Control block size
514 ULONG AllocSize; // Control block size 495 PVOID AllocVa; // Control block virtual address
515 PVOID AllocVa; // Control block virtual address 496 NDIS_PHYSICAL_ADDRESS AllocPa; // Control block physical address
516 NDIS_PHYSICAL_ADDRESS AllocPa; // Control block physical address
517 PNDIS_PACKET pNdisPacket; 497 PNDIS_PACKET pNdisPacket;
518 PNDIS_PACKET pNextNdisPacket; 498 PNDIS_PACKET pNextNdisPacket;
519 499
520 RTMP_DMABUF DmaBuf; // Associated DMA buffer structure 500 RTMP_DMABUF DmaBuf; // Associated DMA buffer structure
521} RTMP_DMACB, *PRTMP_DMACB; 501} RTMP_DMACB, *PRTMP_DMACB;
522 502
523 503typedef struct _RTMP_TX_RING {
524typedef struct _RTMP_TX_RING 504 RTMP_DMACB Cell[TX_RING_SIZE];
525{ 505 UINT32 TxCpuIdx;
526 RTMP_DMACB Cell[TX_RING_SIZE]; 506 UINT32 TxDmaIdx;
527 UINT32 TxCpuIdx; 507 UINT32 TxSwFreeIdx; // software next free tx index
528 UINT32 TxDmaIdx;
529 UINT32 TxSwFreeIdx; // software next free tx index
530} RTMP_TX_RING, *PRTMP_TX_RING; 508} RTMP_TX_RING, *PRTMP_TX_RING;
531 509
532typedef struct _RTMP_RX_RING 510typedef struct _RTMP_RX_RING {
533{ 511 RTMP_DMACB Cell[RX_RING_SIZE];
534 RTMP_DMACB Cell[RX_RING_SIZE]; 512 UINT32 RxCpuIdx;
535 UINT32 RxCpuIdx; 513 UINT32 RxDmaIdx;
536 UINT32 RxDmaIdx; 514 INT32 RxSwReadIdx; // software next read index
537 INT32 RxSwReadIdx; // software next read index
538} RTMP_RX_RING, *PRTMP_RX_RING; 515} RTMP_RX_RING, *PRTMP_RX_RING;
539 516
540typedef struct _RTMP_MGMT_RING 517typedef struct _RTMP_MGMT_RING {
541{ 518 RTMP_DMACB Cell[MGMT_RING_SIZE];
542 RTMP_DMACB Cell[MGMT_RING_SIZE]; 519 UINT32 TxCpuIdx;
543 UINT32 TxCpuIdx; 520 UINT32 TxDmaIdx;
544 UINT32 TxDmaIdx; 521 UINT32 TxSwFreeIdx; // software next free tx index
545 UINT32 TxSwFreeIdx; // software next free tx index
546} RTMP_MGMT_RING, *PRTMP_MGMT_RING; 522} RTMP_MGMT_RING, *PRTMP_MGMT_RING;
547 523
548// 524//
549// Statistic counter structure 525// Statistic counter structure
550// 526//
551typedef struct _COUNTER_802_3 527typedef struct _COUNTER_802_3 {
552{
553 // General Stats 528 // General Stats
554 ULONG GoodTransmits; 529 ULONG GoodTransmits;
555 ULONG GoodReceives; 530 ULONG GoodReceives;
556 ULONG TxErrors; 531 ULONG TxErrors;
557 ULONG RxErrors; 532 ULONG RxErrors;
558 ULONG RxNoBuffer; 533 ULONG RxNoBuffer;
559 534
560 // Ethernet Stats 535 // Ethernet Stats
561 ULONG RcvAlignmentErrors; 536 ULONG RcvAlignmentErrors;
562 ULONG OneCollision; 537 ULONG OneCollision;
563 ULONG MoreCollisions; 538 ULONG MoreCollisions;
564 539
565} COUNTER_802_3, *PCOUNTER_802_3; 540} COUNTER_802_3, *PCOUNTER_802_3;
566 541
567typedef struct _COUNTER_802_11 { 542typedef struct _COUNTER_802_11 {
568 ULONG Length; 543 ULONG Length;
569 LARGE_INTEGER LastTransmittedFragmentCount; 544 LARGE_INTEGER LastTransmittedFragmentCount;
570 LARGE_INTEGER TransmittedFragmentCount; 545 LARGE_INTEGER TransmittedFragmentCount;
571 LARGE_INTEGER MulticastTransmittedFrameCount; 546 LARGE_INTEGER MulticastTransmittedFrameCount;
572 LARGE_INTEGER FailedCount; 547 LARGE_INTEGER FailedCount;
573 LARGE_INTEGER RetryCount; 548 LARGE_INTEGER RetryCount;
574 LARGE_INTEGER MultipleRetryCount; 549 LARGE_INTEGER MultipleRetryCount;
575 LARGE_INTEGER RTSSuccessCount; 550 LARGE_INTEGER RTSSuccessCount;
576 LARGE_INTEGER RTSFailureCount; 551 LARGE_INTEGER RTSFailureCount;
577 LARGE_INTEGER ACKFailureCount; 552 LARGE_INTEGER ACKFailureCount;
578 LARGE_INTEGER FrameDuplicateCount; 553 LARGE_INTEGER FrameDuplicateCount;
579 LARGE_INTEGER ReceivedFragmentCount; 554 LARGE_INTEGER ReceivedFragmentCount;
580 LARGE_INTEGER MulticastReceivedFrameCount; 555 LARGE_INTEGER MulticastReceivedFrameCount;
581 LARGE_INTEGER FCSErrorCount; 556 LARGE_INTEGER FCSErrorCount;
582} COUNTER_802_11, *PCOUNTER_802_11; 557} COUNTER_802_11, *PCOUNTER_802_11;
583 558
584typedef struct _COUNTER_RALINK { 559typedef struct _COUNTER_RALINK {
585 ULONG TransmittedByteCount; // both successful and failure, used to calculate TX throughput 560 ULONG TransmittedByteCount; // both successful and failure, used to calculate TX throughput
586 ULONG ReceivedByteCount; // both CRC okay and CRC error, used to calculate RX throughput 561 ULONG ReceivedByteCount; // both CRC okay and CRC error, used to calculate RX throughput
587 ULONG BeenDisassociatedCount; 562 ULONG BeenDisassociatedCount;
588 ULONG BadCQIAutoRecoveryCount; 563 ULONG BadCQIAutoRecoveryCount;
589 ULONG PoorCQIRoamingCount; 564 ULONG PoorCQIRoamingCount;
590 ULONG MgmtRingFullCount; 565 ULONG MgmtRingFullCount;
591 ULONG RxCountSinceLastNULL; 566 ULONG RxCountSinceLastNULL;
592 ULONG RxCount; 567 ULONG RxCount;
593 ULONG RxRingErrCount; 568 ULONG RxRingErrCount;
594 ULONG KickTxCount; 569 ULONG KickTxCount;
595 ULONG TxRingErrCount; 570 ULONG TxRingErrCount;
596 LARGE_INTEGER RealFcsErrCount; 571 LARGE_INTEGER RealFcsErrCount;
597 ULONG PendingNdisPacketCount; 572 ULONG PendingNdisPacketCount;
598 573
599 ULONG OneSecOsTxCount[NUM_OF_TX_RING]; 574 ULONG OneSecOsTxCount[NUM_OF_TX_RING];
600 ULONG OneSecDmaDoneCount[NUM_OF_TX_RING]; 575 ULONG OneSecDmaDoneCount[NUM_OF_TX_RING];
601 UINT32 OneSecTxDoneCount; 576 UINT32 OneSecTxDoneCount;
602 ULONG OneSecRxCount; 577 ULONG OneSecRxCount;
603 UINT32 OneSecTxAggregationCount; 578 UINT32 OneSecTxAggregationCount;
604 UINT32 OneSecRxAggregationCount; 579 UINT32 OneSecRxAggregationCount;
605 UINT32 OneSecReceivedByteCount; 580 UINT32 OneSecReceivedByteCount;
606 UINT32 OneSecFrameDuplicateCount; 581 UINT32 OneSecFrameDuplicateCount;
607 582
608 UINT32 OneSecTransmittedByteCount; // both successful and failure, used to calculate TX throughput 583 UINT32 OneSecTransmittedByteCount; // both successful and failure, used to calculate TX throughput
609 UINT32 OneSecTxNoRetryOkCount; 584 UINT32 OneSecTxNoRetryOkCount;
610 UINT32 OneSecTxRetryOkCount; 585 UINT32 OneSecTxRetryOkCount;
611 UINT32 OneSecTxFailCount; 586 UINT32 OneSecTxFailCount;
612 UINT32 OneSecFalseCCACnt; // CCA error count, for debug purpose, might move to global counter 587 UINT32 OneSecFalseCCACnt; // CCA error count, for debug purpose, might move to global counter
613 UINT32 OneSecRxOkCnt; // RX without error 588 UINT32 OneSecRxOkCnt; // RX without error
614 UINT32 OneSecRxOkDataCnt; // unicast-to-me DATA frame count 589 UINT32 OneSecRxOkDataCnt; // unicast-to-me DATA frame count
615 UINT32 OneSecRxFcsErrCnt; // CRC error 590 UINT32 OneSecRxFcsErrCnt; // CRC error
616 UINT32 OneSecBeaconSentCnt; 591 UINT32 OneSecBeaconSentCnt;
617 UINT32 LastOneSecTotalTxCount; // OneSecTxNoRetryOkCount + OneSecTxRetryOkCount + OneSecTxFailCount 592 UINT32 LastOneSecTotalTxCount; // OneSecTxNoRetryOkCount + OneSecTxRetryOkCount + OneSecTxFailCount
618 UINT32 LastOneSecRxOkDataCnt; // OneSecRxOkDataCnt 593 UINT32 LastOneSecRxOkDataCnt; // OneSecRxOkDataCnt
619 ULONG DuplicateRcv; 594 ULONG DuplicateRcv;
620 ULONG TxAggCount; 595 ULONG TxAggCount;
621 ULONG TxNonAggCount; 596 ULONG TxNonAggCount;
622 ULONG TxAgg1MPDUCount; 597 ULONG TxAgg1MPDUCount;
623 ULONG TxAgg2MPDUCount; 598 ULONG TxAgg2MPDUCount;
624 ULONG TxAgg3MPDUCount; 599 ULONG TxAgg3MPDUCount;
625 ULONG TxAgg4MPDUCount; 600 ULONG TxAgg4MPDUCount;
626 ULONG TxAgg5MPDUCount; 601 ULONG TxAgg5MPDUCount;
627 ULONG TxAgg6MPDUCount; 602 ULONG TxAgg6MPDUCount;
628 ULONG TxAgg7MPDUCount; 603 ULONG TxAgg7MPDUCount;
629 ULONG TxAgg8MPDUCount; 604 ULONG TxAgg8MPDUCount;
630 ULONG TxAgg9MPDUCount; 605 ULONG TxAgg9MPDUCount;
631 ULONG TxAgg10MPDUCount; 606 ULONG TxAgg10MPDUCount;
632 ULONG TxAgg11MPDUCount; 607 ULONG TxAgg11MPDUCount;
633 ULONG TxAgg12MPDUCount; 608 ULONG TxAgg12MPDUCount;
634 ULONG TxAgg13MPDUCount; 609 ULONG TxAgg13MPDUCount;
635 ULONG TxAgg14MPDUCount; 610 ULONG TxAgg14MPDUCount;
636 ULONG TxAgg15MPDUCount; 611 ULONG TxAgg15MPDUCount;
637 ULONG TxAgg16MPDUCount; 612 ULONG TxAgg16MPDUCount;
638 613
639 LARGE_INTEGER TransmittedOctetsInAMSDU; 614 LARGE_INTEGER TransmittedOctetsInAMSDU;
640 LARGE_INTEGER TransmittedAMSDUCount; 615 LARGE_INTEGER TransmittedAMSDUCount;
641 LARGE_INTEGER ReceivedOctesInAMSDUCount; 616 LARGE_INTEGER ReceivedOctesInAMSDUCount;
642 LARGE_INTEGER ReceivedAMSDUCount; 617 LARGE_INTEGER ReceivedAMSDUCount;
643 LARGE_INTEGER TransmittedAMPDUCount; 618 LARGE_INTEGER TransmittedAMPDUCount;
644 LARGE_INTEGER TransmittedMPDUsInAMPDUCount; 619 LARGE_INTEGER TransmittedMPDUsInAMPDUCount;
645 LARGE_INTEGER TransmittedOctetsInAMPDUCount; 620 LARGE_INTEGER TransmittedOctetsInAMPDUCount;
646 LARGE_INTEGER MPDUInReceivedAMPDUCount; 621 LARGE_INTEGER MPDUInReceivedAMPDUCount;
647} COUNTER_RALINK, *PCOUNTER_RALINK; 622} COUNTER_RALINK, *PCOUNTER_RALINK;
648 623
649
650typedef struct _COUNTER_DRS { 624typedef struct _COUNTER_DRS {
651 // to record the each TX rate's quality. 0 is best, the bigger the worse. 625 // to record the each TX rate's quality. 0 is best, the bigger the worse.
652 USHORT TxQuality[MAX_STEP_OF_TX_RATE_SWITCH]; 626 USHORT TxQuality[MAX_STEP_OF_TX_RATE_SWITCH];
653 UCHAR PER[MAX_STEP_OF_TX_RATE_SWITCH]; 627 UCHAR PER[MAX_STEP_OF_TX_RATE_SWITCH];
654 UCHAR TxRateUpPenalty; // extra # of second penalty due to last unstable condition 628 UCHAR TxRateUpPenalty; // extra # of second penalty due to last unstable condition
655 ULONG CurrTxRateStableTime; // # of second in current TX rate 629 ULONG CurrTxRateStableTime; // # of second in current TX rate
656 BOOLEAN fNoisyEnvironment; 630 BOOLEAN fNoisyEnvironment;
657 BOOLEAN fLastSecAccordingRSSI; 631 BOOLEAN fLastSecAccordingRSSI;
658 UCHAR LastSecTxRateChangeAction; // 0: no change, 1:rate UP, 2:rate down 632 UCHAR LastSecTxRateChangeAction; // 0: no change, 1:rate UP, 2:rate down
659 UCHAR LastTimeTxRateChangeAction; //Keep last time value of LastSecTxRateChangeAction 633 UCHAR LastTimeTxRateChangeAction; //Keep last time value of LastSecTxRateChangeAction
660 ULONG LastTxOkCount; 634 ULONG LastTxOkCount;
661} COUNTER_DRS, *PCOUNTER_DRS; 635} COUNTER_DRS, *PCOUNTER_DRS;
662 636
663
664
665
666/*************************************************************************** 637/***************************************************************************
667 * security key related data structure 638 * security key related data structure
668 **************************************************************************/ 639 **************************************************************************/
669typedef struct _CIPHER_KEY { 640typedef struct _CIPHER_KEY {
670 UCHAR Key[16]; // right now we implement 4 keys, 128 bits max 641 UCHAR Key[16]; // right now we implement 4 keys, 128 bits max
671 UCHAR RxMic[8]; // make alignment 642 UCHAR RxMic[8]; // make alignment
672 UCHAR TxMic[8]; 643 UCHAR TxMic[8];
673 UCHAR TxTsc[6]; // 48bit TSC value 644 UCHAR TxTsc[6]; // 48bit TSC value
674 UCHAR RxTsc[6]; // 48bit TSC value 645 UCHAR RxTsc[6]; // 48bit TSC value
675 UCHAR CipherAlg; // 0-none, 1:WEP64, 2:WEP128, 3:TKIP, 4:AES, 5:CKIP64, 6:CKIP128 646 UCHAR CipherAlg; // 0-none, 1:WEP64, 2:WEP128, 3:TKIP, 4:AES, 5:CKIP64, 6:CKIP128
676 UCHAR KeyLen; 647 UCHAR KeyLen;
677 UCHAR BssId[6]; 648 UCHAR BssId[6];
678 // Key length for each key, 0: entry is invalid 649 // Key length for each key, 0: entry is invalid
679 UCHAR Type; // Indicate Pairwise/Group when reporting MIC error 650 UCHAR Type; // Indicate Pairwise/Group when reporting MIC error
680} CIPHER_KEY, *PCIPHER_KEY; 651} CIPHER_KEY, *PCIPHER_KEY;
681 652
682
683// structure to define WPA Group Key Rekey Interval 653// structure to define WPA Group Key Rekey Interval
684typedef struct PACKED _RT_802_11_WPA_REKEY { 654typedef struct PACKED _RT_802_11_WPA_REKEY {
685 ULONG ReKeyMethod; // mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based 655 ULONG ReKeyMethod; // mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based
686 ULONG ReKeyInterval; // time-based: seconds, packet-based: kilo-packets 656 ULONG ReKeyInterval; // time-based: seconds, packet-based: kilo-packets
687} RT_WPA_REKEY,*PRT_WPA_REKEY, RT_802_11_WPA_REKEY, *PRT_802_11_WPA_REKEY; 657} RT_WPA_REKEY, *PRT_WPA_REKEY, RT_802_11_WPA_REKEY, *PRT_802_11_WPA_REKEY;
688 658
689#ifdef RTMP_MAC_USB 659#ifdef RTMP_MAC_USB
690/*************************************************************************** 660/***************************************************************************
691 * RTUSB I/O related data structure 661 * RTUSB I/O related data structure
692 **************************************************************************/ 662 **************************************************************************/
693typedef struct _RT_SET_ASIC_WCID { 663typedef struct _RT_SET_ASIC_WCID {
694 ULONG WCID; // mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based 664 ULONG WCID; // mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based
695 ULONG SetTid; // time-based: seconds, packet-based: kilo-packets 665 ULONG SetTid; // time-based: seconds, packet-based: kilo-packets
696 ULONG DeleteTid; // time-based: seconds, packet-based: kilo-packets 666 ULONG DeleteTid; // time-based: seconds, packet-based: kilo-packets
697 UCHAR Addr[MAC_ADDR_LEN]; // avoid in interrupt when write key 667 UCHAR Addr[MAC_ADDR_LEN]; // avoid in interrupt when write key
698} RT_SET_ASIC_WCID,*PRT_SET_ASIC_WCID; 668} RT_SET_ASIC_WCID, *PRT_SET_ASIC_WCID;
699 669
700typedef struct _RT_SET_ASIC_WCID_ATTRI { 670typedef struct _RT_SET_ASIC_WCID_ATTRI {
701 ULONG WCID; // mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based 671 ULONG WCID; // mechanism for rekeying: 0:disable, 1: time-based, 2: packet-based
702 ULONG Cipher; // ASIC Cipher definition 672 ULONG Cipher; // ASIC Cipher definition
703 UCHAR Addr[ETH_LENGTH_OF_ADDRESS]; 673 UCHAR Addr[ETH_LENGTH_OF_ADDRESS];
704} RT_SET_ASIC_WCID_ATTRI,*PRT_SET_ASIC_WCID_ATTRI; 674} RT_SET_ASIC_WCID_ATTRI, *PRT_SET_ASIC_WCID_ATTRI;
705 675
706// for USB interface, avoid in interrupt when write key 676// for USB interface, avoid in interrupt when write key
707typedef struct RT_ADD_PAIRWISE_KEY_ENTRY { 677typedef struct RT_ADD_PAIRWISE_KEY_ENTRY {
708 UCHAR MacAddr[6]; 678 UCHAR MacAddr[6];
709 USHORT MacTabMatchWCID; // ASIC 679 USHORT MacTabMatchWCID; // ASIC
710 CIPHER_KEY CipherKey; 680 CIPHER_KEY CipherKey;
711} RT_ADD_PAIRWISE_KEY_ENTRY,*PRT_ADD_PAIRWISE_KEY_ENTRY; 681} RT_ADD_PAIRWISE_KEY_ENTRY, *PRT_ADD_PAIRWISE_KEY_ENTRY;
712 682
713// Cipher suite type for mixed mode group cipher, P802.11i-2004 683// Cipher suite type for mixed mode group cipher, P802.11i-2004
714typedef enum _RT_802_11_CIPHER_SUITE_TYPE { 684typedef enum _RT_802_11_CIPHER_SUITE_TYPE {
@@ -722,176 +692,168 @@ typedef enum _RT_802_11_CIPHER_SUITE_TYPE {
722#endif // RTMP_MAC_USB // 692#endif // RTMP_MAC_USB //
723 693
724typedef struct { 694typedef struct {
725 UCHAR Addr[MAC_ADDR_LEN]; 695 UCHAR Addr[MAC_ADDR_LEN];
726 UCHAR ErrorCode[2]; //00 01-Invalid authentication type 696 UCHAR ErrorCode[2]; //00 01-Invalid authentication type
727 //00 02-Authentication timeout 697 //00 02-Authentication timeout
728 //00 03-Challenge from AP failed 698 //00 03-Challenge from AP failed
729 //00 04-Challenge to AP failed 699 //00 04-Challenge to AP failed
730 BOOLEAN Reported; 700 BOOLEAN Reported;
731} ROGUEAP_ENTRY, *PROGUEAP_ENTRY; 701} ROGUEAP_ENTRY, *PROGUEAP_ENTRY;
732 702
733typedef struct { 703typedef struct {
734 UCHAR RogueApNr; 704 UCHAR RogueApNr;
735 ROGUEAP_ENTRY RogueApEntry[MAX_LEN_OF_BSS_TABLE]; 705 ROGUEAP_ENTRY RogueApEntry[MAX_LEN_OF_BSS_TABLE];
736} ROGUEAP_TABLE, *PROGUEAP_TABLE; 706} ROGUEAP_TABLE, *PROGUEAP_TABLE;
737 707
738// 708//
739// Cisco IAPP format 709// Cisco IAPP format
740// 710//
741typedef struct _CISCO_IAPP_CONTENT_ 711typedef struct _CISCO_IAPP_CONTENT_ {
742{ 712 USHORT Length; //IAPP Length
743 USHORT Length; //IAPP Length 713 UCHAR MessageType; //IAPP type
744 UCHAR MessageType; //IAPP type 714 UCHAR FunctionCode; //IAPP function type
745 UCHAR FunctionCode; //IAPP function type 715 UCHAR DestinaionMAC[MAC_ADDR_LEN];
746 UCHAR DestinaionMAC[MAC_ADDR_LEN]; 716 UCHAR SourceMAC[MAC_ADDR_LEN];
747 UCHAR SourceMAC[MAC_ADDR_LEN]; 717 USHORT Tag; //Tag(element IE) - Adjacent AP report
748 USHORT Tag; //Tag(element IE) - Adjacent AP report 718 USHORT TagLength; //Length of element not including 4 byte header
749 USHORT TagLength; //Length of element not including 4 byte header 719 UCHAR OUI[4]; //0x00, 0x40, 0x96, 0x00
750 UCHAR OUI[4]; //0x00, 0x40, 0x96, 0x00 720 UCHAR PreviousAP[MAC_ADDR_LEN]; //MAC Address of access point
751 UCHAR PreviousAP[MAC_ADDR_LEN]; //MAC Address of access point 721 USHORT Channel;
752 USHORT Channel; 722 USHORT SsidLen;
753 USHORT SsidLen; 723 UCHAR Ssid[MAX_LEN_OF_SSID];
754 UCHAR Ssid[MAX_LEN_OF_SSID]; 724 USHORT Seconds; //Seconds that the client has been disassociated.
755 USHORT Seconds; //Seconds that the client has been disassociated.
756} CISCO_IAPP_CONTENT, *PCISCO_IAPP_CONTENT; 725} CISCO_IAPP_CONTENT, *PCISCO_IAPP_CONTENT;
757 726
758
759/* 727/*
760 * Fragment Frame structure 728 * Fragment Frame structure
761 */ 729 */
762typedef struct _FRAGMENT_FRAME { 730typedef struct _FRAGMENT_FRAME {
763 PNDIS_PACKET pFragPacket; 731 PNDIS_PACKET pFragPacket;
764 ULONG RxSize; 732 ULONG RxSize;
765 USHORT Sequence; 733 USHORT Sequence;
766 USHORT LastFrag; 734 USHORT LastFrag;
767 ULONG Flags; // Some extra frame information. bit 0: LLC presented 735 ULONG Flags; // Some extra frame information. bit 0: LLC presented
768} FRAGMENT_FRAME, *PFRAGMENT_FRAME; 736} FRAGMENT_FRAME, *PFRAGMENT_FRAME;
769 737
770
771// 738//
772// Packet information for NdisQueryPacket 739// Packet information for NdisQueryPacket
773// 740//
774typedef struct _PACKET_INFO { 741typedef struct _PACKET_INFO {
775 UINT PhysicalBufferCount; // Physical breaks of buffer descripor chained 742 UINT PhysicalBufferCount; // Physical breaks of buffer descripor chained
776 UINT BufferCount ; // Number of Buffer descriptor chained 743 UINT BufferCount; // Number of Buffer descriptor chained
777 UINT TotalPacketLength ; // Self explained 744 UINT TotalPacketLength; // Self explained
778 PNDIS_BUFFER pFirstBuffer; // Pointer to first buffer descriptor 745 PNDIS_BUFFER pFirstBuffer; // Pointer to first buffer descriptor
779} PACKET_INFO, *PPACKET_INFO; 746} PACKET_INFO, *PPACKET_INFO;
780 747
781
782// 748//
783// Arcfour Structure Added by PaulWu 749// Arcfour Structure Added by PaulWu
784// 750//
785typedef struct _ARCFOUR 751typedef struct _ARCFOUR {
786{ 752 UINT X;
787 UINT X; 753 UINT Y;
788 UINT Y; 754 UCHAR STATE[256];
789 UCHAR STATE[256];
790} ARCFOURCONTEXT, *PARCFOURCONTEXT; 755} ARCFOURCONTEXT, *PARCFOURCONTEXT;
791 756
792
793// 757//
794// Tkip Key structure which RC4 key & MIC calculation 758// Tkip Key structure which RC4 key & MIC calculation
795// 759//
796typedef struct _TKIP_KEY_INFO { 760typedef struct _TKIP_KEY_INFO {
797 UINT nBytesInM; // # bytes in M for MICKEY 761 UINT nBytesInM; // # bytes in M for MICKEY
798 ULONG IV16; 762 ULONG IV16;
799 ULONG IV32; 763 ULONG IV32;
800 ULONG K0; // for MICKEY Low 764 ULONG K0; // for MICKEY Low
801 ULONG K1; // for MICKEY Hig 765 ULONG K1; // for MICKEY Hig
802 ULONG L; // Current state for MICKEY 766 ULONG L; // Current state for MICKEY
803 ULONG R; // Current state for MICKEY 767 ULONG R; // Current state for MICKEY
804 ULONG M; // Message accumulator for MICKEY 768 ULONG M; // Message accumulator for MICKEY
805 UCHAR RC4KEY[16]; 769 UCHAR RC4KEY[16];
806 UCHAR MIC[8]; 770 UCHAR MIC[8];
807} TKIP_KEY_INFO, *PTKIP_KEY_INFO; 771} TKIP_KEY_INFO, *PTKIP_KEY_INFO;
808 772
809// 773//
810// Private / Misc data, counters for driver internal use 774// Private / Misc data, counters for driver internal use
811// 775//
812typedef struct __PRIVATE_STRUC { 776typedef struct __PRIVATE_STRUC {
813 UINT SystemResetCnt; // System reset counter 777 UINT SystemResetCnt; // System reset counter
814 UINT TxRingFullCnt; // Tx ring full occurrance number 778 UINT TxRingFullCnt; // Tx ring full occurrance number
815 UINT PhyRxErrCnt; // PHY Rx error count, for debug purpose, might move to global counter 779 UINT PhyRxErrCnt; // PHY Rx error count, for debug purpose, might move to global counter
816 // Variables for WEP encryption / decryption in rtmp_wep.c 780 // Variables for WEP encryption / decryption in rtmp_wep.c
817 UINT FCSCRC32; 781 UINT FCSCRC32;
818 ARCFOURCONTEXT WEPCONTEXT; 782 ARCFOURCONTEXT WEPCONTEXT;
819 // Tkip stuff 783 // Tkip stuff
820 TKIP_KEY_INFO Tx; 784 TKIP_KEY_INFO Tx;
821 TKIP_KEY_INFO Rx; 785 TKIP_KEY_INFO Rx;
822} PRIVATE_STRUC, *PPRIVATE_STRUC; 786} PRIVATE_STRUC, *PPRIVATE_STRUC;
823 787
824
825/*************************************************************************** 788/***************************************************************************
826 * Channel and BBP related data structures 789 * Channel and BBP related data structures
827 **************************************************************************/ 790 **************************************************************************/
828// structure to tune BBP R66 (BBP TUNING) 791// structure to tune BBP R66 (BBP TUNING)
829typedef struct _BBP_R66_TUNING { 792typedef struct _BBP_R66_TUNING {
830 BOOLEAN bEnable; 793 BOOLEAN bEnable;
831 USHORT FalseCcaLowerThreshold; // default 100 794 USHORT FalseCcaLowerThreshold; // default 100
832 USHORT FalseCcaUpperThreshold; // default 512 795 USHORT FalseCcaUpperThreshold; // default 512
833 UCHAR R66Delta; 796 UCHAR R66Delta;
834 UCHAR R66CurrentValue; 797 UCHAR R66CurrentValue;
835 BOOLEAN R66LowerUpperSelect; //Before LinkUp, Used LowerBound or UpperBound as R66 value. 798 BOOLEAN R66LowerUpperSelect; //Before LinkUp, Used LowerBound or UpperBound as R66 value.
836} BBP_R66_TUNING, *PBBP_R66_TUNING; 799} BBP_R66_TUNING, *PBBP_R66_TUNING;
837 800
838// structure to store channel TX power 801// structure to store channel TX power
839typedef struct _CHANNEL_TX_POWER { 802typedef struct _CHANNEL_TX_POWER {
840 USHORT RemainingTimeForUse; //unit: sec 803 USHORT RemainingTimeForUse; //unit: sec
841 UCHAR Channel; 804 UCHAR Channel;
842 CHAR Power; 805 CHAR Power;
843 CHAR Power2; 806 CHAR Power2;
844 UCHAR MaxTxPwr; 807 UCHAR MaxTxPwr;
845 UCHAR DfsReq; 808 UCHAR DfsReq;
846} CHANNEL_TX_POWER, *PCHANNEL_TX_POWER; 809} CHANNEL_TX_POWER, *PCHANNEL_TX_POWER;
847 810
848// structure to store 802.11j channel TX power 811// structure to store 802.11j channel TX power
849typedef struct _CHANNEL_11J_TX_POWER { 812typedef struct _CHANNEL_11J_TX_POWER {
850 UCHAR Channel; 813 UCHAR Channel;
851 UCHAR BW; // BW_10 or BW_20 814 UCHAR BW; // BW_10 or BW_20
852 CHAR Power; 815 CHAR Power;
853 CHAR Power2; 816 CHAR Power2;
854 USHORT RemainingTimeForUse; //unit: sec 817 USHORT RemainingTimeForUse; //unit: sec
855} CHANNEL_11J_TX_POWER, *PCHANNEL_11J_TX_POWER; 818} CHANNEL_11J_TX_POWER, *PCHANNEL_11J_TX_POWER;
856 819
857typedef struct _SOFT_RX_ANT_DIVERSITY_STRUCT { 820typedef struct _SOFT_RX_ANT_DIVERSITY_STRUCT {
858 UCHAR EvaluatePeriod; // 0:not evalute status, 1: evaluate status, 2: switching status 821 UCHAR EvaluatePeriod; // 0:not evalute status, 1: evaluate status, 2: switching status
859 UCHAR EvaluateStableCnt; 822 UCHAR EvaluateStableCnt;
860 UCHAR Pair1PrimaryRxAnt; // 0:Ant-E1, 1:Ant-E2 823 UCHAR Pair1PrimaryRxAnt; // 0:Ant-E1, 1:Ant-E2
861 UCHAR Pair1SecondaryRxAnt; // 0:Ant-E1, 1:Ant-E2 824 UCHAR Pair1SecondaryRxAnt; // 0:Ant-E1, 1:Ant-E2
862 UCHAR Pair2PrimaryRxAnt; // 0:Ant-E3, 1:Ant-E4 825 UCHAR Pair2PrimaryRxAnt; // 0:Ant-E3, 1:Ant-E4
863 UCHAR Pair2SecondaryRxAnt; // 0:Ant-E3, 1:Ant-E4 826 UCHAR Pair2SecondaryRxAnt; // 0:Ant-E3, 1:Ant-E4
864 SHORT Pair1AvgRssi[2]; // AvgRssi[0]:E1, AvgRssi[1]:E2 827 SHORT Pair1AvgRssi[2]; // AvgRssi[0]:E1, AvgRssi[1]:E2
865 SHORT Pair2AvgRssi[2]; // AvgRssi[0]:E3, AvgRssi[1]:E4 828 SHORT Pair2AvgRssi[2]; // AvgRssi[0]:E3, AvgRssi[1]:E4
866 SHORT Pair1LastAvgRssi; // 829 SHORT Pair1LastAvgRssi; //
867 SHORT Pair2LastAvgRssi; // 830 SHORT Pair2LastAvgRssi; //
868 ULONG RcvPktNumWhenEvaluate; 831 ULONG RcvPktNumWhenEvaluate;
869 BOOLEAN FirstPktArrivedWhenEvaluate; 832 BOOLEAN FirstPktArrivedWhenEvaluate;
870 RALINK_TIMER_STRUCT RxAntDiversityTimer; 833 RALINK_TIMER_STRUCT RxAntDiversityTimer;
871} SOFT_RX_ANT_DIVERSITY, *PSOFT_RX_ANT_DIVERSITY; 834} SOFT_RX_ANT_DIVERSITY, *PSOFT_RX_ANT_DIVERSITY;
872 835
873
874/*************************************************************************** 836/***************************************************************************
875 * structure for radar detection and channel switch 837 * structure for radar detection and channel switch
876 **************************************************************************/ 838 **************************************************************************/
877typedef struct _RADAR_DETECT_STRUCT { 839typedef struct _RADAR_DETECT_STRUCT {
878 //BOOLEAN IEEE80211H; // 0: disable, 1: enable IEEE802.11h 840 //BOOLEAN IEEE80211H; // 0: disable, 1: enable IEEE802.11h
879 UCHAR CSCount; //Channel switch counter 841 UCHAR CSCount; //Channel switch counter
880 UCHAR CSPeriod; //Channel switch period (beacon count) 842 UCHAR CSPeriod; //Channel switch period (beacon count)
881 UCHAR RDCount; //Radar detection counter 843 UCHAR RDCount; //Radar detection counter
882 UCHAR RDMode; //Radar Detection mode 844 UCHAR RDMode; //Radar Detection mode
883 UCHAR RDDurRegion; //Radar detection duration region 845 UCHAR RDDurRegion; //Radar detection duration region
884 UCHAR BBPR16; 846 UCHAR BBPR16;
885 UCHAR BBPR17; 847 UCHAR BBPR17;
886 UCHAR BBPR18; 848 UCHAR BBPR18;
887 UCHAR BBPR21; 849 UCHAR BBPR21;
888 UCHAR BBPR22; 850 UCHAR BBPR22;
889 UCHAR BBPR64; 851 UCHAR BBPR64;
890 ULONG InServiceMonitorCount; // unit: sec 852 ULONG InServiceMonitorCount; // unit: sec
891 UINT8 DfsSessionTime; 853 UINT8 DfsSessionTime;
892 BOOLEAN bFastDfs; 854 BOOLEAN bFastDfs;
893 UINT8 ChMovingTime; 855 UINT8 ChMovingTime;
894 UINT8 LongPulseRadarTh; 856 UINT8 LongPulseRadarTh;
895} RADAR_DETECT_STRUCT, *PRADAR_DETECT_STRUCT; 857} RADAR_DETECT_STRUCT, *PRADAR_DETECT_STRUCT;
896 858
897typedef enum _ABGBAND_STATE_ { 859typedef enum _ABGBAND_STATE_ {
@@ -902,17 +864,17 @@ typedef enum _ABGBAND_STATE_ {
902 864
903#ifdef RTMP_MAC_PCI 865#ifdef RTMP_MAC_PCI
904// Power save method control 866// Power save method control
905typedef union _PS_CONTROL { 867typedef union _PS_CONTROL {
906 struct { 868 struct {
907 ULONG EnablePSinIdle:1; // Enable radio off when not connect to AP. radio on only when sitesurvey, 869 ULONG EnablePSinIdle:1; // Enable radio off when not connect to AP. radio on only when sitesurvey,
908 ULONG EnableNewPS:1; // Enable new Chip power save fucntion . New method can only be applied in chip version after 2872. and PCIe. 870 ULONG EnableNewPS:1; // Enable new Chip power save fucntion . New method can only be applied in chip version after 2872. and PCIe.
909 ULONG rt30xxPowerMode:2; // Power Level Mode for rt30xx chip 871 ULONG rt30xxPowerMode:2; // Power Level Mode for rt30xx chip
910 ULONG rt30xxFollowHostASPM:1; // Card Follows Host's setting for rt30xx chip. 872 ULONG rt30xxFollowHostASPM:1; // Card Follows Host's setting for rt30xx chip.
911 ULONG rt30xxForceASPMTest:1; // Force enable L1 for rt30xx chip. This has higher priority than rt30xxFollowHostASPM Mode. 873 ULONG rt30xxForceASPMTest:1; // Force enable L1 for rt30xx chip. This has higher priority than rt30xxFollowHostASPM Mode.
912 ULONG rsv:26; // Radio Measurement Enable 874 ULONG rsv:26; // Radio Measurement Enable
913 } field; 875 } field;
914 ULONG word; 876 ULONG word;
915} PS_CONTROL, *PPS_CONTROL; 877} PS_CONTROL, *PPS_CONTROL;
916#endif // RTMP_MAC_PCI // 878#endif // RTMP_MAC_PCI //
917 879
918/*************************************************************************** 880/***************************************************************************
@@ -920,208 +882,193 @@ typedef union _PS_CONTROL {
920 **************************************************************************/ 882 **************************************************************************/
921typedef struct _MLME_STRUCT { 883typedef struct _MLME_STRUCT {
922 // STA state machines 884 // STA state machines
923 STATE_MACHINE CntlMachine; 885 STATE_MACHINE CntlMachine;
924 STATE_MACHINE AssocMachine; 886 STATE_MACHINE AssocMachine;
925 STATE_MACHINE AuthMachine; 887 STATE_MACHINE AuthMachine;
926 STATE_MACHINE AuthRspMachine; 888 STATE_MACHINE AuthRspMachine;
927 STATE_MACHINE SyncMachine; 889 STATE_MACHINE SyncMachine;
928 STATE_MACHINE WpaPskMachine; 890 STATE_MACHINE WpaPskMachine;
929 STATE_MACHINE LeapMachine; 891 STATE_MACHINE LeapMachine;
930 STATE_MACHINE_FUNC AssocFunc[ASSOC_FUNC_SIZE]; 892 STATE_MACHINE_FUNC AssocFunc[ASSOC_FUNC_SIZE];
931 STATE_MACHINE_FUNC AuthFunc[AUTH_FUNC_SIZE]; 893 STATE_MACHINE_FUNC AuthFunc[AUTH_FUNC_SIZE];
932 STATE_MACHINE_FUNC AuthRspFunc[AUTH_RSP_FUNC_SIZE]; 894 STATE_MACHINE_FUNC AuthRspFunc[AUTH_RSP_FUNC_SIZE];
933 STATE_MACHINE_FUNC SyncFunc[SYNC_FUNC_SIZE]; 895 STATE_MACHINE_FUNC SyncFunc[SYNC_FUNC_SIZE];
934 STATE_MACHINE_FUNC ActFunc[ACT_FUNC_SIZE]; 896 STATE_MACHINE_FUNC ActFunc[ACT_FUNC_SIZE];
935 // Action 897 // Action
936 STATE_MACHINE ActMachine; 898 STATE_MACHINE ActMachine;
937
938
939
940 899
941 // common WPA state machine 900 // common WPA state machine
942 STATE_MACHINE WpaMachine; 901 STATE_MACHINE WpaMachine;
943 STATE_MACHINE_FUNC WpaFunc[WPA_FUNC_SIZE]; 902 STATE_MACHINE_FUNC WpaFunc[WPA_FUNC_SIZE];
944
945
946 903
947 ULONG ChannelQuality; // 0..100, Channel Quality Indication for Roaming 904 ULONG ChannelQuality; // 0..100, Channel Quality Indication for Roaming
948 ULONG Now32; // latch the value of NdisGetSystemUpTime() 905 ULONG Now32; // latch the value of NdisGetSystemUpTime()
949 ULONG LastSendNULLpsmTime; 906 ULONG LastSendNULLpsmTime;
950 907
951 BOOLEAN bRunning; 908 BOOLEAN bRunning;
952 NDIS_SPIN_LOCK TaskLock; 909 NDIS_SPIN_LOCK TaskLock;
953 MLME_QUEUE Queue; 910 MLME_QUEUE Queue;
954 911
955 UINT ShiftReg; 912 UINT ShiftReg;
956 913
957 RALINK_TIMER_STRUCT PeriodicTimer; 914 RALINK_TIMER_STRUCT PeriodicTimer;
958 RALINK_TIMER_STRUCT APSDPeriodicTimer; 915 RALINK_TIMER_STRUCT APSDPeriodicTimer;
959 RALINK_TIMER_STRUCT LinkDownTimer; 916 RALINK_TIMER_STRUCT LinkDownTimer;
960 RALINK_TIMER_STRUCT LinkUpTimer; 917 RALINK_TIMER_STRUCT LinkUpTimer;
961#ifdef RTMP_MAC_PCI 918#ifdef RTMP_MAC_PCI
962 UCHAR bPsPollTimerRunning; 919 UCHAR bPsPollTimerRunning;
963 RALINK_TIMER_STRUCT PsPollTimer; 920 RALINK_TIMER_STRUCT PsPollTimer;
964 RALINK_TIMER_STRUCT RadioOnOffTimer; 921 RALINK_TIMER_STRUCT RadioOnOffTimer;
965#endif // RTMP_MAC_PCI // 922#endif // RTMP_MAC_PCI //
966 ULONG PeriodicRound; 923 ULONG PeriodicRound;
967 ULONG OneSecPeriodicRound; 924 ULONG OneSecPeriodicRound;
968 925
969 UCHAR RealRxPath; 926 UCHAR RealRxPath;
970 BOOLEAN bLowThroughput; 927 BOOLEAN bLowThroughput;
971 BOOLEAN bEnableAutoAntennaCheck; 928 BOOLEAN bEnableAutoAntennaCheck;
972 RALINK_TIMER_STRUCT RxAntEvalTimer; 929 RALINK_TIMER_STRUCT RxAntEvalTimer;
973 930
974#ifdef RT30xx 931#ifdef RT30xx
975 UCHAR CaliBW40RfR24; 932 UCHAR CaliBW40RfR24;
976 UCHAR CaliBW20RfR24; 933 UCHAR CaliBW20RfR24;
977#endif // RT30xx // 934#endif // RT30xx //
978 935
979#ifdef RTMP_MAC_USB 936#ifdef RTMP_MAC_USB
980 RALINK_TIMER_STRUCT AutoWakeupTimer; 937 RALINK_TIMER_STRUCT AutoWakeupTimer;
981 BOOLEAN AutoWakeupTimerRunning; 938 BOOLEAN AutoWakeupTimerRunning;
982#endif // RTMP_MAC_USB // 939#endif // RTMP_MAC_USB //
983} MLME_STRUCT, *PMLME_STRUCT; 940} MLME_STRUCT, *PMLME_STRUCT;
984 941
985
986/*************************************************************************** 942/***************************************************************************
987 * 802.11 N related data structures 943 * 802.11 N related data structures
988 **************************************************************************/ 944 **************************************************************************/
989struct reordering_mpdu 945struct reordering_mpdu {
990{ 946 struct reordering_mpdu *next;
991 struct reordering_mpdu *next; 947 PNDIS_PACKET pPacket; /* coverted to 802.3 frame */
992 PNDIS_PACKET pPacket; /* coverted to 802.3 frame */ 948 int Sequence; /* sequence number of MPDU */
993 int Sequence; /* sequence number of MPDU */ 949 BOOLEAN bAMSDU;
994 BOOLEAN bAMSDU;
995}; 950};
996 951
997struct reordering_list 952struct reordering_list {
998{
999 struct reordering_mpdu *next; 953 struct reordering_mpdu *next;
1000 int qlen; 954 int qlen;
1001}; 955};
1002 956
1003struct reordering_mpdu_pool 957struct reordering_mpdu_pool {
1004{ 958 PVOID mem;
1005 PVOID mem; 959 NDIS_SPIN_LOCK lock;
1006 NDIS_SPIN_LOCK lock; 960 struct reordering_list freelist;
1007 struct reordering_list freelist;
1008}; 961};
1009 962
1010typedef enum _REC_BLOCKACK_STATUS 963typedef enum _REC_BLOCKACK_STATUS {
1011{ 964 Recipient_NONE = 0,
1012 Recipient_NONE=0,
1013 Recipient_USED, 965 Recipient_USED,
1014 Recipient_HandleRes, 966 Recipient_HandleRes,
1015 Recipient_Accept 967 Recipient_Accept
1016} REC_BLOCKACK_STATUS, *PREC_BLOCKACK_STATUS; 968} REC_BLOCKACK_STATUS, *PREC_BLOCKACK_STATUS;
1017 969
1018typedef enum _ORI_BLOCKACK_STATUS 970typedef enum _ORI_BLOCKACK_STATUS {
1019{ 971 Originator_NONE = 0,
1020 Originator_NONE=0,
1021 Originator_USED, 972 Originator_USED,
1022 Originator_WaitRes, 973 Originator_WaitRes,
1023 Originator_Done 974 Originator_Done
1024} ORI_BLOCKACK_STATUS, *PORI_BLOCKACK_STATUS; 975} ORI_BLOCKACK_STATUS, *PORI_BLOCKACK_STATUS;
1025 976
1026typedef struct _BA_ORI_ENTRY{ 977typedef struct _BA_ORI_ENTRY {
1027 UCHAR Wcid; 978 UCHAR Wcid;
1028 UCHAR TID; 979 UCHAR TID;
1029 UCHAR BAWinSize; 980 UCHAR BAWinSize;
1030 UCHAR Token; 981 UCHAR Token;
1031// Sequence is to fill every outgoing QoS DATA frame's sequence field in 802.11 header. 982// Sequence is to fill every outgoing QoS DATA frame's sequence field in 802.11 header.
1032 USHORT Sequence; 983 USHORT Sequence;
1033 USHORT TimeOutValue; 984 USHORT TimeOutValue;
1034 ORI_BLOCKACK_STATUS ORI_BA_Status; 985 ORI_BLOCKACK_STATUS ORI_BA_Status;
1035 RALINK_TIMER_STRUCT ORIBATimer; 986 RALINK_TIMER_STRUCT ORIBATimer;
1036 PVOID pAdapter; 987 PVOID pAdapter;
1037} BA_ORI_ENTRY, *PBA_ORI_ENTRY; 988} BA_ORI_ENTRY, *PBA_ORI_ENTRY;
1038 989
1039typedef struct _BA_REC_ENTRY { 990typedef struct _BA_REC_ENTRY {
1040 UCHAR Wcid; 991 UCHAR Wcid;
1041 UCHAR TID; 992 UCHAR TID;
1042 UCHAR BAWinSize; // 7.3.1.14. each buffer is capable of holding a max AMSDU or MSDU. 993 UCHAR BAWinSize; // 7.3.1.14. each buffer is capable of holding a max AMSDU or MSDU.
1043 //UCHAR NumOfRxPkt; 994 //UCHAR NumOfRxPkt;
1044 //UCHAR Curindidx; // the head in the RX reordering buffer 995 //UCHAR Curindidx; // the head in the RX reordering buffer
1045 USHORT LastIndSeq; 996 USHORT LastIndSeq;
1046// USHORT LastIndSeqAtTimer; 997// USHORT LastIndSeqAtTimer;
1047 USHORT TimeOutValue; 998 USHORT TimeOutValue;
1048 RALINK_TIMER_STRUCT RECBATimer; 999 RALINK_TIMER_STRUCT RECBATimer;
1049 ULONG LastIndSeqAtTimer; 1000 ULONG LastIndSeqAtTimer;
1050 ULONG nDropPacket; 1001 ULONG nDropPacket;
1051 ULONG rcvSeq; 1002 ULONG rcvSeq;
1052 REC_BLOCKACK_STATUS REC_BA_Status; 1003 REC_BLOCKACK_STATUS REC_BA_Status;
1053// UCHAR RxBufIdxUsed; 1004// UCHAR RxBufIdxUsed;
1054 // corresponding virtual address for RX reordering packet storage. 1005 // corresponding virtual address for RX reordering packet storage.
1055 //RTMP_REORDERDMABUF MAP_RXBuf[MAX_RX_REORDERBUF]; 1006 //RTMP_REORDERDMABUF MAP_RXBuf[MAX_RX_REORDERBUF];
1056 NDIS_SPIN_LOCK RxReRingLock; // Rx Ring spinlock 1007 NDIS_SPIN_LOCK RxReRingLock; // Rx Ring spinlock
1057// struct _BA_REC_ENTRY *pNext; 1008// struct _BA_REC_ENTRY *pNext;
1058 PVOID pAdapter; 1009 PVOID pAdapter;
1059 struct reordering_list list; 1010 struct reordering_list list;
1060} BA_REC_ENTRY, *PBA_REC_ENTRY; 1011} BA_REC_ENTRY, *PBA_REC_ENTRY;
1061 1012
1062
1063typedef struct { 1013typedef struct {
1064 ULONG numAsRecipient; // I am recipient of numAsRecipient clients. These client are in the BARecEntry[] 1014 ULONG numAsRecipient; // I am recipient of numAsRecipient clients. These client are in the BARecEntry[]
1065 ULONG numAsOriginator; // I am originator of numAsOriginator clients. These clients are in the BAOriEntry[] 1015 ULONG numAsOriginator; // I am originator of numAsOriginator clients. These clients are in the BAOriEntry[]
1066 ULONG numDoneOriginator; // count Done Originator sessions 1016 ULONG numDoneOriginator; // count Done Originator sessions
1067 BA_ORI_ENTRY BAOriEntry[MAX_LEN_OF_BA_ORI_TABLE]; 1017 BA_ORI_ENTRY BAOriEntry[MAX_LEN_OF_BA_ORI_TABLE];
1068 BA_REC_ENTRY BARecEntry[MAX_LEN_OF_BA_REC_TABLE]; 1018 BA_REC_ENTRY BARecEntry[MAX_LEN_OF_BA_REC_TABLE];
1069} BA_TABLE, *PBA_TABLE; 1019} BA_TABLE, *PBA_TABLE;
1070 1020
1071//For QureyBATableOID use; 1021//For QureyBATableOID use;
1072typedef struct PACKED _OID_BA_REC_ENTRY{ 1022typedef struct PACKED _OID_BA_REC_ENTRY {
1073 UCHAR MACAddr[MAC_ADDR_LEN]; 1023 UCHAR MACAddr[MAC_ADDR_LEN];
1074 UCHAR BaBitmap; // if (BaBitmap&(1<<TID)), this session with{MACAddr, TID}exists, so read BufSize[TID] for BufferSize 1024 UCHAR BaBitmap; // if (BaBitmap&(1<<TID)), this session with{MACAddr, TID}exists, so read BufSize[TID] for BufferSize
1075 UCHAR rsv; 1025 UCHAR rsv;
1076 UCHAR BufSize[8]; 1026 UCHAR BufSize[8];
1077 REC_BLOCKACK_STATUS REC_BA_Status[8]; 1027 REC_BLOCKACK_STATUS REC_BA_Status[8];
1078} OID_BA_REC_ENTRY, *POID_BA_REC_ENTRY; 1028} OID_BA_REC_ENTRY, *POID_BA_REC_ENTRY;
1079 1029
1080//For QureyBATableOID use; 1030//For QureyBATableOID use;
1081typedef struct PACKED _OID_BA_ORI_ENTRY{ 1031typedef struct PACKED _OID_BA_ORI_ENTRY {
1082 UCHAR MACAddr[MAC_ADDR_LEN]; 1032 UCHAR MACAddr[MAC_ADDR_LEN];
1083 UCHAR BaBitmap; // if (BaBitmap&(1<<TID)), this session with{MACAddr, TID}exists, so read BufSize[TID] for BufferSize, read ORI_BA_Status[TID] for status 1033 UCHAR BaBitmap; // if (BaBitmap&(1<<TID)), this session with{MACAddr, TID}exists, so read BufSize[TID] for BufferSize, read ORI_BA_Status[TID] for status
1084 UCHAR rsv; 1034 UCHAR rsv;
1085 UCHAR BufSize[8]; 1035 UCHAR BufSize[8];
1086 ORI_BLOCKACK_STATUS ORI_BA_Status[8]; 1036 ORI_BLOCKACK_STATUS ORI_BA_Status[8];
1087} OID_BA_ORI_ENTRY, *POID_BA_ORI_ENTRY; 1037} OID_BA_ORI_ENTRY, *POID_BA_ORI_ENTRY;
1088 1038
1089typedef struct _QUERYBA_TABLE{ 1039typedef struct _QUERYBA_TABLE {
1090 OID_BA_ORI_ENTRY BAOriEntry[32]; 1040 OID_BA_ORI_ENTRY BAOriEntry[32];
1091 OID_BA_REC_ENTRY BARecEntry[32]; 1041 OID_BA_REC_ENTRY BARecEntry[32];
1092 UCHAR OriNum;// Number of below BAOriEntry 1042 UCHAR OriNum; // Number of below BAOriEntry
1093 UCHAR RecNum;// Number of below BARecEntry 1043 UCHAR RecNum; // Number of below BARecEntry
1094} QUERYBA_TABLE, *PQUERYBA_TABLE; 1044} QUERYBA_TABLE, *PQUERYBA_TABLE;
1095 1045
1096typedef union _BACAP_STRUC { 1046typedef union _BACAP_STRUC {
1097 struct { 1047 struct {
1098 UINT32 RxBAWinLimit:8; 1048 UINT32 RxBAWinLimit:8;
1099 UINT32 TxBAWinLimit:8; 1049 UINT32 TxBAWinLimit:8;
1100 UINT32 AutoBA:1; // automatically BA 1050 UINT32 AutoBA:1; // automatically BA
1101 UINT32 Policy:2; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use 1051 UINT32 Policy:2; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use
1102 UINT32 MpduDensity:3; 1052 UINT32 MpduDensity:3;
1103 UINT32 AmsduEnable:1; //Enable AMSDU transmisstion 1053 UINT32 AmsduEnable:1; //Enable AMSDU transmisstion
1104 UINT32 AmsduSize:1; // 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935}; 1054 UINT32 AmsduSize:1; // 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935};
1105 UINT32 MMPSmode:2; // MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable 1055 UINT32 MMPSmode:2; // MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable
1106 UINT32 bHtAdhoc:1; // adhoc can use ht rate. 1056 UINT32 bHtAdhoc:1; // adhoc can use ht rate.
1107 UINT32 b2040CoexistScanSup:1; //As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz. 1057 UINT32 b2040CoexistScanSup:1; //As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz.
1108 UINT32 :4; 1058 UINT32:4;
1109 } field; 1059 } field;
1110 UINT32 word; 1060 UINT32 word;
1111} BACAP_STRUC, *PBACAP_STRUC; 1061} BACAP_STRUC, *PBACAP_STRUC;
1112 1062
1113
1114typedef struct { 1063typedef struct {
1115 BOOLEAN IsRecipient; 1064 BOOLEAN IsRecipient;
1116 UCHAR MACAddr[MAC_ADDR_LEN]; 1065 UCHAR MACAddr[MAC_ADDR_LEN];
1117 UCHAR TID; 1066 UCHAR TID;
1118 UCHAR nMSDU; 1067 UCHAR nMSDU;
1119 USHORT TimeOut; 1068 USHORT TimeOut;
1120 BOOLEAN bAllTid; // If True, delete all TID for BA sessions with this MACaddr. 1069 BOOLEAN bAllTid; // If True, delete all TID for BA sessions with this MACaddr.
1121} OID_ADD_BA_ENTRY, *POID_ADD_BA_ENTRY; 1070} OID_ADD_BA_ENTRY, *POID_ADD_BA_ENTRY;
1122 1071
1123
1124
1125#define IS_HT_STA(_pMacEntry) \ 1072#define IS_HT_STA(_pMacEntry) \
1126 (_pMacEntry->MaxHTPhyMode.field.MODE >= MODE_HTMIX) 1073 (_pMacEntry->MaxHTPhyMode.field.MODE >= MODE_HTMIX)
1127 1074
@@ -1131,78 +1078,75 @@ typedef struct {
1131#define PEER_IS_HT_RATE(_pMacEntry) \ 1078#define PEER_IS_HT_RATE(_pMacEntry) \
1132 (_pMacEntry->HTPhyMode.field.MODE >= MODE_HTMIX) 1079 (_pMacEntry->HTPhyMode.field.MODE >= MODE_HTMIX)
1133 1080
1134
1135
1136//This structure is for all 802.11n card InterOptibilityTest action. Reset all Num every n second. (Details see MLMEPeriodic) 1081//This structure is for all 802.11n card InterOptibilityTest action. Reset all Num every n second. (Details see MLMEPeriodic)
1137typedef struct _IOT_STRUC { 1082typedef struct _IOT_STRUC {
1138 UCHAR Threshold[2]; 1083 UCHAR Threshold[2];
1139 UCHAR ReorderTimeOutNum[MAX_LEN_OF_BA_REC_TABLE]; // compare with threshold[0] 1084 UCHAR ReorderTimeOutNum[MAX_LEN_OF_BA_REC_TABLE]; // compare with threshold[0]
1140 UCHAR RefreshNum[MAX_LEN_OF_BA_REC_TABLE]; // compare with threshold[1] 1085 UCHAR RefreshNum[MAX_LEN_OF_BA_REC_TABLE]; // compare with threshold[1]
1141 ULONG OneSecInWindowCount; 1086 ULONG OneSecInWindowCount;
1142 ULONG OneSecFrameDuplicateCount; 1087 ULONG OneSecFrameDuplicateCount;
1143 ULONG OneSecOutWindowCount; 1088 ULONG OneSecOutWindowCount;
1144 UCHAR DelOriAct; 1089 UCHAR DelOriAct;
1145 UCHAR DelRecAct; 1090 UCHAR DelRecAct;
1146 UCHAR RTSShortProt; 1091 UCHAR RTSShortProt;
1147 UCHAR RTSLongProt; 1092 UCHAR RTSLongProt;
1148 BOOLEAN bRTSLongProtOn; 1093 BOOLEAN bRTSLongProtOn;
1149 BOOLEAN bLastAtheros; 1094 BOOLEAN bLastAtheros;
1150 BOOLEAN bCurrentAtheros; 1095 BOOLEAN bCurrentAtheros;
1151 BOOLEAN bNowAtherosBurstOn; 1096 BOOLEAN bNowAtherosBurstOn;
1152 BOOLEAN bNextDisableRxBA; 1097 BOOLEAN bNextDisableRxBA;
1153 BOOLEAN bToggle; 1098 BOOLEAN bToggle;
1154} IOT_STRUC, *PIOT_STRUC; 1099} IOT_STRUC, *PIOT_STRUC;
1155 1100
1156// This is the registry setting for 802.11n transmit setting. Used in advanced page. 1101// This is the registry setting for 802.11n transmit setting. Used in advanced page.
1157typedef union _REG_TRANSMIT_SETTING { 1102typedef union _REG_TRANSMIT_SETTING {
1158 struct { 1103 struct {
1159 //UINT32 PhyMode:4; 1104 //UINT32 PhyMode:4;
1160 //UINT32 MCS:7; // MCS 1105 //UINT32 MCS:7; // MCS
1161 UINT32 rsv0:10; 1106 UINT32 rsv0:10;
1162 UINT32 TxBF:1; 1107 UINT32 TxBF:1;
1163 UINT32 BW:1; //channel bandwidth 20MHz or 40 MHz 1108 UINT32 BW:1; //channel bandwidth 20MHz or 40 MHz
1164 UINT32 ShortGI:1; 1109 UINT32 ShortGI:1;
1165 UINT32 STBC:1; //SPACE 1110 UINT32 STBC:1; //SPACE
1166 UINT32 TRANSNO:2; 1111 UINT32 TRANSNO:2;
1167 UINT32 HTMODE:1; 1112 UINT32 HTMODE:1;
1168 UINT32 EXTCHA:2; 1113 UINT32 EXTCHA:2;
1169 UINT32 rsv:13; 1114 UINT32 rsv:13;
1170 } field; 1115 } field;
1171 UINT32 word; 1116 UINT32 word;
1172} REG_TRANSMIT_SETTING, *PREG_TRANSMIT_SETTING; 1117} REG_TRANSMIT_SETTING, *PREG_TRANSMIT_SETTING;
1173 1118
1174typedef union _DESIRED_TRANSMIT_SETTING { 1119typedef union _DESIRED_TRANSMIT_SETTING {
1175 struct { 1120 struct {
1176 USHORT MCS:7; // MCS 1121 USHORT MCS:7; // MCS
1177 USHORT PhyMode:4; 1122 USHORT PhyMode:4;
1178 USHORT FixedTxMode:2; // If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode. 1123 USHORT FixedTxMode:2; // If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode.
1179 USHORT rsv:3; 1124 USHORT rsv:3;
1180 } field; 1125 } field;
1181 USHORT word; 1126 USHORT word;
1182 } DESIRED_TRANSMIT_SETTING, *PDESIRED_TRANSMIT_SETTING; 1127} DESIRED_TRANSMIT_SETTING, *PDESIRED_TRANSMIT_SETTING;
1183 1128
1184#ifdef RTMP_MAC_USB 1129#ifdef RTMP_MAC_USB
1185/*************************************************************************** 1130/***************************************************************************
1186 * USB-based chip Beacon related data structures 1131 * USB-based chip Beacon related data structures
1187 **************************************************************************/ 1132 **************************************************************************/
1188#define BEACON_BITMAP_MASK 0xff 1133#define BEACON_BITMAP_MASK 0xff
1189typedef struct _BEACON_SYNC_STRUCT_ 1134typedef struct _BEACON_SYNC_STRUCT_ {
1190{ 1135 UCHAR BeaconBuf[HW_BEACON_MAX_COUNT][HW_BEACON_OFFSET];
1191 UCHAR BeaconBuf[HW_BEACON_MAX_COUNT][HW_BEACON_OFFSET]; 1136 UCHAR BeaconTxWI[HW_BEACON_MAX_COUNT][TXWI_SIZE];
1192 UCHAR BeaconTxWI[HW_BEACON_MAX_COUNT][TXWI_SIZE]; 1137 ULONG TimIELocationInBeacon[HW_BEACON_MAX_COUNT];
1193 ULONG TimIELocationInBeacon[HW_BEACON_MAX_COUNT]; 1138 ULONG CapabilityInfoLocationInBeacon[HW_BEACON_MAX_COUNT];
1194 ULONG CapabilityInfoLocationInBeacon[HW_BEACON_MAX_COUNT]; 1139 BOOLEAN EnableBeacon; // trigger to enable beacon transmission.
1195 BOOLEAN EnableBeacon; // trigger to enable beacon transmission. 1140 UCHAR BeaconBitMap; // NOTE: If the MAX_MBSSID_NUM is larger than 8, this parameter need to change.
1196 UCHAR BeaconBitMap; // NOTE: If the MAX_MBSSID_NUM is larger than 8, this parameter need to change. 1141 UCHAR DtimBitOn; // NOTE: If the MAX_MBSSID_NUM is larger than 8, this parameter need to change.
1197 UCHAR DtimBitOn; // NOTE: If the MAX_MBSSID_NUM is larger than 8, this parameter need to change. 1142} BEACON_SYNC_STRUCT;
1198}BEACON_SYNC_STRUCT;
1199#endif // RTMP_MAC_USB // 1143#endif // RTMP_MAC_USB //
1200 1144
1201/*************************************************************************** 1145/***************************************************************************
1202 * Multiple SSID related data structures 1146 * Multiple SSID related data structures
1203 **************************************************************************/ 1147 **************************************************************************/
1204#define WLAN_MAX_NUM_OF_TIM ((MAX_LEN_OF_MAC_TABLE >> 3) + 1) /* /8 + 1 */ 1148#define WLAN_MAX_NUM_OF_TIM ((MAX_LEN_OF_MAC_TABLE >> 3) + 1) /* /8 + 1 */
1205#define WLAN_CT_TIM_BCMC_OFFSET 0 /* unit: 32B */ 1149#define WLAN_CT_TIM_BCMC_OFFSET 0 /* unit: 32B */
1206 1150
1207/* clear bcmc TIM bit */ 1151/* clear bcmc TIM bit */
1208#define WLAN_MR_TIM_BCMC_CLEAR(apidx) \ 1152#define WLAN_MR_TIM_BCMC_CLEAR(apidx) \
@@ -1224,183 +1168,181 @@ typedef struct _BEACON_SYNC_STRUCT_
1224 UCHAR bit_offset = wcid & 0x7; \ 1168 UCHAR bit_offset = wcid & 0x7; \
1225 ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] |= BIT8[bit_offset]; } 1169 ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] |= BIT8[bit_offset]; }
1226 1170
1227
1228// configuration common to OPMODE_AP as well as OPMODE_STA 1171// configuration common to OPMODE_AP as well as OPMODE_STA
1229typedef struct _COMMON_CONFIG { 1172typedef struct _COMMON_CONFIG {
1230 1173
1231 BOOLEAN bCountryFlag; 1174 BOOLEAN bCountryFlag;
1232 UCHAR CountryCode[3]; 1175 UCHAR CountryCode[3];
1233 UCHAR Geography; 1176 UCHAR Geography;
1234 UCHAR CountryRegion; // Enum of country region, 0:FCC, 1:IC, 2:ETSI, 3:SPAIN, 4:France, 5:MKK, 6:MKK1, 7:Israel 1177 UCHAR CountryRegion; // Enum of country region, 0:FCC, 1:IC, 2:ETSI, 3:SPAIN, 4:France, 5:MKK, 6:MKK1, 7:Israel
1235 UCHAR CountryRegionForABand; // Enum of country region for A band 1178 UCHAR CountryRegionForABand; // Enum of country region for A band
1236 UCHAR PhyMode; // PHY_11A, PHY_11B, PHY_11BG_MIXED, PHY_ABG_MIXED 1179 UCHAR PhyMode; // PHY_11A, PHY_11B, PHY_11BG_MIXED, PHY_ABG_MIXED
1237 USHORT Dsifs; // in units of usec 1180 USHORT Dsifs; // in units of usec
1238 ULONG PacketFilter; // Packet filter for receiving 1181 ULONG PacketFilter; // Packet filter for receiving
1239 UINT8 RegulatoryClass; 1182 UINT8 RegulatoryClass;
1240 1183
1241 CHAR Ssid[MAX_LEN_OF_SSID]; // NOT NULL-terminated 1184 CHAR Ssid[MAX_LEN_OF_SSID]; // NOT NULL-terminated
1242 UCHAR SsidLen; // the actual ssid length in used 1185 UCHAR SsidLen; // the actual ssid length in used
1243 UCHAR LastSsidLen; // the actual ssid length in used 1186 UCHAR LastSsidLen; // the actual ssid length in used
1244 CHAR LastSsid[MAX_LEN_OF_SSID]; // NOT NULL-terminated 1187 CHAR LastSsid[MAX_LEN_OF_SSID]; // NOT NULL-terminated
1245 UCHAR LastBssid[MAC_ADDR_LEN]; 1188 UCHAR LastBssid[MAC_ADDR_LEN];
1246 1189
1247 UCHAR Bssid[MAC_ADDR_LEN]; 1190 UCHAR Bssid[MAC_ADDR_LEN];
1248 USHORT BeaconPeriod; 1191 USHORT BeaconPeriod;
1249 UCHAR Channel; 1192 UCHAR Channel;
1250 UCHAR CentralChannel; // Central Channel when using 40MHz is indicating. not real channel. 1193 UCHAR CentralChannel; // Central Channel when using 40MHz is indicating. not real channel.
1251 1194
1252 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES]; 1195 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
1253 UCHAR SupRateLen; 1196 UCHAR SupRateLen;
1254 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES]; 1197 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
1255 UCHAR ExtRateLen; 1198 UCHAR ExtRateLen;
1256 UCHAR DesireRate[MAX_LEN_OF_SUPPORTED_RATES]; // OID_802_11_DESIRED_RATES 1199 UCHAR DesireRate[MAX_LEN_OF_SUPPORTED_RATES]; // OID_802_11_DESIRED_RATES
1257 UCHAR MaxDesiredRate; 1200 UCHAR MaxDesiredRate;
1258 UCHAR ExpectedACKRate[MAX_LEN_OF_SUPPORTED_RATES]; 1201 UCHAR ExpectedACKRate[MAX_LEN_OF_SUPPORTED_RATES];
1259 1202
1260 ULONG BasicRateBitmap; // backup basic ratebitmap 1203 ULONG BasicRateBitmap; // backup basic ratebitmap
1261 1204
1262 BOOLEAN bAPSDCapable; 1205 BOOLEAN bAPSDCapable;
1263 BOOLEAN bInServicePeriod; 1206 BOOLEAN bInServicePeriod;
1264 BOOLEAN bAPSDAC_BE; 1207 BOOLEAN bAPSDAC_BE;
1265 BOOLEAN bAPSDAC_BK; 1208 BOOLEAN bAPSDAC_BK;
1266 BOOLEAN bAPSDAC_VI; 1209 BOOLEAN bAPSDAC_VI;
1267 BOOLEAN bAPSDAC_VO; 1210 BOOLEAN bAPSDAC_VO;
1268 1211
1269 /* because TSPEC can modify the APSD flag, we need to keep the APSD flag 1212 /* because TSPEC can modify the APSD flag, we need to keep the APSD flag
1270 requested in association stage from the station; 1213 requested in association stage from the station;
1271 we need to recover the APSD flag after the TSPEC is deleted. */ 1214 we need to recover the APSD flag after the TSPEC is deleted. */
1272 BOOLEAN bACMAPSDBackup[4]; /* for delivery-enabled & trigger-enabled both */ 1215 BOOLEAN bACMAPSDBackup[4]; /* for delivery-enabled & trigger-enabled both */
1273 BOOLEAN bACMAPSDTr[4]; /* no use */ 1216 BOOLEAN bACMAPSDTr[4]; /* no use */
1274 1217
1275 BOOLEAN bNeedSendTriggerFrame; 1218 BOOLEAN bNeedSendTriggerFrame;
1276 BOOLEAN bAPSDForcePowerSave; // Force power save mode, should only use in APSD-STAUT 1219 BOOLEAN bAPSDForcePowerSave; // Force power save mode, should only use in APSD-STAUT
1277 ULONG TriggerTimerCount; 1220 ULONG TriggerTimerCount;
1278 UCHAR MaxSPLength; 1221 UCHAR MaxSPLength;
1279 UCHAR BBPCurrentBW; // BW_10, BW_20, BW_40 1222 UCHAR BBPCurrentBW; // BW_10, BW_20, BW_40
1280 // move to MULTISSID_STRUCT for MBSS 1223 // move to MULTISSID_STRUCT for MBSS
1281 //HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode;// For transmit phy setting in TXWI. 1224 //HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode;// For transmit phy setting in TXWI.
1282 REG_TRANSMIT_SETTING RegTransmitSetting; //registry transmit setting. this is for reading registry setting only. not useful. 1225 REG_TRANSMIT_SETTING RegTransmitSetting; //registry transmit setting. this is for reading registry setting only. not useful.
1283 //UCHAR FixedTxMode; // Fixed Tx Mode (CCK, OFDM), for HT fixed tx mode (GF, MIX) , refer to RegTransmitSetting.field.HTMode 1226 //UCHAR FixedTxMode; // Fixed Tx Mode (CCK, OFDM), for HT fixed tx mode (GF, MIX) , refer to RegTransmitSetting.field.HTMode
1284 UCHAR TxRate; // Same value to fill in TXD. TxRate is 6-bit 1227 UCHAR TxRate; // Same value to fill in TXD. TxRate is 6-bit
1285 UCHAR MaxTxRate; // RATE_1, RATE_2, RATE_5_5, RATE_11 1228 UCHAR MaxTxRate; // RATE_1, RATE_2, RATE_5_5, RATE_11
1286 UCHAR TxRateIndex; // Tx rate index in RateSwitchTable 1229 UCHAR TxRateIndex; // Tx rate index in RateSwitchTable
1287 UCHAR TxRateTableSize; // Valid Tx rate table size in RateSwitchTable 1230 UCHAR TxRateTableSize; // Valid Tx rate table size in RateSwitchTable
1288 //BOOLEAN bAutoTxRateSwitch; 1231 //BOOLEAN bAutoTxRateSwitch;
1289 UCHAR MinTxRate; // RATE_1, RATE_2, RATE_5_5, RATE_11 1232 UCHAR MinTxRate; // RATE_1, RATE_2, RATE_5_5, RATE_11
1290 UCHAR RtsRate; // RATE_xxx 1233 UCHAR RtsRate; // RATE_xxx
1291 HTTRANSMIT_SETTING MlmeTransmit; // MGMT frame PHY rate setting when operatin at Ht rate. 1234 HTTRANSMIT_SETTING MlmeTransmit; // MGMT frame PHY rate setting when operatin at Ht rate.
1292 UCHAR MlmeRate; // RATE_xxx, used to send MLME frames 1235 UCHAR MlmeRate; // RATE_xxx, used to send MLME frames
1293 UCHAR BasicMlmeRate; // Default Rate for sending MLME frames 1236 UCHAR BasicMlmeRate; // Default Rate for sending MLME frames
1294 1237
1295 USHORT RtsThreshold; // in unit of BYTE 1238 USHORT RtsThreshold; // in unit of BYTE
1296 USHORT FragmentThreshold; // in unit of BYTE 1239 USHORT FragmentThreshold; // in unit of BYTE
1297 1240
1298 UCHAR TxPower; // in unit of mW 1241 UCHAR TxPower; // in unit of mW
1299 ULONG TxPowerPercentage; // 0~100 % 1242 ULONG TxPowerPercentage; // 0~100 %
1300 ULONG TxPowerDefault; // keep for TxPowerPercentage 1243 ULONG TxPowerDefault; // keep for TxPowerPercentage
1301 UINT8 PwrConstraint; 1244 UINT8 PwrConstraint;
1302 1245
1303 BACAP_STRUC BACapability; // NO USE = 0XFF ; IMMED_BA =1 ; DELAY_BA=0 1246 BACAP_STRUC BACapability; // NO USE = 0XFF ; IMMED_BA =1 ; DELAY_BA=0
1304 BACAP_STRUC REGBACapability; // NO USE = 0XFF ; IMMED_BA =1 ; DELAY_BA=0 1247 BACAP_STRUC REGBACapability; // NO USE = 0XFF ; IMMED_BA =1 ; DELAY_BA=0
1305 1248
1306 IOT_STRUC IOTestParm; // 802.11n InterOpbility Test Parameter; 1249 IOT_STRUC IOTestParm; // 802.11n InterOpbility Test Parameter;
1307 ULONG TxPreamble; // Rt802_11PreambleLong, Rt802_11PreambleShort, Rt802_11PreambleAuto 1250 ULONG TxPreamble; // Rt802_11PreambleLong, Rt802_11PreambleShort, Rt802_11PreambleAuto
1308 BOOLEAN bUseZeroToDisableFragment; // Microsoft use 0 as disable 1251 BOOLEAN bUseZeroToDisableFragment; // Microsoft use 0 as disable
1309 ULONG UseBGProtection; // 0: auto, 1: always use, 2: always not use 1252 ULONG UseBGProtection; // 0: auto, 1: always use, 2: always not use
1310 BOOLEAN bUseShortSlotTime; // 0: disable, 1 - use short slot (9us) 1253 BOOLEAN bUseShortSlotTime; // 0: disable, 1 - use short slot (9us)
1311 BOOLEAN bEnableTxBurst; // 1: enble TX PACKET BURST (when BA is established or AP is not a legacy WMM AP), 0: disable TX PACKET BURST 1254 BOOLEAN bEnableTxBurst; // 1: enble TX PACKET BURST (when BA is established or AP is not a legacy WMM AP), 0: disable TX PACKET BURST
1312 BOOLEAN bAggregationCapable; // 1: enable TX aggregation when the peer supports it 1255 BOOLEAN bAggregationCapable; // 1: enable TX aggregation when the peer supports it
1313 BOOLEAN bPiggyBackCapable; // 1: enable TX piggy-back according MAC's version 1256 BOOLEAN bPiggyBackCapable; // 1: enable TX piggy-back according MAC's version
1314 BOOLEAN bIEEE80211H; // 1: enable IEEE802.11h spec. 1257 BOOLEAN bIEEE80211H; // 1: enable IEEE802.11h spec.
1315 ULONG DisableOLBCDetect; // 0: enable OLBC detect; 1 disable OLBC detect 1258 ULONG DisableOLBCDetect; // 0: enable OLBC detect; 1 disable OLBC detect
1316 1259
1317 BOOLEAN bRdg; 1260 BOOLEAN bRdg;
1318 1261
1319 BOOLEAN bWmmCapable; // 0:disable WMM, 1:enable WMM 1262 BOOLEAN bWmmCapable; // 0:disable WMM, 1:enable WMM
1320 QOS_CAPABILITY_PARM APQosCapability; // QOS capability of the current associated AP 1263 QOS_CAPABILITY_PARM APQosCapability; // QOS capability of the current associated AP
1321 EDCA_PARM APEdcaParm; // EDCA parameters of the current associated AP 1264 EDCA_PARM APEdcaParm; // EDCA parameters of the current associated AP
1322 QBSS_LOAD_PARM APQbssLoad; // QBSS load of the current associated AP 1265 QBSS_LOAD_PARM APQbssLoad; // QBSS load of the current associated AP
1323 UCHAR AckPolicy[4]; // ACK policy of the specified AC. see ACK_xxx 1266 UCHAR AckPolicy[4]; // ACK policy of the specified AC. see ACK_xxx
1324 BOOLEAN bDLSCapable; // 0:disable DLS, 1:enable DLS 1267 BOOLEAN bDLSCapable; // 0:disable DLS, 1:enable DLS
1325 // a bitmap of BOOLEAN flags. each bit represent an operation status of a particular 1268 // a bitmap of BOOLEAN flags. each bit represent an operation status of a particular
1326 // BOOLEAN control, either ON or OFF. These flags should always be accessed via 1269 // BOOLEAN control, either ON or OFF. These flags should always be accessed via
1327 // OPSTATUS_TEST_FLAG(), OPSTATUS_SET_FLAG(), OP_STATUS_CLEAR_FLAG() macros. 1270 // OPSTATUS_TEST_FLAG(), OPSTATUS_SET_FLAG(), OP_STATUS_CLEAR_FLAG() macros.
1328 // see fOP_STATUS_xxx in RTMP_DEF.C for detail bit definition 1271 // see fOP_STATUS_xxx in RTMP_DEF.C for detail bit definition
1329 ULONG OpStatusFlags; 1272 ULONG OpStatusFlags;
1330 1273
1331 BOOLEAN NdisRadioStateOff; //For HCT 12.0, set this flag to TRUE instead of called MlmeRadioOff. 1274 BOOLEAN NdisRadioStateOff; //For HCT 12.0, set this flag to TRUE instead of called MlmeRadioOff.
1332 ABGBAND_STATE BandState; // For setting BBP used on B/G or A mode. 1275 ABGBAND_STATE BandState; // For setting BBP used on B/G or A mode.
1333 1276
1334 // IEEE802.11H--DFS. 1277 // IEEE802.11H--DFS.
1335 RADAR_DETECT_STRUCT RadarDetect; 1278 RADAR_DETECT_STRUCT RadarDetect;
1336 1279
1337 // HT 1280 // HT
1338 UCHAR BASize; // USer desired BAWindowSize. Should not exceed our max capability 1281 UCHAR BASize; // USer desired BAWindowSize. Should not exceed our max capability
1339 //RT_HT_CAPABILITY SupportedHtPhy; 1282 //RT_HT_CAPABILITY SupportedHtPhy;
1340 RT_HT_CAPABILITY DesiredHtPhy; 1283 RT_HT_CAPABILITY DesiredHtPhy;
1341 HT_CAPABILITY_IE HtCapability; 1284 HT_CAPABILITY_IE HtCapability;
1342 ADD_HT_INFO_IE AddHTInfo; // Useful as AP. 1285 ADD_HT_INFO_IE AddHTInfo; // Useful as AP.
1343 //This IE is used with channel switch announcement element when changing to a new 40MHz. 1286 //This IE is used with channel switch announcement element when changing to a new 40MHz.
1344 //This IE is included in channel switch ammouncement frames 7.4.1.5, beacons, probe Rsp. 1287 //This IE is included in channel switch ammouncement frames 7.4.1.5, beacons, probe Rsp.
1345 NEW_EXT_CHAN_IE NewExtChanOffset; //7.3.2.20A, 1 if extension channel is above the control channel, 3 if below, 0 if not present 1288 NEW_EXT_CHAN_IE NewExtChanOffset; //7.3.2.20A, 1 if extension channel is above the control channel, 3 if below, 0 if not present
1346 1289
1347 BOOLEAN bHTProtect; 1290 BOOLEAN bHTProtect;
1348 BOOLEAN bMIMOPSEnable; 1291 BOOLEAN bMIMOPSEnable;
1349 BOOLEAN bBADecline; 1292 BOOLEAN bBADecline;
1350//2008/11/05: KH add to support Antenna power-saving of AP<-- 1293//2008/11/05: KH add to support Antenna power-saving of AP<--
1351 BOOLEAN bGreenAPEnable; 1294 BOOLEAN bGreenAPEnable;
1352//2008/11/05: KH add to support Antenna power-saving of AP--> 1295//2008/11/05: KH add to support Antenna power-saving of AP-->
1353 BOOLEAN bDisableReordering; 1296 BOOLEAN bDisableReordering;
1354 BOOLEAN bForty_Mhz_Intolerant; 1297 BOOLEAN bForty_Mhz_Intolerant;
1355 BOOLEAN bExtChannelSwitchAnnouncement; 1298 BOOLEAN bExtChannelSwitchAnnouncement;
1356 BOOLEAN bRcvBSSWidthTriggerEvents; 1299 BOOLEAN bRcvBSSWidthTriggerEvents;
1357 ULONG LastRcvBSSWidthTriggerEventsTime; 1300 ULONG LastRcvBSSWidthTriggerEventsTime;
1358 1301
1359 UCHAR TxBASize; 1302 UCHAR TxBASize;
1360 1303
1361 // Enable wireless event 1304 // Enable wireless event
1362 BOOLEAN bWirelessEvent; 1305 BOOLEAN bWirelessEvent;
1363 BOOLEAN bWiFiTest; // Enable this parameter for WiFi test 1306 BOOLEAN bWiFiTest; // Enable this parameter for WiFi test
1364 1307
1365 // Tx & Rx Stream number selection 1308 // Tx & Rx Stream number selection
1366 UCHAR TxStream; 1309 UCHAR TxStream;
1367 UCHAR RxStream; 1310 UCHAR RxStream;
1368 1311
1369 BOOLEAN bHardwareRadio; // Hardware controlled Radio enabled 1312 BOOLEAN bHardwareRadio; // Hardware controlled Radio enabled
1370 1313
1371#ifdef RTMP_MAC_USB 1314#ifdef RTMP_MAC_USB
1372 BOOLEAN bMultipleIRP; // Multiple Bulk IN flag 1315 BOOLEAN bMultipleIRP; // Multiple Bulk IN flag
1373 UCHAR NumOfBulkInIRP; // if bMultipleIRP == TRUE, NumOfBulkInIRP will be 4 otherwise be 1 1316 UCHAR NumOfBulkInIRP; // if bMultipleIRP == TRUE, NumOfBulkInIRP will be 4 otherwise be 1
1374 RT_HT_CAPABILITY SupportedHtPhy; 1317 RT_HT_CAPABILITY SupportedHtPhy;
1375 ULONG MaxPktOneTxBulk; 1318 ULONG MaxPktOneTxBulk;
1376 UCHAR TxBulkFactor; 1319 UCHAR TxBulkFactor;
1377 UCHAR RxBulkFactor; 1320 UCHAR RxBulkFactor;
1378 1321
1379 BOOLEAN IsUpdateBeacon; 1322 BOOLEAN IsUpdateBeacon;
1380 BEACON_SYNC_STRUCT *pBeaconSync; 1323 BEACON_SYNC_STRUCT *pBeaconSync;
1381 RALINK_TIMER_STRUCT BeaconUpdateTimer; 1324 RALINK_TIMER_STRUCT BeaconUpdateTimer;
1382 UINT32 BeaconAdjust; 1325 UINT32 BeaconAdjust;
1383 UINT32 BeaconFactor; 1326 UINT32 BeaconFactor;
1384 UINT32 BeaconRemain; 1327 UINT32 BeaconRemain;
1385#endif // RTMP_MAC_USB // 1328#endif // RTMP_MAC_USB //
1386 1329
1387 NDIS_SPIN_LOCK MeasureReqTabLock; 1330 NDIS_SPIN_LOCK MeasureReqTabLock;
1388 PMEASURE_REQ_TAB pMeasureReqTab; 1331 PMEASURE_REQ_TAB pMeasureReqTab;
1389 1332
1390 NDIS_SPIN_LOCK TpcReqTabLock; 1333 NDIS_SPIN_LOCK TpcReqTabLock;
1391 PTPC_REQ_TAB pTpcReqTab; 1334 PTPC_REQ_TAB pTpcReqTab;
1392 1335
1393 BOOLEAN PSPXlink; // 0: Disable. 1: Enable 1336 BOOLEAN PSPXlink; // 0: Disable. 1: Enable
1394 1337
1395#if defined(RT305x)||defined(RT30xx) 1338#if defined(RT305x)||defined(RT30xx)
1396 // request by Gary, for High Power issue 1339 // request by Gary, for High Power issue
1397 UCHAR HighPowerPatchDisabled; 1340 UCHAR HighPowerPatchDisabled;
1398#endif 1341#endif
1399 1342
1400 BOOLEAN HT_DisallowTKIP; /* Restrict the encryption type in 11n HT mode */ 1343 BOOLEAN HT_DisallowTKIP; /* Restrict the encryption type in 11n HT mode */
1401} COMMON_CONFIG, *PCOMMON_CONFIG; 1344} COMMON_CONFIG, *PCOMMON_CONFIG;
1402 1345
1403
1404/* Modified by Wu Xi-Kun 4/21/2006 */ 1346/* Modified by Wu Xi-Kun 4/21/2006 */
1405// STA configuration and status 1347// STA configuration and status
1406typedef struct _STA_ADMIN_CONFIG { 1348typedef struct _STA_ADMIN_CONFIG {
@@ -1410,165 +1352,161 @@ typedef struct _STA_ADMIN_CONFIG {
1410 // settings in ACTIVE BSS after negotiation/compromize with the BSS holder (either 1352 // settings in ACTIVE BSS after negotiation/compromize with the BSS holder (either
1411 // AP or IBSS holder). 1353 // AP or IBSS holder).
1412 // Once initialized, user configuration can only be changed via OID_xxx 1354 // Once initialized, user configuration can only be changed via OID_xxx
1413 UCHAR BssType; // BSS_INFRA or BSS_ADHOC 1355 UCHAR BssType; // BSS_INFRA or BSS_ADHOC
1414 USHORT AtimWin; // used when starting a new IBSS 1356 USHORT AtimWin; // used when starting a new IBSS
1415 1357
1416 // GROUP 2 - 1358 // GROUP 2 -
1417 // User configuration loaded from Registry, E2PROM or OID_xxx. These settings describe 1359 // User configuration loaded from Registry, E2PROM or OID_xxx. These settings describe
1418 // the user intended configuration, and should be always applied to the final 1360 // the user intended configuration, and should be always applied to the final
1419 // settings in ACTIVE BSS without compromising with the BSS holder. 1361 // settings in ACTIVE BSS without compromising with the BSS holder.
1420 // Once initialized, user configuration can only be changed via OID_xxx 1362 // Once initialized, user configuration can only be changed via OID_xxx
1421 UCHAR RssiTrigger; 1363 UCHAR RssiTrigger;
1422 UCHAR RssiTriggerMode; // RSSI_TRIGGERED_UPON_BELOW_THRESHOLD or RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD 1364 UCHAR RssiTriggerMode; // RSSI_TRIGGERED_UPON_BELOW_THRESHOLD or RSSI_TRIGGERED_UPON_EXCCEED_THRESHOLD
1423 USHORT DefaultListenCount; // default listen count; 1365 USHORT DefaultListenCount; // default listen count;
1424 ULONG WindowsPowerMode; // Power mode for AC power 1366 ULONG WindowsPowerMode; // Power mode for AC power
1425 ULONG WindowsBatteryPowerMode; // Power mode for battery if exists 1367 ULONG WindowsBatteryPowerMode; // Power mode for battery if exists
1426 BOOLEAN bWindowsACCAMEnable; // Enable CAM power mode when AC on 1368 BOOLEAN bWindowsACCAMEnable; // Enable CAM power mode when AC on
1427 BOOLEAN bAutoReconnect; // Set to TRUE when setting OID_802_11_SSID with no matching BSSID 1369 BOOLEAN bAutoReconnect; // Set to TRUE when setting OID_802_11_SSID with no matching BSSID
1428 ULONG WindowsPowerProfile; // Windows power profile, for NDIS5.1 PnP 1370 ULONG WindowsPowerProfile; // Windows power profile, for NDIS5.1 PnP
1429 1371
1430 // MIB:ieee802dot11.dot11smt(1).dot11StationConfigTable(1) 1372 // MIB:ieee802dot11.dot11smt(1).dot11StationConfigTable(1)
1431 USHORT Psm; // power management mode (PWR_ACTIVE|PWR_SAVE) 1373 USHORT Psm; // power management mode (PWR_ACTIVE|PWR_SAVE)
1432 USHORT DisassocReason; 1374 USHORT DisassocReason;
1433 UCHAR DisassocSta[MAC_ADDR_LEN]; 1375 UCHAR DisassocSta[MAC_ADDR_LEN];
1434 USHORT DeauthReason; 1376 USHORT DeauthReason;
1435 UCHAR DeauthSta[MAC_ADDR_LEN]; 1377 UCHAR DeauthSta[MAC_ADDR_LEN];
1436 USHORT AuthFailReason; 1378 USHORT AuthFailReason;
1437 UCHAR AuthFailSta[MAC_ADDR_LEN]; 1379 UCHAR AuthFailSta[MAC_ADDR_LEN];
1438 1380
1439 NDIS_802_11_PRIVACY_FILTER PrivacyFilter; // PrivacyFilter enum for 802.1X 1381 NDIS_802_11_PRIVACY_FILTER PrivacyFilter; // PrivacyFilter enum for 802.1X
1440 NDIS_802_11_AUTHENTICATION_MODE AuthMode; // This should match to whatever microsoft defined 1382 NDIS_802_11_AUTHENTICATION_MODE AuthMode; // This should match to whatever microsoft defined
1441 NDIS_802_11_WEP_STATUS WepStatus; 1383 NDIS_802_11_WEP_STATUS WepStatus;
1442 NDIS_802_11_WEP_STATUS OrigWepStatus; // Original wep status set from OID 1384 NDIS_802_11_WEP_STATUS OrigWepStatus; // Original wep status set from OID
1443 1385
1444 // Add to support different cipher suite for WPA2/WPA mode 1386 // Add to support different cipher suite for WPA2/WPA mode
1445 NDIS_802_11_ENCRYPTION_STATUS GroupCipher; // Multicast cipher suite 1387 NDIS_802_11_ENCRYPTION_STATUS GroupCipher; // Multicast cipher suite
1446 NDIS_802_11_ENCRYPTION_STATUS PairCipher; // Unicast cipher suite 1388 NDIS_802_11_ENCRYPTION_STATUS PairCipher; // Unicast cipher suite
1447 BOOLEAN bMixCipher; // Indicate current Pair & Group use different cipher suites 1389 BOOLEAN bMixCipher; // Indicate current Pair & Group use different cipher suites
1448 USHORT RsnCapability; 1390 USHORT RsnCapability;
1449 1391
1450 NDIS_802_11_WEP_STATUS GroupKeyWepStatus; 1392 NDIS_802_11_WEP_STATUS GroupKeyWepStatus;
1451 1393
1452 UCHAR WpaPassPhrase[64]; // WPA PSK pass phrase 1394 UCHAR WpaPassPhrase[64]; // WPA PSK pass phrase
1453 UINT WpaPassPhraseLen; // the length of WPA PSK pass phrase 1395 UINT WpaPassPhraseLen; // the length of WPA PSK pass phrase
1454 UCHAR PMK[32]; // WPA PSK mode PMK 1396 UCHAR PMK[32]; // WPA PSK mode PMK
1455 UCHAR PTK[64]; // WPA PSK mode PTK 1397 UCHAR PTK[64]; // WPA PSK mode PTK
1456 UCHAR GTK[32]; // GTK from authenticator 1398 UCHAR GTK[32]; // GTK from authenticator
1457 BSSID_INFO SavedPMK[PMKID_NO]; 1399 BSSID_INFO SavedPMK[PMKID_NO];
1458 UINT SavedPMKNum; // Saved PMKID number 1400 UINT SavedPMKNum; // Saved PMKID number
1459
1460 UCHAR DefaultKeyId;
1461 1401
1402 UCHAR DefaultKeyId;
1462 1403
1463 // WPA 802.1x port control, WPA_802_1X_PORT_SECURED, WPA_802_1X_PORT_NOT_SECURED 1404 // WPA 802.1x port control, WPA_802_1X_PORT_SECURED, WPA_802_1X_PORT_NOT_SECURED
1464 UCHAR PortSecured; 1405 UCHAR PortSecured;
1465 1406
1466 // For WPA countermeasures 1407 // For WPA countermeasures
1467 ULONG LastMicErrorTime; // record last MIC error time 1408 ULONG LastMicErrorTime; // record last MIC error time
1468 ULONG MicErrCnt; // Should be 0, 1, 2, then reset to zero (after disassoiciation). 1409 ULONG MicErrCnt; // Should be 0, 1, 2, then reset to zero (after disassoiciation).
1469 BOOLEAN bBlockAssoc; // Block associate attempt for 60 seconds after counter measure occurred. 1410 BOOLEAN bBlockAssoc; // Block associate attempt for 60 seconds after counter measure occurred.
1470 // For WPA-PSK supplicant state 1411 // For WPA-PSK supplicant state
1471 WPA_STATE WpaState; // Default is SS_NOTUSE and handled by microsoft 802.1x 1412 WPA_STATE WpaState; // Default is SS_NOTUSE and handled by microsoft 802.1x
1472 UCHAR ReplayCounter[8]; 1413 UCHAR ReplayCounter[8];
1473 UCHAR ANonce[32]; // ANonce for WPA-PSK from aurhenticator 1414 UCHAR ANonce[32]; // ANonce for WPA-PSK from aurhenticator
1474 UCHAR SNonce[32]; // SNonce for WPA-PSK 1415 UCHAR SNonce[32]; // SNonce for WPA-PSK
1475 1416
1476 UCHAR LastSNR0; // last received BEACON's SNR 1417 UCHAR LastSNR0; // last received BEACON's SNR
1477 UCHAR LastSNR1; // last received BEACON's SNR for 2nd antenna 1418 UCHAR LastSNR1; // last received BEACON's SNR for 2nd antenna
1478 RSSI_SAMPLE RssiSample; 1419 RSSI_SAMPLE RssiSample;
1479 ULONG NumOfAvgRssiSample; 1420 ULONG NumOfAvgRssiSample;
1480 1421
1481 ULONG LastBeaconRxTime; // OS's timestamp of the last BEACON RX time 1422 ULONG LastBeaconRxTime; // OS's timestamp of the last BEACON RX time
1482 ULONG Last11bBeaconRxTime; // OS's timestamp of the last 11B BEACON RX time 1423 ULONG Last11bBeaconRxTime; // OS's timestamp of the last 11B BEACON RX time
1483 ULONG Last11gBeaconRxTime; // OS's timestamp of the last 11G BEACON RX time 1424 ULONG Last11gBeaconRxTime; // OS's timestamp of the last 11G BEACON RX time
1484 ULONG Last20NBeaconRxTime; // OS's timestamp of the last 20MHz N BEACON RX time 1425 ULONG Last20NBeaconRxTime; // OS's timestamp of the last 20MHz N BEACON RX time
1485 1426
1486 ULONG LastScanTime; // Record last scan time for issue BSSID_SCAN_LIST 1427 ULONG LastScanTime; // Record last scan time for issue BSSID_SCAN_LIST
1487 ULONG ScanCnt; // Scan counts since most recent SSID, BSSID, SCAN OID request 1428 ULONG ScanCnt; // Scan counts since most recent SSID, BSSID, SCAN OID request
1488 BOOLEAN bSwRadio; // Software controlled Radio On/Off, TRUE: On 1429 BOOLEAN bSwRadio; // Software controlled Radio On/Off, TRUE: On
1489 BOOLEAN bHwRadio; // Hardware controlled Radio On/Off, TRUE: On 1430 BOOLEAN bHwRadio; // Hardware controlled Radio On/Off, TRUE: On
1490 BOOLEAN bRadio; // Radio state, And of Sw & Hw radio state 1431 BOOLEAN bRadio; // Radio state, And of Sw & Hw radio state
1491 BOOLEAN bHardwareRadio; // Hardware controlled Radio enabled 1432 BOOLEAN bHardwareRadio; // Hardware controlled Radio enabled
1492 BOOLEAN bShowHiddenSSID; // Show all known SSID in SSID list get operation 1433 BOOLEAN bShowHiddenSSID; // Show all known SSID in SSID list get operation
1493 1434
1494 // New for WPA, windows want us to keep association information and 1435 // New for WPA, windows want us to keep association information and
1495 // Fixed IEs from last association response 1436 // Fixed IEs from last association response
1496 NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo; 1437 NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo;
1497 USHORT ReqVarIELen; // Length of next VIE include EID & Length 1438 USHORT ReqVarIELen; // Length of next VIE include EID & Length
1498 UCHAR ReqVarIEs[MAX_VIE_LEN]; // The content saved here should be little-endian format. 1439 UCHAR ReqVarIEs[MAX_VIE_LEN]; // The content saved here should be little-endian format.
1499 USHORT ResVarIELen; // Length of next VIE include EID & Length 1440 USHORT ResVarIELen; // Length of next VIE include EID & Length
1500 UCHAR ResVarIEs[MAX_VIE_LEN]; 1441 UCHAR ResVarIEs[MAX_VIE_LEN];
1501 1442
1502 UCHAR RSNIE_Len; 1443 UCHAR RSNIE_Len;
1503 UCHAR RSN_IE[MAX_LEN_OF_RSNIE]; // The content saved here should be little-endian format. 1444 UCHAR RSN_IE[MAX_LEN_OF_RSNIE]; // The content saved here should be little-endian format.
1504 1445
1505 ULONG CLBusyBytes; // Save the total bytes received durning channel load scan time 1446 ULONG CLBusyBytes; // Save the total bytes received durning channel load scan time
1506 USHORT RPIDensity[8]; // Array for RPI density collection 1447 USHORT RPIDensity[8]; // Array for RPI density collection
1507 1448
1508 UCHAR RMReqCnt; // Number of measurement request saved. 1449 UCHAR RMReqCnt; // Number of measurement request saved.
1509 UCHAR CurrentRMReqIdx; // Number of measurement request saved. 1450 UCHAR CurrentRMReqIdx; // Number of measurement request saved.
1510 BOOLEAN ParallelReq; // Parallel measurement, only one request performed, 1451 BOOLEAN ParallelReq; // Parallel measurement, only one request performed,
1511 // It must be the same channel with maximum duration 1452 // It must be the same channel with maximum duration
1512 USHORT ParallelDuration; // Maximum duration for parallel measurement 1453 USHORT ParallelDuration; // Maximum duration for parallel measurement
1513 UCHAR ParallelChannel; // Only one channel with parallel measurement 1454 UCHAR ParallelChannel; // Only one channel with parallel measurement
1514 USHORT IAPPToken; // IAPP dialog token 1455 USHORT IAPPToken; // IAPP dialog token
1515 // Hack for channel load and noise histogram parameters 1456 // Hack for channel load and noise histogram parameters
1516 UCHAR NHFactor; // Parameter for Noise histogram 1457 UCHAR NHFactor; // Parameter for Noise histogram
1517 UCHAR CLFactor; // Parameter for channel load 1458 UCHAR CLFactor; // Parameter for channel load
1518 1459
1519 RALINK_TIMER_STRUCT StaQuickResponeForRateUpTimer; 1460 RALINK_TIMER_STRUCT StaQuickResponeForRateUpTimer;
1520 BOOLEAN StaQuickResponeForRateUpTimerRunning; 1461 BOOLEAN StaQuickResponeForRateUpTimerRunning;
1521 1462
1522 UCHAR DtimCount; // 0.. DtimPeriod-1 1463 UCHAR DtimCount; // 0.. DtimPeriod-1
1523 UCHAR DtimPeriod; // default = 3 1464 UCHAR DtimPeriod; // default = 3
1524 1465
1525 //////////////////////////////////////////////////////////////////////////////////////// 1466 ////////////////////////////////////////////////////////////////////////////////////////
1526 // This is only for WHQL test. 1467 // This is only for WHQL test.
1527 BOOLEAN WhqlTest; 1468 BOOLEAN WhqlTest;
1528 //////////////////////////////////////////////////////////////////////////////////////// 1469 ////////////////////////////////////////////////////////////////////////////////////////
1529 1470
1530 RALINK_TIMER_STRUCT WpaDisassocAndBlockAssocTimer; 1471 RALINK_TIMER_STRUCT WpaDisassocAndBlockAssocTimer;
1531 // Fast Roaming 1472 // Fast Roaming
1532 BOOLEAN bAutoRoaming; // 0:disable auto roaming by RSSI, 1:enable auto roaming by RSSI 1473 BOOLEAN bAutoRoaming; // 0:disable auto roaming by RSSI, 1:enable auto roaming by RSSI
1533 CHAR dBmToRoam; // the condition to roam when receiving Rssi less than this value. It's negative value. 1474 CHAR dBmToRoam; // the condition to roam when receiving Rssi less than this value. It's negative value.
1534 1475
1535 BOOLEAN IEEE8021X; 1476 BOOLEAN IEEE8021X;
1536 BOOLEAN IEEE8021x_required_keys; 1477 BOOLEAN IEEE8021x_required_keys;
1537 CIPHER_KEY DesireSharedKey[4]; // Record user desired WEP keys 1478 CIPHER_KEY DesireSharedKey[4]; // Record user desired WEP keys
1538 UCHAR DesireSharedKeyId; 1479 UCHAR DesireSharedKeyId;
1539 1480
1540 // 0: driver ignores wpa_supplicant 1481 // 0: driver ignores wpa_supplicant
1541 // 1: wpa_supplicant initiates scanning and AP selection 1482 // 1: wpa_supplicant initiates scanning and AP selection
1542 // 2: driver takes care of scanning, AP selection, and IEEE 802.11 association parameters 1483 // 2: driver takes care of scanning, AP selection, and IEEE 802.11 association parameters
1543 UCHAR WpaSupplicantUP; 1484 UCHAR WpaSupplicantUP;
1544 UCHAR WpaSupplicantScanCount; 1485 UCHAR WpaSupplicantScanCount;
1545 BOOLEAN bRSN_IE_FromWpaSupplicant; 1486 BOOLEAN bRSN_IE_FromWpaSupplicant;
1546 1487
1547 CHAR dev_name[16]; 1488 CHAR dev_name[16];
1548 USHORT OriDevType; 1489 USHORT OriDevType;
1549 1490
1550 BOOLEAN bTGnWifiTest; 1491 BOOLEAN bTGnWifiTest;
1551 BOOLEAN bScanReqIsFromWebUI; 1492 BOOLEAN bScanReqIsFromWebUI;
1552 1493
1553 HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode;// For transmit phy setting in TXWI. 1494 HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode; // For transmit phy setting in TXWI.
1554 DESIRED_TRANSMIT_SETTING DesiredTransmitSetting; 1495 DESIRED_TRANSMIT_SETTING DesiredTransmitSetting;
1555 RT_HT_PHY_INFO DesiredHtPhyInfo; 1496 RT_HT_PHY_INFO DesiredHtPhyInfo;
1556 BOOLEAN bAutoTxRateSwitch; 1497 BOOLEAN bAutoTxRateSwitch;
1557 1498
1558#ifdef RTMP_MAC_PCI 1499#ifdef RTMP_MAC_PCI
1559 UCHAR BBPR3; 1500 UCHAR BBPR3;
1560 // PS Control has 2 meanings for advanced power save function. 1501 // PS Control has 2 meanings for advanced power save function.
1561 // 1. EnablePSinIdle : When no connection, always radio off except need to do site survey. 1502 // 1. EnablePSinIdle : When no connection, always radio off except need to do site survey.
1562 // 2. EnableNewPS : will save more current in sleep or radio off mode. 1503 // 2. EnableNewPS : will save more current in sleep or radio off mode.
1563 PS_CONTROL PSControl; 1504 PS_CONTROL PSControl;
1564#endif // RTMP_MAC_PCI // 1505#endif // RTMP_MAC_PCI //
1565
1566
1567 1506
1568 1507 BOOLEAN bAutoConnectByBssid;
1569 BOOLEAN bAutoConnectByBssid; 1508 ULONG BeaconLostTime; // seconds
1570 ULONG BeaconLostTime; // seconds 1509 BOOLEAN bForceTxBurst; // 1: force enble TX PACKET BURST, 0: disable
1571 BOOLEAN bForceTxBurst; // 1: force enble TX PACKET BURST, 0: disable
1572} STA_ADMIN_CONFIG, *PSTA_ADMIN_CONFIG; 1510} STA_ADMIN_CONFIG, *PSTA_ADMIN_CONFIG;
1573 1511
1574// This data structure keep the current active BSS/IBSS's configuration that this STA 1512// This data structure keep the current active BSS/IBSS's configuration that this STA
@@ -1578,680 +1516,637 @@ typedef struct _STA_ADMIN_CONFIG {
1578// Normally, after SCAN or failed roaming attempts, we need to recover back to 1516// Normally, after SCAN or failed roaming attempts, we need to recover back to
1579// the current active settings. 1517// the current active settings.
1580typedef struct _STA_ACTIVE_CONFIG { 1518typedef struct _STA_ACTIVE_CONFIG {
1581 USHORT Aid; 1519 USHORT Aid;
1582 USHORT AtimWin; // in kusec; IBSS parameter set element 1520 USHORT AtimWin; // in kusec; IBSS parameter set element
1583 USHORT CapabilityInfo; 1521 USHORT CapabilityInfo;
1584 USHORT CfpMaxDuration; 1522 USHORT CfpMaxDuration;
1585 USHORT CfpPeriod; 1523 USHORT CfpPeriod;
1586 1524
1587 // Copy supported rate from desired AP's beacon. We are trying to match 1525 // Copy supported rate from desired AP's beacon. We are trying to match
1588 // AP's supported and extended rate settings. 1526 // AP's supported and extended rate settings.
1589 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES]; 1527 UCHAR SupRate[MAX_LEN_OF_SUPPORTED_RATES];
1590 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES]; 1528 UCHAR ExtRate[MAX_LEN_OF_SUPPORTED_RATES];
1591 UCHAR SupRateLen; 1529 UCHAR SupRateLen;
1592 UCHAR ExtRateLen; 1530 UCHAR ExtRateLen;
1593 // Copy supported ht from desired AP's beacon. We are trying to match 1531 // Copy supported ht from desired AP's beacon. We are trying to match
1594 RT_HT_PHY_INFO SupportedPhyInfo; 1532 RT_HT_PHY_INFO SupportedPhyInfo;
1595 RT_HT_CAPABILITY SupportedHtPhy; 1533 RT_HT_CAPABILITY SupportedHtPhy;
1596} STA_ACTIVE_CONFIG, *PSTA_ACTIVE_CONFIG; 1534} STA_ACTIVE_CONFIG, *PSTA_ACTIVE_CONFIG;
1597 1535
1598
1599
1600
1601
1602
1603typedef struct _MAC_TABLE_ENTRY { 1536typedef struct _MAC_TABLE_ENTRY {
1604 //Choose 1 from ValidAsWDS and ValidAsCLI to validize. 1537 //Choose 1 from ValidAsWDS and ValidAsCLI to validize.
1605 BOOLEAN ValidAsCLI; // Sta mode, set this TRUE after Linkup,too. 1538 BOOLEAN ValidAsCLI; // Sta mode, set this TRUE after Linkup,too.
1606 BOOLEAN ValidAsWDS; // This is WDS Entry. only for AP mode. 1539 BOOLEAN ValidAsWDS; // This is WDS Entry. only for AP mode.
1607 BOOLEAN ValidAsApCli; //This is a AP-Client entry, only for AP mode which enable AP-Client functions. 1540 BOOLEAN ValidAsApCli; //This is a AP-Client entry, only for AP mode which enable AP-Client functions.
1608 BOOLEAN ValidAsMesh; 1541 BOOLEAN ValidAsMesh;
1609 BOOLEAN ValidAsDls; // This is DLS Entry. only for STA mode. 1542 BOOLEAN ValidAsDls; // This is DLS Entry. only for STA mode.
1610 BOOLEAN isCached; 1543 BOOLEAN isCached;
1611 BOOLEAN bIAmBadAtheros; // Flag if this is Atheros chip that has IOT problem. We need to turn on RTS/CTS protection. 1544 BOOLEAN bIAmBadAtheros; // Flag if this is Atheros chip that has IOT problem. We need to turn on RTS/CTS protection.
1612 1545
1613 UCHAR EnqueueEapolStartTimerRunning; // Enqueue EAPoL-Start for triggering EAP SM 1546 UCHAR EnqueueEapolStartTimerRunning; // Enqueue EAPoL-Start for triggering EAP SM
1614 //jan for wpa 1547 //jan for wpa
1615 // record which entry revoke MIC Failure , if it leaves the BSS itself, AP won't update aMICFailTime MIB 1548 // record which entry revoke MIC Failure , if it leaves the BSS itself, AP won't update aMICFailTime MIB
1616 UCHAR CMTimerRunning; 1549 UCHAR CMTimerRunning;
1617 UCHAR apidx; // MBSS number 1550 UCHAR apidx; // MBSS number
1618 UCHAR RSNIE_Len; 1551 UCHAR RSNIE_Len;
1619 UCHAR RSN_IE[MAX_LEN_OF_RSNIE]; 1552 UCHAR RSN_IE[MAX_LEN_OF_RSNIE];
1620 UCHAR ANonce[LEN_KEY_DESC_NONCE]; 1553 UCHAR ANonce[LEN_KEY_DESC_NONCE];
1621 UCHAR SNonce[LEN_KEY_DESC_NONCE]; 1554 UCHAR SNonce[LEN_KEY_DESC_NONCE];
1622 UCHAR R_Counter[LEN_KEY_DESC_REPLAY]; 1555 UCHAR R_Counter[LEN_KEY_DESC_REPLAY];
1623 UCHAR PTK[64]; 1556 UCHAR PTK[64];
1624 UCHAR ReTryCounter; 1557 UCHAR ReTryCounter;
1625 RALINK_TIMER_STRUCT RetryTimer; 1558 RALINK_TIMER_STRUCT RetryTimer;
1626 RALINK_TIMER_STRUCT EnqueueStartForPSKTimer; // A timer which enqueue EAPoL-Start for triggering PSK SM 1559 RALINK_TIMER_STRUCT EnqueueStartForPSKTimer; // A timer which enqueue EAPoL-Start for triggering PSK SM
1627 NDIS_802_11_AUTHENTICATION_MODE AuthMode; // This should match to whatever microsoft defined 1560 NDIS_802_11_AUTHENTICATION_MODE AuthMode; // This should match to whatever microsoft defined
1628 NDIS_802_11_WEP_STATUS WepStatus; 1561 NDIS_802_11_WEP_STATUS WepStatus;
1629 NDIS_802_11_WEP_STATUS GroupKeyWepStatus; 1562 NDIS_802_11_WEP_STATUS GroupKeyWepStatus;
1630 AP_WPA_STATE WpaState; 1563 AP_WPA_STATE WpaState;
1631 GTK_STATE GTKState; 1564 GTK_STATE GTKState;
1632 USHORT PortSecured; 1565 USHORT PortSecured;
1633 NDIS_802_11_PRIVACY_FILTER PrivacyFilter; // PrivacyFilter enum for 802.1X 1566 NDIS_802_11_PRIVACY_FILTER PrivacyFilter; // PrivacyFilter enum for 802.1X
1634 CIPHER_KEY PairwiseKey; 1567 CIPHER_KEY PairwiseKey;
1635 PVOID pAd; 1568 PVOID pAd;
1636 INT PMKID_CacheIdx; 1569 INT PMKID_CacheIdx;
1637 UCHAR PMKID[LEN_PMKID]; 1570 UCHAR PMKID[LEN_PMKID];
1638 1571
1639 1572 UCHAR Addr[MAC_ADDR_LEN];
1640 UCHAR Addr[MAC_ADDR_LEN]; 1573 UCHAR PsMode;
1641 UCHAR PsMode; 1574 SST Sst;
1642 SST Sst; 1575 AUTH_STATE AuthState; // for SHARED KEY authentication state machine used only
1643 AUTH_STATE AuthState; // for SHARED KEY authentication state machine used only 1576 BOOLEAN IsReassocSta; // Indicate whether this is a reassociation procedure
1644 BOOLEAN IsReassocSta; // Indicate whether this is a reassociation procedure 1577 USHORT Aid;
1645 USHORT Aid; 1578 USHORT CapabilityInfo;
1646 USHORT CapabilityInfo; 1579 UCHAR LastRssi;
1647 UCHAR LastRssi; 1580 ULONG NoDataIdleCount;
1648 ULONG NoDataIdleCount; 1581 UINT16 StationKeepAliveCount; // unit: second
1649 UINT16 StationKeepAliveCount; // unit: second 1582 ULONG PsQIdleCount;
1650 ULONG PsQIdleCount; 1583 QUEUE_HEADER PsQueue;
1651 QUEUE_HEADER PsQueue; 1584
1652 1585 UINT32 StaConnectTime; // the live time of this station since associated with AP
1653 UINT32 StaConnectTime; // the live time of this station since associated with AP 1586
1654 1587 BOOLEAN bSendBAR;
1655 BOOLEAN bSendBAR; 1588 USHORT NoBADataCountDown;
1656 USHORT NoBADataCountDown; 1589
1657 1590 UINT32 CachedBuf[16]; // UINT (4 bytes) for alignment
1658 UINT32 CachedBuf[16]; // UINT (4 bytes) for alignment 1591 UINT TxBFCount; // 3*3
1659 UINT TxBFCount; // 3*3 1592 UINT FIFOCount;
1660 UINT FIFOCount; 1593 UINT DebugFIFOCount;
1661 UINT DebugFIFOCount; 1594 UINT DebugTxCount;
1662 UINT DebugTxCount; 1595 BOOLEAN bDlsInit;
1663 BOOLEAN bDlsInit;
1664
1665 1596
1666//==================================================== 1597//====================================================
1667//WDS entry needs these 1598//WDS entry needs these
1668// if ValidAsWDS==TRUE, MatchWDSTabIdx is the index in WdsTab.MacTab 1599// if ValidAsWDS==TRUE, MatchWDSTabIdx is the index in WdsTab.MacTab
1669 UINT MatchWDSTabIdx; 1600 UINT MatchWDSTabIdx;
1670 UCHAR MaxSupportedRate; 1601 UCHAR MaxSupportedRate;
1671 UCHAR CurrTxRate; 1602 UCHAR CurrTxRate;
1672 UCHAR CurrTxRateIndex; 1603 UCHAR CurrTxRateIndex;
1673 // to record the each TX rate's quality. 0 is best, the bigger the worse. 1604 // to record the each TX rate's quality. 0 is best, the bigger the worse.
1674 USHORT TxQuality[MAX_STEP_OF_TX_RATE_SWITCH]; 1605 USHORT TxQuality[MAX_STEP_OF_TX_RATE_SWITCH];
1675// USHORT OneSecTxOkCount; 1606// USHORT OneSecTxOkCount;
1676 UINT32 OneSecTxNoRetryOkCount; 1607 UINT32 OneSecTxNoRetryOkCount;
1677 UINT32 OneSecTxRetryOkCount; 1608 UINT32 OneSecTxRetryOkCount;
1678 UINT32 OneSecTxFailCount; 1609 UINT32 OneSecTxFailCount;
1679 UINT32 ContinueTxFailCnt; 1610 UINT32 ContinueTxFailCnt;
1680 UINT32 CurrTxRateStableTime; // # of second in current TX rate 1611 UINT32 CurrTxRateStableTime; // # of second in current TX rate
1681 UCHAR TxRateUpPenalty; // extra # of second penalty due to last unstable condition 1612 UCHAR TxRateUpPenalty; // extra # of second penalty due to last unstable condition
1682//==================================================== 1613//====================================================
1683 1614
1684 BOOLEAN fNoisyEnvironment; 1615 BOOLEAN fNoisyEnvironment;
1685 BOOLEAN fLastSecAccordingRSSI; 1616 BOOLEAN fLastSecAccordingRSSI;
1686 UCHAR LastSecTxRateChangeAction; // 0: no change, 1:rate UP, 2:rate down 1617 UCHAR LastSecTxRateChangeAction; // 0: no change, 1:rate UP, 2:rate down
1687 CHAR LastTimeTxRateChangeAction; //Keep last time value of LastSecTxRateChangeAction 1618 CHAR LastTimeTxRateChangeAction; //Keep last time value of LastSecTxRateChangeAction
1688 ULONG LastTxOkCount; 1619 ULONG LastTxOkCount;
1689 UCHAR PER[MAX_STEP_OF_TX_RATE_SWITCH]; 1620 UCHAR PER[MAX_STEP_OF_TX_RATE_SWITCH];
1690 1621
1691 // a bitmap of BOOLEAN flags. each bit represent an operation status of a particular 1622 // a bitmap of BOOLEAN flags. each bit represent an operation status of a particular
1692 // BOOLEAN control, either ON or OFF. These flags should always be accessed via 1623 // BOOLEAN control, either ON or OFF. These flags should always be accessed via
1693 // CLIENT_STATUS_TEST_FLAG(), CLIENT_STATUS_SET_FLAG(), CLIENT_STATUS_CLEAR_FLAG() macros. 1624 // CLIENT_STATUS_TEST_FLAG(), CLIENT_STATUS_SET_FLAG(), CLIENT_STATUS_CLEAR_FLAG() macros.
1694 // see fOP_STATUS_xxx in RTMP_DEF.C for detail bit definition. fCLIENT_STATUS_AMSDU_INUSED 1625 // see fOP_STATUS_xxx in RTMP_DEF.C for detail bit definition. fCLIENT_STATUS_AMSDU_INUSED
1695 ULONG ClientStatusFlags; 1626 ULONG ClientStatusFlags;
1696 1627
1697 HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode;// For transmit phy setting in TXWI. 1628 HTTRANSMIT_SETTING HTPhyMode, MaxHTPhyMode, MinHTPhyMode; // For transmit phy setting in TXWI.
1698 1629
1699 // HT EWC MIMO-N used parameters 1630 // HT EWC MIMO-N used parameters
1700 USHORT RXBAbitmap; // fill to on-chip RXWI_BA_BITMASK in 8.1.3RX attribute entry format 1631 USHORT RXBAbitmap; // fill to on-chip RXWI_BA_BITMASK in 8.1.3RX attribute entry format
1701 USHORT TXBAbitmap; // This bitmap as originator, only keep in software used to mark AMPDU bit in TXWI 1632 USHORT TXBAbitmap; // This bitmap as originator, only keep in software used to mark AMPDU bit in TXWI
1702 USHORT TXAutoBAbitmap; 1633 USHORT TXAutoBAbitmap;
1703 USHORT BADeclineBitmap; 1634 USHORT BADeclineBitmap;
1704 USHORT BARecWcidArray[NUM_OF_TID]; // The mapping wcid of recipient session. if RXBAbitmap bit is masked 1635 USHORT BARecWcidArray[NUM_OF_TID]; // The mapping wcid of recipient session. if RXBAbitmap bit is masked
1705 USHORT BAOriWcidArray[NUM_OF_TID]; // The mapping wcid of originator session. if TXBAbitmap bit is masked 1636 USHORT BAOriWcidArray[NUM_OF_TID]; // The mapping wcid of originator session. if TXBAbitmap bit is masked
1706 USHORT BAOriSequence[NUM_OF_TID]; // The mapping wcid of originator session. if TXBAbitmap bit is masked 1637 USHORT BAOriSequence[NUM_OF_TID]; // The mapping wcid of originator session. if TXBAbitmap bit is masked
1707 1638
1708 // 802.11n features. 1639 // 802.11n features.
1709 UCHAR MpduDensity; 1640 UCHAR MpduDensity;
1710 UCHAR MaxRAmpduFactor; 1641 UCHAR MaxRAmpduFactor;
1711 UCHAR AMsduSize; 1642 UCHAR AMsduSize;
1712 UCHAR MmpsMode; // MIMO power save more. 1643 UCHAR MmpsMode; // MIMO power save more.
1713 1644
1714 HT_CAPABILITY_IE HTCapability; 1645 HT_CAPABILITY_IE HTCapability;
1715 1646
1716 BOOLEAN bAutoTxRateSwitch; 1647 BOOLEAN bAutoTxRateSwitch;
1717 1648
1718 UCHAR RateLen; 1649 UCHAR RateLen;
1719 struct _MAC_TABLE_ENTRY *pNext; 1650 struct _MAC_TABLE_ENTRY *pNext;
1720 USHORT TxSeq[NUM_OF_TID]; 1651 USHORT TxSeq[NUM_OF_TID];
1721 USHORT NonQosDataSeq; 1652 USHORT NonQosDataSeq;
1722 1653
1723 RSSI_SAMPLE RssiSample; 1654 RSSI_SAMPLE RssiSample;
1724 1655
1725 UINT32 TXMCSExpected[16]; 1656 UINT32 TXMCSExpected[16];
1726 UINT32 TXMCSSuccessful[16]; 1657 UINT32 TXMCSSuccessful[16];
1727 UINT32 TXMCSFailed[16]; 1658 UINT32 TXMCSFailed[16];
1728 UINT32 TXMCSAutoFallBack[16][16]; 1659 UINT32 TXMCSAutoFallBack[16][16];
1729 1660
1730 ULONG LastBeaconRxTime; 1661 ULONG LastBeaconRxTime;
1731 1662
1732 ULONG AssocDeadLine; 1663 ULONG AssocDeadLine;
1733} MAC_TABLE_ENTRY, *PMAC_TABLE_ENTRY; 1664} MAC_TABLE_ENTRY, *PMAC_TABLE_ENTRY;
1734 1665
1735typedef struct _MAC_TABLE { 1666typedef struct _MAC_TABLE {
1736 USHORT Size; 1667 USHORT Size;
1737 MAC_TABLE_ENTRY *Hash[HASH_TABLE_SIZE]; 1668 MAC_TABLE_ENTRY *Hash[HASH_TABLE_SIZE];
1738 MAC_TABLE_ENTRY Content[MAX_LEN_OF_MAC_TABLE]; 1669 MAC_TABLE_ENTRY Content[MAX_LEN_OF_MAC_TABLE];
1739 QUEUE_HEADER McastPsQueue; 1670 QUEUE_HEADER McastPsQueue;
1740 ULONG PsQIdleCount; 1671 ULONG PsQIdleCount;
1741 BOOLEAN fAnyStationInPsm; 1672 BOOLEAN fAnyStationInPsm;
1742 BOOLEAN fAnyStationBadAtheros; // Check if any Station is atheros 802.11n Chip. We need to use RTS/CTS with Atheros 802,.11n chip. 1673 BOOLEAN fAnyStationBadAtheros; // Check if any Station is atheros 802.11n Chip. We need to use RTS/CTS with Atheros 802,.11n chip.
1743 BOOLEAN fAnyTxOPForceDisable; // Check if it is necessary to disable BE TxOP 1674 BOOLEAN fAnyTxOPForceDisable; // Check if it is necessary to disable BE TxOP
1744 BOOLEAN fAllStationAsRalink; // Check if all stations are ralink-chipset 1675 BOOLEAN fAllStationAsRalink; // Check if all stations are ralink-chipset
1745 BOOLEAN fAnyStationIsLegacy; // Check if I use legacy rate to transmit to my BSS Station/ 1676 BOOLEAN fAnyStationIsLegacy; // Check if I use legacy rate to transmit to my BSS Station/
1746 BOOLEAN fAnyStationNonGF; // Check if any Station can't support GF. 1677 BOOLEAN fAnyStationNonGF; // Check if any Station can't support GF.
1747 BOOLEAN fAnyStation20Only; // Check if any Station can't support GF. 1678 BOOLEAN fAnyStation20Only; // Check if any Station can't support GF.
1748 BOOLEAN fAnyStationMIMOPSDynamic; // Check if any Station is MIMO Dynamic 1679 BOOLEAN fAnyStationMIMOPSDynamic; // Check if any Station is MIMO Dynamic
1749 BOOLEAN fAnyBASession; // Check if there is BA session. Force turn on RTS/CTS 1680 BOOLEAN fAnyBASession; // Check if there is BA session. Force turn on RTS/CTS
1750//2008/10/28: KH add to support Antenna power-saving of AP<-- 1681//2008/10/28: KH add to support Antenna power-saving of AP<--
1751//2008/10/28: KH add to support Antenna power-saving of AP--> 1682//2008/10/28: KH add to support Antenna power-saving of AP-->
1752} MAC_TABLE, *PMAC_TABLE; 1683} MAC_TABLE, *PMAC_TABLE;
1753 1684
1754 1685struct wificonf {
1755 1686 BOOLEAN bShortGI;
1756
1757
1758
1759struct wificonf
1760{
1761 BOOLEAN bShortGI;
1762 BOOLEAN bGreenField; 1687 BOOLEAN bGreenField;
1763}; 1688};
1764 1689
1690typedef struct _RTMP_DEV_INFO_ {
1691 UCHAR chipName[16];
1692 RTMP_INF_TYPE infType;
1693} RTMP_DEV_INFO;
1765 1694
1766typedef struct _RTMP_DEV_INFO_ 1695struct _RTMP_CHIP_OP_ {
1767{
1768 UCHAR chipName[16];
1769 RTMP_INF_TYPE infType;
1770}RTMP_DEV_INFO;
1771
1772
1773
1774
1775struct _RTMP_CHIP_OP_
1776{
1777 /* Calibration access related callback functions */ 1696 /* Calibration access related callback functions */
1778 int (*eeinit)(RTMP_ADAPTER *pAd); /* int (*eeinit)(RTMP_ADAPTER *pAd); */ 1697 int (*eeinit) (RTMP_ADAPTER * pAd); /* int (*eeinit)(RTMP_ADAPTER *pAd); */
1779 int (*eeread)(RTMP_ADAPTER *pAd, USHORT offset, PUSHORT pValue); /* int (*eeread)(RTMP_ADAPTER *pAd, int offset, PUSHORT pValue); */ 1698 int (*eeread) (RTMP_ADAPTER * pAd, USHORT offset, PUSHORT pValue); /* int (*eeread)(RTMP_ADAPTER *pAd, int offset, PUSHORT pValue); */
1780 1699
1781 /* MCU related callback functions */ 1700 /* MCU related callback functions */
1782 int (*loadFirmware)(RTMP_ADAPTER *pAd); /* int (*loadFirmware)(RTMP_ADAPTER *pAd); */ 1701 int (*loadFirmware) (RTMP_ADAPTER * pAd); /* int (*loadFirmware)(RTMP_ADAPTER *pAd); */
1783 int (*eraseFirmware)(RTMP_ADAPTER *pAd); /* int (*eraseFirmware)(RTMP_ADAPTER *pAd); */ 1702 int (*eraseFirmware) (RTMP_ADAPTER * pAd); /* int (*eraseFirmware)(RTMP_ADAPTER *pAd); */
1784 int (*sendCommandToMcu)(RTMP_ADAPTER *pAd, UCHAR cmd, UCHAR token, UCHAR arg0, UCHAR arg1);; /* int (*sendCommandToMcu)(RTMP_ADAPTER *pAd, UCHAR cmd, UCHAR token, UCHAR arg0, UCHAR arg1); */ 1703 int (*sendCommandToMcu) (RTMP_ADAPTER * pAd, UCHAR cmd, UCHAR token, UCHAR arg0, UCHAR arg1);; /* int (*sendCommandToMcu)(RTMP_ADAPTER *pAd, UCHAR cmd, UCHAR token, UCHAR arg0, UCHAR arg1); */
1785 1704
1786 /* RF access related callback functions */ 1705 /* RF access related callback functions */
1787 REG_PAIR *pRFRegTable; 1706 REG_PAIR *pRFRegTable;
1788 void (*AsicRfInit)(RTMP_ADAPTER *pAd); 1707 void (*AsicRfInit) (RTMP_ADAPTER * pAd);
1789 void (*AsicRfTurnOn)(RTMP_ADAPTER *pAd); 1708 void (*AsicRfTurnOn) (RTMP_ADAPTER * pAd);
1790 void (*AsicRfTurnOff)(RTMP_ADAPTER *pAd); 1709 void (*AsicRfTurnOff) (RTMP_ADAPTER * pAd);
1791 void (*AsicReverseRfFromSleepMode)(RTMP_ADAPTER *pAd); 1710 void (*AsicReverseRfFromSleepMode) (RTMP_ADAPTER * pAd);
1792 void (*AsicHaltAction)(RTMP_ADAPTER *pAd); 1711 void (*AsicHaltAction) (RTMP_ADAPTER * pAd);
1793}; 1712};
1794 1713
1795
1796// 1714//
1797// The miniport adapter structure 1715// The miniport adapter structure
1798// 1716//
1799struct _RTMP_ADAPTER 1717struct _RTMP_ADAPTER {
1800{ 1718 PVOID OS_Cookie; // save specific structure relative to OS
1801 PVOID OS_Cookie; // save specific structure relative to OS 1719 PNET_DEV net_dev;
1802 PNET_DEV net_dev; 1720 ULONG VirtualIfCnt;
1803 ULONG VirtualIfCnt;
1804 1721
1805 RTMP_CHIP_OP chipOps; 1722 RTMP_CHIP_OP chipOps;
1806 USHORT ThisTbttNumToNextWakeUp; 1723 USHORT ThisTbttNumToNextWakeUp;
1807 1724
1808#ifdef RTMP_MAC_PCI 1725#ifdef RTMP_MAC_PCI
1809/*****************************************************************************************/ 1726/*****************************************************************************************/
1810/* PCI related parameters */ 1727/* PCI related parameters */
1811/*****************************************************************************************/ 1728/*****************************************************************************************/
1812 PUCHAR CSRBaseAddress; // PCI MMIO Base Address, all access will use 1729 PUCHAR CSRBaseAddress; // PCI MMIO Base Address, all access will use
1813 unsigned int irq_num; 1730 unsigned int irq_num;
1814 1731
1815 USHORT LnkCtrlBitMask; 1732 USHORT LnkCtrlBitMask;
1816 USHORT RLnkCtrlConfiguration; 1733 USHORT RLnkCtrlConfiguration;
1817 USHORT RLnkCtrlOffset; 1734 USHORT RLnkCtrlOffset;
1818 USHORT HostLnkCtrlConfiguration; 1735 USHORT HostLnkCtrlConfiguration;
1819 USHORT HostLnkCtrlOffset; 1736 USHORT HostLnkCtrlOffset;
1820 USHORT PCIePowerSaveLevel; 1737 USHORT PCIePowerSaveLevel;
1821 ULONG Rt3xxHostLinkCtrl; // USed for 3090F chip 1738 ULONG Rt3xxHostLinkCtrl; // USed for 3090F chip
1822 ULONG Rt3xxRalinkLinkCtrl; // USed for 3090F chip 1739 ULONG Rt3xxRalinkLinkCtrl; // USed for 3090F chip
1823 USHORT DeviceID; // Read from PCI config 1740 USHORT DeviceID; // Read from PCI config
1824 ULONG AccessBBPFailCount; 1741 ULONG AccessBBPFailCount;
1825 BOOLEAN bPCIclkOff; // flag that indicate if the PICE power status in Configuration SPace.. 1742 BOOLEAN bPCIclkOff; // flag that indicate if the PICE power status in Configuration SPace..
1826 BOOLEAN bPCIclkOffDisableTx; // 1743 BOOLEAN bPCIclkOffDisableTx; //
1827 1744
1828 BOOLEAN brt30xxBanMcuCmd; //when = 0xff means all commands are ok to set . 1745 BOOLEAN brt30xxBanMcuCmd; //when = 0xff means all commands are ok to set .
1829 BOOLEAN b3090ESpecialChip; //3090E special chip that write EEPROM 0x24=0x9280. 1746 BOOLEAN b3090ESpecialChip; //3090E special chip that write EEPROM 0x24=0x9280.
1830 ULONG CheckDmaBusyCount; // Check Interrupt Status Register Count. 1747 ULONG CheckDmaBusyCount; // Check Interrupt Status Register Count.
1831 1748
1832 UINT int_enable_reg; 1749 UINT int_enable_reg;
1833 UINT int_disable_mask; 1750 UINT int_disable_mask;
1834 UINT int_pending; 1751 UINT int_pending;
1835 1752
1836 1753 RTMP_DMABUF TxBufSpace[NUM_OF_TX_RING]; // Shared memory of all 1st pre-allocated TxBuf associated with each TXD
1837 RTMP_DMABUF TxBufSpace[NUM_OF_TX_RING]; // Shared memory of all 1st pre-allocated TxBuf associated with each TXD 1754 RTMP_DMABUF RxDescRing; // Shared memory for RX descriptors
1838 RTMP_DMABUF RxDescRing; // Shared memory for RX descriptors 1755 RTMP_DMABUF TxDescRing[NUM_OF_TX_RING]; // Shared memory for Tx descriptors
1839 RTMP_DMABUF TxDescRing[NUM_OF_TX_RING]; // Shared memory for Tx descriptors 1756 RTMP_TX_RING TxRing[NUM_OF_TX_RING]; // AC0~4 + HCCA
1840 RTMP_TX_RING TxRing[NUM_OF_TX_RING]; // AC0~4 + HCCA 1757#endif // RTMP_MAC_PCI //
1841#endif // RTMP_MAC_PCI // 1758
1842 1759 NDIS_SPIN_LOCK irq_lock;
1843 1760 UCHAR irq_disabled;
1844 NDIS_SPIN_LOCK irq_lock;
1845 UCHAR irq_disabled;
1846 1761
1847#ifdef RTMP_MAC_USB 1762#ifdef RTMP_MAC_USB
1848/*****************************************************************************************/ 1763/*****************************************************************************************/
1849/* USB related parameters */ 1764/* USB related parameters */
1850/*****************************************************************************************/ 1765/*****************************************************************************************/
1851 struct usb_config_descriptor *config; 1766 struct usb_config_descriptor *config;
1852 UINT BulkInEpAddr; // bulk-in endpoint address 1767 UINT BulkInEpAddr; // bulk-in endpoint address
1853 UINT BulkOutEpAddr[6]; // bulk-out endpoint address 1768 UINT BulkOutEpAddr[6]; // bulk-out endpoint address
1854 1769
1855 UINT NumberOfPipes; 1770 UINT NumberOfPipes;
1856 USHORT BulkOutMaxPacketSize; 1771 USHORT BulkOutMaxPacketSize;
1857 USHORT BulkInMaxPacketSize; 1772 USHORT BulkInMaxPacketSize;
1858 1773
1859 //======Control Flags 1774 //======Control Flags
1860 LONG PendingIoCount; 1775 LONG PendingIoCount;
1861 ULONG BulkFlags; 1776 ULONG BulkFlags;
1862 BOOLEAN bUsbTxBulkAggre; // Flags for bulk out data priority 1777 BOOLEAN bUsbTxBulkAggre; // Flags for bulk out data priority
1863 1778
1864 //======Cmd Thread 1779 //======Cmd Thread
1865 CmdQ CmdQ; 1780 CmdQ CmdQ;
1866 NDIS_SPIN_LOCK CmdQLock; // CmdQLock spinlock 1781 NDIS_SPIN_LOCK CmdQLock; // CmdQLock spinlock
1867 RTMP_OS_TASK cmdQTask; 1782 RTMP_OS_TASK cmdQTask;
1868 1783
1869 //======Semaphores (event) 1784 //======Semaphores (event)
1870 RTMP_OS_SEM UsbVendorReq_semaphore; 1785 RTMP_OS_SEM UsbVendorReq_semaphore;
1871 PVOID UsbVendorReqBuf; 1786 PVOID UsbVendorReqBuf;
1872 wait_queue_head_t *wait; 1787 wait_queue_head_t *wait;
1873#endif // RTMP_MAC_USB // 1788#endif // RTMP_MAC_USB //
1874 1789
1875/*****************************************************************************************/ 1790/*****************************************************************************************/
1876/* RBUS related parameters */ 1791/* RBUS related parameters */
1877/*****************************************************************************************/ 1792/*****************************************************************************************/
1878 1793
1879
1880/*****************************************************************************************/ 1794/*****************************************************************************************/
1881/* Both PCI/USB related parameters */ 1795/* Both PCI/USB related parameters */
1882/*****************************************************************************************/ 1796/*****************************************************************************************/
1883 //RTMP_DEV_INFO chipInfo; 1797 //RTMP_DEV_INFO chipInfo;
1884 RTMP_INF_TYPE infType; 1798 RTMP_INF_TYPE infType;
1885 1799
1886/*****************************************************************************************/ 1800/*****************************************************************************************/
1887/* Driver Mgmt related parameters */ 1801/* Driver Mgmt related parameters */
1888/*****************************************************************************************/ 1802/*****************************************************************************************/
1889 RTMP_OS_TASK mlmeTask; 1803 RTMP_OS_TASK mlmeTask;
1890#ifdef RTMP_TIMER_TASK_SUPPORT 1804#ifdef RTMP_TIMER_TASK_SUPPORT
1891 // If you want use timer task to handle the timer related jobs, enable this. 1805 // If you want use timer task to handle the timer related jobs, enable this.
1892 RTMP_TIMER_TASK_QUEUE TimerQ; 1806 RTMP_TIMER_TASK_QUEUE TimerQ;
1893 NDIS_SPIN_LOCK TimerQLock; 1807 NDIS_SPIN_LOCK TimerQLock;
1894 RTMP_OS_TASK timerTask; 1808 RTMP_OS_TASK timerTask;
1895#endif // RTMP_TIMER_TASK_SUPPORT // 1809#endif // RTMP_TIMER_TASK_SUPPORT //
1896
1897 1810
1898/*****************************************************************************************/ 1811/*****************************************************************************************/
1899/* Tx related parameters */ 1812/* Tx related parameters */
1900/*****************************************************************************************/ 1813/*****************************************************************************************/
1901 BOOLEAN DeQueueRunning[NUM_OF_TX_RING]; // for ensuring RTUSBDeQueuePacket get call once 1814 BOOLEAN DeQueueRunning[NUM_OF_TX_RING]; // for ensuring RTUSBDeQueuePacket get call once
1902 NDIS_SPIN_LOCK DeQueueLock[NUM_OF_TX_RING]; 1815 NDIS_SPIN_LOCK DeQueueLock[NUM_OF_TX_RING];
1903 1816
1904#ifdef RTMP_MAC_USB 1817#ifdef RTMP_MAC_USB
1905 // Data related context and AC specified, 4 AC supported 1818 // Data related context and AC specified, 4 AC supported
1906 NDIS_SPIN_LOCK BulkOutLock[6]; // BulkOut spinlock for 4 ACs 1819 NDIS_SPIN_LOCK BulkOutLock[6]; // BulkOut spinlock for 4 ACs
1907 NDIS_SPIN_LOCK MLMEBulkOutLock; // MLME BulkOut lock 1820 NDIS_SPIN_LOCK MLMEBulkOutLock; // MLME BulkOut lock
1908 1821
1909 HT_TX_CONTEXT TxContext[NUM_OF_TX_RING]; 1822 HT_TX_CONTEXT TxContext[NUM_OF_TX_RING];
1910 NDIS_SPIN_LOCK TxContextQueueLock[NUM_OF_TX_RING]; // TxContextQueue spinlock 1823 NDIS_SPIN_LOCK TxContextQueueLock[NUM_OF_TX_RING]; // TxContextQueue spinlock
1911 1824
1912 // 4 sets of Bulk Out index and pending flag 1825 // 4 sets of Bulk Out index and pending flag
1913 UCHAR NextBulkOutIndex[4]; // only used for 4 EDCA bulkout pipe 1826 UCHAR NextBulkOutIndex[4]; // only used for 4 EDCA bulkout pipe
1914 1827
1915 BOOLEAN BulkOutPending[6]; // used for total 6 bulkout pipe 1828 BOOLEAN BulkOutPending[6]; // used for total 6 bulkout pipe
1916 UCHAR bulkResetPipeid; 1829 UCHAR bulkResetPipeid;
1917 BOOLEAN MgmtBulkPending; 1830 BOOLEAN MgmtBulkPending;
1918 ULONG bulkResetReq[6]; 1831 ULONG bulkResetReq[6];
1919#endif // RTMP_MAC_USB // 1832#endif // RTMP_MAC_USB //
1920 1833
1921 // resource for software backlog queues 1834 // resource for software backlog queues
1922 QUEUE_HEADER TxSwQueue[NUM_OF_TX_RING]; // 4 AC + 1 HCCA 1835 QUEUE_HEADER TxSwQueue[NUM_OF_TX_RING]; // 4 AC + 1 HCCA
1923 NDIS_SPIN_LOCK TxSwQueueLock[NUM_OF_TX_RING]; // TxSwQueue spinlock 1836 NDIS_SPIN_LOCK TxSwQueueLock[NUM_OF_TX_RING]; // TxSwQueue spinlock
1924
1925 RTMP_DMABUF MgmtDescRing; // Shared memory for MGMT descriptors
1926 RTMP_MGMT_RING MgmtRing;
1927 NDIS_SPIN_LOCK MgmtRingLock; // Prio Ring spinlock
1928 1837
1838 RTMP_DMABUF MgmtDescRing; // Shared memory for MGMT descriptors
1839 RTMP_MGMT_RING MgmtRing;
1840 NDIS_SPIN_LOCK MgmtRingLock; // Prio Ring spinlock
1929 1841
1930/*****************************************************************************************/ 1842/*****************************************************************************************/
1931/* Rx related parameters */ 1843/* Rx related parameters */
1932/*****************************************************************************************/ 1844/*****************************************************************************************/
1933 1845
1934#ifdef RTMP_MAC_PCI 1846#ifdef RTMP_MAC_PCI
1935 RTMP_RX_RING RxRing; 1847 RTMP_RX_RING RxRing;
1936 NDIS_SPIN_LOCK RxRingLock; // Rx Ring spinlock 1848 NDIS_SPIN_LOCK RxRingLock; // Rx Ring spinlock
1937#ifdef RT3090 1849#ifdef RT3090
1938 NDIS_SPIN_LOCK McuCmdLock; //MCU Command Queue spinlock 1850 NDIS_SPIN_LOCK McuCmdLock; //MCU Command Queue spinlock
1939#endif // RT3090 // 1851#endif // RT3090 //
1940#endif // RTMP_MAC_PCI // 1852#endif // RTMP_MAC_PCI //
1941#ifdef RTMP_MAC_USB 1853#ifdef RTMP_MAC_USB
1942 RX_CONTEXT RxContext[RX_RING_SIZE]; // 1 for redundant multiple IRP bulk in. 1854 RX_CONTEXT RxContext[RX_RING_SIZE]; // 1 for redundant multiple IRP bulk in.
1943 NDIS_SPIN_LOCK BulkInLock; // BulkIn spinlock for 4 ACs 1855 NDIS_SPIN_LOCK BulkInLock; // BulkIn spinlock for 4 ACs
1944 UCHAR PendingRx; // The Maximum pending Rx value should be RX_RING_SIZE. 1856 UCHAR PendingRx; // The Maximum pending Rx value should be RX_RING_SIZE.
1945 UCHAR NextRxBulkInIndex; // Indicate the current RxContext Index which hold by Host controller. 1857 UCHAR NextRxBulkInIndex; // Indicate the current RxContext Index which hold by Host controller.
1946 UCHAR NextRxBulkInReadIndex; // Indicate the current RxContext Index which driver can read & process it. 1858 UCHAR NextRxBulkInReadIndex; // Indicate the current RxContext Index which driver can read & process it.
1947 ULONG NextRxBulkInPosition; // Want to contatenate 2 URB buffer while 1st is bulkin failed URB. This Position is 1st URB TransferLength. 1859 ULONG NextRxBulkInPosition; // Want to contatenate 2 URB buffer while 1st is bulkin failed URB. This Position is 1st URB TransferLength.
1948 ULONG TransferBufferLength; // current length of the packet buffer 1860 ULONG TransferBufferLength; // current length of the packet buffer
1949 ULONG ReadPosition; // current read position in a packet buffer 1861 ULONG ReadPosition; // current read position in a packet buffer
1950#endif // RTMP_MAC_USB // 1862#endif // RTMP_MAC_USB //
1951 1863
1952/*****************************************************************************************/ 1864/*****************************************************************************************/
1953/* ASIC related parameters */ 1865/* ASIC related parameters */
1954/*****************************************************************************************/ 1866/*****************************************************************************************/
1955 UINT32 MACVersion; // MAC version. Record rt2860C(0x28600100) or rt2860D (0x28600101).. 1867 UINT32 MACVersion; // MAC version. Record rt2860C(0x28600100) or rt2860D (0x28600101)..
1956 1868
1957 // --------------------------- 1869 // ---------------------------
1958 // E2PROM 1870 // E2PROM
1959 // --------------------------- 1871 // ---------------------------
1960 ULONG EepromVersion; // byte 0: version, byte 1: revision, byte 2~3: unused 1872 ULONG EepromVersion; // byte 0: version, byte 1: revision, byte 2~3: unused
1961 ULONG FirmwareVersion; // byte 0: Minor version, byte 1: Major version, otherwise unused. 1873 ULONG FirmwareVersion; // byte 0: Minor version, byte 1: Major version, otherwise unused.
1962 USHORT EEPROMDefaultValue[NUM_EEPROM_BBP_PARMS]; 1874 USHORT EEPROMDefaultValue[NUM_EEPROM_BBP_PARMS];
1963 UCHAR EEPROMAddressNum; // 93c46=6 93c66=8 1875 UCHAR EEPROMAddressNum; // 93c46=6 93c66=8
1964 BOOLEAN EepromAccess; 1876 BOOLEAN EepromAccess;
1965 UCHAR EFuseTag; 1877 UCHAR EFuseTag;
1966
1967 1878
1968 // --------------------------- 1879 // ---------------------------
1969 // BBP Control 1880 // BBP Control
1970 // --------------------------- 1881 // ---------------------------
1971 UCHAR BbpWriteLatch[140]; // record last BBP register value written via BBP_IO_WRITE/BBP_IO_WRITE_VY_REG_ID 1882 UCHAR BbpWriteLatch[140]; // record last BBP register value written via BBP_IO_WRITE/BBP_IO_WRITE_VY_REG_ID
1972 CHAR BbpRssiToDbmDelta; // change from UCHAR to CHAR for high power 1883 CHAR BbpRssiToDbmDelta; // change from UCHAR to CHAR for high power
1973 BBP_R66_TUNING BbpTuning; 1884 BBP_R66_TUNING BbpTuning;
1974 1885
1975 // ---------------------------- 1886 // ----------------------------
1976 // RFIC control 1887 // RFIC control
1977 // ---------------------------- 1888 // ----------------------------
1978 UCHAR RfIcType; // RFIC_xxx 1889 UCHAR RfIcType; // RFIC_xxx
1979 ULONG RfFreqOffset; // Frequency offset for channel switching 1890 ULONG RfFreqOffset; // Frequency offset for channel switching
1980 RTMP_RF_REGS LatchRfRegs; // latch th latest RF programming value since RF IC doesn't support READ 1891 RTMP_RF_REGS LatchRfRegs; // latch th latest RF programming value since RF IC doesn't support READ
1981 1892
1982 EEPROM_ANTENNA_STRUC Antenna; // Since ANtenna definition is different for a & g. We need to save it for future reference. 1893 EEPROM_ANTENNA_STRUC Antenna; // Since ANtenna definition is different for a & g. We need to save it for future reference.
1983 EEPROM_NIC_CONFIG2_STRUC NicConfig2; 1894 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1984 1895
1985 // This soft Rx Antenna Diversity mechanism is used only when user set 1896 // This soft Rx Antenna Diversity mechanism is used only when user set
1986 // RX Antenna = DIVERSITY ON 1897 // RX Antenna = DIVERSITY ON
1987 SOFT_RX_ANT_DIVERSITY RxAnt; 1898 SOFT_RX_ANT_DIVERSITY RxAnt;
1988 1899
1989 UCHAR RFProgSeq; 1900 UCHAR RFProgSeq;
1990 CHANNEL_TX_POWER TxPower[MAX_NUM_OF_CHANNELS]; // Store Tx power value for all channels. 1901 CHANNEL_TX_POWER TxPower[MAX_NUM_OF_CHANNELS]; // Store Tx power value for all channels.
1991 CHANNEL_TX_POWER ChannelList[MAX_NUM_OF_CHANNELS]; // list all supported channels for site survey 1902 CHANNEL_TX_POWER ChannelList[MAX_NUM_OF_CHANNELS]; // list all supported channels for site survey
1992 CHANNEL_11J_TX_POWER TxPower11J[MAX_NUM_OF_11JCHANNELS]; // 802.11j channel and bw 1903 CHANNEL_11J_TX_POWER TxPower11J[MAX_NUM_OF_11JCHANNELS]; // 802.11j channel and bw
1993 CHANNEL_11J_TX_POWER ChannelList11J[MAX_NUM_OF_11JCHANNELS]; // list all supported channels for site survey 1904 CHANNEL_11J_TX_POWER ChannelList11J[MAX_NUM_OF_11JCHANNELS]; // list all supported channels for site survey
1994 1905
1995 UCHAR ChannelListNum; // number of channel in ChannelList[] 1906 UCHAR ChannelListNum; // number of channel in ChannelList[]
1996 UCHAR Bbp94; 1907 UCHAR Bbp94;
1997 BOOLEAN BbpForCCK; 1908 BOOLEAN BbpForCCK;
1998 ULONG Tx20MPwrCfgABand[5]; 1909 ULONG Tx20MPwrCfgABand[5];
1999 ULONG Tx20MPwrCfgGBand[5]; 1910 ULONG Tx20MPwrCfgGBand[5];
2000 ULONG Tx40MPwrCfgABand[5]; 1911 ULONG Tx40MPwrCfgABand[5];
2001 ULONG Tx40MPwrCfgGBand[5]; 1912 ULONG Tx40MPwrCfgGBand[5];
2002 1913
2003 BOOLEAN bAutoTxAgcA; // Enable driver auto Tx Agc control 1914 BOOLEAN bAutoTxAgcA; // Enable driver auto Tx Agc control
2004 UCHAR TssiRefA; // Store Tssi reference value as 25 temperature. 1915 UCHAR TssiRefA; // Store Tssi reference value as 25 temperature.
2005 UCHAR TssiPlusBoundaryA[5]; // Tssi boundary for increase Tx power to compensate. 1916 UCHAR TssiPlusBoundaryA[5]; // Tssi boundary for increase Tx power to compensate.
2006 UCHAR TssiMinusBoundaryA[5]; // Tssi boundary for decrease Tx power to compensate. 1917 UCHAR TssiMinusBoundaryA[5]; // Tssi boundary for decrease Tx power to compensate.
2007 UCHAR TxAgcStepA; // Store Tx TSSI delta increment / decrement value 1918 UCHAR TxAgcStepA; // Store Tx TSSI delta increment / decrement value
2008 CHAR TxAgcCompensateA; // Store the compensation (TxAgcStep * (idx-1)) 1919 CHAR TxAgcCompensateA; // Store the compensation (TxAgcStep * (idx-1))
2009 1920
2010 BOOLEAN bAutoTxAgcG; // Enable driver auto Tx Agc control 1921 BOOLEAN bAutoTxAgcG; // Enable driver auto Tx Agc control
2011 UCHAR TssiRefG; // Store Tssi reference value as 25 temperature. 1922 UCHAR TssiRefG; // Store Tssi reference value as 25 temperature.
2012 UCHAR TssiPlusBoundaryG[5]; // Tssi boundary for increase Tx power to compensate. 1923 UCHAR TssiPlusBoundaryG[5]; // Tssi boundary for increase Tx power to compensate.
2013 UCHAR TssiMinusBoundaryG[5]; // Tssi boundary for decrease Tx power to compensate. 1924 UCHAR TssiMinusBoundaryG[5]; // Tssi boundary for decrease Tx power to compensate.
2014 UCHAR TxAgcStepG; // Store Tx TSSI delta increment / decrement value 1925 UCHAR TxAgcStepG; // Store Tx TSSI delta increment / decrement value
2015 CHAR TxAgcCompensateG; // Store the compensation (TxAgcStep * (idx-1)) 1926 CHAR TxAgcCompensateG; // Store the compensation (TxAgcStep * (idx-1))
2016 1927
2017 CHAR BGRssiOffset0; // Store B/G RSSI#0 Offset value on EEPROM 0x46h 1928 CHAR BGRssiOffset0; // Store B/G RSSI#0 Offset value on EEPROM 0x46h
2018 CHAR BGRssiOffset1; // Store B/G RSSI#1 Offset value 1929 CHAR BGRssiOffset1; // Store B/G RSSI#1 Offset value
2019 CHAR BGRssiOffset2; // Store B/G RSSI#2 Offset value 1930 CHAR BGRssiOffset2; // Store B/G RSSI#2 Offset value
2020 1931
2021 CHAR ARssiOffset0; // Store A RSSI#0 Offset value on EEPROM 0x4Ah 1932 CHAR ARssiOffset0; // Store A RSSI#0 Offset value on EEPROM 0x4Ah
2022 CHAR ARssiOffset1; // Store A RSSI#1 Offset value 1933 CHAR ARssiOffset1; // Store A RSSI#1 Offset value
2023 CHAR ARssiOffset2; // Store A RSSI#2 Offset value 1934 CHAR ARssiOffset2; // Store A RSSI#2 Offset value
2024 1935
2025 CHAR BLNAGain; // Store B/G external LNA#0 value on EEPROM 0x44h 1936 CHAR BLNAGain; // Store B/G external LNA#0 value on EEPROM 0x44h
2026 CHAR ALNAGain0; // Store A external LNA#0 value for ch36~64 1937 CHAR ALNAGain0; // Store A external LNA#0 value for ch36~64
2027 CHAR ALNAGain1; // Store A external LNA#1 value for ch100~128 1938 CHAR ALNAGain1; // Store A external LNA#1 value for ch100~128
2028 CHAR ALNAGain2; // Store A external LNA#2 value for ch132~165 1939 CHAR ALNAGain2; // Store A external LNA#2 value for ch132~165
2029#ifdef RT30xx 1940#ifdef RT30xx
2030 // for 3572 1941 // for 3572
2031 UCHAR Bbp25; 1942 UCHAR Bbp25;
2032 UCHAR Bbp26; 1943 UCHAR Bbp26;
2033 1944
2034 UCHAR TxMixerGain24G; // Tx mixer gain value from EEPROM to improve Tx EVM / Tx DAC, 2.4G 1945 UCHAR TxMixerGain24G; // Tx mixer gain value from EEPROM to improve Tx EVM / Tx DAC, 2.4G
2035 UCHAR TxMixerGain5G; 1946 UCHAR TxMixerGain5G;
2036#endif // RT30xx // 1947#endif // RT30xx //
2037 // ---------------------------- 1948 // ----------------------------
2038 // LED control 1949 // LED control
2039 // ---------------------------- 1950 // ----------------------------
2040 MCU_LEDCS_STRUC LedCntl; 1951 MCU_LEDCS_STRUC LedCntl;
2041 USHORT Led1; // read from EEPROM 0x3c 1952 USHORT Led1; // read from EEPROM 0x3c
2042 USHORT Led2; // EEPROM 0x3e 1953 USHORT Led2; // EEPROM 0x3e
2043 USHORT Led3; // EEPROM 0x40 1954 USHORT Led3; // EEPROM 0x40
2044 UCHAR LedIndicatorStrength; 1955 UCHAR LedIndicatorStrength;
2045 UCHAR RssiSingalstrengthOffet; 1956 UCHAR RssiSingalstrengthOffet;
2046 BOOLEAN bLedOnScanning; 1957 BOOLEAN bLedOnScanning;
2047 UCHAR LedStatus; 1958 UCHAR LedStatus;
2048 1959
2049/*****************************************************************************************/ 1960/*****************************************************************************************/
2050/* 802.11 related parameters */ 1961/* 802.11 related parameters */
2051/*****************************************************************************************/ 1962/*****************************************************************************************/
2052 // outgoing BEACON frame buffer and corresponding TXD 1963 // outgoing BEACON frame buffer and corresponding TXD
2053 TXWI_STRUC BeaconTxWI; 1964 TXWI_STRUC BeaconTxWI;
2054 PUCHAR BeaconBuf; 1965 PUCHAR BeaconBuf;
2055 USHORT BeaconOffset[HW_BEACON_MAX_COUNT]; 1966 USHORT BeaconOffset[HW_BEACON_MAX_COUNT];
2056 1967
2057 // pre-build PS-POLL and NULL frame upon link up. for efficiency purpose. 1968 // pre-build PS-POLL and NULL frame upon link up. for efficiency purpose.
2058 PSPOLL_FRAME PsPollFrame; 1969 PSPOLL_FRAME PsPollFrame;
2059 HEADER_802_11 NullFrame; 1970 HEADER_802_11 NullFrame;
2060 1971
2061#ifdef RTMP_MAC_USB 1972#ifdef RTMP_MAC_USB
2062 TX_CONTEXT BeaconContext[BEACON_RING_SIZE]; 1973 TX_CONTEXT BeaconContext[BEACON_RING_SIZE];
2063 TX_CONTEXT NullContext; 1974 TX_CONTEXT NullContext;
2064 TX_CONTEXT PsPollContext; 1975 TX_CONTEXT PsPollContext;
2065 TX_CONTEXT RTSContext; 1976 TX_CONTEXT RTSContext;
2066#endif // RTMP_MAC_USB // 1977#endif // RTMP_MAC_USB //
2067 1978
2068//=========AP=========== 1979//=========AP===========
2069 1980
2070
2071//=======STA=========== 1981//=======STA===========
2072 // ----------------------------------------------- 1982 // -----------------------------------------------
2073 // STA specific configuration & operation status 1983 // STA specific configuration & operation status
2074 // used only when pAd->OpMode == OPMODE_STA 1984 // used only when pAd->OpMode == OPMODE_STA
2075 // ----------------------------------------------- 1985 // -----------------------------------------------
2076 STA_ADMIN_CONFIG StaCfg; // user desired settings 1986 STA_ADMIN_CONFIG StaCfg; // user desired settings
2077 STA_ACTIVE_CONFIG StaActive; // valid only when ADHOC_ON(pAd) || INFRA_ON(pAd) 1987 STA_ACTIVE_CONFIG StaActive; // valid only when ADHOC_ON(pAd) || INFRA_ON(pAd)
2078 CHAR nickname[IW_ESSID_MAX_SIZE+1]; // nickname, only used in the iwconfig i/f 1988 CHAR nickname[IW_ESSID_MAX_SIZE + 1]; // nickname, only used in the iwconfig i/f
2079 NDIS_MEDIA_STATE PreMediaState; 1989 NDIS_MEDIA_STATE PreMediaState;
2080 1990
2081//=======Common=========== 1991//=======Common===========
2082 // OP mode: either AP or STA 1992 // OP mode: either AP or STA
2083 UCHAR OpMode; // OPMODE_STA, OPMODE_AP 1993 UCHAR OpMode; // OPMODE_STA, OPMODE_AP
2084
2085 NDIS_MEDIA_STATE IndicateMediaState; // Base on Indication state, default is NdisMediaStateDisConnected
2086 1994
1995 NDIS_MEDIA_STATE IndicateMediaState; // Base on Indication state, default is NdisMediaStateDisConnected
2087 1996
2088 /* MAT related parameters */ 1997 /* MAT related parameters */
2089 1998
2090 // configuration: read from Registry & E2PROM 1999 // configuration: read from Registry & E2PROM
2091 BOOLEAN bLocalAdminMAC; // Use user changed MAC 2000 BOOLEAN bLocalAdminMAC; // Use user changed MAC
2092 UCHAR PermanentAddress[MAC_ADDR_LEN]; // Factory default MAC address 2001 UCHAR PermanentAddress[MAC_ADDR_LEN]; // Factory default MAC address
2093 UCHAR CurrentAddress[MAC_ADDR_LEN]; // User changed MAC address 2002 UCHAR CurrentAddress[MAC_ADDR_LEN]; // User changed MAC address
2094 2003
2095 // ------------------------------------------------------ 2004 // ------------------------------------------------------
2096 // common configuration to both OPMODE_STA and OPMODE_AP 2005 // common configuration to both OPMODE_STA and OPMODE_AP
2097 // ------------------------------------------------------ 2006 // ------------------------------------------------------
2098 COMMON_CONFIG CommonCfg; 2007 COMMON_CONFIG CommonCfg;
2099 MLME_STRUCT Mlme; 2008 MLME_STRUCT Mlme;
2100 2009
2101 // AP needs those vaiables for site survey feature. 2010 // AP needs those vaiables for site survey feature.
2102 MLME_AUX MlmeAux; // temporary settings used during MLME state machine 2011 MLME_AUX MlmeAux; // temporary settings used during MLME state machine
2103 BSS_TABLE ScanTab; // store the latest SCAN result 2012 BSS_TABLE ScanTab; // store the latest SCAN result
2104 2013
2105 //About MacTab, the sta driver will use #0 and #1 for multicast and AP. 2014 //About MacTab, the sta driver will use #0 and #1 for multicast and AP.
2106 MAC_TABLE MacTab; // ASIC on-chip WCID entry table. At TX, ASIC always use key according to this on-chip table. 2015 MAC_TABLE MacTab; // ASIC on-chip WCID entry table. At TX, ASIC always use key according to this on-chip table.
2107 NDIS_SPIN_LOCK MacTabLock; 2016 NDIS_SPIN_LOCK MacTabLock;
2108 2017
2109 BA_TABLE BATable; 2018 BA_TABLE BATable;
2110 2019
2111 NDIS_SPIN_LOCK BATabLock; 2020 NDIS_SPIN_LOCK BATabLock;
2112 RALINK_TIMER_STRUCT RECBATimer; 2021 RALINK_TIMER_STRUCT RECBATimer;
2113 2022
2114 // encryption/decryption KEY tables 2023 // encryption/decryption KEY tables
2115 CIPHER_KEY SharedKey[MAX_MBSSID_NUM][4]; // STA always use SharedKey[BSS0][0..3] 2024 CIPHER_KEY SharedKey[MAX_MBSSID_NUM][4]; // STA always use SharedKey[BSS0][0..3]
2116 2025
2117 // RX re-assembly buffer for fragmentation 2026 // RX re-assembly buffer for fragmentation
2118 FRAGMENT_FRAME FragFrame; // Frame storage for fragment frame 2027 FRAGMENT_FRAME FragFrame; // Frame storage for fragment frame
2119 2028
2120 // various Counters 2029 // various Counters
2121 COUNTER_802_3 Counters8023; // 802.3 counters 2030 COUNTER_802_3 Counters8023; // 802.3 counters
2122 COUNTER_802_11 WlanCounters; // 802.11 MIB counters 2031 COUNTER_802_11 WlanCounters; // 802.11 MIB counters
2123 COUNTER_RALINK RalinkCounters; // Ralink propriety counters 2032 COUNTER_RALINK RalinkCounters; // Ralink propriety counters
2124 COUNTER_DRS DrsCounters; // counters for Dynamic TX Rate Switching 2033 COUNTER_DRS DrsCounters; // counters for Dynamic TX Rate Switching
2125 PRIVATE_STRUC PrivateInfo; // Private information & counters 2034 PRIVATE_STRUC PrivateInfo; // Private information & counters
2126 2035
2127 // flags, see fRTMP_ADAPTER_xxx flags 2036 // flags, see fRTMP_ADAPTER_xxx flags
2128 ULONG Flags; // Represent current device status 2037 ULONG Flags; // Represent current device status
2129 ULONG PSFlags; // Power Save operation flag. 2038 ULONG PSFlags; // Power Save operation flag.
2130 2039
2131 // current TX sequence # 2040 // current TX sequence #
2132 USHORT Sequence; 2041 USHORT Sequence;
2133 2042
2134 // Control disconnect / connect event generation 2043 // Control disconnect / connect event generation
2135 //+++Didn't used anymore 2044 //+++Didn't used anymore
2136 ULONG LinkDownTime; 2045 ULONG LinkDownTime;
2137 //--- 2046 //---
2138 ULONG LastRxRate; 2047 ULONG LastRxRate;
2139 ULONG LastTxRate; 2048 ULONG LastTxRate;
2140 //+++Used only for Station 2049 //+++Used only for Station
2141 BOOLEAN bConfigChanged; // Config Change flag for the same SSID setting 2050 BOOLEAN bConfigChanged; // Config Change flag for the same SSID setting
2142 //--- 2051 //---
2143 2052
2144 ULONG ExtraInfo; // Extra information for displaying status 2053 ULONG ExtraInfo; // Extra information for displaying status
2145 ULONG SystemErrorBitmap; // b0: E2PROM version error 2054 ULONG SystemErrorBitmap; // b0: E2PROM version error
2146 2055
2147 //+++Didn't used anymore 2056 //+++Didn't used anymore
2148 ULONG MacIcVersion; // MAC/BBP serial interface issue solved after ver.D 2057 ULONG MacIcVersion; // MAC/BBP serial interface issue solved after ver.D
2149 //--- 2058 //---
2150 2059
2151 // --------------------------- 2060 // ---------------------------
2152 // System event log 2061 // System event log
2153 // --------------------------- 2062 // ---------------------------
2154 RT_802_11_EVENT_TABLE EventTab; 2063 RT_802_11_EVENT_TABLE EventTab;
2155
2156 2064
2157 BOOLEAN HTCEnable; 2065 BOOLEAN HTCEnable;
2158 2066
2159 /*****************************************************************************************/ 2067 /*****************************************************************************************/
2160 /* Statistic related parameters */ 2068 /* Statistic related parameters */
2161 /*****************************************************************************************/ 2069 /*****************************************************************************************/
2162#ifdef RTMP_MAC_USB 2070#ifdef RTMP_MAC_USB
2163 ULONG BulkOutDataOneSecCount; 2071 ULONG BulkOutDataOneSecCount;
2164 ULONG BulkInDataOneSecCount; 2072 ULONG BulkInDataOneSecCount;
2165 ULONG BulkLastOneSecCount; // BulkOutDataOneSecCount + BulkInDataOneSecCount 2073 ULONG BulkLastOneSecCount; // BulkOutDataOneSecCount + BulkInDataOneSecCount
2166 ULONG watchDogRxCnt; 2074 ULONG watchDogRxCnt;
2167 ULONG watchDogRxOverFlowCnt; 2075 ULONG watchDogRxOverFlowCnt;
2168 ULONG watchDogTxPendingCnt[NUM_OF_TX_RING]; 2076 ULONG watchDogTxPendingCnt[NUM_OF_TX_RING];
2169 INT TransferedLength[NUM_OF_TX_RING]; 2077 INT TransferedLength[NUM_OF_TX_RING];
2170#endif // RTMP_MAC_USB // 2078#endif // RTMP_MAC_USB //
2171 2079
2172 BOOLEAN bUpdateBcnCntDone; 2080 BOOLEAN bUpdateBcnCntDone;
2173 ULONG watchDogMacDeadlock; // prevent MAC/BBP into deadlock condition 2081 ULONG watchDogMacDeadlock; // prevent MAC/BBP into deadlock condition
2174 // ---------------------------- 2082 // ----------------------------
2175 // DEBUG paramerts 2083 // DEBUG paramerts
2176 // ---------------------------- 2084 // ----------------------------
2177 //ULONG DebugSetting[4]; 2085 //ULONG DebugSetting[4];
2178 BOOLEAN bBanAllBaSetup; 2086 BOOLEAN bBanAllBaSetup;
2179 BOOLEAN bPromiscuous; 2087 BOOLEAN bPromiscuous;
2180 2088
2181 // ---------------------------- 2089 // ----------------------------
2182 // rt2860c emulation-use Parameters 2090 // rt2860c emulation-use Parameters
2183 // ---------------------------- 2091 // ----------------------------
2184 //ULONG rtsaccu[30]; 2092 //ULONG rtsaccu[30];
2185 //ULONG ctsaccu[30]; 2093 //ULONG ctsaccu[30];
2186 //ULONG cfendaccu[30]; 2094 //ULONG cfendaccu[30];
2187 //ULONG bacontent[16]; 2095 //ULONG bacontent[16];
2188 //ULONG rxint[RX_RING_SIZE+1]; 2096 //ULONG rxint[RX_RING_SIZE+1];
2189 //UCHAR rcvba[60]; 2097 //UCHAR rcvba[60];
2190 BOOLEAN bLinkAdapt; 2098 BOOLEAN bLinkAdapt;
2191 BOOLEAN bForcePrintTX; 2099 BOOLEAN bForcePrintTX;
2192 BOOLEAN bForcePrintRX; 2100 BOOLEAN bForcePrintRX;
2193 //BOOLEAN bDisablescanning; //defined in RT2870 USB 2101 //BOOLEAN bDisablescanning; //defined in RT2870 USB
2194 BOOLEAN bStaFifoTest; 2102 BOOLEAN bStaFifoTest;
2195 BOOLEAN bProtectionTest; 2103 BOOLEAN bProtectionTest;
2196 BOOLEAN bBroadComHT; 2104 BOOLEAN bBroadComHT;
2197 //+++Following add from RT2870 USB. 2105 //+++Following add from RT2870 USB.
2198 ULONG BulkOutReq; 2106 ULONG BulkOutReq;
2199 ULONG BulkOutComplete; 2107 ULONG BulkOutComplete;
2200 ULONG BulkOutCompleteOther; 2108 ULONG BulkOutCompleteOther;
2201 ULONG BulkOutCompleteCancel; // seems not use now? 2109 ULONG BulkOutCompleteCancel; // seems not use now?
2202 ULONG BulkInReq; 2110 ULONG BulkInReq;
2203 ULONG BulkInComplete; 2111 ULONG BulkInComplete;
2204 ULONG BulkInCompleteFail; 2112 ULONG BulkInCompleteFail;
2205 //--- 2113 //---
2206 2114
2207 struct wificonf WIFItestbed; 2115 struct wificonf WIFItestbed;
2208 2116
2209 struct reordering_mpdu_pool mpdu_blk_pool; 2117 struct reordering_mpdu_pool mpdu_blk_pool;
2210 2118
2211 ULONG OneSecondnonBEpackets; // record non BE packets per second 2119 ULONG OneSecondnonBEpackets; // record non BE packets per second
2212 2120
2213#ifdef LINUX 2121#ifdef LINUX
2214 struct iw_statistics iw_stats; 2122 struct iw_statistics iw_stats;
2215
2216 struct net_device_stats stats;
2217#endif // LINUX //
2218
2219 2123
2124 struct net_device_stats stats;
2125#endif // LINUX //
2220 2126
2221 2127 ULONG TbttTickCount;
2222
2223 ULONG TbttTickCount;
2224#ifdef PCI_MSI_SUPPORT 2128#ifdef PCI_MSI_SUPPORT
2225 BOOLEAN HaveMsi; 2129 BOOLEAN HaveMsi;
2226#endif // PCI_MSI_SUPPORT // 2130#endif // PCI_MSI_SUPPORT //
2227 2131
2228 2132 UCHAR is_on;
2229 UCHAR is_on;
2230 2133
2231#define TIME_BASE (1000000/OS_HZ) 2134#define TIME_BASE (1000000/OS_HZ)
2232#define TIME_ONE_SECOND (1000000/TIME_BASE) 2135#define TIME_ONE_SECOND (1000000/TIME_BASE)
2233 UCHAR flg_be_adjust; 2136 UCHAR flg_be_adjust;
2234 ULONG be_adjust_last_time; 2137 ULONG be_adjust_last_time;
2235
2236 2138
2237 2139 UINT8 FlgCtsEnabled;
2238 2140 UINT8 PM_FlgSuspend;
2239
2240
2241
2242 UINT8 FlgCtsEnabled;
2243 UINT8 PM_FlgSuspend;
2244 2141
2245#ifdef RT30xx 2142#ifdef RT30xx
2246#ifdef RTMP_EFUSE_SUPPORT 2143#ifdef RTMP_EFUSE_SUPPORT
2247 BOOLEAN bUseEfuse; 2144 BOOLEAN bUseEfuse;
2248 UCHAR EEPROMImage[1024]; 2145 UCHAR EEPROMImage[1024];
2249#endif // RTMP_EFUSE_SUPPORT // 2146#endif // RTMP_EFUSE_SUPPORT //
2250#endif // RT30xx // 2147#endif // RT30xx //
2251}; 2148};
2252 2149
2253
2254
2255#define DELAYINTMASK 0x0003fffb 2150#define DELAYINTMASK 0x0003fffb
2256#define INTMASK 0x0003fffb 2151#define INTMASK 0x0003fffb
2257#define IndMask 0x0003fffc 2152#define IndMask 0x0003fffc
@@ -2262,34 +2157,30 @@ struct _RTMP_ADAPTER
2262#define RxCoherent 0x00010000 // rx coherent 2157#define RxCoherent 0x00010000 // rx coherent
2263#define McuCommand 0x00000200 // mcu 2158#define McuCommand 0x00000200 // mcu
2264#define PreTBTTInt 0x00001000 // Pre-TBTT interrupt 2159#define PreTBTTInt 0x00001000 // Pre-TBTT interrupt
2265#define TBTTInt 0x00000800 // TBTT interrupt 2160#define TBTTInt 0x00000800 // TBTT interrupt
2266#define GPTimeOutInt 0x00008000 // GPtimeout interrupt 2161#define GPTimeOutInt 0x00008000 // GPtimeout interrupt
2267#define AutoWakeupInt 0x00004000 // AutoWakeupInt interrupt 2162#define AutoWakeupInt 0x00004000 // AutoWakeupInt interrupt
2268#define FifoStaFullInt 0x00002000 // fifo statistics full interrupt 2163#define FifoStaFullInt 0x00002000 // fifo statistics full interrupt
2269 2164
2270
2271/*************************************************************************** 2165/***************************************************************************
2272 * Rx Path software control block related data structures 2166 * Rx Path software control block related data structures
2273 **************************************************************************/ 2167 **************************************************************************/
2274typedef struct _RX_BLK_ 2168typedef struct _RX_BLK_ {
2275{ 2169// RXD_STRUC RxD; // sample
2276// RXD_STRUC RxD; // sample 2170 RT28XX_RXD_STRUC RxD;
2277 RT28XX_RXD_STRUC RxD; 2171 PRXWI_STRUC pRxWI;
2278 PRXWI_STRUC pRxWI; 2172 PHEADER_802_11 pHeader;
2279 PHEADER_802_11 pHeader; 2173 PNDIS_PACKET pRxPacket;
2280 PNDIS_PACKET pRxPacket; 2174 UCHAR *pData;
2281 UCHAR *pData; 2175 USHORT DataSize;
2282 USHORT DataSize; 2176 USHORT Flags;
2283 USHORT Flags; 2177 UCHAR UserPriority; // for calculate TKIP MIC using
2284 UCHAR UserPriority; // for calculate TKIP MIC using
2285} RX_BLK; 2178} RX_BLK;
2286 2179
2287
2288#define RX_BLK_SET_FLAG(_pRxBlk, _flag) (_pRxBlk->Flags |= _flag) 2180#define RX_BLK_SET_FLAG(_pRxBlk, _flag) (_pRxBlk->Flags |= _flag)
2289#define RX_BLK_TEST_FLAG(_pRxBlk, _flag) (_pRxBlk->Flags & _flag) 2181#define RX_BLK_TEST_FLAG(_pRxBlk, _flag) (_pRxBlk->Flags & _flag)
2290#define RX_BLK_CLEAR_FLAG(_pRxBlk, _flag) (_pRxBlk->Flags &= ~(_flag)) 2182#define RX_BLK_CLEAR_FLAG(_pRxBlk, _flag) (_pRxBlk->Flags &= ~(_flag))
2291 2183
2292
2293#define fRX_WDS 0x0001 2184#define fRX_WDS 0x0001
2294#define fRX_AMSDU 0x0002 2185#define fRX_AMSDU 0x0002
2295#define fRX_ARALINK 0x0004 2186#define fRX_ARALINK 0x0004
@@ -2308,7 +2199,6 @@ typedef struct _RX_BLK_
2308#define LENGTH_ARALINK_SUBFRAMEHEAD 14 2199#define LENGTH_ARALINK_SUBFRAMEHEAD 14
2309#define LENGTH_ARALINK_HEADER_FIELD 2 2200#define LENGTH_ARALINK_HEADER_FIELD 2
2310 2201
2311
2312/*************************************************************************** 2202/***************************************************************************
2313 * Tx Path software control block related data structures 2203 * Tx Path software control block related data structures
2314 **************************************************************************/ 2204 **************************************************************************/
@@ -2320,50 +2210,45 @@ typedef struct _RX_BLK_
2320#define TX_RALINK_FRAME 0x10 2210#define TX_RALINK_FRAME 0x10
2321#define TX_FRAG_FRAME 0x20 2211#define TX_FRAG_FRAME 0x20
2322 2212
2213// Currently the sizeof(TX_BLK) is 148 bytes.
2214typedef struct _TX_BLK_ {
2215 UCHAR QueIdx;
2216 UCHAR TxFrameType; // Indicate the Transmission type of the all frames in one batch
2217 UCHAR TotalFrameNum; // Total frame number want to send-out in one batch
2218 USHORT TotalFragNum; // Total frame fragments required in one batch
2219 USHORT TotalFrameLen; // Total length of all frames want to send-out in one batch
2323 2220
2324// Currently the sizeof(TX_BLK) is 148 bytes. 2221 QUEUE_HEADER TxPacketList;
2325typedef struct _TX_BLK_ 2222 MAC_TABLE_ENTRY *pMacEntry; // NULL: packet with 802.11 RA field is multicast/broadcast address
2326{ 2223 HTTRANSMIT_SETTING *pTransmit;
2327 UCHAR QueIdx;
2328 UCHAR TxFrameType; // Indicate the Transmission type of the all frames in one batch
2329 UCHAR TotalFrameNum; // Total frame number want to send-out in one batch
2330 USHORT TotalFragNum; // Total frame fragments required in one batch
2331 USHORT TotalFrameLen; // Total length of all frames want to send-out in one batch
2332
2333 QUEUE_HEADER TxPacketList;
2334 MAC_TABLE_ENTRY *pMacEntry; // NULL: packet with 802.11 RA field is multicast/broadcast address
2335 HTTRANSMIT_SETTING *pTransmit;
2336 2224
2337 // Following structure used for the characteristics of a specific packet. 2225 // Following structure used for the characteristics of a specific packet.
2338 PNDIS_PACKET pPacket; 2226 PNDIS_PACKET pPacket;
2339 PUCHAR pSrcBufHeader; // Reference to the head of sk_buff->data 2227 PUCHAR pSrcBufHeader; // Reference to the head of sk_buff->data
2340 PUCHAR pSrcBufData; // Reference to the sk_buff->data, will changed depends on hanlding progresss 2228 PUCHAR pSrcBufData; // Reference to the sk_buff->data, will changed depends on hanlding progresss
2341 UINT SrcBufLen; // Length of packet payload which not including Layer 2 header 2229 UINT SrcBufLen; // Length of packet payload which not including Layer 2 header
2342 PUCHAR pExtraLlcSnapEncap; // NULL means no extra LLC/SNAP is required 2230 PUCHAR pExtraLlcSnapEncap; // NULL means no extra LLC/SNAP is required
2343 UCHAR HeaderBuf[128]; // TempBuffer for TX_INFO + TX_WI + 802.11 Header + padding + AMSDU SubHeader + LLC/SNAP 2231 UCHAR HeaderBuf[128]; // TempBuffer for TX_INFO + TX_WI + 802.11 Header + padding + AMSDU SubHeader + LLC/SNAP
2344 //RT2870 2.1.0.0 uses only 80 bytes 2232 //RT2870 2.1.0.0 uses only 80 bytes
2345 //RT3070 2.1.1.0 uses only 96 bytes 2233 //RT3070 2.1.1.0 uses only 96 bytes
2346 //RT3090 2.1.0.0 uses only 96 bytes 2234 //RT3090 2.1.0.0 uses only 96 bytes
2347 UCHAR MpduHeaderLen; // 802.11 header length NOT including the padding 2235 UCHAR MpduHeaderLen; // 802.11 header length NOT including the padding
2348 UCHAR HdrPadLen; // recording Header Padding Length; 2236 UCHAR HdrPadLen; // recording Header Padding Length;
2349 UCHAR apidx; // The interface associated to this packet 2237 UCHAR apidx; // The interface associated to this packet
2350 UCHAR Wcid; // The MAC entry associated to this packet 2238 UCHAR Wcid; // The MAC entry associated to this packet
2351 UCHAR UserPriority; // priority class of packet 2239 UCHAR UserPriority; // priority class of packet
2352 UCHAR FrameGap; // what kind of IFS this packet use 2240 UCHAR FrameGap; // what kind of IFS this packet use
2353 UCHAR MpduReqNum; // number of fragments of this frame 2241 UCHAR MpduReqNum; // number of fragments of this frame
2354 UCHAR TxRate; // TODO: Obsoleted? Should change to MCS? 2242 UCHAR TxRate; // TODO: Obsoleted? Should change to MCS?
2355 UCHAR CipherAlg; // cipher alogrithm 2243 UCHAR CipherAlg; // cipher alogrithm
2356 PCIPHER_KEY pKey; 2244 PCIPHER_KEY pKey;
2357 2245
2358 2246 USHORT Flags; //See following definitions for detail.
2359
2360 USHORT Flags; //See following definitions for detail.
2361 2247
2362 //YOU SHOULD NOT TOUCH IT! Following parameters are used for hardware-depended layer. 2248 //YOU SHOULD NOT TOUCH IT! Following parameters are used for hardware-depended layer.
2363 ULONG Priv; // Hardware specific value saved in here. 2249 ULONG Priv; // Hardware specific value saved in here.
2364} TX_BLK, *PTX_BLK; 2250} TX_BLK, *PTX_BLK;
2365 2251
2366
2367#define fTX_bRtsRequired 0x0001 // Indicate if need send RTS frame for protection. Not used in RT2860/RT2870. 2252#define fTX_bRtsRequired 0x0001 // Indicate if need send RTS frame for protection. Not used in RT2860/RT2870.
2368#define fTX_bAckRequired 0x0002 // the packet need ack response 2253#define fTX_bAckRequired 0x0002 // the packet need ack response
2369#define fTX_bPiggyBack 0x0004 // Legacy device use Piggback or not 2254#define fTX_bPiggyBack 0x0004 // Legacy device use Piggback or not
@@ -2378,18 +2263,12 @@ typedef struct _TX_BLK_
2378#define TX_BLK_TEST_FLAG(_pTxBlk, _flag) (((_pTxBlk->Flags & _flag) == _flag) ? 1 : 0) 2263#define TX_BLK_TEST_FLAG(_pTxBlk, _flag) (((_pTxBlk->Flags & _flag) == _flag) ? 1 : 0)
2379#define TX_BLK_CLEAR_FLAG(_pTxBlk, _flag) (_pTxBlk->Flags &= ~(_flag)) 2264#define TX_BLK_CLEAR_FLAG(_pTxBlk, _flag) (_pTxBlk->Flags &= ~(_flag))
2380 2265
2381
2382
2383
2384
2385
2386/*************************************************************************** 2266/***************************************************************************
2387 * Other static inline function definitions 2267 * Other static inline function definitions
2388 **************************************************************************/ 2268 **************************************************************************/
2389static inline VOID ConvertMulticastIP2MAC( 2269static inline VOID ConvertMulticastIP2MAC(IN PUCHAR pIpAddr,
2390 IN PUCHAR pIpAddr, 2270 IN PUCHAR * ppMacAddr,
2391 IN PUCHAR *ppMacAddr, 2271 IN UINT16 ProtoType)
2392 IN UINT16 ProtoType)
2393{ 2272{
2394 if (pIpAddr == NULL) 2273 if (pIpAddr == NULL)
2395 return; 2274 return;
@@ -2397,569 +2276,348 @@ static inline VOID ConvertMulticastIP2MAC(
2397 if (ppMacAddr == NULL || *ppMacAddr == NULL) 2276 if (ppMacAddr == NULL || *ppMacAddr == NULL)
2398 return; 2277 return;
2399 2278
2400 switch (ProtoType) 2279 switch (ProtoType) {
2401 { 2280 case ETH_P_IPV6:
2402 case ETH_P_IPV6: 2281// memset(*ppMacAddr, 0, ETH_LENGTH_OF_ADDRESS);
2403// memset(*ppMacAddr, 0, ETH_LENGTH_OF_ADDRESS); 2282 *(*ppMacAddr) = 0x33;
2404 *(*ppMacAddr) = 0x33; 2283 *(*ppMacAddr + 1) = 0x33;
2405 *(*ppMacAddr + 1) = 0x33; 2284 *(*ppMacAddr + 2) = pIpAddr[12];
2406 *(*ppMacAddr + 2) = pIpAddr[12]; 2285 *(*ppMacAddr + 3) = pIpAddr[13];
2407 *(*ppMacAddr + 3) = pIpAddr[13]; 2286 *(*ppMacAddr + 4) = pIpAddr[14];
2408 *(*ppMacAddr + 4) = pIpAddr[14]; 2287 *(*ppMacAddr + 5) = pIpAddr[15];
2409 *(*ppMacAddr + 5) = pIpAddr[15]; 2288 break;
2410 break; 2289
2411 2290 case ETH_P_IP:
2412 case ETH_P_IP: 2291 default:
2413 default: 2292// memset(*ppMacAddr, 0, ETH_LENGTH_OF_ADDRESS);
2414// memset(*ppMacAddr, 0, ETH_LENGTH_OF_ADDRESS); 2293 *(*ppMacAddr) = 0x01;
2415 *(*ppMacAddr) = 0x01; 2294 *(*ppMacAddr + 1) = 0x00;
2416 *(*ppMacAddr + 1) = 0x00; 2295 *(*ppMacAddr + 2) = 0x5e;
2417 *(*ppMacAddr + 2) = 0x5e; 2296 *(*ppMacAddr + 3) = pIpAddr[1] & 0x7f;
2418 *(*ppMacAddr + 3) = pIpAddr[1] & 0x7f; 2297 *(*ppMacAddr + 4) = pIpAddr[2];
2419 *(*ppMacAddr + 4) = pIpAddr[2]; 2298 *(*ppMacAddr + 5) = pIpAddr[3];
2420 *(*ppMacAddr + 5) = pIpAddr[3]; 2299 break;
2421 break;
2422 } 2300 }
2423 2301
2424 return; 2302 return;
2425} 2303}
2426 2304
2427
2428char *GetPhyMode(int Mode); 2305char *GetPhyMode(int Mode);
2429char* GetBW(int BW); 2306char *GetBW(int BW);
2430 2307
2431// 2308//
2432// Private routines in rtmp_init.c 2309// Private routines in rtmp_init.c
2433// 2310//
2434NDIS_STATUS RTMPAllocAdapterBlock( 2311NDIS_STATUS RTMPAllocAdapterBlock(IN PVOID handle,
2435 IN PVOID handle, 2312 OUT PRTMP_ADAPTER * ppAdapter);
2436 OUT PRTMP_ADAPTER *ppAdapter);
2437 2313
2438NDIS_STATUS RTMPAllocTxRxRingMemory( 2314NDIS_STATUS RTMPAllocTxRxRingMemory(IN PRTMP_ADAPTER pAd);
2439 IN PRTMP_ADAPTER pAd);
2440 2315
2441VOID RTMPFreeAdapter( 2316VOID RTMPFreeAdapter(IN PRTMP_ADAPTER pAd);
2442 IN PRTMP_ADAPTER pAd);
2443 2317
2444NDIS_STATUS NICReadRegParameters( 2318NDIS_STATUS NICReadRegParameters(IN PRTMP_ADAPTER pAd,
2445 IN PRTMP_ADAPTER pAd, 2319 IN NDIS_HANDLE WrapperConfigurationContext);
2446 IN NDIS_HANDLE WrapperConfigurationContext);
2447 2320
2448#ifdef RTMP_RF_RW_SUPPORT 2321#ifdef RTMP_RF_RW_SUPPORT
2449VOID NICInitRFRegisters( 2322VOID NICInitRFRegisters(IN PRTMP_ADAPTER pAd);
2450 IN PRTMP_ADAPTER pAd);
2451 2323
2452VOID RtmpChipOpsRFHook( 2324VOID RtmpChipOpsRFHook(IN RTMP_ADAPTER * pAd);
2453 IN RTMP_ADAPTER *pAd);
2454 2325
2455NDIS_STATUS RT30xxWriteRFRegister( 2326NDIS_STATUS RT30xxWriteRFRegister(IN PRTMP_ADAPTER pAd,
2456 IN PRTMP_ADAPTER pAd, 2327 IN UCHAR regID, IN UCHAR value);
2457 IN UCHAR regID,
2458 IN UCHAR value);
2459 2328
2460NDIS_STATUS RT30xxReadRFRegister( 2329NDIS_STATUS RT30xxReadRFRegister(IN PRTMP_ADAPTER pAd,
2461 IN PRTMP_ADAPTER pAd, 2330 IN UCHAR regID, IN PUCHAR pValue);
2462 IN UCHAR regID,
2463 IN PUCHAR pValue);
2464#endif // RTMP_RF_RW_SUPPORT // 2331#endif // RTMP_RF_RW_SUPPORT //
2465 2332
2466VOID NICReadEEPROMParameters( 2333VOID NICReadEEPROMParameters(IN PRTMP_ADAPTER pAd, IN PUCHAR mac_addr);
2467 IN PRTMP_ADAPTER pAd,
2468 IN PUCHAR mac_addr);
2469 2334
2470VOID NICInitAsicFromEEPROM( 2335VOID NICInitAsicFromEEPROM(IN PRTMP_ADAPTER pAd);
2471 IN PRTMP_ADAPTER pAd);
2472 2336
2337NDIS_STATUS NICInitializeAdapter(IN PRTMP_ADAPTER pAd, IN BOOLEAN bHardReset);
2473 2338
2474NDIS_STATUS NICInitializeAdapter( 2339NDIS_STATUS NICInitializeAsic(IN PRTMP_ADAPTER pAd, IN BOOLEAN bHardReset);
2475 IN PRTMP_ADAPTER pAd,
2476 IN BOOLEAN bHardReset);
2477 2340
2478NDIS_STATUS NICInitializeAsic( 2341VOID NICIssueReset(IN PRTMP_ADAPTER pAd);
2479 IN PRTMP_ADAPTER pAd,
2480 IN BOOLEAN bHardReset);
2481 2342
2482VOID NICIssueReset( 2343VOID RTMPRingCleanUp(IN PRTMP_ADAPTER pAd, IN UCHAR RingType);
2483 IN PRTMP_ADAPTER pAd);
2484 2344
2485VOID RTMPRingCleanUp( 2345VOID UserCfgInit(IN PRTMP_ADAPTER pAd);
2486 IN PRTMP_ADAPTER pAd,
2487 IN UCHAR RingType);
2488 2346
2489VOID UserCfgInit( 2347VOID NICResetFromError(IN PRTMP_ADAPTER pAd);
2490 IN PRTMP_ADAPTER pAd);
2491 2348
2492VOID NICResetFromError( 2349NDIS_STATUS NICLoadFirmware(IN PRTMP_ADAPTER pAd);
2493 IN PRTMP_ADAPTER pAd);
2494 2350
2495NDIS_STATUS NICLoadFirmware( 2351VOID NICEraseFirmware(IN PRTMP_ADAPTER pAd);
2496 IN PRTMP_ADAPTER pAd);
2497 2352
2498VOID NICEraseFirmware( 2353NDIS_STATUS NICLoadRateSwitchingParams(IN PRTMP_ADAPTER pAd);
2499 IN PRTMP_ADAPTER pAd);
2500 2354
2501NDIS_STATUS NICLoadRateSwitchingParams( 2355BOOLEAN NICCheckForHang(IN PRTMP_ADAPTER pAd);
2502 IN PRTMP_ADAPTER pAd);
2503 2356
2504BOOLEAN NICCheckForHang( 2357VOID NICUpdateFifoStaCounters(IN PRTMP_ADAPTER pAd);
2505 IN PRTMP_ADAPTER pAd);
2506 2358
2507VOID NICUpdateFifoStaCounters( 2359VOID NICUpdateRawCounters(IN PRTMP_ADAPTER pAd);
2508 IN PRTMP_ADAPTER pAd);
2509 2360
2510VOID NICUpdateRawCounters( 2361VOID RTMPZeroMemory(IN PVOID pSrc, IN ULONG Length);
2511 IN PRTMP_ADAPTER pAd);
2512 2362
2513VOID RTMPZeroMemory( 2363ULONG RTMPCompareMemory(IN PVOID pSrc1, IN PVOID pSrc2, IN ULONG Length);
2514 IN PVOID pSrc,
2515 IN ULONG Length);
2516 2364
2517ULONG RTMPCompareMemory( 2365VOID RTMPMoveMemory(OUT PVOID pDest, IN PVOID pSrc, IN ULONG Length);
2518 IN PVOID pSrc1,
2519 IN PVOID pSrc2,
2520 IN ULONG Length);
2521 2366
2522VOID RTMPMoveMemory( 2367VOID AtoH(PSTRING src, PUCHAR dest, int destlen);
2523 OUT PVOID pDest,
2524 IN PVOID pSrc,
2525 IN ULONG Length);
2526 2368
2527VOID AtoH( 2369UCHAR BtoH(char ch);
2528 PSTRING src,
2529 PUCHAR dest,
2530 int destlen);
2531 2370
2532UCHAR BtoH( 2371VOID RTMPPatchMacBbpBug(IN PRTMP_ADAPTER pAd);
2533 char ch);
2534 2372
2535VOID RTMPPatchMacBbpBug( 2373VOID RTMPInitTimer(IN PRTMP_ADAPTER pAd,
2536 IN PRTMP_ADAPTER pAd); 2374 IN PRALINK_TIMER_STRUCT pTimer,
2375 IN PVOID pTimerFunc, IN PVOID pData, IN BOOLEAN Repeat);
2537 2376
2538VOID RTMPInitTimer( 2377VOID RTMPSetTimer(IN PRALINK_TIMER_STRUCT pTimer, IN ULONG Value);
2539 IN PRTMP_ADAPTER pAd,
2540 IN PRALINK_TIMER_STRUCT pTimer,
2541 IN PVOID pTimerFunc,
2542 IN PVOID pData,
2543 IN BOOLEAN Repeat);
2544 2378
2545VOID RTMPSetTimer( 2379VOID RTMPModTimer(IN PRALINK_TIMER_STRUCT pTimer, IN ULONG Value);
2546 IN PRALINK_TIMER_STRUCT pTimer,
2547 IN ULONG Value);
2548 2380
2381VOID RTMPCancelTimer(IN PRALINK_TIMER_STRUCT pTimer, OUT BOOLEAN * pCancelled);
2549 2382
2550VOID RTMPModTimer( 2383VOID RTMPSetLED(IN PRTMP_ADAPTER pAd, IN UCHAR Status);
2551 IN PRALINK_TIMER_STRUCT pTimer,
2552 IN ULONG Value);
2553 2384
2554VOID RTMPCancelTimer( 2385VOID RTMPSetSignalLED(IN PRTMP_ADAPTER pAd, IN NDIS_802_11_RSSI Dbm);
2555 IN PRALINK_TIMER_STRUCT pTimer,
2556 OUT BOOLEAN *pCancelled);
2557 2386
2558VOID RTMPSetLED( 2387VOID RTMPEnableRxTx(IN PRTMP_ADAPTER pAd);
2559 IN PRTMP_ADAPTER pAd,
2560 IN UCHAR Status);
2561
2562VOID RTMPSetSignalLED(
2563 IN PRTMP_ADAPTER pAd,
2564 IN NDIS_802_11_RSSI Dbm);
2565
2566VOID RTMPEnableRxTx(
2567 IN PRTMP_ADAPTER pAd);
2568 2388
2569// 2389//
2570// prototype in action.c 2390// prototype in action.c
2571// 2391//
2572VOID ActionStateMachineInit( 2392VOID ActionStateMachineInit(IN PRTMP_ADAPTER pAd,
2573 IN PRTMP_ADAPTER pAd, 2393 IN STATE_MACHINE * S,
2574 IN STATE_MACHINE *S, 2394 OUT STATE_MACHINE_FUNC Trans[]);
2575 OUT STATE_MACHINE_FUNC Trans[]); 2395
2576 2396VOID MlmeADDBAAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2577VOID MlmeADDBAAction( 2397
2578 IN PRTMP_ADAPTER pAd, 2398VOID MlmeDELBAAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2579 IN MLME_QUEUE_ELEM *Elem); 2399
2580 2400VOID MlmeDLSAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2581VOID MlmeDELBAAction( 2401
2582 IN PRTMP_ADAPTER pAd, 2402VOID MlmeInvalidAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2583 IN MLME_QUEUE_ELEM *Elem); 2403
2584 2404VOID MlmeQOSAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2585VOID MlmeDLSAction( 2405
2586 IN PRTMP_ADAPTER pAd, 2406VOID PeerAddBAReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2587 IN MLME_QUEUE_ELEM *Elem); 2407
2588 2408VOID PeerAddBARspAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2589VOID MlmeInvalidAction( 2409
2590 IN PRTMP_ADAPTER pAd, 2410VOID PeerDelBAAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2591 IN MLME_QUEUE_ELEM *Elem); 2411
2592 2412VOID PeerBAAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2593VOID MlmeQOSAction( 2413
2594 IN PRTMP_ADAPTER pAd, 2414VOID SendPSMPAction(IN PRTMP_ADAPTER pAd, IN UCHAR Wcid, IN UCHAR Psmp);
2595 IN MLME_QUEUE_ELEM *Elem); 2415
2596 2416VOID PeerRMAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2597VOID PeerAddBAReqAction( 2417
2598 IN PRTMP_ADAPTER pAd, 2418VOID PeerPublicAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2599 IN MLME_QUEUE_ELEM *Elem); 2419
2600 2420VOID PeerHTAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2601VOID PeerAddBARspAction( 2421
2602 IN PRTMP_ADAPTER pAd, 2422VOID PeerQOSAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2603 IN MLME_QUEUE_ELEM *Elem); 2423
2604 2424VOID RECBATimerTimeout(IN PVOID SystemSpecific1,
2605VOID PeerDelBAAction( 2425 IN PVOID FunctionContext,
2606 IN PRTMP_ADAPTER pAd, 2426 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
2607 IN MLME_QUEUE_ELEM *Elem); 2427
2608 2428VOID ORIBATimerTimeout(IN PRTMP_ADAPTER pAd);
2609VOID PeerBAAction( 2429
2610 IN PRTMP_ADAPTER pAd, 2430VOID SendRefreshBAR(IN PRTMP_ADAPTER pAd, IN MAC_TABLE_ENTRY * pEntry);
2611 IN MLME_QUEUE_ELEM *Elem); 2431
2612 2432VOID ActHeaderInit(IN PRTMP_ADAPTER pAd,
2613VOID SendPSMPAction( 2433 IN OUT PHEADER_802_11 pHdr80211,
2614 IN PRTMP_ADAPTER pAd, 2434 IN PUCHAR Addr1, IN PUCHAR Addr2, IN PUCHAR Addr3);
2615 IN UCHAR Wcid, 2435
2616 IN UCHAR Psmp); 2436VOID BarHeaderInit(IN PRTMP_ADAPTER pAd,
2617 2437 IN OUT PFRAME_BAR pCntlBar, IN PUCHAR pDA, IN PUCHAR pSA);
2618VOID PeerRMAction( 2438
2619 IN PRTMP_ADAPTER pAd, 2439VOID InsertActField(IN PRTMP_ADAPTER pAd,
2620 IN MLME_QUEUE_ELEM *Elem); 2440 OUT PUCHAR pFrameBuf,
2621 2441 OUT PULONG pFrameLen, IN UINT8 Category, IN UINT8 ActCode);
2622VOID PeerPublicAction( 2442
2623 IN PRTMP_ADAPTER pAd, 2443BOOLEAN CntlEnqueueForRecv(IN PRTMP_ADAPTER pAd,
2624 IN MLME_QUEUE_ELEM *Elem); 2444 IN ULONG Wcid,
2625 2445 IN ULONG MsgLen, IN PFRAME_BA_REQ pMsg);
2626VOID PeerHTAction(
2627 IN PRTMP_ADAPTER pAd,
2628 IN MLME_QUEUE_ELEM *Elem);
2629
2630VOID PeerQOSAction(
2631 IN PRTMP_ADAPTER pAd,
2632 IN MLME_QUEUE_ELEM *Elem);
2633
2634VOID RECBATimerTimeout(
2635 IN PVOID SystemSpecific1,
2636 IN PVOID FunctionContext,
2637 IN PVOID SystemSpecific2,
2638 IN PVOID SystemSpecific3);
2639
2640VOID ORIBATimerTimeout(
2641 IN PRTMP_ADAPTER pAd);
2642
2643VOID SendRefreshBAR(
2644 IN PRTMP_ADAPTER pAd,
2645 IN MAC_TABLE_ENTRY *pEntry);
2646
2647
2648VOID ActHeaderInit(
2649 IN PRTMP_ADAPTER pAd,
2650 IN OUT PHEADER_802_11 pHdr80211,
2651 IN PUCHAR Addr1,
2652 IN PUCHAR Addr2,
2653 IN PUCHAR Addr3);
2654
2655VOID BarHeaderInit(
2656 IN PRTMP_ADAPTER pAd,
2657 IN OUT PFRAME_BAR pCntlBar,
2658 IN PUCHAR pDA,
2659 IN PUCHAR pSA);
2660
2661VOID InsertActField(
2662 IN PRTMP_ADAPTER pAd,
2663 OUT PUCHAR pFrameBuf,
2664 OUT PULONG pFrameLen,
2665 IN UINT8 Category,
2666 IN UINT8 ActCode);
2667
2668BOOLEAN CntlEnqueueForRecv(
2669 IN PRTMP_ADAPTER pAd,
2670 IN ULONG Wcid,
2671 IN ULONG MsgLen,
2672 IN PFRAME_BA_REQ pMsg);
2673 2446
2674// 2447//
2675// Private routines in rtmp_data.c 2448// Private routines in rtmp_data.c
2676// 2449//
2677BOOLEAN RTMPHandleRxDoneInterrupt( 2450BOOLEAN RTMPHandleRxDoneInterrupt(IN PRTMP_ADAPTER pAd);
2678 IN PRTMP_ADAPTER pAd); 2451
2679 2452BOOLEAN RTMPHandleTxRingDmaDoneInterrupt(IN PRTMP_ADAPTER pAd,
2680BOOLEAN RTMPHandleTxRingDmaDoneInterrupt( 2453 IN INT_SOURCE_CSR_STRUC TxRingBitmap);
2681 IN PRTMP_ADAPTER pAd, 2454
2682 IN INT_SOURCE_CSR_STRUC TxRingBitmap); 2455VOID RTMPHandleMgmtRingDmaDoneInterrupt(IN PRTMP_ADAPTER pAd);
2683 2456
2684VOID RTMPHandleMgmtRingDmaDoneInterrupt( 2457VOID RTMPHandleTBTTInterrupt(IN PRTMP_ADAPTER pAd);
2685 IN PRTMP_ADAPTER pAd); 2458
2686 2459VOID RTMPHandlePreTBTTInterrupt(IN PRTMP_ADAPTER pAd);
2687VOID RTMPHandleTBTTInterrupt( 2460
2688 IN PRTMP_ADAPTER pAd); 2461void RTMPHandleTwakeupInterrupt(IN PRTMP_ADAPTER pAd);
2689 2462
2690VOID RTMPHandlePreTBTTInterrupt( 2463VOID RTMPHandleRxCoherentInterrupt(IN PRTMP_ADAPTER pAd);
2691 IN PRTMP_ADAPTER pAd); 2464
2692 2465BOOLEAN TxFrameIsAggregatible(IN PRTMP_ADAPTER pAd,
2693void RTMPHandleTwakeupInterrupt( 2466 IN PUCHAR pPrevAddr1, IN PUCHAR p8023hdr);
2694 IN PRTMP_ADAPTER pAd); 2467
2695 2468BOOLEAN PeerIsAggreOn(IN PRTMP_ADAPTER pAd,
2696VOID RTMPHandleRxCoherentInterrupt( 2469 IN ULONG TxRate, IN PMAC_TABLE_ENTRY pMacEntry);
2697 IN PRTMP_ADAPTER pAd); 2470
2698 2471NDIS_STATUS Sniff2BytesFromNdisBuffer(IN PNDIS_BUFFER pFirstBuffer,
2699BOOLEAN TxFrameIsAggregatible( 2472 IN UCHAR DesiredOffset,
2700 IN PRTMP_ADAPTER pAd, 2473 OUT PUCHAR pByte0, OUT PUCHAR pByte1);
2701 IN PUCHAR pPrevAddr1, 2474
2702 IN PUCHAR p8023hdr); 2475NDIS_STATUS STASendPacket(IN PRTMP_ADAPTER pAd, IN PNDIS_PACKET pPacket);
2703 2476
2704BOOLEAN PeerIsAggreOn( 2477VOID STASendPackets(IN NDIS_HANDLE MiniportAdapterContext,
2705 IN PRTMP_ADAPTER pAd, 2478 IN PPNDIS_PACKET ppPacketArray, IN UINT NumberOfPackets);
2706 IN ULONG TxRate, 2479
2707 IN PMAC_TABLE_ENTRY pMacEntry); 2480VOID RTMPDeQueuePacket(IN PRTMP_ADAPTER pAd,
2708 2481 IN BOOLEAN bIntContext,
2709 2482 IN UCHAR QueIdx, IN UCHAR Max_Tx_Packets);
2710NDIS_STATUS Sniff2BytesFromNdisBuffer( 2483
2711 IN PNDIS_BUFFER pFirstBuffer, 2484NDIS_STATUS RTMPHardTransmit(IN PRTMP_ADAPTER pAd,
2712 IN UCHAR DesiredOffset, 2485 IN PNDIS_PACKET pPacket,
2713 OUT PUCHAR pByte0, 2486 IN UCHAR QueIdx, OUT PULONG pFreeTXDLeft);
2714 OUT PUCHAR pByte1); 2487
2715 2488NDIS_STATUS STAHardTransmit(IN PRTMP_ADAPTER pAd,
2716NDIS_STATUS STASendPacket( 2489 IN TX_BLK * pTxBlk, IN UCHAR QueIdx);
2717 IN PRTMP_ADAPTER pAd, 2490
2718 IN PNDIS_PACKET pPacket); 2491VOID STARxEAPOLFrameIndicate(IN PRTMP_ADAPTER pAd,
2719 2492 IN MAC_TABLE_ENTRY * pEntry,
2720VOID STASendPackets( 2493 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
2721 IN NDIS_HANDLE MiniportAdapterContext, 2494
2722 IN PPNDIS_PACKET ppPacketArray, 2495NDIS_STATUS RTMPFreeTXDRequest(IN PRTMP_ADAPTER pAd,
2723 IN UINT NumberOfPackets); 2496 IN UCHAR RingType,
2724 2497 IN UCHAR NumberRequired, IN PUCHAR FreeNumberIs);
2725VOID RTMPDeQueuePacket( 2498
2726 IN PRTMP_ADAPTER pAd, 2499NDIS_STATUS MlmeHardTransmit(IN PRTMP_ADAPTER pAd,
2727 IN BOOLEAN bIntContext, 2500 IN UCHAR QueIdx, IN PNDIS_PACKET pPacket);
2728 IN UCHAR QueIdx, 2501
2729 IN UCHAR Max_Tx_Packets); 2502NDIS_STATUS MlmeHardTransmitMgmtRing(IN PRTMP_ADAPTER pAd,
2730 2503 IN UCHAR QueIdx, IN PNDIS_PACKET pPacket);
2731NDIS_STATUS RTMPHardTransmit(
2732 IN PRTMP_ADAPTER pAd,
2733 IN PNDIS_PACKET pPacket,
2734 IN UCHAR QueIdx,
2735 OUT PULONG pFreeTXDLeft);
2736
2737NDIS_STATUS STAHardTransmit(
2738 IN PRTMP_ADAPTER pAd,
2739 IN TX_BLK *pTxBlk,
2740 IN UCHAR QueIdx);
2741
2742VOID STARxEAPOLFrameIndicate(
2743 IN PRTMP_ADAPTER pAd,
2744 IN MAC_TABLE_ENTRY *pEntry,
2745 IN RX_BLK *pRxBlk,
2746 IN UCHAR FromWhichBSSID);
2747
2748NDIS_STATUS RTMPFreeTXDRequest(
2749 IN PRTMP_ADAPTER pAd,
2750 IN UCHAR RingType,
2751 IN UCHAR NumberRequired,
2752 IN PUCHAR FreeNumberIs);
2753
2754NDIS_STATUS MlmeHardTransmit(
2755 IN PRTMP_ADAPTER pAd,
2756 IN UCHAR QueIdx,
2757 IN PNDIS_PACKET pPacket);
2758
2759NDIS_STATUS MlmeHardTransmitMgmtRing(
2760 IN PRTMP_ADAPTER pAd,
2761 IN UCHAR QueIdx,
2762 IN PNDIS_PACKET pPacket);
2763 2504
2764#ifdef RTMP_MAC_PCI 2505#ifdef RTMP_MAC_PCI
2765NDIS_STATUS MlmeHardTransmitTxRing( 2506NDIS_STATUS MlmeHardTransmitTxRing(IN PRTMP_ADAPTER pAd,
2766 IN PRTMP_ADAPTER pAd, 2507 IN UCHAR QueIdx, IN PNDIS_PACKET pPacket);
2767 IN UCHAR QueIdx, 2508
2768 IN PNDIS_PACKET pPacket); 2509NDIS_STATUS MlmeDataHardTransmit(IN PRTMP_ADAPTER pAd,
2769 2510 IN UCHAR QueIdx, IN PNDIS_PACKET pPacket);
2770NDIS_STATUS MlmeDataHardTransmit( 2511
2771 IN PRTMP_ADAPTER pAd, 2512VOID RTMPWriteTxDescriptor(IN PRTMP_ADAPTER pAd,
2772 IN UCHAR QueIdx, 2513 IN PTXD_STRUC pTxD, IN BOOLEAN bWIV, IN UCHAR QSEL);
2773 IN PNDIS_PACKET pPacket);
2774
2775VOID RTMPWriteTxDescriptor(
2776 IN PRTMP_ADAPTER pAd,
2777 IN PTXD_STRUC pTxD,
2778 IN BOOLEAN bWIV,
2779 IN UCHAR QSEL);
2780#endif // RTMP_MAC_PCI // 2514#endif // RTMP_MAC_PCI //
2781 2515
2782USHORT RTMPCalcDuration( 2516USHORT RTMPCalcDuration(IN PRTMP_ADAPTER pAd, IN UCHAR Rate, IN ULONG Size);
2783 IN PRTMP_ADAPTER pAd,
2784 IN UCHAR Rate,
2785 IN ULONG Size);
2786
2787VOID RTMPWriteTxWI(
2788 IN PRTMP_ADAPTER pAd,
2789 IN PTXWI_STRUC pTxWI,
2790 IN BOOLEAN FRAG,
2791 IN BOOLEAN CFACK,
2792 IN BOOLEAN InsTimestamp,
2793 IN BOOLEAN AMPDU,
2794 IN BOOLEAN Ack,
2795 IN BOOLEAN NSeq, // HW new a sequence.
2796 IN UCHAR BASize,
2797 IN UCHAR WCID,
2798 IN ULONG Length,
2799 IN UCHAR PID,
2800 IN UCHAR TID,
2801 IN UCHAR TxRate,
2802 IN UCHAR Txopmode,
2803 IN BOOLEAN CfAck,
2804 IN HTTRANSMIT_SETTING *pTransmit);
2805
2806
2807VOID RTMPWriteTxWI_Data(
2808 IN PRTMP_ADAPTER pAd,
2809 IN OUT PTXWI_STRUC pTxWI,
2810 IN TX_BLK *pTxBlk);
2811
2812
2813VOID RTMPWriteTxWI_Cache(
2814 IN PRTMP_ADAPTER pAd,
2815 IN OUT PTXWI_STRUC pTxWI,
2816 IN TX_BLK *pTxBlk);
2817
2818VOID RTMPSuspendMsduTransmission(
2819 IN PRTMP_ADAPTER pAd);
2820
2821VOID RTMPResumeMsduTransmission(
2822 IN PRTMP_ADAPTER pAd);
2823
2824NDIS_STATUS MiniportMMRequest(
2825 IN PRTMP_ADAPTER pAd,
2826 IN UCHAR QueIdx,
2827 IN PUCHAR pData,
2828 IN UINT Length);
2829 2517
2830//+++mark by shiang, now this function merge to MiniportMMRequest() 2518VOID RTMPWriteTxWI(IN PRTMP_ADAPTER pAd, IN PTXWI_STRUC pTxWI, IN BOOLEAN FRAG, IN BOOLEAN CFACK, IN BOOLEAN InsTimestamp, IN BOOLEAN AMPDU, IN BOOLEAN Ack, IN BOOLEAN NSeq, // HW new a sequence.
2831//---mark by shiang, now this function merge to MiniportMMRequest() 2519 IN UCHAR BASize,
2520 IN UCHAR WCID,
2521 IN ULONG Length,
2522 IN UCHAR PID,
2523 IN UCHAR TID,
2524 IN UCHAR TxRate,
2525 IN UCHAR Txopmode,
2526 IN BOOLEAN CfAck, IN HTTRANSMIT_SETTING * pTransmit);
2832 2527
2833VOID RTMPSendNullFrame( 2528VOID RTMPWriteTxWI_Data(IN PRTMP_ADAPTER pAd,
2834 IN PRTMP_ADAPTER pAd, 2529 IN OUT PTXWI_STRUC pTxWI, IN TX_BLK * pTxBlk);
2835 IN UCHAR TxRate,
2836 IN BOOLEAN bQosNull);
2837 2530
2838VOID RTMPSendDisassociationFrame( 2531VOID RTMPWriteTxWI_Cache(IN PRTMP_ADAPTER pAd,
2839 IN PRTMP_ADAPTER pAd); 2532 IN OUT PTXWI_STRUC pTxWI, IN TX_BLK * pTxBlk);
2840 2533
2841VOID RTMPSendRTSFrame( 2534VOID RTMPSuspendMsduTransmission(IN PRTMP_ADAPTER pAd);
2842 IN PRTMP_ADAPTER pAd,
2843 IN PUCHAR pDA,
2844 IN unsigned int NextMpduSize,
2845 IN UCHAR TxRate,
2846 IN UCHAR RTSRate,
2847 IN USHORT AckDuration,
2848 IN UCHAR QueIdx,
2849 IN UCHAR FrameGap);
2850 2535
2851PQUEUE_HEADER RTMPCheckTxSwQueue( 2536VOID RTMPResumeMsduTransmission(IN PRTMP_ADAPTER pAd);
2852 IN PRTMP_ADAPTER pAd, 2537
2853 OUT UCHAR *QueIdx); 2538NDIS_STATUS MiniportMMRequest(IN PRTMP_ADAPTER pAd,
2539 IN UCHAR QueIdx, IN PUCHAR pData, IN UINT Length);
2540
2541//+++mark by shiang, now this function merge to MiniportMMRequest()
2542//---mark by shiang, now this function merge to MiniportMMRequest()
2854 2543
2855VOID RTMPReportMicError( 2544VOID RTMPSendNullFrame(IN PRTMP_ADAPTER pAd,
2856 IN PRTMP_ADAPTER pAd, 2545 IN UCHAR TxRate, IN BOOLEAN bQosNull);
2857 IN PCIPHER_KEY pWpaKey);
2858 2546
2859VOID WpaMicFailureReportFrame( 2547VOID RTMPSendDisassociationFrame(IN PRTMP_ADAPTER pAd);
2860 IN PRTMP_ADAPTER pAd,
2861 IN MLME_QUEUE_ELEM *Elem);
2862 2548
2863VOID WpaDisassocApAndBlockAssoc( 2549VOID RTMPSendRTSFrame(IN PRTMP_ADAPTER pAd,
2864 IN PVOID SystemSpecific1, 2550 IN PUCHAR pDA,
2865 IN PVOID FunctionContext, 2551 IN unsigned int NextMpduSize,
2866 IN PVOID SystemSpecific2, 2552 IN UCHAR TxRate,
2867 IN PVOID SystemSpecific3); 2553 IN UCHAR RTSRate,
2554 IN USHORT AckDuration,
2555 IN UCHAR QueIdx, IN UCHAR FrameGap);
2868 2556
2869VOID WpaStaPairwiseKeySetting( 2557PQUEUE_HEADER RTMPCheckTxSwQueue(IN PRTMP_ADAPTER pAd, OUT UCHAR * QueIdx);
2870 IN PRTMP_ADAPTER pAd);
2871 2558
2872VOID WpaStaGroupKeySetting( 2559VOID RTMPReportMicError(IN PRTMP_ADAPTER pAd, IN PCIPHER_KEY pWpaKey);
2873 IN PRTMP_ADAPTER pAd);
2874 2560
2875NDIS_STATUS RTMPCloneNdisPacket( 2561VOID WpaMicFailureReportFrame(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
2876 IN PRTMP_ADAPTER pAd,
2877 IN BOOLEAN pInsAMSDUHdr,
2878 IN PNDIS_PACKET pInPacket,
2879 OUT PNDIS_PACKET *ppOutPacket);
2880 2562
2881NDIS_STATUS RTMPAllocateNdisPacket( 2563VOID WpaDisassocApAndBlockAssoc(IN PVOID SystemSpecific1,
2882 IN PRTMP_ADAPTER pAd, 2564 IN PVOID FunctionContext,
2883 IN PNDIS_PACKET *pPacket, 2565 IN PVOID SystemSpecific2,
2884 IN PUCHAR pHeader, 2566 IN PVOID SystemSpecific3);
2885 IN UINT HeaderLen,
2886 IN PUCHAR pData,
2887 IN UINT DataLen);
2888 2567
2889VOID RTMPFreeNdisPacket( 2568VOID WpaStaPairwiseKeySetting(IN PRTMP_ADAPTER pAd);
2890 IN PRTMP_ADAPTER pAd,
2891 IN PNDIS_PACKET pPacket);
2892 2569
2893BOOLEAN RTMPFreeTXDUponTxDmaDone( 2570VOID WpaStaGroupKeySetting(IN PRTMP_ADAPTER pAd);
2894 IN PRTMP_ADAPTER pAd,
2895 IN UCHAR QueIdx);
2896 2571
2897BOOLEAN RTMPCheckDHCPFrame( 2572NDIS_STATUS RTMPCloneNdisPacket(IN PRTMP_ADAPTER pAd,
2898 IN PRTMP_ADAPTER pAd, 2573 IN BOOLEAN pInsAMSDUHdr,
2899 IN PNDIS_PACKET pPacket); 2574 IN PNDIS_PACKET pInPacket,
2575 OUT PNDIS_PACKET * ppOutPacket);
2900 2576
2577NDIS_STATUS RTMPAllocateNdisPacket(IN PRTMP_ADAPTER pAd,
2578 IN PNDIS_PACKET * pPacket,
2579 IN PUCHAR pHeader,
2580 IN UINT HeaderLen,
2581 IN PUCHAR pData, IN UINT DataLen);
2901 2582
2902BOOLEAN RTMPCheckEtherType( 2583VOID RTMPFreeNdisPacket(IN PRTMP_ADAPTER pAd, IN PNDIS_PACKET pPacket);
2903 IN PRTMP_ADAPTER pAd,
2904 IN PNDIS_PACKET pPacket);
2905 2584
2585BOOLEAN RTMPFreeTXDUponTxDmaDone(IN PRTMP_ADAPTER pAd, IN UCHAR QueIdx);
2586
2587BOOLEAN RTMPCheckDHCPFrame(IN PRTMP_ADAPTER pAd, IN PNDIS_PACKET pPacket);
2588
2589BOOLEAN RTMPCheckEtherType(IN PRTMP_ADAPTER pAd, IN PNDIS_PACKET pPacket);
2906 2590
2907// 2591//
2908// Private routines in rtmp_wep.c 2592// Private routines in rtmp_wep.c
2909// 2593//
2910VOID RTMPInitWepEngine( 2594VOID RTMPInitWepEngine(IN PRTMP_ADAPTER pAd,
2911 IN PRTMP_ADAPTER pAd, 2595 IN PUCHAR pKey,
2912 IN PUCHAR pKey, 2596 IN UCHAR KeyId, IN UCHAR KeyLen, IN PUCHAR pDest);
2913 IN UCHAR KeyId, 2597
2914 IN UCHAR KeyLen, 2598VOID RTMPEncryptData(IN PRTMP_ADAPTER pAd,
2915 IN PUCHAR pDest); 2599 IN PUCHAR pSrc, IN PUCHAR pDest, IN UINT Len);
2916 2600
2917VOID RTMPEncryptData( 2601BOOLEAN RTMPSoftDecryptWEP(IN PRTMP_ADAPTER pAd,
2918 IN PRTMP_ADAPTER pAd, 2602 IN PUCHAR pData,
2919 IN PUCHAR pSrc, 2603 IN ULONG DataByteCnt, IN PCIPHER_KEY pGroupKey);
2920 IN PUCHAR pDest, 2604
2921 IN UINT Len); 2605VOID RTMPSetICV(IN PRTMP_ADAPTER pAd, IN PUCHAR pDest);
2922 2606
2923BOOLEAN RTMPSoftDecryptWEP( 2607VOID ARCFOUR_INIT(IN PARCFOURCONTEXT Ctx, IN PUCHAR pKey, IN UINT KeyLen);
2924 IN PRTMP_ADAPTER pAd, 2608
2925 IN PUCHAR pData, 2609UCHAR ARCFOUR_BYTE(IN PARCFOURCONTEXT Ctx);
2926 IN ULONG DataByteCnt, 2610
2927 IN PCIPHER_KEY pGroupKey); 2611VOID ARCFOUR_DECRYPT(IN PARCFOURCONTEXT Ctx,
2928 2612 IN PUCHAR pDest, IN PUCHAR pSrc, IN UINT Len);
2929VOID RTMPSetICV( 2613
2930 IN PRTMP_ADAPTER pAd, 2614VOID ARCFOUR_ENCRYPT(IN PARCFOURCONTEXT Ctx,
2931 IN PUCHAR pDest); 2615 IN PUCHAR pDest, IN PUCHAR pSrc, IN UINT Len);
2932 2616
2933VOID ARCFOUR_INIT( 2617VOID WPAARCFOUR_ENCRYPT(IN PARCFOURCONTEXT Ctx,
2934 IN PARCFOURCONTEXT Ctx, 2618 IN PUCHAR pDest, IN PUCHAR pSrc, IN UINT Len);
2935 IN PUCHAR pKey, 2619
2936 IN UINT KeyLen); 2620UINT RTMP_CALC_FCS32(IN UINT Fcs, IN PUCHAR Cp, IN INT Len);
2937
2938UCHAR ARCFOUR_BYTE(
2939 IN PARCFOURCONTEXT Ctx);
2940
2941VOID ARCFOUR_DECRYPT(
2942 IN PARCFOURCONTEXT Ctx,
2943 IN PUCHAR pDest,
2944 IN PUCHAR pSrc,
2945 IN UINT Len);
2946
2947VOID ARCFOUR_ENCRYPT(
2948 IN PARCFOURCONTEXT Ctx,
2949 IN PUCHAR pDest,
2950 IN PUCHAR pSrc,
2951 IN UINT Len);
2952
2953VOID WPAARCFOUR_ENCRYPT(
2954 IN PARCFOURCONTEXT Ctx,
2955 IN PUCHAR pDest,
2956 IN PUCHAR pSrc,
2957 IN UINT Len);
2958
2959UINT RTMP_CALC_FCS32(
2960 IN UINT Fcs,
2961 IN PUCHAR Cp,
2962 IN INT Len);
2963 2621
2964// 2622//
2965// MLME routines 2623// MLME routines
@@ -2967,515 +2625,312 @@ UINT RTMP_CALC_FCS32(
2967 2625
2968// Asic/RF/BBP related functions 2626// Asic/RF/BBP related functions
2969 2627
2970VOID AsicAdjustTxPower( 2628VOID AsicAdjustTxPower(IN PRTMP_ADAPTER pAd);
2971 IN PRTMP_ADAPTER pAd); 2629
2972 2630VOID AsicUpdateProtect(IN PRTMP_ADAPTER pAd,
2973VOID AsicUpdateProtect( 2631 IN USHORT OperaionMode,
2974 IN PRTMP_ADAPTER pAd, 2632 IN UCHAR SetMask,
2975 IN USHORT OperaionMode, 2633 IN BOOLEAN bDisableBGProtect, IN BOOLEAN bNonGFExist);
2976 IN UCHAR SetMask, 2634
2977 IN BOOLEAN bDisableBGProtect, 2635VOID AsicSwitchChannel(IN PRTMP_ADAPTER pAd,
2978 IN BOOLEAN bNonGFExist); 2636 IN UCHAR Channel, IN BOOLEAN bScan);
2979 2637
2980VOID AsicSwitchChannel( 2638VOID AsicLockChannel(IN PRTMP_ADAPTER pAd, IN UCHAR Channel);
2981 IN PRTMP_ADAPTER pAd, 2639
2982 IN UCHAR Channel, 2640VOID AsicRfTuningExec(IN PVOID SystemSpecific1,
2983 IN BOOLEAN bScan); 2641 IN PVOID FunctionContext,
2984 2642 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
2985VOID AsicLockChannel( 2643
2986 IN PRTMP_ADAPTER pAd, 2644VOID AsicResetBBPAgent(IN PRTMP_ADAPTER pAd);
2987 IN UCHAR Channel) ; 2645
2988 2646VOID AsicSleepThenAutoWakeup(IN PRTMP_ADAPTER pAd,
2989VOID AsicRfTuningExec( 2647 IN USHORT TbttNumToNextWakeUp);
2990 IN PVOID SystemSpecific1, 2648
2991 IN PVOID FunctionContext, 2649VOID AsicForceSleep(IN PRTMP_ADAPTER pAd);
2992 IN PVOID SystemSpecific2, 2650
2993 IN PVOID SystemSpecific3); 2651VOID AsicForceWakeup(IN PRTMP_ADAPTER pAd, IN BOOLEAN bFromTx);
2994 2652
2995VOID AsicResetBBPAgent( 2653VOID AsicSetBssid(IN PRTMP_ADAPTER pAd, IN PUCHAR pBssid);
2996 IN PRTMP_ADAPTER pAd); 2654
2997 2655VOID AsicSetMcastWC(IN PRTMP_ADAPTER pAd);
2998VOID AsicSleepThenAutoWakeup( 2656
2999 IN PRTMP_ADAPTER pAd, 2657VOID AsicDelWcidTab(IN PRTMP_ADAPTER pAd, IN UCHAR Wcid);
3000 IN USHORT TbttNumToNextWakeUp);
3001
3002VOID AsicForceSleep(
3003 IN PRTMP_ADAPTER pAd);
3004
3005VOID AsicForceWakeup(
3006 IN PRTMP_ADAPTER pAd,
3007 IN BOOLEAN bFromTx);
3008
3009VOID AsicSetBssid(
3010 IN PRTMP_ADAPTER pAd,
3011 IN PUCHAR pBssid);
3012
3013VOID AsicSetMcastWC(
3014 IN PRTMP_ADAPTER pAd);
3015
3016VOID AsicDelWcidTab(
3017 IN PRTMP_ADAPTER pAd,
3018 IN UCHAR Wcid);
3019
3020VOID AsicEnableRDG(
3021 IN PRTMP_ADAPTER pAd);
3022
3023VOID AsicDisableRDG(
3024 IN PRTMP_ADAPTER pAd);
3025
3026VOID AsicDisableSync(
3027 IN PRTMP_ADAPTER pAd);
3028
3029VOID AsicEnableBssSync(
3030 IN PRTMP_ADAPTER pAd);
3031
3032VOID AsicEnableIbssSync(
3033 IN PRTMP_ADAPTER pAd);
3034
3035VOID AsicSetEdcaParm(
3036 IN PRTMP_ADAPTER pAd,
3037 IN PEDCA_PARM pEdcaParm);
3038
3039VOID AsicSetSlotTime(
3040 IN PRTMP_ADAPTER pAd,
3041 IN BOOLEAN bUseShortSlotTime);
3042
3043VOID AsicAddSharedKeyEntry(
3044 IN PRTMP_ADAPTER pAd,
3045 IN UCHAR BssIndex,
3046 IN UCHAR KeyIdx,
3047 IN UCHAR CipherAlg,
3048 IN PUCHAR pKey,
3049 IN PUCHAR pTxMic,
3050 IN PUCHAR pRxMic);
3051
3052VOID AsicRemoveSharedKeyEntry(
3053 IN PRTMP_ADAPTER pAd,
3054 IN UCHAR BssIndex,
3055 IN UCHAR KeyIdx);
3056
3057VOID AsicUpdateWCIDAttribute(
3058 IN PRTMP_ADAPTER pAd,
3059 IN USHORT WCID,
3060 IN UCHAR BssIndex,
3061 IN UCHAR CipherAlg,
3062 IN BOOLEAN bUsePairewiseKeyTable);
3063
3064VOID AsicUpdateWCIDIVEIV(
3065 IN PRTMP_ADAPTER pAd,
3066 IN USHORT WCID,
3067 IN ULONG uIV,
3068 IN ULONG uEIV);
3069
3070VOID AsicUpdateRxWCIDTable(
3071 IN PRTMP_ADAPTER pAd,
3072 IN USHORT WCID,
3073 IN PUCHAR pAddr);
3074
3075VOID AsicAddKeyEntry(
3076 IN PRTMP_ADAPTER pAd,
3077 IN USHORT WCID,
3078 IN UCHAR BssIndex,
3079 IN UCHAR KeyIdx,
3080 IN PCIPHER_KEY pCipherKey,
3081 IN BOOLEAN bUsePairewiseKeyTable,
3082 IN BOOLEAN bTxKey);
3083
3084VOID AsicAddPairwiseKeyEntry(
3085 IN PRTMP_ADAPTER pAd,
3086 IN PUCHAR pAddr,
3087 IN UCHAR WCID,
3088 IN CIPHER_KEY *pCipherKey);
3089
3090VOID AsicRemovePairwiseKeyEntry(
3091 IN PRTMP_ADAPTER pAd,
3092 IN UCHAR BssIdx,
3093 IN UCHAR Wcid);
3094
3095BOOLEAN AsicSendCommandToMcu(
3096 IN PRTMP_ADAPTER pAd,
3097 IN UCHAR Command,
3098 IN UCHAR Token,
3099 IN UCHAR Arg0,
3100 IN UCHAR Arg1);
3101 2658
2659VOID AsicEnableRDG(IN PRTMP_ADAPTER pAd);
2660
2661VOID AsicDisableRDG(IN PRTMP_ADAPTER pAd);
2662
2663VOID AsicDisableSync(IN PRTMP_ADAPTER pAd);
2664
2665VOID AsicEnableBssSync(IN PRTMP_ADAPTER pAd);
2666
2667VOID AsicEnableIbssSync(IN PRTMP_ADAPTER pAd);
2668
2669VOID AsicSetEdcaParm(IN PRTMP_ADAPTER pAd, IN PEDCA_PARM pEdcaParm);
2670
2671VOID AsicSetSlotTime(IN PRTMP_ADAPTER pAd, IN BOOLEAN bUseShortSlotTime);
2672
2673VOID AsicAddSharedKeyEntry(IN PRTMP_ADAPTER pAd,
2674 IN UCHAR BssIndex,
2675 IN UCHAR KeyIdx,
2676 IN UCHAR CipherAlg,
2677 IN PUCHAR pKey, IN PUCHAR pTxMic, IN PUCHAR pRxMic);
2678
2679VOID AsicRemoveSharedKeyEntry(IN PRTMP_ADAPTER pAd,
2680 IN UCHAR BssIndex, IN UCHAR KeyIdx);
2681
2682VOID AsicUpdateWCIDAttribute(IN PRTMP_ADAPTER pAd,
2683 IN USHORT WCID,
2684 IN UCHAR BssIndex,
2685 IN UCHAR CipherAlg,
2686 IN BOOLEAN bUsePairewiseKeyTable);
2687
2688VOID AsicUpdateWCIDIVEIV(IN PRTMP_ADAPTER pAd,
2689 IN USHORT WCID, IN ULONG uIV, IN ULONG uEIV);
2690
2691VOID AsicUpdateRxWCIDTable(IN PRTMP_ADAPTER pAd,
2692 IN USHORT WCID, IN PUCHAR pAddr);
2693
2694VOID AsicAddKeyEntry(IN PRTMP_ADAPTER pAd,
2695 IN USHORT WCID,
2696 IN UCHAR BssIndex,
2697 IN UCHAR KeyIdx,
2698 IN PCIPHER_KEY pCipherKey,
2699 IN BOOLEAN bUsePairewiseKeyTable, IN BOOLEAN bTxKey);
2700
2701VOID AsicAddPairwiseKeyEntry(IN PRTMP_ADAPTER pAd,
2702 IN PUCHAR pAddr,
2703 IN UCHAR WCID, IN CIPHER_KEY * pCipherKey);
2704
2705VOID AsicRemovePairwiseKeyEntry(IN PRTMP_ADAPTER pAd,
2706 IN UCHAR BssIdx, IN UCHAR Wcid);
2707
2708BOOLEAN AsicSendCommandToMcu(IN PRTMP_ADAPTER pAd,
2709 IN UCHAR Command,
2710 IN UCHAR Token, IN UCHAR Arg0, IN UCHAR Arg1);
3102 2711
3103#ifdef RTMP_MAC_PCI 2712#ifdef RTMP_MAC_PCI
3104BOOLEAN AsicCheckCommanOk( 2713BOOLEAN AsicCheckCommanOk(IN PRTMP_ADAPTER pAd, IN UCHAR Command);
3105 IN PRTMP_ADAPTER pAd,
3106 IN UCHAR Command);
3107#endif // RTMP_MAC_PCI // 2714#endif // RTMP_MAC_PCI //
3108 2715
3109VOID MacAddrRandomBssid( 2716VOID MacAddrRandomBssid(IN PRTMP_ADAPTER pAd, OUT PUCHAR pAddr);
3110 IN PRTMP_ADAPTER pAd, 2717
3111 OUT PUCHAR pAddr); 2718VOID MgtMacHeaderInit(IN PRTMP_ADAPTER pAd,
3112 2719 IN OUT PHEADER_802_11 pHdr80211,
3113VOID MgtMacHeaderInit( 2720 IN UCHAR SubType,
3114 IN PRTMP_ADAPTER pAd, 2721 IN UCHAR ToDs, IN PUCHAR pDA, IN PUCHAR pBssid);
3115 IN OUT PHEADER_802_11 pHdr80211, 2722
3116 IN UCHAR SubType, 2723VOID MlmeRadioOff(IN PRTMP_ADAPTER pAd);
3117 IN UCHAR ToDs, 2724
3118 IN PUCHAR pDA, 2725VOID MlmeRadioOn(IN PRTMP_ADAPTER pAd);
3119 IN PUCHAR pBssid); 2726
3120 2727VOID BssTableInit(IN BSS_TABLE * Tab);
3121VOID MlmeRadioOff( 2728
3122 IN PRTMP_ADAPTER pAd); 2729VOID BATableInit(IN PRTMP_ADAPTER pAd, IN BA_TABLE * Tab);
3123 2730
3124VOID MlmeRadioOn( 2731ULONG BssTableSearch(IN BSS_TABLE * Tab, IN PUCHAR pBssid, IN UCHAR Channel);
3125 IN PRTMP_ADAPTER pAd); 2732
3126 2733ULONG BssSsidTableSearch(IN BSS_TABLE * Tab,
3127 2734 IN PUCHAR pBssid,
3128VOID BssTableInit( 2735 IN PUCHAR pSsid, IN UCHAR SsidLen, IN UCHAR Channel);
3129 IN BSS_TABLE *Tab); 2736
3130 2737ULONG BssTableSearchWithSSID(IN BSS_TABLE * Tab,
3131VOID BATableInit( 2738 IN PUCHAR Bssid,
3132 IN PRTMP_ADAPTER pAd, 2739 IN PUCHAR pSsid,
3133 IN BA_TABLE *Tab); 2740 IN UCHAR SsidLen, IN UCHAR Channel);
3134 2741
3135ULONG BssTableSearch( 2742ULONG BssSsidTableSearchBySSID(IN BSS_TABLE * Tab,
3136 IN BSS_TABLE *Tab, 2743 IN PUCHAR pSsid, IN UCHAR SsidLen);
3137 IN PUCHAR pBssid, 2744
3138 IN UCHAR Channel); 2745VOID BssTableDeleteEntry(IN OUT PBSS_TABLE pTab,
3139 2746 IN PUCHAR pBssid, IN UCHAR Channel);
3140ULONG BssSsidTableSearch( 2747
3141 IN BSS_TABLE *Tab, 2748VOID BATableDeleteORIEntry(IN OUT PRTMP_ADAPTER pAd,
3142 IN PUCHAR pBssid, 2749 IN BA_ORI_ENTRY * pBAORIEntry);
3143 IN PUCHAR pSsid, 2750
3144 IN UCHAR SsidLen, 2751VOID BssEntrySet(IN PRTMP_ADAPTER pAd, OUT PBSS_ENTRY pBss, IN PUCHAR pBssid, IN CHAR Ssid[], IN UCHAR SsidLen, IN UCHAR BssType, IN USHORT BeaconPeriod, IN PCF_PARM CfParm, IN USHORT AtimWin, IN USHORT CapabilityInfo, IN UCHAR SupRate[], IN UCHAR SupRateLen, IN UCHAR ExtRate[], IN UCHAR ExtRateLen, IN HT_CAPABILITY_IE * pHtCapability, IN ADD_HT_INFO_IE * pAddHtInfo, // AP might use this additional ht info IE
3145 IN UCHAR Channel); 2752 IN UCHAR HtCapabilityLen,
3146 2753 IN UCHAR AddHtInfoLen,
3147ULONG BssTableSearchWithSSID( 2754 IN UCHAR NewExtChanOffset,
3148 IN BSS_TABLE *Tab, 2755 IN UCHAR Channel,
3149 IN PUCHAR Bssid, 2756 IN CHAR Rssi,
3150 IN PUCHAR pSsid, 2757 IN LARGE_INTEGER TimeStamp,
3151 IN UCHAR SsidLen, 2758 IN UCHAR CkipFlag,
3152 IN UCHAR Channel); 2759 IN PEDCA_PARM pEdcaParm,
3153 2760 IN PQOS_CAPABILITY_PARM pQosCapability,
3154ULONG BssSsidTableSearchBySSID( 2761 IN PQBSS_LOAD_PARM pQbssLoad,
3155 IN BSS_TABLE *Tab, 2762 IN USHORT LengthVIE, IN PNDIS_802_11_VARIABLE_IEs pVIE);
3156 IN PUCHAR pSsid, 2763
3157 IN UCHAR SsidLen); 2764ULONG BssTableSetEntry(IN PRTMP_ADAPTER pAd, OUT PBSS_TABLE pTab, IN PUCHAR pBssid, IN CHAR Ssid[], IN UCHAR SsidLen, IN UCHAR BssType, IN USHORT BeaconPeriod, IN CF_PARM * CfParm, IN USHORT AtimWin, IN USHORT CapabilityInfo, IN UCHAR SupRate[], IN UCHAR SupRateLen, IN UCHAR ExtRate[], IN UCHAR ExtRateLen, IN HT_CAPABILITY_IE * pHtCapability, IN ADD_HT_INFO_IE * pAddHtInfo, // AP might use this additional ht info IE
3158 2765 IN UCHAR HtCapabilityLen,
3159VOID BssTableDeleteEntry( 2766 IN UCHAR AddHtInfoLen,
3160 IN OUT PBSS_TABLE pTab, 2767 IN UCHAR NewExtChanOffset,
3161 IN PUCHAR pBssid, 2768 IN UCHAR Channel,
3162 IN UCHAR Channel); 2769 IN CHAR Rssi,
3163 2770 IN LARGE_INTEGER TimeStamp,
3164VOID BATableDeleteORIEntry( 2771 IN UCHAR CkipFlag,
3165 IN OUT PRTMP_ADAPTER pAd, 2772 IN PEDCA_PARM pEdcaParm,
3166 IN BA_ORI_ENTRY *pBAORIEntry); 2773 IN PQOS_CAPABILITY_PARM pQosCapability,
3167 2774 IN PQBSS_LOAD_PARM pQbssLoad,
3168VOID BssEntrySet( 2775 IN USHORT LengthVIE, IN PNDIS_802_11_VARIABLE_IEs pVIE);
3169 IN PRTMP_ADAPTER pAd, 2776
3170 OUT PBSS_ENTRY pBss, 2777VOID BATableInsertEntry(IN PRTMP_ADAPTER pAd,
3171 IN PUCHAR pBssid, 2778 IN USHORT Aid,
3172 IN CHAR Ssid[], 2779 IN USHORT TimeOutValue,
3173 IN UCHAR SsidLen, 2780 IN USHORT StartingSeq,
3174 IN UCHAR BssType, 2781 IN UCHAR TID,
3175 IN USHORT BeaconPeriod, 2782 IN UCHAR BAWinSize,
3176 IN PCF_PARM CfParm, 2783 IN UCHAR OriginatorStatus, IN BOOLEAN IsRecipient);
3177 IN USHORT AtimWin, 2784
3178 IN USHORT CapabilityInfo, 2785VOID BssTableSsidSort(IN PRTMP_ADAPTER pAd,
3179 IN UCHAR SupRate[], 2786 OUT BSS_TABLE * OutTab, IN CHAR Ssid[], IN UCHAR SsidLen);
3180 IN UCHAR SupRateLen, 2787
3181 IN UCHAR ExtRate[], 2788VOID BssTableSortByRssi(IN OUT BSS_TABLE * OutTab);
3182 IN UCHAR ExtRateLen, 2789
3183 IN HT_CAPABILITY_IE *pHtCapability, 2790VOID BssCipherParse(IN OUT PBSS_ENTRY pBss);
3184 IN ADD_HT_INFO_IE *pAddHtInfo, // AP might use this additional ht info IE 2791
3185 IN UCHAR HtCapabilityLen, 2792NDIS_STATUS MlmeQueueInit(IN MLME_QUEUE * Queue);
3186 IN UCHAR AddHtInfoLen, 2793
3187 IN UCHAR NewExtChanOffset, 2794VOID MlmeQueueDestroy(IN MLME_QUEUE * Queue);
3188 IN UCHAR Channel, 2795
3189 IN CHAR Rssi, 2796BOOLEAN MlmeEnqueue(IN PRTMP_ADAPTER pAd,
3190 IN LARGE_INTEGER TimeStamp, 2797 IN ULONG Machine,
3191 IN UCHAR CkipFlag, 2798 IN ULONG MsgType, IN ULONG MsgLen, IN VOID * Msg);
3192 IN PEDCA_PARM pEdcaParm, 2799
3193 IN PQOS_CAPABILITY_PARM pQosCapability, 2800BOOLEAN MlmeEnqueueForRecv(IN PRTMP_ADAPTER pAd,
3194 IN PQBSS_LOAD_PARM pQbssLoad, 2801 IN ULONG Wcid,
3195 IN USHORT LengthVIE, 2802 IN ULONG TimeStampHigh,
3196 IN PNDIS_802_11_VARIABLE_IEs pVIE); 2803 IN ULONG TimeStampLow,
3197 2804 IN UCHAR Rssi0,
3198ULONG BssTableSetEntry( 2805 IN UCHAR Rssi1,
3199 IN PRTMP_ADAPTER pAd, 2806 IN UCHAR Rssi2,
3200 OUT PBSS_TABLE pTab, 2807 IN ULONG MsgLen, IN PVOID Msg, IN UCHAR Signal);
3201 IN PUCHAR pBssid, 2808
3202 IN CHAR Ssid[], 2809BOOLEAN MlmeDequeue(IN MLME_QUEUE * Queue, OUT MLME_QUEUE_ELEM ** Elem);
3203 IN UCHAR SsidLen, 2810
3204 IN UCHAR BssType, 2811VOID MlmeRestartStateMachine(IN PRTMP_ADAPTER pAd);
3205 IN USHORT BeaconPeriod, 2812
3206 IN CF_PARM *CfParm, 2813BOOLEAN MlmeQueueEmpty(IN MLME_QUEUE * Queue);
3207 IN USHORT AtimWin, 2814
3208 IN USHORT CapabilityInfo, 2815BOOLEAN MlmeQueueFull(IN MLME_QUEUE * Queue);
3209 IN UCHAR SupRate[], 2816
3210 IN UCHAR SupRateLen, 2817BOOLEAN MsgTypeSubst(IN PRTMP_ADAPTER pAd,
3211 IN UCHAR ExtRate[], 2818 IN PFRAME_802_11 pFrame,
3212 IN UCHAR ExtRateLen, 2819 OUT INT * Machine, OUT INT * MsgType);
3213 IN HT_CAPABILITY_IE *pHtCapability, 2820
3214 IN ADD_HT_INFO_IE *pAddHtInfo, // AP might use this additional ht info IE 2821VOID StateMachineInit(IN STATE_MACHINE * Sm,
3215 IN UCHAR HtCapabilityLen, 2822 IN STATE_MACHINE_FUNC Trans[],
3216 IN UCHAR AddHtInfoLen, 2823 IN ULONG StNr,
3217 IN UCHAR NewExtChanOffset, 2824 IN ULONG MsgNr,
3218 IN UCHAR Channel, 2825 IN STATE_MACHINE_FUNC DefFunc,
3219 IN CHAR Rssi, 2826 IN ULONG InitState, IN ULONG Base);
3220 IN LARGE_INTEGER TimeStamp, 2827
3221 IN UCHAR CkipFlag, 2828VOID StateMachineSetAction(IN STATE_MACHINE * S,
3222 IN PEDCA_PARM pEdcaParm, 2829 IN ULONG St, ULONG Msg, IN STATE_MACHINE_FUNC F);
3223 IN PQOS_CAPABILITY_PARM pQosCapability, 2830
3224 IN PQBSS_LOAD_PARM pQbssLoad, 2831VOID StateMachinePerformAction(IN PRTMP_ADAPTER pAd,
3225 IN USHORT LengthVIE, 2832 IN STATE_MACHINE * S, IN MLME_QUEUE_ELEM * Elem);
3226 IN PNDIS_802_11_VARIABLE_IEs pVIE); 2833
3227 2834VOID Drop(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3228VOID BATableInsertEntry( 2835
3229 IN PRTMP_ADAPTER pAd, 2836VOID AssocStateMachineInit(IN PRTMP_ADAPTER pAd,
3230 IN USHORT Aid, 2837 IN STATE_MACHINE * Sm,
3231 IN USHORT TimeOutValue, 2838 OUT STATE_MACHINE_FUNC Trans[]);
3232 IN USHORT StartingSeq, 2839
3233 IN UCHAR TID, 2840VOID ReassocTimeout(IN PVOID SystemSpecific1,
3234 IN UCHAR BAWinSize, 2841 IN PVOID FunctionContext,
3235 IN UCHAR OriginatorStatus, 2842 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3236 IN BOOLEAN IsRecipient); 2843
3237 2844VOID AssocTimeout(IN PVOID SystemSpecific1,
3238VOID BssTableSsidSort( 2845 IN PVOID FunctionContext,
3239 IN PRTMP_ADAPTER pAd, 2846 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3240 OUT BSS_TABLE *OutTab, 2847
3241 IN CHAR Ssid[], 2848VOID DisassocTimeout(IN PVOID SystemSpecific1,
3242 IN UCHAR SsidLen); 2849 IN PVOID FunctionContext,
3243 2850 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3244VOID BssTableSortByRssi(
3245 IN OUT BSS_TABLE *OutTab);
3246
3247VOID BssCipherParse(
3248 IN OUT PBSS_ENTRY pBss);
3249
3250NDIS_STATUS MlmeQueueInit(
3251 IN MLME_QUEUE *Queue);
3252
3253VOID MlmeQueueDestroy(
3254 IN MLME_QUEUE *Queue);
3255
3256BOOLEAN MlmeEnqueue(
3257 IN PRTMP_ADAPTER pAd,
3258 IN ULONG Machine,
3259 IN ULONG MsgType,
3260 IN ULONG MsgLen,
3261 IN VOID *Msg);
3262
3263BOOLEAN MlmeEnqueueForRecv(
3264 IN PRTMP_ADAPTER pAd,
3265 IN ULONG Wcid,
3266 IN ULONG TimeStampHigh,
3267 IN ULONG TimeStampLow,
3268 IN UCHAR Rssi0,
3269 IN UCHAR Rssi1,
3270 IN UCHAR Rssi2,
3271 IN ULONG MsgLen,
3272 IN PVOID Msg,
3273 IN UCHAR Signal);
3274
3275
3276BOOLEAN MlmeDequeue(
3277 IN MLME_QUEUE *Queue,
3278 OUT MLME_QUEUE_ELEM **Elem);
3279
3280VOID MlmeRestartStateMachine(
3281 IN PRTMP_ADAPTER pAd);
3282
3283BOOLEAN MlmeQueueEmpty(
3284 IN MLME_QUEUE *Queue);
3285
3286BOOLEAN MlmeQueueFull(
3287 IN MLME_QUEUE *Queue);
3288
3289BOOLEAN MsgTypeSubst(
3290 IN PRTMP_ADAPTER pAd,
3291 IN PFRAME_802_11 pFrame,
3292 OUT INT *Machine,
3293 OUT INT *MsgType);
3294
3295VOID StateMachineInit(
3296 IN STATE_MACHINE *Sm,
3297 IN STATE_MACHINE_FUNC Trans[],
3298 IN ULONG StNr,
3299 IN ULONG MsgNr,
3300 IN STATE_MACHINE_FUNC DefFunc,
3301 IN ULONG InitState,
3302 IN ULONG Base);
3303
3304VOID StateMachineSetAction(
3305 IN STATE_MACHINE *S,
3306 IN ULONG St,
3307 ULONG Msg,
3308 IN STATE_MACHINE_FUNC F);
3309
3310VOID StateMachinePerformAction(
3311 IN PRTMP_ADAPTER pAd,
3312 IN STATE_MACHINE *S,
3313 IN MLME_QUEUE_ELEM *Elem);
3314
3315VOID Drop(
3316 IN PRTMP_ADAPTER pAd,
3317 IN MLME_QUEUE_ELEM *Elem);
3318
3319VOID AssocStateMachineInit(
3320 IN PRTMP_ADAPTER pAd,
3321 IN STATE_MACHINE *Sm,
3322 OUT STATE_MACHINE_FUNC Trans[]);
3323
3324VOID ReassocTimeout(
3325 IN PVOID SystemSpecific1,
3326 IN PVOID FunctionContext,
3327 IN PVOID SystemSpecific2,
3328 IN PVOID SystemSpecific3);
3329
3330VOID AssocTimeout(
3331 IN PVOID SystemSpecific1,
3332 IN PVOID FunctionContext,
3333 IN PVOID SystemSpecific2,
3334 IN PVOID SystemSpecific3);
3335
3336VOID DisassocTimeout(
3337 IN PVOID SystemSpecific1,
3338 IN PVOID FunctionContext,
3339 IN PVOID SystemSpecific2,
3340 IN PVOID SystemSpecific3);
3341 2851
3342//---------------------------------------------- 2852//----------------------------------------------
3343VOID MlmeAssocReqAction( 2853VOID MlmeAssocReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3344 IN PRTMP_ADAPTER pAd,
3345 IN MLME_QUEUE_ELEM *Elem);
3346 2854
3347VOID MlmeReassocReqAction( 2855VOID MlmeReassocReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3348 IN PRTMP_ADAPTER pAd,
3349 IN MLME_QUEUE_ELEM *Elem);
3350 2856
3351VOID MlmeDisassocReqAction( 2857VOID MlmeDisassocReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3352 IN PRTMP_ADAPTER pAd,
3353 IN MLME_QUEUE_ELEM *Elem);
3354 2858
3355VOID PeerAssocRspAction( 2859VOID PeerAssocRspAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3356 IN PRTMP_ADAPTER pAd,
3357 IN MLME_QUEUE_ELEM *Elem);
3358 2860
3359VOID PeerReassocRspAction( 2861VOID PeerReassocRspAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3360 IN PRTMP_ADAPTER pAd,
3361 IN MLME_QUEUE_ELEM *Elem);
3362 2862
3363VOID PeerDisassocAction( 2863VOID PeerDisassocAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3364 IN PRTMP_ADAPTER pAd,
3365 IN MLME_QUEUE_ELEM *Elem);
3366 2864
3367VOID DisassocTimeoutAction( 2865VOID DisassocTimeoutAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3368 IN PRTMP_ADAPTER pAd,
3369 IN MLME_QUEUE_ELEM *Elem);
3370 2866
3371VOID AssocTimeoutAction( 2867VOID AssocTimeoutAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3372 IN PRTMP_ADAPTER pAd,
3373 IN MLME_QUEUE_ELEM *Elem);
3374 2868
3375VOID ReassocTimeoutAction( 2869VOID ReassocTimeoutAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3376 IN PRTMP_ADAPTER pAd,
3377 IN MLME_QUEUE_ELEM *Elem);
3378 2870
3379VOID Cls3errAction( 2871VOID Cls3errAction(IN PRTMP_ADAPTER pAd, IN PUCHAR pAddr);
3380 IN PRTMP_ADAPTER pAd,
3381 IN PUCHAR pAddr);
3382 2872
3383VOID InvalidStateWhenAssoc( 2873VOID InvalidStateWhenAssoc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3384 IN PRTMP_ADAPTER pAd,
3385 IN MLME_QUEUE_ELEM *Elem);
3386 2874
3387VOID InvalidStateWhenReassoc( 2875VOID InvalidStateWhenReassoc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3388 IN PRTMP_ADAPTER pAd,
3389 IN MLME_QUEUE_ELEM *Elem);
3390 2876
3391VOID InvalidStateWhenDisassociate( 2877VOID InvalidStateWhenDisassociate(IN PRTMP_ADAPTER pAd,
3392 IN PRTMP_ADAPTER pAd, 2878 IN MLME_QUEUE_ELEM * Elem);
3393 IN MLME_QUEUE_ELEM *Elem);
3394 2879
3395#ifdef RTMP_MAC_USB 2880#ifdef RTMP_MAC_USB
3396VOID MlmeCntlConfirm( 2881VOID MlmeCntlConfirm(IN PRTMP_ADAPTER pAd, IN ULONG MsgType, IN USHORT Msg);
3397 IN PRTMP_ADAPTER pAd,
3398 IN ULONG MsgType,
3399 IN USHORT Msg);
3400#endif // RTMP_MAC_USB // 2882#endif // RTMP_MAC_USB //
3401 2883
3402VOID ComposePsPoll( 2884VOID ComposePsPoll(IN PRTMP_ADAPTER pAd);
3403 IN PRTMP_ADAPTER pAd); 2885
3404 2886VOID ComposeNullFrame(IN PRTMP_ADAPTER pAd);
3405VOID ComposeNullFrame( 2887
3406 IN PRTMP_ADAPTER pAd); 2888VOID AssocPostProc(IN PRTMP_ADAPTER pAd,
3407 2889 IN PUCHAR pAddr2,
3408VOID AssocPostProc( 2890 IN USHORT CapabilityInfo,
3409 IN PRTMP_ADAPTER pAd, 2891 IN USHORT Aid,
3410 IN PUCHAR pAddr2, 2892 IN UCHAR SupRate[],
3411 IN USHORT CapabilityInfo, 2893 IN UCHAR SupRateLen,
3412 IN USHORT Aid, 2894 IN UCHAR ExtRate[],
3413 IN UCHAR SupRate[], 2895 IN UCHAR ExtRateLen,
3414 IN UCHAR SupRateLen, 2896 IN PEDCA_PARM pEdcaParm,
3415 IN UCHAR ExtRate[], 2897 IN HT_CAPABILITY_IE * pHtCapability,
3416 IN UCHAR ExtRateLen, 2898 IN UCHAR HtCapabilityLen, IN ADD_HT_INFO_IE * pAddHtInfo);
3417 IN PEDCA_PARM pEdcaParm, 2899
3418 IN HT_CAPABILITY_IE *pHtCapability, 2900VOID AuthStateMachineInit(IN PRTMP_ADAPTER pAd,
3419 IN UCHAR HtCapabilityLen, 2901 IN PSTATE_MACHINE sm, OUT STATE_MACHINE_FUNC Trans[]);
3420 IN ADD_HT_INFO_IE *pAddHtInfo); 2902
3421 2903VOID AuthTimeout(IN PVOID SystemSpecific1,
3422VOID AuthStateMachineInit( 2904 IN PVOID FunctionContext,
3423 IN PRTMP_ADAPTER pAd, 2905 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3424 IN PSTATE_MACHINE sm, 2906
3425 OUT STATE_MACHINE_FUNC Trans[]); 2907VOID MlmeAuthReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3426 2908
3427VOID AuthTimeout( 2909VOID PeerAuthRspAtSeq2Action(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3428 IN PVOID SystemSpecific1, 2910
3429 IN PVOID FunctionContext, 2911VOID PeerAuthRspAtSeq4Action(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3430 IN PVOID SystemSpecific2, 2912
3431 IN PVOID SystemSpecific3); 2913VOID AuthTimeoutAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3432 2914
3433VOID MlmeAuthReqAction( 2915VOID Cls2errAction(IN PRTMP_ADAPTER pAd, IN PUCHAR pAddr);
3434 IN PRTMP_ADAPTER pAd, 2916
3435 IN MLME_QUEUE_ELEM *Elem); 2917VOID MlmeDeauthReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3436 2918
3437VOID PeerAuthRspAtSeq2Action( 2919VOID InvalidStateWhenAuth(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3438 IN PRTMP_ADAPTER pAd,
3439 IN MLME_QUEUE_ELEM *Elem);
3440
3441VOID PeerAuthRspAtSeq4Action(
3442 IN PRTMP_ADAPTER pAd,
3443 IN MLME_QUEUE_ELEM *Elem);
3444
3445VOID AuthTimeoutAction(
3446 IN PRTMP_ADAPTER pAd,
3447 IN MLME_QUEUE_ELEM *Elem);
3448
3449VOID Cls2errAction(
3450 IN PRTMP_ADAPTER pAd,
3451 IN PUCHAR pAddr);
3452
3453VOID MlmeDeauthReqAction(
3454 IN PRTMP_ADAPTER pAd,
3455 IN MLME_QUEUE_ELEM *Elem);
3456
3457VOID InvalidStateWhenAuth(
3458 IN PRTMP_ADAPTER pAd,
3459 IN MLME_QUEUE_ELEM *Elem);
3460 2920
3461//============================================= 2921//=============================================
3462 2922
3463VOID AuthRspStateMachineInit( 2923VOID AuthRspStateMachineInit(IN PRTMP_ADAPTER pAd,
3464 IN PRTMP_ADAPTER pAd, 2924 IN PSTATE_MACHINE Sm,
3465 IN PSTATE_MACHINE Sm, 2925 IN STATE_MACHINE_FUNC Trans[]);
3466 IN STATE_MACHINE_FUNC Trans[]);
3467 2926
3468VOID PeerDeauthAction( 2927VOID PeerDeauthAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3469 IN PRTMP_ADAPTER pAd,
3470 IN MLME_QUEUE_ELEM *Elem);
3471 2928
3472VOID PeerAuthSimpleRspGenAndSend( 2929VOID PeerAuthSimpleRspGenAndSend(IN PRTMP_ADAPTER pAd,
3473 IN PRTMP_ADAPTER pAd, 2930 IN PHEADER_802_11 pHdr80211,
3474 IN PHEADER_802_11 pHdr80211, 2931 IN USHORT Alg,
3475 IN USHORT Alg, 2932 IN USHORT Seq,
3476 IN USHORT Seq, 2933 IN USHORT Reason, IN USHORT Status);
3477 IN USHORT Reason,
3478 IN USHORT Status);
3479 2934
3480// 2935//
3481// Private routines in dls.c 2936// Private routines in dls.c
@@ -3483,1185 +2938,778 @@ VOID PeerAuthSimpleRspGenAndSend(
3483 2938
3484//======================================== 2939//========================================
3485 2940
3486VOID SyncStateMachineInit( 2941VOID SyncStateMachineInit(IN PRTMP_ADAPTER pAd,
3487 IN PRTMP_ADAPTER pAd, 2942 IN STATE_MACHINE * Sm,
3488 IN STATE_MACHINE *Sm, 2943 OUT STATE_MACHINE_FUNC Trans[]);
3489 OUT STATE_MACHINE_FUNC Trans[]);
3490 2944
3491VOID BeaconTimeout( 2945VOID BeaconTimeout(IN PVOID SystemSpecific1,
3492 IN PVOID SystemSpecific1, 2946 IN PVOID FunctionContext,
3493 IN PVOID FunctionContext, 2947 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3494 IN PVOID SystemSpecific2,
3495 IN PVOID SystemSpecific3);
3496 2948
3497VOID ScanTimeout( 2949VOID ScanTimeout(IN PVOID SystemSpecific1,
3498 IN PVOID SystemSpecific1, 2950 IN PVOID FunctionContext,
3499 IN PVOID FunctionContext, 2951 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3500 IN PVOID SystemSpecific2,
3501 IN PVOID SystemSpecific3);
3502 2952
3503VOID InvalidStateWhenScan( 2953VOID InvalidStateWhenScan(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3504 IN PRTMP_ADAPTER pAd,
3505 IN MLME_QUEUE_ELEM *Elem);
3506 2954
3507VOID InvalidStateWhenJoin( 2955VOID InvalidStateWhenJoin(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3508 IN PRTMP_ADAPTER pAd,
3509 IN MLME_QUEUE_ELEM *Elem);
3510 2956
3511VOID InvalidStateWhenStart( 2957VOID InvalidStateWhenStart(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3512 IN PRTMP_ADAPTER pAd,
3513 IN MLME_QUEUE_ELEM *Elem);
3514 2958
3515VOID EnqueueProbeRequest( 2959VOID EnqueueProbeRequest(IN PRTMP_ADAPTER pAd);
3516 IN PRTMP_ADAPTER pAd);
3517 2960
3518BOOLEAN ScanRunning( 2961BOOLEAN ScanRunning(IN PRTMP_ADAPTER pAd);
3519 IN PRTMP_ADAPTER pAd);
3520//========================================= 2962//=========================================
3521 2963
3522VOID MlmeCntlInit( 2964VOID MlmeCntlInit(IN PRTMP_ADAPTER pAd,
3523 IN PRTMP_ADAPTER pAd, 2965 IN STATE_MACHINE * S, OUT STATE_MACHINE_FUNC Trans[]);
3524 IN STATE_MACHINE *S, 2966
3525 OUT STATE_MACHINE_FUNC Trans[]); 2967VOID MlmeCntlMachinePerformAction(IN PRTMP_ADAPTER pAd,
3526 2968 IN STATE_MACHINE * S,
3527VOID MlmeCntlMachinePerformAction( 2969 IN MLME_QUEUE_ELEM * Elem);
3528 IN PRTMP_ADAPTER pAd, 2970
3529 IN STATE_MACHINE *S, 2971VOID CntlIdleProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3530 IN MLME_QUEUE_ELEM *Elem); 2972
3531 2973VOID CntlOidScanProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3532VOID CntlIdleProc( 2974
3533 IN PRTMP_ADAPTER pAd, 2975VOID CntlOidSsidProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3534 IN MLME_QUEUE_ELEM *Elem); 2976
3535 2977VOID CntlOidRTBssidProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3536VOID CntlOidScanProc( 2978
3537 IN PRTMP_ADAPTER pAd, 2979VOID CntlMlmeRoamingProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3538 IN MLME_QUEUE_ELEM *Elem); 2980
3539 2981VOID CntlWaitDisassocProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3540VOID CntlOidSsidProc( 2982
3541 IN PRTMP_ADAPTER pAd, 2983VOID CntlWaitJoinProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3542 IN MLME_QUEUE_ELEM * Elem); 2984
3543 2985VOID CntlWaitReassocProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3544VOID CntlOidRTBssidProc( 2986
3545 IN PRTMP_ADAPTER pAd, 2987VOID CntlWaitStartProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3546 IN MLME_QUEUE_ELEM * Elem); 2988
3547 2989VOID CntlWaitAuthProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3548VOID CntlMlmeRoamingProc( 2990
3549 IN PRTMP_ADAPTER pAd, 2991VOID CntlWaitAuthProc2(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3550 IN MLME_QUEUE_ELEM * Elem); 2992
3551 2993VOID CntlWaitAssocProc(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3552VOID CntlWaitDisassocProc( 2994
3553 IN PRTMP_ADAPTER pAd, 2995VOID LinkUp(IN PRTMP_ADAPTER pAd, IN UCHAR BssType);
3554 IN MLME_QUEUE_ELEM *Elem); 2996
3555 2997VOID LinkDown(IN PRTMP_ADAPTER pAd, IN BOOLEAN IsReqFromAP);
3556VOID CntlWaitJoinProc( 2998
3557 IN PRTMP_ADAPTER pAd, 2999VOID IterateOnBssTab(IN PRTMP_ADAPTER pAd);
3558 IN MLME_QUEUE_ELEM *Elem); 3000
3559 3001VOID IterateOnBssTab2(IN PRTMP_ADAPTER pAd);;
3560VOID CntlWaitReassocProc( 3002
3561 IN PRTMP_ADAPTER pAd, 3003VOID JoinParmFill(IN PRTMP_ADAPTER pAd,
3562 IN MLME_QUEUE_ELEM *Elem); 3004 IN OUT MLME_JOIN_REQ_STRUCT * JoinReq, IN ULONG BssIdx);
3563 3005
3564VOID CntlWaitStartProc( 3006VOID AssocParmFill(IN PRTMP_ADAPTER pAd,
3565 IN PRTMP_ADAPTER pAd, 3007 IN OUT MLME_ASSOC_REQ_STRUCT * AssocReq,
3566 IN MLME_QUEUE_ELEM *Elem); 3008 IN PUCHAR pAddr,
3567 3009 IN USHORT CapabilityInfo,
3568VOID CntlWaitAuthProc( 3010 IN ULONG Timeout, IN USHORT ListenIntv);
3569 IN PRTMP_ADAPTER pAd, 3011
3570 IN MLME_QUEUE_ELEM *Elem); 3012VOID ScanParmFill(IN PRTMP_ADAPTER pAd,
3571 3013 IN OUT MLME_SCAN_REQ_STRUCT * ScanReq,
3572VOID CntlWaitAuthProc2( 3014 IN STRING Ssid[],
3573 IN PRTMP_ADAPTER pAd, 3015 IN UCHAR SsidLen, IN UCHAR BssType, IN UCHAR ScanType);
3574 IN MLME_QUEUE_ELEM *Elem); 3016
3575 3017VOID DisassocParmFill(IN PRTMP_ADAPTER pAd,
3576VOID CntlWaitAssocProc( 3018 IN OUT MLME_DISASSOC_REQ_STRUCT * DisassocReq,
3577 IN PRTMP_ADAPTER pAd, 3019 IN PUCHAR pAddr, IN USHORT Reason);
3578 IN MLME_QUEUE_ELEM *Elem); 3020
3579 3021VOID StartParmFill(IN PRTMP_ADAPTER pAd,
3580VOID LinkUp( 3022 IN OUT MLME_START_REQ_STRUCT * StartReq,
3581 IN PRTMP_ADAPTER pAd, 3023 IN CHAR Ssid[], IN UCHAR SsidLen);
3582 IN UCHAR BssType); 3024
3583 3025VOID AuthParmFill(IN PRTMP_ADAPTER pAd,
3584VOID LinkDown( 3026 IN OUT MLME_AUTH_REQ_STRUCT * AuthReq,
3585 IN PRTMP_ADAPTER pAd, 3027 IN PUCHAR pAddr, IN USHORT Alg);
3586 IN BOOLEAN IsReqFromAP); 3028
3587 3029VOID EnqueuePsPoll(IN PRTMP_ADAPTER pAd);
3588VOID IterateOnBssTab( 3030
3589 IN PRTMP_ADAPTER pAd); 3031VOID EnqueueBeaconFrame(IN PRTMP_ADAPTER pAd);
3590 3032
3591VOID IterateOnBssTab2( 3033VOID MlmeJoinReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3592 IN PRTMP_ADAPTER pAd);; 3034
3593 3035VOID MlmeScanReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3594VOID JoinParmFill( 3036
3595 IN PRTMP_ADAPTER pAd, 3037VOID MlmeStartReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3596 IN OUT MLME_JOIN_REQ_STRUCT *JoinReq, 3038
3597 IN ULONG BssIdx); 3039VOID ScanTimeoutAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3598 3040
3599VOID AssocParmFill( 3041VOID BeaconTimeoutAtJoinAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3600 IN PRTMP_ADAPTER pAd, 3042
3601 IN OUT MLME_ASSOC_REQ_STRUCT *AssocReq, 3043VOID PeerBeaconAtScanAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3602 IN PUCHAR pAddr, 3044
3603 IN USHORT CapabilityInfo, 3045VOID PeerBeaconAtJoinAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3604 IN ULONG Timeout, 3046
3605 IN USHORT ListenIntv); 3047VOID PeerBeacon(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3606 3048
3607VOID ScanParmFill( 3049VOID PeerProbeReqAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
3608 IN PRTMP_ADAPTER pAd, 3050
3609 IN OUT MLME_SCAN_REQ_STRUCT *ScanReq, 3051VOID ScanNextChannel(IN PRTMP_ADAPTER pAd);
3610 IN STRING Ssid[], 3052
3611 IN UCHAR SsidLen, 3053ULONG MakeIbssBeacon(IN PRTMP_ADAPTER pAd);
3612 IN UCHAR BssType, 3054
3613 IN UCHAR ScanType); 3055BOOLEAN MlmeScanReqSanity(IN PRTMP_ADAPTER pAd,
3614 3056 IN VOID * Msg,
3615VOID DisassocParmFill( 3057 IN ULONG MsgLen,
3616 IN PRTMP_ADAPTER pAd, 3058 OUT UCHAR * BssType,
3617 IN OUT MLME_DISASSOC_REQ_STRUCT *DisassocReq, 3059 OUT CHAR ssid[],
3618 IN PUCHAR pAddr, 3060 OUT UCHAR * SsidLen, OUT UCHAR * ScanType);
3619 IN USHORT Reason); 3061
3620 3062BOOLEAN PeerBeaconAndProbeRspSanity(IN PRTMP_ADAPTER pAd,
3621VOID StartParmFill( 3063 IN VOID * Msg,
3622 IN PRTMP_ADAPTER pAd, 3064 IN ULONG MsgLen,
3623 IN OUT MLME_START_REQ_STRUCT *StartReq, 3065 IN UCHAR MsgChannel,
3624 IN CHAR Ssid[], 3066 OUT PUCHAR pAddr2,
3625 IN UCHAR SsidLen); 3067 OUT PUCHAR pBssid,
3626 3068 OUT CHAR Ssid[],
3627VOID AuthParmFill( 3069 OUT UCHAR * pSsidLen,
3628 IN PRTMP_ADAPTER pAd, 3070 OUT UCHAR * pBssType,
3629 IN OUT MLME_AUTH_REQ_STRUCT *AuthReq, 3071 OUT USHORT * pBeaconPeriod,
3630 IN PUCHAR pAddr, 3072 OUT UCHAR * pChannel,
3631 IN USHORT Alg); 3073 OUT UCHAR * pNewChannel,
3632 3074 OUT LARGE_INTEGER * pTimestamp,
3633VOID EnqueuePsPoll( 3075 OUT CF_PARM * pCfParm,
3634 IN PRTMP_ADAPTER pAd); 3076 OUT USHORT * pAtimWin,
3635 3077 OUT USHORT * pCapabilityInfo,
3636VOID EnqueueBeaconFrame( 3078 OUT UCHAR * pErp,
3637 IN PRTMP_ADAPTER pAd); 3079 OUT UCHAR * pDtimCount,
3638 3080 OUT UCHAR * pDtimPeriod,
3639VOID MlmeJoinReqAction( 3081 OUT UCHAR * pBcastFlag,
3640 IN PRTMP_ADAPTER pAd, 3082 OUT UCHAR * pMessageToMe,
3641 IN MLME_QUEUE_ELEM *Elem); 3083 OUT UCHAR SupRate[],
3642 3084 OUT UCHAR * pSupRateLen,
3643VOID MlmeScanReqAction( 3085 OUT UCHAR ExtRate[],
3644 IN PRTMP_ADAPTER pAd, 3086 OUT UCHAR * pExtRateLen,
3645 IN MLME_QUEUE_ELEM *Elem); 3087 OUT UCHAR * pCkipFlag,
3646 3088 OUT UCHAR * pAironetCellPowerLimit,
3647VOID MlmeStartReqAction( 3089 OUT PEDCA_PARM pEdcaParm,
3648 IN PRTMP_ADAPTER pAd, 3090 OUT PQBSS_LOAD_PARM pQbssLoad,
3649 IN MLME_QUEUE_ELEM *Elem); 3091 OUT PQOS_CAPABILITY_PARM pQosCapability,
3650 3092 OUT ULONG * pRalinkIe,
3651VOID ScanTimeoutAction( 3093 OUT UCHAR * pHtCapabilityLen,
3652 IN PRTMP_ADAPTER pAd, 3094 OUT UCHAR * pPreNHtCapabilityLen,
3653 IN MLME_QUEUE_ELEM *Elem); 3095 OUT HT_CAPABILITY_IE * pHtCapability,
3654 3096 OUT UCHAR * AddHtInfoLen,
3655VOID BeaconTimeoutAtJoinAction( 3097 OUT ADD_HT_INFO_IE * AddHtInfo,
3656 IN PRTMP_ADAPTER pAd, 3098 OUT UCHAR * NewExtChannel,
3657 IN MLME_QUEUE_ELEM *Elem); 3099 OUT USHORT * LengthVIE,
3658 3100 OUT PNDIS_802_11_VARIABLE_IEs pVIE);
3659VOID PeerBeaconAtScanAction( 3101
3660 IN PRTMP_ADAPTER pAd, 3102BOOLEAN PeerAddBAReqActionSanity(IN PRTMP_ADAPTER pAd,
3661 IN MLME_QUEUE_ELEM *Elem); 3103 IN VOID * pMsg,
3662 3104 IN ULONG MsgLen, OUT PUCHAR pAddr2);
3663VOID PeerBeaconAtJoinAction( 3105
3664 IN PRTMP_ADAPTER pAd, 3106BOOLEAN PeerAddBARspActionSanity(IN PRTMP_ADAPTER pAd,
3665 IN MLME_QUEUE_ELEM *Elem); 3107 IN VOID * pMsg, IN ULONG MsgLen);
3666 3108
3667VOID PeerBeacon( 3109BOOLEAN PeerDelBAActionSanity(IN PRTMP_ADAPTER pAd,
3668 IN PRTMP_ADAPTER pAd, 3110 IN UCHAR Wcid, IN VOID * pMsg, IN ULONG MsgLen);
3669 IN MLME_QUEUE_ELEM *Elem); 3111
3670 3112BOOLEAN MlmeAssocReqSanity(IN PRTMP_ADAPTER pAd,
3671VOID PeerProbeReqAction( 3113 IN VOID * Msg,
3672 IN PRTMP_ADAPTER pAd, 3114 IN ULONG MsgLen,
3673 IN MLME_QUEUE_ELEM *Elem); 3115 OUT PUCHAR pApAddr,
3674 3116 OUT USHORT * CapabilityInfo,
3675VOID ScanNextChannel( 3117 OUT ULONG * Timeout, OUT USHORT * ListenIntv);
3676 IN PRTMP_ADAPTER pAd); 3118
3677 3119BOOLEAN MlmeAuthReqSanity(IN PRTMP_ADAPTER pAd,
3678ULONG MakeIbssBeacon( 3120 IN VOID * Msg,
3679 IN PRTMP_ADAPTER pAd); 3121 IN ULONG MsgLen,
3680 3122 OUT PUCHAR pAddr,
3681BOOLEAN MlmeScanReqSanity( 3123 OUT ULONG * Timeout, OUT USHORT * Alg);
3682 IN PRTMP_ADAPTER pAd, 3124
3683 IN VOID *Msg, 3125BOOLEAN MlmeStartReqSanity(IN PRTMP_ADAPTER pAd,
3684 IN ULONG MsgLen, 3126 IN VOID * Msg,
3685 OUT UCHAR *BssType, 3127 IN ULONG MsgLen,
3686 OUT CHAR ssid[], 3128 OUT CHAR Ssid[], OUT UCHAR * Ssidlen);
3687 OUT UCHAR *SsidLen, 3129
3688 OUT UCHAR *ScanType); 3130BOOLEAN PeerAuthSanity(IN PRTMP_ADAPTER pAd,
3689 3131 IN VOID * Msg,
3690BOOLEAN PeerBeaconAndProbeRspSanity( 3132 IN ULONG MsgLen,
3691 IN PRTMP_ADAPTER pAd, 3133 OUT PUCHAR pAddr,
3692 IN VOID *Msg, 3134 OUT USHORT * Alg,
3693 IN ULONG MsgLen, 3135 OUT USHORT * Seq,
3694 IN UCHAR MsgChannel, 3136 OUT USHORT * Status, OUT CHAR ChlgText[]);
3695 OUT PUCHAR pAddr2, 3137
3696 OUT PUCHAR pBssid, 3138BOOLEAN PeerAssocRspSanity(IN PRTMP_ADAPTER pAd, IN VOID * pMsg, IN ULONG MsgLen, OUT PUCHAR pAddr2, OUT USHORT * pCapabilityInfo, OUT USHORT * pStatus, OUT USHORT * pAid, OUT UCHAR SupRate[], OUT UCHAR * pSupRateLen, OUT UCHAR ExtRate[], OUT UCHAR * pExtRateLen, OUT HT_CAPABILITY_IE * pHtCapability, OUT ADD_HT_INFO_IE * pAddHtInfo, // AP might use this additional ht info IE
3697 OUT CHAR Ssid[], 3139 OUT UCHAR * pHtCapabilityLen,
3698 OUT UCHAR *pSsidLen, 3140 OUT UCHAR * pAddHtInfoLen,
3699 OUT UCHAR *pBssType, 3141 OUT UCHAR * pNewExtChannelOffset,
3700 OUT USHORT *pBeaconPeriod, 3142 OUT PEDCA_PARM pEdcaParm, OUT UCHAR * pCkipFlag);
3701 OUT UCHAR *pChannel, 3143
3702 OUT UCHAR *pNewChannel, 3144BOOLEAN PeerDisassocSanity(IN PRTMP_ADAPTER pAd,
3703 OUT LARGE_INTEGER *pTimestamp, 3145 IN VOID * Msg,
3704 OUT CF_PARM *pCfParm, 3146 IN ULONG MsgLen,
3705 OUT USHORT *pAtimWin, 3147 OUT PUCHAR pAddr2, OUT USHORT * Reason);
3706 OUT USHORT *pCapabilityInfo, 3148
3707 OUT UCHAR *pErp, 3149BOOLEAN PeerWpaMessageSanity(IN PRTMP_ADAPTER pAd,
3708 OUT UCHAR *pDtimCount, 3150 IN PEAPOL_PACKET pMsg,
3709 OUT UCHAR *pDtimPeriod, 3151 IN ULONG MsgLen,
3710 OUT UCHAR *pBcastFlag, 3152 IN UCHAR MsgType, IN MAC_TABLE_ENTRY * pEntry);
3711 OUT UCHAR *pMessageToMe, 3153
3712 OUT UCHAR SupRate[], 3154BOOLEAN PeerDeauthSanity(IN PRTMP_ADAPTER pAd,
3713 OUT UCHAR *pSupRateLen, 3155 IN VOID * Msg,
3714 OUT UCHAR ExtRate[], 3156 IN ULONG MsgLen,
3715 OUT UCHAR *pExtRateLen, 3157 OUT PUCHAR pAddr2, OUT USHORT * Reason);
3716 OUT UCHAR *pCkipFlag, 3158
3717 OUT UCHAR *pAironetCellPowerLimit, 3159BOOLEAN PeerProbeReqSanity(IN PRTMP_ADAPTER pAd,
3718 OUT PEDCA_PARM pEdcaParm, 3160 IN VOID * Msg,
3719 OUT PQBSS_LOAD_PARM pQbssLoad, 3161 IN ULONG MsgLen,
3720 OUT PQOS_CAPABILITY_PARM pQosCapability, 3162 OUT PUCHAR pAddr2,
3721 OUT ULONG *pRalinkIe, 3163 OUT CHAR Ssid[], OUT UCHAR * pSsidLen);
3722 OUT UCHAR *pHtCapabilityLen, 3164
3723 OUT UCHAR *pPreNHtCapabilityLen, 3165BOOLEAN GetTimBit(IN CHAR * Ptr,
3724 OUT HT_CAPABILITY_IE *pHtCapability, 3166 IN USHORT Aid,
3725 OUT UCHAR *AddHtInfoLen, 3167 OUT UCHAR * TimLen,
3726 OUT ADD_HT_INFO_IE *AddHtInfo, 3168 OUT UCHAR * BcastFlag,
3727 OUT UCHAR *NewExtChannel, 3169 OUT UCHAR * DtimCount,
3728 OUT USHORT *LengthVIE, 3170 OUT UCHAR * DtimPeriod, OUT UCHAR * MessageToMe);
3729 OUT PNDIS_802_11_VARIABLE_IEs pVIE); 3171
3730 3172UCHAR ChannelSanity(IN PRTMP_ADAPTER pAd, IN UCHAR channel);
3731BOOLEAN PeerAddBAReqActionSanity( 3173
3732 IN PRTMP_ADAPTER pAd, 3174NDIS_802_11_NETWORK_TYPE NetworkTypeInUseSanity(IN PBSS_ENTRY pBss);
3733 IN VOID *pMsg, 3175
3734 IN ULONG MsgLen, 3176BOOLEAN MlmeDelBAReqSanity(IN PRTMP_ADAPTER pAd,
3735 OUT PUCHAR pAddr2); 3177 IN VOID * Msg, IN ULONG MsgLen);
3736 3178
3737BOOLEAN PeerAddBARspActionSanity( 3179BOOLEAN MlmeAddBAReqSanity(IN PRTMP_ADAPTER pAd,
3738 IN PRTMP_ADAPTER pAd, 3180 IN VOID * Msg, IN ULONG MsgLen, OUT PUCHAR pAddr2);
3739 IN VOID *pMsg, 3181
3740 IN ULONG MsgLen); 3182ULONG MakeOutgoingFrame(OUT UCHAR * Buffer, OUT ULONG * Length, ...);
3741 3183
3742BOOLEAN PeerDelBAActionSanity( 3184VOID LfsrInit(IN PRTMP_ADAPTER pAd, IN ULONG Seed);
3743 IN PRTMP_ADAPTER pAd, 3185
3744 IN UCHAR Wcid, 3186UCHAR RandomByte(IN PRTMP_ADAPTER pAd);
3745 IN VOID *pMsg, 3187
3746 IN ULONG MsgLen); 3188VOID AsicUpdateAutoFallBackTable(IN PRTMP_ADAPTER pAd, IN PUCHAR pTxRate);
3747 3189
3748BOOLEAN MlmeAssocReqSanity( 3190VOID MlmePeriodicExec(IN PVOID SystemSpecific1,
3749 IN PRTMP_ADAPTER pAd, 3191 IN PVOID FunctionContext,
3750 IN VOID *Msg, 3192 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3751 IN ULONG MsgLen, 3193
3752 OUT PUCHAR pApAddr, 3194VOID LinkDownExec(IN PVOID SystemSpecific1,
3753 OUT USHORT *CapabilityInfo, 3195 IN PVOID FunctionContext,
3754 OUT ULONG *Timeout, 3196 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
3755 OUT USHORT *ListenIntv); 3197
3756 3198VOID STAMlmePeriodicExec(PRTMP_ADAPTER pAd);
3757BOOLEAN MlmeAuthReqSanity( 3199
3758 IN PRTMP_ADAPTER pAd, 3200VOID MlmeAutoScan(IN PRTMP_ADAPTER pAd);
3759 IN VOID *Msg, 3201
3760 IN ULONG MsgLen, 3202VOID MlmeAutoReconnectLastSSID(IN PRTMP_ADAPTER pAd);
3761 OUT PUCHAR pAddr, 3203
3762 OUT ULONG *Timeout, 3204BOOLEAN MlmeValidateSSID(IN PUCHAR pSsid, IN UCHAR SsidLen);
3763 OUT USHORT *Alg); 3205
3764 3206VOID MlmeCheckForRoaming(IN PRTMP_ADAPTER pAd, IN ULONG Now32);
3765BOOLEAN MlmeStartReqSanity( 3207
3766 IN PRTMP_ADAPTER pAd, 3208BOOLEAN MlmeCheckForFastRoaming(IN PRTMP_ADAPTER pAd);
3767 IN VOID *Msg, 3209
3768 IN ULONG MsgLen, 3210VOID MlmeDynamicTxRateSwitching(IN PRTMP_ADAPTER pAd);
3769 OUT CHAR Ssid[], 3211
3770 OUT UCHAR *Ssidlen); 3212VOID MlmeSetTxRate(IN PRTMP_ADAPTER pAd,
3771 3213 IN PMAC_TABLE_ENTRY pEntry, IN PRTMP_TX_RATE_SWITCH pTxRate);
3772BOOLEAN PeerAuthSanity( 3214
3773 IN PRTMP_ADAPTER pAd, 3215VOID MlmeSelectTxRateTable(IN PRTMP_ADAPTER pAd,
3774 IN VOID *Msg, 3216 IN PMAC_TABLE_ENTRY pEntry,
3775 IN ULONG MsgLen, 3217 IN PUCHAR * ppTable,
3776 OUT PUCHAR pAddr, 3218 IN PUCHAR pTableSize, IN PUCHAR pInitTxRateIdx);
3777 OUT USHORT *Alg, 3219
3778 OUT USHORT *Seq, 3220VOID MlmeCalculateChannelQuality(IN PRTMP_ADAPTER pAd,
3779 OUT USHORT *Status, 3221 IN PMAC_TABLE_ENTRY pMacEntry, IN ULONG Now);
3780 OUT CHAR ChlgText[]); 3222
3781 3223VOID MlmeCheckPsmChange(IN PRTMP_ADAPTER pAd, IN ULONG Now32);
3782BOOLEAN PeerAssocRspSanity( 3224
3783 IN PRTMP_ADAPTER pAd, 3225VOID MlmeSetPsmBit(IN PRTMP_ADAPTER pAd, IN USHORT psm);
3784 IN VOID *pMsg, 3226
3785 IN ULONG MsgLen, 3227VOID MlmeSetTxPreamble(IN PRTMP_ADAPTER pAd, IN USHORT TxPreamble);
3786 OUT PUCHAR pAddr2, 3228
3787 OUT USHORT *pCapabilityInfo, 3229VOID UpdateBasicRateBitmap(IN PRTMP_ADAPTER pAd);
3788 OUT USHORT *pStatus, 3230
3789 OUT USHORT *pAid, 3231VOID MlmeUpdateTxRates(IN PRTMP_ADAPTER pAd,
3790 OUT UCHAR SupRate[], 3232 IN BOOLEAN bLinkUp, IN UCHAR apidx);
3791 OUT UCHAR *pSupRateLen, 3233
3792 OUT UCHAR ExtRate[], 3234VOID MlmeUpdateHtTxRates(IN PRTMP_ADAPTER pAd, IN UCHAR apidx);
3793 OUT UCHAR *pExtRateLen, 3235
3794 OUT HT_CAPABILITY_IE *pHtCapability, 3236VOID RTMPCheckRates(IN PRTMP_ADAPTER pAd,
3795 OUT ADD_HT_INFO_IE *pAddHtInfo, // AP might use this additional ht info IE 3237 IN OUT UCHAR SupRate[], IN OUT UCHAR * SupRateLen);
3796 OUT UCHAR *pHtCapabilityLen, 3238
3797 OUT UCHAR *pAddHtInfoLen, 3239BOOLEAN RTMPCheckChannel(IN PRTMP_ADAPTER pAd,
3798 OUT UCHAR *pNewExtChannelOffset, 3240 IN UCHAR CentralChannel, IN UCHAR Channel);
3799 OUT PEDCA_PARM pEdcaParm, 3241
3800 OUT UCHAR *pCkipFlag); 3242BOOLEAN RTMPCheckHt(IN PRTMP_ADAPTER pAd,
3801 3243 IN UCHAR Wcid,
3802BOOLEAN PeerDisassocSanity( 3244 IN OUT HT_CAPABILITY_IE * pHtCapability,
3803 IN PRTMP_ADAPTER pAd, 3245 IN OUT ADD_HT_INFO_IE * pAddHtInfo);
3804 IN VOID *Msg, 3246
3805 IN ULONG MsgLen, 3247VOID StaQuickResponeForRateUpExec(IN PVOID SystemSpecific1,
3806 OUT PUCHAR pAddr2, 3248 IN PVOID FunctionContext,
3807 OUT USHORT *Reason); 3249 IN PVOID SystemSpecific2,
3808 3250 IN PVOID SystemSpecific3);
3809BOOLEAN PeerWpaMessageSanity( 3251
3810 IN PRTMP_ADAPTER pAd, 3252VOID RTMPUpdateMlmeRate(IN PRTMP_ADAPTER pAd);
3811 IN PEAPOL_PACKET pMsg, 3253
3812 IN ULONG MsgLen, 3254CHAR RTMPMaxRssi(IN PRTMP_ADAPTER pAd,
3813 IN UCHAR MsgType, 3255 IN CHAR Rssi0, IN CHAR Rssi1, IN CHAR Rssi2);
3814 IN MAC_TABLE_ENTRY *pEntry);
3815
3816BOOLEAN PeerDeauthSanity(
3817 IN PRTMP_ADAPTER pAd,
3818 IN VOID *Msg,
3819 IN ULONG MsgLen,
3820 OUT PUCHAR pAddr2,
3821 OUT USHORT *Reason);
3822
3823BOOLEAN PeerProbeReqSanity(
3824 IN PRTMP_ADAPTER pAd,
3825 IN VOID *Msg,
3826 IN ULONG MsgLen,
3827 OUT PUCHAR pAddr2,
3828 OUT CHAR Ssid[],
3829 OUT UCHAR *pSsidLen);
3830
3831BOOLEAN GetTimBit(
3832 IN CHAR *Ptr,
3833 IN USHORT Aid,
3834 OUT UCHAR *TimLen,
3835 OUT UCHAR *BcastFlag,
3836 OUT UCHAR *DtimCount,
3837 OUT UCHAR *DtimPeriod,
3838 OUT UCHAR *MessageToMe);
3839
3840UCHAR ChannelSanity(
3841 IN PRTMP_ADAPTER pAd,
3842 IN UCHAR channel);
3843
3844NDIS_802_11_NETWORK_TYPE NetworkTypeInUseSanity(
3845 IN PBSS_ENTRY pBss);
3846
3847BOOLEAN MlmeDelBAReqSanity(
3848 IN PRTMP_ADAPTER pAd,
3849 IN VOID *Msg,
3850 IN ULONG MsgLen);
3851
3852BOOLEAN MlmeAddBAReqSanity(
3853 IN PRTMP_ADAPTER pAd,
3854 IN VOID *Msg,
3855 IN ULONG MsgLen,
3856 OUT PUCHAR pAddr2);
3857
3858ULONG MakeOutgoingFrame(
3859 OUT UCHAR *Buffer,
3860 OUT ULONG *Length, ...);
3861
3862VOID LfsrInit(
3863 IN PRTMP_ADAPTER pAd,
3864 IN ULONG Seed);
3865
3866UCHAR RandomByte(
3867 IN PRTMP_ADAPTER pAd);
3868
3869VOID AsicUpdateAutoFallBackTable(
3870 IN PRTMP_ADAPTER pAd,
3871 IN PUCHAR pTxRate);
3872
3873VOID MlmePeriodicExec(
3874 IN PVOID SystemSpecific1,
3875 IN PVOID FunctionContext,
3876 IN PVOID SystemSpecific2,
3877 IN PVOID SystemSpecific3);
3878
3879VOID LinkDownExec(
3880 IN PVOID SystemSpecific1,
3881 IN PVOID FunctionContext,
3882 IN PVOID SystemSpecific2,
3883 IN PVOID SystemSpecific3);
3884
3885VOID STAMlmePeriodicExec(
3886 PRTMP_ADAPTER pAd);
3887
3888VOID MlmeAutoScan(
3889 IN PRTMP_ADAPTER pAd);
3890
3891VOID MlmeAutoReconnectLastSSID(
3892 IN PRTMP_ADAPTER pAd);
3893
3894BOOLEAN MlmeValidateSSID(
3895 IN PUCHAR pSsid,
3896 IN UCHAR SsidLen);
3897
3898VOID MlmeCheckForRoaming(
3899 IN PRTMP_ADAPTER pAd,
3900 IN ULONG Now32);
3901
3902BOOLEAN MlmeCheckForFastRoaming(
3903 IN PRTMP_ADAPTER pAd);
3904
3905VOID MlmeDynamicTxRateSwitching(
3906 IN PRTMP_ADAPTER pAd);
3907
3908VOID MlmeSetTxRate(
3909 IN PRTMP_ADAPTER pAd,
3910 IN PMAC_TABLE_ENTRY pEntry,
3911 IN PRTMP_TX_RATE_SWITCH pTxRate);
3912
3913VOID MlmeSelectTxRateTable(
3914 IN PRTMP_ADAPTER pAd,
3915 IN PMAC_TABLE_ENTRY pEntry,
3916 IN PUCHAR *ppTable,
3917 IN PUCHAR pTableSize,
3918 IN PUCHAR pInitTxRateIdx);
3919
3920VOID MlmeCalculateChannelQuality(
3921 IN PRTMP_ADAPTER pAd,
3922 IN PMAC_TABLE_ENTRY pMacEntry,
3923 IN ULONG Now);
3924
3925VOID MlmeCheckPsmChange(
3926 IN PRTMP_ADAPTER pAd,
3927 IN ULONG Now32);
3928
3929VOID MlmeSetPsmBit(
3930 IN PRTMP_ADAPTER pAd,
3931 IN USHORT psm);
3932
3933VOID MlmeSetTxPreamble(
3934 IN PRTMP_ADAPTER pAd,
3935 IN USHORT TxPreamble);
3936
3937VOID UpdateBasicRateBitmap(
3938 IN PRTMP_ADAPTER pAd);
3939
3940VOID MlmeUpdateTxRates(
3941 IN PRTMP_ADAPTER pAd,
3942 IN BOOLEAN bLinkUp,
3943 IN UCHAR apidx);
3944
3945VOID MlmeUpdateHtTxRates(
3946 IN PRTMP_ADAPTER pAd,
3947 IN UCHAR apidx);
3948
3949VOID RTMPCheckRates(
3950 IN PRTMP_ADAPTER pAd,
3951 IN OUT UCHAR SupRate[],
3952 IN OUT UCHAR *SupRateLen);
3953
3954BOOLEAN RTMPCheckChannel(
3955 IN PRTMP_ADAPTER pAd,
3956 IN UCHAR CentralChannel,
3957 IN UCHAR Channel);
3958
3959BOOLEAN RTMPCheckHt(
3960 IN PRTMP_ADAPTER pAd,
3961 IN UCHAR Wcid,
3962 IN OUT HT_CAPABILITY_IE *pHtCapability,
3963 IN OUT ADD_HT_INFO_IE *pAddHtInfo);
3964
3965VOID StaQuickResponeForRateUpExec(
3966 IN PVOID SystemSpecific1,
3967 IN PVOID FunctionContext,
3968 IN PVOID SystemSpecific2,
3969 IN PVOID SystemSpecific3);
3970
3971VOID RTMPUpdateMlmeRate(
3972 IN PRTMP_ADAPTER pAd);
3973
3974CHAR RTMPMaxRssi(
3975 IN PRTMP_ADAPTER pAd,
3976 IN CHAR Rssi0,
3977 IN CHAR Rssi1,
3978 IN CHAR Rssi2);
3979 3256
3980#ifdef RT30xx 3257#ifdef RT30xx
3981VOID AsicSetRxAnt( 3258VOID AsicSetRxAnt(IN PRTMP_ADAPTER pAd, IN UCHAR Ant);
3982 IN PRTMP_ADAPTER pAd,
3983 IN UCHAR Ant);
3984 3259
3985VOID RTMPFilterCalibration( 3260VOID RTMPFilterCalibration(IN PRTMP_ADAPTER pAd);
3986 IN PRTMP_ADAPTER pAd);
3987 3261
3988#ifdef RTMP_EFUSE_SUPPORT 3262#ifdef RTMP_EFUSE_SUPPORT
3989//2008/09/11:KH add to support efuse<-- 3263//2008/09/11:KH add to support efuse<--
3990INT set_eFuseGetFreeBlockCount_Proc( 3264INT set_eFuseGetFreeBlockCount_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
3991 IN PRTMP_ADAPTER pAd,
3992 IN PSTRING arg);
3993 3265
3994INT set_eFusedump_Proc( 3266INT set_eFusedump_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
3995 IN PRTMP_ADAPTER pAd,
3996 IN PSTRING arg);
3997 3267
3998VOID eFusePhysicalReadRegisters( 3268VOID eFusePhysicalReadRegisters(IN PRTMP_ADAPTER pAd,
3999 IN PRTMP_ADAPTER pAd, 3269 IN USHORT Offset,
4000 IN USHORT Offset, 3270 IN USHORT Length, OUT USHORT * pData);
4001 IN USHORT Length,
4002 OUT USHORT* pData);
4003 3271
4004int RtmpEfuseSupportCheck( 3272int RtmpEfuseSupportCheck(IN RTMP_ADAPTER * pAd);
4005 IN RTMP_ADAPTER *pAd);
4006 3273
4007VOID eFuseGetFreeBlockCount(IN PRTMP_ADAPTER pAd, 3274VOID eFuseGetFreeBlockCount(IN PRTMP_ADAPTER pAd, PUINT EfuseFreeBlock);
4008 PUINT EfuseFreeBlock);
4009 3275
4010INT eFuse_init( 3276INT eFuse_init(IN PRTMP_ADAPTER pAd);
4011 IN PRTMP_ADAPTER pAd);
4012//2008/09/11:KH add to support efuse--> 3277//2008/09/11:KH add to support efuse-->
4013#endif // RTMP_EFUSE_SUPPORT // 3278#endif // RTMP_EFUSE_SUPPORT //
4014 3279
4015// add by johnli, RF power sequence setup 3280// add by johnli, RF power sequence setup
4016VOID RT30xxLoadRFNormalModeSetup( 3281VOID RT30xxLoadRFNormalModeSetup(IN PRTMP_ADAPTER pAd);
4017 IN PRTMP_ADAPTER pAd);
4018 3282
4019VOID RT30xxLoadRFSleepModeSetup( 3283VOID RT30xxLoadRFSleepModeSetup(IN PRTMP_ADAPTER pAd);
4020 IN PRTMP_ADAPTER pAd);
4021 3284
4022VOID RT30xxReverseRFSleepModeSetup( 3285VOID RT30xxReverseRFSleepModeSetup(IN PRTMP_ADAPTER pAd);
4023 IN PRTMP_ADAPTER pAd);
4024// end johnli 3286// end johnli
4025 3287
4026#ifdef RT3070 3288#ifdef RT3070
4027VOID NICInitRT3070RFRegisters( 3289VOID NICInitRT3070RFRegisters(IN RTMP_ADAPTER * pAd);
4028 IN RTMP_ADAPTER *pAd);
4029#endif // RT3070 // 3290#endif // RT3070 //
4030#ifdef RT3090 3291#ifdef RT3090
4031VOID NICInitRT3090RFRegisters( 3292VOID NICInitRT3090RFRegisters(IN RTMP_ADAPTER * pAd);
4032 IN RTMP_ADAPTER *pAd);
4033#endif // RT3090 // 3293#endif // RT3090 //
4034 3294
4035VOID RT30xxHaltAction( 3295VOID RT30xxHaltAction(IN PRTMP_ADAPTER pAd);
4036 IN PRTMP_ADAPTER pAd);
4037 3296
4038VOID RT30xxSetRxAnt( 3297VOID RT30xxSetRxAnt(IN PRTMP_ADAPTER pAd, IN UCHAR Ant);
4039 IN PRTMP_ADAPTER pAd,
4040 IN UCHAR Ant);
4041#endif // RT30xx // 3298#endif // RT30xx //
4042 3299
4043VOID AsicEvaluateRxAnt( 3300VOID AsicEvaluateRxAnt(IN PRTMP_ADAPTER pAd);
4044 IN PRTMP_ADAPTER pAd);
4045 3301
4046VOID AsicRxAntEvalTimeout( 3302VOID AsicRxAntEvalTimeout(IN PVOID SystemSpecific1,
4047 IN PVOID SystemSpecific1, 3303 IN PVOID FunctionContext,
4048 IN PVOID FunctionContext, 3304 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
4049 IN PVOID SystemSpecific2,
4050 IN PVOID SystemSpecific3);
4051 3305
4052VOID APSDPeriodicExec( 3306VOID APSDPeriodicExec(IN PVOID SystemSpecific1,
4053 IN PVOID SystemSpecific1, 3307 IN PVOID FunctionContext,
4054 IN PVOID FunctionContext, 3308 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
4055 IN PVOID SystemSpecific2,
4056 IN PVOID SystemSpecific3);
4057 3309
4058BOOLEAN RTMPCheckEntryEnableAutoRateSwitch( 3310BOOLEAN RTMPCheckEntryEnableAutoRateSwitch(IN PRTMP_ADAPTER pAd,
4059 IN PRTMP_ADAPTER pAd, 3311 IN PMAC_TABLE_ENTRY pEntry);
4060 IN PMAC_TABLE_ENTRY pEntry);
4061 3312
4062UCHAR RTMPStaFixedTxMode( 3313UCHAR RTMPStaFixedTxMode(IN PRTMP_ADAPTER pAd, IN PMAC_TABLE_ENTRY pEntry);
4063 IN PRTMP_ADAPTER pAd,
4064 IN PMAC_TABLE_ENTRY pEntry);
4065 3314
4066VOID RTMPUpdateLegacyTxSetting( 3315VOID RTMPUpdateLegacyTxSetting(UCHAR fixed_tx_mode, PMAC_TABLE_ENTRY pEntry);
4067 UCHAR fixed_tx_mode,
4068 PMAC_TABLE_ENTRY pEntry);
4069 3316
4070BOOLEAN RTMPAutoRateSwitchCheck( 3317BOOLEAN RTMPAutoRateSwitchCheck(IN PRTMP_ADAPTER pAd);
4071 IN PRTMP_ADAPTER pAd);
4072 3318
4073NDIS_STATUS MlmeInit( 3319NDIS_STATUS MlmeInit(IN PRTMP_ADAPTER pAd);
4074 IN PRTMP_ADAPTER pAd);
4075 3320
4076VOID MlmeHandler( 3321VOID MlmeHandler(IN PRTMP_ADAPTER pAd);
4077 IN PRTMP_ADAPTER pAd);
4078 3322
4079VOID MlmeHalt( 3323VOID MlmeHalt(IN PRTMP_ADAPTER pAd);
4080 IN PRTMP_ADAPTER pAd);
4081 3324
4082VOID MlmeResetRalinkCounters( 3325VOID MlmeResetRalinkCounters(IN PRTMP_ADAPTER pAd);
4083 IN PRTMP_ADAPTER pAd);
4084 3326
4085VOID BuildChannelList( 3327VOID BuildChannelList(IN PRTMP_ADAPTER pAd);
4086 IN PRTMP_ADAPTER pAd);
4087 3328
4088UCHAR FirstChannel( 3329UCHAR FirstChannel(IN PRTMP_ADAPTER pAd);
4089 IN PRTMP_ADAPTER pAd);
4090 3330
4091UCHAR NextChannel( 3331UCHAR NextChannel(IN PRTMP_ADAPTER pAd, IN UCHAR channel);
4092 IN PRTMP_ADAPTER pAd,
4093 IN UCHAR channel);
4094 3332
4095VOID ChangeToCellPowerLimit( 3333VOID ChangeToCellPowerLimit(IN PRTMP_ADAPTER pAd,
4096 IN PRTMP_ADAPTER pAd, 3334 IN UCHAR AironetCellPowerLimit);
4097 IN UCHAR AironetCellPowerLimit);
4098 3335
4099// 3336//
4100// Prototypes of function definition in rtmp_tkip.c 3337// Prototypes of function definition in rtmp_tkip.c
4101// 3338//
4102VOID RTMPInitTkipEngine( 3339VOID RTMPInitTkipEngine(IN PRTMP_ADAPTER pAd,
4103 IN PRTMP_ADAPTER pAd, 3340 IN PUCHAR pTKey,
4104 IN PUCHAR pTKey, 3341 IN UCHAR KeyId,
4105 IN UCHAR KeyId, 3342 IN PUCHAR pTA,
4106 IN PUCHAR pTA, 3343 IN PUCHAR pMICKey,
4107 IN PUCHAR pMICKey, 3344 IN PUCHAR pTSC, OUT PULONG pIV16, OUT PULONG pIV32);
4108 IN PUCHAR pTSC, 3345
4109 OUT PULONG pIV16, 3346VOID RTMPInitMICEngine(IN PRTMP_ADAPTER pAd,
4110 OUT PULONG pIV32); 3347 IN PUCHAR pKey,
4111 3348 IN PUCHAR pDA,
4112VOID RTMPInitMICEngine( 3349 IN PUCHAR pSA, IN UCHAR UserPriority, IN PUCHAR pMICKey);
4113 IN PRTMP_ADAPTER pAd, 3350
4114 IN PUCHAR pKey, 3351BOOLEAN RTMPTkipCompareMICValue(IN PRTMP_ADAPTER pAd,
4115 IN PUCHAR pDA, 3352 IN PUCHAR pSrc,
4116 IN PUCHAR pSA, 3353 IN PUCHAR pDA,
4117 IN UCHAR UserPriority, 3354 IN PUCHAR pSA,
4118 IN PUCHAR pMICKey); 3355 IN PUCHAR pMICKey,
4119 3356 IN UCHAR UserPriority, IN UINT Len);
4120BOOLEAN RTMPTkipCompareMICValue( 3357
4121 IN PRTMP_ADAPTER pAd, 3358VOID RTMPCalculateMICValue(IN PRTMP_ADAPTER pAd,
4122 IN PUCHAR pSrc, 3359 IN PNDIS_PACKET pPacket,
4123 IN PUCHAR pDA, 3360 IN PUCHAR pEncap,
4124 IN PUCHAR pSA, 3361 IN PCIPHER_KEY pKey, IN UCHAR apidx);
4125 IN PUCHAR pMICKey, 3362
4126 IN UCHAR UserPriority, 3363VOID RTMPTkipAppendByte(IN PTKIP_KEY_INFO pTkip, IN UCHAR uChar);
4127 IN UINT Len); 3364
4128 3365VOID RTMPTkipAppend(IN PTKIP_KEY_INFO pTkip, IN PUCHAR pSrc, IN UINT nBytes);
4129VOID RTMPCalculateMICValue( 3366
4130 IN PRTMP_ADAPTER pAd, 3367VOID RTMPTkipGetMIC(IN PTKIP_KEY_INFO pTkip);
4131 IN PNDIS_PACKET pPacket,
4132 IN PUCHAR pEncap,
4133 IN PCIPHER_KEY pKey,
4134 IN UCHAR apidx);
4135
4136VOID RTMPTkipAppendByte(
4137 IN PTKIP_KEY_INFO pTkip,
4138 IN UCHAR uChar);
4139
4140VOID RTMPTkipAppend(
4141 IN PTKIP_KEY_INFO pTkip,
4142 IN PUCHAR pSrc,
4143 IN UINT nBytes);
4144
4145VOID RTMPTkipGetMIC(
4146 IN PTKIP_KEY_INFO pTkip);
4147
4148BOOLEAN RTMPSoftDecryptTKIP(
4149 IN PRTMP_ADAPTER pAd,
4150 IN PUCHAR pData,
4151 IN ULONG DataByteCnt,
4152 IN UCHAR UserPriority,
4153 IN PCIPHER_KEY pWpaKey);
4154
4155BOOLEAN RTMPSoftDecryptAES(
4156 IN PRTMP_ADAPTER pAd,
4157 IN PUCHAR pData,
4158 IN ULONG DataByteCnt,
4159 IN PCIPHER_KEY pWpaKey);
4160 3368
3369BOOLEAN RTMPSoftDecryptTKIP(IN PRTMP_ADAPTER pAd,
3370 IN PUCHAR pData,
3371 IN ULONG DataByteCnt,
3372 IN UCHAR UserPriority, IN PCIPHER_KEY pWpaKey);
4161 3373
3374BOOLEAN RTMPSoftDecryptAES(IN PRTMP_ADAPTER pAd,
3375 IN PUCHAR pData,
3376 IN ULONG DataByteCnt, IN PCIPHER_KEY pWpaKey);
4162 3377
4163// 3378//
4164// Prototypes of function definition in cmm_info.c 3379// Prototypes of function definition in cmm_info.c
4165// 3380//
4166INT RT_CfgSetCountryRegion( 3381INT RT_CfgSetCountryRegion(IN PRTMP_ADAPTER pAd, IN PSTRING arg, IN INT band);
4167 IN PRTMP_ADAPTER pAd,
4168 IN PSTRING arg,
4169 IN INT band);
4170 3382
4171INT RT_CfgSetWirelessMode( 3383INT RT_CfgSetWirelessMode(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
4172 IN PRTMP_ADAPTER pAd,
4173 IN PSTRING arg);
4174 3384
4175INT RT_CfgSetShortSlot( 3385INT RT_CfgSetShortSlot(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
4176 IN PRTMP_ADAPTER pAd,
4177 IN PSTRING arg);
4178
4179INT RT_CfgSetWepKey(
4180 IN PRTMP_ADAPTER pAd,
4181 IN PSTRING keyString,
4182 IN CIPHER_KEY *pSharedKey,
4183 IN INT keyIdx);
4184
4185INT RT_CfgSetWPAPSKKey(
4186 IN RTMP_ADAPTER *pAd,
4187 IN PSTRING keyString,
4188 IN UCHAR *pHashStr,
4189 IN INT hashStrLen,
4190 OUT PUCHAR pPMKBuf);
4191 3386
3387INT RT_CfgSetWepKey(IN PRTMP_ADAPTER pAd,
3388 IN PSTRING keyString,
3389 IN CIPHER_KEY * pSharedKey, IN INT keyIdx);
4192 3390
3391INT RT_CfgSetWPAPSKKey(IN RTMP_ADAPTER * pAd,
3392 IN PSTRING keyString,
3393 IN UCHAR * pHashStr,
3394 IN INT hashStrLen, OUT PUCHAR pPMKBuf);
4193 3395
4194// 3396//
4195// Prototypes of function definition in cmm_info.c 3397// Prototypes of function definition in cmm_info.c
4196// 3398//
4197VOID RTMPWPARemoveAllKeys( 3399VOID RTMPWPARemoveAllKeys(IN PRTMP_ADAPTER pAd);
4198 IN PRTMP_ADAPTER pAd); 3400
4199 3401VOID RTMPSetPhyMode(IN PRTMP_ADAPTER pAd, IN ULONG phymode);
4200VOID RTMPSetPhyMode( 3402
4201 IN PRTMP_ADAPTER pAd, 3403VOID RTMPUpdateHTIE(IN RT_HT_CAPABILITY * pRtHt,
4202 IN ULONG phymode); 3404 IN UCHAR * pMcsSet,
4203 3405 OUT HT_CAPABILITY_IE * pHtCapability,
4204VOID RTMPUpdateHTIE( 3406 OUT ADD_HT_INFO_IE * pAddHtInfo);
4205 IN RT_HT_CAPABILITY *pRtHt, 3407
4206 IN UCHAR *pMcsSet, 3408VOID RTMPAddWcidAttributeEntry(IN PRTMP_ADAPTER pAd,
4207 OUT HT_CAPABILITY_IE *pHtCapability, 3409 IN UCHAR BssIdx,
4208 OUT ADD_HT_INFO_IE *pAddHtInfo); 3410 IN UCHAR KeyIdx,
4209 3411 IN UCHAR CipherAlg, IN MAC_TABLE_ENTRY * pEntry);
4210VOID RTMPAddWcidAttributeEntry( 3412
4211 IN PRTMP_ADAPTER pAd, 3413PSTRING GetEncryptType(CHAR enc);
4212 IN UCHAR BssIdx, 3414
4213 IN UCHAR KeyIdx, 3415PSTRING GetAuthMode(CHAR auth);
4214 IN UCHAR CipherAlg, 3416
4215 IN MAC_TABLE_ENTRY *pEntry); 3417VOID RTMPSetHT(IN PRTMP_ADAPTER pAd, IN OID_SET_HT_PHYMODE * pHTPhyMode);
4216 3418
4217PSTRING GetEncryptType( 3419VOID RTMPSetIndividualHT(IN PRTMP_ADAPTER pAd, IN UCHAR apidx);
4218 CHAR enc); 3420
4219 3421VOID RTMPSendWirelessEvent(IN PRTMP_ADAPTER pAd,
4220PSTRING GetAuthMode( 3422 IN USHORT Event_flag,
4221 CHAR auth); 3423 IN PUCHAR pAddr, IN UCHAR BssIdx, IN CHAR Rssi);
4222 3424
4223VOID RTMPSetHT( 3425CHAR ConvertToRssi(IN PRTMP_ADAPTER pAd, IN CHAR Rssi, IN UCHAR RssiNumber);
4224 IN PRTMP_ADAPTER pAd,
4225 IN OID_SET_HT_PHYMODE *pHTPhyMode);
4226
4227VOID RTMPSetIndividualHT(
4228 IN PRTMP_ADAPTER pAd,
4229 IN UCHAR apidx);
4230
4231VOID RTMPSendWirelessEvent(
4232 IN PRTMP_ADAPTER pAd,
4233 IN USHORT Event_flag,
4234 IN PUCHAR pAddr,
4235 IN UCHAR BssIdx,
4236 IN CHAR Rssi);
4237
4238CHAR ConvertToRssi(
4239 IN PRTMP_ADAPTER pAd,
4240 IN CHAR Rssi,
4241 IN UCHAR RssiNumber);
4242 3426
4243/*=================================== 3427/*===================================
4244 Function prototype in cmm_wpa.c 3428 Function prototype in cmm_wpa.c
4245 =================================== */ 3429 =================================== */
4246VOID RTMPToWirelessSta( 3430VOID RTMPToWirelessSta(IN PRTMP_ADAPTER pAd,
4247 IN PRTMP_ADAPTER pAd, 3431 IN PMAC_TABLE_ENTRY pEntry,
4248 IN PMAC_TABLE_ENTRY pEntry, 3432 IN PUCHAR pHeader802_3,
4249 IN PUCHAR pHeader802_3, 3433 IN UINT HdrLen,
4250 IN UINT HdrLen, 3434 IN PUCHAR pData,
4251 IN PUCHAR pData, 3435 IN UINT DataLen, IN BOOLEAN bClearFrame);
4252 IN UINT DataLen, 3436
4253 IN BOOLEAN bClearFrame); 3437VOID WpaDerivePTK(IN PRTMP_ADAPTER pAd,
4254 3438 IN UCHAR * PMK,
4255VOID WpaDerivePTK( 3439 IN UCHAR * ANonce,
4256 IN PRTMP_ADAPTER pAd, 3440 IN UCHAR * AA,
4257 IN UCHAR *PMK, 3441 IN UCHAR * SNonce,
4258 IN UCHAR *ANonce, 3442 IN UCHAR * SA, OUT UCHAR * output, IN UINT len);
4259 IN UCHAR *AA, 3443
4260 IN UCHAR *SNonce, 3444VOID GenRandom(IN PRTMP_ADAPTER pAd, IN UCHAR * macAddr, OUT UCHAR * random);
4261 IN UCHAR *SA, 3445
4262 OUT UCHAR *output, 3446BOOLEAN RTMPCheckWPAframe(IN PRTMP_ADAPTER pAd,
4263 IN UINT len); 3447 IN PMAC_TABLE_ENTRY pEntry,
4264 3448 IN PUCHAR pData,
4265VOID GenRandom( 3449 IN ULONG DataByteCount, IN UCHAR FromWhichBSSID);
4266 IN PRTMP_ADAPTER pAd, 3450
4267 IN UCHAR *macAddr, 3451VOID AES_GTK_KEY_UNWRAP(IN UCHAR * key,
4268 OUT UCHAR *random); 3452 OUT UCHAR * plaintext,
4269 3453 IN UINT32 c_len, IN UCHAR * ciphertext);
4270BOOLEAN RTMPCheckWPAframe( 3454
4271 IN PRTMP_ADAPTER pAd, 3455BOOLEAN RTMPParseEapolKeyData(IN PRTMP_ADAPTER pAd,
4272 IN PMAC_TABLE_ENTRY pEntry, 3456 IN PUCHAR pKeyData,
4273 IN PUCHAR pData, 3457 IN UCHAR KeyDataLen,
4274 IN ULONG DataByteCount, 3458 IN UCHAR GroupKeyIndex,
4275 IN UCHAR FromWhichBSSID); 3459 IN UCHAR MsgType,
4276 3460 IN BOOLEAN bWPA2, IN MAC_TABLE_ENTRY * pEntry);
4277VOID AES_GTK_KEY_UNWRAP( 3461
4278 IN UCHAR *key, 3462VOID ConstructEapolMsg(IN PMAC_TABLE_ENTRY pEntry,
4279 OUT UCHAR *plaintext, 3463 IN UCHAR GroupKeyWepStatus,
4280 IN UINT32 c_len, 3464 IN UCHAR MsgType,
4281 IN UCHAR *ciphertext); 3465 IN UCHAR DefaultKeyIdx,
4282 3466 IN UCHAR * KeyNonce,
4283BOOLEAN RTMPParseEapolKeyData( 3467 IN UCHAR * TxRSC,
4284 IN PRTMP_ADAPTER pAd, 3468 IN UCHAR * GTK,
4285 IN PUCHAR pKeyData, 3469 IN UCHAR * RSNIE,
4286 IN UCHAR KeyDataLen, 3470 IN UCHAR RSNIE_Len, OUT PEAPOL_PACKET pMsg);
4287 IN UCHAR GroupKeyIndex, 3471
4288 IN UCHAR MsgType, 3472NDIS_STATUS RTMPSoftDecryptBroadCastData(IN PRTMP_ADAPTER pAd,
4289 IN BOOLEAN bWPA2, 3473 IN RX_BLK * pRxBlk,
4290 IN MAC_TABLE_ENTRY *pEntry); 3474 IN NDIS_802_11_ENCRYPTION_STATUS
4291 3475 GroupCipher,
4292VOID ConstructEapolMsg( 3476 IN PCIPHER_KEY pShard_key);
4293 IN PMAC_TABLE_ENTRY pEntry, 3477
4294 IN UCHAR GroupKeyWepStatus, 3478VOID RTMPMakeRSNIE(IN PRTMP_ADAPTER pAd,
4295 IN UCHAR MsgType, 3479 IN UINT AuthMode, IN UINT WepStatus, IN UCHAR apidx);
4296 IN UCHAR DefaultKeyIdx,
4297 IN UCHAR *KeyNonce,
4298 IN UCHAR *TxRSC,
4299 IN UCHAR *GTK,
4300 IN UCHAR *RSNIE,
4301 IN UCHAR RSNIE_Len,
4302 OUT PEAPOL_PACKET pMsg);
4303
4304NDIS_STATUS RTMPSoftDecryptBroadCastData(
4305 IN PRTMP_ADAPTER pAd,
4306 IN RX_BLK *pRxBlk,
4307 IN NDIS_802_11_ENCRYPTION_STATUS GroupCipher,
4308 IN PCIPHER_KEY pShard_key);
4309
4310VOID RTMPMakeRSNIE(
4311 IN PRTMP_ADAPTER pAd,
4312 IN UINT AuthMode,
4313 IN UINT WepStatus,
4314 IN UCHAR apidx);
4315 3480
4316// 3481//
4317// function prototype in ap_wpa.c 3482// function prototype in ap_wpa.c
4318// 3483//
4319VOID RTMPGetTxTscFromAsic( 3484VOID RTMPGetTxTscFromAsic(IN PRTMP_ADAPTER pAd,
4320 IN PRTMP_ADAPTER pAd, 3485 IN UCHAR apidx, OUT PUCHAR pTxTsc);
4321 IN UCHAR apidx,
4322 OUT PUCHAR pTxTsc);
4323
4324VOID APInstallPairwiseKey(
4325 PRTMP_ADAPTER pAd,
4326 PMAC_TABLE_ENTRY pEntry);
4327
4328UINT APValidateRSNIE(
4329 IN PRTMP_ADAPTER pAd,
4330 IN PMAC_TABLE_ENTRY pEntry,
4331 IN PUCHAR pRsnIe,
4332 IN UCHAR rsnie_len);
4333
4334VOID HandleCounterMeasure(
4335 IN PRTMP_ADAPTER pAd,
4336 IN MAC_TABLE_ENTRY *pEntry);
4337
4338VOID WPAStart4WayHS(
4339 IN PRTMP_ADAPTER pAd,
4340 IN MAC_TABLE_ENTRY *pEntry,
4341 IN ULONG TimeInterval);
4342
4343VOID WPAStart2WayGroupHS(
4344 IN PRTMP_ADAPTER pAd,
4345 IN MAC_TABLE_ENTRY *pEntry);
4346
4347VOID PeerPairMsg1Action(
4348 IN PRTMP_ADAPTER pAd,
4349 IN MAC_TABLE_ENTRY *pEntry,
4350 IN MLME_QUEUE_ELEM *Elem);
4351
4352VOID PeerPairMsg2Action(
4353 IN PRTMP_ADAPTER pAd,
4354 IN MAC_TABLE_ENTRY *pEntry,
4355 IN MLME_QUEUE_ELEM *Elem);
4356
4357VOID PeerPairMsg3Action(
4358 IN PRTMP_ADAPTER pAd,
4359 IN MAC_TABLE_ENTRY *pEntry,
4360 IN MLME_QUEUE_ELEM *Elem);
4361
4362VOID PeerPairMsg4Action(
4363 IN PRTMP_ADAPTER pAd,
4364 IN MAC_TABLE_ENTRY *pEntry,
4365 IN MLME_QUEUE_ELEM *Elem);
4366
4367VOID PeerGroupMsg1Action(
4368 IN PRTMP_ADAPTER pAd,
4369 IN PMAC_TABLE_ENTRY pEntry,
4370 IN MLME_QUEUE_ELEM *Elem);
4371
4372VOID PeerGroupMsg2Action(
4373 IN PRTMP_ADAPTER pAd,
4374 IN PMAC_TABLE_ENTRY pEntry,
4375 IN VOID *Msg,
4376 IN UINT MsgLen);
4377
4378VOID WpaDeriveGTK(
4379 IN UCHAR *PMK,
4380 IN UCHAR *GNonce,
4381 IN UCHAR *AA,
4382 OUT UCHAR *output,
4383 IN UINT len);
4384
4385VOID AES_GTK_KEY_WRAP(
4386 IN UCHAR *key,
4387 IN UCHAR *plaintext,
4388 IN UINT32 p_len,
4389 OUT UCHAR *ciphertext);
4390 3486
4391//typedef void (*TIMER_FUNCTION)(unsigned long); 3487VOID APInstallPairwiseKey(PRTMP_ADAPTER pAd, PMAC_TABLE_ENTRY pEntry);
3488
3489UINT APValidateRSNIE(IN PRTMP_ADAPTER pAd,
3490 IN PMAC_TABLE_ENTRY pEntry,
3491 IN PUCHAR pRsnIe, IN UCHAR rsnie_len);
3492
3493VOID HandleCounterMeasure(IN PRTMP_ADAPTER pAd, IN MAC_TABLE_ENTRY * pEntry);
3494
3495VOID WPAStart4WayHS(IN PRTMP_ADAPTER pAd,
3496 IN MAC_TABLE_ENTRY * pEntry, IN ULONG TimeInterval);
4392 3497
3498VOID WPAStart2WayGroupHS(IN PRTMP_ADAPTER pAd, IN MAC_TABLE_ENTRY * pEntry);
3499
3500VOID PeerPairMsg1Action(IN PRTMP_ADAPTER pAd,
3501 IN MAC_TABLE_ENTRY * pEntry, IN MLME_QUEUE_ELEM * Elem);
3502
3503VOID PeerPairMsg2Action(IN PRTMP_ADAPTER pAd,
3504 IN MAC_TABLE_ENTRY * pEntry, IN MLME_QUEUE_ELEM * Elem);
3505
3506VOID PeerPairMsg3Action(IN PRTMP_ADAPTER pAd,
3507 IN MAC_TABLE_ENTRY * pEntry, IN MLME_QUEUE_ELEM * Elem);
3508
3509VOID PeerPairMsg4Action(IN PRTMP_ADAPTER pAd,
3510 IN MAC_TABLE_ENTRY * pEntry, IN MLME_QUEUE_ELEM * Elem);
3511
3512VOID PeerGroupMsg1Action(IN PRTMP_ADAPTER pAd,
3513 IN PMAC_TABLE_ENTRY pEntry, IN MLME_QUEUE_ELEM * Elem);
3514
3515VOID PeerGroupMsg2Action(IN PRTMP_ADAPTER pAd,
3516 IN PMAC_TABLE_ENTRY pEntry,
3517 IN VOID * Msg, IN UINT MsgLen);
3518
3519VOID WpaDeriveGTK(IN UCHAR * PMK,
3520 IN UCHAR * GNonce,
3521 IN UCHAR * AA, OUT UCHAR * output, IN UINT len);
3522
3523VOID AES_GTK_KEY_WRAP(IN UCHAR * key,
3524 IN UCHAR * plaintext,
3525 IN UINT32 p_len, OUT UCHAR * ciphertext);
3526
3527//typedef void (*TIMER_FUNCTION)(unsigned long);
4393 3528
4394/* timeout -- ms */ 3529/* timeout -- ms */
4395VOID RTMP_SetPeriodicTimer( 3530VOID RTMP_SetPeriodicTimer(IN NDIS_MINIPORT_TIMER * pTimer,
4396 IN NDIS_MINIPORT_TIMER *pTimer, 3531 IN unsigned long timeout);
4397 IN unsigned long timeout);
4398
4399VOID RTMP_OS_Init_Timer(
4400 IN PRTMP_ADAPTER pAd,
4401 IN NDIS_MINIPORT_TIMER *pTimer,
4402 IN TIMER_FUNCTION function,
4403 IN PVOID data);
4404
4405VOID RTMP_OS_Add_Timer(
4406 IN NDIS_MINIPORT_TIMER *pTimer,
4407 IN unsigned long timeout);
4408
4409VOID RTMP_OS_Mod_Timer(
4410 IN NDIS_MINIPORT_TIMER *pTimer,
4411 IN unsigned long timeout);
4412
4413
4414VOID RTMP_OS_Del_Timer(
4415 IN NDIS_MINIPORT_TIMER *pTimer,
4416 OUT BOOLEAN *pCancelled);
4417
4418
4419VOID RTMP_OS_Release_Packet(
4420 IN PRTMP_ADAPTER pAd,
4421 IN PQUEUE_ENTRY pEntry);
4422
4423VOID RTMPusecDelay(
4424 IN ULONG usec);
4425
4426NDIS_STATUS os_alloc_mem(
4427 IN RTMP_ADAPTER *pAd,
4428 OUT UCHAR **mem,
4429 IN ULONG size);
4430
4431NDIS_STATUS os_free_mem(
4432 IN PRTMP_ADAPTER pAd,
4433 IN PVOID mem);
4434
4435
4436void RTMP_AllocateSharedMemory(
4437 IN PRTMP_ADAPTER pAd,
4438 IN ULONG Length,
4439 IN BOOLEAN Cached,
4440 OUT PVOID *VirtualAddress,
4441 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4442
4443VOID RTMPFreeTxRxRingMemory(
4444 IN PRTMP_ADAPTER pAd);
4445
4446NDIS_STATUS AdapterBlockAllocateMemory(
4447 IN PVOID handle,
4448 OUT PVOID *ppAd);
4449
4450void RTMP_AllocateTxDescMemory(
4451 IN PRTMP_ADAPTER pAd,
4452 IN UINT Index,
4453 IN ULONG Length,
4454 IN BOOLEAN Cached,
4455 OUT PVOID *VirtualAddress,
4456 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4457
4458void RTMP_AllocateFirstTxBuffer(
4459 IN PRTMP_ADAPTER pAd,
4460 IN UINT Index,
4461 IN ULONG Length,
4462 IN BOOLEAN Cached,
4463 OUT PVOID *VirtualAddress,
4464 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4465
4466void RTMP_FreeFirstTxBuffer(
4467 IN PRTMP_ADAPTER pAd,
4468 IN ULONG Length,
4469 IN BOOLEAN Cached,
4470 IN PVOID VirtualAddress,
4471 IN NDIS_PHYSICAL_ADDRESS PhysicalAddress);
4472
4473void RTMP_AllocateMgmtDescMemory(
4474 IN PRTMP_ADAPTER pAd,
4475 IN ULONG Length,
4476 IN BOOLEAN Cached,
4477 OUT PVOID *VirtualAddress,
4478 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4479
4480void RTMP_AllocateRxDescMemory(
4481 IN PRTMP_ADAPTER pAd,
4482 IN ULONG Length,
4483 IN BOOLEAN Cached,
4484 OUT PVOID *VirtualAddress,
4485 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4486
4487void RTMP_FreeDescMemory(
4488 IN PRTMP_ADAPTER pAd,
4489 IN ULONG Length,
4490 IN PVOID VirtualAddress,
4491 IN NDIS_PHYSICAL_ADDRESS PhysicalAddress);
4492
4493PNDIS_PACKET RtmpOSNetPktAlloc(
4494 IN RTMP_ADAPTER *pAd,
4495 IN int size);
4496
4497PNDIS_PACKET RTMP_AllocateRxPacketBuffer(
4498 IN PRTMP_ADAPTER pAd,
4499 IN ULONG Length,
4500 IN BOOLEAN Cached,
4501 OUT PVOID *VirtualAddress,
4502 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4503
4504PNDIS_PACKET RTMP_AllocateTxPacketBuffer(
4505 IN PRTMP_ADAPTER pAd,
4506 IN ULONG Length,
4507 IN BOOLEAN Cached,
4508 OUT PVOID *VirtualAddress);
4509
4510PNDIS_PACKET RTMP_AllocateFragPacketBuffer(
4511 IN PRTMP_ADAPTER pAd,
4512 IN ULONG Length);
4513
4514void RTMP_QueryPacketInfo(
4515 IN PNDIS_PACKET pPacket,
4516 OUT PACKET_INFO *pPacketInfo,
4517 OUT PUCHAR *pSrcBufVA,
4518 OUT UINT *pSrcBufLen);
4519
4520void RTMP_QueryNextPacketInfo(
4521 IN PNDIS_PACKET *ppPacket,
4522 OUT PACKET_INFO *pPacketInfo,
4523 OUT PUCHAR *pSrcBufVA,
4524 OUT UINT *pSrcBufLen);
4525
4526
4527BOOLEAN RTMP_FillTxBlkInfo(
4528 IN RTMP_ADAPTER *pAd,
4529 IN TX_BLK *pTxBlk);
4530 3532
3533VOID RTMP_OS_Init_Timer(IN PRTMP_ADAPTER pAd,
3534 IN NDIS_MINIPORT_TIMER * pTimer,
3535 IN TIMER_FUNCTION function, IN PVOID data);
4531 3536
4532PRTMP_SCATTER_GATHER_LIST 3537VOID RTMP_OS_Add_Timer(IN NDIS_MINIPORT_TIMER * pTimer,
4533rt_get_sg_list_from_packet(PNDIS_PACKET pPacket, RTMP_SCATTER_GATHER_LIST *sg); 3538 IN unsigned long timeout);
4534 3539
3540VOID RTMP_OS_Mod_Timer(IN NDIS_MINIPORT_TIMER * pTimer,
3541 IN unsigned long timeout);
4535 3542
4536 void announce_802_3_packet( 3543VOID RTMP_OS_Del_Timer(IN NDIS_MINIPORT_TIMER * pTimer,
4537 IN PRTMP_ADAPTER pAd, 3544 OUT BOOLEAN * pCancelled);
4538 IN PNDIS_PACKET pPacket);
4539 3545
3546VOID RTMP_OS_Release_Packet(IN PRTMP_ADAPTER pAd, IN PQUEUE_ENTRY pEntry);
4540 3547
4541UINT BA_Reorder_AMSDU_Annnounce( 3548VOID RTMPusecDelay(IN ULONG usec);
4542 IN PRTMP_ADAPTER pAd,
4543 IN PNDIS_PACKET pPacket);
4544 3549
4545PNET_DEV get_netdev_from_bssid( 3550NDIS_STATUS os_alloc_mem(IN RTMP_ADAPTER * pAd,
4546 IN PRTMP_ADAPTER pAd, 3551 OUT UCHAR ** mem, IN ULONG size);
4547 IN UCHAR FromWhichBSSID);
4548 3552
3553NDIS_STATUS os_free_mem(IN PRTMP_ADAPTER pAd, IN PVOID mem);
4549 3554
4550PNDIS_PACKET duplicate_pkt( 3555void RTMP_AllocateSharedMemory(IN PRTMP_ADAPTER pAd,
4551 IN PRTMP_ADAPTER pAd, 3556 IN ULONG Length,
4552 IN PUCHAR pHeader802_3, 3557 IN BOOLEAN Cached,
4553 IN UINT HdrLen, 3558 OUT PVOID * VirtualAddress,
4554 IN PUCHAR pData, 3559 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4555 IN ULONG DataSize,
4556 IN UCHAR FromWhichBSSID);
4557 3560
3561VOID RTMPFreeTxRxRingMemory(IN PRTMP_ADAPTER pAd);
4558 3562
4559PNDIS_PACKET duplicate_pkt_with_TKIP_MIC( 3563NDIS_STATUS AdapterBlockAllocateMemory(IN PVOID handle, OUT PVOID * ppAd);
4560 IN PRTMP_ADAPTER pAd,
4561 IN PNDIS_PACKET pOldPkt);
4562 3564
4563void ba_flush_reordering_timeout_mpdus( 3565void RTMP_AllocateTxDescMemory(IN PRTMP_ADAPTER pAd,
4564 IN PRTMP_ADAPTER pAd, 3566 IN UINT Index,
4565 IN PBA_REC_ENTRY pBAEntry, 3567 IN ULONG Length,
4566 IN ULONG Now32); 3568 IN BOOLEAN Cached,
3569 OUT PVOID * VirtualAddress,
3570 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4567 3571
3572void RTMP_AllocateFirstTxBuffer(IN PRTMP_ADAPTER pAd,
3573 IN UINT Index,
3574 IN ULONG Length,
3575 IN BOOLEAN Cached,
3576 OUT PVOID * VirtualAddress,
3577 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4568 3578
4569VOID BAOriSessionSetUp( 3579void RTMP_FreeFirstTxBuffer(IN PRTMP_ADAPTER pAd,
4570 IN PRTMP_ADAPTER pAd, 3580 IN ULONG Length,
4571 IN MAC_TABLE_ENTRY *pEntry, 3581 IN BOOLEAN Cached,
4572 IN UCHAR TID, 3582 IN PVOID VirtualAddress,
4573 IN USHORT TimeOut, 3583 IN NDIS_PHYSICAL_ADDRESS PhysicalAddress);
4574 IN ULONG DelayTime,
4575 IN BOOLEAN isForced);
4576 3584
4577VOID BASessionTearDownALL( 3585void RTMP_AllocateMgmtDescMemory(IN PRTMP_ADAPTER pAd,
4578 IN OUT PRTMP_ADAPTER pAd, 3586 IN ULONG Length,
4579 IN UCHAR Wcid); 3587 IN BOOLEAN Cached,
3588 OUT PVOID * VirtualAddress,
3589 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
4580 3590
4581BOOLEAN OS_Need_Clone_Packet(void); 3591void RTMP_AllocateRxDescMemory(IN PRTMP_ADAPTER pAd,
3592 IN ULONG Length,
3593 IN BOOLEAN Cached,
3594 OUT PVOID * VirtualAddress,
3595 OUT PNDIS_PHYSICAL_ADDRESS PhysicalAddress);
3596
3597void RTMP_FreeDescMemory(IN PRTMP_ADAPTER pAd,
3598 IN ULONG Length,
3599 IN PVOID VirtualAddress,
3600 IN NDIS_PHYSICAL_ADDRESS PhysicalAddress);
3601
3602PNDIS_PACKET RtmpOSNetPktAlloc(IN RTMP_ADAPTER * pAd, IN int size);
3603
3604PNDIS_PACKET RTMP_AllocateRxPacketBuffer(IN PRTMP_ADAPTER pAd,
3605 IN ULONG Length,
3606 IN BOOLEAN Cached,
3607 OUT PVOID * VirtualAddress,
3608 OUT PNDIS_PHYSICAL_ADDRESS
3609 PhysicalAddress);
4582 3610
3611PNDIS_PACKET RTMP_AllocateTxPacketBuffer(IN PRTMP_ADAPTER pAd,
3612 IN ULONG Length,
3613 IN BOOLEAN Cached,
3614 OUT PVOID * VirtualAddress);
4583 3615
4584VOID build_tx_packet( 3616PNDIS_PACKET RTMP_AllocateFragPacketBuffer(IN PRTMP_ADAPTER pAd,
4585 IN PRTMP_ADAPTER pAd, 3617 IN ULONG Length);
4586 IN PNDIS_PACKET pPacket, 3618
4587 IN PUCHAR pFrame, 3619void RTMP_QueryPacketInfo(IN PNDIS_PACKET pPacket,
4588 IN ULONG FrameLen); 3620 OUT PACKET_INFO * pPacketInfo,
3621 OUT PUCHAR * pSrcBufVA, OUT UINT * pSrcBufLen);
3622
3623void RTMP_QueryNextPacketInfo(IN PNDIS_PACKET * ppPacket,
3624 OUT PACKET_INFO * pPacketInfo,
3625 OUT PUCHAR * pSrcBufVA, OUT UINT * pSrcBufLen);
3626
3627BOOLEAN RTMP_FillTxBlkInfo(IN RTMP_ADAPTER * pAd, IN TX_BLK * pTxBlk);
3628
3629PRTMP_SCATTER_GATHER_LIST
3630rt_get_sg_list_from_packet(PNDIS_PACKET pPacket, RTMP_SCATTER_GATHER_LIST * sg);
3631
3632void announce_802_3_packet(IN PRTMP_ADAPTER pAd, IN PNDIS_PACKET pPacket);
3633
3634UINT BA_Reorder_AMSDU_Annnounce(IN PRTMP_ADAPTER pAd, IN PNDIS_PACKET pPacket);
3635
3636PNET_DEV get_netdev_from_bssid(IN PRTMP_ADAPTER pAd, IN UCHAR FromWhichBSSID);
3637
3638PNDIS_PACKET duplicate_pkt(IN PRTMP_ADAPTER pAd,
3639 IN PUCHAR pHeader802_3,
3640 IN UINT HdrLen,
3641 IN PUCHAR pData,
3642 IN ULONG DataSize, IN UCHAR FromWhichBSSID);
3643
3644PNDIS_PACKET duplicate_pkt_with_TKIP_MIC(IN PRTMP_ADAPTER pAd,
3645 IN PNDIS_PACKET pOldPkt);
3646
3647void ba_flush_reordering_timeout_mpdus(IN PRTMP_ADAPTER pAd,
3648 IN PBA_REC_ENTRY pBAEntry,
3649 IN ULONG Now32);
3650
3651VOID BAOriSessionSetUp(IN PRTMP_ADAPTER pAd,
3652 IN MAC_TABLE_ENTRY * pEntry,
3653 IN UCHAR TID,
3654 IN USHORT TimeOut,
3655 IN ULONG DelayTime, IN BOOLEAN isForced);
3656
3657VOID BASessionTearDownALL(IN OUT PRTMP_ADAPTER pAd, IN UCHAR Wcid);
3658
3659BOOLEAN OS_Need_Clone_Packet(void);
4589 3660
3661VOID build_tx_packet(IN PRTMP_ADAPTER pAd,
3662 IN PNDIS_PACKET pPacket,
3663 IN PUCHAR pFrame, IN ULONG FrameLen);
4590 3664
4591VOID BAOriSessionTearDown( 3665VOID BAOriSessionTearDown(IN OUT PRTMP_ADAPTER pAd,
4592 IN OUT PRTMP_ADAPTER pAd, 3666 IN UCHAR Wcid,
4593 IN UCHAR Wcid, 3667 IN UCHAR TID,
4594 IN UCHAR TID, 3668 IN BOOLEAN bPassive, IN BOOLEAN bForceSend);
4595 IN BOOLEAN bPassive,
4596 IN BOOLEAN bForceSend);
4597 3669
4598VOID BARecSessionTearDown( 3670VOID BARecSessionTearDown(IN OUT PRTMP_ADAPTER pAd,
4599 IN OUT PRTMP_ADAPTER pAd, 3671 IN UCHAR Wcid, IN UCHAR TID, IN BOOLEAN bPassive);
4600 IN UCHAR Wcid,
4601 IN UCHAR TID,
4602 IN BOOLEAN bPassive);
4603 3672
4604BOOLEAN ba_reordering_resource_init(PRTMP_ADAPTER pAd, int num); 3673BOOLEAN ba_reordering_resource_init(PRTMP_ADAPTER pAd, int num);
4605void ba_reordering_resource_release(PRTMP_ADAPTER pAd); 3674void ba_reordering_resource_release(PRTMP_ADAPTER pAd);
4606 3675
4607PSTRING rstrtok( 3676PSTRING rstrtok(IN PSTRING s, IN const PSTRING ct);
4608 IN PSTRING s,
4609 IN const PSTRING ct);
4610 3677
4611////////// common ioctl functions ////////// 3678////////// common ioctl functions //////////
4612INT SetCommonHT( 3679INT SetCommonHT(IN PRTMP_ADAPTER pAd);
4613 IN PRTMP_ADAPTER pAd);
4614 3680
4615INT WpaCheckEapCode( 3681INT WpaCheckEapCode(IN PRTMP_ADAPTER pAd,
4616 IN PRTMP_ADAPTER pAd, 3682 IN PUCHAR pFrame, IN USHORT FrameLen, IN USHORT OffSet);
4617 IN PUCHAR pFrame,
4618 IN USHORT FrameLen,
4619 IN USHORT OffSet);
4620 3683
4621VOID WpaSendMicFailureToWpaSupplicant( 3684VOID WpaSendMicFailureToWpaSupplicant(IN PRTMP_ADAPTER pAd,
4622 IN PRTMP_ADAPTER pAd, 3685 IN BOOLEAN bUnicast);
4623 IN BOOLEAN bUnicast);
4624 3686
4625int wext_notify_event_assoc( 3687int wext_notify_event_assoc(IN RTMP_ADAPTER * pAd);
4626 IN RTMP_ADAPTER *pAd);
4627 3688
4628BOOLEAN STARxDoneInterruptHandle( 3689BOOLEAN STARxDoneInterruptHandle(IN PRTMP_ADAPTER pAd, IN BOOLEAN argc);
4629 IN PRTMP_ADAPTER pAd,
4630 IN BOOLEAN argc);
4631 3690
4632// AMPDU packet indication 3691// AMPDU packet indication
4633VOID Indicate_AMPDU_Packet( 3692VOID Indicate_AMPDU_Packet(IN PRTMP_ADAPTER pAd,
4634 IN PRTMP_ADAPTER pAd, 3693 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4635 IN RX_BLK *pRxBlk,
4636 IN UCHAR FromWhichBSSID);
4637 3694
4638// AMSDU packet indication 3695// AMSDU packet indication
4639VOID Indicate_AMSDU_Packet( 3696VOID Indicate_AMSDU_Packet(IN PRTMP_ADAPTER pAd,
4640 IN PRTMP_ADAPTER pAd, 3697 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4641 IN RX_BLK *pRxBlk,
4642 IN UCHAR FromWhichBSSID);
4643 3698
4644// Normal legacy Rx packet indication 3699// Normal legacy Rx packet indication
4645VOID Indicate_Legacy_Packet( 3700VOID Indicate_Legacy_Packet(IN PRTMP_ADAPTER pAd,
4646 IN PRTMP_ADAPTER pAd, 3701 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4647 IN RX_BLK *pRxBlk, 3702
4648 IN UCHAR FromWhichBSSID); 3703VOID Indicate_EAPOL_Packet(IN PRTMP_ADAPTER pAd,
4649 3704 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4650VOID Indicate_EAPOL_Packet( 3705
4651 IN PRTMP_ADAPTER pAd, 3706void update_os_packet_info(IN PRTMP_ADAPTER pAd,
4652 IN RX_BLK *pRxBlk, 3707 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4653 IN UCHAR FromWhichBSSID); 3708
4654 3709void wlan_802_11_to_802_3_packet(IN PRTMP_ADAPTER pAd,
4655void update_os_packet_info( 3710 IN RX_BLK * pRxBlk,
4656 IN PRTMP_ADAPTER pAd, 3711 IN PUCHAR pHeader802_3,
4657 IN RX_BLK *pRxBlk, 3712 IN UCHAR FromWhichBSSID);
4658 IN UCHAR FromWhichBSSID);
4659
4660void wlan_802_11_to_802_3_packet(
4661 IN PRTMP_ADAPTER pAd,
4662 IN RX_BLK *pRxBlk,
4663 IN PUCHAR pHeader802_3,
4664 IN UCHAR FromWhichBSSID);
4665 3713
4666// remove LLC and get 802_3 Header 3714// remove LLC and get 802_3 Header
4667#define RTMP_802_11_REMOVE_LLC_AND_CONVERT_TO_802_3(_pRxBlk, _pHeader802_3) \ 3715#define RTMP_802_11_REMOVE_LLC_AND_CONVERT_TO_802_3(_pRxBlk, _pHeader802_3) \
@@ -4694,138 +3742,122 @@ void wlan_802_11_to_802_3_packet(
4694 _pRxBlk->DataSize, _pRemovedLLCSNAP); \ 3742 _pRxBlk->DataSize, _pRemovedLLCSNAP); \
4695} 3743}
4696 3744
4697VOID Sta_Announce_or_Forward_802_3_Packet( 3745VOID Sta_Announce_or_Forward_802_3_Packet(IN PRTMP_ADAPTER pAd,
4698 IN PRTMP_ADAPTER pAd, 3746 IN PNDIS_PACKET pPacket,
4699 IN PNDIS_PACKET pPacket, 3747 IN UCHAR FromWhichBSSID);
4700 IN UCHAR FromWhichBSSID);
4701 3748
4702#define ANNOUNCE_OR_FORWARD_802_3_PACKET(_pAd, _pPacket, _FromWhichBSS)\ 3749#define ANNOUNCE_OR_FORWARD_802_3_PACKET(_pAd, _pPacket, _FromWhichBSS)\
4703 Sta_Announce_or_Forward_802_3_Packet(_pAd, _pPacket, _FromWhichBSS); 3750 Sta_Announce_or_Forward_802_3_Packet(_pAd, _pPacket, _FromWhichBSS);
4704 //announce_802_3_packet(_pAd, _pPacket); 3751 //announce_802_3_packet(_pAd, _pPacket);
4705 3752
4706PNDIS_PACKET DuplicatePacket( 3753PNDIS_PACKET DuplicatePacket(IN PRTMP_ADAPTER pAd,
4707 IN PRTMP_ADAPTER pAd, 3754 IN PNDIS_PACKET pPacket, IN UCHAR FromWhichBSSID);
4708 IN PNDIS_PACKET pPacket, 3755
4709 IN UCHAR FromWhichBSSID); 3756PNDIS_PACKET ClonePacket(IN PRTMP_ADAPTER pAd,
3757 IN PNDIS_PACKET pPacket,
3758 IN PUCHAR pData, IN ULONG DataSize);
4710 3759
3760// Normal, AMPDU or AMSDU
3761VOID CmmRxnonRalinkFrameIndicate(IN PRTMP_ADAPTER pAd,
3762 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4711 3763
4712PNDIS_PACKET ClonePacket( 3764VOID CmmRxRalinkFrameIndicate(IN PRTMP_ADAPTER pAd,
4713 IN PRTMP_ADAPTER pAd, 3765 IN MAC_TABLE_ENTRY * pEntry,
4714 IN PNDIS_PACKET pPacket, 3766 IN RX_BLK * pRxBlk, IN UCHAR FromWhichBSSID);
4715 IN PUCHAR pData,
4716 IN ULONG DataSize);
4717 3767
3768VOID Update_Rssi_Sample(IN PRTMP_ADAPTER pAd,
3769 IN RSSI_SAMPLE * pRssi, IN PRXWI_STRUC pRxWI);
4718 3770
4719// Normal, AMPDU or AMSDU 3771PNDIS_PACKET GetPacketFromRxRing(IN PRTMP_ADAPTER pAd,
4720VOID CmmRxnonRalinkFrameIndicate( 3772 OUT PRT28XX_RXD_STRUC pSaveRxD,
4721 IN PRTMP_ADAPTER pAd, 3773 OUT BOOLEAN * pbReschedule,
4722 IN RX_BLK *pRxBlk, 3774 IN OUT UINT32 * pRxPending);
4723 IN UCHAR FromWhichBSSID); 3775
4724 3776PNDIS_PACKET RTMPDeFragmentDataFrame(IN PRTMP_ADAPTER pAd, IN RX_BLK * pRxBlk);
4725VOID CmmRxRalinkFrameIndicate(
4726 IN PRTMP_ADAPTER pAd,
4727 IN MAC_TABLE_ENTRY *pEntry,
4728 IN RX_BLK *pRxBlk,
4729 IN UCHAR FromWhichBSSID);
4730
4731VOID Update_Rssi_Sample(
4732 IN PRTMP_ADAPTER pAd,
4733 IN RSSI_SAMPLE *pRssi,
4734 IN PRXWI_STRUC pRxWI);
4735
4736PNDIS_PACKET GetPacketFromRxRing(
4737 IN PRTMP_ADAPTER pAd,
4738 OUT PRT28XX_RXD_STRUC pSaveRxD,
4739 OUT BOOLEAN *pbReschedule,
4740 IN OUT UINT32 *pRxPending);
4741
4742PNDIS_PACKET RTMPDeFragmentDataFrame(
4743 IN PRTMP_ADAPTER pAd,
4744 IN RX_BLK *pRxBlk);
4745 3777
4746enum { 3778enum {
4747 DIDmsg_lnxind_wlansniffrm = 0x00000044, 3779 DIDmsg_lnxind_wlansniffrm = 0x00000044,
4748 DIDmsg_lnxind_wlansniffrm_hosttime = 0x00010044, 3780 DIDmsg_lnxind_wlansniffrm_hosttime = 0x00010044,
4749 DIDmsg_lnxind_wlansniffrm_mactime = 0x00020044, 3781 DIDmsg_lnxind_wlansniffrm_mactime = 0x00020044,
4750 DIDmsg_lnxind_wlansniffrm_channel = 0x00030044, 3782 DIDmsg_lnxind_wlansniffrm_channel = 0x00030044,
4751 DIDmsg_lnxind_wlansniffrm_rssi = 0x00040044, 3783 DIDmsg_lnxind_wlansniffrm_rssi = 0x00040044,
4752 DIDmsg_lnxind_wlansniffrm_sq = 0x00050044, 3784 DIDmsg_lnxind_wlansniffrm_sq = 0x00050044,
4753 DIDmsg_lnxind_wlansniffrm_signal = 0x00060044, 3785 DIDmsg_lnxind_wlansniffrm_signal = 0x00060044,
4754 DIDmsg_lnxind_wlansniffrm_noise = 0x00070044, 3786 DIDmsg_lnxind_wlansniffrm_noise = 0x00070044,
4755 DIDmsg_lnxind_wlansniffrm_rate = 0x00080044, 3787 DIDmsg_lnxind_wlansniffrm_rate = 0x00080044,
4756 DIDmsg_lnxind_wlansniffrm_istx = 0x00090044, 3788 DIDmsg_lnxind_wlansniffrm_istx = 0x00090044,
4757 DIDmsg_lnxind_wlansniffrm_frmlen = 0x000A0044 3789 DIDmsg_lnxind_wlansniffrm_frmlen = 0x000A0044
4758}; 3790};
4759enum { 3791enum {
4760 P80211ENUM_msgitem_status_no_value = 0x00 3792 P80211ENUM_msgitem_status_no_value = 0x00
4761}; 3793};
4762enum { 3794enum {
4763 P80211ENUM_truth_false = 0x00, 3795 P80211ENUM_truth_false = 0x00,
4764 P80211ENUM_truth_true = 0x01 3796 P80211ENUM_truth_true = 0x01
4765}; 3797};
4766 3798
4767/* Definition from madwifi */ 3799/* Definition from madwifi */
4768typedef struct { 3800typedef struct {
4769 UINT32 did; 3801 UINT32 did;
4770 UINT16 status; 3802 UINT16 status;
4771 UINT16 len; 3803 UINT16 len;
4772 UINT32 data; 3804 UINT32 data;
4773} p80211item_uint32_t; 3805} p80211item_uint32_t;
4774 3806
4775typedef struct { 3807typedef struct {
4776 UINT32 msgcode; 3808 UINT32 msgcode;
4777 UINT32 msglen; 3809 UINT32 msglen;
4778#define WLAN_DEVNAMELEN_MAX 16 3810#define WLAN_DEVNAMELEN_MAX 16
4779 UINT8 devname[WLAN_DEVNAMELEN_MAX]; 3811 UINT8 devname[WLAN_DEVNAMELEN_MAX];
4780 p80211item_uint32_t hosttime; 3812 p80211item_uint32_t hosttime;
4781 p80211item_uint32_t mactime; 3813 p80211item_uint32_t mactime;
4782 p80211item_uint32_t channel; 3814 p80211item_uint32_t channel;
4783 p80211item_uint32_t rssi; 3815 p80211item_uint32_t rssi;
4784 p80211item_uint32_t sq; 3816 p80211item_uint32_t sq;
4785 p80211item_uint32_t signal; 3817 p80211item_uint32_t signal;
4786 p80211item_uint32_t noise; 3818 p80211item_uint32_t noise;
4787 p80211item_uint32_t rate; 3819 p80211item_uint32_t rate;
4788 p80211item_uint32_t istx; 3820 p80211item_uint32_t istx;
4789 p80211item_uint32_t frmlen; 3821 p80211item_uint32_t frmlen;
4790} wlan_ng_prism2_header; 3822} wlan_ng_prism2_header;
4791 3823
4792/* The radio capture header precedes the 802.11 header. */ 3824/* The radio capture header precedes the 802.11 header. */
4793typedef struct PACKED _ieee80211_radiotap_header { 3825typedef struct PACKED _ieee80211_radiotap_header {
4794 UINT8 it_version; /* Version 0. Only increases 3826 UINT8 it_version; /* Version 0. Only increases
4795 * for drastic changes, 3827 * for drastic changes,
4796 * introduction of compatible 3828 * introduction of compatible
4797 * new fields does not count. 3829 * new fields does not count.
4798 */ 3830 */
4799 UINT8 it_pad; 3831 UINT8 it_pad;
4800 UINT16 it_len; /* length of the whole 3832 UINT16 it_len; /* length of the whole
4801 * header in bytes, including 3833 * header in bytes, including
4802 * it_version, it_pad, 3834 * it_version, it_pad,
4803 * it_len, and data fields. 3835 * it_len, and data fields.
4804 */ 3836 */
4805 UINT32 it_present; /* A bitmap telling which 3837 UINT32 it_present; /* A bitmap telling which
4806 * fields are present. Set bit 31 3838 * fields are present. Set bit 31
4807 * (0x80000000) to extend the 3839 * (0x80000000) to extend the
4808 * bitmap by another 32 bits. 3840 * bitmap by another 32 bits.
4809 * Additional extensions are made 3841 * Additional extensions are made
4810 * by setting bit 31. 3842 * by setting bit 31.
4811 */ 3843 */
4812}ieee80211_radiotap_header ; 3844} ieee80211_radiotap_header;
4813 3845
4814enum ieee80211_radiotap_type { 3846enum ieee80211_radiotap_type {
4815 IEEE80211_RADIOTAP_TSFT = 0, 3847 IEEE80211_RADIOTAP_TSFT = 0,
4816 IEEE80211_RADIOTAP_FLAGS = 1, 3848 IEEE80211_RADIOTAP_FLAGS = 1,
4817 IEEE80211_RADIOTAP_RATE = 2, 3849 IEEE80211_RADIOTAP_RATE = 2,
4818 IEEE80211_RADIOTAP_CHANNEL = 3, 3850 IEEE80211_RADIOTAP_CHANNEL = 3,
4819 IEEE80211_RADIOTAP_FHSS = 4, 3851 IEEE80211_RADIOTAP_FHSS = 4,
4820 IEEE80211_RADIOTAP_DBM_ANTSIGNAL = 5, 3852 IEEE80211_RADIOTAP_DBM_ANTSIGNAL = 5,
4821 IEEE80211_RADIOTAP_DBM_ANTNOISE = 6, 3853 IEEE80211_RADIOTAP_DBM_ANTNOISE = 6,
4822 IEEE80211_RADIOTAP_LOCK_QUALITY = 7, 3854 IEEE80211_RADIOTAP_LOCK_QUALITY = 7,
4823 IEEE80211_RADIOTAP_TX_ATTENUATION = 8, 3855 IEEE80211_RADIOTAP_TX_ATTENUATION = 8,
4824 IEEE80211_RADIOTAP_DB_TX_ATTENUATION = 9, 3856 IEEE80211_RADIOTAP_DB_TX_ATTENUATION = 9,
4825 IEEE80211_RADIOTAP_DBM_TX_POWER = 10, 3857 IEEE80211_RADIOTAP_DBM_TX_POWER = 10,
4826 IEEE80211_RADIOTAP_ANTENNA = 11, 3858 IEEE80211_RADIOTAP_ANTENNA = 11,
4827 IEEE80211_RADIOTAP_DB_ANTSIGNAL = 12, 3859 IEEE80211_RADIOTAP_DB_ANTSIGNAL = 12,
4828 IEEE80211_RADIOTAP_DB_ANTNOISE = 13 3860 IEEE80211_RADIOTAP_DB_ANTNOISE = 13
4829}; 3861};
4830 3862
4831#define WLAN_RADIOTAP_PRESENT ( \ 3863#define WLAN_RADIOTAP_PRESENT ( \
@@ -4842,623 +3874,411 @@ typedef struct _wlan_radiotap_header {
4842} wlan_radiotap_header; 3874} wlan_radiotap_header;
4843/* Definition from madwifi */ 3875/* Definition from madwifi */
4844 3876
4845void send_monitor_packets( 3877void send_monitor_packets(IN PRTMP_ADAPTER pAd, IN RX_BLK * pRxBlk);
4846 IN PRTMP_ADAPTER pAd,
4847 IN RX_BLK *pRxBlk);
4848 3878
3879VOID RTMPSetDesiredRates(IN PRTMP_ADAPTER pAdapter, IN LONG Rates);
4849 3880
4850VOID RTMPSetDesiredRates( 3881INT Set_FixedTxMode_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
4851 IN PRTMP_ADAPTER pAdapter,
4852 IN LONG Rates);
4853 3882
4854INT Set_FixedTxMode_Proc( 3883BOOLEAN RT28XXChipsetCheck(IN void *_dev_p);
4855 IN PRTMP_ADAPTER pAd,
4856 IN PSTRING arg);
4857 3884
4858BOOLEAN RT28XXChipsetCheck( 3885VOID RT28XXDMADisable(IN RTMP_ADAPTER * pAd);
4859 IN void *_dev_p);
4860 3886
3887VOID RT28XXDMAEnable(IN RTMP_ADAPTER * pAd);
4861 3888
4862VOID RT28XXDMADisable( 3889VOID RT28xx_UpdateBeaconToAsic(IN RTMP_ADAPTER * pAd,
4863 IN RTMP_ADAPTER *pAd); 3890 IN INT apidx,
3891 IN ULONG BeaconLen, IN ULONG UpdatePos);
4864 3892
4865VOID RT28XXDMAEnable( 3893int rt28xx_init(IN PRTMP_ADAPTER pAd,
4866 IN RTMP_ADAPTER *pAd); 3894 IN PSTRING pDefaultMac, IN PSTRING pHostName);
4867 3895
4868VOID RT28xx_UpdateBeaconToAsic( 3896NDIS_STATUS RtmpNetTaskInit(IN RTMP_ADAPTER * pAd);
4869 IN RTMP_ADAPTER * pAd,
4870 IN INT apidx,
4871 IN ULONG BeaconLen,
4872 IN ULONG UpdatePos);
4873 3897
4874int rt28xx_init( 3898VOID RtmpNetTaskExit(IN PRTMP_ADAPTER pAd);
4875 IN PRTMP_ADAPTER pAd,
4876 IN PSTRING pDefaultMac,
4877 IN PSTRING pHostName);
4878 3899
4879NDIS_STATUS RtmpNetTaskInit( 3900NDIS_STATUS RtmpMgmtTaskInit(IN RTMP_ADAPTER * pAd);
4880 IN RTMP_ADAPTER *pAd);
4881 3901
4882VOID RtmpNetTaskExit( 3902VOID RtmpMgmtTaskExit(IN RTMP_ADAPTER * pAd);
4883 IN PRTMP_ADAPTER pAd);
4884
4885NDIS_STATUS RtmpMgmtTaskInit(
4886 IN RTMP_ADAPTER *pAd);
4887
4888VOID RtmpMgmtTaskExit(
4889 IN RTMP_ADAPTER *pAd);
4890 3903
4891void tbtt_tasklet(unsigned long data); 3904void tbtt_tasklet(unsigned long data);
4892 3905
3906PNET_DEV RtmpPhyNetDevInit(IN RTMP_ADAPTER * pAd,
3907 IN RTMP_OS_NETDEV_OP_HOOK * pNetHook);
4893 3908
4894PNET_DEV RtmpPhyNetDevInit( 3909BOOLEAN RtmpPhyNetDevExit(IN RTMP_ADAPTER * pAd, IN PNET_DEV net_dev);
4895 IN RTMP_ADAPTER *pAd,
4896 IN RTMP_OS_NETDEV_OP_HOOK *pNetHook);
4897
4898BOOLEAN RtmpPhyNetDevExit(
4899 IN RTMP_ADAPTER *pAd,
4900 IN PNET_DEV net_dev);
4901
4902INT RtmpRaDevCtrlInit(
4903 IN RTMP_ADAPTER *pAd,
4904 IN RTMP_INF_TYPE infType);
4905 3910
4906BOOLEAN RtmpRaDevCtrlExit( 3911INT RtmpRaDevCtrlInit(IN RTMP_ADAPTER * pAd, IN RTMP_INF_TYPE infType);
4907 IN RTMP_ADAPTER *pAd);
4908 3912
3913BOOLEAN RtmpRaDevCtrlExit(IN RTMP_ADAPTER * pAd);
4909 3914
4910#ifdef RTMP_MAC_PCI 3915#ifdef RTMP_MAC_PCI
4911// 3916//
4912// Function Prototype in cmm_data_pci.c 3917// Function Prototype in cmm_data_pci.c
4913// 3918//
4914USHORT RtmpPCI_WriteTxResource( 3919USHORT RtmpPCI_WriteTxResource(IN PRTMP_ADAPTER pAd,
4915 IN PRTMP_ADAPTER pAd, 3920 IN TX_BLK * pTxBlk,
4916 IN TX_BLK *pTxBlk, 3921 IN BOOLEAN bIsLast, OUT USHORT * FreeNumber);
4917 IN BOOLEAN bIsLast, 3922
4918 OUT USHORT *FreeNumber); 3923USHORT RtmpPCI_WriteSingleTxResource(IN PRTMP_ADAPTER pAd,
4919 3924 IN TX_BLK * pTxBlk,
4920USHORT RtmpPCI_WriteSingleTxResource( 3925 IN BOOLEAN bIsLast,
4921 IN PRTMP_ADAPTER pAd, 3926 OUT USHORT * FreeNumber);
4922 IN TX_BLK *pTxBlk, 3927
4923 IN BOOLEAN bIsLast, 3928USHORT RtmpPCI_WriteMultiTxResource(IN PRTMP_ADAPTER pAd,
4924 OUT USHORT *FreeNumber); 3929 IN TX_BLK * pTxBlk,
4925 3930 IN UCHAR frameNum, OUT USHORT * FreeNumber);
4926USHORT RtmpPCI_WriteMultiTxResource( 3931
4927 IN PRTMP_ADAPTER pAd, 3932USHORT RtmpPCI_WriteFragTxResource(IN PRTMP_ADAPTER pAd,
4928 IN TX_BLK *pTxBlk, 3933 IN TX_BLK * pTxBlk,
4929 IN UCHAR frameNum, 3934 IN UCHAR fragNum, OUT USHORT * FreeNumber);
4930 OUT USHORT *FreeNumber); 3935
4931 3936USHORT RtmpPCI_WriteSubTxResource(IN PRTMP_ADAPTER pAd,
4932USHORT RtmpPCI_WriteFragTxResource( 3937 IN TX_BLK * pTxBlk,
4933 IN PRTMP_ADAPTER pAd, 3938 IN BOOLEAN bIsLast, OUT USHORT * FreeNumber);
4934 IN TX_BLK *pTxBlk, 3939
4935 IN UCHAR fragNum, 3940VOID RtmpPCI_FinalWriteTxResource(IN PRTMP_ADAPTER pAd,
4936 OUT USHORT *FreeNumber); 3941 IN TX_BLK * pTxBlk,
4937 3942 IN USHORT totalMPDUSize,
4938USHORT RtmpPCI_WriteSubTxResource( 3943 IN USHORT FirstTxIdx);
4939 IN PRTMP_ADAPTER pAd, 3944
4940 IN TX_BLK *pTxBlk, 3945VOID RtmpPCIDataLastTxIdx(IN PRTMP_ADAPTER pAd,
4941 IN BOOLEAN bIsLast, 3946 IN UCHAR QueIdx, IN USHORT LastTxIdx);
4942 OUT USHORT *FreeNumber); 3947
4943 3948VOID RtmpPCIDataKickOut(IN PRTMP_ADAPTER pAd,
4944VOID RtmpPCI_FinalWriteTxResource( 3949 IN TX_BLK * pTxBlk, IN UCHAR QueIdx);
4945 IN PRTMP_ADAPTER pAd, 3950
4946 IN TX_BLK *pTxBlk, 3951int RtmpPCIMgmtKickOut(IN RTMP_ADAPTER * pAd,
4947 IN USHORT totalMPDUSize, 3952 IN UCHAR QueIdx,
4948 IN USHORT FirstTxIdx); 3953 IN PNDIS_PACKET pPacket,
4949 3954 IN PUCHAR pSrcBufVA, IN UINT SrcBufLen);
4950VOID RtmpPCIDataLastTxIdx( 3955
4951 IN PRTMP_ADAPTER pAd, 3956NDIS_STATUS RTMPCheckRxError(IN PRTMP_ADAPTER pAd,
4952 IN UCHAR QueIdx, 3957 IN PHEADER_802_11 pHeader,
4953 IN USHORT LastTxIdx); 3958 IN PRXWI_STRUC pRxWI, IN PRT28XX_RXD_STRUC pRxD);
4954 3959
4955VOID RtmpPCIDataKickOut( 3960BOOLEAN RT28xxPciAsicRadioOff(IN PRTMP_ADAPTER pAd,
4956 IN PRTMP_ADAPTER pAd, 3961 IN UCHAR Level, IN USHORT TbttNumToNextWakeUp);
4957 IN TX_BLK *pTxBlk, 3962
4958 IN UCHAR QueIdx); 3963BOOLEAN RT28xxPciAsicRadioOn(IN PRTMP_ADAPTER pAd, IN UCHAR Level);
4959 3964
4960 3965VOID RTMPInitPCIeLinkCtrlValue(IN PRTMP_ADAPTER pAd);
4961int RtmpPCIMgmtKickOut( 3966
4962 IN RTMP_ADAPTER *pAd, 3967VOID RTMPFindHostPCIDev(IN PRTMP_ADAPTER pAd);
4963 IN UCHAR QueIdx, 3968
4964 IN PNDIS_PACKET pPacket, 3969VOID RTMPPCIeLinkCtrlValueRestore(IN PRTMP_ADAPTER pAd, IN UCHAR Level);
4965 IN PUCHAR pSrcBufVA, 3970
4966 IN UINT SrcBufLen); 3971VOID RTMPPCIeLinkCtrlSetting(IN PRTMP_ADAPTER pAd, IN USHORT Max);
4967 3972
4968 3973VOID RTMPrt3xSetPCIePowerLinkCtrl(IN PRTMP_ADAPTER pAd);
4969NDIS_STATUS RTMPCheckRxError( 3974
4970 IN PRTMP_ADAPTER pAd, 3975VOID PsPollWakeExec(IN PVOID SystemSpecific1,
4971 IN PHEADER_802_11 pHeader, 3976 IN PVOID FunctionContext,
4972 IN PRXWI_STRUC pRxWI, 3977 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
4973 IN PRT28XX_RXD_STRUC pRxD); 3978
4974 3979VOID RadioOnExec(IN PVOID SystemSpecific1,
4975BOOLEAN RT28xxPciAsicRadioOff( 3980 IN PVOID FunctionContext,
4976 IN PRTMP_ADAPTER pAd, 3981 IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
4977 IN UCHAR Level, 3982
4978 IN USHORT TbttNumToNextWakeUp); 3983VOID RT28xxPciStaAsicForceWakeup(IN PRTMP_ADAPTER pAd, IN BOOLEAN bFromTx);
4979 3984
4980BOOLEAN RT28xxPciAsicRadioOn( 3985VOID RT28xxPciStaAsicSleepThenAutoWakeup(IN PRTMP_ADAPTER pAd,
4981 IN PRTMP_ADAPTER pAd, 3986 IN USHORT TbttNumToNextWakeUp);
4982 IN UCHAR Level); 3987
4983 3988VOID RT28xxPciMlmeRadioOn(IN PRTMP_ADAPTER pAd);
4984VOID RTMPInitPCIeLinkCtrlValue( 3989
4985 IN PRTMP_ADAPTER pAd); 3990VOID RT28xxPciMlmeRadioOFF(IN PRTMP_ADAPTER pAd);
4986
4987VOID RTMPFindHostPCIDev(
4988 IN PRTMP_ADAPTER pAd);
4989
4990VOID RTMPPCIeLinkCtrlValueRestore(
4991 IN PRTMP_ADAPTER pAd,
4992 IN UCHAR Level);
4993
4994VOID RTMPPCIeLinkCtrlSetting(
4995 IN PRTMP_ADAPTER pAd,
4996 IN USHORT Max);
4997
4998VOID RTMPrt3xSetPCIePowerLinkCtrl(
4999 IN PRTMP_ADAPTER pAd);
5000
5001VOID PsPollWakeExec(
5002 IN PVOID SystemSpecific1,
5003 IN PVOID FunctionContext,
5004 IN PVOID SystemSpecific2,
5005 IN PVOID SystemSpecific3);
5006
5007VOID RadioOnExec(
5008 IN PVOID SystemSpecific1,
5009 IN PVOID FunctionContext,
5010 IN PVOID SystemSpecific2,
5011 IN PVOID SystemSpecific3);
5012
5013VOID RT28xxPciStaAsicForceWakeup(
5014 IN PRTMP_ADAPTER pAd,
5015 IN BOOLEAN bFromTx);
5016
5017VOID RT28xxPciStaAsicSleepThenAutoWakeup(
5018 IN PRTMP_ADAPTER pAd,
5019 IN USHORT TbttNumToNextWakeUp);
5020
5021
5022VOID RT28xxPciMlmeRadioOn(
5023 IN PRTMP_ADAPTER pAd);
5024
5025VOID RT28xxPciMlmeRadioOFF(
5026 IN PRTMP_ADAPTER pAd);
5027#endif // RTMP_MAC_PCI // 3991#endif // RTMP_MAC_PCI //
5028 3992
5029#ifdef RTMP_MAC_USB 3993#ifdef RTMP_MAC_USB
5030// 3994//
5031// Function Prototype in rtusb_bulk.c 3995// Function Prototype in rtusb_bulk.c
5032// 3996//
5033VOID RTUSBInitTxDesc( 3997VOID RTUSBInitTxDesc(IN PRTMP_ADAPTER pAd,
5034 IN PRTMP_ADAPTER pAd, 3998 IN PTX_CONTEXT pTxContext,
5035 IN PTX_CONTEXT pTxContext, 3999 IN UCHAR BulkOutPipeId, IN usb_complete_t Func);
5036 IN UCHAR BulkOutPipeId,
5037 IN usb_complete_t Func);
5038 4000
5039VOID RTUSBInitHTTxDesc( 4001VOID RTUSBInitHTTxDesc(IN PRTMP_ADAPTER pAd,
5040 IN PRTMP_ADAPTER pAd, 4002 IN PHT_TX_CONTEXT pTxContext,
5041 IN PHT_TX_CONTEXT pTxContext, 4003 IN UCHAR BulkOutPipeId,
5042 IN UCHAR BulkOutPipeId, 4004 IN ULONG BulkOutSize, IN usb_complete_t Func);
5043 IN ULONG BulkOutSize,
5044 IN usb_complete_t Func);
5045 4005
5046VOID RTUSBInitRxDesc( 4006VOID RTUSBInitRxDesc(IN PRTMP_ADAPTER pAd, IN PRX_CONTEXT pRxContext);
5047 IN PRTMP_ADAPTER pAd,
5048 IN PRX_CONTEXT pRxContext);
5049 4007
5050VOID RTUSBCleanUpDataBulkOutQueue( 4008VOID RTUSBCleanUpDataBulkOutQueue(IN PRTMP_ADAPTER pAd);
5051 IN PRTMP_ADAPTER pAd);
5052 4009
5053VOID RTUSBCancelPendingBulkOutIRP( 4010VOID RTUSBCancelPendingBulkOutIRP(IN PRTMP_ADAPTER pAd);
5054 IN PRTMP_ADAPTER pAd);
5055 4011
5056VOID RTUSBBulkOutDataPacket( 4012VOID RTUSBBulkOutDataPacket(IN PRTMP_ADAPTER pAd,
5057 IN PRTMP_ADAPTER pAd, 4013 IN UCHAR BulkOutPipeId, IN UCHAR Index);
5058 IN UCHAR BulkOutPipeId,
5059 IN UCHAR Index);
5060 4014
5061VOID RTUSBBulkOutNullFrame( 4015VOID RTUSBBulkOutNullFrame(IN PRTMP_ADAPTER pAd);
5062 IN PRTMP_ADAPTER pAd);
5063 4016
5064VOID RTUSBBulkOutRTSFrame( 4017VOID RTUSBBulkOutRTSFrame(IN PRTMP_ADAPTER pAd);
5065 IN PRTMP_ADAPTER pAd);
5066 4018
5067VOID RTUSBCancelPendingBulkInIRP( 4019VOID RTUSBCancelPendingBulkInIRP(IN PRTMP_ADAPTER pAd);
5068 IN PRTMP_ADAPTER pAd);
5069 4020
5070VOID RTUSBCancelPendingIRPs( 4021VOID RTUSBCancelPendingIRPs(IN PRTMP_ADAPTER pAd);
5071 IN PRTMP_ADAPTER pAd);
5072 4022
5073VOID RTUSBBulkOutMLMEPacket( 4023VOID RTUSBBulkOutMLMEPacket(IN PRTMP_ADAPTER pAd, IN UCHAR Index);
5074 IN PRTMP_ADAPTER pAd,
5075 IN UCHAR Index);
5076 4024
5077VOID RTUSBBulkOutPsPoll( 4025VOID RTUSBBulkOutPsPoll(IN PRTMP_ADAPTER pAd);
5078 IN PRTMP_ADAPTER pAd);
5079 4026
5080VOID RTUSBCleanUpMLMEBulkOutQueue( 4027VOID RTUSBCleanUpMLMEBulkOutQueue(IN PRTMP_ADAPTER pAd);
5081 IN PRTMP_ADAPTER pAd);
5082 4028
5083VOID RTUSBKickBulkOut( 4029VOID RTUSBKickBulkOut(IN PRTMP_ADAPTER pAd);
5084 IN PRTMP_ADAPTER pAd);
5085 4030
5086VOID RTUSBBulkReceive( 4031VOID RTUSBBulkReceive(IN PRTMP_ADAPTER pAd);
5087 IN PRTMP_ADAPTER pAd);
5088 4032
5089VOID DoBulkIn( 4033VOID DoBulkIn(IN RTMP_ADAPTER * pAd);
5090 IN RTMP_ADAPTER *pAd);
5091 4034
5092VOID RTUSBInitRxDesc( 4035VOID RTUSBInitRxDesc(IN PRTMP_ADAPTER pAd, IN PRX_CONTEXT pRxContext);
5093 IN PRTMP_ADAPTER pAd,
5094 IN PRX_CONTEXT pRxContext);
5095 4036
5096VOID RTUSBBulkRxHandle( 4037VOID RTUSBBulkRxHandle(IN unsigned long data);
5097 IN unsigned long data);
5098 4038
5099// 4039//
5100// Function Prototype in rtusb_io.c 4040// Function Prototype in rtusb_io.c
5101// 4041//
5102NTSTATUS RTUSBMultiRead( 4042NTSTATUS RTUSBMultiRead(IN PRTMP_ADAPTER pAd,
5103 IN PRTMP_ADAPTER pAd, 4043 IN USHORT Offset, OUT PUCHAR pData, IN USHORT length);
5104 IN USHORT Offset, 4044
5105 OUT PUCHAR pData, 4045NTSTATUS RTUSBMultiWrite(IN PRTMP_ADAPTER pAd,
5106 IN USHORT length); 4046 IN USHORT Offset, IN PUCHAR pData, IN USHORT length);
5107 4047
5108NTSTATUS RTUSBMultiWrite( 4048NTSTATUS RTUSBMultiWrite_OneByte(IN PRTMP_ADAPTER pAd,
5109 IN PRTMP_ADAPTER pAd, 4049 IN USHORT Offset, IN PUCHAR pData);
5110 IN USHORT Offset, 4050
5111 IN PUCHAR pData, 4051NTSTATUS RTUSBReadBBPRegister(IN PRTMP_ADAPTER pAd,
5112 IN USHORT length); 4052 IN UCHAR Id, IN PUCHAR pValue);
5113 4053
5114NTSTATUS RTUSBMultiWrite_OneByte( 4054NTSTATUS RTUSBWriteBBPRegister(IN PRTMP_ADAPTER pAd,
5115 IN PRTMP_ADAPTER pAd, 4055 IN UCHAR Id, IN UCHAR Value);
5116 IN USHORT Offset, 4056
5117 IN PUCHAR pData); 4057NTSTATUS RTUSBWriteRFRegister(IN PRTMP_ADAPTER pAd, IN UINT32 Value);
5118 4058
5119NTSTATUS RTUSBReadBBPRegister( 4059NTSTATUS RTUSB_VendorRequest(IN PRTMP_ADAPTER pAd,
5120 IN PRTMP_ADAPTER pAd, 4060 IN UINT32 TransferFlags,
5121 IN UCHAR Id, 4061 IN UCHAR ReservedBits,
5122 IN PUCHAR pValue); 4062 IN UCHAR Request,
5123 4063 IN USHORT Value,
5124NTSTATUS RTUSBWriteBBPRegister( 4064 IN USHORT Index,
5125 IN PRTMP_ADAPTER pAd, 4065 IN PVOID TransferBuffer,
5126 IN UCHAR Id, 4066 IN UINT32 TransferBufferLength);
5127 IN UCHAR Value); 4067
5128 4068NTSTATUS RTUSBReadEEPROM(IN PRTMP_ADAPTER pAd,
5129NTSTATUS RTUSBWriteRFRegister( 4069 IN USHORT Offset, OUT PUCHAR pData, IN USHORT length);
5130 IN PRTMP_ADAPTER pAd, 4070
5131 IN UINT32 Value); 4071NTSTATUS RTUSBWriteEEPROM(IN PRTMP_ADAPTER pAd,
5132 4072 IN USHORT Offset, IN PUCHAR pData, IN USHORT length);
5133NTSTATUS RTUSB_VendorRequest( 4073
5134 IN PRTMP_ADAPTER pAd, 4074VOID RTUSBPutToSleep(IN PRTMP_ADAPTER pAd);
5135 IN UINT32 TransferFlags, 4075
5136 IN UCHAR ReservedBits, 4076NTSTATUS RTUSBWakeUp(IN PRTMP_ADAPTER pAd);
5137 IN UCHAR Request, 4077
5138 IN USHORT Value, 4078VOID RTUSBInitializeCmdQ(IN PCmdQ cmdq);
5139 IN USHORT Index, 4079
5140 IN PVOID TransferBuffer, 4080NDIS_STATUS RTUSBEnqueueCmdFromNdis(IN PRTMP_ADAPTER pAd,
5141 IN UINT32 TransferBufferLength); 4081 IN NDIS_OID Oid,
5142 4082 IN BOOLEAN SetInformation,
5143NTSTATUS RTUSBReadEEPROM( 4083 IN PVOID pInformationBuffer,
5144 IN PRTMP_ADAPTER pAd, 4084 IN UINT32 InformationBufferLength);
5145 IN USHORT Offset, 4085
5146 OUT PUCHAR pData, 4086NDIS_STATUS RTUSBEnqueueInternalCmd(IN PRTMP_ADAPTER pAd,
5147 IN USHORT length); 4087 IN NDIS_OID Oid,
5148 4088 IN PVOID pInformationBuffer,
5149NTSTATUS RTUSBWriteEEPROM( 4089 IN UINT32 InformationBufferLength);
5150 IN PRTMP_ADAPTER pAd, 4090
5151 IN USHORT Offset, 4091VOID RTUSBDequeueCmd(IN PCmdQ cmdq, OUT PCmdQElmt * pcmdqelmt);
5152 IN PUCHAR pData, 4092
5153 IN USHORT length); 4093INT RTUSBCmdThread(IN OUT PVOID Context);
5154 4094
5155VOID RTUSBPutToSleep( 4095VOID RTUSBBssBeaconExit(IN RTMP_ADAPTER * pAd);
5156 IN PRTMP_ADAPTER pAd); 4096
5157 4097VOID RTUSBBssBeaconStop(IN RTMP_ADAPTER * pAd);
5158NTSTATUS RTUSBWakeUp( 4098
5159 IN PRTMP_ADAPTER pAd); 4099VOID RTUSBBssBeaconStart(IN RTMP_ADAPTER * pAd);
5160 4100
5161VOID RTUSBInitializeCmdQ( 4101VOID RTUSBBssBeaconInit(IN RTMP_ADAPTER * pAd);
5162 IN PCmdQ cmdq); 4102
5163 4103VOID RTUSBWatchDog(IN RTMP_ADAPTER * pAd);
5164NDIS_STATUS RTUSBEnqueueCmdFromNdis( 4104
5165 IN PRTMP_ADAPTER pAd, 4105NTSTATUS RTUSBWriteMACRegister(IN PRTMP_ADAPTER pAd,
5166 IN NDIS_OID Oid, 4106 IN USHORT Offset, IN UINT32 Value);
5167 IN BOOLEAN SetInformation, 4107
5168 IN PVOID pInformationBuffer, 4108NTSTATUS RTUSBReadMACRegister(IN PRTMP_ADAPTER pAd,
5169 IN UINT32 InformationBufferLength); 4109 IN USHORT Offset, OUT PUINT32 pValue);
5170 4110
5171NDIS_STATUS RTUSBEnqueueInternalCmd( 4111NTSTATUS RTUSBSingleWrite(IN RTMP_ADAPTER * pAd,
5172 IN PRTMP_ADAPTER pAd, 4112 IN USHORT Offset, IN USHORT Value);
5173 IN NDIS_OID Oid, 4113
5174 IN PVOID pInformationBuffer, 4114NTSTATUS RTUSBFirmwareWrite(IN PRTMP_ADAPTER pAd,
5175 IN UINT32 InformationBufferLength); 4115 IN PUCHAR pFwImage, IN ULONG FwLen);
5176 4116
5177VOID RTUSBDequeueCmd( 4117NTSTATUS RTUSBVenderReset(IN PRTMP_ADAPTER pAd);
5178 IN PCmdQ cmdq, 4118
5179 OUT PCmdQElmt *pcmdqelmt); 4119NDIS_STATUS RTUSBSetHardWareRegister(IN PRTMP_ADAPTER pAdapter, IN PVOID pBuf);
5180
5181INT RTUSBCmdThread(
5182 IN OUT PVOID Context);
5183
5184VOID RTUSBBssBeaconExit(
5185 IN RTMP_ADAPTER *pAd);
5186
5187VOID RTUSBBssBeaconStop(
5188 IN RTMP_ADAPTER *pAd);
5189
5190VOID RTUSBBssBeaconStart(
5191 IN RTMP_ADAPTER * pAd);
5192
5193VOID RTUSBBssBeaconInit(
5194 IN RTMP_ADAPTER *pAd);
5195
5196VOID RTUSBWatchDog(
5197 IN RTMP_ADAPTER *pAd);
5198
5199NTSTATUS RTUSBWriteMACRegister(
5200 IN PRTMP_ADAPTER pAd,
5201 IN USHORT Offset,
5202 IN UINT32 Value);
5203
5204NTSTATUS RTUSBReadMACRegister(
5205 IN PRTMP_ADAPTER pAd,
5206 IN USHORT Offset,
5207 OUT PUINT32 pValue);
5208
5209NTSTATUS RTUSBSingleWrite(
5210 IN RTMP_ADAPTER *pAd,
5211 IN USHORT Offset,
5212 IN USHORT Value);
5213
5214NTSTATUS RTUSBFirmwareWrite(
5215 IN PRTMP_ADAPTER pAd,
5216 IN PUCHAR pFwImage,
5217 IN ULONG FwLen);
5218
5219NTSTATUS RTUSBVenderReset(
5220 IN PRTMP_ADAPTER pAd);
5221
5222NDIS_STATUS RTUSBSetHardWareRegister(
5223 IN PRTMP_ADAPTER pAdapter,
5224 IN PVOID pBuf);
5225
5226NDIS_STATUS RTUSBQueryHardWareRegister(
5227 IN PRTMP_ADAPTER pAdapter,
5228 IN PVOID pBuf);
5229
5230VOID CMDHandler(
5231 IN PRTMP_ADAPTER pAd);
5232
5233NDIS_STATUS RTUSBWriteHWMACAddress(
5234 IN PRTMP_ADAPTER pAdapter);
5235
5236VOID MacTableInitialize(
5237 IN PRTMP_ADAPTER pAd);
5238
5239VOID MlmeSetPsm(
5240 IN PRTMP_ADAPTER pAd,
5241 IN USHORT psm);
5242 4120
5243NDIS_STATUS RTMPWPAAddKeyProc( 4121NDIS_STATUS RTUSBQueryHardWareRegister(IN PRTMP_ADAPTER pAdapter,
5244 IN PRTMP_ADAPTER pAd, 4122 IN PVOID pBuf);
5245 IN PVOID pBuf);
5246 4123
5247VOID AsicRxAntEvalAction( 4124VOID CMDHandler(IN PRTMP_ADAPTER pAd);
5248 IN PRTMP_ADAPTER pAd);
5249
5250void append_pkt(
5251 IN PRTMP_ADAPTER pAd,
5252 IN PUCHAR pHeader802_3,
5253 IN UINT HdrLen,
5254 IN PUCHAR pData,
5255 IN ULONG DataSize,
5256 OUT PNDIS_PACKET *ppPacket);
5257 4125
5258UINT deaggregate_AMSDU_announce( 4126NDIS_STATUS RTUSBWriteHWMACAddress(IN PRTMP_ADAPTER pAdapter);
5259 IN PRTMP_ADAPTER pAd,
5260 PNDIS_PACKET pPacket,
5261 IN PUCHAR pData,
5262 IN ULONG DataSize);
5263 4127
5264NDIS_STATUS RTMPCheckRxError( 4128VOID MacTableInitialize(IN PRTMP_ADAPTER pAd);
5265 IN PRTMP_ADAPTER pAd,
5266 IN PHEADER_802_11 pHeader,
5267 IN PRXWI_STRUC pRxWI,
5268 IN PRT28XX_RXD_STRUC pRxINFO);
5269 4129
5270VOID RTUSBMlmeHardTransmit( 4130VOID MlmeSetPsm(IN PRTMP_ADAPTER pAd, IN USHORT psm);
5271 IN PRTMP_ADAPTER pAd,
5272 IN PMGMT_STRUC pMgmt);
5273 4131
5274INT MlmeThread( 4132NDIS_STATUS RTMPWPAAddKeyProc(IN PRTMP_ADAPTER pAd, IN PVOID pBuf);
5275 IN PVOID Context); 4133
4134VOID AsicRxAntEvalAction(IN PRTMP_ADAPTER pAd);
4135
4136void append_pkt(IN PRTMP_ADAPTER pAd,
4137 IN PUCHAR pHeader802_3,
4138 IN UINT HdrLen,
4139 IN PUCHAR pData,
4140 IN ULONG DataSize, OUT PNDIS_PACKET * ppPacket);
4141
4142UINT deaggregate_AMSDU_announce(IN PRTMP_ADAPTER pAd,
4143 PNDIS_PACKET pPacket,
4144 IN PUCHAR pData, IN ULONG DataSize);
4145
4146NDIS_STATUS RTMPCheckRxError(IN PRTMP_ADAPTER pAd,
4147 IN PHEADER_802_11 pHeader,
4148 IN PRXWI_STRUC pRxWI,
4149 IN PRT28XX_RXD_STRUC pRxINFO);
4150
4151VOID RTUSBMlmeHardTransmit(IN PRTMP_ADAPTER pAd, IN PMGMT_STRUC pMgmt);
4152
4153INT MlmeThread(IN PVOID Context);
5276 4154
5277// 4155//
5278// Function Prototype in rtusb_data.c 4156// Function Prototype in rtusb_data.c
5279// 4157//
5280NDIS_STATUS RTUSBFreeDescriptorRequest( 4158NDIS_STATUS RTUSBFreeDescriptorRequest(IN PRTMP_ADAPTER pAd,
5281 IN PRTMP_ADAPTER pAd, 4159 IN UCHAR BulkOutPipeId,
5282 IN UCHAR BulkOutPipeId, 4160 IN UINT32 NumberRequired);
5283 IN UINT32 NumberRequired);
5284
5285
5286BOOLEAN RTUSBNeedQueueBackForAgg(
5287 IN RTMP_ADAPTER *pAd,
5288 IN UCHAR BulkOutPipeId);
5289 4161
4162BOOLEAN RTUSBNeedQueueBackForAgg(IN RTMP_ADAPTER * pAd, IN UCHAR BulkOutPipeId);
5290 4163
5291VOID RTMPWriteTxInfo( 4164VOID RTMPWriteTxInfo(IN PRTMP_ADAPTER pAd,
5292 IN PRTMP_ADAPTER pAd, 4165 IN PTXINFO_STRUC pTxInfo,
5293 IN PTXINFO_STRUC pTxInfo, 4166 IN USHORT USBDMApktLen,
5294 IN USHORT USBDMApktLen, 4167 IN BOOLEAN bWiv,
5295 IN BOOLEAN bWiv, 4168 IN UCHAR QueueSel, IN UCHAR NextValid, IN UCHAR TxBurst);
5296 IN UCHAR QueueSel,
5297 IN UCHAR NextValid,
5298 IN UCHAR TxBurst);
5299 4169
5300// 4170//
5301// Function Prototype in cmm_data_usb.c 4171// Function Prototype in cmm_data_usb.c
5302// 4172//
5303USHORT RtmpUSB_WriteSubTxResource( 4173USHORT RtmpUSB_WriteSubTxResource(IN PRTMP_ADAPTER pAd,
5304 IN PRTMP_ADAPTER pAd, 4174 IN TX_BLK * pTxBlk,
5305 IN TX_BLK *pTxBlk, 4175 IN BOOLEAN bIsLast, OUT USHORT * FreeNumber);
5306 IN BOOLEAN bIsLast, 4176
5307 OUT USHORT *FreeNumber); 4177USHORT RtmpUSB_WriteSingleTxResource(IN PRTMP_ADAPTER pAd,
5308 4178 IN TX_BLK * pTxBlk,
5309USHORT RtmpUSB_WriteSingleTxResource( 4179 IN BOOLEAN bIsLast,
5310 IN PRTMP_ADAPTER pAd, 4180 OUT USHORT * FreeNumber);
5311 IN TX_BLK *pTxBlk, 4181
5312 IN BOOLEAN bIsLast, 4182USHORT RtmpUSB_WriteFragTxResource(IN PRTMP_ADAPTER pAd,
5313 OUT USHORT *FreeNumber); 4183 IN TX_BLK * pTxBlk,
5314 4184 IN UCHAR fragNum, OUT USHORT * FreeNumber);
5315USHORT RtmpUSB_WriteFragTxResource( 4185
5316 IN PRTMP_ADAPTER pAd, 4186USHORT RtmpUSB_WriteMultiTxResource(IN PRTMP_ADAPTER pAd,
5317 IN TX_BLK *pTxBlk, 4187 IN TX_BLK * pTxBlk,
5318 IN UCHAR fragNum, 4188 IN UCHAR frameNum, OUT USHORT * FreeNumber);
5319 OUT USHORT *FreeNumber); 4189
5320 4190VOID RtmpUSB_FinalWriteTxResource(IN PRTMP_ADAPTER pAd,
5321USHORT RtmpUSB_WriteMultiTxResource( 4191 IN TX_BLK * pTxBlk,
5322 IN PRTMP_ADAPTER pAd, 4192 IN USHORT totalMPDUSize, IN USHORT TxIdx);
5323 IN TX_BLK *pTxBlk, 4193
5324 IN UCHAR frameNum, 4194VOID RtmpUSBDataLastTxIdx(IN PRTMP_ADAPTER pAd,
5325 OUT USHORT *FreeNumber); 4195 IN UCHAR QueIdx, IN USHORT TxIdx);
5326 4196
5327VOID RtmpUSB_FinalWriteTxResource( 4197VOID RtmpUSBDataKickOut(IN PRTMP_ADAPTER pAd,
5328 IN PRTMP_ADAPTER pAd, 4198 IN TX_BLK * pTxBlk, IN UCHAR QueIdx);
5329 IN TX_BLK *pTxBlk,
5330 IN USHORT totalMPDUSize,
5331 IN USHORT TxIdx);
5332
5333VOID RtmpUSBDataLastTxIdx(
5334 IN PRTMP_ADAPTER pAd,
5335 IN UCHAR QueIdx,
5336 IN USHORT TxIdx);
5337
5338VOID RtmpUSBDataKickOut(
5339 IN PRTMP_ADAPTER pAd,
5340 IN TX_BLK *pTxBlk,
5341 IN UCHAR QueIdx);
5342
5343
5344int RtmpUSBMgmtKickOut(
5345 IN RTMP_ADAPTER *pAd,
5346 IN UCHAR QueIdx,
5347 IN PNDIS_PACKET pPacket,
5348 IN PUCHAR pSrcBufVA,
5349 IN UINT SrcBufLen);
5350
5351VOID RtmpUSBNullFrameKickOut(
5352 IN RTMP_ADAPTER *pAd,
5353 IN UCHAR QueIdx,
5354 IN UCHAR *pNullFrame,
5355 IN UINT32 frameLen);
5356
5357VOID RtmpUsbStaAsicForceWakeupTimeout(
5358 IN PVOID SystemSpecific1,
5359 IN PVOID FunctionContext,
5360 IN PVOID SystemSpecific2,
5361 IN PVOID SystemSpecific3);
5362
5363VOID RT28xxUsbStaAsicForceWakeup(
5364 IN PRTMP_ADAPTER pAd,
5365 IN BOOLEAN bFromTx);
5366
5367VOID RT28xxUsbStaAsicSleepThenAutoWakeup(
5368 IN PRTMP_ADAPTER pAd,
5369 IN USHORT TbttNumToNextWakeUp);
5370
5371VOID RT28xxUsbMlmeRadioOn(
5372 IN PRTMP_ADAPTER pAd);
5373
5374VOID RT28xxUsbMlmeRadioOFF(
5375 IN PRTMP_ADAPTER pAd);
5376#endif // RTMP_MAC_USB //
5377 4199
5378VOID AsicTurnOffRFClk( 4200int RtmpUSBMgmtKickOut(IN RTMP_ADAPTER * pAd,
5379 IN PRTMP_ADAPTER pAd, 4201 IN UCHAR QueIdx,
5380 IN UCHAR Channel); 4202 IN PNDIS_PACKET pPacket,
4203 IN PUCHAR pSrcBufVA, IN UINT SrcBufLen);
5381 4204
5382VOID AsicTurnOnRFClk( 4205VOID RtmpUSBNullFrameKickOut(IN RTMP_ADAPTER * pAd,
5383 IN PRTMP_ADAPTER pAd, 4206 IN UCHAR QueIdx,
5384 IN UCHAR Channel); 4207 IN UCHAR * pNullFrame, IN UINT32 frameLen);
5385 4208
4209VOID RtmpUsbStaAsicForceWakeupTimeout(IN PVOID SystemSpecific1,
4210 IN PVOID FunctionContext,
4211 IN PVOID SystemSpecific2,
4212 IN PVOID SystemSpecific3);
5386 4213
4214VOID RT28xxUsbStaAsicForceWakeup(IN PRTMP_ADAPTER pAd, IN BOOLEAN bFromTx);
4215
4216VOID RT28xxUsbStaAsicSleepThenAutoWakeup(IN PRTMP_ADAPTER pAd,
4217 IN USHORT TbttNumToNextWakeUp);
4218
4219VOID RT28xxUsbMlmeRadioOn(IN PRTMP_ADAPTER pAd);
4220
4221VOID RT28xxUsbMlmeRadioOFF(IN PRTMP_ADAPTER pAd);
4222#endif // RTMP_MAC_USB //
4223
4224VOID AsicTurnOffRFClk(IN PRTMP_ADAPTER pAd, IN UCHAR Channel);
4225
4226VOID AsicTurnOnRFClk(IN PRTMP_ADAPTER pAd, IN UCHAR Channel);
5387 4227
5388#ifdef RTMP_TIMER_TASK_SUPPORT 4228#ifdef RTMP_TIMER_TASK_SUPPORT
5389INT RtmpTimerQThread( 4229INT RtmpTimerQThread(IN OUT PVOID Context);
5390 IN OUT PVOID Context);
5391 4230
5392RTMP_TIMER_TASK_ENTRY *RtmpTimerQInsert( 4231RTMP_TIMER_TASK_ENTRY *RtmpTimerQInsert(IN RTMP_ADAPTER * pAd,
5393 IN RTMP_ADAPTER *pAd, 4232 IN RALINK_TIMER_STRUCT * pTimer);
5394 IN RALINK_TIMER_STRUCT *pTimer);
5395 4233
5396BOOLEAN RtmpTimerQRemove( 4234BOOLEAN RtmpTimerQRemove(IN RTMP_ADAPTER * pAd,
5397 IN RTMP_ADAPTER *pAd, 4235 IN RALINK_TIMER_STRUCT * pTimer);
5398 IN RALINK_TIMER_STRUCT *pTimer);
5399 4236
5400void RtmpTimerQExit( 4237void RtmpTimerQExit(IN RTMP_ADAPTER * pAd);
5401 IN RTMP_ADAPTER *pAd);
5402 4238
5403void RtmpTimerQInit( 4239void RtmpTimerQInit(IN RTMP_ADAPTER * pAd);
5404 IN RTMP_ADAPTER *pAd);
5405#endif // RTMP_TIMER_TASK_SUPPORT // 4240#endif // RTMP_TIMER_TASK_SUPPORT //
5406 4241
5407VOID AsicStaBbpTuning( 4242VOID AsicStaBbpTuning(IN PRTMP_ADAPTER pAd);
5408 IN PRTMP_ADAPTER pAd);
5409 4243
5410BOOLEAN StaAddMacTableEntry( 4244BOOLEAN StaAddMacTableEntry(IN PRTMP_ADAPTER pAd,
5411 IN PRTMP_ADAPTER pAd, 4245 IN PMAC_TABLE_ENTRY pEntry,
5412 IN PMAC_TABLE_ENTRY pEntry, 4246 IN UCHAR MaxSupportedRateIn500Kbps,
5413 IN UCHAR MaxSupportedRateIn500Kbps, 4247 IN HT_CAPABILITY_IE * pHtCapability,
5414 IN HT_CAPABILITY_IE *pHtCapability, 4248 IN UCHAR HtCapabilityLen,
5415 IN UCHAR HtCapabilityLen, 4249 IN ADD_HT_INFO_IE * pAddHtInfo,
5416 IN ADD_HT_INFO_IE *pAddHtInfo, 4250 IN UCHAR AddHtInfoLen, IN USHORT CapabilityInfo);
5417 IN UCHAR AddHtInfoLen,
5418 IN USHORT CapabilityInfo);
5419 4251
4252BOOLEAN AUTH_ReqSend(IN PRTMP_ADAPTER pAd,
4253 IN PMLME_QUEUE_ELEM pElem,
4254 IN PRALINK_TIMER_STRUCT pAuthTimer,
4255 IN PSTRING pSMName,
4256 IN USHORT SeqNo,
4257 IN PUCHAR pNewElement, IN ULONG ElementLen);
5420 4258
5421BOOLEAN AUTH_ReqSend( 4259void RTMP_IndicateMediaState(IN PRTMP_ADAPTER pAd);
5422 IN PRTMP_ADAPTER pAd,
5423 IN PMLME_QUEUE_ELEM pElem,
5424 IN PRALINK_TIMER_STRUCT pAuthTimer,
5425 IN PSTRING pSMName,
5426 IN USHORT SeqNo,
5427 IN PUCHAR pNewElement,
5428 IN ULONG ElementLen);
5429 4260
5430void RTMP_IndicateMediaState( 4261VOID ReSyncBeaconTime(IN PRTMP_ADAPTER pAd);
5431 IN PRTMP_ADAPTER pAd);
5432 4262
5433VOID ReSyncBeaconTime( 4263VOID RTMPSetAGCInitValue(IN PRTMP_ADAPTER pAd, IN UCHAR BandWidth);
5434 IN PRTMP_ADAPTER pAd);
5435
5436VOID RTMPSetAGCInitValue(
5437 IN PRTMP_ADAPTER pAd,
5438 IN UCHAR BandWidth);
5439 4264
5440int rt28xx_close(IN PNET_DEV dev); 4265int rt28xx_close(IN PNET_DEV dev);
5441int rt28xx_open(IN PNET_DEV dev); 4266int rt28xx_open(IN PNET_DEV dev);
5442 4267
5443
5444#define VIRTUAL_IF_INC(__pAd) ((__pAd)->VirtualIfCnt++) 4268#define VIRTUAL_IF_INC(__pAd) ((__pAd)->VirtualIfCnt++)
5445#define VIRTUAL_IF_DEC(__pAd) ((__pAd)->VirtualIfCnt--) 4269#define VIRTUAL_IF_DEC(__pAd) ((__pAd)->VirtualIfCnt--)
5446#define VIRTUAL_IF_NUM(__pAd) ((__pAd)->VirtualIfCnt) 4270#define VIRTUAL_IF_NUM(__pAd) ((__pAd)->VirtualIfCnt)
5447 4271
5448
5449#ifdef LINUX 4272#ifdef LINUX
5450__inline INT VIRTUAL_IF_UP(PRTMP_ADAPTER pAd) 4273__inline INT VIRTUAL_IF_UP(PRTMP_ADAPTER pAd)
5451{ 4274{
5452 if (VIRTUAL_IF_NUM(pAd) == 0) 4275 if (VIRTUAL_IF_NUM(pAd) == 0) {
5453 { 4276 if (rt28xx_open(pAd->net_dev) != 0) {
5454 if (rt28xx_open(pAd->net_dev) != 0) 4277 DBGPRINT(RT_DEBUG_TRACE,
5455 { 4278 ("rt28xx_open return fail!\n"));
5456 DBGPRINT(RT_DEBUG_TRACE, ("rt28xx_open return fail!\n"));
5457 return -1; 4279 return -1;
5458 } 4280 }
5459 } 4281 } else {
5460 else
5461 {
5462 } 4282 }
5463 VIRTUAL_IF_INC(pAd); 4283 VIRTUAL_IF_INC(pAd);
5464 return 0; 4284 return 0;
@@ -5473,101 +4293,64 @@ __inline VOID VIRTUAL_IF_DOWN(PRTMP_ADAPTER pAd)
5473} 4293}
5474#endif // LINUX // 4294#endif // LINUX //
5475 4295
5476
5477/* 4296/*
5478 OS Related funciton prototype definitions. 4297 OS Related funciton prototype definitions.
5479 TODO: Maybe we need to move these function prototypes to other proper place. 4298 TODO: Maybe we need to move these function prototypes to other proper place.
5480*/ 4299*/
5481int RtmpOSWrielessEventSend( 4300int RtmpOSWrielessEventSend(IN RTMP_ADAPTER * pAd,
5482 IN RTMP_ADAPTER *pAd, 4301 IN UINT32 eventType,
5483 IN UINT32 eventType, 4302 IN INT flags,
5484 IN INT flags, 4303 IN PUCHAR pSrcMac,
5485 IN PUCHAR pSrcMac, 4304 IN PUCHAR pData, IN UINT32 dataLen);
5486 IN PUCHAR pData,
5487 IN UINT32 dataLen);
5488 4305
5489int RtmpOSNetDevAddrSet( 4306int RtmpOSNetDevAddrSet(IN PNET_DEV pNetDev, IN PUCHAR pMacAddr);
5490 IN PNET_DEV pNetDev,
5491 IN PUCHAR pMacAddr);
5492 4307
5493int RtmpOSNetDevAttach( 4308int RtmpOSNetDevAttach(IN PNET_DEV pNetDev,
5494 IN PNET_DEV pNetDev, 4309 IN RTMP_OS_NETDEV_OP_HOOK * pDevOpHook);
5495 IN RTMP_OS_NETDEV_OP_HOOK *pDevOpHook);
5496 4310
5497void RtmpOSNetDevClose( 4311void RtmpOSNetDevClose(IN PNET_DEV pNetDev);
5498 IN PNET_DEV pNetDev);
5499 4312
5500void RtmpOSNetDevDetach( 4313void RtmpOSNetDevDetach(IN PNET_DEV pNetDev);
5501 IN PNET_DEV pNetDev);
5502 4314
5503INT RtmpOSNetDevAlloc( 4315INT RtmpOSNetDevAlloc(IN PNET_DEV * pNewNetDev, IN UINT32 privDataSize);
5504 IN PNET_DEV *pNewNetDev,
5505 IN UINT32 privDataSize);
5506 4316
5507void RtmpOSNetDevFree( 4317void RtmpOSNetDevFree(IN PNET_DEV pNetDev);
5508 IN PNET_DEV pNetDev);
5509 4318
5510PNET_DEV RtmpOSNetDevGetByName( 4319PNET_DEV RtmpOSNetDevGetByName(IN PNET_DEV pNetDev, IN PSTRING pDevName);
5511 IN PNET_DEV pNetDev,
5512 IN PSTRING pDevName);
5513 4320
5514void RtmpOSNetDeviceRefPut( 4321void RtmpOSNetDeviceRefPut(IN PNET_DEV pNetDev);
5515 IN PNET_DEV pNetDev);
5516 4322
5517PNET_DEV RtmpOSNetDevCreate( 4323PNET_DEV RtmpOSNetDevCreate(IN RTMP_ADAPTER * pAd,
5518 IN RTMP_ADAPTER *pAd, 4324 IN INT devType,
5519 IN INT devType, 4325 IN INT devNum,
5520 IN INT devNum, 4326 IN INT privMemSize, IN PSTRING pNamePrefix);
5521 IN INT privMemSize,
5522 IN PSTRING pNamePrefix);
5523 4327
5524/* 4328/*
5525 Task operation related function prototypes 4329 Task operation related function prototypes
5526*/ 4330*/
5527void RtmpOSTaskCustomize( 4331void RtmpOSTaskCustomize(IN RTMP_OS_TASK * pTask);
5528 IN RTMP_OS_TASK *pTask);
5529
5530INT RtmpOSTaskNotifyToExit(
5531 IN RTMP_OS_TASK *pTask);
5532 4332
5533NDIS_STATUS RtmpOSTaskKill( 4333INT RtmpOSTaskNotifyToExit(IN RTMP_OS_TASK * pTask);
5534 IN RTMP_OS_TASK *pTask);
5535 4334
5536NDIS_STATUS RtmpOSTaskInit( 4335NDIS_STATUS RtmpOSTaskKill(IN RTMP_OS_TASK * pTask);
5537 IN RTMP_OS_TASK *pTask,
5538 PSTRING pTaskName,
5539 VOID *pPriv);
5540 4336
5541NDIS_STATUS RtmpOSTaskAttach( 4337NDIS_STATUS RtmpOSTaskInit(IN RTMP_OS_TASK * pTask,
5542 IN RTMP_OS_TASK *pTask, 4338 PSTRING pTaskName, VOID * pPriv);
5543 IN int (*fn)(void *),
5544 IN void *arg);
5545 4339
4340NDIS_STATUS RtmpOSTaskAttach(IN RTMP_OS_TASK * pTask,
4341 IN int (*fn) (void *), IN void *arg);
5546 4342
5547/* 4343/*
5548 File operation related function prototypes 4344 File operation related function prototypes
5549*/ 4345*/
5550RTMP_OS_FD RtmpOSFileOpen( 4346RTMP_OS_FD RtmpOSFileOpen(IN char *pPath, IN int flag, IN int mode);
5551 IN char *pPath,
5552 IN int flag,
5553 IN int mode);
5554
5555int RtmpOSFileClose(
5556 IN RTMP_OS_FD osfd);
5557 4347
5558void RtmpOSFileSeek( 4348int RtmpOSFileClose(IN RTMP_OS_FD osfd);
5559 IN RTMP_OS_FD osfd,
5560 IN int offset);
5561 4349
5562int RtmpOSFileRead( 4350void RtmpOSFileSeek(IN RTMP_OS_FD osfd, IN int offset);
5563 IN RTMP_OS_FD osfd,
5564 IN char *pDataPtr,
5565 IN int readLen);
5566 4351
5567int RtmpOSFileWrite( 4352int RtmpOSFileRead(IN RTMP_OS_FD osfd, IN char *pDataPtr, IN int readLen);
5568 IN RTMP_OS_FD osfd,
5569 IN char *pDataPtr,
5570 IN int writeLen);
5571 4353
5572#endif // __RTMP_H__ 4354int RtmpOSFileWrite(IN RTMP_OS_FD osfd, IN char *pDataPtr, IN int writeLen);
5573 4355
4356#endif // __RTMP_H__
diff --git a/drivers/staging/rt2860/rtmp_chip.h b/drivers/staging/rt2860/rtmp_chip.h
index 1098a8547d9..7fa73e65b29 100644
--- a/drivers/staging/rt2860/rtmp_chip.h
+++ b/drivers/staging/rt2860/rtmp_chip.h
@@ -73,7 +73,7 @@
73#define IS_RT2070(_pAd) (((_pAd)->RfIcType == RFIC_2020) || ((_pAd)->EFuseTag == 0x27)) 73#define IS_RT2070(_pAd) (((_pAd)->RfIcType == RFIC_2020) || ((_pAd)->EFuseTag == 0x27))
74 74
75#define IS_RT30xx(_pAd) (((_pAd)->MACVersion & 0xfff00000) == 0x30700000||IS_RT3090A(_pAd)) 75#define IS_RT30xx(_pAd) (((_pAd)->MACVersion & 0xfff00000) == 0x30700000||IS_RT3090A(_pAd))
76//#define IS_RT305X(_pAd) ((_pAd)->MACVersion == 0x28720200) 76//#define IS_RT305X(_pAd) ((_pAd)->MACVersion == 0x28720200)
77 77
78/* RT3572, 3592, 3562, 3062 share the same MAC version */ 78/* RT3572, 3592, 3562, 3062 share the same MAC version */
79#define IS_RT3572(_pAd) (((_pAd)->MACVersion & 0xffff0000) == 0x35720000) 79#define IS_RT3572(_pAd) (((_pAd)->MACVersion & 0xffff0000) == 0x35720000)
@@ -103,15 +103,12 @@
103 103
104#define RETRY_LIMIT 10 104#define RETRY_LIMIT 10
105 105
106
107
108// ------------------------------------------------------ 106// ------------------------------------------------------
109// BBP & RF definition 107// BBP & RF definition
110// ------------------------------------------------------ 108// ------------------------------------------------------
111#define BUSY 1 109#define BUSY 1
112#define IDLE 0 110#define IDLE 0
113 111
114
115//------------------------------------------------------------------------- 112//-------------------------------------------------------------------------
116// EEPROM definition 113// EEPROM definition
117//------------------------------------------------------------------------- 114//-------------------------------------------------------------------------
@@ -126,11 +123,11 @@
126#define EEPROM_EWDS_OPCODE 0x10 123#define EEPROM_EWDS_OPCODE 0x10
127#define EEPROM_EWEN_OPCODE 0x13 124#define EEPROM_EWEN_OPCODE 0x13
128 125
129#define NUM_EEPROM_BBP_PARMS 19 // Include NIC Config 0, 1, CR, TX ALC step, BBPs 126#define NUM_EEPROM_BBP_PARMS 19 // Include NIC Config 0, 1, CR, TX ALC step, BBPs
130#define NUM_EEPROM_TX_G_PARMS 7 127#define NUM_EEPROM_TX_G_PARMS 7
131#define EEPROM_NIC1_OFFSET 0x34 // The address is from NIC config 0, not BBP register ID 128#define EEPROM_NIC1_OFFSET 0x34 // The address is from NIC config 0, not BBP register ID
132#define EEPROM_NIC2_OFFSET 0x36 // The address is from NIC config 0, not BBP register ID 129#define EEPROM_NIC2_OFFSET 0x36 // The address is from NIC config 0, not BBP register ID
133#define EEPROM_BBP_BASE_OFFSET 0xf0 // The address is from NIC config 0, not BBP register ID 130#define EEPROM_BBP_BASE_OFFSET 0xf0 // The address is from NIC config 0, not BBP register ID
134#define EEPROM_G_TX_PWR_OFFSET 0x52 131#define EEPROM_G_TX_PWR_OFFSET 0x52
135#define EEPROM_G_TX2_PWR_OFFSET 0x60 132#define EEPROM_G_TX2_PWR_OFFSET 0x60
136#define EEPROM_LED1_OFFSET 0x3c 133#define EEPROM_LED1_OFFSET 0x3c
@@ -150,24 +147,22 @@
150#define EEPROM_A_TX2_PWR_OFFSET 0xa6 147#define EEPROM_A_TX2_PWR_OFFSET 0xa6
151//#define EEPROM_Japan_TX_PWR_OFFSET 0x90 // 802.11j 148//#define EEPROM_Japan_TX_PWR_OFFSET 0x90 // 802.11j
152//#define EEPROM_Japan_TX2_PWR_OFFSET 0xbe 149//#define EEPROM_Japan_TX2_PWR_OFFSET 0xbe
153//#define EEPROM_TSSI_REF_OFFSET 0x54 150//#define EEPROM_TSSI_REF_OFFSET 0x54
154//#define EEPROM_TSSI_DELTA_OFFSET 0x24 151//#define EEPROM_TSSI_DELTA_OFFSET 0x24
155//#define EEPROM_CCK_TX_PWR_OFFSET 0x62 152//#define EEPROM_CCK_TX_PWR_OFFSET 0x62
156//#define EEPROM_CALIBRATE_OFFSET 0x7c 153//#define EEPROM_CALIBRATE_OFFSET 0x7c
157#define EEPROM_VERSION_OFFSET 0x02 154#define EEPROM_VERSION_OFFSET 0x02
158#define EEPROM_FREQ_OFFSET 0x3a 155#define EEPROM_FREQ_OFFSET 0x3a
159#define EEPROM_TXPOWER_BYRATE 0xde // 20MHZ power. 156#define EEPROM_TXPOWER_BYRATE 0xde // 20MHZ power.
160#define EEPROM_TXPOWER_DELTA 0x50 // 20MHZ AND 40 MHZ use different power. This is delta in 40MHZ. 157#define EEPROM_TXPOWER_DELTA 0x50 // 20MHZ AND 40 MHZ use different power. This is delta in 40MHZ.
161#define VALID_EEPROM_VERSION 1 158#define VALID_EEPROM_VERSION 1
162 159
163
164/* 160/*
165 * EEPROM operation related marcos 161 * EEPROM operation related marcos
166 */ 162 */
167#define RT28xx_EEPROM_READ16(_pAd, _offset, _value) \ 163#define RT28xx_EEPROM_READ16(_pAd, _offset, _value) \
168 (_pAd)->chipOps.eeread((RTMP_ADAPTER *)(_pAd), (USHORT)(_offset), (PUSHORT)&(_value)) 164 (_pAd)->chipOps.eeread((RTMP_ADAPTER *)(_pAd), (USHORT)(_offset), (PUSHORT)&(_value))
169 165
170
171// ------------------------------------------------------------------- 166// -------------------------------------------------------------------
172// E2PROM data layout 167// E2PROM data layout
173// ------------------------------------------------------------------- 168// -------------------------------------------------------------------
@@ -175,90 +170,89 @@
175// 170//
176// MCU_LEDCS: MCU LED Control Setting. 171// MCU_LEDCS: MCU LED Control Setting.
177// 172//
178typedef union _MCU_LEDCS_STRUC { 173typedef union _MCU_LEDCS_STRUC {
179 struct { 174 struct {
180 UCHAR LedMode:7; 175 UCHAR LedMode:7;
181 UCHAR Polarity:1; 176 UCHAR Polarity:1;
182 } field; 177 } field;
183 UCHAR word; 178 UCHAR word;
184} MCU_LEDCS_STRUC, *PMCU_LEDCS_STRUC; 179} MCU_LEDCS_STRUC, *PMCU_LEDCS_STRUC;
185 180
186
187// 181//
188// EEPROM antenna select format 182// EEPROM antenna select format
189// 183//
190typedef union _EEPROM_ANTENNA_STRUC { 184typedef union _EEPROM_ANTENNA_STRUC {
191 struct { 185 struct {
192 USHORT RxPath:4; // 1: 1R, 2: 2R, 3: 3R 186 USHORT RxPath:4; // 1: 1R, 2: 2R, 3: 3R
193 USHORT TxPath:4; // 1: 1T, 2: 2T 187 USHORT TxPath:4; // 1: 1T, 2: 2T
194 USHORT RfIcType:4; // see E2PROM document 188 USHORT RfIcType:4; // see E2PROM document
195 USHORT Rsv:4; 189 USHORT Rsv:4;
196 } field; 190 } field;
197 USHORT word; 191 USHORT word;
198} EEPROM_ANTENNA_STRUC, *PEEPROM_ANTENNA_STRUC; 192} EEPROM_ANTENNA_STRUC, *PEEPROM_ANTENNA_STRUC;
199 193
200typedef union _EEPROM_NIC_CINFIG2_STRUC { 194typedef union _EEPROM_NIC_CINFIG2_STRUC {
201 struct { 195 struct {
202 USHORT HardwareRadioControl:1; // 1:enable, 0:disable 196 USHORT HardwareRadioControl:1; // 1:enable, 0:disable
203 USHORT DynamicTxAgcControl:1; // 197 USHORT DynamicTxAgcControl:1; //
204 USHORT ExternalLNAForG:1; // 198 USHORT ExternalLNAForG:1; //
205 USHORT ExternalLNAForA:1; // external LNA enable for 2.4G 199 USHORT ExternalLNAForA:1; // external LNA enable for 2.4G
206 USHORT CardbusAcceleration:1; // !!! NOTE: 0 - enable, 1 - disable 200 USHORT CardbusAcceleration:1; // !!! NOTE: 0 - enable, 1 - disable
207 USHORT BW40MSidebandForG:1; 201 USHORT BW40MSidebandForG:1;
208 USHORT BW40MSidebandForA:1; 202 USHORT BW40MSidebandForA:1;
209 USHORT EnableWPSPBC:1; // WPS PBC Control bit 203 USHORT EnableWPSPBC:1; // WPS PBC Control bit
210 USHORT BW40MAvailForG:1; // 0:enable, 1:disable 204 USHORT BW40MAvailForG:1; // 0:enable, 1:disable
211 USHORT BW40MAvailForA:1; // 0:enable, 1:disable 205 USHORT BW40MAvailForA:1; // 0:enable, 1:disable
212 USHORT Rsv1:1; // must be 0 206 USHORT Rsv1:1; // must be 0
213 USHORT AntDiversity:1; // Antenna diversity 207 USHORT AntDiversity:1; // Antenna diversity
214 USHORT Rsv2:3; // must be 0 208 USHORT Rsv2:3; // must be 0
215 USHORT DACTestBit:1; // control if driver should patch the DAC issue 209 USHORT DACTestBit:1; // control if driver should patch the DAC issue
216 } field; 210 } field;
217 USHORT word; 211 USHORT word;
218} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC; 212} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
219 213
220// 214//
221// TX_PWR Value valid range 0xFA(-6) ~ 0x24(36) 215// TX_PWR Value valid range 0xFA(-6) ~ 0x24(36)
222// 216//
223typedef union _EEPROM_TX_PWR_STRUC { 217typedef union _EEPROM_TX_PWR_STRUC {
224 struct { 218 struct {
225 CHAR Byte0; // Low Byte 219 CHAR Byte0; // Low Byte
226 CHAR Byte1; // High Byte 220 CHAR Byte1; // High Byte
227 } field; 221 } field;
228 USHORT word; 222 USHORT word;
229} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC; 223} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC;
230 224
231typedef union _EEPROM_VERSION_STRUC { 225typedef union _EEPROM_VERSION_STRUC {
232 struct { 226 struct {
233 UCHAR FaeReleaseNumber; // Low Byte 227 UCHAR FaeReleaseNumber; // Low Byte
234 UCHAR Version; // High Byte 228 UCHAR Version; // High Byte
235 } field; 229 } field;
236 USHORT word; 230 USHORT word;
237} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC; 231} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC;
238 232
239typedef union _EEPROM_LED_STRUC { 233typedef union _EEPROM_LED_STRUC {
240 struct { 234 struct {
241 USHORT PolarityRDY_G:1; // Polarity RDY_G setting. 235 USHORT PolarityRDY_G:1; // Polarity RDY_G setting.
242 USHORT PolarityRDY_A:1; // Polarity RDY_A setting. 236 USHORT PolarityRDY_A:1; // Polarity RDY_A setting.
243 USHORT PolarityACT:1; // Polarity ACT setting. 237 USHORT PolarityACT:1; // Polarity ACT setting.
244 USHORT PolarityGPIO_0:1; // Polarity GPIO#0 setting. 238 USHORT PolarityGPIO_0:1; // Polarity GPIO#0 setting.
245 USHORT PolarityGPIO_1:1; // Polarity GPIO#1 setting. 239 USHORT PolarityGPIO_1:1; // Polarity GPIO#1 setting.
246 USHORT PolarityGPIO_2:1; // Polarity GPIO#2 setting. 240 USHORT PolarityGPIO_2:1; // Polarity GPIO#2 setting.
247 USHORT PolarityGPIO_3:1; // Polarity GPIO#3 setting. 241 USHORT PolarityGPIO_3:1; // Polarity GPIO#3 setting.
248 USHORT PolarityGPIO_4:1; // Polarity GPIO#4 setting. 242 USHORT PolarityGPIO_4:1; // Polarity GPIO#4 setting.
249 USHORT LedMode:5; // Led mode. 243 USHORT LedMode:5; // Led mode.
250 USHORT Rsvd:3; // Reserved 244 USHORT Rsvd:3; // Reserved
251 } field; 245 } field;
252 USHORT word; 246 USHORT word;
253} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC; 247} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC;
254 248
255typedef union _EEPROM_TXPOWER_DELTA_STRUC { 249typedef union _EEPROM_TXPOWER_DELTA_STRUC {
256 struct { 250 struct {
257 UCHAR DeltaValue:6; // Tx Power dalta value (MAX=4) 251 UCHAR DeltaValue:6; // Tx Power dalta value (MAX=4)
258 UCHAR Type:1; // 1: plus the delta value, 0: minus the delta value 252 UCHAR Type:1; // 1: plus the delta value, 0: minus the delta value
259 UCHAR TxPowerEnable:1;// Enable 253 UCHAR TxPowerEnable:1; // Enable
260 } field; 254 } field;
261 UCHAR value; 255 UCHAR value;
262} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC; 256} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC;
263 257
264#endif // __RTMP_CHIP_H__ // 258#endif // __RTMP_CHIP_H__ //
diff --git a/drivers/staging/rt2860/rtmp_ckipmic.h b/drivers/staging/rt2860/rtmp_ckipmic.h
index 39955b914de..ad35dca27dc 100644
--- a/drivers/staging/rt2860/rtmp_ckipmic.h
+++ b/drivers/staging/rt2860/rtmp_ckipmic.h
@@ -37,42 +37,27 @@
37#ifndef __RTMP_CKIPMIC_H__ 37#ifndef __RTMP_CKIPMIC_H__
38#define __RTMP_CKIPMIC_H__ 38#define __RTMP_CKIPMIC_H__
39 39
40typedef struct _MIC_CONTEXT { 40typedef struct _MIC_CONTEXT {
41 /* --- MMH context */ 41 /* --- MMH context */
42 UCHAR CK[16]; /* the key */ 42 UCHAR CK[16]; /* the key */
43 UCHAR coefficient[16]; /* current aes counter mode coefficients */ 43 UCHAR coefficient[16]; /* current aes counter mode coefficients */
44 ULONGLONG accum; /* accumulated mic, reduced to u32 in final() */ 44 ULONGLONG accum; /* accumulated mic, reduced to u32 in final() */
45 UINT position; /* current position (byte offset) in message */ 45 UINT position; /* current position (byte offset) in message */
46 UCHAR part[4]; /* for conversion of message to u32 for mmh */ 46 UCHAR part[4]; /* for conversion of message to u32 for mmh */
47} MIC_CONTEXT, *PMIC_CONTEXT; 47} MIC_CONTEXT, *PMIC_CONTEXT;
48 48
49VOID xor_128( 49VOID xor_128(IN PUCHAR a, IN PUCHAR b, OUT PUCHAR out);
50 IN PUCHAR a,
51 IN PUCHAR b,
52 OUT PUCHAR out);
53 50
54UCHAR RTMPCkipSbox( 51UCHAR RTMPCkipSbox(IN UCHAR a);
55 IN UCHAR a);
56 52
57VOID xor_32( 53VOID xor_32(IN PUCHAR a, IN PUCHAR b, OUT PUCHAR out);
58 IN PUCHAR a,
59 IN PUCHAR b,
60 OUT PUCHAR out);
61 54
62VOID next_key( 55VOID next_key(IN PUCHAR key, IN INT round);
63 IN PUCHAR key,
64 IN INT round);
65 56
66VOID byte_sub( 57VOID byte_sub(IN PUCHAR in, OUT PUCHAR out);
67 IN PUCHAR in,
68 OUT PUCHAR out);
69 58
70VOID shift_row( 59VOID shift_row(IN PUCHAR in, OUT PUCHAR out);
71 IN PUCHAR in,
72 OUT PUCHAR out);
73 60
74VOID mix_column( 61VOID mix_column(IN PUCHAR in, OUT PUCHAR out);
75 IN PUCHAR in,
76 OUT PUCHAR out);
77 62
78#endif //__RTMP_CKIPMIC_H__ 63#endif //__RTMP_CKIPMIC_H__
diff --git a/drivers/staging/rt2860/rtmp_def.h b/drivers/staging/rt2860/rtmp_def.h
index 816ae629444..31b52d6ba1d 100644
--- a/drivers/staging/rt2860/rtmp_def.h
+++ b/drivers/staging/rt2860/rtmp_def.h
@@ -55,9 +55,9 @@
55#define NIC_DBG_STRING ("**RT28xx**") 55#define NIC_DBG_STRING ("**RT28xx**")
56 56
57#ifdef RTMP_MAC_USB 57#ifdef RTMP_MAC_USB
58#define TX_RING_SIZE 8 // 1 58#define TX_RING_SIZE 8 // 1
59#define PRIO_RING_SIZE 8 59#define PRIO_RING_SIZE 8
60#define MGMT_RING_SIZE 32 // PRIO_RING_SIZE 60#define MGMT_RING_SIZE 32 // PRIO_RING_SIZE
61#define RX_RING_SIZE 8 61#define RX_RING_SIZE 8
62#define MAX_TX_PROCESS 4 62#define MAX_TX_PROCESS 4
63#define LOCAL_TXBUF_SIZE 2048 63#define LOCAL_TXBUF_SIZE 2048
@@ -76,29 +76,29 @@
76// 76//
77 77
78#ifdef RTMP_MAC_PCI 78#ifdef RTMP_MAC_PCI
79#define TX_RING_SIZE 64 //64 79#define TX_RING_SIZE 64 //64
80#define MGMT_RING_SIZE 128 80#define MGMT_RING_SIZE 128
81#define RX_RING_SIZE 128 //64 81#define RX_RING_SIZE 128 //64
82#define MAX_TX_PROCESS TX_RING_SIZE //8 82#define MAX_TX_PROCESS TX_RING_SIZE //8
83#define MAX_DMA_DONE_PROCESS TX_RING_SIZE 83#define MAX_DMA_DONE_PROCESS TX_RING_SIZE
84#define MAX_TX_DONE_PROCESS TX_RING_SIZE //8 84#define MAX_TX_DONE_PROCESS TX_RING_SIZE //8
85#define LOCAL_TXBUF_SIZE 2 85#define LOCAL_TXBUF_SIZE 2
86#endif // RTMP_MAC_PCI // 86#endif // RTMP_MAC_PCI //
87 87
88#define MAX_RX_PROCESS 128 //64 //32 88#define MAX_RX_PROCESS 128 //64 //32
89#define NUM_OF_LOCAL_TXBUF 2 89#define NUM_OF_LOCAL_TXBUF 2
90#define TXD_SIZE 16 90#define TXD_SIZE 16
91#define TXWI_SIZE 16 91#define TXWI_SIZE 16
92#define RXD_SIZE 16 92#define RXD_SIZE 16
93#define RXWI_SIZE 16 93#define RXWI_SIZE 16
94// TXINFO_SIZE + TXWI_SIZE + 802.11 Header Size + AMSDU sub frame header 94// TXINFO_SIZE + TXWI_SIZE + 802.11 Header Size + AMSDU sub frame header
95#define TX_DMA_1ST_BUFFER_SIZE 96 // only the 1st physical buffer is pre-allocated 95#define TX_DMA_1ST_BUFFER_SIZE 96 // only the 1st physical buffer is pre-allocated
96#define MGMT_DMA_BUFFER_SIZE 1536 //2048 96#define MGMT_DMA_BUFFER_SIZE 1536 //2048
97#define RX_BUFFER_AGGRESIZE 3840 //3904 //3968 //4096 //2048 //4096 97#define RX_BUFFER_AGGRESIZE 3840 //3904 //3968 //4096 //2048 //4096
98#define RX_BUFFER_NORMSIZE 3840 //3904 //3968 //4096 //2048 //4096 98#define RX_BUFFER_NORMSIZE 3840 //3904 //3968 //4096 //2048 //4096
99#define TX_BUFFER_NORMSIZE RX_BUFFER_NORMSIZE 99#define TX_BUFFER_NORMSIZE RX_BUFFER_NORMSIZE
100#define MAX_FRAME_SIZE 2346 // Maximum 802.11 frame size 100#define MAX_FRAME_SIZE 2346 // Maximum 802.11 frame size
101#define MAX_AGGREGATION_SIZE 3840 //3904 //3968 //4096 101#define MAX_AGGREGATION_SIZE 3840 //3904 //3968 //4096
102#define MAX_NUM_OF_TUPLE_CACHE 2 102#define MAX_NUM_OF_TUPLE_CACHE 2
103#define MAX_MCAST_LIST_SIZE 32 103#define MAX_MCAST_LIST_SIZE 32
104#define MAX_LEN_OF_VENDOR_DESC 64 104#define MAX_LEN_OF_VENDOR_DESC 64
@@ -107,7 +107,6 @@
107 107
108#define MAX_RX_PROCESS_CNT (RX_RING_SIZE) 108#define MAX_RX_PROCESS_CNT (RX_RING_SIZE)
109 109
110
111/* 110/*
112 WMM Note: If memory of your system is not much, please reduce the definition; 111 WMM Note: If memory of your system is not much, please reduce the definition;
113 or when you do WMM test, the queue for low priority AC will be full, i.e. 112 or when you do WMM test, the queue for low priority AC will be full, i.e.
@@ -127,12 +126,11 @@
127 clConfig.clNum = RX_RING_SIZE * 4; 126 clConfig.clNum = RX_RING_SIZE * 4;
128*/ 127*/
129// TODO: For VxWorks the size is 256. Shall we cahnge the value as 256 for all OS????? 128// TODO: For VxWorks the size is 256. Shall we cahnge the value as 256 for all OS?????
130#define MAX_PACKETS_IN_QUEUE (512) //(512) // to pass WMM A5-WPAPSK 129#define MAX_PACKETS_IN_QUEUE (512) //(512) // to pass WMM A5-WPAPSK
131 130
132#define MAX_PACKETS_IN_MCAST_PS_QUEUE 32 131#define MAX_PACKETS_IN_MCAST_PS_QUEUE 32
133#define MAX_PACKETS_IN_PS_QUEUE 128 //32 132#define MAX_PACKETS_IN_PS_QUEUE 128 //32
134#define WMM_NUM_OF_AC 4 /* AC0, AC1, AC2, and AC3 */ 133#define WMM_NUM_OF_AC 4 /* AC0, AC1, AC2, and AC3 */
135
136 134
137#ifdef RTMP_EFUSE_SUPPORT 135#ifdef RTMP_EFUSE_SUPPORT
138//2008/09/11:KH add to support efuse<-- 136//2008/09/11:KH add to support efuse<--
@@ -189,8 +187,8 @@
189#define fOP_STATUS_MEDIA_STATE_CONNECTED 0x00000080 187#define fOP_STATUS_MEDIA_STATE_CONNECTED 0x00000080
190#define fOP_STATUS_WMM_INUSED 0x00000100 188#define fOP_STATUS_WMM_INUSED 0x00000100
191#define fOP_STATUS_AGGREGATION_INUSED 0x00000200 189#define fOP_STATUS_AGGREGATION_INUSED 0x00000200
192#define fOP_STATUS_DOZE 0x00000400 // debug purpose 190#define fOP_STATUS_DOZE 0x00000400 // debug purpose
193#define fOP_STATUS_PIGGYBACK_INUSED 0x00000800 // piggy-back, and aggregation 191#define fOP_STATUS_PIGGYBACK_INUSED 0x00000800 // piggy-back, and aggregation
194#define fOP_STATUS_APSD_INUSED 0x00001000 192#define fOP_STATUS_APSD_INUSED 0x00001000
195#define fOP_STATUS_TX_AMSDU_INUSED 0x00002000 193#define fOP_STATUS_TX_AMSDU_INUSED 0x00002000
196#define fOP_STATUS_MAX_RETRY_ENABLED 0x00004000 194#define fOP_STATUS_MAX_RETRY_ENABLED 0x00004000
@@ -229,9 +227,9 @@
229// 227//
230// AP's client table operation status flags 228// AP's client table operation status flags
231// 229//
232#define fCLIENT_STATUS_WMM_CAPABLE 0x00000001 // CLIENT can parse QOS DATA frame 230#define fCLIENT_STATUS_WMM_CAPABLE 0x00000001 // CLIENT can parse QOS DATA frame
233#define fCLIENT_STATUS_AGGREGATION_CAPABLE 0x00000002 // CLIENT can receive Ralink's proprietary TX aggregation frame 231#define fCLIENT_STATUS_AGGREGATION_CAPABLE 0x00000002 // CLIENT can receive Ralink's proprietary TX aggregation frame
234#define fCLIENT_STATUS_PIGGYBACK_CAPABLE 0x00000004 // CLIENT support piggy-back 232#define fCLIENT_STATUS_PIGGYBACK_CAPABLE 0x00000004 // CLIENT support piggy-back
235#define fCLIENT_STATUS_AMSDU_INUSED 0x00000008 233#define fCLIENT_STATUS_AMSDU_INUSED 0x00000008
236#define fCLIENT_STATUS_SGI20_CAPABLE 0x00000010 234#define fCLIENT_STATUS_SGI20_CAPABLE 0x00000010
237#define fCLIENT_STATUS_SGI40_CAPABLE 0x00000020 235#define fCLIENT_STATUS_SGI40_CAPABLE 0x00000020
@@ -240,7 +238,7 @@
240#define fCLIENT_STATUS_HTC_CAPABLE 0x00000100 238#define fCLIENT_STATUS_HTC_CAPABLE 0x00000100
241#define fCLIENT_STATUS_RDG_CAPABLE 0x00000200 239#define fCLIENT_STATUS_RDG_CAPABLE 0x00000200
242#define fCLIENT_STATUS_MCSFEEDBACK_CAPABLE 0x00000400 240#define fCLIENT_STATUS_MCSFEEDBACK_CAPABLE 0x00000400
243#define fCLIENT_STATUS_APSD_CAPABLE 0x00000800 /* UAPSD STATION */ 241#define fCLIENT_STATUS_APSD_CAPABLE 0x00000800 /* UAPSD STATION */
244 242
245#define fCLIENT_STATUS_RALINK_CHIPSET 0x00100000 243#define fCLIENT_STATUS_RALINK_CHIPSET 0x00100000
246// 244//
@@ -303,10 +301,9 @@
303#define ERRLOG_NO_INTERRUPT_RESOURCE 0x00000604L 301#define ERRLOG_NO_INTERRUPT_RESOURCE 0x00000604L
304#define ERRLOG_NO_MEMORY_RESOURCE 0x00000605L 302#define ERRLOG_NO_MEMORY_RESOURCE 0x00000605L
305 303
306
307// WDS definition 304// WDS definition
308#define MAX_WDS_ENTRY 4 305#define MAX_WDS_ENTRY 4
309#define WDS_PAIRWISE_KEY_OFFSET 60 // WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table 306#define WDS_PAIRWISE_KEY_OFFSET 60 // WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table
310 307
311#define WDS_DISABLE_MODE 0 308#define WDS_DISABLE_MODE 0
312#define WDS_RESTRICT_MODE 1 309#define WDS_RESTRICT_MODE 1
@@ -314,7 +311,6 @@
314#define WDS_REPEATER_MODE 3 311#define WDS_REPEATER_MODE 3
315#define WDS_LAZY_MODE 4 312#define WDS_LAZY_MODE 4
316 313
317
318#define MAX_MESH_NUM 0 314#define MAX_MESH_NUM 0
319 315
320#define MAX_APCLI_NUM 0 316#define MAX_APCLI_NUM 0
@@ -336,12 +332,11 @@
336#define MAIN_MBSSID 0 332#define MAIN_MBSSID 0
337#define FIRST_MBSSID 1 333#define FIRST_MBSSID 1
338 334
339
340#define MAX_BEACON_SIZE 512 335#define MAX_BEACON_SIZE 512
341// If the MAX_MBSSID_NUM is larger than 6, 336// If the MAX_MBSSID_NUM is larger than 6,
342// it shall reserve some WCID space(wcid 222~253) for beacon frames. 337// it shall reserve some WCID space(wcid 222~253) for beacon frames.
343// - these wcid 238~253 are reserved for beacon#6(ra6). 338// - these wcid 238~253 are reserved for beacon#6(ra6).
344// - these wcid 222~237 are reserved for beacon#7(ra7). 339// - these wcid 222~237 are reserved for beacon#7(ra7).
345#if defined(MAX_MBSSID_NUM) && (MAX_MBSSID_NUM == 8) 340#if defined(MAX_MBSSID_NUM) && (MAX_MBSSID_NUM == 8)
346#define HW_RESERVED_WCID 222 341#define HW_RESERVED_WCID 222
347#elif defined(MAX_MBSSID_NUM) && (MAX_MBSSID_NUM == 7) 342#elif defined(MAX_MBSSID_NUM) && (MAX_MBSSID_NUM == 7)
@@ -368,7 +363,6 @@
368 363
369#define IsGroupKeyWCID(__wcid) (((__wcid) < LAST_SPECIFIC_WCID) && ((__wcid) >= (LAST_SPECIFIC_WCID - (MAX_MBSSID_NUM)))) 364#define IsGroupKeyWCID(__wcid) (((__wcid) < LAST_SPECIFIC_WCID) && ((__wcid) >= (LAST_SPECIFIC_WCID - (MAX_MBSSID_NUM))))
370 365
371
372// definition to support multiple BSSID 366// definition to support multiple BSSID
373#define BSS0 0 367#define BSS0 0
374#define BSS1 1 368#define BSS1 1
@@ -379,20 +373,19 @@
379#define BSS6 6 373#define BSS6 6
380#define BSS7 7 374#define BSS7 7
381 375
382
383//============================================================ 376//============================================================
384// Length definitions 377// Length definitions
385#define PEER_KEY_NO 2 378#define PEER_KEY_NO 2
386#define MAC_ADDR_LEN 6 379#define MAC_ADDR_LEN 6
387#define TIMESTAMP_LEN 8 380#define TIMESTAMP_LEN 8
388#define MAX_LEN_OF_SUPPORTED_RATES MAX_LENGTH_OF_SUPPORT_RATES // 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 381#define MAX_LEN_OF_SUPPORTED_RATES MAX_LENGTH_OF_SUPPORT_RATES // 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54
389#define MAX_LEN_OF_KEY 32 // 32 octets == 256 bits, Redefine for WPA 382#define MAX_LEN_OF_KEY 32 // 32 octets == 256 bits, Redefine for WPA
390#define MAX_NUM_OF_CHANNELS MAX_NUM_OF_CHS // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination 383#define MAX_NUM_OF_CHANNELS MAX_NUM_OF_CHS // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination
391#define MAX_NUM_OF_11JCHANNELS 20 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination 384#define MAX_NUM_OF_11JCHANNELS 20 // 14 channels @2.4G + 12@UNII + 4 @MMAC + 11 @HiperLAN2 + 7 @Japan + 1 as NULL termination
392#define MAX_LEN_OF_SSID 32 385#define MAX_LEN_OF_SSID 32
393#define CIPHER_TEXT_LEN 128 386#define CIPHER_TEXT_LEN 128
394#define HASH_TABLE_SIZE 256 387#define HASH_TABLE_SIZE 256
395#define MAX_VIE_LEN 1024 // New for WPA cipher suite variable IE sizes. 388#define MAX_VIE_LEN 1024 // New for WPA cipher suite variable IE sizes.
396#define MAX_SUPPORT_MCS 32 389#define MAX_SUPPORT_MCS 32
397#define MAX_NUM_OF_BBP_LATCH 140 390#define MAX_NUM_OF_BBP_LATCH 140
398 391
@@ -413,7 +406,7 @@
413 406
414#define MAX_NUM_OF_ACL_LIST MAX_NUMBER_OF_ACL 407#define MAX_NUM_OF_ACL_LIST MAX_NUMBER_OF_ACL
415 408
416#define MAX_LEN_OF_MAC_TABLE MAX_NUMBER_OF_MAC // if MAX_MBSSID_NUM is 8, this value can't be larger than 211 409#define MAX_LEN_OF_MAC_TABLE MAX_NUMBER_OF_MAC // if MAX_MBSSID_NUM is 8, this value can't be larger than 211
417 410
418#if MAX_LEN_OF_MAC_TABLE>MAX_AVAILABLE_CLIENT_WCID 411#if MAX_LEN_OF_MAC_TABLE>MAX_AVAILABLE_CLIENT_WCID
419#error MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!! 412#error MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!
@@ -426,37 +419,36 @@
426 419
427#define NUM_OF_TID 8 420#define NUM_OF_TID 8
428#define MAX_AID_BA 4 421#define MAX_AID_BA 4
429#define MAX_LEN_OF_BA_REC_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2)// (NUM_OF_TID*MAX_AID_BA + 32) //Block ACK recipient 422#define MAX_LEN_OF_BA_REC_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2) // (NUM_OF_TID*MAX_AID_BA + 32) //Block ACK recipient
430#define MAX_LEN_OF_BA_ORI_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2)// (NUM_OF_TID*MAX_AID_BA + 32) // Block ACK originator 423#define MAX_LEN_OF_BA_ORI_TABLE ((NUM_OF_TID * MAX_LEN_OF_MAC_TABLE)/2) // (NUM_OF_TID*MAX_AID_BA + 32) // Block ACK originator
431#define MAX_LEN_OF_BSS_TABLE 64 424#define MAX_LEN_OF_BSS_TABLE 64
432#define MAX_REORDERING_MPDU_NUM 512 425#define MAX_REORDERING_MPDU_NUM 512
433 426
434// key related definitions 427// key related definitions
435#define SHARE_KEY_NUM 4 428#define SHARE_KEY_NUM 4
436#define MAX_LEN_OF_SHARE_KEY 16 // byte count 429#define MAX_LEN_OF_SHARE_KEY 16 // byte count
437#define MAX_LEN_OF_PEER_KEY 16 // byte count 430#define MAX_LEN_OF_PEER_KEY 16 // byte count
438#define PAIRWISE_KEY_NUM 64 // in MAC ASIC pairwise key table 431#define PAIRWISE_KEY_NUM 64 // in MAC ASIC pairwise key table
439#define GROUP_KEY_NUM 4 432#define GROUP_KEY_NUM 4
440#define PMK_LEN 32 433#define PMK_LEN 32
441#define WDS_PAIRWISE_KEY_OFFSET 60 // WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table 434#define WDS_PAIRWISE_KEY_OFFSET 60 // WDS links uses pairwise key#60 ~ 63 in ASIC pairwise key table
442#define PMKID_NO 4 // Number of PMKID saved supported 435#define PMKID_NO 4 // Number of PMKID saved supported
443#define MAX_LEN_OF_MLME_BUFFER 2048 436#define MAX_LEN_OF_MLME_BUFFER 2048
444 437
445// power status related definitions 438// power status related definitions
446#define PWR_ACTIVE 0 439#define PWR_ACTIVE 0
447#define PWR_SAVE 1 440#define PWR_SAVE 1
448#define PWR_MMPS 2 //MIMO power save 441#define PWR_MMPS 2 //MIMO power save
449 442
450// Auth and Assoc mode related definitions 443// Auth and Assoc mode related definitions
451#define AUTH_MODE_OPEN 0x00 444#define AUTH_MODE_OPEN 0x00
452#define AUTH_MODE_KEY 0x01 445#define AUTH_MODE_KEY 0x01
453 446
454// BSS Type definitions 447// BSS Type definitions
455#define BSS_ADHOC 0 // = Ndis802_11IBSS 448#define BSS_ADHOC 0 // = Ndis802_11IBSS
456#define BSS_INFRA 1 // = Ndis802_11Infrastructure 449#define BSS_INFRA 1 // = Ndis802_11Infrastructure
457#define BSS_ANY 2 // = Ndis802_11AutoUnknown 450#define BSS_ANY 2 // = Ndis802_11AutoUnknown
458#define BSS_MONITOR 3 // = Ndis802_11Monitor 451#define BSS_MONITOR 3 // = Ndis802_11Monitor
459
460 452
461// Reason code definitions 453// Reason code definitions
462#define REASON_RESERVED 0 454#define REASON_RESERVED 0
@@ -533,65 +525,63 @@
533#define IE_CF_PARM 4 525#define IE_CF_PARM 4
534#define IE_TIM 5 526#define IE_TIM 5
535#define IE_IBSS_PARM 6 527#define IE_IBSS_PARM 6
536#define IE_COUNTRY 7 // 802.11d 528#define IE_COUNTRY 7 // 802.11d
537#define IE_802_11D_REQUEST 10 // 802.11d 529#define IE_802_11D_REQUEST 10 // 802.11d
538#define IE_QBSS_LOAD 11 // 802.11e d9 530#define IE_QBSS_LOAD 11 // 802.11e d9
539#define IE_EDCA_PARAMETER 12 // 802.11e d9 531#define IE_EDCA_PARAMETER 12 // 802.11e d9
540#define IE_TSPEC 13 // 802.11e d9 532#define IE_TSPEC 13 // 802.11e d9
541#define IE_TCLAS 14 // 802.11e d9 533#define IE_TCLAS 14 // 802.11e d9
542#define IE_SCHEDULE 15 // 802.11e d9 534#define IE_SCHEDULE 15 // 802.11e d9
543#define IE_CHALLENGE_TEXT 16 535#define IE_CHALLENGE_TEXT 16
544#define IE_POWER_CONSTRAINT 32 // 802.11h d3.3 536#define IE_POWER_CONSTRAINT 32 // 802.11h d3.3
545#define IE_POWER_CAPABILITY 33 // 802.11h d3.3 537#define IE_POWER_CAPABILITY 33 // 802.11h d3.3
546#define IE_TPC_REQUEST 34 // 802.11h d3.3 538#define IE_TPC_REQUEST 34 // 802.11h d3.3
547#define IE_TPC_REPORT 35 // 802.11h d3.3 539#define IE_TPC_REPORT 35 // 802.11h d3.3
548#define IE_SUPP_CHANNELS 36 // 802.11h d3.3 540#define IE_SUPP_CHANNELS 36 // 802.11h d3.3
549#define IE_CHANNEL_SWITCH_ANNOUNCEMENT 37 // 802.11h d3.3 541#define IE_CHANNEL_SWITCH_ANNOUNCEMENT 37 // 802.11h d3.3
550#define IE_MEASUREMENT_REQUEST 38 // 802.11h d3.3 542#define IE_MEASUREMENT_REQUEST 38 // 802.11h d3.3
551#define IE_MEASUREMENT_REPORT 39 // 802.11h d3.3 543#define IE_MEASUREMENT_REPORT 39 // 802.11h d3.3
552#define IE_QUIET 40 // 802.11h d3.3 544#define IE_QUIET 40 // 802.11h d3.3
553#define IE_IBSS_DFS 41 // 802.11h d3.3 545#define IE_IBSS_DFS 41 // 802.11h d3.3
554#define IE_ERP 42 // 802.11g 546#define IE_ERP 42 // 802.11g
555#define IE_TS_DELAY 43 // 802.11e d9 547#define IE_TS_DELAY 43 // 802.11e d9
556#define IE_TCLAS_PROCESSING 44 // 802.11e d9 548#define IE_TCLAS_PROCESSING 44 // 802.11e d9
557#define IE_QOS_CAPABILITY 46 // 802.11e d6 549#define IE_QOS_CAPABILITY 46 // 802.11e d6
558#define IE_HT_CAP 45 // 802.11n d1. HT CAPABILITY. ELEMENT ID TBD 550#define IE_HT_CAP 45 // 802.11n d1. HT CAPABILITY. ELEMENT ID TBD
559#define IE_AP_CHANNEL_REPORT 51 // 802.11k d6 551#define IE_AP_CHANNEL_REPORT 51 // 802.11k d6
560#define IE_HT_CAP2 52 // 802.11n d1. HT CAPABILITY. ELEMENT ID TBD 552#define IE_HT_CAP2 52 // 802.11n d1. HT CAPABILITY. ELEMENT ID TBD
561#define IE_RSN 48 // 802.11i d3.0 553#define IE_RSN 48 // 802.11i d3.0
562#define IE_WPA2 48 // WPA2 554#define IE_WPA2 48 // WPA2
563#define IE_EXT_SUPP_RATES 50 // 802.11g 555#define IE_EXT_SUPP_RATES 50 // 802.11g
564#define IE_SUPP_REG_CLASS 59 // 802.11y. Supported regulatory classes. 556#define IE_SUPP_REG_CLASS 59 // 802.11y. Supported regulatory classes.
565#define IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT 60 // 802.11n 557#define IE_EXT_CHANNEL_SWITCH_ANNOUNCEMENT 60 // 802.11n
566#define IE_ADD_HT 61 // 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD 558#define IE_ADD_HT 61 // 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD
567#define IE_ADD_HT2 53 // 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD 559#define IE_ADD_HT2 53 // 802.11n d1. ADDITIONAL HT CAPABILITY. ELEMENT ID TBD
568
569 560
570// For 802.11n D3.03 561// For 802.11n D3.03
571//#define IE_NEW_EXT_CHA_OFFSET 62 // 802.11n d1. New extension channel offset elemet 562//#define IE_NEW_EXT_CHA_OFFSET 62 // 802.11n d1. New extension channel offset elemet
572#define IE_SECONDARY_CH_OFFSET 62 // 802.11n D3.03 Secondary Channel Offset element 563#define IE_SECONDARY_CH_OFFSET 62 // 802.11n D3.03 Secondary Channel Offset element
573#define IE_WAPI 68 // WAPI information element 564#define IE_WAPI 68 // WAPI information element
574#define IE_2040_BSS_COEXIST 72 // 802.11n D3.0.3 565#define IE_2040_BSS_COEXIST 72 // 802.11n D3.0.3
575#define IE_2040_BSS_INTOLERANT_REPORT 73 // 802.11n D3.03 566#define IE_2040_BSS_INTOLERANT_REPORT 73 // 802.11n D3.03
576#define IE_OVERLAPBSS_SCAN_PARM 74 // 802.11n D3.03 567#define IE_OVERLAPBSS_SCAN_PARM 74 // 802.11n D3.03
577#define IE_EXT_CAPABILITY 127 // 802.11n D3.03 568#define IE_EXT_CAPABILITY 127 // 802.11n D3.03
578
579 569
580#define IE_WPA 221 // WPA 570#define IE_WPA 221 // WPA
581#define IE_VENDOR_SPECIFIC 221 // Wifi WMM (WME) 571#define IE_VENDOR_SPECIFIC 221 // Wifi WMM (WME)
582 572
583#define OUI_BROADCOM_HT 51 // 573#define OUI_BROADCOM_HT 51 //
584#define OUI_BROADCOM_HTADD 52 // 574#define OUI_BROADCOM_HTADD 52 //
585#define OUI_PREN_HT_CAP 51 // 575#define OUI_PREN_HT_CAP 51 //
586#define OUI_PREN_ADD_HT 52 // 576#define OUI_PREN_ADD_HT 52 //
587 577
588// CCX information 578// CCX information
589#define IE_AIRONET_CKIP 133 // CCX1.0 ID 85H for CKIP 579#define IE_AIRONET_CKIP 133 // CCX1.0 ID 85H for CKIP
590#define IE_AP_TX_POWER 150 // CCX 2.0 for AP transmit power 580#define IE_AP_TX_POWER 150 // CCX 2.0 for AP transmit power
591#define IE_MEASUREMENT_CAPABILITY 221 // CCX 2.0 581#define IE_MEASUREMENT_CAPABILITY 221 // CCX 2.0
592#define IE_CCX_V2 221 582#define IE_CCX_V2 221
593#define IE_AIRONET_IPADDRESS 149 // CCX ID 95H for IP Address 583#define IE_AIRONET_IPADDRESS 149 // CCX ID 95H for IP Address
594#define IE_AIRONET_CCKMREASSOC 156 // CCX ID 9CH for CCKM Reassociation Request element 584#define IE_AIRONET_CCKMREASSOC 156 // CCX ID 9CH for CCKM Reassociation Request element
595#define CKIP_NEGOTIATION_LENGTH 30 585#define CKIP_NEGOTIATION_LENGTH 30
596#define AIRONET_IPADDRESS_LENGTH 10 586#define AIRONET_IPADDRESS_LENGTH 10
597#define AIRONET_CCKMREASSOC_LENGTH 24 587#define AIRONET_CCKMREASSOC_LENGTH 24
@@ -619,11 +609,8 @@
619#define WSC_STATE_MACHINE 17 609#define WSC_STATE_MACHINE 17
620#define WSC_UPNP_STATE_MACHINE 18 610#define WSC_UPNP_STATE_MACHINE 18
621 611
622
623#define WPA_STATE_MACHINE 23 612#define WPA_STATE_MACHINE 23
624 613
625
626
627// 614//
628// STA's CONTROL/CONNECT state machine: states, events, total function # 615// STA's CONTROL/CONNECT state machine: states, events, total function #
629// 616//
@@ -700,10 +687,9 @@
700#define MT2_PEER_PUBLIC_CATE 4 687#define MT2_PEER_PUBLIC_CATE 4
701#define MT2_PEER_RM_CATE 5 688#define MT2_PEER_RM_CATE 5
702/* "FT_CATEGORY_BSS_TRANSITION equal to 6" is defined file of "dot11r_ft.h" */ 689/* "FT_CATEGORY_BSS_TRANSITION equal to 6" is defined file of "dot11r_ft.h" */
703#define MT2_PEER_HT_CATE 7 // 7.4.7 690#define MT2_PEER_HT_CATE 7 // 7.4.7
704#define MAX_PEER_CATE_MSG 7 691#define MAX_PEER_CATE_MSG 7
705 692
706
707#define MT2_MLME_ADD_BA_CATE 8 693#define MT2_MLME_ADD_BA_CATE 8
708#define MT2_MLME_ORI_DELBA_CATE 9 694#define MT2_MLME_ORI_DELBA_CATE 9
709#define MT2_MLME_REC_DELBA_CATE 10 695#define MT2_MLME_REC_DELBA_CATE 10
@@ -721,7 +707,6 @@
721#define CATEGORY_RM 5 707#define CATEGORY_RM 5
722#define CATEGORY_HT 7 708#define CATEGORY_HT 7
723 709
724
725// DLS Action frame definition 710// DLS Action frame definition
726#define ACTION_DLS_REQUEST 0 711#define ACTION_DLS_REQUEST 0
727#define ACTION_DLS_RESPONSE 1 712#define ACTION_DLS_RESPONSE 1
@@ -734,7 +719,6 @@
734#define SPEC_TPCRP 3 719#define SPEC_TPCRP 3
735#define SPEC_CHANNEL_SWITCH 4 720#define SPEC_CHANNEL_SWITCH 4
736 721
737
738//BA Action field value 722//BA Action field value
739#define ADDBA_REQ 0 723#define ADDBA_REQ 0
740#define ADDBA_RESP 1 724#define ADDBA_RESP 1
@@ -748,10 +732,9 @@
748#define ACTION_EXT_CH_SWITCH_ANNOUNCE 4 // 11y D9.0 732#define ACTION_EXT_CH_SWITCH_ANNOUNCE 4 // 11y D9.0
749#define ACTION_DSE_MEASUREMENT_REQ 5 // 11y D9.0 733#define ACTION_DSE_MEASUREMENT_REQ 5 // 11y D9.0
750#define ACTION_DSE_MEASUREMENT_REPORT 6 // 11y D9.0 734#define ACTION_DSE_MEASUREMENT_REPORT 6 // 11y D9.0
751#define ACTION_MEASUREMENT_PILOT_ACTION 7 // 11y D9.0 735#define ACTION_MEASUREMENT_PILOT_ACTION 7 // 11y D9.0
752#define ACTION_DSE_POWER_CONSTRAINT 8 // 11y D9.0 736#define ACTION_DSE_POWER_CONSTRAINT 8 // 11y D9.0
753 737
754
755//HT Action field value 738//HT Action field value
756#define NOTIFY_BW_ACTION 0 739#define NOTIFY_BW_ACTION 0
757#define SMPS_ACTION 1 740#define SMPS_ACTION 1
@@ -798,7 +781,7 @@
798// 781//
799// STA's SYNC state machine: states, events, total function # 782// STA's SYNC state machine: states, events, total function #
800// 783//
801#define SYNC_IDLE 0 // merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state 784#define SYNC_IDLE 0 // merge NO_BSS,IBSS_IDLE,IBSS_ACTIVE and BSS in to 1 state
802#define JOIN_WAIT_BEACON 1 785#define JOIN_WAIT_BEACON 1
803#define SCAN_LISTEN 2 786#define SCAN_LISTEN 2
804#define MAX_SYNC_STATE 3 787#define MAX_SYNC_STATE 3
@@ -907,8 +890,6 @@
907 890
908#define WPA_FUNC_SIZE (MAX_WPA_PTK_STATE * MAX_WPA_MSG) 891#define WPA_FUNC_SIZE (MAX_WPA_PTK_STATE * MAX_WPA_MSG)
909 892
910
911
912// ============================================================================= 893// =============================================================================
913 894
914// value domain of 802.11 header FC.Tyte, which is b3..b2 of the 1st-byte of MAC header 895// value domain of 802.11 header FC.Tyte, which is b3..b2 of the 1st-byte of MAC header
@@ -961,10 +942,10 @@
961#define SUBTYPE_QOS_CFACK_CFPOLL 15 942#define SUBTYPE_QOS_CFACK_CFPOLL 15
962 943
963// ACK policy of QOS Control field bit 6:5 944// ACK policy of QOS Control field bit 6:5
964#define NORMAL_ACK 0x00 // b6:5 = 00 945#define NORMAL_ACK 0x00 // b6:5 = 00
965#define NO_ACK 0x20 // b6:5 = 01 946#define NO_ACK 0x20 // b6:5 = 01
966#define NO_EXPLICIT_ACK 0x40 // b6:5 = 10 947#define NO_EXPLICIT_ACK 0x40 // b6:5 = 10
967#define BLOCK_ACK 0x60 // b6:5 = 11 948#define BLOCK_ACK 0x60 // b6:5 = 11
968 949
969// 950//
970// rtmp_data.c use these definition 951// rtmp_data.c use these definition
@@ -982,7 +963,7 @@
982#define LENGTH_CRC 4 963#define LENGTH_CRC 4
983#define MAX_SEQ_NUMBER 0x0fff 964#define MAX_SEQ_NUMBER 0x0fff
984#define LENGTH_802_3_NO_TYPE 12 965#define LENGTH_802_3_NO_TYPE 12
985#define LENGTH_802_1Q 4 /* VLAN related */ 966#define LENGTH_802_1Q 4 /* VLAN related */
986 967
987// STA_CSR4.field.TxResult 968// STA_CSR4.field.TxResult
988#define TX_RESULT_SUCCESS 0 969#define TX_RESULT_SUCCESS 0
@@ -999,23 +980,23 @@
999#define MODE_HTGREENFIELD 3 980#define MODE_HTGREENFIELD 3
1000 981
1001// MCS for CCK. BW.SGI.STBC are reserved 982// MCS for CCK. BW.SGI.STBC are reserved
1002#define MCS_LONGP_RATE_1 0 // long preamble CCK 1Mbps 983#define MCS_LONGP_RATE_1 0 // long preamble CCK 1Mbps
1003#define MCS_LONGP_RATE_2 1 // long preamble CCK 1Mbps 984#define MCS_LONGP_RATE_2 1 // long preamble CCK 1Mbps
1004#define MCS_LONGP_RATE_5_5 2 985#define MCS_LONGP_RATE_5_5 2
1005#define MCS_LONGP_RATE_11 3 986#define MCS_LONGP_RATE_11 3
1006#define MCS_SHORTP_RATE_1 4 // long preamble CCK 1Mbps. short is forbidden in 1Mbps 987#define MCS_SHORTP_RATE_1 4 // long preamble CCK 1Mbps. short is forbidden in 1Mbps
1007#define MCS_SHORTP_RATE_2 5 // short preamble CCK 2Mbps 988#define MCS_SHORTP_RATE_2 5 // short preamble CCK 2Mbps
1008#define MCS_SHORTP_RATE_5_5 6 989#define MCS_SHORTP_RATE_5_5 6
1009#define MCS_SHORTP_RATE_11 7 990#define MCS_SHORTP_RATE_11 7
1010// To send duplicate legacy OFDM. set BW=BW_40. SGI.STBC are reserved 991// To send duplicate legacy OFDM. set BW=BW_40. SGI.STBC are reserved
1011#define MCS_RATE_6 0 // legacy OFDM 992#define MCS_RATE_6 0 // legacy OFDM
1012#define MCS_RATE_9 1 // OFDM 993#define MCS_RATE_9 1 // OFDM
1013#define MCS_RATE_12 2 // OFDM 994#define MCS_RATE_12 2 // OFDM
1014#define MCS_RATE_18 3 // OFDM 995#define MCS_RATE_18 3 // OFDM
1015#define MCS_RATE_24 4 // OFDM 996#define MCS_RATE_24 4 // OFDM
1016#define MCS_RATE_36 5 // OFDM 997#define MCS_RATE_36 5 // OFDM
1017#define MCS_RATE_48 6 // OFDM 998#define MCS_RATE_48 6 // OFDM
1018#define MCS_RATE_54 7 // OFDM 999#define MCS_RATE_54 7 // OFDM
1019// HT 1000// HT
1020#define MCS_0 0 // 1S 1001#define MCS_0 0 // 1S
1021#define MCS_1 1 1002#define MCS_1 1
@@ -1070,7 +1051,7 @@
1070#define RXSTBC_TWO 2 // rx support of 1 and 2 spatial stream 1051#define RXSTBC_TWO 2 // rx support of 1 and 2 spatial stream
1071#define RXSTBC_THR 3 // rx support of 1~3 spatial stream 1052#define RXSTBC_THR 3 // rx support of 1~3 spatial stream
1072// MCS FEEDBACK 1053// MCS FEEDBACK
1073#define MCSFBK_NONE 0 // not support mcs feedback / 1054#define MCSFBK_NONE 0 // not support mcs feedback /
1074#define MCSFBK_RSV 1 // reserved 1055#define MCSFBK_RSV 1 // reserved
1075#define MCSFBK_UNSOLICIT 2 // only support unsolict mcs feedback 1056#define MCSFBK_UNSOLICIT 2 // only support unsolict mcs feedback
1076#define MCSFBK_MRQ 3 // response to both MRQ and unsolict mcs feedback 1057#define MCSFBK_MRQ 3 // response to both MRQ and unsolict mcs feedback
@@ -1081,7 +1062,6 @@
1081#define MMPS_RSV 2 1062#define MMPS_RSV 2
1082#define MMPS_ENABLE 3 1063#define MMPS_ENABLE 3
1083 1064
1084
1085// A-MSDU size 1065// A-MSDU size
1086#define AMSDU_0 0 1066#define AMSDU_0 0
1087#define AMSDU_1 1 1067#define AMSDU_1 1
@@ -1094,28 +1074,28 @@
1094#define RATE_2 1 1074#define RATE_2 1
1095#define RATE_5_5 2 1075#define RATE_5_5 2
1096#define RATE_11 3 1076#define RATE_11 3
1097#define RATE_6 4 // OFDM 1077#define RATE_6 4 // OFDM
1098#define RATE_9 5 // OFDM 1078#define RATE_9 5 // OFDM
1099#define RATE_12 6 // OFDM 1079#define RATE_12 6 // OFDM
1100#define RATE_18 7 // OFDM 1080#define RATE_18 7 // OFDM
1101#define RATE_24 8 // OFDM 1081#define RATE_24 8 // OFDM
1102#define RATE_36 9 // OFDM 1082#define RATE_36 9 // OFDM
1103#define RATE_48 10 // OFDM 1083#define RATE_48 10 // OFDM
1104#define RATE_54 11 // OFDM 1084#define RATE_54 11 // OFDM
1105#define RATE_FIRST_OFDM_RATE RATE_6 1085#define RATE_FIRST_OFDM_RATE RATE_6
1106#define RATE_LAST_OFDM_RATE RATE_54 1086#define RATE_LAST_OFDM_RATE RATE_54
1107#define RATE_6_5 12 // HT mix 1087#define RATE_6_5 12 // HT mix
1108#define RATE_13 13 // HT mix 1088#define RATE_13 13 // HT mix
1109#define RATE_19_5 14 // HT mix 1089#define RATE_19_5 14 // HT mix
1110#define RATE_26 15 // HT mix 1090#define RATE_26 15 // HT mix
1111#define RATE_39 16 // HT mix 1091#define RATE_39 16 // HT mix
1112#define RATE_52 17 // HT mix 1092#define RATE_52 17 // HT mix
1113#define RATE_58_5 18 // HT mix 1093#define RATE_58_5 18 // HT mix
1114#define RATE_65 19 // HT mix 1094#define RATE_65 19 // HT mix
1115#define RATE_78 20 // HT mix 1095#define RATE_78 20 // HT mix
1116#define RATE_104 21 // HT mix 1096#define RATE_104 21 // HT mix
1117#define RATE_117 22 // HT mix 1097#define RATE_117 22 // HT mix
1118#define RATE_130 23 // HT mix 1098#define RATE_130 23 // HT mix
1119//#define RATE_AUTO_SWITCH 255 // for StaCfg.FixedTxRate only 1099//#define RATE_AUTO_SWITCH 255 // for StaCfg.FixedTxRate only
1120#define HTRATE_0 12 1100#define HTRATE_0 12
1121#define RATE_FIRST_MM_RATE HTRATE_0 1101#define RATE_FIRST_MM_RATE HTRATE_0
@@ -1134,34 +1114,34 @@
1134 1114
1135// Country Region definition 1115// Country Region definition
1136#define REGION_MINIMUM_BG_BAND 0 1116#define REGION_MINIMUM_BG_BAND 0
1137#define REGION_0_BG_BAND 0 // 1-11 1117#define REGION_0_BG_BAND 0 // 1-11
1138#define REGION_1_BG_BAND 1 // 1-13 1118#define REGION_1_BG_BAND 1 // 1-13
1139#define REGION_2_BG_BAND 2 // 10-11 1119#define REGION_2_BG_BAND 2 // 10-11
1140#define REGION_3_BG_BAND 3 // 10-13 1120#define REGION_3_BG_BAND 3 // 10-13
1141#define REGION_4_BG_BAND 4 // 14 1121#define REGION_4_BG_BAND 4 // 14
1142#define REGION_5_BG_BAND 5 // 1-14 1122#define REGION_5_BG_BAND 5 // 1-14
1143#define REGION_6_BG_BAND 6 // 3-9 1123#define REGION_6_BG_BAND 6 // 3-9
1144#define REGION_7_BG_BAND 7 // 5-13 1124#define REGION_7_BG_BAND 7 // 5-13
1145#define REGION_31_BG_BAND 31 // 5-13 1125#define REGION_31_BG_BAND 31 // 5-13
1146#define REGION_MAXIMUM_BG_BAND 7 1126#define REGION_MAXIMUM_BG_BAND 7
1147 1127
1148#define REGION_MINIMUM_A_BAND 0 1128#define REGION_MINIMUM_A_BAND 0
1149#define REGION_0_A_BAND 0 // 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165 1129#define REGION_0_A_BAND 0 // 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165
1150#define REGION_1_A_BAND 1 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 1130#define REGION_1_A_BAND 1 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
1151#define REGION_2_A_BAND 2 // 36, 40, 44, 48, 52, 56, 60, 64 1131#define REGION_2_A_BAND 2 // 36, 40, 44, 48, 52, 56, 60, 64
1152#define REGION_3_A_BAND 3 // 52, 56, 60, 64, 149, 153, 157, 161 1132#define REGION_3_A_BAND 3 // 52, 56, 60, 64, 149, 153, 157, 161
1153#define REGION_4_A_BAND 4 // 149, 153, 157, 161, 165 1133#define REGION_4_A_BAND 4 // 149, 153, 157, 161, 165
1154#define REGION_5_A_BAND 5 // 149, 153, 157, 161 1134#define REGION_5_A_BAND 5 // 149, 153, 157, 161
1155#define REGION_6_A_BAND 6 // 36, 40, 44, 48 1135#define REGION_6_A_BAND 6 // 36, 40, 44, 48
1156#define REGION_7_A_BAND 7 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, 169, 173 1136#define REGION_7_A_BAND 7 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165, 169, 173
1157#define REGION_8_A_BAND 8 // 52, 56, 60, 64 1137#define REGION_8_A_BAND 8 // 52, 56, 60, 64
1158#define REGION_9_A_BAND 9 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165 1138#define REGION_9_A_BAND 9 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165
1159#define REGION_10_A_BAND 10 // 36, 40, 44, 48, 149, 153, 157, 161, 165 1139#define REGION_10_A_BAND 10 // 36, 40, 44, 48, 149, 153, 157, 161, 165
1160#define REGION_11_A_BAND 11 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161 1140#define REGION_11_A_BAND 11 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 149, 153, 157, 161
1161#define REGION_12_A_BAND 12 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 1141#define REGION_12_A_BAND 12 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
1162#define REGION_13_A_BAND 13 // 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161 1142#define REGION_13_A_BAND 13 // 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161
1163#define REGION_14_A_BAND 14 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165 1143#define REGION_14_A_BAND 14 // 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165
1164#define REGION_15_A_BAND 15 // 149, 153, 157, 161, 165, 169, 173 1144#define REGION_15_A_BAND 15 // 149, 153, 157, 161, 165, 169, 173
1165#define REGION_MAXIMUM_A_BAND 15 1145#define REGION_MAXIMUM_A_BAND 15
1166 1146
1167// pTxD->CipherAlg 1147// pTxD->CipherAlg
@@ -1172,10 +1152,9 @@
1172#define CIPHER_AES 4 1152#define CIPHER_AES 4
1173#define CIPHER_CKIP64 5 1153#define CIPHER_CKIP64 5
1174#define CIPHER_CKIP128 6 1154#define CIPHER_CKIP128 6
1175#define CIPHER_TKIP_NO_MIC 7 // MIC appended by driver: not a valid value in hardware key table 1155#define CIPHER_TKIP_NO_MIC 7 // MIC appended by driver: not a valid value in hardware key table
1176#define CIPHER_SMS4 8 1156#define CIPHER_SMS4 8
1177 1157
1178
1179// LED Status. 1158// LED Status.
1180#define LED_LINK_DOWN 0 1159#define LED_LINK_DOWN 0
1181#define LED_LINK_UP 1 1160#define LED_LINK_UP 1
@@ -1189,11 +1168,11 @@
1189// value domain of pAd->LedCntl.LedMode and E2PROM 1168// value domain of pAd->LedCntl.LedMode and E2PROM
1190#define LED_MODE_DEFAULT 0 1169#define LED_MODE_DEFAULT 0
1191#define LED_MODE_TWO_LED 1 1170#define LED_MODE_TWO_LED 1
1192//#define LED_MODE_SIGNAL_STREGTH 8 // EEPROM define =8 1171//#define LED_MODE_SIGNAL_STREGTH 8 // EEPROM define =8
1193#define LED_MODE_SIGNAL_STREGTH 0x40 // EEPROM define = 64 1172#define LED_MODE_SIGNAL_STREGTH 0x40 // EEPROM define = 64
1194 1173
1195// RC4 init value, used fro WEP & TKIP 1174// RC4 init value, used fro WEP & TKIP
1196#define PPPINITFCS32 0xffffffff /* Initial FCS value */ 1175#define PPPINITFCS32 0xffffffff /* Initial FCS value */
1197 1176
1198// value domain of pAd->StaCfg.PortSecured. 802.1X controlled port definition 1177// value domain of pAd->StaCfg.PortSecured. 802.1X controlled port definition
1199#define WPA_802_1X_PORT_SECURED 1 1178#define WPA_802_1X_PORT_SECURED 1
@@ -1205,7 +1184,6 @@
1205//definition of DRS 1184//definition of DRS
1206#define MAX_STEP_OF_TX_RATE_SWITCH 32 1185#define MAX_STEP_OF_TX_RATE_SWITCH 32
1207 1186
1208
1209// pre-allocated free NDIS PACKET/BUFFER poll for internal usage 1187// pre-allocated free NDIS PACKET/BUFFER poll for internal usage
1210#define MAX_NUM_OF_FREE_NDIS_PACKET 128 1188#define MAX_NUM_OF_FREE_NDIS_PACKET 128
1211 1189
@@ -1223,7 +1201,7 @@
1223#define DEFAULT_RF_TX_POWER 5 1201#define DEFAULT_RF_TX_POWER 5
1224 1202
1225#define MAX_INI_BUFFER_SIZE 4096 1203#define MAX_INI_BUFFER_SIZE 4096
1226#define MAX_PARAM_BUFFER_SIZE (2048) // enough for ACL (18*64) 1204#define MAX_PARAM_BUFFER_SIZE (2048) // enough for ACL (18*64)
1227 //18 : the length of Mac address acceptable format "01:02:03:04:05:06;") 1205 //18 : the length of Mac address acceptable format "01:02:03:04:05:06;")
1228 //64 : MAX_NUM_OF_ACL_LIST 1206 //64 : MAX_NUM_OF_ACL_LIST
1229// definition of pAd->OpMode 1207// definition of pAd->OpMode
@@ -1233,10 +1211,10 @@
1233 1211
1234// ========================= AP rtmp_def.h =========================== 1212// ========================= AP rtmp_def.h ===========================
1235// value domain for pAd->EventTab.Log[].Event 1213// value domain for pAd->EventTab.Log[].Event
1236#define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point" 1214#define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point"
1237#define EVENT_ASSOCIATED 1 // Log = "hh:mm:ss STA 00:01:02:03:04:05 associated" 1215#define EVENT_ASSOCIATED 1 // Log = "hh:mm:ss STA 00:01:02:03:04:05 associated"
1238#define EVENT_DISASSOCIATED 2 // Log = "hh:mm:ss STA 00:01:02:03:04:05 left this BSS" 1216#define EVENT_DISASSOCIATED 2 // Log = "hh:mm:ss STA 00:01:02:03:04:05 left this BSS"
1239#define EVENT_AGED_OUT 3 // Log = "hh:mm:ss STA 00:01:02:03:04:05 was aged-out and removed from this BSS" 1217#define EVENT_AGED_OUT 3 // Log = "hh:mm:ss STA 00:01:02:03:04:05 was aged-out and removed from this BSS"
1240#define EVENT_COUNTER_M 4 1218#define EVENT_COUNTER_M 4
1241#define EVENT_INVALID_PSK 5 1219#define EVENT_INVALID_PSK 5
1242#define EVENT_MAX_EVENT_TYPE 6 1220#define EVENT_MAX_EVENT_TYPE 6
@@ -1262,7 +1240,6 @@
1262// MBSSID definition 1240// MBSSID definition
1263#define ENTRY_NOT_FOUND 0xFF 1241#define ENTRY_NOT_FOUND 0xFF
1264 1242
1265
1266/* After Linux 2.6.9, 1243/* After Linux 2.6.9,
1267 * VLAN module use Private (from user) interface flags (netdevice->priv_flags). 1244 * VLAN module use Private (from user) interface flags (netdevice->priv_flags).
1268 * #define IFF_802_1Q_VLAN 0x1 -- 802.1Q VLAN device. in if.h 1245 * #define IFF_802_1Q_VLAN 0x1 -- 802.1Q VLAN device. in if.h
@@ -1282,13 +1259,10 @@
1282#define INF_APCLI_DEV_NAME "apcli" 1259#define INF_APCLI_DEV_NAME "apcli"
1283#define INF_MESH_DEV_NAME "mesh" 1260#define INF_MESH_DEV_NAME "mesh"
1284 1261
1285
1286// WEP Key TYPE 1262// WEP Key TYPE
1287#define WEP_HEXADECIMAL_TYPE 0 1263#define WEP_HEXADECIMAL_TYPE 0
1288#define WEP_ASCII_TYPE 1 1264#define WEP_ASCII_TYPE 1
1289 1265
1290
1291
1292// WIRELESS EVENTS definition 1266// WIRELESS EVENTS definition
1293/* Max number of char in custom event, refer to wireless_tools.28/wireless.20.h */ 1267/* Max number of char in custom event, refer to wireless_tools.28/wireless.20.h */
1294#define IW_CUSTOM_MAX_LEN 255 /* In bytes */ 1268#define IW_CUSTOM_MAX_LEN 255 /* In bytes */
@@ -1375,7 +1349,6 @@
1375#define GUI_IDLE_POWER_SAVE 3 1349#define GUI_IDLE_POWER_SAVE 3
1376// -- 1350// --
1377 1351
1378
1379// definition for WpaSupport flag 1352// definition for WpaSupport flag
1380#define WPA_SUPPLICANT_DISABLE 0 1353#define WPA_SUPPLICANT_DISABLE 0
1381#define WPA_SUPPLICANT_ENABLE 1 1354#define WPA_SUPPLICANT_ENABLE 1
@@ -1418,10 +1391,8 @@
1418#define cpu2be16(x) SWAP16((x)) 1391#define cpu2be16(x) SWAP16((x))
1419#define be2cpu16(x) SWAP16((x)) 1392#define be2cpu16(x) SWAP16((x))
1420 1393
1421
1422#define ABS(_x, _y) ((_x) > (_y)) ? ((_x) -(_y)) : ((_y) -(_x)) 1394#define ABS(_x, _y) ((_x) > (_y)) ? ((_x) -(_y)) : ((_y) -(_x))
1423 1395
1424
1425#define A2Dec(_X, _p) \ 1396#define A2Dec(_X, _p) \
1426{ \ 1397{ \
1427 UCHAR *p; \ 1398 UCHAR *p; \
@@ -1435,7 +1406,6 @@
1435 } \ 1406 } \
1436} 1407}
1437 1408
1438
1439#define A2Hex(_X, _p) \ 1409#define A2Hex(_X, _p) \
1440do{ \ 1410do{ \
1441 char *__p; \ 1411 char *__p; \
@@ -1453,6 +1423,4 @@ do{ \
1453 } \ 1423 } \
1454}while(0) 1424}while(0)
1455 1425
1456#endif // __RTMP_DEF_H__ 1426#endif // __RTMP_DEF_H__
1457
1458
diff --git a/drivers/staging/rt2860/rtmp_dot11.h b/drivers/staging/rt2860/rtmp_dot11.h
index f6887a83ea2..051840f8822 100644
--- a/drivers/staging/rt2860/rtmp_dot11.h
+++ b/drivers/staging/rt2860/rtmp_dot11.h
@@ -30,73 +30,71 @@
30 30
31#include "rtmp_type.h" 31#include "rtmp_type.h"
32 32
33
34// 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1. 33// 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1.
35typedef struct PACKED { 34typedef struct PACKED {
36 UINT32 MA:1; //management action payload exist in (QoS Null+HTC) 35 UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
37 UINT32 TRQ:1; //sounding request 36 UINT32 TRQ:1; //sounding request
38 UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback 37 UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
39 UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110. 38 UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110.
40 UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB. 39 UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB.
41 UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available 40 UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available
42 UINT32 CalPos:2; // calibration position 41 UINT32 CalPos:2; // calibration position
43 UINT32 CalSeq:2; //calibration sequence 42 UINT32 CalSeq:2; //calibration sequence
44 UINT32 FBKReq:2; //feedback request 43 UINT32 FBKReq:2; //feedback request
45 UINT32 CSISTEERING:2; //CSI/ STEERING 44 UINT32 CSISTEERING:2; //CSI/ STEERING
46 UINT32 ZLFAnnouce:1; // ZLF announcement 45 UINT32 ZLFAnnouce:1; // ZLF announcement
47 UINT32 rsv:5; //calibration sequence 46 UINT32 rsv:5; //calibration sequence
48 UINT32 ACConstraint:1; //feedback request 47 UINT32 ACConstraint:1; //feedback request
49 UINT32 RDG:1; //RDG / More PPDU 48 UINT32 RDG:1; //RDG / More PPDU
50} HT_CONTROL, *PHT_CONTROL; 49} HT_CONTROL, *PHT_CONTROL;
51 50
52// 2-byte QOS CONTROL field 51// 2-byte QOS CONTROL field
53typedef struct PACKED { 52typedef struct PACKED {
54 USHORT TID:4; 53 USHORT TID:4;
55 USHORT EOSP:1; 54 USHORT EOSP:1;
56 USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA 55 USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
57 USHORT AMsduPresent:1; 56 USHORT AMsduPresent:1;
58 USHORT Txop_QueueSize:8; 57 USHORT Txop_QueueSize:8;
59} QOS_CONTROL, *PQOS_CONTROL; 58} QOS_CONTROL, *PQOS_CONTROL;
60 59
61
62// 2-byte Frame control field 60// 2-byte Frame control field
63typedef struct PACKED { 61typedef struct PACKED {
64 USHORT Ver:2; // Protocol version 62 USHORT Ver:2; // Protocol version
65 USHORT Type:2; // MSDU type 63 USHORT Type:2; // MSDU type
66 USHORT SubType:4; // MSDU subtype 64 USHORT SubType:4; // MSDU subtype
67 USHORT ToDs:1; // To DS indication 65 USHORT ToDs:1; // To DS indication
68 USHORT FrDs:1; // From DS indication 66 USHORT FrDs:1; // From DS indication
69 USHORT MoreFrag:1; // More fragment bit 67 USHORT MoreFrag:1; // More fragment bit
70 USHORT Retry:1; // Retry status bit 68 USHORT Retry:1; // Retry status bit
71 USHORT PwrMgmt:1; // Power management bit 69 USHORT PwrMgmt:1; // Power management bit
72 USHORT MoreData:1; // More data bit 70 USHORT MoreData:1; // More data bit
73 USHORT Wep:1; // Wep data 71 USHORT Wep:1; // Wep data
74 USHORT Order:1; // Strict order expected 72 USHORT Order:1; // Strict order expected
75} FRAME_CONTROL, *PFRAME_CONTROL; 73} FRAME_CONTROL, *PFRAME_CONTROL;
76 74
77typedef struct PACKED _HEADER_802_11 { 75typedef struct PACKED _HEADER_802_11 {
78 FRAME_CONTROL FC; 76 FRAME_CONTROL FC;
79 USHORT Duration; 77 USHORT Duration;
80 UCHAR Addr1[MAC_ADDR_LEN]; 78 UCHAR Addr1[MAC_ADDR_LEN];
81 UCHAR Addr2[MAC_ADDR_LEN]; 79 UCHAR Addr2[MAC_ADDR_LEN];
82 UCHAR Addr3[MAC_ADDR_LEN]; 80 UCHAR Addr3[MAC_ADDR_LEN];
83 USHORT Frag:4; 81 USHORT Frag:4;
84 USHORT Sequence:12; 82 USHORT Sequence:12;
85 UCHAR Octet[0]; 83 UCHAR Octet[0];
86} HEADER_802_11, *PHEADER_802_11; 84} HEADER_802_11, *PHEADER_802_11;
87 85
88typedef struct PACKED _PSPOLL_FRAME { 86typedef struct PACKED _PSPOLL_FRAME {
89 FRAME_CONTROL FC; 87 FRAME_CONTROL FC;
90 USHORT Aid; 88 USHORT Aid;
91 UCHAR Bssid[MAC_ADDR_LEN]; 89 UCHAR Bssid[MAC_ADDR_LEN];
92 UCHAR Ta[MAC_ADDR_LEN]; 90 UCHAR Ta[MAC_ADDR_LEN];
93} PSPOLL_FRAME, *PPSPOLL_FRAME; 91} PSPOLL_FRAME, *PPSPOLL_FRAME;
94 92
95typedef struct PACKED _RTS_FRAME { 93typedef struct PACKED _RTS_FRAME {
96 FRAME_CONTROL FC; 94 FRAME_CONTROL FC;
97 USHORT Duration; 95 USHORT Duration;
98 UCHAR Addr1[MAC_ADDR_LEN]; 96 UCHAR Addr1[MAC_ADDR_LEN];
99 UCHAR Addr2[MAC_ADDR_LEN]; 97 UCHAR Addr2[MAC_ADDR_LEN];
100}RTS_FRAME, *PRTS_FRAME; 98} RTS_FRAME, *PRTS_FRAME;
101 99
102#endif // __DOT11_BASE_H__ // 100#endif // __DOT11_BASE_H__ //
diff --git a/drivers/staging/rt2860/rtmp_iface.h b/drivers/staging/rt2860/rtmp_iface.h
index c24ece5b724..eee17d46844 100644
--- a/drivers/staging/rt2860/rtmp_iface.h
+++ b/drivers/staging/rt2860/rtmp_iface.h
@@ -37,7 +37,6 @@
37#ifndef __RTMP_IFACE_H__ 37#ifndef __RTMP_IFACE_H__
38#define __RTMP_IFACE_H__ 38#define __RTMP_IFACE_H__
39 39
40
41#ifdef RTMP_PCI_SUPPORT 40#ifdef RTMP_PCI_SUPPORT
42#include "iface/rtmp_pci.h" 41#include "iface/rtmp_pci.h"
43#endif // RTMP_PCI_SUPPORT // 42#endif // RTMP_PCI_SUPPORT //
@@ -45,40 +44,32 @@
45#include "iface/rtmp_usb.h" 44#include "iface/rtmp_usb.h"
46#endif // RTMP_USB_SUPPORT // 45#endif // RTMP_USB_SUPPORT //
47 46
48typedef struct _INF_PCI_CONFIG_ 47typedef struct _INF_PCI_CONFIG_ {
49{ 48 unsigned long CSRBaseAddress; // PCI MMIO Base Address, all access will use
50 unsigned long CSRBaseAddress; // PCI MMIO Base Address, all access will use 49 unsigned int irq_num;
51 unsigned int irq_num; 50} INF_PCI_CONFIG;
52}INF_PCI_CONFIG;
53
54
55typedef struct _INF_USB_CONFIG_
56{
57 UINT8 BulkInEpAddr; // bulk-in endpoint address
58 UINT8 BulkOutEpAddr[6]; // bulk-out endpoint address
59}INF_USB_CONFIG;
60 51
52typedef struct _INF_USB_CONFIG_ {
53 UINT8 BulkInEpAddr; // bulk-in endpoint address
54 UINT8 BulkOutEpAddr[6]; // bulk-out endpoint address
55} INF_USB_CONFIG;
61 56
62typedef struct _INF_RBUS_CONFIG_ 57typedef struct _INF_RBUS_CONFIG_ {
63{ 58 unsigned long csr_addr;
64 unsigned long csr_addr; 59 unsigned int irq;
65 unsigned int irq; 60} INF_RBUS_CONFIG;
66}INF_RBUS_CONFIG;
67 61
68 62typedef enum _RTMP_INF_TYPE_ {
69typedef enum _RTMP_INF_TYPE_
70{
71 RTMP_DEV_INF_UNKNOWN = 0, 63 RTMP_DEV_INF_UNKNOWN = 0,
72 RTMP_DEV_INF_PCI = 1, 64 RTMP_DEV_INF_PCI = 1,
73 RTMP_DEV_INF_USB = 2, 65 RTMP_DEV_INF_USB = 2,
74 RTMP_DEV_INF_RBUS = 4, 66 RTMP_DEV_INF_RBUS = 4,
75}RTMP_INF_TYPE; 67} RTMP_INF_TYPE;
76
77 68
78typedef union _RTMP_INF_CONFIG_{ 69typedef union _RTMP_INF_CONFIG_ {
79 struct _INF_PCI_CONFIG_ pciConfig; 70 struct _INF_PCI_CONFIG_ pciConfig;
80 struct _INF_USB_CONFIG_ usbConfig; 71 struct _INF_USB_CONFIG_ usbConfig;
81 struct _INF_RBUS_CONFIG_ rbusConfig; 72 struct _INF_RBUS_CONFIG_ rbusConfig;
82}RTMP_INF_CONFIG; 73} RTMP_INF_CONFIG;
83 74
84#endif // __RTMP_IFACE_H__ // 75#endif // __RTMP_IFACE_H__ //
diff --git a/drivers/staging/rt2860/rtmp_mcu.h b/drivers/staging/rt2860/rtmp_mcu.h
index e1b2fee9e10..98dea1bb578 100644
--- a/drivers/staging/rt2860/rtmp_mcu.h
+++ b/drivers/staging/rt2860/rtmp_mcu.h
@@ -38,18 +38,12 @@
38#ifndef __RTMP_MCU_H__ 38#ifndef __RTMP_MCU_H__
39#define __RTMP_MCU_H__ 39#define __RTMP_MCU_H__
40 40
41INT RtmpAsicEraseFirmware(IN PRTMP_ADAPTER pAd);
41 42
42INT RtmpAsicEraseFirmware( 43NDIS_STATUS RtmpAsicLoadFirmware(IN PRTMP_ADAPTER pAd);
43 IN PRTMP_ADAPTER pAd);
44 44
45NDIS_STATUS RtmpAsicLoadFirmware( 45INT RtmpAsicSendCommandToMcu(IN PRTMP_ADAPTER pAd,
46 IN PRTMP_ADAPTER pAd); 46 IN UCHAR Command,
47 47 IN UCHAR Token, IN UCHAR Arg0, IN UCHAR Arg1);
48INT RtmpAsicSendCommandToMcu(
49 IN PRTMP_ADAPTER pAd,
50 IN UCHAR Command,
51 IN UCHAR Token,
52 IN UCHAR Arg0,
53 IN UCHAR Arg1);
54 48
55#endif // __RTMP_MCU_H__ // 49#endif // __RTMP_MCU_H__ //
diff --git a/drivers/staging/rt2860/rtmp_os.h b/drivers/staging/rt2860/rtmp_os.h
index 350621d59d1..82b60fc6c26 100644
--- a/drivers/staging/rt2860/rtmp_os.h
+++ b/drivers/staging/rt2860/rtmp_os.h
@@ -34,7 +34,6 @@
34 --------- ---------- ---------------------------------------------- 34 --------- ---------- ----------------------------------------------
35 */ 35 */
36 36
37
38#ifndef __RTMP_OS_H__ 37#ifndef __RTMP_OS_H__
39#define __RTMP_OS_H__ 38#define __RTMP_OS_H__
40 39
@@ -42,8 +41,6 @@
42#include "rt_linux.h" 41#include "rt_linux.h"
43#endif // LINUX // 42#endif // LINUX //
44 43
45
46
47/* 44/*
48 This data structure mainly strip some callback function defined in 45 This data structure mainly strip some callback function defined in
49 "struct net_device" in kernel source "include/linux/netdevice.h". 46 "struct net_device" in kernel source "include/linux/netdevice.h".
@@ -51,46 +48,41 @@
51 The definition of this data structure may various depends on different 48 The definition of this data structure may various depends on different
52 OS. Use it carefully. 49 OS. Use it carefully.
53*/ 50*/
54typedef struct _RTMP_OS_NETDEV_OP_HOOK_ 51typedef struct _RTMP_OS_NETDEV_OP_HOOK_ {
55{
56 const struct net_device_ops *netdev_ops; 52 const struct net_device_ops *netdev_ops;
57 void *priv; 53 void *priv;
58 int priv_flags; 54 int priv_flags;
59 unsigned char devAddr[6]; 55 unsigned char devAddr[6];
60 unsigned char devName[16]; 56 unsigned char devName[16];
61 unsigned char needProtcted; 57 unsigned char needProtcted;
62}RTMP_OS_NETDEV_OP_HOOK, *PRTMP_OS_NETDEV_OP_HOOK; 58} RTMP_OS_NETDEV_OP_HOOK, *PRTMP_OS_NETDEV_OP_HOOK;
63 59
64 60typedef enum _RTMP_TASK_STATUS_ {
65typedef enum _RTMP_TASK_STATUS_
66{
67 RTMP_TASK_STAT_UNKNOWN = 0, 61 RTMP_TASK_STAT_UNKNOWN = 0,
68 RTMP_TASK_STAT_INITED = 1, 62 RTMP_TASK_STAT_INITED = 1,
69 RTMP_TASK_STAT_RUNNING = 2, 63 RTMP_TASK_STAT_RUNNING = 2,
70 RTMP_TASK_STAT_STOPED = 4, 64 RTMP_TASK_STAT_STOPED = 4,
71}RTMP_TASK_STATUS; 65} RTMP_TASK_STATUS;
72#define RTMP_TASK_CAN_DO_INSERT (RTMP_TASK_STAT_INITED |RTMP_TASK_STAT_RUNNING) 66#define RTMP_TASK_CAN_DO_INSERT (RTMP_TASK_STAT_INITED |RTMP_TASK_STAT_RUNNING)
73 67
74#define RTMP_OS_TASK_NAME_LEN 16 68#define RTMP_OS_TASK_NAME_LEN 16
75typedef struct _RTMP_OS_TASK_ 69typedef struct _RTMP_OS_TASK_ {
76{ 70 char taskName[RTMP_OS_TASK_NAME_LEN];
77 char taskName[RTMP_OS_TASK_NAME_LEN]; 71 void *priv;
78 void *priv; 72 //unsigned long taskFlags;
79 //unsigned long taskFlags; 73 RTMP_TASK_STATUS taskStatus;
80 RTMP_TASK_STATUS taskStatus;
81#ifndef KTHREAD_SUPPORT 74#ifndef KTHREAD_SUPPORT
82 RTMP_OS_SEM taskSema; 75 RTMP_OS_SEM taskSema;
83 RTMP_OS_PID taskPID; 76 RTMP_OS_PID taskPID;
84 struct completion taskComplete; 77 struct completion taskComplete;
85#endif 78#endif
86 unsigned char task_killed; 79 unsigned char task_killed;
87#ifdef KTHREAD_SUPPORT 80#ifdef KTHREAD_SUPPORT
88 struct task_struct *kthread_task; 81 struct task_struct *kthread_task;
89 wait_queue_head_t kthread_q; 82 wait_queue_head_t kthread_q;
90 BOOLEAN kthread_running; 83 BOOLEAN kthread_running;
91#endif 84#endif
92}RTMP_OS_TASK; 85} RTMP_OS_TASK;
93
94 86
95int RtmpOSIRQRequest(IN PNET_DEV pNetDev); 87int RtmpOSIRQRequest(IN PNET_DEV pNetDev);
96int RtmpOSIRQRelease(IN PNET_DEV pNetDev); 88int RtmpOSIRQRelease(IN PNET_DEV pNetDev);
diff --git a/drivers/staging/rt2860/rtmp_timer.h b/drivers/staging/rt2860/rtmp_timer.h
index 5f6e3ce368a..9f771979710 100644
--- a/drivers/staging/rt2860/rtmp_timer.h
+++ b/drivers/staging/rt2860/rtmp_timer.h
@@ -43,59 +43,52 @@
43 43
44#include "rtmp_os.h" 44#include "rtmp_os.h"
45 45
46
47#define DECLARE_TIMER_FUNCTION(_func) \ 46#define DECLARE_TIMER_FUNCTION(_func) \
48 void rtmp_timer_##_func(unsigned long data) 47 void rtmp_timer_##_func(unsigned long data)
49 48
50#define GET_TIMER_FUNCTION(_func) \ 49#define GET_TIMER_FUNCTION(_func) \
51 rtmp_timer_##_func 50 rtmp_timer_##_func
52 51
53
54/* ----------------- Timer Related MARCO ---------------*/ 52/* ----------------- Timer Related MARCO ---------------*/
55// In some os or chipset, we have a lot of timer functions and will read/write register, 53// In some os or chipset, we have a lot of timer functions and will read/write register,
56// it's not allowed in Linux USB sub-system to do it ( because of sleep issue when 54// it's not allowed in Linux USB sub-system to do it ( because of sleep issue when
57// submit to ctrl pipe). So we need a wrapper function to take care it. 55// submit to ctrl pipe). So we need a wrapper function to take care it.
58 56
59#ifdef RTMP_TIMER_TASK_SUPPORT 57#ifdef RTMP_TIMER_TASK_SUPPORT
60typedef VOID (*RTMP_TIMER_TASK_HANDLE)( 58typedef VOID(*RTMP_TIMER_TASK_HANDLE) (IN PVOID SystemSpecific1,
61 IN PVOID SystemSpecific1, 59 IN PVOID FunctionContext,
62 IN PVOID FunctionContext, 60 IN PVOID SystemSpecific2,
63 IN PVOID SystemSpecific2, 61 IN PVOID SystemSpecific3);
64 IN PVOID SystemSpecific3);
65#endif // RTMP_TIMER_TASK_SUPPORT // 62#endif // RTMP_TIMER_TASK_SUPPORT //
66 63
67typedef struct _RALINK_TIMER_STRUCT { 64typedef struct _RALINK_TIMER_STRUCT {
68 RTMP_OS_TIMER TimerObj; // Ndis Timer object 65 RTMP_OS_TIMER TimerObj; // Ndis Timer object
69 BOOLEAN Valid; // Set to True when call RTMPInitTimer 66 BOOLEAN Valid; // Set to True when call RTMPInitTimer
70 BOOLEAN State; // True if timer cancelled 67 BOOLEAN State; // True if timer cancelled
71 BOOLEAN PeriodicType; // True if timer is periodic timer 68 BOOLEAN PeriodicType; // True if timer is periodic timer
72 BOOLEAN Repeat; // True if periodic timer 69 BOOLEAN Repeat; // True if periodic timer
73 ULONG TimerValue; // Timer value in milliseconds 70 ULONG TimerValue; // Timer value in milliseconds
74 ULONG cookie; // os specific object 71 ULONG cookie; // os specific object
75#ifdef RTMP_TIMER_TASK_SUPPORT 72#ifdef RTMP_TIMER_TASK_SUPPORT
76 RTMP_TIMER_TASK_HANDLE handle; 73 RTMP_TIMER_TASK_HANDLE handle;
77 void *pAd; 74 void *pAd;
78#endif // RTMP_TIMER_TASK_SUPPORT // 75#endif // RTMP_TIMER_TASK_SUPPORT //
79}RALINK_TIMER_STRUCT, *PRALINK_TIMER_STRUCT; 76} RALINK_TIMER_STRUCT, *PRALINK_TIMER_STRUCT;
80
81 77
82#ifdef RTMP_TIMER_TASK_SUPPORT 78#ifdef RTMP_TIMER_TASK_SUPPORT
83typedef struct _RTMP_TIMER_TASK_ENTRY_ 79typedef struct _RTMP_TIMER_TASK_ENTRY_ {
84{ 80 RALINK_TIMER_STRUCT *pRaTimer;
85 RALINK_TIMER_STRUCT *pRaTimer; 81 struct _RTMP_TIMER_TASK_ENTRY_ *pNext;
86 struct _RTMP_TIMER_TASK_ENTRY_ *pNext; 82} RTMP_TIMER_TASK_ENTRY;
87}RTMP_TIMER_TASK_ENTRY;
88
89 83
90#define TIMER_QUEUE_SIZE_MAX 128 84#define TIMER_QUEUE_SIZE_MAX 128
91typedef struct _RTMP_TIMER_TASK_QUEUE_ 85typedef struct _RTMP_TIMER_TASK_QUEUE_ {
92{ 86 unsigned int status;
93 unsigned int status; 87 unsigned char *pTimerQPoll;
94 unsigned char *pTimerQPoll; 88 RTMP_TIMER_TASK_ENTRY *pQPollFreeList;
95 RTMP_TIMER_TASK_ENTRY *pQPollFreeList; 89 RTMP_TIMER_TASK_ENTRY *pQHead;
96 RTMP_TIMER_TASK_ENTRY *pQHead; 90 RTMP_TIMER_TASK_ENTRY *pQTail;
97 RTMP_TIMER_TASK_ENTRY *pQTail; 91} RTMP_TIMER_TASK_QUEUE;
98}RTMP_TIMER_TASK_QUEUE;
99 92
100#define BUILD_TIMER_FUNCTION(_func) \ 93#define BUILD_TIMER_FUNCTION(_func) \
101void rtmp_timer_##_func(unsigned long data) \ 94void rtmp_timer_##_func(unsigned long data) \
@@ -122,7 +115,6 @@ void rtmp_timer_##_func(unsigned long data) \
122} 115}
123#endif // RTMP_TIMER_TASK_SUPPORT // 116#endif // RTMP_TIMER_TASK_SUPPORT //
124 117
125
126DECLARE_TIMER_FUNCTION(MlmePeriodicExec); 118DECLARE_TIMER_FUNCTION(MlmePeriodicExec);
127DECLARE_TIMER_FUNCTION(MlmeRssiReportExec); 119DECLARE_TIMER_FUNCTION(MlmeRssiReportExec);
128DECLARE_TIMER_FUNCTION(AsicRxAntEvalTimeout); 120DECLARE_TIMER_FUNCTION(AsicRxAntEvalTimeout);
@@ -152,5 +144,4 @@ DECLARE_TIMER_FUNCTION(RtmpUsbStaAsicForceWakeupTimeout);
152DECLARE_TIMER_FUNCTION(LedCtrlMain); 144DECLARE_TIMER_FUNCTION(LedCtrlMain);
153#endif 145#endif
154 146
155
156#endif // __RTMP_TIMER_H__ // 147#endif // __RTMP_TIMER_H__ //
diff --git a/drivers/staging/rt2860/rtmp_type.h b/drivers/staging/rt2860/rtmp_type.h
index f99cd2b4c48..4900f9fd444 100644
--- a/drivers/staging/rt2860/rtmp_type.h
+++ b/drivers/staging/rt2860/rtmp_type.h
@@ -38,110 +38,101 @@
38#ifndef __RTMP_TYPE_H__ 38#ifndef __RTMP_TYPE_H__
39#define __RTMP_TYPE_H__ 39#define __RTMP_TYPE_H__
40 40
41
42#define PACKED __attribute__ ((packed)) 41#define PACKED __attribute__ ((packed))
43 42
44#ifdef LINUX 43#ifdef LINUX
45// Put platform dependent declaration here 44// Put platform dependent declaration here
46// For example, linux type definition 45// For example, linux type definition
47typedef unsigned char UINT8; 46typedef unsigned char UINT8;
48typedef unsigned short UINT16; 47typedef unsigned short UINT16;
49typedef unsigned int UINT32; 48typedef unsigned int UINT32;
50typedef unsigned long long UINT64; 49typedef unsigned long long UINT64;
51typedef int INT32; 50typedef int INT32;
52typedef long long INT64; 51typedef long long INT64;
53#endif // LINUX // 52#endif // LINUX //
54 53
55typedef unsigned char * PUINT8; 54typedef unsigned char *PUINT8;
56typedef unsigned short * PUINT16; 55typedef unsigned short *PUINT16;
57typedef unsigned int * PUINT32; 56typedef unsigned int *PUINT32;
58typedef unsigned long long * PUINT64; 57typedef unsigned long long *PUINT64;
59typedef int * PINT32; 58typedef int *PINT32;
60typedef long long * PINT64; 59typedef long long *PINT64;
61 60
62// modified for fixing compile warning on Sigma 8634 platform 61// modified for fixing compile warning on Sigma 8634 platform
63typedef char STRING; 62typedef char STRING;
64typedef signed char CHAR; 63typedef signed char CHAR;
65
66typedef signed short SHORT;
67typedef signed int INT;
68typedef signed long LONG;
69typedef signed long long LONGLONG;
70 64
65typedef signed short SHORT;
66typedef signed int INT;
67typedef signed long LONG;
68typedef signed long long LONGLONG;
71 69
72#ifdef LINUX 70#ifdef LINUX
73typedef unsigned char UCHAR; 71typedef unsigned char UCHAR;
74typedef unsigned short USHORT; 72typedef unsigned short USHORT;
75typedef unsigned int UINT; 73typedef unsigned int UINT;
76typedef unsigned long ULONG; 74typedef unsigned long ULONG;
77#endif // LINUX // 75#endif // LINUX //
78typedef unsigned long long ULONGLONG; 76typedef unsigned long long ULONGLONG;
79 77
80typedef unsigned char BOOLEAN; 78typedef unsigned char BOOLEAN;
81#ifdef LINUX 79#ifdef LINUX
82typedef void VOID; 80typedef void VOID;
83#endif // LINUX // 81#endif // LINUX //
84 82
85typedef char * PSTRING; 83typedef char *PSTRING;
86typedef VOID * PVOID; 84typedef VOID *PVOID;
87typedef CHAR * PCHAR; 85typedef CHAR *PCHAR;
88typedef UCHAR * PUCHAR; 86typedef UCHAR *PUCHAR;
89typedef USHORT * PUSHORT; 87typedef USHORT *PUSHORT;
90typedef LONG * PLONG; 88typedef LONG *PLONG;
91typedef ULONG * PULONG; 89typedef ULONG *PULONG;
92typedef UINT * PUINT; 90typedef UINT *PUINT;
93 91
94typedef unsigned int NDIS_MEDIA_STATE; 92typedef unsigned int NDIS_MEDIA_STATE;
95 93
96typedef union _LARGE_INTEGER { 94typedef union _LARGE_INTEGER {
97 struct { 95 struct {
98 UINT LowPart; 96 UINT LowPart;
99 INT32 HighPart; 97 INT32 HighPart;
100 } u; 98 } u;
101 INT64 QuadPart; 99 INT64 QuadPart;
102} LARGE_INTEGER; 100} LARGE_INTEGER;
103 101
104
105// 102//
106// Register set pair for initialzation register set definition 103// Register set pair for initialzation register set definition
107// 104//
108typedef struct _RTMP_REG_PAIR 105typedef struct _RTMP_REG_PAIR {
109{ 106 ULONG Register;
110 ULONG Register; 107 ULONG Value;
111 ULONG Value;
112} RTMP_REG_PAIR, *PRTMP_REG_PAIR; 108} RTMP_REG_PAIR, *PRTMP_REG_PAIR;
113 109
114typedef struct _REG_PAIR 110typedef struct _REG_PAIR {
115{ 111 UCHAR Register;
116 UCHAR Register; 112 UCHAR Value;
117 UCHAR Value;
118} REG_PAIR, *PREG_PAIR; 113} REG_PAIR, *PREG_PAIR;
119 114
120// 115//
121// Register set pair for initialzation register set definition 116// Register set pair for initialzation register set definition
122// 117//
123typedef struct _RTMP_RF_REGS 118typedef struct _RTMP_RF_REGS {
124{ 119 UCHAR Channel;
125 UCHAR Channel; 120 ULONG R1;
126 ULONG R1; 121 ULONG R2;
127 ULONG R2; 122 ULONG R3;
128 ULONG R3; 123 ULONG R4;
129 ULONG R4;
130} RTMP_RF_REGS, *PRTMP_RF_REGS; 124} RTMP_RF_REGS, *PRTMP_RF_REGS;
131 125
132typedef struct _FREQUENCY_ITEM { 126typedef struct _FREQUENCY_ITEM {
133 UCHAR Channel; 127 UCHAR Channel;
134 UCHAR N; 128 UCHAR N;
135 UCHAR R; 129 UCHAR R;
136 UCHAR K; 130 UCHAR K;
137} FREQUENCY_ITEM, *PFREQUENCY_ITEM; 131} FREQUENCY_ITEM, *PFREQUENCY_ITEM;
138 132
139 133typedef int NTSTATUS;
140typedef int NTSTATUS;
141
142 134
143#define STATUS_SUCCESS 0x00 135#define STATUS_SUCCESS 0x00
144#define STATUS_UNSUCCESSFUL 0x01 136#define STATUS_UNSUCCESSFUL 0x01
145 137
146#endif // __RTMP_TYPE_H__ // 138#endif // __RTMP_TYPE_H__ //
147
diff --git a/drivers/staging/rt2860/rtusb_io.h b/drivers/staging/rt2860/rtusb_io.h
index 055e4efac2f..6217dd2430f 100644
--- a/drivers/staging/rt2860/rtusb_io.h
+++ b/drivers/staging/rt2860/rtusb_io.h
@@ -25,7 +25,6 @@
25 ************************************************************************* 25 *************************************************************************
26*/ 26*/
27 27
28
29#ifndef __RTUSB_IO_H__ 28#ifndef __RTUSB_IO_H__
30#define __RTUSB_IO_H__ 29#define __RTUSB_IO_H__
31 30
@@ -60,8 +59,8 @@
60#define CMDTHREAD_SET_ASIC_WCID 0x0D730226 // cmd 59#define CMDTHREAD_SET_ASIC_WCID 0x0D730226 // cmd
61#define CMDTHREAD_SET_ASIC_WCID_CIPHER 0x0D730227 // cmd 60#define CMDTHREAD_SET_ASIC_WCID_CIPHER 0x0D730227 // cmd
62#define CMDTHREAD_QKERIODIC_EXECUT 0x0D73023D // cmd 61#define CMDTHREAD_QKERIODIC_EXECUT 0x0D73023D // cmd
63#define RT_CMD_SET_KEY_TABLE 0x0D730228 // cmd 62#define RT_CMD_SET_KEY_TABLE 0x0D730228 // cmd
64#define RT_CMD_SET_RX_WCID_TABLE 0x0D730229 // cmd 63#define RT_CMD_SET_RX_WCID_TABLE 0x0D730229 // cmd
65#define CMDTHREAD_SET_CLIENT_MAC_ENTRY 0x0D73023E // cmd 64#define CMDTHREAD_SET_CLIENT_MAC_ENTRY 0x0D73023E // cmd
66#define CMDTHREAD_SET_GROUP_KEY 0x0D73023F // cmd 65#define CMDTHREAD_SET_GROUP_KEY 0x0D73023F // cmd
67#define CMDTHREAD_SET_PAIRWISE_KEY 0x0D730240 // cmd 66#define CMDTHREAD_SET_PAIRWISE_KEY 0x0D730240 // cmd
@@ -75,34 +74,31 @@
75#define CMDTHREAD_UPDATE_PROTECT 0x0D790103 // cmd 74#define CMDTHREAD_UPDATE_PROTECT 0x0D790103 // cmd
76// end johnli 75// end johnli
77 76
78
79//CMDTHREAD_MULTI_READ_MAC 77//CMDTHREAD_MULTI_READ_MAC
80//CMDTHREAD_MULTI_WRITE_MAC 78//CMDTHREAD_MULTI_WRITE_MAC
81//CMDTHREAD_VENDOR_EEPROM_READ 79//CMDTHREAD_VENDOR_EEPROM_READ
82//CMDTHREAD_VENDOR_EEPROM_WRITE 80//CMDTHREAD_VENDOR_EEPROM_WRITE
83typedef struct _CMDHandler_TLV { 81typedef struct _CMDHandler_TLV {
84 USHORT Offset; 82 USHORT Offset;
85 USHORT Length; 83 USHORT Length;
86 UCHAR DataFirst; 84 UCHAR DataFirst;
87} CMDHandler_TLV, *PCMDHandler_TLV; 85} CMDHandler_TLV, *PCMDHandler_TLV;
88 86
89 87typedef struct _CmdQElmt {
90typedef struct _CmdQElmt { 88 UINT command;
91 UINT command; 89 PVOID buffer;
92 PVOID buffer; 90 ULONG bufferlength;
93 ULONG bufferlength; 91 BOOLEAN CmdFromNdis;
94 BOOLEAN CmdFromNdis; 92 BOOLEAN SetOperation;
95 BOOLEAN SetOperation; 93 struct _CmdQElmt *next;
96 struct _CmdQElmt *next; 94} CmdQElmt, *PCmdQElmt;
97} CmdQElmt, *PCmdQElmt; 95
98 96typedef struct _CmdQ {
99typedef struct _CmdQ { 97 UINT size;
100 UINT size; 98 CmdQElmt *head;
101 CmdQElmt *head; 99 CmdQElmt *tail;
102 CmdQElmt *tail; 100 UINT32 CmdQState;
103 UINT32 CmdQState; 101} CmdQ, *PCmdQ;
104}CmdQ, *PCmdQ;
105
106 102
107#define EnqueueCmd(cmdq, cmdqelmt) \ 103#define EnqueueCmd(cmdq, cmdqelmt) \
108{ \ 104{ \
@@ -115,7 +111,6 @@ typedef struct _CmdQ {
115 cmdq->size++; \ 111 cmdq->size++; \
116} 112}
117 113
118
119/****************************************************************************** 114/******************************************************************************
120 115
121 USB Cmd to ASIC Related MACRO 116 USB Cmd to ASIC Related MACRO
@@ -185,5 +180,4 @@ typedef struct _CmdQ {
185 RTUSBEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); \ 180 RTUSBEnqueueInternalCmd((_pAd), CMDTHREAD_SET_ASIC_WCID, &SetAsicWcid, sizeof(RT_SET_ASIC_WCID)); \
186 }while(0) 181 }while(0)
187 182
188
189#endif // __RTUSB_IO_H__ // 183#endif // __RTUSB_IO_H__ //
diff --git a/drivers/staging/rt2860/spectrum.h b/drivers/staging/rt2860/spectrum.h
index b9fc6760338..64154e9fb6f 100644
--- a/drivers/staging/rt2860/spectrum.h
+++ b/drivers/staging/rt2860/spectrum.h
@@ -31,10 +31,7 @@
31#include "rtmp_type.h" 31#include "rtmp_type.h"
32#include "spectrum_def.h" 32#include "spectrum_def.h"
33 33
34 34CHAR RTMP_GetTxPwr(IN PRTMP_ADAPTER pAd, IN HTTRANSMIT_SETTING HTTxMode);
35CHAR RTMP_GetTxPwr(
36 IN PRTMP_ADAPTER pAd,
37 IN HTTRANSMIT_SETTING HTTxMode);
38 35
39/* 36/*
40 ========================================================================== 37 ==========================================================================
@@ -48,17 +45,16 @@ CHAR RTMP_GetTxPwr(
48 Return : None. 45 Return : None.
49 ========================================================================== 46 ==========================================================================
50 */ 47 */
51VOID MakeMeasurementReqFrame( 48VOID MakeMeasurementReqFrame(IN PRTMP_ADAPTER pAd,
52 IN PRTMP_ADAPTER pAd, 49 OUT PUCHAR pOutBuffer,
53 OUT PUCHAR pOutBuffer, 50 OUT PULONG pFrameLen,
54 OUT PULONG pFrameLen, 51 IN UINT8 TotalLen,
55 IN UINT8 TotalLen, 52 IN UINT8 Category,
56 IN UINT8 Category, 53 IN UINT8 Action,
57 IN UINT8 Action, 54 IN UINT8 MeasureToken,
58 IN UINT8 MeasureToken, 55 IN UINT8 MeasureReqMode,
59 IN UINT8 MeasureReqMode, 56 IN UINT8 MeasureReqType,
60 IN UINT8 MeasureReqType, 57 IN UINT8 NumOfRepetitions);
61 IN UINT8 NumOfRepetitions);
62 58
63/* 59/*
64 ========================================================================== 60 ==========================================================================
@@ -72,15 +68,13 @@ VOID MakeMeasurementReqFrame(
72 Return : None. 68 Return : None.
73 ========================================================================== 69 ==========================================================================
74 */ 70 */
75VOID EnqueueMeasurementRep( 71VOID EnqueueMeasurementRep(IN PRTMP_ADAPTER pAd,
76 IN PRTMP_ADAPTER pAd, 72 IN PUCHAR pDA,
77 IN PUCHAR pDA, 73 IN UINT8 DialogToken,
78 IN UINT8 DialogToken, 74 IN UINT8 MeasureToken,
79 IN UINT8 MeasureToken, 75 IN UINT8 MeasureReqMode,
80 IN UINT8 MeasureReqMode, 76 IN UINT8 MeasureReqType,
81 IN UINT8 MeasureReqType, 77 IN UINT8 ReportInfoLen, IN PUINT8 pReportInfo);
82 IN UINT8 ReportInfoLen,
83 IN PUINT8 pReportInfo);
84 78
85/* 79/*
86 ========================================================================== 80 ==========================================================================
@@ -94,10 +88,7 @@ VOID EnqueueMeasurementRep(
94 Return : None. 88 Return : None.
95 ========================================================================== 89 ==========================================================================
96 */ 90 */
97VOID EnqueueTPCReq( 91VOID EnqueueTPCReq(IN PRTMP_ADAPTER pAd, IN PUCHAR pDA, IN UCHAR DialogToken);
98 IN PRTMP_ADAPTER pAd,
99 IN PUCHAR pDA,
100 IN UCHAR DialogToken);
101 92
102/* 93/*
103 ========================================================================== 94 ==========================================================================
@@ -111,12 +102,9 @@ VOID EnqueueTPCReq(
111 Return : None. 102 Return : None.
112 ========================================================================== 103 ==========================================================================
113 */ 104 */
114VOID EnqueueTPCRep( 105VOID EnqueueTPCRep(IN PRTMP_ADAPTER pAd,
115 IN PRTMP_ADAPTER pAd, 106 IN PUCHAR pDA,
116 IN PUCHAR pDA, 107 IN UINT8 DialogToken, IN UINT8 TxPwr, IN UINT8 LinkMargin);
117 IN UINT8 DialogToken,
118 IN UINT8 TxPwr,
119 IN UINT8 LinkMargin);
120 108
121/* 109/*
122 ========================================================================== 110 ==========================================================================
@@ -132,11 +120,8 @@ VOID EnqueueTPCRep(
132 Return : None. 120 Return : None.
133 ========================================================================== 121 ==========================================================================
134 */ 122 */
135VOID EnqueueChSwAnn( 123VOID EnqueueChSwAnn(IN PRTMP_ADAPTER pAd,
136 IN PRTMP_ADAPTER pAd, 124 IN PUCHAR pDA, IN UINT8 ChSwMode, IN UINT8 NewCh);
137 IN PUCHAR pDA,
138 IN UINT8 ChSwMode,
139 IN UINT8 NewCh);
140 125
141/* 126/*
142 ========================================================================== 127 ==========================================================================
@@ -150,9 +135,7 @@ VOID EnqueueChSwAnn(
150 Return : None. 135 Return : None.
151 ========================================================================== 136 ==========================================================================
152 */ 137 */
153VOID PeerSpectrumAction( 138VOID PeerSpectrumAction(IN PRTMP_ADAPTER pAd, IN MLME_QUEUE_ELEM * Elem);
154 IN PRTMP_ADAPTER pAd,
155 IN MLME_QUEUE_ELEM *Elem);
156 139
157/* 140/*
158 ========================================================================== 141 ==========================================================================
@@ -163,73 +146,44 @@ VOID PeerSpectrumAction(
163 Return : None. 146 Return : None.
164 ========================================================================== 147 ==========================================================================
165 */ 148 */
166INT Set_MeasureReq_Proc( 149INT Set_MeasureReq_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
167 IN PRTMP_ADAPTER pAd, 150
168 IN PSTRING arg); 151INT Set_TpcReq_Proc(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
169 152
170INT Set_TpcReq_Proc( 153INT Set_PwrConstraint(IN PRTMP_ADAPTER pAd, IN PSTRING arg);
171 IN PRTMP_ADAPTER pAd, 154
172 IN PSTRING arg); 155VOID MeasureReqTabInit(IN PRTMP_ADAPTER pAd);
173 156
174INT Set_PwrConstraint( 157VOID MeasureReqTabExit(IN PRTMP_ADAPTER pAd);
175 IN PRTMP_ADAPTER pAd, 158
176 IN PSTRING arg); 159PMEASURE_REQ_ENTRY MeasureReqLookUp(IN PRTMP_ADAPTER pAd, IN UINT8 DialogToken);
177 160
178 161PMEASURE_REQ_ENTRY MeasureReqInsert(IN PRTMP_ADAPTER pAd, IN UINT8 DialogToken);
179VOID MeasureReqTabInit(
180 IN PRTMP_ADAPTER pAd);
181
182VOID MeasureReqTabExit(
183 IN PRTMP_ADAPTER pAd);
184
185PMEASURE_REQ_ENTRY MeasureReqLookUp(
186 IN PRTMP_ADAPTER pAd,
187 IN UINT8 DialogToken);
188
189PMEASURE_REQ_ENTRY MeasureReqInsert(
190 IN PRTMP_ADAPTER pAd,
191 IN UINT8 DialogToken);
192
193VOID MeasureReqDelete(
194 IN PRTMP_ADAPTER pAd,
195 IN UINT8 DialogToken);
196
197VOID InsertChannelRepIE(
198 IN PRTMP_ADAPTER pAd,
199 OUT PUCHAR pFrameBuf,
200 OUT PULONG pFrameLen,
201 IN PSTRING pCountry,
202 IN UINT8 RegulatoryClass);
203
204VOID InsertTpcReportIE(
205 IN PRTMP_ADAPTER pAd,
206 OUT PUCHAR pFrameBuf,
207 OUT PULONG pFrameLen,
208 IN UINT8 TxPwr,
209 IN UINT8 LinkMargin);
210
211VOID InsertDialogToken(
212 IN PRTMP_ADAPTER pAd,
213 OUT PUCHAR pFrameBuf,
214 OUT PULONG pFrameLen,
215 IN UINT8 DialogToken);
216
217VOID TpcReqTabInit(
218 IN PRTMP_ADAPTER pAd);
219
220VOID TpcReqTabExit(
221 IN PRTMP_ADAPTER pAd);
222
223VOID NotifyChSwAnnToPeerAPs(
224 IN PRTMP_ADAPTER pAd,
225 IN PUCHAR pRA,
226 IN PUCHAR pTA,
227 IN UINT8 ChSwMode,
228 IN UINT8 Channel);
229
230VOID RguClass_BuildBcnChList(
231 IN PRTMP_ADAPTER pAd,
232 OUT PUCHAR pBuf,
233 OUT PULONG pBufLen);
234#endif // __SPECTRUM_H__ //
235 162
163VOID MeasureReqDelete(IN PRTMP_ADAPTER pAd, IN UINT8 DialogToken);
164
165VOID InsertChannelRepIE(IN PRTMP_ADAPTER pAd,
166 OUT PUCHAR pFrameBuf,
167 OUT PULONG pFrameLen,
168 IN PSTRING pCountry, IN UINT8 RegulatoryClass);
169
170VOID InsertTpcReportIE(IN PRTMP_ADAPTER pAd,
171 OUT PUCHAR pFrameBuf,
172 OUT PULONG pFrameLen,
173 IN UINT8 TxPwr, IN UINT8 LinkMargin);
174
175VOID InsertDialogToken(IN PRTMP_ADAPTER pAd,
176 OUT PUCHAR pFrameBuf,
177 OUT PULONG pFrameLen, IN UINT8 DialogToken);
178
179VOID TpcReqTabInit(IN PRTMP_ADAPTER pAd);
180
181VOID TpcReqTabExit(IN PRTMP_ADAPTER pAd);
182
183VOID NotifyChSwAnnToPeerAPs(IN PRTMP_ADAPTER pAd,
184 IN PUCHAR pRA,
185 IN PUCHAR pTA, IN UINT8 ChSwMode, IN UINT8 Channel);
186
187VOID RguClass_BuildBcnChList(IN PRTMP_ADAPTER pAd,
188 OUT PUCHAR pBuf, OUT PULONG pBufLen);
189#endif // __SPECTRUM_H__ //
diff --git a/drivers/staging/rt2860/spectrum_def.h b/drivers/staging/rt2860/spectrum_def.h
index ae67014a470..4ebe5f50cc2 100644
--- a/drivers/staging/rt2860/spectrum_def.h
+++ b/drivers/staging/rt2860/spectrum_def.h
@@ -39,69 +39,59 @@
39#ifndef __SPECTRUM_DEF_H__ 39#ifndef __SPECTRUM_DEF_H__
40#define __SPECTRUM_DEF_H__ 40#define __SPECTRUM_DEF_H__
41 41
42
43#define MAX_MEASURE_REQ_TAB_SIZE 32 42#define MAX_MEASURE_REQ_TAB_SIZE 32
44#define MAX_HASH_MEASURE_REQ_TAB_SIZE MAX_MEASURE_REQ_TAB_SIZE 43#define MAX_HASH_MEASURE_REQ_TAB_SIZE MAX_MEASURE_REQ_TAB_SIZE
45 44
46#define MAX_TPC_REQ_TAB_SIZE 32 45#define MAX_TPC_REQ_TAB_SIZE 32
47#define MAX_HASH_TPC_REQ_TAB_SIZE MAX_TPC_REQ_TAB_SIZE 46#define MAX_HASH_TPC_REQ_TAB_SIZE MAX_TPC_REQ_TAB_SIZE
48 47
49#define MIN_RCV_PWR 100 /* Negative value ((dBm) */ 48#define MIN_RCV_PWR 100 /* Negative value ((dBm) */
50 49
51#define TPC_REQ_AGE_OUT 500 /* ms */ 50#define TPC_REQ_AGE_OUT 500 /* ms */
52#define MQ_REQ_AGE_OUT 500 /* ms */ 51#define MQ_REQ_AGE_OUT 500 /* ms */
53 52
54#define TPC_DIALOGTOKEN_HASH_INDEX(_DialogToken) ((_DialogToken) % MAX_HASH_TPC_REQ_TAB_SIZE) 53#define TPC_DIALOGTOKEN_HASH_INDEX(_DialogToken) ((_DialogToken) % MAX_HASH_TPC_REQ_TAB_SIZE)
55#define MQ_DIALOGTOKEN_HASH_INDEX(_DialogToken) ((_DialogToken) % MAX_MEASURE_REQ_TAB_SIZE) 54#define MQ_DIALOGTOKEN_HASH_INDEX(_DialogToken) ((_DialogToken) % MAX_MEASURE_REQ_TAB_SIZE)
56 55
57typedef struct _MEASURE_REQ_ENTRY 56typedef struct _MEASURE_REQ_ENTRY {
58{
59 struct _MEASURE_REQ_ENTRY *pNext; 57 struct _MEASURE_REQ_ENTRY *pNext;
60 ULONG lastTime; 58 ULONG lastTime;
61 BOOLEAN Valid; 59 BOOLEAN Valid;
62 UINT8 DialogToken; 60 UINT8 DialogToken;
63 UINT8 MeasureDialogToken[3]; // 0:basic measure, 1: CCA measure, 2: RPI_Histogram measure. 61 UINT8 MeasureDialogToken[3]; // 0:basic measure, 1: CCA measure, 2: RPI_Histogram measure.
64} MEASURE_REQ_ENTRY, *PMEASURE_REQ_ENTRY; 62} MEASURE_REQ_ENTRY, *PMEASURE_REQ_ENTRY;
65 63
66typedef struct _MEASURE_REQ_TAB 64typedef struct _MEASURE_REQ_TAB {
67{
68 UCHAR Size; 65 UCHAR Size;
69 PMEASURE_REQ_ENTRY Hash[MAX_HASH_MEASURE_REQ_TAB_SIZE]; 66 PMEASURE_REQ_ENTRY Hash[MAX_HASH_MEASURE_REQ_TAB_SIZE];
70 MEASURE_REQ_ENTRY Content[MAX_MEASURE_REQ_TAB_SIZE]; 67 MEASURE_REQ_ENTRY Content[MAX_MEASURE_REQ_TAB_SIZE];
71} MEASURE_REQ_TAB, *PMEASURE_REQ_TAB; 68} MEASURE_REQ_TAB, *PMEASURE_REQ_TAB;
72 69
73typedef struct _TPC_REQ_ENTRY 70typedef struct _TPC_REQ_ENTRY {
74{
75 struct _TPC_REQ_ENTRY *pNext; 71 struct _TPC_REQ_ENTRY *pNext;
76 ULONG lastTime; 72 ULONG lastTime;
77 BOOLEAN Valid; 73 BOOLEAN Valid;
78 UINT8 DialogToken; 74 UINT8 DialogToken;
79} TPC_REQ_ENTRY, *PTPC_REQ_ENTRY; 75} TPC_REQ_ENTRY, *PTPC_REQ_ENTRY;
80 76
81typedef struct _TPC_REQ_TAB 77typedef struct _TPC_REQ_TAB {
82{
83 UCHAR Size; 78 UCHAR Size;
84 PTPC_REQ_ENTRY Hash[MAX_HASH_TPC_REQ_TAB_SIZE]; 79 PTPC_REQ_ENTRY Hash[MAX_HASH_TPC_REQ_TAB_SIZE];
85 TPC_REQ_ENTRY Content[MAX_TPC_REQ_TAB_SIZE]; 80 TPC_REQ_ENTRY Content[MAX_TPC_REQ_TAB_SIZE];
86} TPC_REQ_TAB, *PTPC_REQ_TAB; 81} TPC_REQ_TAB, *PTPC_REQ_TAB;
87 82
88
89/* The regulatory information */ 83/* The regulatory information */
90typedef struct _DOT11_CHANNEL_SET 84typedef struct _DOT11_CHANNEL_SET {
91{
92 UCHAR NumberOfChannels; 85 UCHAR NumberOfChannels;
93 UINT8 MaxTxPwr; 86 UINT8 MaxTxPwr;
94 UCHAR ChannelList[16]; 87 UCHAR ChannelList[16];
95} DOT11_CHANNEL_SET, *PDOT11_CHANNEL_SET; 88} DOT11_CHANNEL_SET, *PDOT11_CHANNEL_SET;
96 89
97typedef struct _DOT11_REGULATORY_INFORMATION 90typedef struct _DOT11_REGULATORY_INFORMATION {
98{
99 UCHAR RegulatoryClass; 91 UCHAR RegulatoryClass;
100 DOT11_CHANNEL_SET ChannelSet; 92 DOT11_CHANNEL_SET ChannelSet;
101} DOT11_REGULATORY_INFORMATION, *PDOT11_REGULATORY_INFORMATION; 93} DOT11_REGULATORY_INFORMATION, *PDOT11_REGULATORY_INFORMATION;
102 94
103
104
105#define RM_TPC_REQ 0 95#define RM_TPC_REQ 0
106#define RM_MEASURE_REQ 1 96#define RM_MEASURE_REQ 1
107 97
@@ -111,53 +101,44 @@ typedef struct _DOT11_REGULATORY_INFORMATION
111#define RM_CH_LOAD 3 101#define RM_CH_LOAD 3
112#define RM_NOISE_HISTOGRAM 4 102#define RM_NOISE_HISTOGRAM 4
113 103
114 104typedef struct PACKED _TPC_REPORT_INFO {
115typedef struct PACKED _TPC_REPORT_INFO
116{
117 UINT8 TxPwr; 105 UINT8 TxPwr;
118 UINT8 LinkMargin; 106 UINT8 LinkMargin;
119} TPC_REPORT_INFO, *PTPC_REPORT_INFO; 107} TPC_REPORT_INFO, *PTPC_REPORT_INFO;
120 108
121typedef struct PACKED _CH_SW_ANN_INFO 109typedef struct PACKED _CH_SW_ANN_INFO {
122{
123 UINT8 ChSwMode; 110 UINT8 ChSwMode;
124 UINT8 Channel; 111 UINT8 Channel;
125 UINT8 ChSwCnt; 112 UINT8 ChSwCnt;
126} CH_SW_ANN_INFO, *PCH_SW_ANN_INFO; 113} CH_SW_ANN_INFO, *PCH_SW_ANN_INFO;
127 114
128typedef union PACKED _MEASURE_REQ_MODE 115typedef union PACKED _MEASURE_REQ_MODE {
129{ 116 struct PACKED {
130 struct PACKED
131 {
132 UINT8 Parallel:1; 117 UINT8 Parallel:1;
133 UINT8 Enable:1; 118 UINT8 Enable:1;
134 UINT8 Request:1; 119 UINT8 Request:1;
135 UINT8 Report:1; 120 UINT8 Report:1;
136 UINT8 DurationMandatory:1; 121 UINT8 DurationMandatory:1;
137 UINT8 :3; 122 UINT8:3;
138 } field; 123 } field;
139 UINT8 word; 124 UINT8 word;
140} MEASURE_REQ_MODE, *PMEASURE_REQ_MODE; 125} MEASURE_REQ_MODE, *PMEASURE_REQ_MODE;
141 126
142typedef struct PACKED _MEASURE_REQ 127typedef struct PACKED _MEASURE_REQ {
143{
144 UINT8 ChNum; 128 UINT8 ChNum;
145 UINT64 MeasureStartTime; 129 UINT64 MeasureStartTime;
146 UINT16 MeasureDuration; 130 UINT16 MeasureDuration;
147} MEASURE_REQ, *PMEASURE_REQ; 131} MEASURE_REQ, *PMEASURE_REQ;
148 132
149typedef struct PACKED _MEASURE_REQ_INFO 133typedef struct PACKED _MEASURE_REQ_INFO {
150{
151 UINT8 Token; 134 UINT8 Token;
152 MEASURE_REQ_MODE ReqMode; 135 MEASURE_REQ_MODE ReqMode;
153 UINT8 ReqType; 136 UINT8 ReqType;
154 UINT8 Oct[0]; 137 UINT8 Oct[0];
155} MEASURE_REQ_INFO, *PMEASURE_REQ_INFO; 138} MEASURE_REQ_INFO, *PMEASURE_REQ_INFO;
156 139
157typedef union PACKED _MEASURE_BASIC_REPORT_MAP 140typedef union PACKED _MEASURE_BASIC_REPORT_MAP {
158{ 141 struct PACKED {
159 struct PACKED
160 {
161 UINT8 BSS:1; 142 UINT8 BSS:1;
162 143
163 UINT8 OfdmPreamble:1; 144 UINT8 OfdmPreamble:1;
@@ -169,34 +150,29 @@ typedef union PACKED _MEASURE_BASIC_REPORT_MAP
169 UINT8 word; 150 UINT8 word;
170} MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP; 151} MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP;
171 152
172typedef struct PACKED _MEASURE_BASIC_REPORT 153typedef struct PACKED _MEASURE_BASIC_REPORT {
173{
174 UINT8 ChNum; 154 UINT8 ChNum;
175 UINT64 MeasureStartTime; 155 UINT64 MeasureStartTime;
176 UINT16 MeasureDuration; 156 UINT16 MeasureDuration;
177 MEASURE_BASIC_REPORT_MAP Map; 157 MEASURE_BASIC_REPORT_MAP Map;
178} MEASURE_BASIC_REPORT, *PMEASURE_BASIC_REPORT; 158} MEASURE_BASIC_REPORT, *PMEASURE_BASIC_REPORT;
179 159
180typedef struct PACKED _MEASURE_CCA_REPORT 160typedef struct PACKED _MEASURE_CCA_REPORT {
181{
182 UINT8 ChNum; 161 UINT8 ChNum;
183 UINT64 MeasureStartTime; 162 UINT64 MeasureStartTime;
184 UINT16 MeasureDuration; 163 UINT16 MeasureDuration;
185 UINT8 CCA_Busy_Fraction; 164 UINT8 CCA_Busy_Fraction;
186} MEASURE_CCA_REPORT, *PMEASURE_CCA_REPORT; 165} MEASURE_CCA_REPORT, *PMEASURE_CCA_REPORT;
187 166
188typedef struct PACKED _MEASURE_RPI_REPORT 167typedef struct PACKED _MEASURE_RPI_REPORT {
189{
190 UINT8 ChNum; 168 UINT8 ChNum;
191 UINT64 MeasureStartTime; 169 UINT64 MeasureStartTime;
192 UINT16 MeasureDuration; 170 UINT16 MeasureDuration;
193 UINT8 RPI_Density[8]; 171 UINT8 RPI_Density[8];
194} MEASURE_RPI_REPORT, *PMEASURE_RPI_REPORT; 172} MEASURE_RPI_REPORT, *PMEASURE_RPI_REPORT;
195 173
196typedef union PACKED _MEASURE_REPORT_MODE 174typedef union PACKED _MEASURE_REPORT_MODE {
197{ 175 struct PACKED {
198 struct PACKED
199 {
200 UINT8 Late:1; 176 UINT8 Late:1;
201 UINT8 Incapable:1; 177 UINT8 Incapable:1;
202 UINT8 Refused:1; 178 UINT8 Refused:1;
@@ -205,16 +181,14 @@ typedef union PACKED _MEASURE_REPORT_MODE
205 UINT8 word; 181 UINT8 word;
206} MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE; 182} MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE;
207 183
208typedef struct PACKED _MEASURE_REPORT_INFO 184typedef struct PACKED _MEASURE_REPORT_INFO {
209{
210 UINT8 Token; 185 UINT8 Token;
211 UINT8 ReportMode; 186 UINT8 ReportMode;
212 UINT8 ReportType; 187 UINT8 ReportType;
213 UINT8 Octect[0]; 188 UINT8 Octect[0];
214} MEASURE_REPORT_INFO, *PMEASURE_REPORT_INFO; 189} MEASURE_REPORT_INFO, *PMEASURE_REPORT_INFO;
215 190
216typedef struct PACKED _QUIET_INFO 191typedef struct PACKED _QUIET_INFO {
217{
218 UINT8 QuietCnt; 192 UINT8 QuietCnt;
219 UINT8 QuietPeriod; 193 UINT8 QuietPeriod;
220 UINT16 QuietDuration; 194 UINT16 QuietDuration;
@@ -222,4 +196,3 @@ typedef struct PACKED _QUIET_INFO
222} QUIET_INFO, *PQUIET_INFO; 196} QUIET_INFO, *PQUIET_INFO;
223 197
224#endif // __SPECTRUM_DEF_H__ // 198#endif // __SPECTRUM_DEF_H__ //
225
diff --git a/drivers/staging/rt2860/wpa.h b/drivers/staging/rt2860/wpa.h
index 27e5aab8285..fb5843cd262 100644
--- a/drivers/staging/rt2860/wpa.h
+++ b/drivers/staging/rt2860/wpa.h
@@ -126,12 +126,12 @@
126 126
127//#ifdef CONFIG_AP_SUPPORT 127//#ifdef CONFIG_AP_SUPPORT
128// WPA mechanism retry timer interval 128// WPA mechanism retry timer interval
129#define PEER_MSG1_RETRY_EXEC_INTV 1000 // 1 sec 129#define PEER_MSG1_RETRY_EXEC_INTV 1000 // 1 sec
130#define PEER_MSG3_RETRY_EXEC_INTV 3000 // 3 sec 130#define PEER_MSG3_RETRY_EXEC_INTV 3000 // 3 sec
131#define GROUP_KEY_UPDATE_EXEC_INTV 1000 // 1 sec 131#define GROUP_KEY_UPDATE_EXEC_INTV 1000 // 1 sec
132#define PEER_GROUP_KEY_UPDATE_INIV 2000 // 2 sec 132#define PEER_GROUP_KEY_UPDATE_INIV 2000 // 2 sec
133 133
134#define ENQUEUE_EAPOL_START_TIMER 200 // 200 ms 134#define ENQUEUE_EAPOL_START_TIMER 200 // 200 ms
135 135
136// group rekey interval 136// group rekey interval
137#define TIME_REKEY 0 137#define TIME_REKEY 0
@@ -147,7 +147,6 @@
147#define AKM_SUITE 2 147#define AKM_SUITE 2
148#define PMKID_LIST 3 148#define PMKID_LIST 3
149 149
150
151#define EAPOL_START_DISABLE 0 150#define EAPOL_START_DISABLE 0
152#define EAPOL_START_PSK 1 151#define EAPOL_START_PSK 1
153#define EAPOL_START_1X 2 152#define EAPOL_START_1X 2
@@ -181,7 +180,6 @@
181 180
182#define CONV_ARRARY_TO_UINT16(_V) ((_V[0]<<8) | (_V[1])) 181#define CONV_ARRARY_TO_UINT16(_V) ((_V[0]<<8) | (_V[1]))
183 182
184
185#define ADD_ONE_To_64BIT_VAR(_V) \ 183#define ADD_ONE_To_64BIT_VAR(_V) \
186{ \ 184{ \
187 UCHAR cnt = LEN_KEY_DESC_REPLAY; \ 185 UCHAR cnt = LEN_KEY_DESC_REPLAY; \
@@ -197,224 +195,199 @@
197#define IS_WPA_CAPABILITY(a) (((a) >= Ndis802_11AuthModeWPA) && ((a) <= Ndis802_11AuthModeWPA1PSKWPA2PSK)) 195#define IS_WPA_CAPABILITY(a) (((a) >= Ndis802_11AuthModeWPA) && ((a) <= Ndis802_11AuthModeWPA1PSKWPA2PSK))
198 196
199// EAPOL Key Information definition within Key descriptor format 197// EAPOL Key Information definition within Key descriptor format
200typedef struct PACKED _KEY_INFO 198typedef struct PACKED _KEY_INFO {
201{ 199 UCHAR KeyMic:1;
202 UCHAR KeyMic:1; 200 UCHAR Secure:1;
203 UCHAR Secure:1; 201 UCHAR Error:1;
204 UCHAR Error:1; 202 UCHAR Request:1;
205 UCHAR Request:1; 203 UCHAR EKD_DL:1; // EKD for AP; DL for STA
206 UCHAR EKD_DL:1; // EKD for AP; DL for STA 204 UCHAR Rsvd:3;
207 UCHAR Rsvd:3; 205 UCHAR KeyDescVer:3;
208 UCHAR KeyDescVer:3; 206 UCHAR KeyType:1;
209 UCHAR KeyType:1; 207 UCHAR KeyIndex:2;
210 UCHAR KeyIndex:2; 208 UCHAR Install:1;
211 UCHAR Install:1; 209 UCHAR KeyAck:1;
212 UCHAR KeyAck:1; 210} KEY_INFO, *PKEY_INFO;
213} KEY_INFO, *PKEY_INFO;
214 211
215// EAPOL Key descriptor format 212// EAPOL Key descriptor format
216typedef struct PACKED _KEY_DESCRIPTER 213typedef struct PACKED _KEY_DESCRIPTER {
217{ 214 UCHAR Type;
218 UCHAR Type; 215 KEY_INFO KeyInfo;
219 KEY_INFO KeyInfo; 216 UCHAR KeyLength[2];
220 UCHAR KeyLength[2]; 217 UCHAR ReplayCounter[LEN_KEY_DESC_REPLAY];
221 UCHAR ReplayCounter[LEN_KEY_DESC_REPLAY]; 218 UCHAR KeyNonce[LEN_KEY_DESC_NONCE];
222 UCHAR KeyNonce[LEN_KEY_DESC_NONCE]; 219 UCHAR KeyIv[LEN_KEY_DESC_IV];
223 UCHAR KeyIv[LEN_KEY_DESC_IV]; 220 UCHAR KeyRsc[LEN_KEY_DESC_RSC];
224 UCHAR KeyRsc[LEN_KEY_DESC_RSC]; 221 UCHAR KeyId[LEN_KEY_DESC_ID];
225 UCHAR KeyId[LEN_KEY_DESC_ID]; 222 UCHAR KeyMic[LEN_KEY_DESC_MIC];
226 UCHAR KeyMic[LEN_KEY_DESC_MIC]; 223 UCHAR KeyDataLen[2];
227 UCHAR KeyDataLen[2]; 224 UCHAR KeyData[MAX_LEN_OF_RSNIE];
228 UCHAR KeyData[MAX_LEN_OF_RSNIE]; 225} KEY_DESCRIPTER, *PKEY_DESCRIPTER;
229} KEY_DESCRIPTER, *PKEY_DESCRIPTER; 226
230 227typedef struct PACKED _EAPOL_PACKET {
231typedef struct PACKED _EAPOL_PACKET 228 UCHAR ProVer;
232{ 229 UCHAR ProType;
233 UCHAR ProVer; 230 UCHAR Body_Len[2];
234 UCHAR ProType; 231 KEY_DESCRIPTER KeyDesc;
235 UCHAR Body_Len[2]; 232} EAPOL_PACKET, *PEAPOL_PACKET;
236 KEY_DESCRIPTER KeyDesc;
237} EAPOL_PACKET, *PEAPOL_PACKET;
238 233
239//802.11i D10 page 83 234//802.11i D10 page 83
240typedef struct PACKED _GTK_ENCAP 235typedef struct PACKED _GTK_ENCAP {
241{ 236 UCHAR Kid:2;
242 UCHAR Kid:2; 237 UCHAR tx:1;
243 UCHAR tx:1; 238 UCHAR rsv:5;
244 UCHAR rsv:5; 239 UCHAR rsv1;
245 UCHAR rsv1; 240 UCHAR GTK[TKIP_GTK_LENGTH];
246 UCHAR GTK[TKIP_GTK_LENGTH]; 241} GTK_ENCAP, *PGTK_ENCAP;
247} GTK_ENCAP, *PGTK_ENCAP; 242
248 243typedef struct PACKED _KDE_ENCAP {
249typedef struct PACKED _KDE_ENCAP 244 UCHAR Type;
250{ 245 UCHAR Len;
251 UCHAR Type; 246 UCHAR OUI[3];
252 UCHAR Len; 247 UCHAR DataType;
253 UCHAR OUI[3]; 248 GTK_ENCAP GTKEncap;
254 UCHAR DataType; 249} KDE_ENCAP, *PKDE_ENCAP;
255 GTK_ENCAP GTKEncap;
256} KDE_ENCAP, *PKDE_ENCAP;
257 250
258// For WPA1 251// For WPA1
259typedef struct PACKED _RSNIE { 252typedef struct PACKED _RSNIE {
260 UCHAR oui[4]; 253 UCHAR oui[4];
261 USHORT version; 254 USHORT version;
262 UCHAR mcast[4]; 255 UCHAR mcast[4];
263 USHORT ucount; 256 USHORT ucount;
264 struct PACKED { 257 struct PACKED {
265 UCHAR oui[4]; 258 UCHAR oui[4];
266 }ucast[1]; 259 } ucast[1];
267} RSNIE, *PRSNIE; 260} RSNIE, *PRSNIE;
268 261
269// For WPA2 262// For WPA2
270typedef struct PACKED _RSNIE2 { 263typedef struct PACKED _RSNIE2 {
271 USHORT version; 264 USHORT version;
272 UCHAR mcast[4]; 265 UCHAR mcast[4];
273 USHORT ucount; 266 USHORT ucount;
274 struct PACKED { 267 struct PACKED {
275 UCHAR oui[4]; 268 UCHAR oui[4];
276 }ucast[1]; 269 } ucast[1];
277} RSNIE2, *PRSNIE2; 270} RSNIE2, *PRSNIE2;
278 271
279// AKM Suite 272// AKM Suite
280typedef struct PACKED _RSNIE_AUTH { 273typedef struct PACKED _RSNIE_AUTH {
281 USHORT acount; 274 USHORT acount;
282 struct PACKED { 275 struct PACKED {
283 UCHAR oui[4]; 276 UCHAR oui[4];
284 }auth[1]; 277 } auth[1];
285} RSNIE_AUTH,*PRSNIE_AUTH; 278} RSNIE_AUTH, *PRSNIE_AUTH;
286 279
287typedef union PACKED _RSN_CAPABILITIES { 280typedef union PACKED _RSN_CAPABILITIES {
288 struct PACKED { 281 struct PACKED {
289 USHORT PreAuth:1; 282 USHORT PreAuth:1;
290 USHORT No_Pairwise:1; 283 USHORT No_Pairwise:1;
291 USHORT PTKSA_R_Counter:2; 284 USHORT PTKSA_R_Counter:2;
292 USHORT GTKSA_R_Counter:2; 285 USHORT GTKSA_R_Counter:2;
293 USHORT Rsvd:10; 286 USHORT Rsvd:10;
294 } field; 287 } field;
295 USHORT word; 288 USHORT word;
296} RSN_CAPABILITIES, *PRSN_CAPABILITIES; 289} RSN_CAPABILITIES, *PRSN_CAPABILITIES;
297 290
298typedef struct PACKED _EAP_HDR { 291typedef struct PACKED _EAP_HDR {
299 UCHAR ProVer; 292 UCHAR ProVer;
300 UCHAR ProType; 293 UCHAR ProType;
301 UCHAR Body_Len[2]; 294 UCHAR Body_Len[2];
302 UCHAR code; 295 UCHAR code;
303 UCHAR identifier; 296 UCHAR identifier;
304 UCHAR length[2]; // including code and identifier, followed by length-2 octets of data 297 UCHAR length[2]; // including code and identifier, followed by length-2 octets of data
305} EAP_HDR, *PEAP_HDR; 298} EAP_HDR, *PEAP_HDR;
306 299
307// For supplicant state machine states. 802.11i Draft 4.1, p. 97 300// For supplicant state machine states. 802.11i Draft 4.1, p. 97
308// We simplified it 301// We simplified it
309typedef enum _WpaState 302typedef enum _WpaState {
310{ 303 SS_NOTUSE, // 0
311 SS_NOTUSE, // 0 304 SS_START, // 1
312 SS_START, // 1 305 SS_WAIT_MSG_3, // 2
313 SS_WAIT_MSG_3, // 2 306 SS_WAIT_GROUP, // 3
314 SS_WAIT_GROUP, // 3 307 SS_FINISH, // 4
315 SS_FINISH, // 4 308 SS_KEYUPDATE, // 5
316 SS_KEYUPDATE, // 5 309} WPA_STATE;
317} WPA_STATE;
318 310
319// 311//
320// The definition of the cipher combination 312// The definition of the cipher combination
321// 313//
322// bit3 bit2 bit1 bit0 314// bit3 bit2 bit1 bit0
323// +------------+------------+ 315// +------------+------------+
324// | WPA | WPA2 | 316// | WPA | WPA2 |
325// +------+-----+------+-----+ 317// +------+-----+------+-----+
326// | TKIP | AES | TKIP | AES | 318// | TKIP | AES | TKIP | AES |
327// | 0 | 1 | 1 | 0 | -> 0x06 319// | 0 | 1 | 1 | 0 | -> 0x06
328// | 0 | 1 | 1 | 1 | -> 0x07 320// | 0 | 1 | 1 | 1 | -> 0x07
329// | 1 | 0 | 0 | 1 | -> 0x09 321// | 1 | 0 | 0 | 1 | -> 0x09
330// | 1 | 0 | 1 | 1 | -> 0x0B 322// | 1 | 0 | 1 | 1 | -> 0x0B
331// | 1 | 1 | 0 | 1 | -> 0x0D 323// | 1 | 1 | 0 | 1 | -> 0x0D
332// | 1 | 1 | 1 | 0 | -> 0x0E 324// | 1 | 1 | 1 | 0 | -> 0x0E
333// | 1 | 1 | 1 | 1 | -> 0x0F 325// | 1 | 1 | 1 | 1 | -> 0x0F
334// +------+-----+------+-----+ 326// +------+-----+------+-----+
335// 327//
336typedef enum _WpaMixPairCipher 328typedef enum _WpaMixPairCipher {
337{ 329 MIX_CIPHER_NOTUSE = 0x00,
338 MIX_CIPHER_NOTUSE = 0x00, 330 WPA_NONE_WPA2_TKIPAES = 0x03, // WPA2-TKIPAES
339 WPA_NONE_WPA2_TKIPAES = 0x03, // WPA2-TKIPAES 331 WPA_AES_WPA2_TKIP = 0x06,
340 WPA_AES_WPA2_TKIP = 0x06, 332 WPA_AES_WPA2_TKIPAES = 0x07,
341 WPA_AES_WPA2_TKIPAES = 0x07, 333 WPA_TKIP_WPA2_AES = 0x09,
342 WPA_TKIP_WPA2_AES = 0x09, 334 WPA_TKIP_WPA2_TKIPAES = 0x0B,
343 WPA_TKIP_WPA2_TKIPAES = 0x0B, 335 WPA_TKIPAES_WPA2_NONE = 0x0C, // WPA-TKIPAES
344 WPA_TKIPAES_WPA2_NONE = 0x0C, // WPA-TKIPAES 336 WPA_TKIPAES_WPA2_AES = 0x0D,
345 WPA_TKIPAES_WPA2_AES = 0x0D, 337 WPA_TKIPAES_WPA2_TKIP = 0x0E,
346 WPA_TKIPAES_WPA2_TKIP = 0x0E, 338 WPA_TKIPAES_WPA2_TKIPAES = 0x0F,
347 WPA_TKIPAES_WPA2_TKIPAES = 0x0F, 339} WPA_MIX_PAIR_CIPHER;
348} WPA_MIX_PAIR_CIPHER; 340
349 341typedef struct PACKED _RSN_IE_HEADER_STRUCT {
350typedef struct PACKED _RSN_IE_HEADER_STRUCT { 342 UCHAR Eid;
351 UCHAR Eid; 343 UCHAR Length;
352 UCHAR Length; 344 USHORT Version; // Little endian format
353 USHORT Version; // Little endian format 345} RSN_IE_HEADER_STRUCT, *PRSN_IE_HEADER_STRUCT;
354} RSN_IE_HEADER_STRUCT, *PRSN_IE_HEADER_STRUCT;
355 346
356// Cipher suite selector types 347// Cipher suite selector types
357typedef struct PACKED _CIPHER_SUITE_STRUCT { 348typedef struct PACKED _CIPHER_SUITE_STRUCT {
358 UCHAR Oui[3]; 349 UCHAR Oui[3];
359 UCHAR Type; 350 UCHAR Type;
360} CIPHER_SUITE_STRUCT, *PCIPHER_SUITE_STRUCT; 351} CIPHER_SUITE_STRUCT, *PCIPHER_SUITE_STRUCT;
361 352
362// Authentication and Key Management suite selector 353// Authentication and Key Management suite selector
363typedef struct PACKED _AKM_SUITE_STRUCT { 354typedef struct PACKED _AKM_SUITE_STRUCT {
364 UCHAR Oui[3]; 355 UCHAR Oui[3];
365 UCHAR Type; 356 UCHAR Type;
366} AKM_SUITE_STRUCT, *PAKM_SUITE_STRUCT; 357} AKM_SUITE_STRUCT, *PAKM_SUITE_STRUCT;
367 358
368// RSN capability 359// RSN capability
369typedef struct PACKED _RSN_CAPABILITY { 360typedef struct PACKED _RSN_CAPABILITY {
370 USHORT Rsv:10; 361 USHORT Rsv:10;
371 USHORT GTKSAReplayCnt:2; 362 USHORT GTKSAReplayCnt:2;
372 USHORT PTKSAReplayCnt:2; 363 USHORT PTKSAReplayCnt:2;
373 USHORT NoPairwise:1; 364 USHORT NoPairwise:1;
374 USHORT PreAuth:1; 365 USHORT PreAuth:1;
375} RSN_CAPABILITY, *PRSN_CAPABILITY; 366} RSN_CAPABILITY, *PRSN_CAPABILITY;
376
377 367
378/*======================================== 368/*========================================
379 The prototype is defined in cmm_wpa.c 369 The prototype is defined in cmm_wpa.c
380 ========================================*/ 370 ========================================*/
381BOOLEAN WpaMsgTypeSubst( 371BOOLEAN WpaMsgTypeSubst(IN UCHAR EAPType, OUT INT * MsgType);
382 IN UCHAR EAPType, 372
383 OUT INT *MsgType); 373VOID PRF(IN UCHAR * key,
384 374 IN INT key_len,
385VOID PRF( 375 IN UCHAR * prefix,
386 IN UCHAR *key, 376 IN INT prefix_len,
387 IN INT key_len, 377 IN UCHAR * data, IN INT data_len, OUT UCHAR * output, IN INT len);
388 IN UCHAR *prefix, 378
389 IN INT prefix_len, 379int PasswordHash(char *password,
390 IN UCHAR *data, 380 unsigned char *ssid, int ssidlength, unsigned char *output);
391 IN INT data_len, 381
392 OUT UCHAR *output, 382PUINT8 GetSuiteFromRSNIE(IN PUINT8 rsnie,
393 IN INT len); 383 IN UINT rsnie_len, IN UINT8 type, OUT UINT8 * count);
394 384
395int PasswordHash( 385VOID WpaShowAllsuite(IN PUINT8 rsnie, IN UINT rsnie_len);
396 char *password,
397 unsigned char *ssid,
398 int ssidlength,
399 unsigned char *output);
400
401PUINT8 GetSuiteFromRSNIE(
402 IN PUINT8 rsnie,
403 IN UINT rsnie_len,
404 IN UINT8 type,
405 OUT UINT8 *count);
406
407VOID WpaShowAllsuite(
408 IN PUINT8 rsnie,
409 IN UINT rsnie_len);
410
411VOID RTMPInsertRSNIE(
412 IN PUCHAR pFrameBuf,
413 OUT PULONG pFrameLen,
414 IN PUINT8 rsnie_ptr,
415 IN UINT8 rsnie_len,
416 IN PUINT8 pmkid_ptr,
417 IN UINT8 pmkid_len);
418 386
387VOID RTMPInsertRSNIE(IN PUCHAR pFrameBuf,
388 OUT PULONG pFrameLen,
389 IN PUINT8 rsnie_ptr,
390 IN UINT8 rsnie_len,
391 IN PUINT8 pmkid_ptr, IN UINT8 pmkid_len);
419 392
420#endif 393#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 21:25:01 -0400