diff options
Diffstat (limited to 'drivers/staging/rt2860/rtmp_dot11.h')
-rw-r--r-- | drivers/staging/rt2860/rtmp_dot11.h | 106 |
1 files changed, 52 insertions, 54 deletions
diff --git a/drivers/staging/rt2860/rtmp_dot11.h b/drivers/staging/rt2860/rtmp_dot11.h index f6887a83ea2..051840f8822 100644 --- a/drivers/staging/rt2860/rtmp_dot11.h +++ b/drivers/staging/rt2860/rtmp_dot11.h | |||
@@ -30,73 +30,71 @@ | |||
30 | 30 | ||
31 | #include "rtmp_type.h" | 31 | #include "rtmp_type.h" |
32 | 32 | ||
33 | |||
34 | // 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1. | 33 | // 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1. |
35 | typedef struct PACKED { | 34 | typedef struct PACKED { |
36 | UINT32 MA:1; //management action payload exist in (QoS Null+HTC) | 35 | UINT32 MA:1; //management action payload exist in (QoS Null+HTC) |
37 | UINT32 TRQ:1; //sounding request | 36 | UINT32 TRQ:1; //sounding request |
38 | UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback | 37 | UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback |
39 | UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110. | 38 | UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110. |
40 | UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB. | 39 | UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB. |
41 | UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available | 40 | UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available |
42 | UINT32 CalPos:2; // calibration position | 41 | UINT32 CalPos:2; // calibration position |
43 | UINT32 CalSeq:2; //calibration sequence | 42 | UINT32 CalSeq:2; //calibration sequence |
44 | UINT32 FBKReq:2; //feedback request | 43 | UINT32 FBKReq:2; //feedback request |
45 | UINT32 CSISTEERING:2; //CSI/ STEERING | 44 | UINT32 CSISTEERING:2; //CSI/ STEERING |
46 | UINT32 ZLFAnnouce:1; // ZLF announcement | 45 | UINT32 ZLFAnnouce:1; // ZLF announcement |
47 | UINT32 rsv:5; //calibration sequence | 46 | UINT32 rsv:5; //calibration sequence |
48 | UINT32 ACConstraint:1; //feedback request | 47 | UINT32 ACConstraint:1; //feedback request |
49 | UINT32 RDG:1; //RDG / More PPDU | 48 | UINT32 RDG:1; //RDG / More PPDU |
50 | } HT_CONTROL, *PHT_CONTROL; | 49 | } HT_CONTROL, *PHT_CONTROL; |
51 | 50 | ||
52 | // 2-byte QOS CONTROL field | 51 | // 2-byte QOS CONTROL field |
53 | typedef struct PACKED { | 52 | typedef struct PACKED { |
54 | USHORT TID:4; | 53 | USHORT TID:4; |
55 | USHORT EOSP:1; | 54 | USHORT EOSP:1; |
56 | USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA | 55 | USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA |
57 | USHORT AMsduPresent:1; | 56 | USHORT AMsduPresent:1; |
58 | USHORT Txop_QueueSize:8; | 57 | USHORT Txop_QueueSize:8; |
59 | } QOS_CONTROL, *PQOS_CONTROL; | 58 | } QOS_CONTROL, *PQOS_CONTROL; |
60 | 59 | ||
61 | |||
62 | // 2-byte Frame control field | 60 | // 2-byte Frame control field |
63 | typedef struct PACKED { | 61 | typedef struct PACKED { |
64 | USHORT Ver:2; // Protocol version | 62 | USHORT Ver:2; // Protocol version |
65 | USHORT Type:2; // MSDU type | 63 | USHORT Type:2; // MSDU type |
66 | USHORT SubType:4; // MSDU subtype | 64 | USHORT SubType:4; // MSDU subtype |
67 | USHORT ToDs:1; // To DS indication | 65 | USHORT ToDs:1; // To DS indication |
68 | USHORT FrDs:1; // From DS indication | 66 | USHORT FrDs:1; // From DS indication |
69 | USHORT MoreFrag:1; // More fragment bit | 67 | USHORT MoreFrag:1; // More fragment bit |
70 | USHORT Retry:1; // Retry status bit | 68 | USHORT Retry:1; // Retry status bit |
71 | USHORT PwrMgmt:1; // Power management bit | 69 | USHORT PwrMgmt:1; // Power management bit |
72 | USHORT MoreData:1; // More data bit | 70 | USHORT MoreData:1; // More data bit |
73 | USHORT Wep:1; // Wep data | 71 | USHORT Wep:1; // Wep data |
74 | USHORT Order:1; // Strict order expected | 72 | USHORT Order:1; // Strict order expected |
75 | } FRAME_CONTROL, *PFRAME_CONTROL; | 73 | } FRAME_CONTROL, *PFRAME_CONTROL; |
76 | 74 | ||
77 | typedef struct PACKED _HEADER_802_11 { | 75 | typedef struct PACKED _HEADER_802_11 { |
78 | FRAME_CONTROL FC; | 76 | FRAME_CONTROL FC; |
79 | USHORT Duration; | 77 | USHORT Duration; |
80 | UCHAR Addr1[MAC_ADDR_LEN]; | 78 | UCHAR Addr1[MAC_ADDR_LEN]; |
81 | UCHAR Addr2[MAC_ADDR_LEN]; | 79 | UCHAR Addr2[MAC_ADDR_LEN]; |
82 | UCHAR Addr3[MAC_ADDR_LEN]; | 80 | UCHAR Addr3[MAC_ADDR_LEN]; |
83 | USHORT Frag:4; | 81 | USHORT Frag:4; |
84 | USHORT Sequence:12; | 82 | USHORT Sequence:12; |
85 | UCHAR Octet[0]; | 83 | UCHAR Octet[0]; |
86 | } HEADER_802_11, *PHEADER_802_11; | 84 | } HEADER_802_11, *PHEADER_802_11; |
87 | 85 | ||
88 | typedef struct PACKED _PSPOLL_FRAME { | 86 | typedef struct PACKED _PSPOLL_FRAME { |
89 | FRAME_CONTROL FC; | 87 | FRAME_CONTROL FC; |
90 | USHORT Aid; | 88 | USHORT Aid; |
91 | UCHAR Bssid[MAC_ADDR_LEN]; | 89 | UCHAR Bssid[MAC_ADDR_LEN]; |
92 | UCHAR Ta[MAC_ADDR_LEN]; | 90 | UCHAR Ta[MAC_ADDR_LEN]; |
93 | } PSPOLL_FRAME, *PPSPOLL_FRAME; | 91 | } PSPOLL_FRAME, *PPSPOLL_FRAME; |
94 | 92 | ||
95 | typedef struct PACKED _RTS_FRAME { | 93 | typedef struct PACKED _RTS_FRAME { |
96 | FRAME_CONTROL FC; | 94 | FRAME_CONTROL FC; |
97 | USHORT Duration; | 95 | USHORT Duration; |
98 | UCHAR Addr1[MAC_ADDR_LEN]; | 96 | UCHAR Addr1[MAC_ADDR_LEN]; |
99 | UCHAR Addr2[MAC_ADDR_LEN]; | 97 | UCHAR Addr2[MAC_ADDR_LEN]; |
100 | }RTS_FRAME, *PRTS_FRAME; | 98 | } RTS_FRAME, *PRTS_FRAME; |
101 | 99 | ||
102 | #endif // __DOT11_BASE_H__ // | 100 | #endif // __DOT11_BASE_H__ // |