diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-17 16:15:55 -0500 |
commit | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch) | |
tree | a8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/mips/include/asm/mach-cavium-octeon/irq.h | |
parent | 406089d01562f1e2bf9f089fd7637009ebaad589 (diff) |
Patched in Tegra support.
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon/irq.h')
-rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/irq.h | 61 |
1 files changed, 52 insertions, 9 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h index 502bb1815ae..5b05f186e39 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/irq.h +++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h | |||
@@ -21,11 +21,14 @@ enum octeon_irq { | |||
21 | OCTEON_IRQ_TIMER, | 21 | OCTEON_IRQ_TIMER, |
22 | /* sources in CIU_INTX_EN0 */ | 22 | /* sources in CIU_INTX_EN0 */ |
23 | OCTEON_IRQ_WORKQ0, | 23 | OCTEON_IRQ_WORKQ0, |
24 | OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 64, | 24 | OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16, |
25 | OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32, | 25 | OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16, |
26 | OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, | ||
27 | OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16, | ||
26 | OCTEON_IRQ_MBOX1, | 28 | OCTEON_IRQ_MBOX1, |
27 | OCTEON_IRQ_MBOX2, | 29 | OCTEON_IRQ_UART0, |
28 | OCTEON_IRQ_MBOX3, | 30 | OCTEON_IRQ_UART1, |
31 | OCTEON_IRQ_UART2, | ||
29 | OCTEON_IRQ_PCI_INT0, | 32 | OCTEON_IRQ_PCI_INT0, |
30 | OCTEON_IRQ_PCI_INT1, | 33 | OCTEON_IRQ_PCI_INT1, |
31 | OCTEON_IRQ_PCI_INT2, | 34 | OCTEON_IRQ_PCI_INT2, |
@@ -35,24 +38,64 @@ enum octeon_irq { | |||
35 | OCTEON_IRQ_PCI_MSI2, | 38 | OCTEON_IRQ_PCI_MSI2, |
36 | OCTEON_IRQ_PCI_MSI3, | 39 | OCTEON_IRQ_PCI_MSI3, |
37 | 40 | ||
41 | OCTEON_IRQ_TWSI, | ||
42 | OCTEON_IRQ_TWSI2, | ||
38 | OCTEON_IRQ_RML, | 43 | OCTEON_IRQ_RML, |
44 | OCTEON_IRQ_TRACE0, | ||
45 | OCTEON_IRQ_GMX_DRP0 = OCTEON_IRQ_TRACE0 + 4, | ||
46 | OCTEON_IRQ_IPD_DRP = OCTEON_IRQ_GMX_DRP0 + 5, | ||
47 | OCTEON_IRQ_KEY_ZERO, | ||
39 | OCTEON_IRQ_TIMER0, | 48 | OCTEON_IRQ_TIMER0, |
40 | OCTEON_IRQ_TIMER1, | 49 | OCTEON_IRQ_TIMER1, |
41 | OCTEON_IRQ_TIMER2, | 50 | OCTEON_IRQ_TIMER2, |
42 | OCTEON_IRQ_TIMER3, | 51 | OCTEON_IRQ_TIMER3, |
43 | OCTEON_IRQ_USB0, | 52 | OCTEON_IRQ_USB0, |
44 | OCTEON_IRQ_USB1, | 53 | OCTEON_IRQ_USB1, |
45 | #ifndef CONFIG_PCI_MSI | 54 | OCTEON_IRQ_PCM, |
46 | OCTEON_IRQ_LAST = 127 | 55 | OCTEON_IRQ_MPI, |
47 | #endif | 56 | OCTEON_IRQ_POWIQ, |
57 | OCTEON_IRQ_IPDPPTHR, | ||
58 | OCTEON_IRQ_MII0, | ||
59 | OCTEON_IRQ_MII1, | ||
60 | OCTEON_IRQ_BOOTDMA, | ||
61 | |||
62 | OCTEON_IRQ_NAND, | ||
63 | OCTEON_IRQ_MIO, /* Summary of MIO_BOOT_ERR */ | ||
64 | OCTEON_IRQ_IOB, /* Summary of IOB_INT_SUM */ | ||
65 | OCTEON_IRQ_FPA, /* Summary of FPA_INT_SUM */ | ||
66 | OCTEON_IRQ_POW, /* Summary of POW_ECC_ERR */ | ||
67 | OCTEON_IRQ_L2C, /* Summary of L2C_INT_STAT */ | ||
68 | OCTEON_IRQ_IPD, /* Summary of IPD_INT_SUM */ | ||
69 | OCTEON_IRQ_PIP, /* Summary of PIP_INT_REG */ | ||
70 | OCTEON_IRQ_PKO, /* Summary of PKO_REG_ERROR */ | ||
71 | OCTEON_IRQ_ZIP, /* Summary of ZIP_ERROR */ | ||
72 | OCTEON_IRQ_TIM, /* Summary of TIM_REG_ERROR */ | ||
73 | OCTEON_IRQ_RAD, /* Summary of RAD_REG_ERROR */ | ||
74 | OCTEON_IRQ_KEY, /* Summary of KEY_INT_SUM */ | ||
75 | OCTEON_IRQ_DFA, /* Summary of DFA */ | ||
76 | OCTEON_IRQ_USBCTL, /* Summary of USBN0_INT_SUM */ | ||
77 | OCTEON_IRQ_SLI, /* Summary of SLI_INT_SUM */ | ||
78 | OCTEON_IRQ_DPI, /* Summary of DPI_INT_SUM */ | ||
79 | OCTEON_IRQ_AGX0, /* Summary of GMX0*+PCS0_INT*_REG */ | ||
80 | OCTEON_IRQ_AGL = OCTEON_IRQ_AGX0 + 5, | ||
81 | OCTEON_IRQ_PTP, | ||
82 | OCTEON_IRQ_PEM0, | ||
83 | OCTEON_IRQ_PEM1, | ||
84 | OCTEON_IRQ_SRIO0, | ||
85 | OCTEON_IRQ_SRIO1, | ||
86 | OCTEON_IRQ_LMC0, | ||
87 | OCTEON_IRQ_DFM = OCTEON_IRQ_LMC0 + 4, /* Summary of DFM */ | ||
88 | OCTEON_IRQ_RST, | ||
48 | }; | 89 | }; |
49 | 90 | ||
50 | #ifdef CONFIG_PCI_MSI | 91 | #ifdef CONFIG_PCI_MSI |
51 | /* 256 - 511 represent the MSI interrupts 0-255 */ | 92 | /* 152 - 407 represent the MSI interrupts 0-255 */ |
52 | #define OCTEON_IRQ_MSI_BIT0 (256) | 93 | #define OCTEON_IRQ_MSI_BIT0 (OCTEON_IRQ_RST + 1) |
53 | 94 | ||
54 | #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) | 95 | #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) |
55 | #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) | 96 | #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) |
97 | #else | ||
98 | #define OCTEON_IRQ_LAST (OCTEON_IRQ_RST + 1) | ||
56 | #endif | 99 | #endif |
57 | 100 | ||
58 | #endif | 101 | #endif |