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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-27 19:41:24 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-27 19:41:24 -0400
commit34800598b2eebe061445216473b1e4c2ff5cba99 (patch)
treea6d0eb6fe45d9480888d7ddb34840e172ed80e56 /arch/arm/plat-samsung
parent46b407ca4a6149c8d27fcec1881d4f184bec7c77 (diff)
parent511f1cb6d426938fabf9c6d69ce4861b66ffd919 (diff)
Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: driver specific updates" from Arnd Bergmann: "These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up aforementioned trivial conflicts. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: SAMSUNG: change the name from s3c-sdhci to exynos4-sdhci mmc: sdhci-s3c: add platform data for the second capability ARM: SAMSUNG: support the second capability for samsung-soc ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1 ARM: EXYNOS: Enable MDMA driver regulator: Remove bq24022 regulator driver rtc: sa1100: add OF support pxa: magician/hx4700: Convert to gpio-regulator from bq24022 ARM: OMAP3+: SmartReflex: fix error handling ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API ARM: OMAP3+: SmartReflex: micro-optimization for sanity check ARM: OMAP3+: SmartReflex: misc cleanups ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata() ARM: OMAP3+: hwmod: add SmartReflex IRQs ARM: OMAP3+: SmartReflex: clear ERRCONFIG_VPBOUNDINTST only on a need ARM: OMAP3+: SmartReflex: Fix status masking in ERRCONFIG register ARM: OMAP3+: SmartReflex: Add a shutdown hook ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP ... Conflicts: arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/fuse.c drivers/rtc/rtc-sa1100.c
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-pl330.h16
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-rtc.h81
-rw-r--r--arch/arm/plat-samsung/include/plat/rtc-core.h27
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h2
-rw-r--r--arch/arm/plat-samsung/platformdata.c2
5 files changed, 89 insertions, 39 deletions
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index c5eaad529de..0670f37aaae 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -82,6 +82,22 @@ enum dma_ch {
82 DMACH_SLIMBUS4_TX, 82 DMACH_SLIMBUS4_TX,
83 DMACH_SLIMBUS5_RX, 83 DMACH_SLIMBUS5_RX,
84 DMACH_SLIMBUS5_TX, 84 DMACH_SLIMBUS5_TX,
85 DMACH_MIPI_HSI0,
86 DMACH_MIPI_HSI1,
87 DMACH_MIPI_HSI2,
88 DMACH_MIPI_HSI3,
89 DMACH_MIPI_HSI4,
90 DMACH_MIPI_HSI5,
91 DMACH_MIPI_HSI6,
92 DMACH_MIPI_HSI7,
93 DMACH_MTOM_0,
94 DMACH_MTOM_1,
95 DMACH_MTOM_2,
96 DMACH_MTOM_3,
97 DMACH_MTOM_4,
98 DMACH_MTOM_5,
99 DMACH_MTOM_6,
100 DMACH_MTOM_7,
85 /* END Marker, also used to denote a reserved channel */ 101 /* END Marker, also used to denote a reserved channel */
86 DMACH_MAX, 102 DMACH_MAX,
87}; 103};
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index 30b7cc14cef..0f8263e93ee 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -18,51 +18,54 @@
18#define S3C2410_INTP_ALM (1 << 1) 18#define S3C2410_INTP_ALM (1 << 1)
19#define S3C2410_INTP_TIC (1 << 0) 19#define S3C2410_INTP_TIC (1 << 0)
20 20
21#define S3C2410_RTCCON S3C2410_RTCREG(0x40) 21#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
22#define S3C2410_RTCCON_RTCEN (1<<0) 22#define S3C2410_RTCCON_RTCEN (1 << 0)
23#define S3C2410_RTCCON_CLKSEL (1<<1) 23#define S3C2410_RTCCON_CNTSEL (1 << 2)
24#define S3C2410_RTCCON_CNTSEL (1<<2) 24#define S3C2410_RTCCON_CLKRST (1 << 3)
25#define S3C2410_RTCCON_CLKRST (1<<3) 25#define S3C2443_RTCCON_TICSEL (1 << 4)
26#define S3C64XX_RTCCON_TICEN (1<<8) 26#define S3C64XX_RTCCON_TICEN (1 << 8)
27 27
28#define S3C64XX_RTCCON_TICMSK (0xF<<7) 28#define S3C2410_TICNT S3C2410_RTCREG(0x44)
29#define S3C64XX_RTCCON_TICSHT (7) 29#define S3C2410_TICNT_ENABLE (1 << 7)
30 30
31#define S3C2410_TICNT S3C2410_RTCREG(0x44) 31/* S3C2443: tick count is 15 bit wide
32#define S3C2410_TICNT_ENABLE (1<<7) 32 * TICNT[6:0] contains upper 7 bits
33 * TICNT1[7:0] contains lower 8 bits
34 */
35#define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8)
36#define S3C2443_TICNT1 S3C2410_RTCREG(0x4C)
37#define S3C2443_TICNT1_PART(x) (x & 0xff)
33 38
34#define S3C2410_RTCALM S3C2410_RTCREG(0x50) 39/* S3C2416: tick count is 32 bit wide
35#define S3C2410_RTCALM_ALMEN (1<<6) 40 * TICNT[6:0] contains bits [14:8]
36#define S3C2410_RTCALM_YEAREN (1<<5) 41 * TICNT1[7:0] contains lower 8 bits
37#define S3C2410_RTCALM_MONEN (1<<4) 42 * TICNT2[16:0] contains upper 17 bits
38#define S3C2410_RTCALM_DAYEN (1<<3) 43 */
39#define S3C2410_RTCALM_HOUREN (1<<2) 44#define S3C2416_TICNT2 S3C2410_RTCREG(0x48)
40#define S3C2410_RTCALM_MINEN (1<<1) 45#define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15)
41#define S3C2410_RTCALM_SECEN (1<<0)
42 46
43#define S3C2410_RTCALM_ALL \ 47#define S3C2410_RTCALM S3C2410_RTCREG(0x50)
44 S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\ 48#define S3C2410_RTCALM_ALMEN (1 << 6)
45 S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\ 49#define S3C2410_RTCALM_YEAREN (1 << 5)
46 S3C2410_RTCALM_SECEN 50#define S3C2410_RTCALM_MONEN (1 << 4)
51#define S3C2410_RTCALM_DAYEN (1 << 3)
52#define S3C2410_RTCALM_HOUREN (1 << 2)
53#define S3C2410_RTCALM_MINEN (1 << 1)
54#define S3C2410_RTCALM_SECEN (1 << 0)
47 55
56#define S3C2410_ALMSEC S3C2410_RTCREG(0x54)
57#define S3C2410_ALMMIN S3C2410_RTCREG(0x58)
58#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c)
48 59
49#define S3C2410_ALMSEC S3C2410_RTCREG(0x54) 60#define S3C2410_ALMDATE S3C2410_RTCREG(0x60)
50#define S3C2410_ALMMIN S3C2410_RTCREG(0x58) 61#define S3C2410_ALMMON S3C2410_RTCREG(0x64)
51#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) 62#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68)
52
53#define S3C2410_ALMDATE S3C2410_RTCREG(0x60)
54#define S3C2410_ALMMON S3C2410_RTCREG(0x64)
55#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68)
56
57#define S3C2410_RTCRST S3C2410_RTCREG(0x6c)
58
59#define S3C2410_RTCSEC S3C2410_RTCREG(0x70)
60#define S3C2410_RTCMIN S3C2410_RTCREG(0x74)
61#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78)
62#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c)
63#define S3C2410_RTCDAY S3C2410_RTCREG(0x80)
64#define S3C2410_RTCMON S3C2410_RTCREG(0x84)
65#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88)
66 63
64#define S3C2410_RTCSEC S3C2410_RTCREG(0x70)
65#define S3C2410_RTCMIN S3C2410_RTCREG(0x74)
66#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78)
67#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c)
68#define S3C2410_RTCMON S3C2410_RTCREG(0x84)
69#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88)
67 70
68#endif /* __ASM_ARCH_REGS_RTC_H */ 71#endif /* __ASM_ARCH_REGS_RTC_H */
diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h b/arch/arm/plat-samsung/include/plat/rtc-core.h
new file mode 100644
index 00000000000..21d8594d37c
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/rtc-core.h
@@ -0,0 +1,27 @@
1/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h
2 *
3 * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
4 *
5 * Samsung RTC Controller core functions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_PLAT_RTC_CORE_H
13#define __ASM_PLAT_RTC_CORE_H __FILE__
14
15/* These functions are only for use with the core support code, such as
16 * the cpu specific initialisation code
17 */
18
19/* re-define device name depending on support. */
20static inline void s3c_rtc_setname(char *name)
21{
22#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
23 s3c_device_rtc.name = name;
24#endif
25}
26
27#endif /* __ASM_PLAT_RTC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index f82f888b91a..317e246ffc5 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -40,6 +40,7 @@ enum clk_types {
40 * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI 40 * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
41 * @max_width: The maximum number of data bits supported. 41 * @max_width: The maximum number of data bits supported.
42 * @host_caps: Standard MMC host capabilities bit field. 42 * @host_caps: Standard MMC host capabilities bit field.
43 * @host_caps2: The second standard MMC host capabilities bit field.
43 * @cd_type: Type of Card Detection method (see cd_types enum above) 44 * @cd_type: Type of Card Detection method (see cd_types enum above)
44 * @clk_type: Type of clock divider method (see clk_types enum above) 45 * @clk_type: Type of clock divider method (see clk_types enum above)
45 * @ext_cd_init: Initialize external card detect subsystem. Called on 46 * @ext_cd_init: Initialize external card detect subsystem. Called on
@@ -63,6 +64,7 @@ enum clk_types {
63struct s3c_sdhci_platdata { 64struct s3c_sdhci_platdata {
64 unsigned int max_width; 65 unsigned int max_width;
65 unsigned int host_caps; 66 unsigned int host_caps;
67 unsigned int host_caps2;
66 unsigned int pm_caps; 68 unsigned int pm_caps;
67 enum cd_types cd_type; 69 enum cd_types cd_type;
68 enum clk_types clk_type; 70 enum clk_types clk_type;
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c
index 0f707184eae..fa78aa710ed 100644
--- a/arch/arm/plat-samsung/platformdata.c
+++ b/arch/arm/plat-samsung/platformdata.c
@@ -53,6 +53,8 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
53 set->cfg_gpio = pd->cfg_gpio; 53 set->cfg_gpio = pd->cfg_gpio;
54 if (pd->host_caps) 54 if (pd->host_caps)
55 set->host_caps |= pd->host_caps; 55 set->host_caps |= pd->host_caps;
56 if (pd->host_caps2)
57 set->host_caps2 |= pd->host_caps2;
56 if (pd->pm_caps) 58 if (pd->pm_caps)
57 set->pm_caps |= pd->pm_caps; 59 set->pm_caps |= pd->pm_caps;
58 if (pd->clk_type) 60 if (pd->clk_type)