Patched in Tegra support.

11 files changed, 75 insertions, 42 deletions

diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index ebc0ba31ce8..b2ef65db0e9 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -14,7 +14,6 @@
 #ifndef __ASM_ARCH_CPU_H__
 #define __ASM_ARCH_CPU_H__
 
-#include <linux/io.h>
 #include <asm/cputype.h>
 
 /* Processor id value in CP15 Register 0 */
@@ -38,7 +37,7 @@
 
 static inline u32 ixp4xx_read_feature_bits(void)
 {
-        u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
+        u32 val = ~*IXP4XX_EXP_CFG2;
 
         if (cpu_is_ixp42x_rev_a0())
                 return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
@@ -52,7 +51,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
 
 static inline void ixp4xx_write_feature_bits(u32 value)
 {
-        __raw_writel(~value, IXP4XX_EXP_CFG2);
+        *IXP4XX_EXP_CFG2 = ~value;
 }
 
 #endif  /* _ASM_ARCH_CPU_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index ff686cbc5df..b974a49c0af 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -10,15 +10,15 @@
  * published by the Free Software Foundation.
 */
 
-                .macro  addruart, rp, rv, tmp
+                .macro  addruart, rp, rv
 #ifdef __ARMEB__
                 mov     \rp, #3         @ Uart regs are at off set of 3 if
                                         @ byte writes used - Big Endian.
 #else
                 mov     \rp, #0
 #endif
-                orr     \rv, \rp, #0xfe000000   @ virtual
-                orr     \rv, \rv, #0x00f00000
+                orr     \rv, \rp, #0xff000000   @ virtual
+                orr     \rv, \rv, #0x00b00000
                 orr     \rp, \rp, #0xc8000000   @ physical
                 .endm
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S
index 79adf83e2c3..f2e14e94ed1 100644
--- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S
@@ -9,9 +9,15 @@
  */
 #include <mach/hardware.h>
 
+                .macro  disable_fiq
+                .endm
+
                 .macro  get_irqnr_preamble, base, tmp
                 .endm
 
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
+
                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                 ldr     \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
                 ldr     \irqstat, [\irqstat]            @ get interrupts
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index 034bb2a1b80..c30e7e923a7 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -23,6 +23,8 @@
 #define PCIBIOS_MAX_MEM         0x4BFFFFFF
 #endif
 
+#define ARCH_HAS_DMA_SET_COHERENT_MASK
+
 /* Register locations and bits */
 #include "ixp4xx-regs.h"
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 5cf30d1b78d..57b5410c31f 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -17,6 +17,8 @@
 
 #include <mach/hardware.h>
 
+#define IO_SPACE_LIMIT 0x0000ffff
+
 extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data);
 extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
 
@@ -39,7 +41,11 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
  *    but in some cases the performance hit is acceptable. In addition, you
  *    cannot mmap() PCI devices in this case.
  */
-#ifdef  CONFIG_IXP4XX_INDIRECT_PCI
+#ifndef CONFIG_IXP4XX_INDIRECT_PCI
+
+#define __mem_pci(a)            (a)
+
+#else
 
 /*
  * In the case of using indirect PCI, we simply return the actual PCI
@@ -53,6 +59,24 @@ static inline int is_pci_memory(u32 addr)
         return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
 }
 
+static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
+                                                unsigned int mtype)
+{
+        if (!is_pci_memory(addr))
+                return __arm_ioremap(addr, size, mtype);
+
+        return (void __iomem *)addr;
+}
+
+static inline void __indirect_iounmap(void __iomem *addr)
+{
+        if (!is_pci_memory((__force u32)addr))
+                __iounmap(addr);
+}
+
+#define __arch_ioremap                  __indirect_ioremap
+#define __arch_iounmap                  __indirect_iounmap
+
 #define writeb(v, p)                    __indirect_writeb(v, p)
 #define writew(v, p)                    __indirect_writew(v, p)
 #define writel(v, p)                    __indirect_writel(v, p)
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
index cf03614d250..292d55ed211 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -75,7 +75,4 @@ struct ixp46x_ts_regs {
 #define TX_SNAPSHOT_LOCKED (1<<0)
 #define RX_SNAPSHOT_LOCKED (1<<1)
 
-/* The ptp_ixp46x module will set this variable */
-extern int ixp46x_phc_index;
-
 #endif
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index c5bae9c035d..97c530f66e7 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -30,43 +30,51 @@
  *
  * 0x50000000   0x10000000      ioremap'd       EXP BUS
  *
- * 0xC8000000   0x00013000      0xFEF00000      On-Chip Peripherals
+ * 0x6000000    0x00004000      ioremap'd       QMgr
  *
- * 0xC0000000   0x00001000      0xFEF13000      PCI CFG
+ * 0xC0000000   0x00001000      0xffbff000      PCI CFG
  *
- * 0xC4000000   0x00001000      0xFEF14000      EXP CFG
+ * 0xC4000000   0x00001000      0xffbfe000      EXP CFG
  *
- * 0x60000000   0x00004000      0xFEF15000      QMgr
+ * 0xC8000000   0x00013000      0xffbeb000      On-Chip Peripherals
  */
 
 /*
  * Queue Manager
  */
-#define IXP4XX_QMGR_BASE_PHYS           0x60000000
-#define IXP4XX_QMGR_BASE_VIRT           IOMEM(0xFEF15000)
-#define IXP4XX_QMGR_REGION_SIZE         0x00004000
+#define IXP4XX_QMGR_BASE_PHYS           (0x60000000)
+#define IXP4XX_QMGR_REGION_SIZE         (0x00004000)
 
 /*
- * Peripheral space, including debug UART. Must be section-aligned so that
- * it can be used with the low-level debug code.
+ * Expansion BUS Configuration registers
  */
-#define IXP4XX_PERIPHERAL_BASE_PHYS     0xC8000000
-#define IXP4XX_PERIPHERAL_BASE_VIRT     IOMEM(0xFEF00000)
-#define IXP4XX_PERIPHERAL_REGION_SIZE   0x00013000
+#define IXP4XX_EXP_CFG_BASE_PHYS        (0xC4000000)
+#define IXP4XX_EXP_CFG_BASE_VIRT        (0xFFBFE000)
+#define IXP4XX_EXP_CFG_REGION_SIZE      (0x00001000)
 
 /*
  * PCI Config registers
  */
-#define IXP4XX_PCI_CFG_BASE_PHYS        0xC0000000
-#define IXP4XX_PCI_CFG_BASE_VIRT        IOMEM(0xFEF13000)
-#define IXP4XX_PCI_CFG_REGION_SIZE      0x00001000
+#define IXP4XX_PCI_CFG_BASE_PHYS        (0xC0000000)
+#define IXP4XX_PCI_CFG_BASE_VIRT        (0xFFBFF000)
+#define IXP4XX_PCI_CFG_REGION_SIZE      (0x00001000)
 
 /*
- * Expansion BUS Configuration registers
+ * Peripheral space
+ */
+#define IXP4XX_PERIPHERAL_BASE_PHYS     (0xC8000000)
+#define IXP4XX_PERIPHERAL_BASE_VIRT     (0xFFBEB000)
+#define IXP4XX_PERIPHERAL_REGION_SIZE   (0x00013000)
+
+/*
+ * Debug UART
+ *
+ * This is basically a remap of UART1 into a region that is section
+ * aligned so that it * can be used with the low-level debug code.
  */
-#define IXP4XX_EXP_CFG_BASE_PHYS        0xC4000000
-#define IXP4XX_EXP_CFG_BASE_VIRT        0xFEF14000
-#define IXP4XX_EXP_CFG_REGION_SIZE      0x00001000
+#define IXP4XX_DEBUG_UART_BASE_PHYS     (0xC8000000)
+#define IXP4XX_DEBUG_UART_BASE_VIRT     (0xffb00000)
+#define IXP4XX_DEBUG_UART_REGION_SIZE   (0x00001000)
 
 #define IXP4XX_EXP_CS0_OFFSET   0x00
 #define IXP4XX_EXP_CS1_OFFSET   0x04
@@ -84,7 +92,7 @@
 /*
  * Expansion Bus Controller registers.
  */
-#define IXP4XX_EXP_REG(x) ((volatile u32 __iomem *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
+#define IXP4XX_EXP_REG(x) ((volatile u32 *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
 
 #define IXP4XX_EXP_CS0      IXP4XX_EXP_REG(IXP4XX_EXP_CS0_OFFSET)
 #define IXP4XX_EXP_CS1      IXP4XX_EXP_REG(IXP4XX_EXP_CS1_OFFSET)
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index 5bce94aacca..e824c02c825 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -121,16 +121,14 @@ extern unsigned long ixp4xx_timer_freq;
  * Functions used by platform-level setup code
  */
 extern void ixp4xx_map_io(void);
-extern void ixp4xx_init_early(void);
 extern void ixp4xx_init_irq(void);
 extern void ixp4xx_sys_init(void);
 extern void ixp4xx_timer_init(void);
 extern struct sys_timer ixp4xx_timer;
-extern void ixp4xx_restart(char, const char *);
 extern void ixp4xx_pci_preinit(void);
 struct pci_sys_data;
 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-extern struct pci_ops ixp4xx_ops;
+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
 
 /*
  * GPIO-functions
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 4de8da536db..9e7cad2d54c 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
 
 static inline void qmgr_put_entry(unsigned int queue, u32 val)
 {
-        struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
+        extern struct qmgr_regs __iomem *qmgr_regs;
 #if DEBUG_QMGR
         BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
 
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
 static inline u32 qmgr_get_entry(unsigned int queue)
 {
         u32 val;
-        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
+        extern struct qmgr_regs __iomem *qmgr_regs;
         val = __raw_readl(&qmgr_regs->acc[queue][0]);
 #if DEBUG_QMGR
         BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
 
 static inline int __qmgr_get_stat1(unsigned int queue)
 {
-        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
+        extern struct qmgr_regs __iomem *qmgr_regs;
         return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
                 >> ((queue & 7) << 2)) & 0xF;
 }
 
 static inline int __qmgr_get_stat2(unsigned int queue)
 {
-        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
+        extern struct qmgr_regs __iomem *qmgr_regs;
         BUG_ON(queue >= HALF_QUEUES);
         return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
                 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
  */
 static inline int qmgr_stat_below_low_watermark(unsigned int queue)
 {
-        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
+        extern struct qmgr_regs __iomem *qmgr_regs;
         if (queue >= HALF_QUEUES)
                 return (__raw_readl(&qmgr_regs->statne_h) >>
                         (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
  */
 static inline int qmgr_stat_full(unsigned int queue)
 {
-        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
+        extern struct qmgr_regs __iomem *qmgr_regs;
         if (queue >= HALF_QUEUES)
                 return (__raw_readl(&qmgr_regs->statf_h) >>
                         (queue - HALF_QUEUES)) & 0x01;
diff --git a/arch/arm/mach-ixp4xx/include/mach/udc.h b/arch/arm/mach-ixp4xx/include/mach/udc.h
index 7bd8b96c884..80d6da2eafa 100644
--- a/arch/arm/mach-ixp4xx/include/mach/udc.h
+++ b/arch/arm/mach-ixp4xx/include/mach/udc.h
@@ -2,7 +2,7 @@
  * arch/arm/mach-ixp4xx/include/mach/udc.h
  *
  */
-#include <linux/platform_data/pxa2xx_udc.h>
+#include <asm/mach/udc_pxa2xx.h>
 
 extern void ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info);
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/uncompress.h b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
index eb945a926d0..219d7c1dcdb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
@@ -41,8 +41,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
          * Some boards are using UART2 as console
          */
         if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
-            machine_is_gateway7001() || machine_is_wg302v2() ||
-            machine_is_devixp() || machine_is_miccpt() || machine_is_mic256())
+                         machine_is_gateway7001() || machine_is_wg302v2())
                 uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
         else
                 uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;