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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/arm/mach-at91/at91sam9261.c
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/arm/mach-at91/at91sam9261.c')
-rw-r--r--arch/arm/mach-at91/at91sam9261.c99
1 files changed, 49 insertions, 50 deletions
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 2998a08afc2..6c8e3b5f669 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,22 +11,20 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
14 15
15#include <asm/proc-fns.h>
16#include <asm/irq.h> 16#include <asm/irq.h>
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <asm/system_misc.h>
20#include <mach/cpu.h> 19#include <mach/cpu.h>
21#include <mach/at91sam9261.h> 20#include <mach/at91sam9261.h>
22#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
23 24
24#include "at91_aic.h"
25#include "at91_rstc.h"
26#include "soc.h" 25#include "soc.h"
27#include "generic.h" 26#include "generic.h"
28#include "clock.h" 27#include "clock.h"
29#include "sam9_smc.h"
30 28
31/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
32 * Clocks 30 * Clocks
@@ -131,20 +129,6 @@ static struct clk lcdc_clk = {
131 .type = CLK_TYPE_PERIPHERAL, 129 .type = CLK_TYPE_PERIPHERAL,
132}; 130};
133 131
134/* HClocks */
135static struct clk hck0 = {
136 .name = "hck0",
137 .pmc_mask = AT91_PMC_HCK0,
138 .type = CLK_TYPE_SYSTEM,
139 .id = 0,
140};
141static struct clk hck1 = {
142 .name = "hck1",
143 .pmc_mask = AT91_PMC_HCK1,
144 .type = CLK_TYPE_SYSTEM,
145 .id = 1,
146};
147
148static struct clk *periph_clocks[] __initdata = { 132static struct clk *periph_clocks[] __initdata = {
149 &pioA_clk, 133 &pioA_clk,
150 &pioB_clk, 134 &pioB_clk,
@@ -174,18 +158,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
174 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 158 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
175 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), 159 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
176 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 160 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
177 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk), 161 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
178 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk), 162 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
179 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk), 163 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
180 CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc0_clk),
181 CLKDEV_CON_DEV_ID("pclk", "fffc0000.ssc", &ssc1_clk),
182 CLKDEV_CON_DEV_ID("pclk", "fffc4000.ssc", &ssc2_clk),
183 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
184 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk),
185 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk),
186 CLKDEV_CON_ID("pioA", &pioA_clk),
187 CLKDEV_CON_ID("pioB", &pioB_clk),
188 CLKDEV_CON_ID("pioC", &pioC_clk),
189}; 164};
190 165
191static struct clk_lookup usart_clocks_lookups[] = { 166static struct clk_lookup usart_clocks_lookups[] = {
@@ -224,6 +199,20 @@ static struct clk pck3 = {
224 .id = 3, 199 .id = 3,
225}; 200};
226 201
202/* HClocks */
203static struct clk hck0 = {
204 .name = "hck0",
205 .pmc_mask = AT91_PMC_HCK0,
206 .type = CLK_TYPE_SYSTEM,
207 .id = 0,
208};
209static struct clk hck1 = {
210 .name = "hck1",
211 .pmc_mask = AT91_PMC_HCK1,
212 .type = CLK_TYPE_SYSTEM,
213 .id = 1,
214};
215
227static void __init at91sam9261_register_clocks(void) 216static void __init at91sam9261_register_clocks(void)
228{ 217{
229 int i; 218 int i;
@@ -245,23 +234,44 @@ static void __init at91sam9261_register_clocks(void)
245 clk_register(&hck1); 234 clk_register(&hck1);
246} 235}
247 236
237static struct clk_lookup console_clock_lookup;
238
239void __init at91sam9261_set_console_clock(int id)
240{
241 if (id >= ARRAY_SIZE(usart_clocks_lookups))
242 return;
243
244 console_clock_lookup.con_id = "usart";
245 console_clock_lookup.clk = usart_clocks_lookups[id].clk;
246 clkdev_add(&console_clock_lookup);
247}
248
248/* -------------------------------------------------------------------- 249/* --------------------------------------------------------------------
249 * GPIO 250 * GPIO
250 * -------------------------------------------------------------------- */ 251 * -------------------------------------------------------------------- */
251 252
252static struct at91_gpio_bank at91sam9261_gpio[] __initdata = { 253static struct at91_gpio_bank at91sam9261_gpio[] = {
253 { 254 {
254 .id = AT91SAM9261_ID_PIOA, 255 .id = AT91SAM9261_ID_PIOA,
255 .regbase = AT91SAM9261_BASE_PIOA, 256 .offset = AT91_PIOA,
257 .clock = &pioA_clk,
256 }, { 258 }, {
257 .id = AT91SAM9261_ID_PIOB, 259 .id = AT91SAM9261_ID_PIOB,
258 .regbase = AT91SAM9261_BASE_PIOB, 260 .offset = AT91_PIOB,
261 .clock = &pioB_clk,
259 }, { 262 }, {
260 .id = AT91SAM9261_ID_PIOC, 263 .id = AT91SAM9261_ID_PIOC,
261 .regbase = AT91SAM9261_BASE_PIOC, 264 .offset = AT91_PIOC,
265 .clock = &pioC_clk,
262 } 266 }
263}; 267};
264 268
269static void at91sam9261_poweroff(void)
270{
271 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
272}
273
274
265/* -------------------------------------------------------------------- 275/* --------------------------------------------------------------------
266 * AT91SAM9261 processor initialization 276 * AT91SAM9261 processor initialization
267 * -------------------------------------------------------------------- */ 277 * -------------------------------------------------------------------- */
@@ -274,20 +284,10 @@ static void __init at91sam9261_map_io(void)
274 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); 284 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
275} 285}
276 286
277static void __init at91sam9261_ioremap_registers(void)
278{
279 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
280 at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
281 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
282 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
283 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
284 at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
285}
286
287static void __init at91sam9261_initialize(void) 287static void __init at91sam9261_initialize(void)
288{ 288{
289 arm_pm_idle = at91sam9_idle; 289 at91_arch_reset = at91sam9_alt_reset;
290 arm_pm_restart = at91sam9_alt_restart; 290 pm_power_off = at91sam9261_poweroff;
291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
292 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
293 293
@@ -337,10 +337,9 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
337 0, /* Advanced Interrupt Controller */ 337 0, /* Advanced Interrupt Controller */
338}; 338};
339 339
340AT91_SOC_START(sam9261) 340struct at91_init_soc __initdata at91sam9261_soc = {
341 .map_io = at91sam9261_map_io, 341 .map_io = at91sam9261_map_io,
342 .default_irq_priority = at91sam9261_default_irq_priority, 342 .default_irq_priority = at91sam9261_default_irq_priority,
343 .ioremap_registers = at91sam9261_ioremap_registers,
344 .register_clocks = at91sam9261_register_clocks, 343 .register_clocks = at91sam9261_register_clocks,
345 .init = at91sam9261_initialize, 344 .init = at91sam9261_initialize,
346AT91_SOC_END 345};