Patched in Tegra support.

116 files changed, 3618 insertions, 7981 deletions

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 958358c91af..22484670e7b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,140 +3,88 @@ if ARCH_AT91
 config HAVE_AT91_DATAFLASH_CARD
         bool
 
-config HAVE_AT91_DBGU0
+config HAVE_AT91_USART3
         bool
 
-config HAVE_AT91_DBGU1
+config HAVE_AT91_USART4
         bool
 
-config AT91_SAM9_ALT_RESET
+config HAVE_AT91_USART5
         bool
-        default !ARCH_AT91X40
-
-config AT91_SAM9G45_RESET
-        bool
-        default !ARCH_AT91X40
-
-config SOC_AT91SAM9
-        bool
-        select CPU_ARM926T
-        select GENERIC_CLOCKEVENTS
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
 
 menu "Atmel AT91 System-on-Chip"
 
-comment "Atmel AT91 Processor"
-
-config SOC_AT91RM9200
-        bool "AT91RM9200"
-        select CPU_ARM920T
-        select GENERIC_CLOCKEVENTS
-        select HAVE_AT91_DBGU0
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
-
-config SOC_AT91SAM9260
-        bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
-        select HAVE_AT91_DBGU0
-        select SOC_AT91SAM9
-        help
-          Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
-          or AT91SAM9G20 SoC.
-
-config SOC_AT91SAM9261
-        bool "AT91SAM9261 or AT91SAM9G10"
-        select HAVE_AT91_DBGU0
-        select HAVE_FB_ATMEL
-        select SOC_AT91SAM9
-        help
-          Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
-
-config SOC_AT91SAM9263
-        bool "AT91SAM9263"
-        select HAVE_AT91_DBGU1
-        select HAVE_FB_ATMEL
-        select SOC_AT91SAM9
-
-config SOC_AT91SAM9RL
-        bool "AT91SAM9RL"
-        select HAVE_AT91_DBGU0
-        select HAVE_FB_ATMEL
-        select SOC_AT91SAM9
-
-config SOC_AT91SAM9G45
-        bool "AT91SAM9G45 or AT91SAM9M10 families"
-        select HAVE_AT91_DBGU1
-        select HAVE_FB_ATMEL
-        select SOC_AT91SAM9
-        help
-          Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
-          This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
-
-config SOC_AT91SAM9X5
-        bool "AT91SAM9x5 family"
-        select HAVE_AT91_DBGU0
-        select HAVE_FB_ATMEL
-        select SOC_AT91SAM9
-        help
-          Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
-          This means that your SAM9 name finishes with a '5' (except if it is
-          AT91SAM9G45!).
-          This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
-          and AT91SAM9X35.
-
-config SOC_AT91SAM9N12
-        bool "AT91SAM9N12 family"
-        select HAVE_AT91_DBGU0
-        select HAVE_FB_ATMEL
-        select SOC_AT91SAM9
-        help
-          Select this if you are using Atmel's AT91SAM9N12 SoC.
-
 choice
-        prompt "Atmel AT91 Processor Devices for non DT boards"
-
-config ARCH_AT91_NONE
-        bool "None"
+        prompt "Atmel AT91 Processor"
 
 config ARCH_AT91RM9200
         bool "AT91RM9200"
-        select SOC_AT91RM9200
+        select CPU_ARM920T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_USART3
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE"
-        select SOC_AT91SAM9260
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_USART3
+        select HAVE_AT91_USART4
+        select HAVE_AT91_USART5
+        select HAVE_NET_MACB
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
-        select SOC_AT91SAM9261
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_FB_ATMEL
 
 config ARCH_AT91SAM9G10
         bool "AT91SAM9G10"
-        select SOC_AT91SAM9261
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_FB_ATMEL
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
-        select SOC_AT91SAM9263
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_FB_ATMEL
+        select HAVE_NET_MACB
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
-        select SOC_AT91SAM9RL
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_USART3
+        select HAVE_FB_ATMEL
 
 config ARCH_AT91SAM9G20
         bool "AT91SAM9G20"
-        select SOC_AT91SAM9260
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_USART3
+        select HAVE_AT91_USART4
+        select HAVE_AT91_USART5
+        select HAVE_NET_MACB
 
 config ARCH_AT91SAM9G45
         bool "AT91SAM9G45"
-        select SOC_AT91SAM9G45
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_USART3
+        select HAVE_FB_ATMEL
+        select HAVE_NET_MACB
+
+config ARCH_AT91CAP9
+        bool "AT91CAP9"
+        select CPU_ARM926T
+        select GENERIC_CLOCKEVENTS
+        select HAVE_FB_ATMEL
+        select HAVE_NET_MACB
 
 config ARCH_AT91X40
         bool "AT91x40"
-        depends on !MMU
         select ARCH_USES_GETTIMEOFFSET
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
 
 endchoice
 
@@ -234,11 +182,6 @@ config MACH_ECO920
         help
           Select this if you are using the eco920 board
 
-config MACH_RSI_EWS
-        bool "RSI Embedded Webserver"
-        depends on ARCH_AT91RM9200
-        help
-          Select this if you are using RSIs EWS board.
 endif
 
 # ----------------------------------------------------------
@@ -247,6 +190,12 @@ if ARCH_AT91SAM9260
 
 comment "AT91SAM9260 Variants"
 
+config ARCH_AT91SAM9260_SAM9XE
+        bool "AT91SAM9XE"
+        help
+          Select this if you are using Atmel's AT91SAM9XE System-on-Chip.
+          They are basically AT91SAM9260s with various sizes of embedded Flash.
+
 comment "AT91SAM9260 / AT91SAM9XE Board Type"
 
 config MACH_AT91SAM9260EK
@@ -393,7 +342,6 @@ config MACH_AT91SAM9G20EK_2MMC
           Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
           with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
           onwards.
-          <http://www.atmel.com/tools/SAM9G20-EK.aspx>
 
 config MACH_CPU9G20
         bool "Eukrea CPU9G20 board"
@@ -433,14 +381,6 @@ config MACH_GSIA18S
           This enables support for the GS_IA18_S board
           produced by GeoSIG Ltd company. This is an internet accelerograph.
           <http://www.geosig.com>
-
-config MACH_USB_A9G20
-        bool "CALAO USB-A9G20"
-        depends on ARCH_AT91SAM9G20
-        help
-          Select this if you are using a Calao Systems USB-A9G20.
-          <http://www.calao-systems.com>
-
 endif
 
 if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
@@ -463,10 +403,24 @@ comment "AT91SAM9G45 Board Type"
 config MACH_AT91SAM9M10G45EK
         bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
         help
-          Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
-          Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
-          families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
-          <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
+          Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit.
+          "ES" at the end of the name means that this board is an
+          Engineering Sample.
+
+endif
+
+# ----------------------------------------------------------
+
+if ARCH_AT91CAP9
+
+comment "AT91CAP9 Board Type"
+
+config MACH_AT91CAP9ADK
+        bool "Atmel AT91CAP9A-DK Evaluation Kit"
+        select HAVE_AT91_DATAFLASH_CARD
+        help
+          Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit.
+          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138>
 
 endif
 
@@ -488,26 +442,6 @@ endif
 
 # ----------------------------------------------------------
 
-comment "Generic Board Type"
-
-config MACH_AT91RM9200_DT
-        bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
-        depends on SOC_AT91RM9200
-        select USE_OF
-        help
-          Select this if you want to experiment device-tree with
-          an Atmel RM9200 Evaluation Kit.
-
-config MACH_AT91SAM_DT
-        bool "Atmel AT91SAM Evaluation Kits with device-tree support"
-        depends on SOC_AT91SAM9
-        select USE_OF
-        help
-          Select this if you want to experiment device-tree with
-          an Atmel Evaluation Kit.
-
-# ----------------------------------------------------------
-
 comment "AT91 Board Options"
 
 config MTD_AT91_DATAFLASH_CARD
@@ -555,6 +489,36 @@ config AT91_TIMER_HZ
           system clock (of at least several MHz), rounding is less of a
           problem so it can be safer to use a decimal values like 100.
 
+choice
+        prompt "Select a UART for early kernel messages"
+
+config AT91_EARLY_DBGU
+        bool "DBGU"
+
+config AT91_EARLY_USART0
+        bool "USART0"
+
+config AT91_EARLY_USART1
+        bool "USART1"
+
+config AT91_EARLY_USART2
+        bool "USART2"
+        depends on ! ARCH_AT91X40
+
+config AT91_EARLY_USART3
+        bool "USART3"
+        depends on HAVE_AT91_USART3
+
+config AT91_EARLY_USART4
+        bool "USART4"
+        depends on HAVE_AT91_USART4
+
+config AT91_EARLY_USART5
+        bool "USART5"
+        depends on HAVE_AT91_USART5
+
+endchoice
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index b38a1dcb79b..bf57e8b1c9d 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -8,28 +8,17 @@ obj-n		:=
 obj-            :=
 
 obj-$(CONFIG_AT91_PMC_UNIT)     += clock.o
-obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
-obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
-obj-$(CONFIG_SOC_AT91SAM9)      += at91sam926x_time.o sam9_smc.o
 
 # CPU-specific support
-obj-$(CONFIG_SOC_AT91RM9200)    += at91rm9200.o at91rm9200_time.o
-obj-$(CONFIG_SOC_AT91SAM9260)   += at91sam9260.o
-obj-$(CONFIG_SOC_AT91SAM9261)   += at91sam9261.o
-obj-$(CONFIG_SOC_AT91SAM9263)   += at91sam9263.o
-obj-$(CONFIG_SOC_AT91SAM9G45)   += at91sam9g45.o
-obj-$(CONFIG_SOC_AT91SAM9N12)   += at91sam9n12.o
-obj-$(CONFIG_SOC_AT91SAM9X5)    += at91sam9x5.o
-obj-$(CONFIG_SOC_AT91SAM9RL)    += at91sam9rl.o
-
-obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G10)  += at91sam9261_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45_devices.o
+obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
+obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G10)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
+obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -47,13 +36,12 @@ obj-$(CONFIG_MACH_ECBAT91)	+= board-ecbat91.o
 obj-$(CONFIG_MACH_YL9200)       += board-yl-9200.o
 obj-$(CONFIG_MACH_CPUAT91)      += board-cpuat91.o
 obj-$(CONFIG_MACH_ECO920)       += board-eco920.o
-obj-$(CONFIG_MACH_RSI_EWS)      += board-rsi-ews.o
 
 # AT91SAM9260 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
 obj-$(CONFIG_MACH_CAM60)        += board-cam60.o
 obj-$(CONFIG_MACH_SAM9_L9260)   += board-sam9-l9260.o
-obj-$(CONFIG_MACH_USB_A9260)    += board-usb-a926x.o
+obj-$(CONFIG_MACH_USB_A9260)    += board-usb-a9260.o
 obj-$(CONFIG_MACH_QIL_A9260)    += board-qil-a9260.o
 obj-$(CONFIG_MACH_AFEB9260)     += board-afeb-9260v1.o
 obj-$(CONFIG_MACH_CPU9260)      += board-cpu9krea.o
@@ -65,7 +53,7 @@ obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o
 
 # AT91SAM9263 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
-obj-$(CONFIG_MACH_USB_A9263)    += board-usb-a926x.o
+obj-$(CONFIG_MACH_USB_A9263)    += board-usb-a9263.o
 obj-$(CONFIG_MACH_NEOCORE926)   += board-neocore926.o
 
 # AT91SAM9RL board-specific support
@@ -79,7 +67,6 @@ obj-$(CONFIG_MACH_STAMP9G20)	+= board-stamp9g20.o
 obj-$(CONFIG_MACH_PORTUXG20)    += board-stamp9g20.o
 obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
 obj-$(CONFIG_MACH_GSIA18S)      += board-gsia18s.o board-stamp9g20.o
-obj-$(CONFIG_MACH_USB_A9G20)    += board-usb-a926x.o
 
 # AT91SAM9260/AT91SAM9G20 board-specific support
 obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
@@ -87,9 +74,8 @@ obj-$(CONFIG_MACH_SNAPPER_9260)	+= board-snapper9260.o
 # AT91SAM9G45 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
 
-# AT91SAM board with device-tree
-obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o
-obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
+# AT91CAP9 board-specific support
+obj-$(CONFIG_MACH_AT91CAP9ADK)  += board-cap9adk.o
 
 # AT91X40 board-specific support
 obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index 5309f9b6aab..3462b815054 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -3,12 +3,16 @@
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
 #   INITRD_PHYS must be in RAM
 
-ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
-   zreladdr-y   += 0x70008000
+ifeq ($(CONFIG_ARCH_AT91CAP9),y)
+   zreladdr-y   := 0x70008000
+params_phys-y   := 0x70000100
+initrd_phys-y   := 0x70410000
+else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
+   zreladdr-y   := 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70410000
 else
-   zreladdr-y   += 0x20008000
+   zreladdr-y   := 0x20008000
 params_phys-y   := 0x20000100
 initrd_phys-y   := 0x20410000
 endif
diff --git a/arch/arm/mach-at91/at91_aic.h b/arch/arm/mach-at91/at91_aic.h
deleted file mode 100644
index eaea66197fa..00000000000
--- a/arch/arm/mach-at91/at91_aic.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_aic.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Advanced Interrupt Controller (AIC) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_AIC_H
-#define AT91_AIC_H
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_aic_base;
-
-#define at91_aic_read(field) \
-        __raw_readl(at91_aic_base + field)
-
-#define at91_aic_write(field, value) \
-        __raw_writel(value, at91_aic_base + field)
-#else
-.extern at91_aic_base
-#endif
-
-/* Number of irq lines managed by AIC */
-#define NR_AIC_IRQS     32
-#define NR_AIC5_IRQS    128
-
-#define AT91_AIC5_SSR           0x0                     /* Source Select Register [AIC5] */
-#define         AT91_AIC5_INTSEL_MSK    (0x7f << 0)             /* Interrupt Line Selection Mask */
-
-#define AT91_AIC_IRQ_MIN_PRIORITY       0
-#define AT91_AIC_IRQ_MAX_PRIORITY       7
-
-#define AT91_AIC_SMR(n)         ((n) * 4)               /* Source Mode Registers 0-31 */
-#define AT91_AIC5_SMR           0x4                     /* Source Mode Register [AIC5] */
-#define         AT91_AIC_PRIOR          (7 << 0)                /* Priority Level */
-#define         AT91_AIC_SRCTYPE        (3 << 5)                /* Interrupt Source Type */
-#define                 AT91_AIC_SRCTYPE_LOW            (0 << 5)
-#define                 AT91_AIC_SRCTYPE_FALLING        (1 << 5)
-#define                 AT91_AIC_SRCTYPE_HIGH           (2 << 5)
-#define                 AT91_AIC_SRCTYPE_RISING         (3 << 5)
-
-#define AT91_AIC_SVR(n)         (0x80 + ((n) * 4))      /* Source Vector Registers 0-31 */
-#define AT91_AIC5_SVR           0x8                     /* Source Vector Register [AIC5] */
-#define AT91_AIC_IVR            0x100                   /* Interrupt Vector Register */
-#define AT91_AIC5_IVR           0x10                    /* Interrupt Vector Register [AIC5] */
-#define AT91_AIC_FVR            0x104                   /* Fast Interrupt Vector Register */
-#define AT91_AIC5_FVR           0x14                    /* Fast Interrupt Vector Register [AIC5] */
-#define AT91_AIC_ISR            0x108                   /* Interrupt Status Register */
-#define AT91_AIC5_ISR           0x18                    /* Interrupt Status Register [AIC5] */
-#define         AT91_AIC_IRQID          (0x1f << 0)             /* Current Interrupt Identifier */
-
-#define AT91_AIC_IPR            0x10c                   /* Interrupt Pending Register */
-#define AT91_AIC5_IPR0          0x20                    /* Interrupt Pending Register 0 [AIC5] */
-#define AT91_AIC5_IPR1          0x24                    /* Interrupt Pending Register 1 [AIC5] */
-#define AT91_AIC5_IPR2          0x28                    /* Interrupt Pending Register 2 [AIC5] */
-#define AT91_AIC5_IPR3          0x2c                    /* Interrupt Pending Register 3 [AIC5] */
-#define AT91_AIC_IMR            0x110                   /* Interrupt Mask Register */
-#define AT91_AIC5_IMR           0x30                    /* Interrupt Mask Register [AIC5] */
-#define AT91_AIC_CISR           0x114                   /* Core Interrupt Status Register */
-#define AT91_AIC5_CISR          0x34                    /* Core Interrupt Status Register [AIC5] */
-#define         AT91_AIC_NFIQ           (1 << 0)                /* nFIQ Status */
-#define         AT91_AIC_NIRQ           (1 << 1)                /* nIRQ Status */
-
-#define AT91_AIC_IECR           0x120                   /* Interrupt Enable Command Register */
-#define AT91_AIC5_IECR          0x40                    /* Interrupt Enable Command Register [AIC5] */
-#define AT91_AIC_IDCR           0x124                   /* Interrupt Disable Command Register */
-#define AT91_AIC5_IDCR          0x44                    /* Interrupt Disable Command Register [AIC5] */
-#define AT91_AIC_ICCR           0x128                   /* Interrupt Clear Command Register */
-#define AT91_AIC5_ICCR          0x48                    /* Interrupt Clear Command Register [AIC5] */
-#define AT91_AIC_ISCR           0x12c                   /* Interrupt Set Command Register */
-#define AT91_AIC5_ISCR          0x4c                    /* Interrupt Set Command Register [AIC5] */
-#define AT91_AIC_EOICR          0x130                   /* End of Interrupt Command Register */
-#define AT91_AIC5_EOICR         0x38                    /* End of Interrupt Command Register [AIC5] */
-#define AT91_AIC_SPU            0x134                   /* Spurious Interrupt Vector Register */
-#define AT91_AIC5_SPU           0x3c                    /* Spurious Interrupt Vector Register [AIC5] */
-#define AT91_AIC_DCR            0x138                   /* Debug Control Register */
-#define AT91_AIC5_DCR           0x6c                    /* Debug Control Register [AIC5] */
-#define         AT91_AIC_DCR_PROT       (1 << 0)                /* Protection Mode */
-#define         AT91_AIC_DCR_GMSK       (1 << 1)                /* General Mask */
-
-#define AT91_AIC_FFER           0x140                   /* Fast Forcing Enable Register [SAM9 only] */
-#define AT91_AIC5_FFER          0x50                    /* Fast Forcing Enable Register [AIC5] */
-#define AT91_AIC_FFDR           0x144                   /* Fast Forcing Disable Register [SAM9 only] */
-#define AT91_AIC5_FFDR          0x54                    /* Fast Forcing Disable Register [AIC5] */
-#define AT91_AIC_FFSR           0x148                   /* Fast Forcing Status Register [SAM9 only] */
-#define AT91_AIC5_FFSR          0x58                    /* Fast Forcing Status Register [AIC5] */
-
-void at91_aic_handle_irq(struct pt_regs *regs);
-void at91_aic5_handle_irq(struct pt_regs *regs);
-
-#endif
diff --git a/arch/arm/mach-at91/at91_rstc.h b/arch/arm/mach-at91/at91_rstc.h
deleted file mode 100644
index 875fa336800..00000000000
--- a/arch/arm/mach-at91/at91_rstc.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_rstc.h
- *
- * Copyright (C) 2007 Andrew Victor
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Reset Controller (RSTC) - System peripherals regsters.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_RSTC_H
-#define AT91_RSTC_H
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_rstc_base;
-
-#define at91_rstc_read(field) \
-        __raw_readl(at91_rstc_base + field)
-
-#define at91_rstc_write(field, value) \
-        __raw_writel(value, at91_rstc_base + field);
-#else
-.extern at91_rstc_base
-#endif
-
-#define AT91_RSTC_CR            0x00                    /* Reset Controller Control Register */
-#define         AT91_RSTC_PROCRST       (1 << 0)                /* Processor Reset */
-#define         AT91_RSTC_PERRST        (1 << 2)                /* Peripheral Reset */
-#define         AT91_RSTC_EXTRST        (1 << 3)                /* External Reset */
-#define         AT91_RSTC_KEY           (0xa5 << 24)            /* KEY Password */
-
-#define AT91_RSTC_SR            0x04                    /* Reset Controller Status Register */
-#define         AT91_RSTC_URSTS         (1 << 0)                /* User Reset Status */
-#define         AT91_RSTC_RSTTYP        (7 << 8)                /* Reset Type */
-#define                 AT91_RSTC_RSTTYP_GENERAL        (0 << 8)
-#define                 AT91_RSTC_RSTTYP_WAKEUP         (1 << 8)
-#define                 AT91_RSTC_RSTTYP_WATCHDOG       (2 << 8)
-#define                 AT91_RSTC_RSTTYP_SOFTWARE       (3 << 8)
-#define                 AT91_RSTC_RSTTYP_USER   (4 << 8)
-#define         AT91_RSTC_NRSTL         (1 << 16)               /* NRST Pin Level */
-#define         AT91_RSTC_SRCMP         (1 << 17)               /* Software Reset Command in Progress */
-
-#define AT91_RSTC_MR            0x08                    /* Reset Controller Mode Register */
-#define         AT91_RSTC_URSTEN        (1 << 0)                /* User Reset Enable */
-#define         AT91_RSTC_URSTIEN       (1 << 4)                /* User Reset Interrupt Enable */
-#define         AT91_RSTC_ERSTL         (0xf << 8)              /* External Reset Length */
-
-#endif
diff --git a/arch/arm/mach-at91/at91_shdwc.h b/arch/arm/mach-at91/at91_shdwc.h
deleted file mode 100644
index 60478ea8bd4..00000000000
--- a/arch/arm/mach-at91/at91_shdwc.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_shdwc.h
- *
- * Copyright (C) 2007 Andrew Victor
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Shutdown Controller (SHDWC) - System peripherals regsters.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_SHDWC_H
-#define AT91_SHDWC_H
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_shdwc_base;
-
-#define at91_shdwc_read(field) \
-        __raw_readl(at91_shdwc_base + field)
-
-#define at91_shdwc_write(field, value) \
-        __raw_writel(value, at91_shdwc_base + field);
-#endif
-
-#define AT91_SHDW_CR            0x00                    /* Shut Down Control Register */
-#define         AT91_SHDW_SHDW          (1    << 0)             /* Shut Down command */
-#define         AT91_SHDW_KEY           (0xa5 << 24)            /* KEY Password */
-
-#define AT91_SHDW_MR            0x04                    /* Shut Down Mode Register */
-#define         AT91_SHDW_WKMODE0       (3 << 0)                /* Wake-up 0 Mode Selection */
-#define                 AT91_SHDW_WKMODE0_NONE          0
-#define                 AT91_SHDW_WKMODE0_HIGH          1
-#define                 AT91_SHDW_WKMODE0_LOW           2
-#define                 AT91_SHDW_WKMODE0_ANYLEVEL      3
-#define         AT91_SHDW_CPTWK0_MAX    0xf                     /* Maximum Counter On Wake Up 0 */
-#define         AT91_SHDW_CPTWK0        (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
-#define                 AT91_SHDW_CPTWK0_(x)    ((x) << 4)
-#define         AT91_SHDW_RTTWKEN       (1   << 16)             /* Real Time Timer Wake-up Enable */
-#define         AT91_SHDW_RTCWKEN       (1   << 17)             /* Real Time Clock Wake-up Enable */
-
-#define AT91_SHDW_SR            0x08                    /* Shut Down Status Register */
-#define         AT91_SHDW_WAKEUP0       (1 <<  0)               /* Wake-up 0 Status */
-#define         AT91_SHDW_RTTWK         (1 << 16)               /* Real-time Timer Wake-up */
-#define         AT91_SHDW_RTCWK         (1 << 17)               /* Real-time Clock Wake-up [SAM9RL] */
-
-#endif
diff --git a/arch/arm/mach-at91/at91_tc.h b/arch/arm/mach-at91/at91_tc.h
deleted file mode 100644
index 46a317fd716..00000000000
--- a/arch/arm/mach-at91/at91_tc.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_tc.h
- *
- * Copyright (C) SAN People
- *
- * Timer/Counter Unit (TC) registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_TC_H
-#define AT91_TC_H
-
-#define AT91_TC_BCR             0xc0            /* TC Block Control Register */
-#define         AT91_TC_SYNC            (1 << 0)        /* Synchro Command */
-
-#define AT91_TC_BMR             0xc4            /* TC Block Mode Register */
-#define         AT91_TC_TC0XC0S         (3 << 0)        /* External Clock Signal 0 Selection */
-#define                 AT91_TC_TC0XC0S_TCLK0           (0 << 0)
-#define                 AT91_TC_TC0XC0S_NONE            (1 << 0)
-#define                 AT91_TC_TC0XC0S_TIOA1           (2 << 0)
-#define                 AT91_TC_TC0XC0S_TIOA2           (3 << 0)
-#define         AT91_TC_TC1XC1S         (3 << 2)        /* External Clock Signal 1 Selection */
-#define                 AT91_TC_TC1XC1S_TCLK1           (0 << 2)
-#define                 AT91_TC_TC1XC1S_NONE            (1 << 2)
-#define                 AT91_TC_TC1XC1S_TIOA0           (2 << 2)
-#define                 AT91_TC_TC1XC1S_TIOA2           (3 << 2)
-#define         AT91_TC_TC2XC2S         (3 << 4)        /* External Clock Signal 2 Selection */
-#define                 AT91_TC_TC2XC2S_TCLK2           (0 << 4)
-#define                 AT91_TC_TC2XC2S_NONE            (1 << 4)
-#define                 AT91_TC_TC2XC2S_TIOA0           (2 << 4)
-#define                 AT91_TC_TC2XC2S_TIOA1           (3 << 4)
-
-
-#define AT91_TC_CCR             0x00            /* Channel Control Register */
-#define         AT91_TC_CLKEN           (1 << 0)        /* Counter Clock Enable Command */
-#define         AT91_TC_CLKDIS          (1 << 1)        /* Counter CLock Disable Command */
-#define         AT91_TC_SWTRG           (1 << 2)        /* Software Trigger Command */
-
-#define AT91_TC_CMR             0x04            /* Channel Mode Register */
-#define         AT91_TC_TCCLKS          (7 << 0)        /* Capture/Waveform Mode: Clock Selection */
-#define                 AT91_TC_TIMER_CLOCK1            (0 << 0)
-#define                 AT91_TC_TIMER_CLOCK2            (1 << 0)
-#define                 AT91_TC_TIMER_CLOCK3            (2 << 0)
-#define                 AT91_TC_TIMER_CLOCK4            (3 << 0)
-#define                 AT91_TC_TIMER_CLOCK5            (4 << 0)
-#define                 AT91_TC_XC0                     (5 << 0)
-#define                 AT91_TC_XC1                     (6 << 0)
-#define                 AT91_TC_XC2                     (7 << 0)
-#define         AT91_TC_CLKI            (1 << 3)        /* Capture/Waveform Mode: Clock Invert */
-#define         AT91_TC_BURST           (3 << 4)        /* Capture/Waveform Mode: Burst Signal Selection */
-#define         AT91_TC_LDBSTOP         (1 << 6)        /* Capture Mode: Counter Clock Stopped with TB Loading */
-#define         AT91_TC_LDBDIS          (1 << 7)        /* Capture Mode: Counter Clock Disable with RB Loading */
-#define         AT91_TC_ETRGEDG         (3 << 8)        /* Capture Mode: External Trigger Edge Selection */
-#define         AT91_TC_ABETRG          (1 << 10)       /* Capture Mode: TIOA or TIOB External Trigger Selection */
-#define         AT91_TC_CPCTRG          (1 << 14)       /* Capture Mode: RC Compare Trigger Enable */
-#define         AT91_TC_WAVE            (1 << 15)       /* Capture/Waveform mode */
-#define         AT91_TC_LDRA            (3 << 16)       /* Capture Mode: RA Loading Selection */
-#define         AT91_TC_LDRB            (3 << 18)       /* Capture Mode: RB Loading Selection */
-
-#define         AT91_TC_CPCSTOP         (1 <<  6)       /* Waveform Mode: Counter Clock Stopped with RC Compare */
-#define         AT91_TC_CPCDIS          (1 <<  7)       /* Waveform Mode: Counter Clock Disable with RC Compare */
-#define         AT91_TC_EEVTEDG         (3 <<  8)       /* Waveform Mode: External Event Edge Selection */
-#define                 AT91_TC_EEVTEDG_NONE            (0 << 8)
-#define                 AT91_TC_EEVTEDG_RISING          (1 << 8)
-#define                 AT91_TC_EEVTEDG_FALLING         (2 << 8)
-#define                 AT91_TC_EEVTEDG_BOTH            (3 << 8)
-#define         AT91_TC_EEVT            (3 << 10)       /* Waveform Mode: External Event Selection */
-#define                 AT91_TC_EEVT_TIOB               (0 << 10)
-#define                 AT91_TC_EEVT_XC0                (1 << 10)
-#define                 AT91_TC_EEVT_XC1                (2 << 10)
-#define                 AT91_TC_EEVT_XC2                (3 << 10)
-#define         AT91_TC_ENETRG          (1 << 12)       /* Waveform Mode: External Event Trigger Enable */
-#define         AT91_TC_WAVESEL         (3 << 13)       /* Waveform Mode: Waveform Selection */
-#define                 AT91_TC_WAVESEL_UP              (0 << 13)
-#define                 AT91_TC_WAVESEL_UP_AUTO         (2 << 13)
-#define                 AT91_TC_WAVESEL_UPDOWN          (1 << 13)
-#define                 AT91_TC_WAVESEL_UPDOWN_AUTO     (3 << 13)
-#define         AT91_TC_ACPA            (3 << 16)       /* Waveform Mode: RA Compare Effect on TIOA */
-#define                 AT91_TC_ACPA_NONE               (0 << 16)
-#define                 AT91_TC_ACPA_SET                (1 << 16)
-#define                 AT91_TC_ACPA_CLEAR              (2 << 16)
-#define                 AT91_TC_ACPA_TOGGLE             (3 << 16)
-#define         AT91_TC_ACPC            (3 << 18)       /* Waveform Mode: RC Compre Effect on TIOA */
-#define                 AT91_TC_ACPC_NONE               (0 << 18)
-#define                 AT91_TC_ACPC_SET                (1 << 18)
-#define                 AT91_TC_ACPC_CLEAR              (2 << 18)
-#define                 AT91_TC_ACPC_TOGGLE             (3 << 18)
-#define         AT91_TC_AEEVT           (3 << 20)       /* Waveform Mode: External Event Effect on TIOA */
-#define                 AT91_TC_AEEVT_NONE              (0 << 20)
-#define                 AT91_TC_AEEVT_SET               (1 << 20)
-#define                 AT91_TC_AEEVT_CLEAR             (2 << 20)
-#define                 AT91_TC_AEEVT_TOGGLE            (3 << 20)
-#define         AT91_TC_ASWTRG          (3 << 22)       /* Waveform Mode: Software Trigger Effect on TIOA */
-#define                 AT91_TC_ASWTRG_NONE             (0 << 22)
-#define                 AT91_TC_ASWTRG_SET              (1 << 22)
-#define                 AT91_TC_ASWTRG_CLEAR            (2 << 22)
-#define                 AT91_TC_ASWTRG_TOGGLE           (3 << 22)
-#define         AT91_TC_BCPB            (3 << 24)       /* Waveform Mode: RB Compare Effect on TIOB */
-#define                 AT91_TC_BCPB_NONE               (0 << 24)
-#define                 AT91_TC_BCPB_SET                (1 << 24)
-#define                 AT91_TC_BCPB_CLEAR              (2 << 24)
-#define                 AT91_TC_BCPB_TOGGLE             (3 << 24)
-#define         AT91_TC_BCPC            (3 << 26)       /* Waveform Mode: RC Compare Effect on TIOB */
-#define                 AT91_TC_BCPC_NONE               (0 << 26)
-#define                 AT91_TC_BCPC_SET                (1 << 26)
-#define                 AT91_TC_BCPC_CLEAR              (2 << 26)
-#define                 AT91_TC_BCPC_TOGGLE             (3 << 26)
-#define         AT91_TC_BEEVT           (3 << 28)       /* Waveform Mode: External Event Effect on TIOB */
-#define                 AT91_TC_BEEVT_NONE              (0 << 28)
-#define                 AT91_TC_BEEVT_SET               (1 << 28)
-#define                 AT91_TC_BEEVT_CLEAR             (2 << 28)
-#define                 AT91_TC_BEEVT_TOGGLE            (3 << 28)
-#define         AT91_TC_BSWTRG          (3 << 30)       /* Waveform Mode: Software Trigger Effect on TIOB */
-#define                 AT91_TC_BSWTRG_NONE             (0 << 30)
-#define                 AT91_TC_BSWTRG_SET              (1 << 30)
-#define                 AT91_TC_BSWTRG_CLEAR            (2 << 30)
-#define                 AT91_TC_BSWTRG_TOGGLE           (3 << 30)
-
-#define AT91_TC_CV              0x10            /* Counter Value */
-#define AT91_TC_RA              0x14            /* Register A */
-#define AT91_TC_RB              0x18            /* Register B */
-#define AT91_TC_RC              0x1c            /* Register C */
-
-#define AT91_TC_SR              0x20            /* Status Register */
-#define         AT91_TC_COVFS           (1 <<  0)       /* Counter Overflow Status */
-#define         AT91_TC_LOVRS           (1 <<  1)       /* Load Overrun Status */
-#define         AT91_TC_CPAS            (1 <<  2)       /* RA Compare Status */
-#define         AT91_TC_CPBS            (1 <<  3)       /* RB Compare Status */
-#define         AT91_TC_CPCS            (1 <<  4)       /* RC Compare Status */
-#define         AT91_TC_LDRAS           (1 <<  5)       /* RA Loading Status */
-#define         AT91_TC_LDRBS           (1 <<  6)       /* RB Loading Status */
-#define         AT91_TC_ETRGS           (1 <<  7)       /* External Trigger Status */
-#define         AT91_TC_CLKSTA          (1 << 16)       /* Clock Enabling Status */
-#define         AT91_TC_MTIOA           (1 << 17)       /* TIOA Mirror */
-#define         AT91_TC_MTIOB           (1 << 18)       /* TIOB Mirror */
-
-#define AT91_TC_IER             0x24            /* Interrupt Enable Register */
-#define AT91_TC_IDR             0x28            /* Interrupt Disable Register */
-#define AT91_TC_IMR             0x2c            /* Interrupt Mask Register */
-
-#endif
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 7aeb473ee53..f73302dbc6a 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -15,17 +15,23 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/system_misc.h>
 #include <mach/at91rm9200.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_st.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
-#include "sam9_smc.h"
+
+static struct map_desc at91rm9200_io_desc[] __initdata = {
+        {
+                .virtual        = AT91_VA_BASE_EMAC,
+                .pfn            = __phys_to_pfn(AT91RM9200_BASE_EMAC),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        },
+};
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -184,37 +190,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffd0000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffd4000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffd8000.ssc", &ssc2_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
-        CLKDEV_CON_ID("pioA", &pioA_clk),
-        CLKDEV_CON_ID("pioB", &pioB_clk),
-        CLKDEV_CON_ID("pioC", &pioC_clk),
-        CLKDEV_CON_ID("pioD", &pioD_clk),
-        /* usart lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
-        CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
-        /* tc lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
-        CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
-        CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
-        CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
-        CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
-        CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -272,42 +250,49 @@ static void __init at91rm9200_register_clocks(void)
         clk_register(&pck3);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91rm9200_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
+static struct at91_gpio_bank at91rm9200_gpio[] = {
         {
                 .id             = AT91RM9200_ID_PIOA,
-                .regbase        = AT91RM9200_BASE_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
         }, {
                 .id             = AT91RM9200_ID_PIOB,
-                .regbase        = AT91RM9200_BASE_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
         }, {
                 .id             = AT91RM9200_ID_PIOC,
-                .regbase        = AT91RM9200_BASE_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
         }, {
                 .id             = AT91RM9200_ID_PIOD,
-                .regbase        = AT91RM9200_BASE_PIOD,
+                .offset         = AT91_PIOD,
+                .clock          = &pioD_clk,
         }
 };
 
-static void at91rm9200_idle(void)
-{
-        /*
-         * Disable the processor clock.  The processor will be automatically
-         * re-enabled by an interrupt or by a reset.
-         */
-        at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
-}
-
-static void at91rm9200_restart(char mode, const char *cmd)
+static void at91rm9200_reset(void)
 {
         /*
          * Perform a hardware reset with the use of the Watchdog timer.
          */
-        at91_st_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
-        at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
+        at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
+        at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
 }
 
 /* --------------------------------------------------------------------
@@ -317,18 +302,12 @@ static void __init at91rm9200_map_io(void)
 {
         /* Map peripherals */
         at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
-}
-
-static void __init at91rm9200_ioremap_registers(void)
-{
-        at91rm9200_ioremap_st(AT91RM9200_BASE_ST);
-        at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256);
+        iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
 }
 
 static void __init at91rm9200_initialize(void)
 {
-        arm_pm_idle = at91rm9200_idle;
-        arm_pm_restart = at91rm9200_restart;
+        at91_arch_reset = at91rm9200_reset;
         at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                         | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
                         | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
@@ -382,10 +361,9 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0       /* Advanced Interrupt Controller (IRQ6) */
 };
 
-AT91_SOC_START(rm9200)
+struct at91_init_soc __initdata at91rm9200_soc = {
         .map_io = at91rm9200_map_io,
         .default_irq_priority = at91rm9200_default_irq_priority,
-        .ioremap_registers = at91rm9200_ioremap_registers,
         .register_clocks = at91rm9200_register_clocks,
         .init = at91rm9200_initialize,
-AT91_SOC_END
+};
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 3ebc9792560..e596f45e042 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -14,15 +14,14 @@
 #include <asm/mach/map.h>
 
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91rm9200.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 
-#include "board.h"
 #include "generic.h"
 
 
@@ -41,8 +40,8 @@ static struct resource usbh_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
+                .start  = AT91RM9200_ID_UHP,
+                .end    = AT91RM9200_ID_UHP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -61,17 +60,9 @@ static struct platform_device at91rm9200_usbh_device = {
 
 void __init at91_add_device_usbh(struct at91_usbh_data *data)
 {
-        int i;
-
         if (!data)
                 return;
 
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->overcurrent_pin[i]))
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
-        }
-
         usbh_data = *data;
         platform_device_register(&at91rm9200_usbh_device);
 }
@@ -84,7 +75,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -94,8 +85,8 @@ static struct resource udc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
+                .start  = AT91RM9200_ID_UDP,
+                .end    = AT91RM9200_ID_UDP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -115,11 +106,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->vbus_pin)) {
+        if (data->vbus_pin) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
-        if (gpio_is_valid(data->pullup_pin))
+        if (data->pullup_pin)
                 at91_set_gpio_output(data->pullup_pin, 0);
 
         udc_data = *data;
@@ -136,17 +127,17 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 
 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
+static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
-                .start  = AT91RM9200_BASE_EMAC,
-                .end    = AT91RM9200_BASE_EMAC + SZ_16K - 1,
+                .start  = AT91_VA_BASE_EMAC,
+                .end    = AT91_VA_BASE_EMAC + SZ_16K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
+                .start  = AT91RM9200_ID_EMAC,
+                .end    = AT91RM9200_ID_EMAC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -163,12 +154,12 @@ static struct platform_device at91rm9200_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct macb_platform_data *data)
+void __init at91_add_device_eth(struct at91_eth_data *data)
 {
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->phy_irq_pin)) {
+        if (data->phy_irq_pin) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -200,7 +191,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
         platform_device_register(&at91rm9200_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
+void __init at91_add_device_eth(struct at91_eth_data *data) {}
 #endif
 
 
@@ -242,15 +233,15 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
 
         /* CF takes over CS4, CS5, CS6 */
-        csa = at91_ramc_read(0, AT91_EBI_CSA);
-        at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
+        csa = at91_sys_read(AT91_EBI_CSA);
+        at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
 
         /*
          * Static memory controller timing adjustments.
          * REVISIT:  these timings are in terms of MCK cycles, so
          * when MCK changes (cpufreq etc) so must these values...
          */
-        at91_ramc_write(0, AT91_SMC_CSR(4),
+        at91_sys_write(AT91_SMC_CSR(4),
                                   AT91_SMC_ACSS_STD
                                 | AT91_SMC_DBW_16
                                 | AT91_SMC_BAT
@@ -261,7 +252,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         );
 
         /* input/irq */
-        if (gpio_is_valid(data->irq_pin)) {
+        if (data->irq_pin) {
                 at91_set_gpio_input(data->irq_pin, 1);
                 at91_set_deglitch(data->irq_pin, 1);
         }
@@ -269,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         at91_set_deglitch(data->det_pin, 1);
 
         /* outputs, initially off */
-        if (gpio_is_valid(data->vcc_pin))
+        if (data->vcc_pin)
                 at91_set_gpio_output(data->vcc_pin, 0);
         at91_set_gpio_output(data->rst_pin, 0);
 
@@ -294,9 +285,9 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {}
  *  MMC / SD
  * -------------------------------------------------------------------- */
 
-#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct mci_platform_data mmc_data;
+static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
         [0] = {
@@ -305,14 +296,14 @@ static struct resource mmc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
+                .start  = AT91RM9200_ID_MCI,
+                .end    = AT91RM9200_ID_MCI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91rm9200_mmc_device = {
-        .name           = "atmel_mci",
+        .name           = "at91_mci",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
@@ -323,69 +314,53 @@ static struct platform_device at91rm9200_mmc_device = {
         .num_resources  = ARRAY_SIZE(mmc_resources),
 };
 
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 {
-        unsigned int i;
-        unsigned int slot_count = 0;
-
         if (!data)
                 return;
 
-        for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        /* CLK */
+        at91_set_A_periph(AT91_PIN_PA27, 0);
 
-                if (!data->slot[i].bus_width)
-                        continue;
+        if (data->slot_b) {
+                /* CMD */
+                at91_set_B_periph(AT91_PIN_PA8, 1);
 
-                /* input/irq */
-                if (gpio_is_valid(data->slot[i].detect_pin)) {
-                        at91_set_gpio_input(data->slot[i].detect_pin, 1);
-                        at91_set_deglitch(data->slot[i].detect_pin, 1);
-                }
-                if (gpio_is_valid(data->slot[i].wp_pin))
-                        at91_set_gpio_input(data->slot[i].wp_pin, 1);
-
-                switch (i) {
-                case 0:                                 /* slot A */
-                        /* CMD */
-                        at91_set_A_periph(AT91_PIN_PA28, 1);
-                        /* DAT0, maybe DAT1..DAT3 */
-                        at91_set_A_periph(AT91_PIN_PA29, 1);
-                        if (data->slot[i].bus_width == 4) {
-                                at91_set_B_periph(AT91_PIN_PB3, 1);
-                                at91_set_B_periph(AT91_PIN_PB4, 1);
-                                at91_set_B_periph(AT91_PIN_PB5, 1);
-                        }
-                        slot_count++;
-                        break;
-                case 1:                                 /* slot B */
-                        /* CMD */
-                        at91_set_B_periph(AT91_PIN_PA8, 1);
-                        /* DAT0, maybe DAT1..DAT3 */
-                        at91_set_B_periph(AT91_PIN_PA9, 1);
-                        if (data->slot[i].bus_width == 4) {
-                                at91_set_B_periph(AT91_PIN_PA10, 1);
-                                at91_set_B_periph(AT91_PIN_PA11, 1);
-                                at91_set_B_periph(AT91_PIN_PA12, 1);
-                        }
-                        slot_count++;
-                        break;
-                default:
-                        printk(KERN_ERR
-                               "AT91: SD/MMC slot %d not available\n", i);
-                        break;
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_B_periph(AT91_PIN_PA9, 1);
+                if (data->wire4) {
+                        at91_set_B_periph(AT91_PIN_PA10, 1);
+                        at91_set_B_periph(AT91_PIN_PA11, 1);
+                        at91_set_B_periph(AT91_PIN_PA12, 1);
                 }
-                if (slot_count) {
-                        /* CLK */
-                        at91_set_A_periph(AT91_PIN_PA27, 0);
-
-                        mmc_data = *data;
-                        platform_device_register(&at91rm9200_mmc_device);
+        } else {
+                /* CMD */
+                at91_set_A_periph(AT91_PIN_PA28, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_A_periph(AT91_PIN_PA29, 1);
+                if (data->wire4) {
+                        at91_set_B_periph(AT91_PIN_PB3, 1);
+                        at91_set_B_periph(AT91_PIN_PB4, 1);
+                        at91_set_B_periph(AT91_PIN_PB5, 1);
                 }
         }
 
+        mmc_data = *data;
+        platform_device_register(&at91rm9200_mmc_device);
 }
 #else
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 #endif
 
 
@@ -424,11 +399,11 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
                 return;
 
         /* enable the address range of CS3 */
-        csa = at91_ramc_read(0, AT91_EBI_CSA);
-        at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
+        csa = at91_sys_read(AT91_EBI_CSA);
+        at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* set the bus interface characteristics */
-        at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
+        at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
                 | AT91_SMC_NWS_(5)
                 | AT91_SMC_TDF_(1)
                 | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
@@ -436,15 +411,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         );
 
         /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
+        if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
+        if (data->rdy_pin)
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
+        if (data->det_pin)
                 at91_set_gpio_input(data->det_pin, 1);
 
         at91_set_A_periph(AT91_PIN_PC1, 0);             /* SMOE */
@@ -479,7 +454,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91rm9200_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = 0,
+        .id                     = -1,
         .dev.platform_data      = &pdata,
 };
 
@@ -504,15 +479,15 @@ static struct resource twi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
+                .start  = AT91RM9200_ID_TWI,
+                .end    = AT91RM9200_ID_TWI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91rm9200_twi_device = {
-        .name           = "i2c-at91rm9200",
-        .id             = 0,
+        .name           = "at91_i2c",
+        .id             = -1,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
@@ -548,8 +523,8 @@ static struct resource spi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
+                .start  = AT91RM9200_ID_SPI,
+                .end    = AT91RM9200_ID_SPI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -614,18 +589,18 @@ static struct resource tcb0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
+                .start  = AT91RM9200_ID_TC0,
+                .end    = AT91RM9200_ID_TC0,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
+                .start  = AT91RM9200_ID_TC1,
+                .end    = AT91RM9200_ID_TC1,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
+                .start  = AT91RM9200_ID_TC2,
+                .end    = AT91RM9200_ID_TC2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -644,18 +619,18 @@ static struct resource tcb1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
+                .start  = AT91RM9200_ID_TC3,
+                .end    = AT91RM9200_ID_TC3,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
+                .start  = AT91RM9200_ID_TC4,
+                .end    = AT91RM9200_ID_TC4,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
+                .start  = AT91RM9200_ID_TC5,
+                .end    = AT91RM9200_ID_TC5,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -682,24 +657,10 @@ static void __init at91_add_device_tc(void) { }
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
-static struct resource rtc_resources[] = {
-        [0] = {
-                .start  = AT91RM9200_BASE_RTC,
-                .end    = AT91RM9200_BASE_RTC + SZ_256 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
 static struct platform_device at91rm9200_rtc_device = {
         .name           = "at91_rtc",
         .id             = -1,
-        .resource       = rtc_resources,
-        .num_resources  = ARRAY_SIZE(rtc_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_rtc(void)
@@ -745,14 +706,14 @@ static struct resource ssc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
+                .start  = AT91RM9200_ID_SSC0,
+                .end    = AT91RM9200_ID_SSC0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91rm9200_ssc0_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 0,
         .dev    = {
                 .dma_mask               = &ssc0_dmamask,
@@ -787,14 +748,14 @@ static struct resource ssc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
+                .start  = AT91RM9200_ID_SSC1,
+                .end    = AT91RM9200_ID_SSC1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91rm9200_ssc1_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 1,
         .dev    = {
                 .dma_mask               = &ssc1_dmamask,
@@ -829,14 +790,14 @@ static struct resource ssc2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
+                .start  = AT91RM9200_ID_SSC2,
+                .end    = AT91RM9200_ID_SSC2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91rm9200_ssc2_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 2,
         .dev    = {
                 .dma_mask               = &ssc2_dmamask,
@@ -908,13 +869,13 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91RM9200_BASE_DBGU,
-                .end    = AT91RM9200_BASE_DBGU + SZ_512 - 1,
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -922,6 +883,7 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@@ -951,8 +913,8 @@ static struct resource uart0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
+                .start  = AT91RM9200_ID_US0,
+                .end    = AT91RM9200_ID_US0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1000,8 +962,8 @@ static struct resource uart1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
+                .start  = AT91RM9200_ID_US1,
+                .end    = AT91RM9200_ID_US1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1051,8 +1013,8 @@ static struct resource uart2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
+                .start  = AT91RM9200_ID_US2,
+                .end    = AT91RM9200_ID_US2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1094,8 +1056,8 @@ static struct resource uart3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
-                .end    = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
+                .start  = AT91RM9200_ID_US3,
+                .end    = AT91RM9200_ID_US3,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1131,6 +1093,7 @@ static inline void configure_usart3_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1168,6 +1131,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                 at91_uarts[portnr] = pdev;
 }
 
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART) {
+                atmel_default_console_device = at91_uarts[portnr];
+                at91rm9200_set_console_clock(at91_uarts[portnr]->id);
+        }
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -1176,9 +1147,14 @@ void __init at91_add_device_serial(void)
                 if (at91_uarts[i])
                         platform_device_register(at91_uarts[i]);
         }
+
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 #else
+void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index cafe98836c8..1dd69c85dfe 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -23,10 +23,6 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/clockchips.h>
-#include <linux/export.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 
@@ -36,8 +32,6 @@ static unsigned long last_crtr;
 static u32 irqmask;
 static struct clock_event_device clkevt;
 
-#define RM9200_TIMER_LATCH      ((AT91_SLOW_CLOCK + HZ/2) / HZ)
-
 /*
  * The ST_CRTR is updated asynchronously to the master clock ... but
  * the updates as seen by the CPU don't seem to be strictly monotonic.
@@ -47,9 +41,9 @@ static inline unsigned long read_CRTR(void)
 {
         unsigned long x1, x2;
 
-        x1 = at91_st_read(AT91_ST_CRTR);
+        x1 = at91_sys_read(AT91_ST_CRTR);
         do {
-                x2 = at91_st_read(AT91_ST_CRTR);
+                x2 = at91_sys_read(AT91_ST_CRTR);
                 if (x1 == x2)
                         break;
                 x1 = x2;
@@ -62,7 +56,7 @@ static inline unsigned long read_CRTR(void)
  */
 static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
 {
-        u32     sr = at91_st_read(AT91_ST_SR) & irqmask;
+        u32     sr = at91_sys_read(AT91_ST_SR) & irqmask;
 
         /*
          * irqs should be disabled here, but as the irq is shared they are only
@@ -80,8 +74,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
         if (sr & AT91_ST_PITS) {
                 u32     crtr = read_CRTR();
 
-                while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) {
-                        last_crtr += RM9200_TIMER_LATCH;
+                while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) {
+                        last_crtr += LATCH;
                         clkevt.event_handler(&clkevt);
                 }
                 return IRQ_HANDLED;
@@ -94,8 +88,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
 static struct irqaction at91rm9200_timer_irq = {
         .name           = "at91_tick",
         .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = at91rm9200_timer_interrupt,
-        .irq            = NR_IRQS_LEGACY + AT91_ID_SYS,
+        .handler        = at91rm9200_timer_interrupt
 };
 
 static cycle_t read_clk32k(struct clocksource *cs)
@@ -115,22 +108,22 @@ static void
 clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
         /* Disable and flush pending timer interrupts */
-        at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
-        at91_st_read(AT91_ST_SR);
+        at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
+        (void) at91_sys_read(AT91_ST_SR);
 
         last_crtr = read_CRTR();
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 /* PIT for periodic irqs; fixed rate of 1/HZ */
                 irqmask = AT91_ST_PITS;
-                at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
+                at91_sys_write(AT91_ST_PIMR, LATCH);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* ALM for oneshot irqs, set by next_event()
                  * before 32 seconds have passed
                  */
                 irqmask = AT91_ST_ALMS;
-                at91_st_write(AT91_ST_RTAR, last_crtr);
+                at91_sys_write(AT91_ST_RTAR, last_crtr);
                 break;
         case CLOCK_EVT_MODE_SHUTDOWN:
         case CLOCK_EVT_MODE_UNUSED:
@@ -138,7 +131,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
                 irqmask = 0;
                 break;
         }
-        at91_st_write(AT91_ST_IER, irqmask);
+        at91_sys_write(AT91_ST_IER, irqmask);
 }
 
 static int
@@ -161,12 +154,12 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
         alm = read_CRTR();
 
         /* Cancel any pending alarm; flush any pending IRQ */
-        at91_st_write(AT91_ST_RTAR, alm);
-        at91_st_read(AT91_ST_SR);
+        at91_sys_write(AT91_ST_RTAR, alm);
+        (void) at91_sys_read(AT91_ST_SR);
 
         /* Schedule alarm by writing RTAR. */
         alm += delta;
-        at91_st_write(AT91_ST_RTAR, alm);
+        at91_sys_write(AT91_ST_RTAR, alm);
 
         return status;
 }
@@ -180,89 +173,24 @@ static struct clock_event_device clkevt = {
         .set_mode       = clkevt32k_mode,
 };
 
-void __iomem *at91_st_base;
-EXPORT_SYMBOL_GPL(at91_st_base);
-
-#ifdef CONFIG_OF
-static struct of_device_id at91rm9200_st_timer_ids[] = {
-        { .compatible = "atmel,at91rm9200-st" },
-        { /* sentinel */ }
-};
-
-static int __init of_at91rm9200_st_init(void)
-{
-        struct device_node *np;
-        int ret;
-
-        np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
-        if (!np)
-                goto err;
-
-        at91_st_base = of_iomap(np, 0);
-        if (!at91_st_base)
-                goto node_err;
-
-        /* Get the interrupts property */
-        ret = irq_of_parse_and_map(np, 0);
-        if (!ret)
-                goto ioremap_err;
-        at91rm9200_timer_irq.irq = ret;
-
-        of_node_put(np);
-
-        return 0;
-
-ioremap_err:
-        iounmap(at91_st_base);
-node_err:
-        of_node_put(np);
-err:
-        return -EINVAL;
-}
-#else
-static int __init of_at91rm9200_st_init(void)
-{
-        return -EINVAL;
-}
-#endif
-
-void __init at91rm9200_ioremap_st(u32 addr)
-{
-#ifdef CONFIG_OF
-        struct device_node *np;
-
-        np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
-        if (np) {
-                of_node_put(np);
-                return;
-        }
-#endif
-        at91_st_base = ioremap(addr, 256);
-        if (!at91_st_base)
-                panic("Impossible to ioremap ST\n");
-}
-
 /*
  * ST (system timer) module supports both clockevents and clocksource.
  */
 void __init at91rm9200_timer_init(void)
 {
-        /* For device tree enabled device: initialize here */
-        of_at91rm9200_st_init();
-
         /* Disable all timer interrupts, and clear any pending ones */
-        at91_st_write(AT91_ST_IDR,
+        at91_sys_write(AT91_ST_IDR,
                 AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
-        at91_st_read(AT91_ST_SR);
+        (void) at91_sys_read(AT91_ST_SR);
 
         /* Make IRQs happen for the system timer */
-        setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
+        setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
 
         /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
          * directly for the clocksource and all clockevents, after adjusting
          * its prescaler from the 1 Hz default.
          */
-        at91_st_write(AT91_ST_RTMR, 1);
+        at91_sys_write(AT91_ST_RTMR, 1);
 
         /* Setup timer clockevent, with minimum of two ticks (important!!) */
         clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b67cd537411..de4036f6ab3 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,23 +11,21 @@
  */
 
 #include <linux/module.h>
+#include <linux/pm.h>
 
-#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9260.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_rstc.h>
+#include <mach/at91_shdwc.h>
 
-#include "at91_aic.h"
-#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
-#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -56,13 +54,6 @@ static struct clk adc_clk = {
         .pmc_mask       = 1 << AT91SAM9260_ID_ADC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
-
-static struct clk adc_op_clk = {
-        .name           = "adc_op_clk",
-        .type           = CLK_TYPE_PERIPHERAL,
-        .rate_hz        = 5000000,
-};
-
 static struct clk usart0_clk = {
         .name           = "usart0_clk",
         .pmc_mask       = 1 << AT91SAM9260_ID_US0,
@@ -129,7 +120,7 @@ static struct clk ohci_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "pclk",
+        .name           = "macb_clk",
         .pmc_mask       = 1 << AT91SAM9260_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -174,7 +165,6 @@ static struct clk *periph_clocks[] __initdata = {
         &pioB_clk,
         &pioC_clk,
         &adc_clk,
-        &adc_op_clk,
         &usart0_clk,
         &usart1_clk,
         &usart2_clk,
@@ -200,8 +190,6 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
-        /* One additional fake clock for macb_hclk */
-        CLKDEV_CON_ID("hclk", &macb_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
@@ -210,36 +198,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
-        /* more usart lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
-        CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
-        CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
-        /* more tc lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
-        CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
-        CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
-        CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
-        CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
-        CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
-        CLKDEV_CON_ID("pioA", &pioA_clk),
-        CLKDEV_CON_ID("pioB", &pioB_clk),
-        CLKDEV_CON_ID("pioC", &pioC_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -285,23 +244,44 @@ static void __init at91sam9260_register_clocks(void)
         clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9260_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
+static struct at91_gpio_bank at91sam9260_gpio[] = {
         {
                 .id             = AT91SAM9260_ID_PIOA,
-                .regbase        = AT91SAM9260_BASE_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
         }, {
                 .id             = AT91SAM9260_ID_PIOB,
-                .regbase        = AT91SAM9260_BASE_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
         }, {
                 .id             = AT91SAM9260_ID_PIOC,
-                .regbase        = AT91SAM9260_BASE_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
         }
 };
 
+static void at91sam9260_poweroff(void)
+{
+        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+
 /* --------------------------------------------------------------------
  *  AT91SAM9260 processor initialization
  * -------------------------------------------------------------------- */
@@ -324,28 +304,21 @@ static void __init at91sam9xe_map_io(void)
 
 static void __init at91sam9260_map_io(void)
 {
-        if (cpu_is_at91sam9xe())
+        if (cpu_is_at91sam9xe()) {
                 at91sam9xe_map_io();
-        else if (cpu_is_at91sam9g20())
-                at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE);
-        else
-                at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
-}
-
-static void __init at91sam9260_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
-        at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
-        at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
-        at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
-        at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
+        } else if (cpu_is_at91sam9g20()) {
+                at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
+                at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
+        } else {
+                at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
+                at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
+        }
 }
 
 static void __init at91sam9260_initialize(void)
 {
-        arm_pm_idle = at91sam9_idle;
-        arm_pm_restart = at91sam9_alt_restart;
+        at91_arch_reset = at91sam9_alt_reset;
+        pm_power_off = at91sam9260_poweroff;
         at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                         | (1 << AT91SAM9260_ID_IRQ2);
 
@@ -395,10 +368,9 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller */
 };
 
-AT91_SOC_START(sam9260)
+struct at91_init_soc __initdata at91sam9260_soc = {
         .map_io = at91sam9260_map_io,
         .default_irq_priority = at91sam9260_default_irq_priority,
-        .ioremap_registers = at91sam9260_ioremap_registers,
         .register_clocks = at91sam9260_register_clocks,
         .init = at91sam9260_initialize,
-AT91_SOC_END
+};
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index eda8d1679d4..ec2572653d0 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -13,20 +13,16 @@
 #include <asm/mach/map.h>
 
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
-#include <linux/platform_data/at91_adc.h>
-
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9260.h>
 #include <mach/at91sam9260_matrix.h>
-#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
-#include <mach/at91_adc.h>
 
-#include "board.h"
 #include "generic.h"
 
 
@@ -45,8 +41,8 @@ static struct resource usbh_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
+                .start  = AT91SAM9260_ID_UHP,
+                .end    = AT91SAM9260_ID_UHP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -65,17 +61,9 @@ static struct platform_device at91_usbh_device = {
 
 void __init at91_add_device_usbh(struct at91_usbh_data *data)
 {
-        int i;
-
         if (!data)
                 return;
 
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->overcurrent_pin[i]))
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
-        }
-
         usbh_data = *data;
         platform_device_register(&at91_usbh_device);
 }
@@ -88,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -98,8 +86,8 @@ static struct resource udc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
+                .start  = AT91SAM9260_ID_UDP,
+                .end    = AT91SAM9260_ID_UDP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -119,7 +107,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->vbus_pin)) {
+        if (data->vbus_pin) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
@@ -140,7 +128,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
+static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -149,8 +137,8 @@ static struct resource eth_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
+                .start  = AT91SAM9260_ID_EMAC,
+                .end    = AT91SAM9260_ID_EMAC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -167,12 +155,12 @@ static struct platform_device at91sam9260_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct macb_platform_data *data)
+void __init at91_add_device_eth(struct at91_eth_data *data)
 {
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->phy_irq_pin)) {
+        if (data->phy_irq_pin) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -204,15 +192,97 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
         platform_device_register(&at91sam9260_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
+void __init at91_add_device_eth(struct at91_eth_data *data) {}
 #endif
 
 
 /* --------------------------------------------------------------------
+ *  MMC / SD
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
+static struct at91_mmc_data mmc_data;
+
+static struct resource mmc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_MCI,
+                .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_MCI,
+                .end    = AT91SAM9260_ID_MCI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_mmc_device = {
+        .name           = "at91_mci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &mmc_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &mmc_data,
+        },
+        .resource       = mmc_resources,
+        .num_resources  = ARRAY_SIZE(mmc_resources),
+};
+
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
+{
+        if (!data)
+                return;
+
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        /* CLK */
+        at91_set_A_periph(AT91_PIN_PA8, 0);
+
+        if (data->slot_b) {
+                /* CMD */
+                at91_set_B_periph(AT91_PIN_PA1, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_B_periph(AT91_PIN_PA0, 1);
+                if (data->wire4) {
+                        at91_set_B_periph(AT91_PIN_PA5, 1);
+                        at91_set_B_periph(AT91_PIN_PA4, 1);
+                        at91_set_B_periph(AT91_PIN_PA3, 1);
+                }
+        } else {
+                /* CMD */
+                at91_set_A_periph(AT91_PIN_PA7, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_A_periph(AT91_PIN_PA6, 1);
+                if (data->wire4) {
+                        at91_set_A_periph(AT91_PIN_PA9, 1);
+                        at91_set_A_periph(AT91_PIN_PA10, 1);
+                        at91_set_A_periph(AT91_PIN_PA11, 1);
+                }
+        }
+
+        mmc_data = *data;
+        platform_device_register(&at91sam9260_mmc_device);
+}
+#else
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
+#endif
+
+/* --------------------------------------------------------------------
  *  MMC / SD Slot for Atmel MCI Driver
  * -------------------------------------------------------------------- */
 
-#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 static struct mci_platform_data mmc_data;
 
@@ -223,8 +293,8 @@ static struct resource mmc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
+                .start  = AT91SAM9260_ID_MCI,
+                .end    = AT91SAM9260_ID_MCI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -249,14 +319,14 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
         if (!data)
                 return;
 
-        for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
+        for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
                 if (data->slot[i].bus_width) {
                         /* input/irq */
-                        if (gpio_is_valid(data->slot[i].detect_pin)) {
+                        if (data->slot[i].detect_pin) {
                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
                         }
-                        if (gpio_is_valid(data->slot[i].wp_pin))
+                        if (data->slot[i].wp_pin)
                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
 
                         switch (i) {
@@ -321,8 +391,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9260_BASE_ECC,
-                .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_ECC,
+                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -344,19 +414,19 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
-        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
+        if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
+        if (data->rdy_pin)
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
+        if (data->det_pin)
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -389,7 +459,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9260_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = 0,
+        .id                     = -1,
         .dev.platform_data      = &pdata,
 };
 
@@ -414,27 +484,21 @@ static struct resource twi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
+                .start  = AT91SAM9260_ID_TWI,
+                .end    = AT91SAM9260_ID_TWI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9260_twi_device = {
-        .id             = 0,
+        .name           = "at91_i2c",
+        .id             = -1,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
 
 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 {
-        /* IP version is not the same on 9260 and g20 */
-        if (cpu_is_at91sam9g20()) {
-                at91sam9260_twi_device.name = "i2c-at91sam9g20";
-        } else {
-                at91sam9260_twi_device.name = "i2c-at91sam9260";
-        }
-
         /* pins used for TWI interface */
         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
         at91_set_multi_drive(AT91_PIN_PA23, 1);
@@ -464,8 +528,8 @@ static struct resource spi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
+                .start  = AT91SAM9260_ID_SPI0,
+                .end    = AT91SAM9260_ID_SPI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -490,8 +554,8 @@ static struct resource spi1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
+                .start  = AT91SAM9260_ID_SPI1,
+                .end    = AT91SAM9260_ID_SPI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -525,9 +589,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
-                if (!gpio_is_valid(cs_pin))
-                        continue;
-
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
@@ -572,22 +633,22 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 static struct resource tcb0_resources[] = {
         [0] = {
                 .start  = AT91SAM9260_BASE_TCB0,
-                .end    = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
+                .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
+                .start  = AT91SAM9260_ID_TC0,
+                .end    = AT91SAM9260_ID_TC0,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
+                .start  = AT91SAM9260_ID_TC1,
+                .end    = AT91SAM9260_ID_TC1,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
+                .start  = AT91SAM9260_ID_TC2,
+                .end    = AT91SAM9260_ID_TC2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -602,22 +663,22 @@ static struct platform_device at91sam9260_tcb0_device = {
 static struct resource tcb1_resources[] = {
         [0] = {
                 .start  = AT91SAM9260_BASE_TCB1,
-                .end    = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
+                .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
+                .start  = AT91SAM9260_ID_TC3,
+                .end    = AT91SAM9260_ID_TC3,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
+                .start  = AT91SAM9260_ID_TC4,
+                .end    = AT91SAM9260_ID_TC4,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
+                .start  = AT91SAM9260_ID_TC5,
+                .end    = AT91SAM9260_ID_TC5,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -645,49 +706,21 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91SAM9260_BASE_RTT,
-                .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_IRQ,
-        },
+        }
 };
 
 static struct platform_device at91sam9260_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
-
-#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
-static void __init at91_add_device_rtt_rtc(void)
-{
-        at91sam9260_rtt_device.name = "rtc-at91sam9";
-        /*
-         * The second resource is needed:
-         * GPBR will serve as the storage for RTC time offset
-         */
-        at91sam9260_rtt_device.num_resources = 3;
-        rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
-                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
-        rtt_resources[1].end = rtt_resources[1].start + 3;
-        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
-        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
-}
-#else
-static void __init at91_add_device_rtt_rtc(void)
-{
-        /* Only one resource is needed: RTT not used as RTC */
-        at91sam9260_rtt_device.num_resources = 1;
-}
-#endif
-
 static void __init at91_add_device_rtt(void)
 {
-        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9260_rtt_device);
 }
 
@@ -697,19 +730,10 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91SAM9260_BASE_WDT,
-                .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
 static struct platform_device at91sam9260_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -735,14 +759,14 @@ static struct resource ssc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
+                .start  = AT91SAM9260_ID_SSC,
+                .end    = AT91SAM9260_ID_SSC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9260_ssc_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 0,
         .dev    = {
                 .dma_mask               = &ssc_dmamask,
@@ -805,13 +829,13 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91SAM9260_BASE_DBGU,
-                .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -819,6 +843,7 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@@ -848,8 +873,8 @@ static struct resource uart0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
+                .start  = AT91SAM9260_ID_US0,
+                .end    = AT91SAM9260_ID_US0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -899,8 +924,8 @@ static struct resource uart1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
+                .start  = AT91SAM9260_ID_US1,
+                .end    = AT91SAM9260_ID_US1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -942,8 +967,8 @@ static struct resource uart2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
+                .start  = AT91SAM9260_ID_US2,
+                .end    = AT91SAM9260_ID_US2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -985,8 +1010,8 @@ static struct resource uart3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
+                .start  = AT91SAM9260_ID_US3,
+                .end    = AT91SAM9260_ID_US3,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1028,8 +1053,8 @@ static struct resource uart4_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
+                .start  = AT91SAM9260_ID_US4,
+                .end    = AT91SAM9260_ID_US4,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1066,8 +1091,8 @@ static struct resource uart5_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
+                .start  = AT91SAM9260_ID_US5,
+                .end    = AT91SAM9260_ID_US5,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1098,6 +1123,7 @@ static inline void configure_usart5_pins(void)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1143,6 +1169,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                 at91_uarts[portnr] = pdev;
 }
 
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART) {
+                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9260_set_console_clock(at91_uarts[portnr]->id);
+        }
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -1151,9 +1185,13 @@ void __init at91_add_device_serial(void)
                 if (at91_uarts[i])
                         platform_device_register(at91_uarts[i]);
         }
+
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 #else
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
@@ -1161,7 +1199,8 @@ void __init at91_add_device_serial(void) {}
  *  CF/IDE
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
+#if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
+        defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
 
 static struct at91_cf_data cf0_data;
@@ -1210,7 +1249,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         if (!data)
                 return;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
 
         switch (data->chipselect) {
         case 4:
@@ -1233,19 +1272,19 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
                 return;
         }
 
-        at91_matrix_write(AT91_MATRIX_EBICSA, csa);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa);
 
-        if (gpio_is_valid(data->rst_pin)) {
+        if (data->rst_pin) {
                 at91_set_multi_drive(data->rst_pin, 0);
                 at91_set_gpio_output(data->rst_pin, 1);
         }
 
-        if (gpio_is_valid(data->irq_pin)) {
+        if (data->irq_pin) {
                 at91_set_gpio_input(data->irq_pin, 0);
                 at91_set_deglitch(data->irq_pin, 1);
         }
 
-        if (gpio_is_valid(data->det_pin)) {
+        if (data->det_pin) {
                 at91_set_gpio_input(data->det_pin, 0);
                 at91_set_deglitch(data->det_pin, 1);
         }
@@ -1258,8 +1297,10 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         if (data->flags & AT91_CF_TRUE_IDE)
 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
                 pdev->name = "pata_at91";
+#elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
+                pdev->name = "at91_ide";
 #else
-#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
+#warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
 #endif
         else
                 pdev->name = "at91_cf";
@@ -1271,93 +1312,6 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
 void __init at91_add_device_cf(struct at91_cf_data * data) {}
 #endif
 
-/* --------------------------------------------------------------------
- *  ADCs
- * -------------------------------------------------------------------- */
-
-#if IS_ENABLED(CONFIG_AT91_ADC)
-static struct at91_adc_data adc_data;
-
-static struct resource adc_resources[] = {
-        [0] = {
-                .start  = AT91SAM9260_BASE_ADC,
-                .end    = AT91SAM9260_BASE_ADC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91_adc_device = {
-        .name           = "at91_adc",
-        .id             = -1,
-        .dev            = {
-                                .platform_data          = &adc_data,
-        },
-        .resource       = adc_resources,
-        .num_resources  = ARRAY_SIZE(adc_resources),
-};
-
-static struct at91_adc_trigger at91_adc_triggers[] = {
-        [0] = {
-                .name = "timer-counter-0",
-                .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,
-        },
-        [1] = {
-                .name = "timer-counter-1",
-                .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,
-        },
-        [2] = {
-                .name = "timer-counter-2",
-                .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,
-        },
-        [3] = {
-                .name = "external",
-                .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,
-                .is_external = true,
-        },
-};
-
-static struct at91_adc_reg_desc at91_adc_register_g20 = {
-        .channel_base = AT91_ADC_CHR(0),
-        .drdy_mask = AT91_ADC_DRDY,
-        .status_register = AT91_ADC_SR,
-        .trigger_register = AT91_ADC_MR,
-};
-
-void __init at91_add_device_adc(struct at91_adc_data *data)
-{
-        if (!data)
-                return;
-
-        if (test_bit(0, &data->channels_used))
-                at91_set_A_periph(AT91_PIN_PC0, 0);
-        if (test_bit(1, &data->channels_used))
-                at91_set_A_periph(AT91_PIN_PC1, 0);
-        if (test_bit(2, &data->channels_used))
-                at91_set_A_periph(AT91_PIN_PC2, 0);
-        if (test_bit(3, &data->channels_used))
-                at91_set_A_periph(AT91_PIN_PC3, 0);
-
-        if (data->use_external_triggers)
-                at91_set_A_periph(AT91_PIN_PA22, 0);
-
-        data->num_channels = 4;
-        data->startup_time = 10;
-        data->registers = &at91_adc_register_g20;
-        data->trigger_number = 4;
-        data->trigger_list = at91_adc_triggers;
-
-        adc_data = *data;
-        platform_device_register(&at91_adc_device);
-}
-#else
-void __init at91_add_device_adc(struct at91_adc_data *data) {}
-#endif
-
 /* -------------------------------------------------------------------- */
 /*
  * These devices are always present and don't need any board-specific
@@ -1365,9 +1319,6 @@ void __init at91_add_device_adc(struct at91_adc_data *data) {}
  */
 static int __init at91_add_standard_devices(void)
 {
-        if (of_have_populated_dt())
-                return 0;
-
         at91_add_device_rtt();
         at91_add_device_watchdog();
         at91_add_device_tc();
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 2998a08afc2..6c8e3b5f669 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,22 +11,20 @@
  */
 
 #include <linux/module.h>
+#include <linux/pm.h>
 
-#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9261.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_rstc.h>
+#include <mach/at91_shdwc.h>
 
-#include "at91_aic.h"
-#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
-#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -131,20 +129,6 @@ static struct clk lcdc_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 
-/* HClocks */
-static struct clk hck0 = {
-        .name           = "hck0",
-        .pmc_mask       = AT91_PMC_HCK0,
-        .type           = CLK_TYPE_SYSTEM,
-        .id             = 0,
-};
-static struct clk hck1 = {
-        .name           = "hck1",
-        .pmc_mask       = AT91_PMC_HCK1,
-        .type           = CLK_TYPE_SYSTEM,
-        .id             = 1,
-};
-
 static struct clk *periph_clocks[] __initdata = {
         &pioA_clk,
         &pioB_clk,
@@ -174,18 +158,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffc0000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffc4000.ssc", &ssc2_clk),
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk),
-        CLKDEV_CON_ID("pioA", &pioA_clk),
-        CLKDEV_CON_ID("pioB", &pioB_clk),
-        CLKDEV_CON_ID("pioC", &pioC_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -224,6 +199,20 @@ static struct clk pck3 = {
         .id             = 3,
 };
 
+/* HClocks */
+static struct clk hck0 = {
+        .name           = "hck0",
+        .pmc_mask       = AT91_PMC_HCK0,
+        .type           = CLK_TYPE_SYSTEM,
+        .id             = 0,
+};
+static struct clk hck1 = {
+        .name           = "hck1",
+        .pmc_mask       = AT91_PMC_HCK1,
+        .type           = CLK_TYPE_SYSTEM,
+        .id             = 1,
+};
+
 static void __init at91sam9261_register_clocks(void)
 {
         int i;
@@ -245,23 +234,44 @@ static void __init at91sam9261_register_clocks(void)
         clk_register(&hck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9261_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
+static struct at91_gpio_bank at91sam9261_gpio[] = {
         {
                 .id             = AT91SAM9261_ID_PIOA,
-                .regbase        = AT91SAM9261_BASE_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
         }, {
                 .id             = AT91SAM9261_ID_PIOB,
-                .regbase        = AT91SAM9261_BASE_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
         }, {
                 .id             = AT91SAM9261_ID_PIOC,
-                .regbase        = AT91SAM9261_BASE_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
         }
 };
 
+static void at91sam9261_poweroff(void)
+{
+        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+
 /* --------------------------------------------------------------------
  *  AT91SAM9261 processor initialization
  * -------------------------------------------------------------------- */
@@ -274,20 +284,10 @@ static void __init at91sam9261_map_io(void)
                 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
 }
 
-static void __init at91sam9261_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
-        at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
-        at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
-        at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
-        at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
-}
-
 static void __init at91sam9261_initialize(void)
 {
-        arm_pm_idle = at91sam9_idle;
-        arm_pm_restart = at91sam9_alt_restart;
+        at91_arch_reset = at91sam9_alt_reset;
+        pm_power_off = at91sam9261_poweroff;
         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                         | (1 << AT91SAM9261_ID_IRQ2);
 
@@ -337,10 +337,9 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller */
 };
 
-AT91_SOC_START(sam9261)
+struct at91_init_soc __initdata at91sam9261_soc = {
         .map_io = at91sam9261_map_io,
         .default_irq_priority = at91sam9261_default_irq_priority,
-        .ioremap_registers = at91sam9261_ioremap_registers,
         .register_clocks = at91sam9261_register_clocks,
         .init = at91sam9261_initialize,
-AT91_SOC_END
+};
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 92e0f861084..9e113f60d25 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -14,19 +14,18 @@
 #include <asm/mach/map.h>
 
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
 #include <linux/fb.h>
 #include <video/atmel_lcdc.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9261.h>
 #include <mach/at91sam9261_matrix.h>
-#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 
-#include "board.h"
 #include "generic.h"
 
 
@@ -45,8 +44,8 @@ static struct resource usbh_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
+                .start  = AT91SAM9261_ID_UHP,
+                .end    = AT91SAM9261_ID_UHP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -65,17 +64,9 @@ static struct platform_device at91sam9261_usbh_device = {
 
 void __init at91_add_device_usbh(struct at91_usbh_data *data)
 {
-        int i;
-
         if (!data)
                 return;
 
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->overcurrent_pin[i]))
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
-        }
-
         usbh_data = *data;
         platform_device_register(&at91sam9261_usbh_device);
 }
@@ -88,7 +79,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -98,8 +89,8 @@ static struct resource udc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
+                .start  = AT91SAM9261_ID_UDP,
+                .end    = AT91SAM9261_ID_UDP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -119,7 +110,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->vbus_pin)) {
+        if (data->vbus_pin) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
@@ -137,9 +128,9 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
  *  MMC / SD
  * -------------------------------------------------------------------- */
 
-#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct mci_platform_data mmc_data;
+static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
         [0] = {
@@ -148,14 +139,14 @@ static struct resource mmc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
+                .start  = AT91SAM9261_ID_MCI,
+                .end    = AT91SAM9261_ID_MCI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9261_mmc_device = {
-        .name           = "atmel_mci",
+        .name           = "at91_mci",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
@@ -166,40 +157,40 @@ static struct platform_device at91sam9261_mmc_device = {
         .num_resources  = ARRAY_SIZE(mmc_resources),
 };
 
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 {
         if (!data)
                 return;
 
-        if (data->slot[0].bus_width) {
-                /* input/irq */
-                if (gpio_is_valid(data->slot[0].detect_pin)) {
-                        at91_set_gpio_input(data->slot[0].detect_pin, 1);
-                        at91_set_deglitch(data->slot[0].detect_pin, 1);
-                }
-                if (gpio_is_valid(data->slot[0].wp_pin))
-                        at91_set_gpio_input(data->slot[0].wp_pin, 1);
-
-                /* CLK */
-                at91_set_B_periph(AT91_PIN_PA2, 0);
-
-                /* CMD */
-                at91_set_B_periph(AT91_PIN_PA1, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_B_periph(AT91_PIN_PA0, 1);
-                if (data->slot[0].bus_width == 4) {
-                        at91_set_B_periph(AT91_PIN_PA4, 1);
-                        at91_set_B_periph(AT91_PIN_PA5, 1);
-                        at91_set_B_periph(AT91_PIN_PA6, 1);
-                }
-
-                mmc_data = *data;
-                platform_device_register(&at91sam9261_mmc_device);
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
         }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        /* CLK */
+        at91_set_B_periph(AT91_PIN_PA2, 0);
+
+        /* CMD */
+        at91_set_B_periph(AT91_PIN_PA1, 1);
+
+        /* DAT0, maybe DAT1..DAT3 */
+        at91_set_B_periph(AT91_PIN_PA0, 1);
+        if (data->wire4) {
+                at91_set_B_periph(AT91_PIN_PA4, 1);
+                at91_set_B_periph(AT91_PIN_PA5, 1);
+                at91_set_B_periph(AT91_PIN_PA6, 1);
+        }
+
+        mmc_data = *data;
+        platform_device_register(&at91sam9261_mmc_device);
 }
 #else
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 #endif
 
 
@@ -237,19 +228,19 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
-        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
+        if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
+        if (data->rdy_pin)
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
+        if (data->det_pin)
                 at91_set_gpio_input(data->det_pin, 1);
 
         at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
@@ -285,7 +276,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9261_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = 0,
+        .id                     = -1,
         .dev.platform_data      = &pdata,
 };
 
@@ -310,33 +301,27 @@ static struct resource twi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
+                .start  = AT91SAM9261_ID_TWI,
+                .end    = AT91SAM9261_ID_TWI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9261_twi_device = {
-        .id             = 0,
+        .name           = "at91_i2c",
+        .id             = -1,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
 
 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 {
-        /* IP version is not the same on 9261 and g10 */
-        if (cpu_is_at91sam9g10()) {
-                at91sam9261_twi_device.name = "i2c-at91sam9g10";
-                /* I2C PIO must not be configured as open-drain on this chip */
-        } else {
-                at91sam9261_twi_device.name = "i2c-at91sam9261";
-                at91_set_multi_drive(AT91_PIN_PA7, 1);
-                at91_set_multi_drive(AT91_PIN_PA8, 1);
-        }
-
         /* pins used for TWI interface */
         at91_set_A_periph(AT91_PIN_PA7, 0);             /* TWD */
+        at91_set_multi_drive(AT91_PIN_PA7, 1);
+
         at91_set_A_periph(AT91_PIN_PA8, 0);             /* TWCK */
+        at91_set_multi_drive(AT91_PIN_PA8, 1);
 
         i2c_register_board_info(0, devices, nr_devices);
         platform_device_register(&at91sam9261_twi_device);
@@ -360,8 +345,8 @@ static struct resource spi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
+                .start  = AT91SAM9261_ID_SPI0,
+                .end    = AT91SAM9261_ID_SPI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -386,8 +371,8 @@ static struct resource spi1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
+                .start  = AT91SAM9261_ID_SPI1,
+                .end    = AT91SAM9261_ID_SPI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -421,9 +406,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
-                if (!gpio_is_valid(cs_pin))
-                        continue;
-
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
@@ -474,8 +456,8 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
+                .start  = AT91SAM9261_ID_LCDC,
+                .end    = AT91SAM9261_ID_LCDC,
                 .flags  = IORESOURCE_IRQ,
         },
 #if defined(CONFIG_FB_INTSRAM)
@@ -572,18 +554,18 @@ static struct resource tcb_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
+                .start  = AT91SAM9261_ID_TC0,
+                .end    = AT91SAM9261_ID_TC0,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
+                .start  = AT91SAM9261_ID_TC1,
+                .end    = AT91SAM9261_ID_TC1,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
+                .start  = AT91SAM9261_ID_TC2,
+                .end    = AT91SAM9261_ID_TC2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -610,13 +592,9 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91SAM9261_BASE_RTT,
-                .end    = AT91SAM9261_BASE_RTT + SZ_16 - 1,
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_IRQ,
         }
 };
 
@@ -624,34 +602,11 @@ static struct platform_device at91sam9261_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
-#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
-static void __init at91_add_device_rtt_rtc(void)
-{
-        at91sam9261_rtt_device.name = "rtc-at91sam9";
-        /*
-         * The second resource is needed:
-         * GPBR will serve as the storage for RTC time offset
-         */
-        at91sam9261_rtt_device.num_resources = 3;
-        rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
-                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
-        rtt_resources[1].end = rtt_resources[1].start + 3;
-        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
-        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
-}
-#else
-static void __init at91_add_device_rtt_rtc(void)
-{
-        /* Only one resource is needed: RTT not used as RTC */
-        at91sam9261_rtt_device.num_resources = 1;
-}
-#endif
-
 static void __init at91_add_device_rtt(void)
 {
-        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9261_rtt_device);
 }
 
@@ -661,19 +616,10 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91SAM9261_BASE_WDT,
-                .end    = AT91SAM9261_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
 static struct platform_device at91sam9261_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -699,14 +645,14 @@ static struct resource ssc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
+                .start  = AT91SAM9261_ID_SSC0,
+                .end    = AT91SAM9261_ID_SSC0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9261_ssc0_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 0,
         .dev    = {
                 .dma_mask               = &ssc0_dmamask,
@@ -741,14 +687,14 @@ static struct resource ssc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
+                .start  = AT91SAM9261_ID_SSC1,
+                .end    = AT91SAM9261_ID_SSC1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9261_ssc1_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 1,
         .dev    = {
                 .dma_mask               = &ssc1_dmamask,
@@ -783,14 +729,14 @@ static struct resource ssc2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
+                .start  = AT91SAM9261_ID_SSC2,
+                .end    = AT91SAM9261_ID_SSC2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9261_ssc2_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 2,
         .dev    = {
                 .dma_mask               = &ssc2_dmamask,
@@ -862,13 +808,13 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91SAM9261_BASE_DBGU,
-                .end    = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -876,6 +822,7 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@@ -905,8 +852,8 @@ static struct resource uart0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
+                .start  = AT91SAM9261_ID_US0,
+                .end    = AT91SAM9261_ID_US0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -948,8 +895,8 @@ static struct resource uart1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
+                .start  = AT91SAM9261_ID_US1,
+                .end    = AT91SAM9261_ID_US1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -991,8 +938,8 @@ static struct resource uart2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
+                .start  = AT91SAM9261_ID_US2,
+                .end    = AT91SAM9261_ID_US2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1028,6 +975,7 @@ static inline void configure_usart2_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1061,6 +1009,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                 at91_uarts[portnr] = pdev;
 }
 
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART) {
+                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9261_set_console_clock(at91_uarts[portnr]->id);
+        }
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -1069,9 +1025,13 @@ void __init at91_add_device_serial(void)
                 if (at91_uarts[i])
                         platform_device_register(at91_uarts[i]);
         }
+
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 #else
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index b9fc60d1b33..044f3c927e6 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,21 +11,19 @@
  */
 
 #include <linux/module.h>
+#include <linux/pm.h>
 
-#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/system_misc.h>
 #include <mach/at91sam9263.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_rstc.h>
+#include <mach/at91_shdwc.h>
 
-#include "at91_aic.h"
-#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
-#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -120,7 +118,7 @@ static struct clk pwm_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "pclk",
+        .name           = "macb_clk",
         .pmc_mask       = 1 << AT91SAM9263_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -184,43 +182,13 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
-        /* One additional fake clock for macb_hclk */
-        CLKDEV_CON_ID("hclk", &macb_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
+        CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
-        CLKDEV_CON_ID("pioA", &pioA_clk),
-        CLKDEV_CON_ID("pioB", &pioB_clk),
-        CLKDEV_CON_ID("pioC", &pioCDE_clk),
-        CLKDEV_CON_ID("pioD", &pioCDE_clk),
-        CLKDEV_CON_ID("pioE", &pioCDE_clk),
-        /* more usart lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
-        CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
-        /* more tc lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
-        CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
-        CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -277,29 +245,52 @@ static void __init at91sam9263_register_clocks(void)
         clk_register(&pck3);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9263_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
+static struct at91_gpio_bank at91sam9263_gpio[] = {
         {
                 .id             = AT91SAM9263_ID_PIOA,
-                .regbase        = AT91SAM9263_BASE_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
         }, {
                 .id             = AT91SAM9263_ID_PIOB,
-                .regbase        = AT91SAM9263_BASE_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
         }, {
                 .id             = AT91SAM9263_ID_PIOCDE,
-                .regbase        = AT91SAM9263_BASE_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioCDE_clk,
         }, {
                 .id             = AT91SAM9263_ID_PIOCDE,
-                .regbase        = AT91SAM9263_BASE_PIOD,
+                .offset         = AT91_PIOD,
+                .clock          = &pioCDE_clk,
         }, {
                 .id             = AT91SAM9263_ID_PIOCDE,
-                .regbase        = AT91SAM9263_BASE_PIOE,
+                .offset         = AT91_PIOE,
+                .clock          = &pioCDE_clk,
         }
 };
 
+static void at91sam9263_poweroff(void)
+{
+        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+
 /* --------------------------------------------------------------------
  *  AT91SAM9263 processor initialization
  * -------------------------------------------------------------------- */
@@ -310,22 +301,10 @@ static void __init at91sam9263_map_io(void)
         at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
 }
 
-static void __init at91sam9263_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
-        at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
-        at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
-        at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
-        at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
-        at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
-        at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
-}
-
 static void __init at91sam9263_initialize(void)
 {
-        arm_pm_idle = at91sam9_idle;
-        arm_pm_restart = at91sam9_alt_restart;
+        at91_arch_reset = at91sam9_alt_reset;
+        pm_power_off = at91sam9263_poweroff;
         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
         /* Register GPIO subsystem */
@@ -374,10 +353,9 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller (IRQ1) */
 };
 
-AT91_SOC_START(sam9263)
+struct at91_init_soc __initdata at91sam9263_soc = {
         .map_io = at91sam9263_map_io,
         .default_irq_priority = at91sam9263_default_irq_priority,
-        .ioremap_registers = at91sam9263_ioremap_registers,
         .register_clocks = at91sam9263_register_clocks,
         .init = at91sam9263_initialize,
-AT91_SOC_END
+};
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index ed666f5cb01..863e4661409 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -13,19 +13,18 @@
 #include <asm/mach/map.h>
 
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
 #include <linux/fb.h>
 #include <video/atmel_lcdc.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9263.h>
 #include <mach/at91sam9263_matrix.h>
-#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
 
-#include "board.h"
 #include "generic.h"
 
 
@@ -44,8 +43,8 @@ static struct resource usbh_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
+                .start  = AT91SAM9263_ID_UHP,
+                .end    = AT91SAM9263_ID_UHP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -71,15 +70,8 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i],
-                                             data->vbus_pin_active_low[i]);
-        }
-
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->overcurrent_pin[i]))
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
+                if (data->vbus_pin[i])
+                        at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
         usbh_data = *data;
@@ -94,7 +86,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
@@ -104,8 +96,8 @@ static struct resource udc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
+                .start  = AT91SAM9263_ID_UDP,
+                .end    = AT91SAM9263_ID_UDP,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -125,7 +117,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->vbus_pin)) {
+        if (data->vbus_pin) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
@@ -146,7 +138,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
+static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -155,8 +147,8 @@ static struct resource eth_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
+                .start  = AT91SAM9263_ID_EMAC,
+                .end    = AT91SAM9263_ID_EMAC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -173,12 +165,12 @@ static struct platform_device at91sam9263_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct macb_platform_data *data)
+void __init at91_add_device_eth(struct at91_eth_data *data)
 {
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->phy_irq_pin)) {
+        if (data->phy_irq_pin) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -210,7 +202,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
         platform_device_register(&at91sam9263_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
+void __init at91_add_device_eth(struct at91_eth_data *data) {}
 #endif
 
 
@@ -218,9 +210,9 @@ void __init at91_add_device_eth(struct macb_platform_data *data) {}
  *  MMC / SD
  * -------------------------------------------------------------------- */
 
-#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct mci_platform_data mmc0_data, mmc1_data;
+static struct at91_mmc_data mmc0_data, mmc1_data;
 
 static struct resource mmc0_resources[] = {
         [0] = {
@@ -229,14 +221,14 @@ static struct resource mmc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
+                .start  = AT91SAM9263_ID_MCI0,
+                .end    = AT91SAM9263_ID_MCI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9263_mmc0_device = {
-        .name           = "atmel_mci",
+        .name           = "at91_mci",
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
@@ -254,14 +246,14 @@ static struct resource mmc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
+                .start  = AT91SAM9263_ID_MCI1,
+                .end    = AT91SAM9263_ID_MCI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9263_mmc1_device = {
-        .name           = "atmel_mci",
+        .name           = "at91_mci",
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
@@ -272,118 +264,93 @@ static struct platform_device at91sam9263_mmc1_device = {
         .num_resources  = ARRAY_SIZE(mmc1_resources),
 };
 
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 {
-        unsigned int i;
-        unsigned int slot_count = 0;
-
         if (!data)
                 return;
 
-        for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
 
-                if (!data->slot[i].bus_width)
-                        continue;
+        if (mmc_id == 0) {              /* MCI0 */
+                /* CLK */
+                at91_set_A_periph(AT91_PIN_PA12, 0);
 
-                /* input/irq */
-                if (gpio_is_valid(data->slot[i].detect_pin)) {
-                        at91_set_gpio_input(data->slot[i].detect_pin,
-                                        1);
-                        at91_set_deglitch(data->slot[i].detect_pin,
-                                        1);
-                }
-                if (gpio_is_valid(data->slot[i].wp_pin))
-                        at91_set_gpio_input(data->slot[i].wp_pin, 1);
-
-                if (mmc_id == 0) {                              /* MCI0 */
-                        switch (i) {
-                        case 0:                                 /* slot A */
-                                /* CMD */
-                                at91_set_A_periph(AT91_PIN_PA1, 1);
-                                /* DAT0, maybe DAT1..DAT3 */
-                                at91_set_A_periph(AT91_PIN_PA0, 1);
-                                if (data->slot[i].bus_width == 4) {
-                                        at91_set_A_periph(AT91_PIN_PA3, 1);
-                                        at91_set_A_periph(AT91_PIN_PA4, 1);
-                                        at91_set_A_periph(AT91_PIN_PA5, 1);
-                                }
-                                slot_count++;
-                                break;
-                        case 1:                                 /* slot B */
-                                /* CMD */
-                                at91_set_A_periph(AT91_PIN_PA16, 1);
-                                /* DAT0, maybe DAT1..DAT3 */
-                                at91_set_A_periph(AT91_PIN_PA17, 1);
-                                if (data->slot[i].bus_width == 4) {
-                                        at91_set_A_periph(AT91_PIN_PA18, 1);
-                                        at91_set_A_periph(AT91_PIN_PA19, 1);
-                                        at91_set_A_periph(AT91_PIN_PA20, 1);
-                                }
-                                slot_count++;
-                                break;
-                        default:
-                                printk(KERN_ERR
-                                       "AT91: SD/MMC slot %d not available\n", i);
-                                break;
-                        }
-                        if (slot_count) {
-                                /* CLK */
-                                at91_set_A_periph(AT91_PIN_PA12, 0);
+                if (data->slot_b) {
+                        /* CMD */
+                        at91_set_A_periph(AT91_PIN_PA16, 1);
 
-                                mmc0_data = *data;
-                                platform_device_register(&at91sam9263_mmc0_device);
+                        /* DAT0, maybe DAT1..DAT3 */
+                        at91_set_A_periph(AT91_PIN_PA17, 1);
+                        if (data->wire4) {
+                                at91_set_A_periph(AT91_PIN_PA18, 1);
+                                at91_set_A_periph(AT91_PIN_PA19, 1);
+                                at91_set_A_periph(AT91_PIN_PA20, 1);
                         }
-                } else if (mmc_id == 1) {                       /* MCI1 */
-                        switch (i) {
-                        case 0:                                 /* slot A */
-                                /* CMD */
-                                at91_set_A_periph(AT91_PIN_PA7, 1);
-                                /* DAT0, maybe DAT1..DAT3 */
-                                at91_set_A_periph(AT91_PIN_PA8, 1);
-                                if (data->slot[i].bus_width == 4) {
-                                        at91_set_A_periph(AT91_PIN_PA9, 1);
-                                        at91_set_A_periph(AT91_PIN_PA10, 1);
-                                        at91_set_A_periph(AT91_PIN_PA11, 1);
-                                }
-                                slot_count++;
-                                break;
-                        case 1:                                 /* slot B */
-                                /* CMD */
-                                at91_set_A_periph(AT91_PIN_PA21, 1);
-                                /* DAT0, maybe DAT1..DAT3 */
-                                at91_set_A_periph(AT91_PIN_PA22, 1);
-                                if (data->slot[i].bus_width == 4) {
-                                        at91_set_A_periph(AT91_PIN_PA23, 1);
-                                        at91_set_A_periph(AT91_PIN_PA24, 1);
-                                        at91_set_A_periph(AT91_PIN_PA25, 1);
-                                }
-                                slot_count++;
-                                break;
-                        default:
-                                printk(KERN_ERR
-                                       "AT91: SD/MMC slot %d not available\n", i);
-                                break;
+                } else {
+                        /* CMD */
+                        at91_set_A_periph(AT91_PIN_PA1, 1);
+
+                        /* DAT0, maybe DAT1..DAT3 */
+                        at91_set_A_periph(AT91_PIN_PA0, 1);
+                        if (data->wire4) {
+                                at91_set_A_periph(AT91_PIN_PA3, 1);
+                                at91_set_A_periph(AT91_PIN_PA4, 1);
+                                at91_set_A_periph(AT91_PIN_PA5, 1);
                         }
-                        if (slot_count) {
-                                /* CLK */
-                                at91_set_A_periph(AT91_PIN_PA6, 0);
+                }
 
-                                mmc1_data = *data;
-                                platform_device_register(&at91sam9263_mmc1_device);
+                mmc0_data = *data;
+                platform_device_register(&at91sam9263_mmc0_device);
+        } else {                        /* MCI1 */
+                /* CLK */
+                at91_set_A_periph(AT91_PIN_PA6, 0);
+
+                if (data->slot_b) {
+                        /* CMD */
+                        at91_set_A_periph(AT91_PIN_PA21, 1);
+
+                        /* DAT0, maybe DAT1..DAT3 */
+                        at91_set_A_periph(AT91_PIN_PA22, 1);
+                        if (data->wire4) {
+                                at91_set_A_periph(AT91_PIN_PA23, 1);
+                                at91_set_A_periph(AT91_PIN_PA24, 1);
+                                at91_set_A_periph(AT91_PIN_PA25, 1);
+                        }
+                } else {
+                        /* CMD */
+                        at91_set_A_periph(AT91_PIN_PA7, 1);
+
+                        /* DAT0, maybe DAT1..DAT3 */
+                        at91_set_A_periph(AT91_PIN_PA8, 1);
+                        if (data->wire4) {
+                                at91_set_A_periph(AT91_PIN_PA9, 1);
+                                at91_set_A_periph(AT91_PIN_PA10, 1);
+                                at91_set_A_periph(AT91_PIN_PA11, 1);
                         }
                 }
+
+                mmc1_data = *data;
+                platform_device_register(&at91sam9263_mmc1_device);
         }
 }
 #else
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 #endif
 
 /* --------------------------------------------------------------------
  *  Compact Flash (PCMCIA or IDE)
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
-        defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
+#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
+    defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
 
 static struct at91_cf_data cf0_data;
 
@@ -436,7 +403,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
          * we assume SMC timings are configured by board code,
          * except True IDE where timings are controlled by driver
          */
-        ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
+        ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
         switch (data->chipselect) {
         case 4:
                 at91_set_A_periph(AT91_PIN_PD6, 0);  /* EBI0_NCS4/CFCS0 */
@@ -455,19 +422,19 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
                        data->chipselect);
                 return;
         }
-        at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
+        at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
 
-        if (gpio_is_valid(data->det_pin)) {
+        if (data->det_pin) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
 
-        if (gpio_is_valid(data->irq_pin)) {
+        if (data->irq_pin) {
                 at91_set_gpio_input(data->irq_pin, 1);
                 at91_set_deglitch(data->irq_pin, 1);
         }
 
-        if (gpio_is_valid(data->vcc_pin))
+        if (data->vcc_pin)
                 /* initially off */
                 at91_set_gpio_output(data->vcc_pin, 0);
 
@@ -477,7 +444,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         at91_set_A_periph(AT91_PIN_PD9, 0);  /* CFCE2 */
         at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
 
-        pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
+        pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
         platform_device_register(pdev);
 }
 #else
@@ -500,8 +467,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9263_BASE_ECC0,
-                .end    = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_ECC0,
+                .end    = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -523,19 +490,19 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
-        at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+        csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
+        at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
+        if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
+        if (data->rdy_pin)
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
+        if (data->det_pin)
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -567,7 +534,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9263_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = 0,
+        .id                     = -1,
         .dev.platform_data      = &pdata,
 };
 
@@ -592,15 +559,15 @@ static struct resource twi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
+                .start  = AT91SAM9263_ID_TWI,
+                .end    = AT91SAM9263_ID_TWI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9263_twi_device = {
-        .name           = "i2c-at91sam9260",
-        .id             = 0,
+        .name           = "at91_i2c",
+        .id             = -1,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
@@ -636,8 +603,8 @@ static struct resource spi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
+                .start  = AT91SAM9263_ID_SPI0,
+                .end    = AT91SAM9263_ID_SPI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -662,8 +629,8 @@ static struct resource spi1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
+                .start  = AT91SAM9263_ID_SPI1,
+                .end    = AT91SAM9263_ID_SPI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -697,9 +664,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
-                if (!gpio_is_valid(cs_pin))
-                        continue;
-
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
@@ -750,8 +714,8 @@ static struct resource ac97_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
+                .start  = AT91SAM9263_ID_AC97C,
+                .end    = AT91SAM9263_ID_AC97C,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -779,7 +743,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
 
         /* reset */
-        if (gpio_is_valid(data->reset_pin))
+        if (data->reset_pin)
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -801,8 +765,8 @@ static struct resource can_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
+                .start  = AT91SAM9263_ID_CAN,
+                .end    = AT91SAM9263_ID_CAN,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -841,8 +805,8 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
+                .start  = AT91SAM9263_ID_LCDC,
+                .end    = AT91SAM9263_ID_LCDC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -908,8 +872,8 @@ struct resource isi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
+                .start  = AT91SAM9263_ID_ISI,
+                .end    = AT91SAM9263_ID_ISI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -921,8 +885,7 @@ static struct platform_device at91sam9263_isi_device = {
         .num_resources  = ARRAY_SIZE(isi_resources),
 };
 
-void __init at91_add_device_isi(struct isi_platform_data *data,
-                bool use_pck_as_mck)
+void __init at91_add_device_isi(void)
 {
         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
@@ -935,20 +898,14 @@ void __init at91_add_device_isi(struct isi_platform_data *data,
         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
+        at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
-
-        if (use_pck_as_mck) {
-                at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
-
-                /* TODO: register the PCK for ISI_MCK and set its parent */
-        }
 }
 #else
-void __init at91_add_device_isi(struct isi_platform_data *data,
-                bool use_pck_as_mck) {}
+void __init at91_add_device_isi(void) {}
 #endif
 
 
@@ -965,8 +922,8 @@ static struct resource tcb_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
+                .start  = AT91SAM9263_ID_TCB,
+                .end    = AT91SAM9263_ID_TCB,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -978,25 +935,8 @@ static struct platform_device at91sam9263_tcb_device = {
         .num_resources  = ARRAY_SIZE(tcb_resources),
 };
 
-#if defined(CONFIG_OF)
-static struct of_device_id tcb_ids[] = {
-        { .compatible = "atmel,at91rm9200-tcb" },
-        { /*sentinel*/ }
-};
-#endif
-
 static void __init at91_add_device_tc(void)
 {
-#if defined(CONFIG_OF)
-        struct device_node *np;
-
-        np = of_find_matching_node(NULL, tcb_ids);
-        if (np) {
-                of_node_put(np);
-                return;
-        }
-#endif
-
         platform_device_register(&at91sam9263_tcb_device);
 }
 #else
@@ -1010,13 +950,9 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt0_resources[] = {
         {
-                .start  = AT91SAM9263_BASE_RTT0,
-                .end    = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
+                .start  = AT91_BASE_SYS + AT91_RTT0,
+                .end    = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_IRQ,
         }
 };
 
@@ -1024,17 +960,14 @@ static struct platform_device at91sam9263_rtt0_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt0_resources,
+        .num_resources  = ARRAY_SIZE(rtt0_resources),
 };
 
 static struct resource rtt1_resources[] = {
         {
-                .start  = AT91SAM9263_BASE_RTT1,
-                .end    = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
+                .start  = AT91_BASE_SYS + AT91_RTT1,
+                .end    = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_IRQ,
         }
 };
 
@@ -1042,55 +975,11 @@ static struct platform_device at91sam9263_rtt1_device = {
         .name           = "at91_rtt",
         .id             = 1,
         .resource       = rtt1_resources,
+        .num_resources  = ARRAY_SIZE(rtt1_resources),
 };
 
-#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
-static void __init at91_add_device_rtt_rtc(void)
-{
-        struct platform_device *pdev;
-        struct resource *r;
-
-        switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
-        case 0:
-                /*
-                 * The second resource is needed only for the chosen RTT:
-                 * GPBR will serve as the storage for RTC time offset
-                 */
-                at91sam9263_rtt0_device.num_resources = 3;
-                at91sam9263_rtt1_device.num_resources = 1;
-                pdev = &at91sam9263_rtt0_device;
-                r = rtt0_resources;
-                break;
-        case 1:
-                at91sam9263_rtt0_device.num_resources = 1;
-                at91sam9263_rtt1_device.num_resources = 3;
-                pdev = &at91sam9263_rtt1_device;
-                r = rtt1_resources;
-                break;
-        default:
-                pr_err("at91sam9263: only supports 2 RTT (%d)\n",
-                       CONFIG_RTC_DRV_AT91SAM9_RTT);
-                return;
-        }
-
-        pdev->name = "rtc-at91sam9";
-        r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
-        r[1].end = r[1].start + 3;
-        r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
-        r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
-}
-#else
-static void __init at91_add_device_rtt_rtc(void)
-{
-        /* Only one resource is needed: RTT not used as RTC */
-        at91sam9263_rtt0_device.num_resources = 1;
-        at91sam9263_rtt1_device.num_resources = 1;
-}
-#endif
-
 static void __init at91_add_device_rtt(void)
 {
-        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9263_rtt0_device);
         platform_device_register(&at91sam9263_rtt1_device);
 }
@@ -1101,19 +990,10 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91SAM9263_BASE_WDT,
-                .end    = AT91SAM9263_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
 static struct platform_device at91sam9263_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -1139,8 +1019,8 @@ static struct resource pwm_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
+                .start  = AT91SAM9263_ID_PWMC,
+                .end    = AT91SAM9263_ID_PWMC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1192,14 +1072,14 @@ static struct resource ssc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
+                .start  = AT91SAM9263_ID_SSC0,
+                .end    = AT91SAM9263_ID_SSC0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9263_ssc0_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 0,
         .dev    = {
                 .dma_mask               = &ssc0_dmamask,
@@ -1234,14 +1114,14 @@ static struct resource ssc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
+                .start  = AT91SAM9263_ID_SSC1,
+                .end    = AT91SAM9263_ID_SSC1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9263_ssc1_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 1,
         .dev    = {
                 .dma_mask               = &ssc1_dmamask,
@@ -1310,13 +1190,13 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91SAM9263_BASE_DBGU,
-                .end    = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1324,6 +1204,7 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@@ -1353,8 +1234,8 @@ static struct resource uart0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
+                .start  = AT91SAM9263_ID_US0,
+                .end    = AT91SAM9263_ID_US0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1396,8 +1277,8 @@ static struct resource uart1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
+                .start  = AT91SAM9263_ID_US1,
+                .end    = AT91SAM9263_ID_US1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1439,8 +1320,8 @@ static struct resource uart2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
+                .start  = AT91SAM9263_ID_US2,
+                .end    = AT91SAM9263_ID_US2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1476,6 +1357,7 @@ static inline void configure_usart2_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1509,6 +1391,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                 at91_uarts[portnr] = pdev;
 }
 
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART) {
+                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9263_set_console_clock(at91_uarts[portnr]->id);
+        }
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -1517,9 +1407,13 @@ void __init at91_add_device_serial(void)
                 if (at91_uarts[i])
                         platform_device_register(at91_uarts[i]);
         }
+
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 #else
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
@@ -1531,9 +1425,6 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
-        if (of_have_populated_dt())
-                return 0;
-
         at91_add_device_rtt();
         at91_add_device_watchdog();
         at91_add_device_tc();
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 358412f1f5f..4ba85499fa9 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -14,41 +14,18 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/clockchips.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 
-#define AT91_PIT_MR             0x00                    /* Mode Register */
-#define         AT91_PIT_PITIEN         (1 << 25)               /* Timer Interrupt Enable */
-#define         AT91_PIT_PITEN          (1 << 24)               /* Timer Enabled */
-#define         AT91_PIT_PIV            (0xfffff)               /* Periodic Interval Value */
+#include <mach/at91_pit.h>
 
-#define AT91_PIT_SR             0x04                    /* Status Register */
-#define         AT91_PIT_PITS           (1 << 0)                /* Timer Status */
-
-#define AT91_PIT_PIVR           0x08                    /* Periodic Interval Value Register */
-#define AT91_PIT_PIIR           0x0c                    /* Periodic Interval Image Register */
-#define         AT91_PIT_PICNT          (0xfff << 20)           /* Interval Counter */
-#define         AT91_PIT_CPIV           (0xfffff)               /* Inverval Value */
 
 #define PIT_CPIV(x)     ((x) & AT91_PIT_CPIV)
 #define PIT_PICNT(x)    (((x) & AT91_PIT_PICNT) >> 20)
 
 static u32 pit_cycle;           /* write-once */
 static u32 pit_cnt;             /* access only w/system irq blocked */
-static void __iomem *pit_base_addr __read_mostly;
 
-static inline unsigned int pit_read(unsigned int reg_offset)
-{
-        return __raw_readl(pit_base_addr + reg_offset);
-}
-
-static inline void pit_write(unsigned int reg_offset, unsigned long value)
-{
-        __raw_writel(value, pit_base_addr + reg_offset);
-}
 
 /*
  * Clocksource:  just a monotonic counter of MCK/16 cycles.
@@ -62,7 +39,7 @@ static cycle_t read_pit_clk(struct clocksource *cs)
 
         raw_local_irq_save(flags);
         elapsed = pit_cnt;
-        t = pit_read(AT91_PIT_PIIR);
+        t = at91_sys_read(AT91_PIT_PIIR);
         raw_local_irq_restore(flags);
 
         elapsed += PIT_PICNT(t) * pit_cycle;
@@ -87,8 +64,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 /* update clocksource counter */
-                pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
-                pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
+                pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
+                at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
                                 | AT91_PIT_PITIEN);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
@@ -97,7 +74,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
         case CLOCK_EVT_MODE_SHUTDOWN:
         case CLOCK_EVT_MODE_UNUSED:
                 /* disable irq, leaving the clocksource active */
-                pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+                at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
                 break;
         case CLOCK_EVT_MODE_RESUME:
                 break;
@@ -126,11 +103,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 
         /* The PIT interrupt may be disabled, and is shared */
         if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
-                        && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
+                        && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
                 unsigned nr_ticks;
 
                 /* Get number of ticks performed before irq, and ack it */
-                nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
+                nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
                 do {
                         pit_cnt += pit_cycle;
                         pit_clkevt.event_handler(&pit_clkevt);
@@ -146,68 +123,22 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 static struct irqaction at91sam926x_pit_irq = {
         .name           = "at91_tick",
         .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = at91sam926x_pit_interrupt,
-        .irq            = NR_IRQS_LEGACY + AT91_ID_SYS,
+        .handler        = at91sam926x_pit_interrupt
 };
 
 static void at91sam926x_pit_reset(void)
 {
         /* Disable timer and irqs */
-        pit_write(AT91_PIT_MR, 0);
+        at91_sys_write(AT91_PIT_MR, 0);
 
         /* Clear any pending interrupts, wait for PIT to stop counting */
-        while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
+        while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
                 cpu_relax();
 
         /* Start PIT but don't enable IRQ */
-        pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+        at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
 }
 
-#ifdef CONFIG_OF
-static struct of_device_id pit_timer_ids[] = {
-        { .compatible = "atmel,at91sam9260-pit" },
-        { /* sentinel */ }
-};
-
-static int __init of_at91sam926x_pit_init(void)
-{
-        struct device_node      *np;
-        int                     ret;
-
-        np = of_find_matching_node(NULL, pit_timer_ids);
-        if (!np)
-                goto err;
-
-        pit_base_addr = of_iomap(np, 0);
-        if (!pit_base_addr)
-                goto node_err;
-
-        /* Get the interrupts property */
-        ret = irq_of_parse_and_map(np, 0);
-        if (!ret) {
-                pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
-                goto ioremap_err;
-        }
-        at91sam926x_pit_irq.irq = ret;
-
-        of_node_put(np);
-
-        return 0;
-
-ioremap_err:
-        iounmap(pit_base_addr);
-node_err:
-        of_node_put(np);
-err:
-        return -EINVAL;
-}
-#else
-static int __init of_at91sam926x_pit_init(void)
-{
-        return -EINVAL;
-}
-#endif
-
 /*
  * Set up both clocksource and clockevent support.
  */
@@ -215,10 +146,6 @@ static void __init at91sam926x_pit_init(void)
 {
         unsigned long   pit_rate;
         unsigned        bits;
-        int             ret;
-
-        /* For device tree enabled device: initialize here */
-        of_at91sam926x_pit_init();
 
         /*
          * Use our actual MCK to figure out how many MCK/16 ticks per
@@ -240,9 +167,7 @@ static void __init at91sam926x_pit_init(void)
         clocksource_register_hz(&pit_clk, pit_rate);
 
         /* Set up irq handler */
-        ret = setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
-        if (ret)
-                pr_crit("AT91: PIT: Unable to setup IRQ\n");
+        setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
 
         /* Set up and register clockevents */
         pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
@@ -253,24 +178,7 @@ static void __init at91sam926x_pit_init(void)
 static void at91sam926x_pit_suspend(void)
 {
         /* Disable timer */
-        pit_write(AT91_PIT_MR, 0);
-}
-
-void __init at91sam926x_ioremap_pit(u32 addr)
-{
-#if defined(CONFIG_OF)
-        struct device_node *np =
-                of_find_matching_node(NULL, pit_timer_ids);
-
-        if (np) {
-                of_node_put(np);
-                return;
-        }
-#endif
-        pit_base_addr = ioremap(addr, 16);
-
-        if (!pit_base_addr)
-                panic("Impossible to ioremap PIT\n");
+        at91_sys_write(AT91_PIT_MR, 0);
 }
 
 struct sys_timer at91sam926x_timer = {
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index f039538d3bd..e0256deb91f 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -14,18 +14,21 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/system.h>
 #include <mach/hardware.h>
-#include <mach/at91_ramc.h>
-#include "at91_rstc.h"
+#include <mach/at91sam9_sdramc.h>
+#include <mach/at91_rstc.h>
 
                         .arm
 
-                        .globl  at91sam9_alt_restart
+                        .globl  at91sam9_alt_reset
 
-at91sam9_alt_restart:   ldr     r0, =at91_ramc_base             @ preload constants
-                        ldr     r0, [r0]
-                        ldr     r4, =at91_rstc_base
-                        ldr     r1, [r4]
+at91sam9_alt_reset:     mrc     p15, 0, r0, c1, c0, 0
+                        orr     r0, r0, #CR_I
+                        mcr     p15, 0, r0, c1, c0, 0           @ enable I-cache
+
+                        ldr     r0, .at91_va_base_sdramc        @ preload constants
+                        ldr     r1, .at91_va_base_rstc_cr
 
                         mov     r2, #1
                         mov     r3, #AT91_SDRAMC_LPCB_POWER_DOWN
@@ -35,6 +38,11 @@ at91sam9_alt_restart:	ldr	r0, =at91_ramc_base		@ preload constants
 
                         str     r2, [r0, #AT91_SDRAMC_TR]       @ disable SDRAM access
                         str     r3, [r0, #AT91_SDRAMC_LPR]      @ power down SDRAM
-                        str     r4, [r1, #AT91_RSTC_CR]         @ reset processor
+                        str     r4, [r1]                        @ reset processor
 
                         b       .
+
+.at91_va_base_sdramc:
+        .word AT91_VA_BASE_SYS + AT91_SDRAMC0
+.at91_va_base_rstc_cr:
+        .word AT91_VA_BASE_SYS + AT91_RSTC_CR
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index d3addee43d8..e04c5fb6f1e 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,21 +11,20 @@
  */
 
 #include <linux/module.h>
-#include <linux/dma-mapping.h>
+#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/system_misc.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_rstc.h>
+#include <mach/at91_shdwc.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
-#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -54,11 +53,6 @@ static struct clk pioDE_clk = {
         .pmc_mask       = 1 << AT91SAM9G45_ID_PIODE,
         .type           = CLK_TYPE_PERIPHERAL,
 };
-static struct clk trng_clk = {
-        .name           = "trng_clk",
-        .pmc_mask       = 1 << AT91SAM9G45_ID_TRNG,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
 static struct clk usart0_clk = {
         .name           = "usart0_clk",
         .pmc_mask       = 1 << AT91SAM9G45_ID_US0,
@@ -150,7 +144,7 @@ static struct clk ac97_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "pclk",
+        .name           = "macb_clk",
         .pmc_mask       = 1 << AT91SAM9G45_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -177,25 +171,11 @@ static struct clk vdec_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 
-static struct clk adc_op_clk = {
-        .name           = "adc_op_clk",
-        .type           = CLK_TYPE_PERIPHERAL,
-        .rate_hz        = 13200000,
-};
-
-/* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
-static struct clk aestdessha_clk = {
-        .name           = "aestdessha_clk",
-        .pmc_mask       = 1 << AT91SAM9G45_ID_AESTDESSHA,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
 static struct clk *periph_clocks[] __initdata = {
         &pioA_clk,
         &pioB_clk,
         &pioC_clk,
         &pioDE_clk,
-        &trng_clk,
         &usart0_clk,
         &usart1_clk,
         &usart2_clk,
@@ -218,14 +198,10 @@ static struct clk *periph_clocks[] __initdata = {
         &isi_clk,
         &udphs_clk,
         &mmc1_clk,
-        &adc_op_clk,
-        &aestdessha_clk,
         // irq0
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
-        /* One additional fake clock for macb_hclk */
-        CLKDEV_CON_ID("hclk", &macb_clk),
         /* One additional fake clock for ohci */
         CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
         CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
@@ -237,46 +213,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.1", &twi1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91sam9g45_ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91sam9g45_ssc.1", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffa0000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk),
-        CLKDEV_CON_DEV_ID(NULL, "atmel_sha", &aestdessha_clk),
-        CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),
-        CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),
-        /* more usart lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
-        CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
-        /* more tc lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
-        CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
-        /* fake hclk clock */
-        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
-
-        CLKDEV_CON_ID("pioA", &pioA_clk),
-        CLKDEV_CON_ID("pioB", &pioB_clk),
-        CLKDEV_CON_ID("pioC", &pioC_clk),
-        CLKDEV_CON_ID("pioD", &pioDE_clk),
-        CLKDEV_CON_ID("pioE", &pioDE_clk),
-        /* Fake adc clock */
-        CLKDEV_CON_ID("adc_clk", &tsc_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -323,29 +261,57 @@ static void __init at91sam9g45_register_clocks(void)
         clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9g45_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
+static struct at91_gpio_bank at91sam9g45_gpio[] = {
         {
                 .id             = AT91SAM9G45_ID_PIOA,
-                .regbase        = AT91SAM9G45_BASE_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
         }, {
                 .id             = AT91SAM9G45_ID_PIOB,
-                .regbase        = AT91SAM9G45_BASE_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
         }, {
                 .id             = AT91SAM9G45_ID_PIOC,
-                .regbase        = AT91SAM9G45_BASE_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
         }, {
                 .id             = AT91SAM9G45_ID_PIODE,
-                .regbase        = AT91SAM9G45_BASE_PIOD,
+                .offset         = AT91_PIOD,
+                .clock          = &pioDE_clk,
         }, {
                 .id             = AT91SAM9G45_ID_PIODE,
-                .regbase        = AT91SAM9G45_BASE_PIOE,
+                .offset         = AT91_PIOE,
+                .clock          = &pioDE_clk,
         }
 };
 
+static void at91sam9g45_reset(void)
+{
+        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
+}
+
+static void at91sam9g45_poweroff(void)
+{
+        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -355,21 +321,10 @@ static void __init at91sam9g45_map_io(void)
         at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
 }
 
-static void __init at91sam9g45_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
-        at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
-        at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
-        at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
-        at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
-        at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
-}
-
 static void __init at91sam9g45_initialize(void)
 {
-        arm_pm_idle = at91sam9_idle;
-        arm_pm_restart = at91sam9g45_restart;
+        at91_arch_reset = at91sam9g45_reset;
+        pm_power_off = at91sam9g45_poweroff;
         at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
         /* Register GPIO subsystem */
@@ -412,16 +367,15 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
         3,      /* Ethernet */
         0,      /* Image Sensor Interface */
         2,      /* USB Device High speed port */
-        0,      /* AESTDESSHA Crypto HW Accelerators */
+        0,
         0,      /* Multimedia Card Interface 1 */
         0,
         0,      /* Advanced Interrupt Controller (IRQ0) */
 };
 
-AT91_SOC_START(sam9g45)
+struct at91_init_soc __initdata at91sam9g45_soc = {
         .map_io = at91sam9g45_map_io,
         .default_irq_priority = at91sam9g45_default_irq_priority,
-        .ioremap_registers = at91sam9g45_ioremap_registers,
         .register_clocks = at91sam9g45_register_clocks,
         .init = at91sam9g45_initialize,
-AT91_SOC_END
+};
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 827c9f2a70f..371bb0ecb0d 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -13,31 +13,22 @@
 #include <asm/mach/map.h>
 
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 #include <linux/atmel-mci.h>
-#include <linux/platform_data/atmel-aes.h>
-
-#include <linux/platform_data/at91_adc.h>
 
 #include <linux/fb.h>
 #include <video/atmel_lcdc.h>
 
-#include <mach/at91_adc.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91sam9g45_matrix.h>
-#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
-#include <linux/platform_data/dma-atmel.h>
+#include <mach/at_hdmac.h>
 #include <mach/atmel-mci.h>
 
-#include <media/atmel-isi.h>
-
-#include "board.h"
 #include "generic.h"
-#include "clock.h"
 
 
 /* --------------------------------------------------------------------
@@ -47,25 +38,30 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
 
+static struct at_dma_platform_data atdma_pdata = {
+        .nr_channels    = 8,
+};
+
 static struct resource hdmac_resources[] = {
         [0] = {
-                .start  = AT91SAM9G45_BASE_DMA,
-                .end    = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DMA,
+                .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
+                .start  = AT91SAM9G45_ID_DMA,
+                .end    = AT91SAM9G45_ID_DMA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at_hdmac_device = {
-        .name           = "at91sam9g45_dma",
+        .name           = "at_hdmac",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &hdmac_dmamask,
                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &atdma_pdata,
         },
         .resource       = hdmac_resources,
         .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -73,6 +69,8 @@ static struct platform_device at_hdmac_device = {
 
 void __init at91_add_device_hdmac(void)
 {
+        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
+        dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
         platform_device_register(&at_hdmac_device);
 }
 #else
@@ -95,8 +93,8 @@ static struct resource usbh_ohci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
+                .start  = AT91SAM9G45_ID_UHPHS,
+                .end    = AT91SAM9G45_ID_UHPHS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -122,15 +120,8 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i],
-                                             data->vbus_pin_active_low[i]);
-        }
-
-        /* Enable overcurrent notification */
-        for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->overcurrent_pin[i]))
-                        at91_set_gpio_input(data->overcurrent_pin[i], 1);
+                if (data->vbus_pin[i])
+                        at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
         usbh_ohci_data = *data;
@@ -157,8 +148,8 @@ static struct resource usbh_ehci_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
+                .start  = AT91SAM9G45_ID_UHPHS,
+                .end    = AT91SAM9G45_ID_UHPHS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -184,9 +175,8 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i],
-                                             data->vbus_pin_active_low[i]);
+                if (data->vbus_pin[i])
+                        at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
         usbh_ehci_data = *data;
@@ -214,8 +204,8 @@ static struct resource usba_udc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
+                .start  = AT91SAM9G45_ID_UDPHS,
+                .end    = AT91SAM9G45_ID_UDPHS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -267,7 +257,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 
-        if (data && gpio_is_valid(data->vbus_pin)) {
+        if (data && data->vbus_pin > 0) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -288,7 +278,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct macb_platform_data eth_data;
+static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -297,8 +287,8 @@ static struct resource eth_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
+                .start  = AT91SAM9G45_ID_EMAC,
+                .end    = AT91SAM9G45_ID_EMAC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -315,12 +305,12 @@ static struct platform_device at91sam9g45_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct macb_platform_data *data)
+void __init at91_add_device_eth(struct at91_eth_data *data)
 {
         if (!data)
                 return;
 
-        if (gpio_is_valid(data->phy_irq_pin)) {
+        if (data->phy_irq_pin) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -352,7 +342,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data)
         platform_device_register(&at91sam9g45_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct macb_platform_data *data) {}
+void __init at91_add_device_eth(struct at91_eth_data *data) {}
 #endif
 
 
@@ -371,8 +361,8 @@ static struct resource mmc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
+                .start  = AT91SAM9G45_ID_MCI0,
+                .end    = AT91SAM9G45_ID_MCI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -396,8 +386,8 @@ static struct resource mmc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
+                .start  = AT91SAM9G45_ID_MCI1,
+                .end    = AT91SAM9G45_ID_MCI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -435,8 +425,10 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 
         /* DMA slave channel configuration */
         atslave->dma_dev = &at_hdmac_device.dev;
+        atslave->reg_width = AT_DMA_SLAVE_WIDTH_32BIT;
         atslave->cfg = ATC_FIFOCFG_HALFFIFO
                         | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
+        atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;
         if (mmc_id == 0)        /* MCI0 */
                 atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0)
                               | ATC_DST_PER(AT_DMA_ID_MCI0);
@@ -451,11 +443,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 
 
         /* input/irq */
-        if (gpio_is_valid(data->slot[0].detect_pin)) {
+        if (data->slot[0].detect_pin) {
                 at91_set_gpio_input(data->slot[0].detect_pin, 1);
                 at91_set_deglitch(data->slot[0].detect_pin, 1);
         }
-        if (gpio_is_valid(data->slot[0].wp_pin))
+        if (data->slot[0].wp_pin)
                 at91_set_gpio_input(data->slot[0].wp_pin, 1);
 
         if (mmc_id == 0) {              /* MCI0 */
@@ -531,8 +523,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_BASE_ECC,
-                .end    = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_ECC,
+                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -554,19 +546,19 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
-        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
+        if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
+        if (data->rdy_pin)
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
+        if (data->det_pin)
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -646,14 +638,14 @@ static struct resource twi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
+                .start  = AT91SAM9G45_ID_TWI0,
+                .end    = AT91SAM9G45_ID_TWI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9g45_twi0_device = {
-        .name           = "i2c-at91sam9g10",
+        .name           = "at91_i2c",
         .id             = 0,
         .resource       = twi0_resources,
         .num_resources  = ARRAY_SIZE(twi0_resources),
@@ -666,14 +658,14 @@ static struct resource twi1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
+                .start  = AT91SAM9G45_ID_TWI1,
+                .end    = AT91SAM9G45_ID_TWI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9g45_twi1_device = {
-        .name           = "i2c-at91sam9g10",
+        .name           = "at91_i2c",
         .id             = 1,
         .resource       = twi1_resources,
         .num_resources  = ARRAY_SIZE(twi1_resources),
@@ -686,12 +678,18 @@ void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, in
         /* pins used for TWI interface */
         if (i2c_id == 0) {
                 at91_set_A_periph(AT91_PIN_PA20, 0);            /* TWD */
+                at91_set_multi_drive(AT91_PIN_PA20, 1);
+
                 at91_set_A_periph(AT91_PIN_PA21, 0);            /* TWCK */
+                at91_set_multi_drive(AT91_PIN_PA21, 1);
 
                 platform_device_register(&at91sam9g45_twi0_device);
         } else {
                 at91_set_A_periph(AT91_PIN_PB10, 0);            /* TWD */
+                at91_set_multi_drive(AT91_PIN_PB10, 1);
+
                 at91_set_A_periph(AT91_PIN_PB11, 0);            /* TWCK */
+                at91_set_multi_drive(AT91_PIN_PB11, 1);
 
                 platform_device_register(&at91sam9g45_twi1_device);
         }
@@ -715,8 +713,8 @@ static struct resource spi0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
+                .start  = AT91SAM9G45_ID_SPI0,
+                .end    = AT91SAM9G45_ID_SPI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -741,8 +739,8 @@ static struct resource spi1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
+                .start  = AT91SAM9G45_ID_SPI1,
+                .end    = AT91SAM9G45_ID_SPI1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -776,9 +774,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
-                if (!gpio_is_valid(cs_pin))
-                        continue;
-
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
@@ -829,8 +824,8 @@ static struct resource ac97_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
+                .start  = AT91SAM9G45_ID_AC97C,
+                .end    = AT91SAM9G45_ID_AC97C,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -858,7 +853,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PD6, 0);     /* AC97RX */
 
         /* reset */
-        if (gpio_is_valid(data->reset_pin))
+        if (data->reset_pin)
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -868,96 +863,6 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 #endif
 
-/* --------------------------------------------------------------------
- *  Image Sensor Interface
- * -------------------------------------------------------------------- */
-#if defined(CONFIG_VIDEO_ATMEL_ISI) || defined(CONFIG_VIDEO_ATMEL_ISI_MODULE)
-static u64 isi_dmamask = DMA_BIT_MASK(32);
-static struct isi_platform_data isi_data;
-
-struct resource isi_resources[] = {
-        [0] = {
-                .start  = AT91SAM9G45_BASE_ISI,
-                .end    = AT91SAM9G45_BASE_ISI + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91sam9g45_isi_device = {
-        .name           = "atmel_isi",
-        .id             = 0,
-        .dev            = {
-                        .dma_mask               = &isi_dmamask,
-                        .coherent_dma_mask      = DMA_BIT_MASK(32),
-                        .platform_data          = &isi_data,
-        },
-        .resource       = isi_resources,
-        .num_resources  = ARRAY_SIZE(isi_resources),
-};
-
-static struct clk_lookup isi_mck_lookups[] = {
-        CLKDEV_CON_DEV_ID("isi_mck", "atmel_isi.0", NULL),
-};
-
-void __init at91_add_device_isi(struct isi_platform_data *data,
-                bool use_pck_as_mck)
-{
-        struct clk *pck;
-        struct clk *parent;
-
-        if (!data)
-                return;
-        isi_data = *data;
-
-        at91_set_A_periph(AT91_PIN_PB20, 0);    /* ISI_D0 */
-        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ISI_D1 */
-        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ISI_D2 */
-        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ISI_D3 */
-        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ISI_D4 */
-        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ISI_D5 */
-        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ISI_D6 */
-        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ISI_D7 */
-        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ISI_PCK */
-        at91_set_A_periph(AT91_PIN_PB30, 0);    /* ISI_HSYNC */
-        at91_set_A_periph(AT91_PIN_PB29, 0);    /* ISI_VSYNC */
-        at91_set_B_periph(AT91_PIN_PB8, 0);     /* ISI_PD8 */
-        at91_set_B_periph(AT91_PIN_PB9, 0);     /* ISI_PD9 */
-        at91_set_B_periph(AT91_PIN_PB10, 0);    /* ISI_PD10 */
-        at91_set_B_periph(AT91_PIN_PB11, 0);    /* ISI_PD11 */
-
-        platform_device_register(&at91sam9g45_isi_device);
-
-        if (use_pck_as_mck) {
-                at91_set_B_periph(AT91_PIN_PB31, 0);    /* ISI_MCK (PCK1) */
-
-                pck = clk_get(NULL, "pck1");
-                parent = clk_get(NULL, "plla");
-
-                BUG_ON(IS_ERR(pck) || IS_ERR(parent));
-
-                if (clk_set_parent(pck, parent)) {
-                        pr_err("Failed to set PCK's parent\n");
-                } else {
-                        /* Register PCK as ISI_MCK */
-                        isi_mck_lookups[0].clk = pck;
-                        clkdev_add_table(isi_mck_lookups,
-                                        ARRAY_SIZE(isi_mck_lookups));
-                }
-
-                clk_put(pck);
-                clk_put(parent);
-        }
-}
-#else
-void __init at91_add_device_isi(struct isi_platform_data *data,
-                bool use_pck_as_mck) {}
-#endif
-
 
 /* --------------------------------------------------------------------
  *  LCD Controller
@@ -974,8 +879,8 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
+                .start  = AT91SAM9G45_ID_LCDC,
+                .end    = AT91SAM9G45_ID_LCDC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1045,12 +950,12 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 static struct resource tcb0_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_BASE_TCB0,
-                .end    = AT91SAM9G45_BASE_TCB0 + SZ_256 - 1,
+                .end    = AT91SAM9G45_BASE_TCB0 + SZ_16K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
+                .start  = AT91SAM9G45_ID_TCB,
+                .end    = AT91SAM9G45_ID_TCB,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1066,12 +971,12 @@ static struct platform_device at91sam9g45_tcb0_device = {
 static struct resource tcb1_resources[] = {
         [0] = {
                 .start  = AT91SAM9G45_BASE_TCB1,
-                .end    = AT91SAM9G45_BASE_TCB1 + SZ_256 - 1,
+                .end    = AT91SAM9G45_BASE_TCB1 + SZ_16K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
+                .start  = AT91SAM9G45_ID_TCB,
+                .end    = AT91SAM9G45_ID_TCB,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1098,24 +1003,10 @@ static void __init at91_add_device_tc(void) { }
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
-static struct resource rtc_resources[] = {
-        [0] = {
-                .start  = AT91SAM9G45_BASE_RTC,
-                .end    = AT91SAM9G45_BASE_RTC + SZ_256 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
 static struct platform_device at91sam9g45_rtc_device = {
         .name           = "at91_rtc",
         .id             = -1,
-        .resource       = rtc_resources,
-        .num_resources  = ARRAY_SIZE(rtc_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_rtc(void)
@@ -1142,8 +1033,8 @@ static struct resource tsadcc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
+                .start  = AT91SAM9G45_ID_TSC,
+                .end    = AT91SAM9G45_ID_TSC,
                 .flags  = IORESOURCE_IRQ,
         }
 };
@@ -1179,116 +1070,14 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
 
 
 /* --------------------------------------------------------------------
- *  ADC
- * -------------------------------------------------------------------- */
-
-#if IS_ENABLED(CONFIG_AT91_ADC)
-static struct at91_adc_data adc_data;
-
-static struct resource adc_resources[] = {
-        [0] = {
-                .start  = AT91SAM9G45_BASE_TSC,
-                .end    = AT91SAM9G45_BASE_TSC + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
-                .flags  = IORESOURCE_IRQ,
-        }
-};
-
-static struct platform_device at91_adc_device = {
-        .name           = "at91_adc",
-        .id             = -1,
-        .dev            = {
-                                .platform_data  = &adc_data,
-        },
-        .resource       = adc_resources,
-        .num_resources  = ARRAY_SIZE(adc_resources),
-};
-
-static struct at91_adc_trigger at91_adc_triggers[] = {
-        [0] = {
-                .name = "external-rising",
-                .value = 1,
-                .is_external = true,
-        },
-        [1] = {
-                .name = "external-falling",
-                .value = 2,
-                .is_external = true,
-        },
-        [2] = {
-                .name = "external-any",
-                .value = 3,
-                .is_external = true,
-        },
-        [3] = {
-                .name = "continuous",
-                .value = 6,
-                .is_external = false,
-        },
-};
-
-static struct at91_adc_reg_desc at91_adc_register_g45 = {
-        .channel_base = AT91_ADC_CHR(0),
-        .drdy_mask = AT91_ADC_DRDY,
-        .status_register = AT91_ADC_SR,
-        .trigger_register = 0x08,
-};
-
-void __init at91_add_device_adc(struct at91_adc_data *data)
-{
-        if (!data)
-                return;
-
-        if (test_bit(0, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD20, 0);
-        if (test_bit(1, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD21, 0);
-        if (test_bit(2, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD22, 0);
-        if (test_bit(3, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD23, 0);
-        if (test_bit(4, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD24, 0);
-        if (test_bit(5, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD25, 0);
-        if (test_bit(6, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD26, 0);
-        if (test_bit(7, &data->channels_used))
-                at91_set_gpio_input(AT91_PIN_PD27, 0);
-
-        if (data->use_external_triggers)
-                at91_set_A_periph(AT91_PIN_PD28, 0);
-
-        data->num_channels = 8;
-        data->startup_time = 40;
-        data->registers = &at91_adc_register_g45;
-        data->trigger_number = 4;
-        data->trigger_list = at91_adc_triggers;
-
-        adc_data = *data;
-        platform_device_register(&at91_adc_device);
-}
-#else
-void __init at91_add_device_adc(struct at91_adc_data *data) {}
-#endif
-
-/* --------------------------------------------------------------------
  *  RTT
  * -------------------------------------------------------------------- */
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91SAM9G45_BASE_RTT,
-                .end    = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_IRQ,
         }
 };
 
@@ -1296,84 +1085,24 @@ static struct platform_device at91sam9g45_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
-#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
-static void __init at91_add_device_rtt_rtc(void)
-{
-        at91sam9g45_rtt_device.name = "rtc-at91sam9";
-        /*
-         * The second resource is needed:
-         * GPBR will serve as the storage for RTC time offset
-         */
-        at91sam9g45_rtt_device.num_resources = 3;
-        rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
-                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
-        rtt_resources[1].end = rtt_resources[1].start + 3;
-        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
-        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
-}
-#else
-static void __init at91_add_device_rtt_rtc(void)
-{
-        /* Only one resource is needed: RTT not used as RTC */
-        at91sam9g45_rtt_device.num_resources = 1;
-}
-#endif
-
 static void __init at91_add_device_rtt(void)
 {
-        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9g45_rtt_device);
 }
 
 
 /* --------------------------------------------------------------------
- *  TRNG
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_HW_RANDOM_ATMEL) || defined(CONFIG_HW_RANDOM_ATMEL_MODULE)
-static struct resource trng_resources[] = {
-        {
-                .start  = AT91SAM9G45_BASE_TRNG,
-                .end    = AT91SAM9G45_BASE_TRNG + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device at91sam9g45_trng_device = {
-        .name           = "atmel-trng",
-        .id             = -1,
-        .resource       = trng_resources,
-        .num_resources  = ARRAY_SIZE(trng_resources),
-};
-
-static void __init at91_add_device_trng(void)
-{
-        platform_device_register(&at91sam9g45_trng_device);
-}
-#else
-static void __init at91_add_device_trng(void) {}
-#endif
-
-/* --------------------------------------------------------------------
  *  Watchdog
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91SAM9G45_BASE_WDT,
-                .end    = AT91SAM9G45_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
 static struct platform_device at91sam9g45_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -1399,8 +1128,8 @@ static struct resource pwm_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
+                .start  = AT91SAM9G45_ID_PWMC,
+                .end    = AT91SAM9G45_ID_PWMC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1452,14 +1181,14 @@ static struct resource ssc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
+                .start  = AT91SAM9G45_ID_SSC0,
+                .end    = AT91SAM9G45_ID_SSC0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9g45_ssc0_device = {
-        .name   = "at91sam9g45_ssc",
+        .name   = "ssc",
         .id     = 0,
         .dev    = {
                 .dma_mask               = &ssc0_dmamask,
@@ -1494,14 +1223,14 @@ static struct resource ssc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
+                .start  = AT91SAM9G45_ID_SSC1,
+                .end    = AT91SAM9G45_ID_SSC1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9g45_ssc1_device = {
-        .name   = "at91sam9g45_ssc",
+        .name   = "ssc",
         .id     = 1,
         .dev    = {
                 .dma_mask               = &ssc1_dmamask,
@@ -1569,13 +1298,13 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91SAM9G45_BASE_DBGU,
-                .end    = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1583,6 +1312,7 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@@ -1612,8 +1342,8 @@ static struct resource uart0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
+                .start  = AT91SAM9G45_ID_US0,
+                .end    = AT91SAM9G45_ID_US0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1655,8 +1385,8 @@ static struct resource uart1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
+                .start  = AT91SAM9G45_ID_US1,
+                .end    = AT91SAM9G45_ID_US1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1698,8 +1428,8 @@ static struct resource uart2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
+                .start  = AT91SAM9G45_ID_US2,
+                .end    = AT91SAM9G45_ID_US2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1741,8 +1471,8 @@ static struct resource uart3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
+                .start  = AT91SAM9G45_ID_US3,
+                .end    = AT91SAM9G45_ID_US3,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1778,6 +1508,7 @@ static inline void configure_usart3_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1815,6 +1546,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                 at91_uarts[portnr] = pdev;
 }
 
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART) {
+                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9g45_set_console_clock(at91_uarts[portnr]->id);
+        }
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -1823,136 +1562,16 @@ void __init at91_add_device_serial(void)
                 if (at91_uarts[i])
                         platform_device_register(at91_uarts[i]);
         }
+
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 #else
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
-/* --------------------------------------------------------------------
- *  SHA1/SHA256
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_CRYPTO_DEV_ATMEL_SHA) || defined(CONFIG_CRYPTO_DEV_ATMEL_SHA_MODULE)
-static struct resource sha_resources[] = {
-        {
-                .start  = AT91SAM9G45_BASE_SHA,
-                .end    = AT91SAM9G45_BASE_SHA + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91sam9g45_sha_device = {
-        .name   = "atmel_sha",
-        .id             = -1,
-        .resource       = sha_resources,
-        .num_resources  = ARRAY_SIZE(sha_resources),
-};
-
-static void __init at91_add_device_sha(void)
-{
-        platform_device_register(&at91sam9g45_sha_device);
-}
-#else
-static void __init at91_add_device_sha(void) {}
-#endif
-
-/* --------------------------------------------------------------------
- *  DES/TDES
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_CRYPTO_DEV_ATMEL_TDES) || defined(CONFIG_CRYPTO_DEV_ATMEL_TDES_MODULE)
-static struct resource tdes_resources[] = {
-        [0] = {
-                .start  = AT91SAM9G45_BASE_TDES,
-                .end    = AT91SAM9G45_BASE_TDES + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91sam9g45_tdes_device = {
-        .name   = "atmel_tdes",
-        .id             = -1,
-        .resource       = tdes_resources,
-        .num_resources  = ARRAY_SIZE(tdes_resources),
-};
-
-static void __init at91_add_device_tdes(void)
-{
-        platform_device_register(&at91sam9g45_tdes_device);
-}
-#else
-static void __init at91_add_device_tdes(void) {}
-#endif
-
-/* --------------------------------------------------------------------
- *  AES
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_CRYPTO_DEV_ATMEL_AES) || defined(CONFIG_CRYPTO_DEV_ATMEL_AES_MODULE)
-static struct aes_platform_data aes_data;
-static u64 aes_dmamask = DMA_BIT_MASK(32);
-
-static struct resource aes_resources[] = {
-        [0] = {
-                .start  = AT91SAM9G45_BASE_AES,
-                .end    = AT91SAM9G45_BASE_AES + SZ_16K - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
-                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device at91sam9g45_aes_device = {
-        .name   = "atmel_aes",
-        .id             = -1,
-        .dev    = {
-                .dma_mask               = &aes_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data          = &aes_data,
-        },
-        .resource       = aes_resources,
-        .num_resources  = ARRAY_SIZE(aes_resources),
-};
-
-static void __init at91_add_device_aes(void)
-{
-        struct at_dma_slave     *atslave;
-        struct aes_dma_data     *alt_atslave;
-
-        alt_atslave = kzalloc(sizeof(struct aes_dma_data), GFP_KERNEL);
-
-        /* DMA TX slave channel configuration */
-        atslave = &alt_atslave->txdata;
-        atslave->dma_dev = &at_hdmac_device.dev;
-        atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE  | ATC_SRC_H2SEL_HW |
-                                                ATC_SRC_PER(AT_DMA_ID_AES_RX);
-
-        /* DMA RX slave channel configuration */
-        atslave = &alt_atslave->rxdata;
-        atslave->dma_dev = &at_hdmac_device.dev;
-        atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE  | ATC_DST_H2SEL_HW |
-                                                ATC_DST_PER(AT_DMA_ID_AES_TX);
-
-        aes_data.dma_slave = alt_atslave;
-        platform_device_register(&at91sam9g45_aes_device);
-}
-#else
-static void __init at91_add_device_aes(void) {}
-#endif
 
 /* -------------------------------------------------------------------- */
 /*
@@ -1961,18 +1580,11 @@ static void __init at91_add_device_aes(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
-        if (of_have_populated_dt())
-                return 0;
-
         at91_add_device_hdmac();
         at91_add_device_rtc();
         at91_add_device_rtt();
-        at91_add_device_trng();
         at91_add_device_watchdog();
         at91_add_device_tc();
-        at91_add_device_sha();
-        at91_add_device_tdes();
-        at91_add_device_aes();
         return 0;
 }
 
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
deleted file mode 100644
index 721a1a34dd1..00000000000
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * reset AT91SAM9G45 as per errata
- *
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcosoft.com>
- *
- * unless the SDRAM is cleanly shutdown before we hit the
- * reset register it can be left driving the data bus and
- * killing the chance of a subsequent boot from NAND
- *
- * GPLv2 Only
- */
-
-#include <linux/linkage.h>
-#include <mach/hardware.h>
-#include <mach/at91_ramc.h>
-#include "at91_rstc.h"
-                        .arm
-
-                        .globl  at91sam9g45_restart
-
-at91sam9g45_restart:
-                        ldr     r5, =at91_ramc_base             @ preload constants
-                        ldr     r0, [r5]
-                        ldr     r4, =at91_rstc_base
-                        ldr     r1, [r4]
-
-                        mov     r2, #1
-                        mov     r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
-                        ldr     r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
-
-                        .balign 32                              @ align to cache line
-
-                        str     r2, [r0, #AT91_DDRSDRC_RTR]     @ disable DDR0 access
-                        str     r3, [r0, #AT91_DDRSDRC_LPR]     @ power down DDR0
-                        str     r4, [r1, #AT91_RSTC_CR]         @ reset processor
-
-                        b       .
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
deleted file mode 100644
index 5dfc8fd8710..00000000000
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * SoC specific setup code for the AT91SAM9N12
- *
- * Copyright (C) 2012 Atmel Corporation.
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/module.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/at91sam9n12.h>
-#include <mach/at91_pmc.h>
-#include <mach/cpu.h>
-
-#include "board.h"
-#include "soc.h"
-#include "generic.h"
-#include "clock.h"
-#include "sam9_smc.h"
-
-/* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-static struct clk pioAB_clk = {
-        .name           = "pioAB_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_PIOAB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioCD_clk = {
-        .name           = "pioCD_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_PIOCD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_USART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_USART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_USART2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart3_clk = {
-        .name           = "usart3_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_USART3,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi0_clk = {
-        .name           = "twi0_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_TWI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi1_clk = {
-        .name           = "twi1_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_TWI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc_clk = {
-        .name           = "mci_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_MCI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uart0_clk = {
-        .name           = "uart0_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_UART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uart1_clk = {
-        .name           = "uart1_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_UART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb_clk = {
-        .name           = "tcb_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_TCB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pwm_clk = {
-        .name           = "pwm_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_PWM,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_ADC,
-        .type   = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma_clk = {
-        .name           = "dma_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_DMA,
-        .type   = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uhp_clk = {
-        .name           = "uhp",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_UHP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udp_clk = {
-        .name           = "udp_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_UDP,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc_clk = {
-        .name           = "ssc_clk",
-        .pmc_mask       = 1 << AT91SAM9N12_ID_SSC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioAB_clk,
-        &pioCD_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &usart3_clk,
-        &twi0_clk,
-        &twi1_clk,
-        &mmc_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &lcdc_clk,
-        &uart0_clk,
-        &uart1_clk,
-        &tcb_clk,
-        &pwm_clk,
-        &adc_clk,
-        &dma_clk,
-        &uhp_clk,
-        &udp_clk,
-        &ssc_clk,
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
-        CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
-        /* additional fake clock for macb_hclk */
-        CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
-        CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
-};
-
-/*
- * The two programmable clocks.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-
-static void __init at91sam9n12_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-        clk_register(&pck0);
-        clk_register(&pck1);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-
-}
-
-/* --------------------------------------------------------------------
- *  AT91SAM9N12 processor initialization
- * -------------------------------------------------------------------- */
-
-static void __init at91sam9n12_map_io(void)
-{
-        at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
-}
-
-void __init at91sam9n12_initialize(void)
-{
-        at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
-}
-
-AT91_SOC_START(sam9n12)
-        .map_io = at91sam9n12_map_io,
-        .register_clocks = at91sam9n12_register_clocks,
-        .init = at91sam9n12_initialize,
-AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index eb98704db2d..a238105d2c1 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,23 +10,21 @@
  */
 
 #include <linux/module.h>
+#include <linux/pm.h>
 
-#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9rl.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_rstc.h>
+#include <mach/at91_shdwc.h>
 
-#include "at91_aic.h"
-#include "at91_rstc.h"
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
-#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -184,16 +182,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffc0000.ssc", &ssc0_clk),
-        CLKDEV_CON_DEV_ID("pclk", "fffc4000.ssc", &ssc1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.1", &twi1_clk),
-        CLKDEV_CON_ID("pioA", &pioA_clk),
-        CLKDEV_CON_ID("pioB", &pioB_clk),
-        CLKDEV_CON_ID("pioC", &pioC_clk),
-        CLKDEV_CON_ID("pioD", &pioD_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
+        CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -237,26 +227,48 @@ static void __init at91sam9rl_register_clocks(void)
         clk_register(&pck1);
 }
 
+static struct clk_lookup console_clock_lookup;
+
+void __init at91sam9rl_set_console_clock(int id)
+{
+        if (id >= ARRAY_SIZE(usart_clocks_lookups))
+                return;
+
+        console_clock_lookup.con_id = "usart";
+        console_clock_lookup.clk = usart_clocks_lookups[id].clk;
+        clkdev_add(&console_clock_lookup);
+}
+
 /* --------------------------------------------------------------------
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = {
+static struct at91_gpio_bank at91sam9rl_gpio[] = {
         {
                 .id             = AT91SAM9RL_ID_PIOA,
-                .regbase        = AT91SAM9RL_BASE_PIOA,
+                .offset         = AT91_PIOA,
+                .clock          = &pioA_clk,
         }, {
                 .id             = AT91SAM9RL_ID_PIOB,
-                .regbase        = AT91SAM9RL_BASE_PIOB,
+                .offset         = AT91_PIOB,
+                .clock          = &pioB_clk,
         }, {
                 .id             = AT91SAM9RL_ID_PIOC,
-                .regbase        = AT91SAM9RL_BASE_PIOC,
+                .offset         = AT91_PIOC,
+                .clock          = &pioC_clk,
         }, {
                 .id             = AT91SAM9RL_ID_PIOD,
-                .regbase        = AT91SAM9RL_BASE_PIOD,
+                .offset         = AT91_PIOD,
+                .clock          = &pioD_clk,
         }
 };
 
+static void at91sam9rl_poweroff(void)
+{
+        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+
 /* --------------------------------------------------------------------
  *  AT91SAM9RL processor initialization
  * -------------------------------------------------------------------- */
@@ -278,20 +290,10 @@ static void __init at91sam9rl_map_io(void)
         at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
 }
 
-static void __init at91sam9rl_ioremap_registers(void)
-{
-        at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
-        at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
-        at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512);
-        at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
-        at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
-        at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX);
-}
-
 static void __init at91sam9rl_initialize(void)
 {
-        arm_pm_idle = at91sam9_idle;
-        arm_pm_restart = at91sam9_alt_restart;
+        at91_arch_reset = at91sam9_alt_reset;
+        pm_power_off = at91sam9rl_poweroff;
         at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
         /* Register GPIO subsystem */
@@ -340,10 +342,9 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
         0,      /* Advanced Interrupt Controller */
 };
 
-AT91_SOC_START(sam9rl)
+struct at91_init_soc __initdata at91sam9rl_soc = {
         .map_io = at91sam9rl_map_io,
         .default_irq_priority = at91sam9rl_default_irq_priority,
-        .ioremap_registers = at91sam9rl_ioremap_registers,
         .register_clocks = at91sam9rl_register_clocks,
         .init = at91sam9rl_initialize,
-AT91_SOC_END
+};
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index ddf223ff35c..c884d590b00 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -10,20 +10,19 @@
 #include <asm/mach/map.h>
 
 #include <linux/dma-mapping.h>
-#include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
 #include <linux/fb.h>
 #include <video/atmel_lcdc.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9rl.h>
 #include <mach/at91sam9rl_matrix.h>
-#include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
-#include <linux/platform_data/dma-atmel.h>
+#include <mach/at_hdmac.h>
 
-#include "board.h"
 #include "generic.h"
 
 
@@ -34,25 +33,30 @@
 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
 
+static struct at_dma_platform_data atdma_pdata = {
+        .nr_channels    = 2,
+};
+
 static struct resource hdmac_resources[] = {
         [0] = {
-                .start  = AT91SAM9RL_BASE_DMA,
-                .end    = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_DMA,
+                .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
+                .start  = AT91SAM9RL_ID_DMA,
+                .end    = AT91SAM9RL_ID_DMA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at_hdmac_device = {
-        .name           = "at91sam9rl_dma",
+        .name           = "at_hdmac",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &hdmac_dmamask,
                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &atdma_pdata,
         },
         .resource       = hdmac_resources,
         .num_resources  = ARRAY_SIZE(hdmac_resources),
@@ -60,6 +64,7 @@ static struct platform_device at_hdmac_device = {
 
 void __init at91_add_device_hdmac(void)
 {
+        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
         platform_device_register(&at_hdmac_device);
 }
 #else
@@ -84,8 +89,8 @@ static struct resource usba_udc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
+                .start  = AT91SAM9RL_ID_UDPHS,
+                .end    = AT91SAM9RL_ID_UDPHS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -142,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 
-        if (data && gpio_is_valid(data->vbus_pin)) {
+        if (data && data->vbus_pin > 0) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -161,9 +166,9 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
  *  MMC / SD
  * -------------------------------------------------------------------- */
 
-#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 static u64 mmc_dmamask = DMA_BIT_MASK(32);
-static struct mci_platform_data mmc_data;
+static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
         [0] = {
@@ -172,14 +177,14 @@ static struct resource mmc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
+                .start  = AT91SAM9RL_ID_MCI,
+                .end    = AT91SAM9RL_ID_MCI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9rl_mmc_device = {
-        .name           = "atmel_mci",
+        .name           = "at91_mci",
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
@@ -190,40 +195,40 @@ static struct platform_device at91sam9rl_mmc_device = {
         .num_resources  = ARRAY_SIZE(mmc_resources),
 };
 
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 {
         if (!data)
                 return;
 
-        if (data->slot[0].bus_width) {
-                /* input/irq */
-                if (gpio_is_valid(data->slot[0].detect_pin)) {
-                        at91_set_gpio_input(data->slot[0].detect_pin, 1);
-                        at91_set_deglitch(data->slot[0].detect_pin, 1);
-                }
-                if (gpio_is_valid(data->slot[0].wp_pin))
-                        at91_set_gpio_input(data->slot[0].wp_pin, 1);
-
-                /* CLK */
-                at91_set_A_periph(AT91_PIN_PA2, 0);
-
-                /* CMD */
-                at91_set_A_periph(AT91_PIN_PA1, 1);
-
-                /* DAT0, maybe DAT1..DAT3 */
-                at91_set_A_periph(AT91_PIN_PA0, 1);
-                if (data->slot[0].bus_width == 4) {
-                        at91_set_A_periph(AT91_PIN_PA3, 1);
-                        at91_set_A_periph(AT91_PIN_PA4, 1);
-                        at91_set_A_periph(AT91_PIN_PA5, 1);
-                }
-
-                mmc_data = *data;
-                platform_device_register(&at91sam9rl_mmc_device);
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        /* CLK */
+        at91_set_A_periph(AT91_PIN_PA2, 0);
+
+        /* CMD */
+        at91_set_A_periph(AT91_PIN_PA1, 1);
+
+        /* DAT0, maybe DAT1..DAT3 */
+        at91_set_A_periph(AT91_PIN_PA0, 1);
+        if (data->wire4) {
+                at91_set_A_periph(AT91_PIN_PA3, 1);
+                at91_set_A_periph(AT91_PIN_PA4, 1);
+                at91_set_A_periph(AT91_PIN_PA5, 1);
         }
+
+        mmc_data = *data;
+        platform_device_register(&at91sam9rl_mmc_device);
 }
 #else
-void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 #endif
 
 
@@ -243,8 +248,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9RL_BASE_ECC,
-                .end    = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
+                .start  = AT91_BASE_SYS + AT91_ECC,
+                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -266,19 +271,19 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         if (!data)
                 return;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
-        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (gpio_is_valid(data->enable_pin))
+        if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (gpio_is_valid(data->rdy_pin))
+        if (data->rdy_pin)
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (gpio_is_valid(data->det_pin))
+        if (data->det_pin)
                 at91_set_gpio_input(data->det_pin, 1);
 
         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
@@ -314,7 +319,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9rl_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = 0,
+        .id                     = -1,
         .dev.platform_data      = &pdata,
 };
 
@@ -339,15 +344,15 @@ static struct resource twi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
+                .start  = AT91SAM9RL_ID_TWI0,
+                .end    = AT91SAM9RL_ID_TWI0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9rl_twi_device = {
-        .name           = "i2c-at91sam9g20",
-        .id             = 0,
+        .name           = "at91_i2c",
+        .id             = -1,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
@@ -383,8 +388,8 @@ static struct resource spi_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
+                .start  = AT91SAM9RL_ID_SPI,
+                .end    = AT91SAM9RL_ID_SPI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -419,9 +424,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi_standard_cs[devices[i].chip_select];
 
-                if (!gpio_is_valid(cs_pin))
-                        continue;
-
                 /* enable chip-select pin */
                 at91_set_gpio_output(cs_pin, 1);
 
@@ -452,8 +454,8 @@ static struct resource ac97_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
+                .start  = AT91SAM9RL_ID_AC97C,
+                .end    = AT91SAM9RL_ID_AC97C,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -481,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
 
         /* reset */
-        if (gpio_is_valid(data->reset_pin))
+        if (data->reset_pin)
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -507,8 +509,8 @@ static struct resource lcdc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
+                .start  = AT91SAM9RL_ID_LCDC,
+                .end    = AT91SAM9RL_ID_LCDC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -574,18 +576,18 @@ static struct resource tcb_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
+                .start  = AT91SAM9RL_ID_TC0,
+                .end    = AT91SAM9RL_ID_TC0,
                 .flags  = IORESOURCE_IRQ,
         },
         [2] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
+                .start  = AT91SAM9RL_ID_TC1,
+                .end    = AT91SAM9RL_ID_TC1,
                 .flags  = IORESOURCE_IRQ,
         },
         [3] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
+                .start  = AT91SAM9RL_ID_TC2,
+                .end    = AT91SAM9RL_ID_TC2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -621,8 +623,8 @@ static struct resource tsadcc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
+                .start  = AT91SAM9RL_ID_TSC,
+                .end    = AT91SAM9RL_ID_TSC,
                 .flags  = IORESOURCE_IRQ,
         }
 };
@@ -683,13 +685,9 @@ static void __init at91_add_device_rtc(void) {}
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91SAM9RL_BASE_RTT,
-                .end    = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .flags  = IORESOURCE_IRQ,
         }
 };
 
@@ -697,34 +695,11 @@ static struct platform_device at91sam9rl_rtt_device = {
         .name           = "at91_rtt",
         .id             = 0,
         .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
 };
 
-#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
-static void __init at91_add_device_rtt_rtc(void)
-{
-        at91sam9rl_rtt_device.name = "rtc-at91sam9";
-        /*
-         * The second resource is needed:
-         * GPBR will serve as the storage for RTC time offset
-         */
-        at91sam9rl_rtt_device.num_resources = 3;
-        rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
-                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
-        rtt_resources[1].end = rtt_resources[1].start + 3;
-        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
-        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
-}
-#else
-static void __init at91_add_device_rtt_rtc(void)
-{
-        /* Only one resource is needed: RTT not used as RTC */
-        at91sam9rl_rtt_device.num_resources = 1;
-}
-#endif
-
 static void __init at91_add_device_rtt(void)
 {
-        at91_add_device_rtt_rtc();
         platform_device_register(&at91sam9rl_rtt_device);
 }
 
@@ -734,19 +709,10 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
-static struct resource wdt_resources[] = {
-        {
-                .start  = AT91SAM9RL_BASE_WDT,
-                .end    = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
 static struct platform_device at91sam9rl_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .resource       = wdt_resources,
-        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .num_resources  = 0,
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -772,8 +738,8 @@ static struct resource pwm_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
+                .start  = AT91SAM9RL_ID_PWMC,
+                .end    = AT91SAM9RL_ID_PWMC,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -825,14 +791,14 @@ static struct resource ssc0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
+                .start  = AT91SAM9RL_ID_SSC0,
+                .end    = AT91SAM9RL_ID_SSC0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9rl_ssc0_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 0,
         .dev    = {
                 .dma_mask               = &ssc0_dmamask,
@@ -867,14 +833,14 @@ static struct resource ssc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
+                .start  = AT91SAM9RL_ID_SSC1,
+                .end    = AT91SAM9RL_ID_SSC1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
 static struct platform_device at91sam9rl_ssc1_device = {
-        .name   = "at91rm9200_ssc",
+        .name   = "ssc",
         .id     = 1,
         .dev    = {
                 .dma_mask               = &ssc1_dmamask,
@@ -942,13 +908,13 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91SAM9RL_BASE_DBGU,
-                .end    = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
-                .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -956,6 +922,7 @@ static struct resource dbgu_resources[] = {
 static struct atmel_uart_data dbgu_data = {
         .use_dma_tx     = 0,
         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
@@ -985,8 +952,8 @@ static struct resource uart0_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
+                .start  = AT91SAM9RL_ID_US0,
+                .end    = AT91SAM9RL_ID_US0,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1036,8 +1003,8 @@ static struct resource uart1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
+                .start  = AT91SAM9RL_ID_US1,
+                .end    = AT91SAM9RL_ID_US1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1079,8 +1046,8 @@ static struct resource uart2_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
+                .start  = AT91SAM9RL_ID_US2,
+                .end    = AT91SAM9RL_ID_US2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1122,8 +1089,8 @@ static struct resource uart3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
-                .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
+                .start  = AT91SAM9RL_ID_US3,
+                .end    = AT91SAM9RL_ID_US3,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1159,6 +1126,7 @@ static inline void configure_usart3_pins(unsigned pins)
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
 
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
 {
@@ -1196,6 +1164,14 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
                 at91_uarts[portnr] = pdev;
 }
 
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART) {
+                atmel_default_console_device = at91_uarts[portnr];
+                at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
+        }
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -1204,9 +1180,13 @@ void __init at91_add_device_serial(void)
                 if (at91_uarts[i])
                         platform_device_register(at91_uarts[i]);
         }
+
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 #else
 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
deleted file mode 100644
index 44a9a62dcc1..00000000000
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
- *  Chip-specific setup code for the AT91SAM9x5 family
- *
- *  Copyright (C) 2010-2012 Atmel Corporation.
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/module.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/at91sam9x5.h>
-#include <mach/at91_pmc.h>
-#include <mach/cpu.h>
-
-#include "board.h"
-#include "soc.h"
-#include "generic.h"
-#include "clock.h"
-#include "sam9_smc.h"
-
-/* --------------------------------------------------------------------
- *  Clocks
- * -------------------------------------------------------------------- */
-
-/*
- * The peripheral clocks.
- */
-static struct clk pioAB_clk = {
-        .name           = "pioAB_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_PIOAB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pioCD_clk = {
-        .name           = "pioCD_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_PIOCD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk smd_clk = {
-        .name           = "smd_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_SMD,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart0_clk = {
-        .name           = "usart0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_USART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart1_clk = {
-        .name           = "usart1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_USART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk usart2_clk = {
-        .name           = "usart2_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_USART2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* USART3 clock - Only for sam9g25/sam9x25 */
-static struct clk usart3_clk = {
-        .name           = "usart3_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_USART3,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi0_clk = {
-        .name           = "twi0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_TWI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi1_clk = {
-        .name           = "twi1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_TWI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk twi2_clk = {
-        .name           = "twi2_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_TWI2,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc0_clk = {
-        .name           = "mci0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_MCI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi0_clk = {
-        .name           = "spi0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_SPI0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk spi1_clk = {
-        .name           = "spi1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_SPI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uart0_clk = {
-        .name           = "uart0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_UART0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uart1_clk = {
-        .name           = "uart1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_UART1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk tcb0_clk = {
-        .name           = "tcb0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_TCB,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk pwm_clk = {
-        .name           = "pwm_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_PWM,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk adc_clk = {
-        .name           = "adc_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_ADC,
-        .type   = CLK_TYPE_PERIPHERAL,
-};
-static struct clk adc_op_clk = {
-        .name           = "adc_op_clk",
-        .type           = CLK_TYPE_PERIPHERAL,
-        .rate_hz        = 5000000,
-};
-static struct clk dma0_clk = {
-        .name           = "dma0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_DMA0,
-        .type   = CLK_TYPE_PERIPHERAL,
-};
-static struct clk dma1_clk = {
-        .name           = "dma1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_DMA1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk uhphs_clk = {
-        .name           = "uhphs",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_UHPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk udphs_clk = {
-        .name           = "udphs_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_UDPHS,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* emac0 clock - Only for sam9g25/sam9x25/sam9g35/sam9x35 */
-static struct clk macb0_clk = {
-        .name           = "pclk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_EMAC0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* lcd clock - Only for sam9g15/sam9g35/sam9x35 */
-static struct clk lcdc_clk = {
-        .name           = "lcdc_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_LCDC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* isi clock - Only for sam9g25 */
-static struct clk isi_clk = {
-        .name           = "isi_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_ISI,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk mmc1_clk = {
-        .name           = "mci1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_MCI1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* emac1 clock - Only for sam9x25 */
-static struct clk macb1_clk = {
-        .name           = "pclk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_EMAC1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-static struct clk ssc_clk = {
-        .name           = "ssc_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_SSC,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* can0 clock - Only for sam9x35 */
-static struct clk can0_clk = {
-        .name           = "can0_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_CAN0,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-/* can1 clock - Only for sam9x35 */
-static struct clk can1_clk = {
-        .name           = "can1_clk",
-        .pmc_mask       = 1 << AT91SAM9X5_ID_CAN1,
-        .type           = CLK_TYPE_PERIPHERAL,
-};
-
-static struct clk *periph_clocks[] __initdata = {
-        &pioAB_clk,
-        &pioCD_clk,
-        &smd_clk,
-        &usart0_clk,
-        &usart1_clk,
-        &usart2_clk,
-        &twi0_clk,
-        &twi1_clk,
-        &twi2_clk,
-        &mmc0_clk,
-        &spi0_clk,
-        &spi1_clk,
-        &uart0_clk,
-        &uart1_clk,
-        &tcb0_clk,
-        &pwm_clk,
-        &adc_clk,
-        &adc_op_clk,
-        &dma0_clk,
-        &dma1_clk,
-        &uhphs_clk,
-        &udphs_clk,
-        &mmc1_clk,
-        &ssc_clk,
-        // irq0
-};
-
-static struct clk_lookup periph_clocks_lookups[] = {
-        /* lookup table for DT entries */
-        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
-        CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &usart0_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk),
-        CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
-        CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
-        CLKDEV_CON_DEV_ID("mci_clk", "f000c000.mmc", &mmc1_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
-        CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
-        CLKDEV_CON_DEV_ID("pclk", "f0010000.ssc", &ssc_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
-        CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
-        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCD_clk),
-        /* additional fake clock for macb_hclk */
-        CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
-        CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
-        CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
-        CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
-};
-
-/*
- * The two programmable clocks.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
-        .name           = "pck0",
-        .pmc_mask       = AT91_PMC_PCK0,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 0,
-};
-static struct clk pck1 = {
-        .name           = "pck1",
-        .pmc_mask       = AT91_PMC_PCK1,
-        .type           = CLK_TYPE_PROGRAMMABLE,
-        .id             = 1,
-};
-
-static void __init at91sam9x5_register_clocks(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
-                clk_register(periph_clocks[i]);
-
-        clkdev_add_table(periph_clocks_lookups,
-                         ARRAY_SIZE(periph_clocks_lookups));
-
-        if (cpu_is_at91sam9g25()
-        || cpu_is_at91sam9x25())
-                clk_register(&usart3_clk);
-
-        if (cpu_is_at91sam9g25()
-        || cpu_is_at91sam9x25()
-        || cpu_is_at91sam9g35()
-        || cpu_is_at91sam9x35())
-                clk_register(&macb0_clk);
-
-        if (cpu_is_at91sam9g15()
-        || cpu_is_at91sam9g35()
-        || cpu_is_at91sam9x35())
-                clk_register(&lcdc_clk);
-
-        if (cpu_is_at91sam9g25())
-                clk_register(&isi_clk);
-
-        if (cpu_is_at91sam9x25())
-                clk_register(&macb1_clk);
-
-        if (cpu_is_at91sam9x25()
-        || cpu_is_at91sam9x35()) {
-                clk_register(&can0_clk);
-                clk_register(&can1_clk);
-        }
-
-        clk_register(&pck0);
-        clk_register(&pck1);
-}
-
-/* --------------------------------------------------------------------
- *  AT91SAM9x5 processor initialization
- * -------------------------------------------------------------------- */
-
-static void __init at91sam9x5_map_io(void)
-{
-        at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
-}
-
-/* --------------------------------------------------------------------
- *  Interrupt initialization
- * -------------------------------------------------------------------- */
-
-AT91_SOC_START(sam9x5)
-        .map_io = at91sam9x5_map_io,
-        .register_clocks = at91sam9x5_register_clocks,
-AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 19ca7939690..56ba3bd035a 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -13,15 +13,10 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
-#include <linux/io.h>
-#include <asm/proc-fns.h>
-#include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <mach/at91x40.h>
 #include <mach/at91_st.h>
 #include <mach/timex.h>
-
-#include "at91_aic.h"
 #include "generic.h"
 
 /*
@@ -42,19 +37,8 @@ unsigned long clk_get_rate(struct clk *clk)
         return AT91X40_MASTER_CLOCK;
 }
 
-static void at91x40_idle(void)
-{
-        /*
-         * Disable the processor clock.  The processor will be automatically
-         * re-enabled by an interrupt or by a reset.
-         */
-        __raw_writel(AT91_PS_CR_CPU, AT91_IO_P2V(AT91_PS_CR));
-        cpu_do_idle();
-}
-
 void __init at91x40_initialize(unsigned long main_clock)
 {
-        arm_pm_idle = at91x40_idle;
         at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
                         | (1 << AT91X40_ID_IRQ2);
 }
@@ -89,6 +73,6 @@ void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS])
         if (!priority)
                 priority = at91x40_default_irq_priority;
 
-        at91_aic_init(priority, at91_extern_irq);
+        at91_aic_init(priority);
 }
 
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index 0e57e440c06..dfff2895f4b 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -26,14 +26,7 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <asm/mach/time.h>
-
-#include "at91_tc.h"
-
-#define at91_tc_read(field) \
-        __raw_readl(AT91_IO_P2V(AT91_TC) + field)
-
-#define at91_tc_write(field, value) \
-        __raw_writel(value, AT91_IO_P2V(AT91_TC) + field);
+#include <mach/at91_tc.h>
 
 /*
  *      3 counter/timer units present.
@@ -44,12 +37,12 @@
 
 static unsigned long at91x40_gettimeoffset(void)
 {
-        return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128));
+        return (at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128));
 }
 
 static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
 {
-        at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR);
+        at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_SR);
         timer_tick();
         return IRQ_HANDLED;
 }
@@ -64,20 +57,20 @@ void __init at91x40_timer_init(void)
 {
         unsigned int v;
 
-        at91_tc_write(AT91_TC_BCR, 0);
-        v = at91_tc_read(AT91_TC_BMR);
+        at91_sys_write(AT91_TC + AT91_TC_BCR, 0);
+        v = at91_sys_read(AT91_TC + AT91_TC_BMR);
         v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE;
-        at91_tc_write(AT91_TC_BMR, v);
+        at91_sys_write(AT91_TC + AT91_TC_BMR, v);
 
-        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
-        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
-        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
-        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
-        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
+        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
+        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
+        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
+        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
+        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
 
         setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq);
 
-        at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
+        at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
 }
 
 struct sys_timer at91x40_timer = {
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index b99b5752cc1..5aa58851eb3 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -19,7 +19,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -34,10 +33,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -48,17 +47,29 @@ static void __init onearm_init_early(void)
 
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata onearm_eth_data = {
+static struct at91_eth_data __initdata onearm_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata onearm_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata onearm_udc_data = {
@@ -69,16 +80,6 @@ static struct at91_udc_data __initdata onearm_udc_data = {
 static void __init onearm_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
-
-        /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&onearm_eth_data);
@@ -92,7 +93,6 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = onearm_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = onearm_board_init,
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 854b9797428..b0c796d42e4 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -25,7 +25,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -43,8 +42,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include "at91_aic.h"
-#include "board.h"
+#include <mach/board.h>
+#include <mach/gpio.h>
+
 #include "generic.h"
 
 
@@ -52,6 +52,22 @@ static void __init afeb9260_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1,
+                             ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR
+                           | ATMEL_UART_DCD | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2,
+                        ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -59,8 +75,6 @@ static void __init afeb9260_init_early(void)
  */
 static struct at91_usbh_data __initdata afeb9260_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -68,7 +82,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = {
  */
 static struct at91_udc_data __initdata afeb9260_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -89,7 +103,7 @@ static struct spi_board_info afeb9260_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata afeb9260_macb_data = {
+static struct at91_eth_data __initdata afeb9260_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA9,
         .is_rmii        = 0,
 };
@@ -116,28 +130,30 @@ static struct mtd_partition __initdata afeb9260_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(afeb9260_nand_partition);
+        return afeb9260_nand_partition;
+}
+
 static struct atmel_nand_data __initdata afeb9260_nand_data = {
         .ale            = 21,
         .cle            = 22,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
+        .partition_info = nand_partitions,
         .bus_width_16   = 0,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .parts          = afeb9260_nand_partition,
-        .num_parts      = ARRAY_SIZE(afeb9260_nand_partition),
-        .det_pin        = -EINVAL,
 };
 
 
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata afeb9260_mci0_data = {
-        .slot[1] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PC9,
-                .wp_pin         = AT91_PIN_PC4,
-        },
+static struct at91_mmc_data __initdata afeb9260_mmc_data = {
+        .det_pin        = AT91_PIN_PC9,
+        .wp_pin         = AT91_PIN_PC4,
+        .slot_b         = 1,
+        .wire4          = 1,
 };
 
 
@@ -158,8 +174,6 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
 static struct at91_cf_data afeb9260_cf_data = {
         .chipselect = 4,
         .irq_pin    = AT91_PIN_PA6,
-        .det_pin        = -EINVAL,
-        .vcc_pin        = -EINVAL,
         .rst_pin    = AT91_PIN_PA7,
         .flags      = AT91_CF_TRUE_IDE,
 };
@@ -167,18 +181,6 @@ static struct at91_cf_data afeb9260_cf_data = {
 static void __init afeb9260_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1,
-                             ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR
-                           | ATMEL_UART_DCD | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2,
-                        ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&afeb9260_usbh_data);
@@ -198,7 +200,7 @@ static void __init afeb9260_board_init(void)
         at91_set_B_periph(AT91_PIN_PA10, 0);    /* ETX2 */
         at91_set_B_periph(AT91_PIN_PA11, 0);    /* ETX3 */
         /* MMC */
-        at91_add_device_mci(0, &afeb9260_mci0_data);
+        at91_add_device_mmc(0, &afeb9260_mmc_data);
         /* I2C */
         at91_add_device_i2c(afeb9260_i2c_devices,
                         ARRAY_SIZE(afeb9260_i2c_devices));
@@ -212,7 +214,6 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board")
         /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = afeb9260_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = afeb9260_board_init,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 28a18ce6d91..d1abd5898e8 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -21,7 +21,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -38,10 +37,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -50,6 +49,12 @@ static void __init cam60_init_early(void)
 {
         /* Initialize processor: 10 MHz crystal */
         at91_initialize(10000000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -57,8 +62,6 @@ static void __init cam60_init_early(void)
  */
 static struct at91_usbh_data __initdata cam60_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -112,7 +115,7 @@ static struct spi_board_info cam60_spi_devices[] __initdata = {
 /*
  * MACB Ethernet device
  */
-static struct __initdata macb_platform_data cam60_macb_data = {
+static struct __initdata at91_eth_data cam60_macb_data = {
         .phy_irq_pin    = AT91_PIN_PB5,
         .is_rmii        = 0,
 };
@@ -129,15 +132,19 @@ static struct mtd_partition __initdata cam60_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(cam60_nand_partition);
+        return cam60_nand_partition;
+}
+
 static struct atmel_nand_data __initdata cam60_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        .det_pin        = -EINVAL,
+        // .det_pin     = ... not there
         .rdy_pin        = AT91_PIN_PA9,
         .enable_pin     = AT91_PIN_PA7,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .parts          = cam60_nand_partition,
-        .num_parts      = ARRAY_SIZE(cam60_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata cam60_nand_smc_config = {
@@ -161,7 +168,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = {
 static void __init cam60_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &cam60_nand_smc_config);
+        sam9_smc_configure(3, &cam60_nand_smc_config);
 
         at91_add_device_nand(&cam60_nand_data);
 }
@@ -170,8 +177,6 @@ static void __init cam60_add_device_nand(void)
 static void __init cam60_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         /* SPI */
         at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
@@ -189,7 +194,6 @@ MACHINE_START(CAM60, "KwikByte CAM60")
         /* Maintainer: KwikByte */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = cam60_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = cam60_board_init,
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index c17bb533a94..c578c5d9072 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -35,9 +34,9 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -45,17 +44,26 @@ static void __init carmeva_init_early(void)
 {
         /* Initialize processor: 20.000 MHz crystal */
         at91_initialize(20000000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata carmeva_eth_data = {
+static struct at91_eth_data __initdata carmeva_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata carmeva_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata carmeva_udc_data = {
@@ -67,16 +75,15 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
 // static struct at91_cf_data __initdata carmeva_cf_data = {
 //      .det_pin        = AT91_PIN_PB0,
 //      .rst_pin        = AT91_PIN_PC5,
-        // .irq_pin     = -EINVAL,
-        // .vcc_pin     = -EINVAL,
+        // .irq_pin     = ... not connected
+        // .vcc_pin     = ... always powered
 // };
 
-static struct mci_platform_data __initdata carmeva_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PB10,
-                .wp_pin         = AT91_PIN_PC14,
-        },
+static struct at91_mmc_data __initdata carmeva_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PB10,
+        .wp_pin         = AT91_PIN_PC14,
 };
 
 static struct spi_board_info carmeva_spi_devices[] = {
@@ -129,13 +136,6 @@ static struct gpio_led carmeva_leds[] = {
 static void __init carmeva_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&carmeva_eth_data);
@@ -150,7 +150,7 @@ static void __init carmeva_board_init(void)
         /* Compact Flash */
 //      at91_add_device_cf(&carmeva_cf_data);
         /* MMC */
-        at91_add_device_mci(0, &carmeva_mci0_data);
+        at91_add_device_mmc(0, &carmeva_mmc_data);
         /* LEDs */
         at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds));
 }
@@ -159,7 +159,6 @@ MACHINE_START(CARMEVA, "Carmeva")
         /* Maintainer: Conitec Datasystems */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = carmeva_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = carmeva_board_init,
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 847432441ec..f4da8a16d5d 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -21,7 +21,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -40,12 +39,11 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/at91sam9260_matrix.h>
-#include <mach/at91_matrix.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -53,6 +51,34 @@ static void __init cpu9krea_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DGBU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
+                ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
+                ATMEL_UART_DCD | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
+                ATMEL_UART_RTS);
+
+        /* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
+                ATMEL_UART_RTS);
+
+        /* USART3 on ttyS4. (Rx, Tx) */
+        at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
+
+        /* USART4 on ttyS5. (Rx, Tx) */
+        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
+
+        /* USART5 on ttyS6. (Rx, Tx) */
+        at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -60,8 +86,6 @@ static void __init cpu9krea_init_early(void)
  */
 static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -69,14 +93,13 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
  */
 static struct at91_udc_data __initdata cpu9krea_udc_data = {
         .vbus_pin       = AT91_PIN_PC8,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata cpu9krea_macb_data = {
-        .phy_irq_pin    = -EINVAL,
+static struct at91_eth_data __initdata cpu9krea_macb_data = {
         .is_rmii        = 1,
 };
 
@@ -89,8 +112,6 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
-        .det_pin        = -EINVAL,
-        .ecc_mode       = NAND_ECC_SOFT,
 };
 
 #ifdef CONFIG_MACH_CPU9260
@@ -135,7 +156,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
 
 static void __init cpu9krea_add_device_nand(void)
 {
-        sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
+        sam9_smc_configure(3, &cpu9krea_nand_smc_config);
         at91_add_device_nand(&cpu9krea_nand_data);
 }
 
@@ -213,11 +234,11 @@ static __init void cpu9krea_add_device_nor(void)
 {
         unsigned long csa;
 
-        csa = at91_matrix_read(AT91_MATRIX_EBICSA);
-        at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
 
         /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
+        sam9_smc_configure(0, &cpu9krea_nor_smc_config);
 
         platform_device_register(&cpu9krea_nor_flash);
 }
@@ -254,7 +275,8 @@ static struct gpio_led cpu9krea_leds[] = {
 
 static struct i2c_board_info __initdata cpu9krea_i2c_devices[] = {
         {
-                I2C_BOARD_INFO("ds1339", 0x68),
+                I2C_BOARD_INFO("rtc-ds1307", 0x68),
+                .type   = "ds1339",
         },
 };
 
@@ -311,12 +333,10 @@ static void __init cpu9krea_add_device_buttons(void)
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata cpu9krea_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PA29,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata cpu9krea_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PA29,
 };
 
 static void __init cpu9krea_board_init(void)
@@ -324,30 +344,6 @@ static void __init cpu9krea_board_init(void)
         /* NOR */
         cpu9krea_add_device_nor();
         /* Serial */
-        /* DGBU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
-                ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
-                ATMEL_UART_DCD | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |
-                ATMEL_UART_RTS);
-
-        /* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |
-                ATMEL_UART_RTS);
-
-        /* USART3 on ttyS4. (Rx, Tx) */
-        at91_register_uart(AT91SAM9260_ID_US3, 4, 0);
-
-        /* USART4 on ttyS5. (Rx, Tx) */
-        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
-
-        /* USART5 on ttyS6. (Rx, Tx) */
-        at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&cpu9krea_usbh_data);
@@ -358,7 +354,7 @@ static void __init cpu9krea_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&cpu9krea_macb_data);
         /* MMC */
-        at91_add_device_mci(0, &cpu9krea_mci0_data);
+        at91_add_device_mmc(0, &cpu9krea_mmc_data);
         /* I2C */
         at91_add_device_i2c(cpu9krea_i2c_devices,
                 ARRAY_SIZE(cpu9krea_i2c_devices));
@@ -376,7 +372,6 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
         /* Maintainer: Eric Benard - EUKREA Electromatique */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = cpu9krea_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = cpu9krea_board_init,
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 2a7af786874..2d919f5a4f5 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -19,7 +19,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -36,12 +35,11 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 static struct gpio_led cpuat91_leds[] = {
@@ -60,17 +58,36 @@ static void __init cpuat91_init_early(void)
 
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
+                ATMEL_UART_RTS);
+
+        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
+                ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
+                ATMEL_UART_DCD | ATMEL_UART_RI);
+
+        /* USART2 on ttyS3 (Rx, Tx) */
+        at91_register_uart(AT91RM9200_ID_US2, 3, 0);
+
+        /* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
+                ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata cpuat91_eth_data = {
-        .phy_irq_pin    = -EINVAL,
+static struct at91_eth_data __initdata cpuat91_eth_data = {
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata cpuat91_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata cpuat91_udc_data = {
@@ -78,12 +95,9 @@ static struct at91_udc_data __initdata cpuat91_udc_data = {
         .pullup_pin     = AT91_PIN_PC14,
 };
 
-static struct mci_platform_data __initdata cpuat91_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PC2,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata cpuat91_mmc_data = {
+        .det_pin        = AT91_PIN_PC2,
+        .wire4          = 1,
 };
 
 static struct physmap_flash_data cpuat91_flash_data = {
@@ -141,24 +155,6 @@ static struct platform_device *platform_devices[] __initdata = {
 static void __init cpuat91_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |
-                ATMEL_UART_RTS);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |
-                ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |
-                ATMEL_UART_DCD | ATMEL_UART_RI);
-
-        /* USART2 on ttyS3 (Rx, Tx) */
-        at91_register_uart(AT91RM9200_ID_US2, 3, 0);
-
-        /* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |
-                ATMEL_UART_RTS);
         at91_add_device_serial();
         /* LEDs. */
         at91_gpio_leds(cpuat91_leds, ARRAY_SIZE(cpuat91_leds));
@@ -169,7 +165,7 @@ static void __init cpuat91_board_init(void)
         /* USB Device */
         at91_add_device_udc(&cpuat91_udc_data);
         /* MMC */
-        at91_add_device_mci(0, &cpuat91_mci0_data);
+        at91_add_device_mmc(0, &cpuat91_mmc_data);
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Platform devices */
@@ -180,7 +176,6 @@ MACHINE_START(CPUAT91, "Eukrea")
         /* Maintainer: Eric Benard - EUKREA Electromatique */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = cpuat91_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = cpuat91_board_init,
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index 48a531e05be..17654d5e94e 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -19,7 +19,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -38,9 +37,9 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -48,24 +47,29 @@ static void __init csb337_init_early(void)
 {
         /* Initialize processor: 3.6864 MHz crystal */
         at91_initialize(3686400);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
+
+        /* DBGU on ttyS0 */
+        at91_register_uart(0, 0, 0);
+
+        /* make console=ttyS0 the default */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata csb337_eth_data = {
+static struct at91_eth_data __initdata csb337_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC2,
         .is_rmii        = 0,
-        /* The CSB337 bootloader stores the MAC the wrong-way around */
-        .rev_eth_addr   = 1,
 };
 
 static struct at91_usbh_data __initdata csb337_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata csb337_udc_data = {
+        // this has no VBUS sensing pin
         .pullup_pin     = AT91_PIN_PA24,
-        .vbus_pin       = -EINVAL,
 };
 
 static struct i2c_board_info __initdata csb337_i2c_devices[] = {
@@ -89,12 +93,11 @@ static struct at91_cf_data __initdata csb337_cf_data = {
         .rst_pin        = AT91_PIN_PD2,
 };
 
-static struct mci_platform_data __initdata csb337_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PD5,
-                .wp_pin         = AT91_PIN_PD6,
-        },
+static struct at91_mmc_data __initdata csb337_mmc_data = {
+        .det_pin        = AT91_PIN_PD5,
+        .slot_b         = 0,
+        .wire4          = 1,
+        .wp_pin         = AT91_PIN_PD6,
 };
 
 static struct spi_board_info csb337_spi_devices[] = {
@@ -223,8 +226,6 @@ static struct gpio_led csb_leds[] = {
 static void __init csb337_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0 */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&csb337_eth_data);
@@ -240,7 +241,7 @@ static void __init csb337_board_init(void)
         /* SPI */
         at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
         /* MMC */
-        at91_add_device_mci(0, &csb337_mci0_data);
+        at91_add_device_mmc(0, &csb337_mmc_data);
         /* NOR flash */
         platform_device_register(&csb_flash);
         /* LEDs */
@@ -253,7 +254,6 @@ MACHINE_START(CSB337, "Cogent CSB337")
         /* Maintainer: Bill Gatliff */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = csb337_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = csb337_board_init,
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index ec0f3abd504..72b55674616 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -20,7 +20,6 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
-#include <linux/gpio.h>
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
@@ -35,9 +34,9 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -45,17 +44,21 @@ static void __init csb637_init_early(void)
 {
         /* Initialize processor: 3.6864 MHz crystal */
         at91_initialize(3686400);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* make console=ttyS0 (ie, DBGU) the default */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata csb637_eth_data = {
+static struct at91_eth_data __initdata csb637_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC0,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata csb637_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata csb637_udc_data = {
@@ -113,8 +116,6 @@ static void __init csb637_board_init(void)
         /* LED(s) */
         at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&csb637_eth_data);
@@ -134,7 +135,6 @@ MACHINE_START(CSB637, "Cogent CSB637")
         /* Maintainer: Bill Gatliff */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = csb637_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = csb637_board_init,
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
deleted file mode 100644
index 881170ce61d..00000000000
--- a/arch/arm/mach-at91/board-dt.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- *  Setup code for AT91SAM Evaluation Kits with Device Tree support
- *
- *  Copyright (C) 2011 Atmel,
- *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-
-#include <asm/setup.h>
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include "at91_aic.h"
-#include "board.h"
-#include "generic.h"
-
-
-static const struct of_device_id irq_of_match[] __initconst = {
-
-        { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
-        { /*sentinel*/ }
-};
-
-static void __init at91_dt_init_irq(void)
-{
-        of_irq_init(irq_of_match);
-}
-
-static void __init at91_dt_device_init(void)
-{
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char *at91_dt_board_compat[] __initdata = {
-        "atmel,at91sam9",
-        NULL
-};
-
-DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
-        /* Maintainer: Atmel */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = at91_dt_initialize,
-        .init_irq       = at91_dt_init_irq,
-        .init_machine   = at91_dt_device_init,
-        .dt_compat      = at91_dt_board_compat,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c
index b489388a6f8..d2023f27c65 100644
--- a/arch/arm/mach-at91/board-eb01.c
+++ b/arch/arm/mach-at91/board-eb01.c
@@ -27,9 +27,7 @@
 #include <mach/hardware.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-
-#include "at91_aic.h"
-#include "board.h"
+#include <mach/board.h>
 #include "generic.h"
 
 static void __init at91eb01_init_irq(void)
@@ -45,7 +43,6 @@ static void __init at91eb01_init_early(void)
 MACHINE_START(AT91EB01, "Atmel AT91 EB01")
         /* Maintainer: Greg Ungerer <gerg@snapgear.com> */
         .timer          = &at91x40_timer,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = at91eb01_init_early,
         .init_irq       = at91eb01_init_irq,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 9f5e71c95f0..01170a2766a 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -35,8 +34,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include "at91_aic.h"
-#include "board.h"
+#include <mach/board.h>
+#include <mach/gpio.h>
+
 #include "generic.h"
 
 
@@ -44,17 +44,29 @@ static void __init eb9200_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                        | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                        | ATMEL_UART_RI);
+
+        /* USART2 on ttyS2. (Rx, Tx) - IRDA */
+        at91_register_uart(AT91RM9200_ID_US2, 2, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata eb9200_eth_data = {
+static struct at91_eth_data __initdata eb9200_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata eb9200_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata eb9200_udc_data = {
@@ -63,18 +75,15 @@ static struct at91_udc_data __initdata eb9200_udc_data = {
 };
 
 static struct at91_cf_data __initdata eb9200_cf_data = {
-        .irq_pin        = -EINVAL,
         .det_pin        = AT91_PIN_PB0,
-        .vcc_pin        = -EINVAL,
         .rst_pin        = AT91_PIN_PC5,
+        // .irq_pin     = ... not connected
+        // .vcc_pin     = ... always powered
 };
 
-static struct mci_platform_data __initdata eb9200_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata eb9200_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
 };
 
 static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
@@ -87,16 +96,6 @@ static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
 static void __init eb9200_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                        | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                        | ATMEL_UART_RI);
-
-        /* USART2 on ttyS2. (Rx, Tx) - IRDA */
-        at91_register_uart(AT91RM9200_ID_US2, 2, 0);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&eb9200_eth_data);
@@ -112,13 +111,12 @@ static void __init eb9200_board_init(void)
         at91_add_device_spi(NULL, 0);
         /* MMC */
         /* only supports 1 or 4 bit interface, not wired through to SPI */
-        at91_add_device_mci(0, &eb9200_mci0_data);
+        at91_add_device_mmc(0, &eb9200_mmc_data);
 }
 
 MACHINE_START(ATEB9200, "Embest ATEB9200")
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = eb9200_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = eb9200_board_init,
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index ef69e0ebe94..7c0313c51f2 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -37,10 +36,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -51,25 +50,32 @@ static void __init ecb_at91init_early(void)
 
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx & Tx only) */
+        at91_register_uart(AT91RM9200_ID_US0, 1, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata ecb_at91eth_data = {
+static struct at91_eth_data __initdata ecb_at91eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata ecb_at91usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
-static struct mci_platform_data __initdata ecbat91_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata ecb_at91mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
 };
 
 
@@ -138,26 +144,9 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = {
         },
 };
 
-/*
- * LEDs
- */
-static struct gpio_led ecb_leds[] = {
-        {       /* D1 */
-                .name                   = "led1",
-                .gpio                   = AT91_PIN_PC7,
-                .active_low             = 1,
-                .default_trigger        = "heartbeat",
-        }
-};
-
 static void __init ecb_at91board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx & Tx only) */
-        at91_register_uart(AT91RM9200_ID_US0, 1, 0);
         at91_add_device_serial();
 
         /* Ethernet */
@@ -170,20 +159,16 @@ static void __init ecb_at91board_init(void)
         at91_add_device_i2c(NULL, 0);
 
         /* MMC */
-        at91_add_device_mci(0, &ecbat91_mci0_data);
+        at91_add_device_mmc(0, &ecb_at91mmc_data);
 
         /* SPI */
         at91_add_device_spi(ecb_at91spi_devices, ARRAY_SIZE(ecb_at91spi_devices));
-
-        /* LEDs */
-        at91_gpio_leds(ecb_leds, ARRAY_SIZE(ecb_leds));
 }
 
 MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
         /* Maintainer: emQbit.com */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ecb_at91init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ecb_at91board_init,
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 50f3d3795c0..8252c722607 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -24,12 +24,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <mach/board.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 static void __init eco920_init_early(void)
@@ -38,17 +36,24 @@ static void __init eco920_init_early(void)
         at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
 
         at91_initialize(18432000);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
+
+        /* DBGU on ttyS0. (Rx & Tx only */
+        at91_register_uart(0, 0, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata eco920_eth_data = {
+static struct at91_eth_data __initdata eco920_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC2,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata eco920_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata eco920_udc_data = {
@@ -56,12 +61,9 @@ static struct at91_udc_data __initdata eco920_udc_data = {
         .pullup_pin     = AT91_PIN_PB13,
 };
 
-static struct mci_platform_data __initdata eco920_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 1,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata eco920_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 0,
 };
 
 static struct physmap_flash_data eco920_flash_data = {
@@ -93,37 +95,17 @@ static struct spi_board_info eco920_spi_devices[] = {
         },
 };
 
-/*
- * LEDs
- */
-static struct gpio_led eco920_leds[] = {
-        {       /* D1 */
-                .name                   = "led1",
-                .gpio                   = AT91_PIN_PB0,
-                .active_low             = 1,
-                .default_trigger        = "heartbeat",
-        },
-        {       /* D2 */
-                .name                   = "led2",
-                .gpio                   = AT91_PIN_PB1,
-                .active_low             = 1,
-                .default_trigger        = "timer",
-        }
-};
-
 static void __init eco920_board_init(void)
 {
-        /* DBGU on ttyS0. (Rx & Tx only */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         at91_add_device_eth(&eco920_eth_data);
         at91_add_device_usbh(&eco920_usbh_data);
         at91_add_device_udc(&eco920_udc_data);
 
-        at91_add_device_mci(0, &eco920_mci0_data);
+        at91_add_device_mmc(0, &eco920_mmc_data);
         platform_device_register(&eco920_flash);
 
-        at91_ramc_write(0, AT91_SMC_CSR(7),     AT91_SMC_RWHOLD_(1)
+        at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
                                 | AT91_SMC_RWSETUP_(1)
                                 | AT91_SMC_DBW_8
                                 | AT91_SMC_WSEN
@@ -135,7 +117,7 @@ static void __init eco920_board_init(void)
         at91_set_deglitch(AT91_PIN_PA23, 1);
 
 /* Initialization of the Static Memory Controller for Chip Select 3 */
-        at91_ramc_write(0, AT91_SMC_CSR(3),
+        at91_sys_write(AT91_SMC_CSR(3),
                 AT91_SMC_DBW_16  |      /* 16 bit */
                 AT91_SMC_WSEN    |
                 AT91_SMC_NWS_(5) |      /* wait states */
@@ -143,15 +125,12 @@ static void __init eco920_board_init(void)
         );
 
         at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices));
-        /* LEDs */
-        at91_gpio_leds(eco920_leds, ARRAY_SIZE(eco920_leds));
 }
 
 MACHINE_START(ECO920, "eco920")
         /* Maintainer: Sascha Hauer */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = eco920_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = eco920_board_init,
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 5d44eba0f20..4c3f65d9c59 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-at91/board-flexibity.c
  *
- *  Copyright (C) 2010-2011 Flexibity
+ *  Copyright (C) 2010 Flexibity
  *  Copyright (C) 2005 SAN People
  *  Copyright (C) 2006 Atmel
  *
@@ -33,35 +33,31 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 static void __init flexibity_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /* USB Host port */
 static struct at91_usbh_data __initdata flexibity_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /* USB Device port */
 static struct at91_udc_data __initdata flexibity_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
-};
-
-/* I2C devices */
-static struct i2c_board_info __initdata flexibity_i2c_devices[] = {
-        {
-                I2C_BOARD_INFO("ds1307", 0x68),
-        },
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 /* SPI devices */
@@ -75,12 +71,11 @@ static struct spi_board_info flexibity_spi_devices[] = {
 };
 
 /* MCI (SD/MMC) */
-static struct mci_platform_data __initdata flexibity_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PC9,
-                .wp_pin         = AT91_PIN_PC4,
-        },
+static struct at91_mmc_data __initdata flexibity_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PC9,
+        .wp_pin         = AT91_PIN_PC4,
 };
 
 /* LEDs */
@@ -138,21 +133,16 @@ static struct gpio_led flexibity_leds[] = {
 static void __init flexibity_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&flexibity_usbh_data);
         /* USB Device */
         at91_add_device_udc(&flexibity_udc_data);
-        /* I2C */
-        at91_add_device_i2c(flexibity_i2c_devices,
-                ARRAY_SIZE(flexibity_i2c_devices));
         /* SPI */
         at91_add_device_spi(flexibity_spi_devices,
                 ARRAY_SIZE(flexibity_spi_devices));
         /* MMC */
-        at91_add_device_mci(0, &flexibity_mci0_data);
+        at91_add_device_mmc(0, &flexibity_mmc_data);
         /* LEDs */
         at91_gpio_leds(flexibity_leds, ARRAY_SIZE(flexibity_leds));
 }
@@ -161,7 +151,6 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect")
         /* Maintainer: Maxim Osipov */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = flexibity_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = flexibity_board_init,
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index 191d37c16ba..f27d1a780cf 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -41,10 +41,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
 #include <mach/at91sam9_smc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -62,6 +61,44 @@ static void __init foxg20_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1,
+                                ATMEL_UART_CTS
+                                | ATMEL_UART_RTS
+                                | ATMEL_UART_DTR
+                                | ATMEL_UART_DSR
+                                | ATMEL_UART_DCD
+                                | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2,
+                ATMEL_UART_CTS
+                | ATMEL_UART_RTS);
+
+        /* USART2 on ttyS3. (Rx & Tx only) */
+        at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
+
+        /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US3, 4,
+                ATMEL_UART_CTS
+                | ATMEL_UART_RTS);
+
+        /* USART4 on ttyS5. (Rx & Tx only) */
+        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
+
+        /* USART5 on ttyS6. (Rx & Tx only) */
+        at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
+
+        /* Set the internal pull-up resistor on DRXD */
+        at91_set_A_periph(AT91_PIN_PB14, 1);
+
 }
 
 /*
@@ -69,8 +106,6 @@ static void __init foxg20_init_early(void)
  */
 static struct at91_usbh_data __initdata foxg20_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -78,7 +113,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = {
  */
 static struct at91_udc_data __initdata foxg20_udc_data = {
         .vbus_pin       = AT91_PIN_PC6,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -86,7 +121,7 @@ static struct at91_udc_data __initdata foxg20_udc_data = {
  * SPI devices.
  */
 static struct spi_board_info foxg20_spi_devices[] = {
-#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if !defined(CONFIG_MMC_AT91)
         {
                 .modalias       = "mtd_dataflash",
                 .chip_select    = 1,
@@ -100,7 +135,7 @@ static struct spi_board_info foxg20_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata foxg20_macb_data = {
+static struct at91_eth_data __initdata foxg20_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 1,
 };
@@ -109,12 +144,9 @@ static struct macb_platform_data __initdata foxg20_macb_data = {
  * MCI (SD/MMC)
  * det_pin, wp_pin and vcc_pin are not connected
  */
-static struct mci_platform_data __initdata foxg20_mci0_data = {
-        .slot[1] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata foxg20_mmc_data = {
+        .slot_b         = 1,
+        .wire4          = 1,
 };
 
 
@@ -204,39 +236,6 @@ static struct i2c_board_info __initdata foxg20_i2c_devices[] = {
 static void __init foxg20_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1,
-                                ATMEL_UART_CTS
-                                | ATMEL_UART_RTS
-                                | ATMEL_UART_DTR
-                                | ATMEL_UART_DSR
-                                | ATMEL_UART_DCD
-                                | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2,
-                ATMEL_UART_CTS
-                | ATMEL_UART_RTS);
-
-        /* USART2 on ttyS3. (Rx & Tx only) */
-        at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
-
-        /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US3, 4,
-                ATMEL_UART_CTS
-                | ATMEL_UART_RTS);
-
-        /* USART4 on ttyS5. (Rx & Tx only) */
-        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
-
-        /* USART5 on ttyS6. (Rx & Tx only) */
-        at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
-
-        /* Set the internal pull-up resistor on DRXD */
-        at91_set_A_periph(AT91_PIN_PB14, 1);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&foxg20_usbh_data);
@@ -247,7 +246,7 @@ static void __init foxg20_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&foxg20_macb_data);
         /* MMC */
-        at91_add_device_mci(0, &foxg20_mci0_data);
+        at91_add_device_mmc(0, &foxg20_mmc_data);
         /* I2C */
         at91_add_device_i2c(foxg20_i2c_devices, ARRAY_SIZE(foxg20_i2c_devices));
         /* LEDs */
@@ -263,7 +262,6 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
         /* Maintainer: Sergio Tanzilli */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = foxg20_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = foxg20_board_init,
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 23a2fa17ab2..2e95949737e 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -30,18 +30,49 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#include <mach/board.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/gsia18s.h>
+#include <mach/stamp9g20.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
-#include "gsia18s.h"
-#include "stamp9g20.h"
 
 static void __init gsia18s_init_early(void)
 {
         stamp9g20_init_early();
+
+        /*
+         * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
+         * Used for Internal Analog Modem.
+         */
+        at91_register_uart(AT91SAM9260_ID_US0, 1,
+                                ATMEL_UART_CTS | ATMEL_UART_RTS |
+                                ATMEL_UART_DTR | ATMEL_UART_DSR |
+                                ATMEL_UART_DCD | ATMEL_UART_RI);
+        /*
+         * USART1 on ttyS2 (Rx, Tx, CTS, RTS).
+         * Used for GPS or WiFi or Data stream.
+         */
+        at91_register_uart(AT91SAM9260_ID_US1, 2,
+                                ATMEL_UART_CTS | ATMEL_UART_RTS);
+        /*
+         * USART2 on ttyS3 (Rx, Tx, CTS, RTS).
+         * Used for External Modem.
+         */
+        at91_register_uart(AT91SAM9260_ID_US2, 3,
+                                ATMEL_UART_CTS | ATMEL_UART_RTS);
+        /*
+         * USART3 on ttyS4 (Rx, Tx, RTS).
+         * Used for RS-485.
+         */
+        at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
+
+        /*
+         * USART4 on ttyS5 (Rx, Tx).
+         * Used for TRX433 Radio Module.
+         */
+        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
 }
 
 /*
@@ -49,8 +80,6 @@ static void __init gsia18s_init_early(void)
  */
 static struct at91_usbh_data __initdata usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -58,13 +87,13 @@ static struct at91_usbh_data __initdata usbh_data = {
  */
 static struct at91_udc_data __initdata udc_data = {
         .vbus_pin       = AT91_PIN_PA22,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata macb_data = {
+static struct at91_eth_data __initdata macb_data = {
         .phy_irq_pin    = AT91_PIN_PA28,
         .is_rmii        = 1,
 };
@@ -501,7 +530,6 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
 static struct at91_cf_data __initdata gsia18s_cf1_data = {
         .irq_pin        = AT91_PIN_PA27,
         .det_pin        = AT91_PIN_PB30,
-        .vcc_pin        = -EINVAL,
         .rst_pin        = AT91_PIN_PB31,
         .chipselect     = 5,
         .flags          = AT91_CF_TRUE_IDE,
@@ -527,37 +555,6 @@ static int __init gsia18s_power_off_init(void)
 
 static void __init gsia18s_board_init(void)
 {
-        /*
-         * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).
-         * Used for Internal Analog Modem.
-         */
-        at91_register_uart(AT91SAM9260_ID_US0, 1,
-                                ATMEL_UART_CTS | ATMEL_UART_RTS |
-                                ATMEL_UART_DTR | ATMEL_UART_DSR |
-                                ATMEL_UART_DCD | ATMEL_UART_RI);
-        /*
-         * USART1 on ttyS2 (Rx, Tx, CTS, RTS).
-         * Used for GPS or WiFi or Data stream.
-         */
-        at91_register_uart(AT91SAM9260_ID_US1, 2,
-                                ATMEL_UART_CTS | ATMEL_UART_RTS);
-        /*
-         * USART2 on ttyS3 (Rx, Tx, CTS, RTS).
-         * Used for External Modem.
-         */
-        at91_register_uart(AT91SAM9260_ID_US2, 3,
-                                ATMEL_UART_CTS | ATMEL_UART_RTS);
-        /*
-         * USART3 on ttyS4 (Rx, Tx, RTS).
-         * Used for RS-485.
-         */
-        at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);
-
-        /*
-         * USART4 on ttyS5 (Rx, Tx).
-         * Used for TRX433 Radio Module.
-         */
-        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
         stamp9g20_board_init();
         at91_add_device_usbh(&usbh_data);
         at91_add_device_udc(&udc_data);
@@ -576,7 +573,6 @@ static void __init gsia18s_board_init(void)
 MACHINE_START(GSIA18S, "GS_IA18_S")
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = gsia18s_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = gsia18s_board_init,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 9a43d1e1a03..4a170890b3b 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -19,7 +19,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -34,10 +33,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -48,17 +47,27 @@ static void __init kafa_init_early(void)
 
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Set up the LEDs */
+        at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata kafa_eth_data = {
+static struct at91_eth_data __initdata kafa_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata kafa_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata kafa_udc_data = {
@@ -66,26 +75,9 @@ static struct at91_udc_data __initdata kafa_udc_data = {
         .pullup_pin     = AT91_PIN_PB7,
 };
 
-/*
- * LEDs
- */
-static struct gpio_led kafa_leds[] = {
-        {       /* D1 */
-                .name                   = "led1",
-                .gpio                   = AT91_PIN_PB4,
-                .active_low             = 1,
-                .default_trigger        = "heartbeat",
-        },
-};
-
 static void __init kafa_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&kafa_eth_data);
@@ -97,15 +89,12 @@ static void __init kafa_board_init(void)
         at91_add_device_i2c(NULL, 0);
         /* SPI */
         at91_add_device_spi(NULL, 0);
-        /* LEDs */
-        at91_gpio_leds(kafa_leds, ARRAY_SIZE(kafa_leds));
 }
 
 MACHINE_START(KAFA, "Sperry-Sun KAFA")
         /* Maintainer: Sergei Sharonov */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = kafa_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = kafa_board_init,
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index f168bec2369..9dc8d496ead 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -35,12 +34,11 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/cpu.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -51,17 +49,33 @@ static void __init kb9202_init_early(void)
 
         /* Initialize processor: 10 MHz crystal */
         at91_initialize(10000000);
+
+        /* Set up the LEDs */
+        at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1 (Rx & Tx only) */
+        at91_register_uart(AT91RM9200_ID_US0, 1, 0);
+
+        /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
+        at91_register_uart(AT91RM9200_ID_US1, 2, 0);
+
+        /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
+        at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata kb9202_eth_data = {
+static struct at91_eth_data __initdata kb9202_eth_data = {
         .phy_irq_pin    = AT91_PIN_PB29,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata kb9202_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata kb9202_udc_data = {
@@ -69,12 +83,10 @@ static struct at91_udc_data __initdata kb9202_udc_data = {
         .pullup_pin     = AT91_PIN_PB22,
 };
 
-static struct mci_platform_data __initdata kb9202_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PB2,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata kb9202_mmc_data = {
+        .det_pin        = AT91_PIN_PB2,
+        .slot_b         = 0,
+        .wire4          = 1,
 };
 
 static struct mtd_partition __initdata kb9202_nand_partition[] = {
@@ -85,49 +97,24 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(kb9202_nand_partition);
+        return kb9202_nand_partition;
+}
+
 static struct atmel_nand_data __initdata kb9202_nand_data = {
         .ale            = 22,
         .cle            = 21,
-        .det_pin        = -EINVAL,
+        // .det_pin     = ... not there
         .rdy_pin        = AT91_PIN_PC29,
         .enable_pin     = AT91_PIN_PC28,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .parts          = kb9202_nand_partition,
-        .num_parts      = ARRAY_SIZE(kb9202_nand_partition),
-};
-
-/*
- * LEDs
- */
-static struct gpio_led kb9202_leds[] = {
-        {       /* D1 */
-                .name                   = "led1",
-                .gpio                   = AT91_PIN_PC19,
-                .active_low             = 1,
-                .default_trigger        = "heartbeat",
-        },
-        {       /* D2 */
-                .name                   = "led2",
-                .gpio                   = AT91_PIN_PC18,
-                .active_low             = 1,
-                .default_trigger        = "timer",
-        }
+        .partition_info = nand_partitions,
 };
 
 static void __init kb9202_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1 (Rx & Tx only) */
-        at91_register_uart(AT91RM9200_ID_US0, 1, 0);
-
-        /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
-        at91_register_uart(AT91RM9200_ID_US1, 2, 0);
-
-        /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
-        at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&kb9202_eth_data);
@@ -136,22 +123,19 @@ static void __init kb9202_board_init(void)
         /* USB Device */
         at91_add_device_udc(&kb9202_udc_data);
         /* MMC */
-        at91_add_device_mci(0, &kb9202_mci0_data);
+        at91_add_device_mmc(0, &kb9202_mmc_data);
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* SPI */
         at91_add_device_spi(NULL, 0);
         /* NAND */
         at91_add_device_nand(&kb9202_nand_data);
-        /* LEDs */
-        at91_gpio_leds(kb9202_leds, ARRAY_SIZE(kb9202_leds));
 }
 
 MACHINE_START(KB9200, "KB920x")
         /* Maintainer: KwikByte, Inc. */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = kb9202_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = kb9202_board_init,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index bc7a1c4a1f6..9bc6ab32e0a 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -21,7 +21,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -44,10 +43,10 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -56,6 +55,15 @@ static void __init neocore926_init_early(void)
 {
         /* Initialize processor: 20 MHz crystal */
         at91_initialize(20000000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -64,7 +72,6 @@ static void __init neocore926_init_early(void)
 static struct at91_usbh_data __initdata neocore926_usbh_data = {
         .ports          = 2,
         .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -72,7 +79,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = {
  */
 static struct at91_udc_data __initdata neocore926_udc_data = {
         .vbus_pin       = AT91_PIN_PA25,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -129,7 +136,7 @@ static struct spi_board_info neocore926_spi_devices[] = {
                 .max_speed_hz   = 125000 * 16,
                 .bus_num        = 0,
                 .platform_data  = &ads_info,
-                .irq            = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
+                .irq            = AT91SAM9263_ID_IRQ1,
         },
 #endif
 };
@@ -138,19 +145,17 @@ static struct spi_board_info neocore926_spi_devices[] = {
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata neocore926_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PE18,
-                .wp_pin         = AT91_PIN_PE19,
-        },
+static struct at91_mmc_data __initdata neocore926_mmc_data = {
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PE18,
+        .wp_pin         = AT91_PIN_PE19,
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata neocore926_macb_data = {
+static struct at91_eth_data __initdata neocore926_macb_data = {
         .phy_irq_pin    = AT91_PIN_PE31,
         .is_rmii        = 1,
 };
@@ -177,16 +182,19 @@ static struct mtd_partition __initdata neocore926_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(neocore926_nand_partition);
+        return neocore926_nand_partition;
+}
+
 static struct atmel_nand_data __initdata neocore926_nand_data = {
         .ale                    = 21,
         .cle                    = 22,
         .rdy_pin                = AT91_PIN_PB19,
         .rdy_pin_active_low     = 1,
         .enable_pin             = AT91_PIN_PD15,
-        .ecc_mode               = NAND_ECC_SOFT,
-        .parts                  = neocore926_nand_partition,
-        .num_parts              = ARRAY_SIZE(neocore926_nand_partition),
-        .det_pin                = -EINVAL,
+        .partition_info         = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
@@ -210,7 +218,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
 static void __init neocore926_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &neocore926_nand_smc_config);
+        sam9_smc_configure(3, &neocore926_nand_smc_config);
 
         at91_add_device_nand(&neocore926_nand_data);
 }
@@ -334,11 +342,6 @@ static struct ac97c_platform_data neocore926_ac97_data = {
 static void __init neocore926_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
 
         /* USB Host */
@@ -355,7 +358,7 @@ static void __init neocore926_board_init(void)
         neocore926_add_device_ts();
 
         /* MMC */
-        at91_add_device_mci(0, &neocore926_mci0_data);
+        at91_add_device_mmc(1, &neocore926_mmc_data);
 
         /* Ethernet */
         at91_add_device_eth(&neocore926_macb_data);
@@ -380,7 +383,6 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
         /* Maintainer: ADENEO */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = neocore926_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = neocore926_board_init,
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index 0299554495d..49e3f699b48 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -29,18 +29,28 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#include <mach/board.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/stamp9g20.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
-#include "stamp9g20.h"
 
 
 static void __init pcontrol_g20_init_early(void)
 {
         stamp9g20_init_early();
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback  A2 */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
+                                                | ATMEL_UART_RTS);
+
+        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485  X5 */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
+                                                | ATMEL_UART_RTS);
+
+        /* USART2 on ttyS3. (Rx, Tx)  9bit-Bus  Multidrop-mode  X4 */
+        at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
 }
 
 static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
@@ -86,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
 static void __init add_device_pcontrol(void)
 {
         /* configure chip-select 4 (IO compatible to 8051  X4 ) */
-        sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
+        sam9_smc_configure(4, &pcontrol_smc_config[0]);
         /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A  D4 ) */
-        sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
+        sam9_smc_configure(7, &pcontrol_smc_config[1]);
 }
 
 
@@ -97,8 +107,6 @@ static void __init add_device_pcontrol(void)
  */
 static struct at91_usbh_data __initdata usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -114,7 +122,7 @@ static struct at91_udc_data __initdata pcontrol_g20_udc_data = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata macb_data = {
+static struct at91_eth_data __initdata macb_data = {
         .phy_irq_pin    = AT91_PIN_PA28,
         .is_rmii        = 1,
 };
@@ -189,16 +197,6 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = {
 
 static void __init pcontrol_g20_board_init(void)
 {
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback  A2 */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
-                                                | ATMEL_UART_RTS);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485  X5 */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
-                                                | ATMEL_UART_RTS);
-
-        /* USART2 on ttyS3. (Rx, Tx)  9bit-Bus  Multidrop-mode  X4 */
-        at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
         stamp9g20_board_init();
         at91_add_device_usbh(&usbh_data);
         at91_add_device_eth(&macb_data);
@@ -219,7 +217,6 @@ MACHINE_START(PCONTROL_G20, "PControl G20")
         /* Maintainer: pgsellmann@portner-elektronik.at */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = pcontrol_g20_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = pcontrol_g20_board_init,
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 4938f1cd5e1..b7b8390e8a0 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -37,11 +36,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -49,25 +47,33 @@ static void __init picotux200_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                          | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                          | ATMEL_UART_RI);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata picotux200_eth_data = {
+static struct at91_eth_data __initdata picotux200_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata picotux200_usbh_data = {
         .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
-static struct mci_platform_data __initdata picotux200_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PB27,
-                .wp_pin         = AT91_PIN_PA17,
-        },
+static struct at91_mmc_data __initdata picotux200_mmc_data = {
+        .det_pin        = AT91_PIN_PB27,
+        .slot_b         = 0,
+        .wire4          = 1,
+        .wp_pin         = AT91_PIN_PA17,
 };
 
 #define PICOTUX200_FLASH_BASE   AT91_CHIPSELECT_0
@@ -96,13 +102,6 @@ static struct platform_device picotux200_flash = {
 static void __init picotux200_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                          | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                          | ATMEL_UART_RI);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&picotux200_eth_data);
@@ -112,7 +111,7 @@ static void __init picotux200_board_init(void)
         at91_add_device_i2c(NULL, 0);
         /* MMC */
         at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
-        at91_add_device_mci(0, &picotux200_mci0_data);
+        at91_add_device_mmc(0, &picotux200_mmc_data);
         /* NOR Flash */
         platform_device_register(&picotux200_flash);
 }
@@ -121,7 +120,6 @@ MACHINE_START(PICOTUX2XX, "picotux 200")
         /* Maintainer: Kleinhenz Elektronik GmbH */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = picotux200_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = picotux200_board_init,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 33b1628467e..81f91103368 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -21,7 +21,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -40,11 +39,11 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -53,6 +52,24 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 12.000 MHz crystal */
         at91_initialize(12000000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS1 (ie, USART0) */
+        at91_set_serial_console(1);
+
 }
 
 /*
@@ -60,8 +77,6 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -69,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 /*
@@ -89,7 +104,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata ek_macb_data = {
+static struct at91_eth_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA31,
         .is_rmii        = 1,
 };
@@ -115,16 +130,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        .det_pin        = -EINVAL,
+//      .det_pin        = ... not connected
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -148,7 +166,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -156,12 +174,12 @@ static void __init ek_add_device_nand(void)
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata ek_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
+//      .det_pin        = ... not connected
+//      .wp_pin         = ... not connected
+//      .vcc_pin        = ... not connected
 };
 
 /*
@@ -218,19 +236,6 @@ static struct gpio_led ek_leds[] = {
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
-
-        /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&ek_usbh_data);
@@ -245,13 +250,13 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
-        at91_add_device_mci(0, &ek_mci0_data);
+        at91_add_device_mmc(0, &ek_mmc_data);
         /* Push Buttons */
         ek_add_device_buttons();
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         /* shutdown controller, wakeup button (5 msec low) */
-        at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
+        at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
                                 | AT91_SHDW_RTTWKEN);
 }
 
@@ -259,7 +264,6 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
         /* Maintainer: calao-systems */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-rm9200-dt.c b/arch/arm/mach-at91/board-rm9200-dt.c
deleted file mode 100644
index 5f9ce3da3fd..00000000000
--- a/arch/arm/mach-at91/board-rm9200-dt.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- *  Setup code for AT91RM9200 Evaluation Kits with Device Tree support
- *
- *  Copyright (C) 2011 Atmel,
- *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
- *                2012 Joachim Eastwood <manabian@gmail.com>
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
-
-#include <asm/setup.h>
-#include <asm/irq.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include "at91_aic.h"
-#include "generic.h"
-
-
-static const struct of_device_id irq_of_match[] __initconst = {
-        { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
-        { /*sentinel*/ }
-};
-
-static void __init at91rm9200_dt_init_irq(void)
-{
-        of_irq_init(irq_of_match);
-}
-
-static void __init at91rm9200_dt_device_init(void)
-{
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char *at91rm9200_dt_board_compat[] __initdata = {
-        "atmel,at91rm9200",
-        NULL
-};
-
-DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
-        .timer          = &at91rm9200_timer,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = at91rm9200_dt_initialize,
-        .init_irq       = at91rm9200_dt_init_irq,
-        .init_machine   = at91rm9200_dt_device_init,
-        .dt_compat      = at91rm9200_dt_board_compat,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 9e5061bef0d..6f08faadb47 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -22,7 +22,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -39,11 +38,10 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -51,17 +49,29 @@ static void __init dk_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata dk_eth_data = {
+static struct at91_eth_data __initdata dk_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata dk_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata dk_udc_data = {
@@ -70,19 +80,16 @@ static struct at91_udc_data __initdata dk_udc_data = {
 };
 
 static struct at91_cf_data __initdata dk_cf_data = {
-        .irq_pin        = -EINVAL,
         .det_pin        = AT91_PIN_PB0,
-        .vcc_pin        = -EINVAL,
         .rst_pin        = AT91_PIN_PC5,
+        // .irq_pin     = ... not connected
+        // .vcc_pin     = ... always powered
 };
 
 #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
-static struct mci_platform_data __initdata dk_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata dk_mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
 };
 #endif
 
@@ -131,16 +138,19 @@ static struct mtd_partition __initdata dk_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(dk_nand_partition);
+        return dk_nand_partition;
+}
+
 static struct atmel_nand_data __initdata dk_nand_data = {
         .ale            = 22,
         .cle            = 21,
         .det_pin        = AT91_PIN_PB1,
         .rdy_pin        = AT91_PIN_PC2,
-        .enable_pin     = -EINVAL,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = dk_nand_partition,
-        .num_parts      = ARRAY_SIZE(dk_nand_partition),
+        // .enable_pin  = ... not there
+        .partition_info = nand_partitions,
 };
 
 #define DK_FLASH_BASE   AT91_CHIPSELECT_0
@@ -178,13 +188,6 @@ static struct gpio_led dk_leds[] = {
 static void __init dk_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&dk_eth_data);
@@ -205,7 +208,7 @@ static void __init dk_board_init(void)
 #else
         /* MMC */
         at91_set_gpio_output(AT91_PIN_PB7, 1);  /* this MMC card slot can optionally use SPI signaling (CS3). */
-        at91_add_device_mci(0, &dk_mci0_data);
+        at91_add_device_mmc(0, &dk_mmc_data);
 #endif
         /* NAND */
         at91_add_device_nand(&dk_nand_data);
@@ -221,7 +224,6 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
         /* Maintainer: SAN People/Atmel */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = dk_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = dk_board_init,
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 58277dbc718..85bcccd7b9e 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -22,7 +22,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -39,11 +38,10 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -51,17 +49,29 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
-static struct macb_platform_data __initdata ek_eth_data = {
+static struct at91_eth_data __initdata ek_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata ek_udc_data = {
@@ -70,12 +80,11 @@ static struct at91_udc_data __initdata ek_udc_data = {
 };
 
 #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
-static struct mci_platform_data __initdata ek_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PB27,
-                .wp_pin         = AT91_PIN_PA17,
-        }
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .det_pin        = AT91_PIN_PB27,
+        .slot_b         = 0,
+        .wire4          = 1,
+        .wp_pin         = AT91_PIN_PA17,
 };
 #endif
 
@@ -104,7 +113,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
 };
 
 #define EK_FLASH_BASE   AT91_CHIPSELECT_0
-#define EK_FLASH_SIZE   SZ_8M
+#define EK_FLASH_SIZE   SZ_2M
 
 static struct physmap_flash_data ek_flash_data = {
         .width          = 2,
@@ -149,13 +158,6 @@ static struct gpio_led ek_leds[] = {
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&ek_eth_data);
@@ -174,7 +176,7 @@ static void __init ek_board_init(void)
 #else
         /* MMC */
         at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
-        at91_add_device_mci(0, &ek_mci0_data);
+        at91_add_device_mmc(0, &ek_mmc_data);
 #endif
         /* NOR Flash */
         platform_device_register(&ek_flash);
@@ -188,7 +190,6 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
         /* Maintainer: SAN People/Atmel */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
deleted file mode 100644
index 2e8b8339a20..00000000000
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * board-rsi-ews.c
- *
- *  Copyright (C)
- *  2005 SAN People,
- *  2008-2011 R-S-I Elektrotechnik GmbH & Co. KG
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/mtd/physmap.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-
-#include <linux/gpio.h>
-
-#include "at91_aic.h"
-#include "board.h"
-#include "generic.h"
-
-static void __init rsi_ews_init_early(void)
-{
-        /* Initialize processor: 18.432 MHz crystal */
-        at91_initialize(18432000);
-}
-
-/*
- * Ethernet
- */
-static struct macb_platform_data rsi_ews_eth_data __initdata = {
-        .phy_irq_pin    = AT91_PIN_PC4,
-        .is_rmii        = 1,
-};
-
-/*
- * USB Host
- */
-static struct at91_usbh_data rsi_ews_usbh_data __initdata = {
-        .ports          = 1,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-/*
- * SD/MC
- */
-static struct mci_platform_data __initdata rsi_ews_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PB27,
-                .wp_pin         = AT91_PIN_PB29,
-        },
-};
-
-/*
- * I2C
- */
-static struct i2c_board_info rsi_ews_i2c_devices[] __initdata = {
-        {
-                I2C_BOARD_INFO("ds1337", 0x68),
-        },
-        {
-                I2C_BOARD_INFO("24c01", 0x50),
-        }
-};
-
-/*
- * LEDs
- */
-static struct gpio_led rsi_ews_leds[] = {
-        {
-                .name                   = "led0",
-                .gpio                   = AT91_PIN_PB6,
-                .active_low             = 0,
-        },
-        {
-                .name                   = "led1",
-                .gpio                   = AT91_PIN_PB7,
-                .active_low             = 0,
-        },
-        {
-                .name                   = "led2",
-                .gpio                   = AT91_PIN_PB8,
-                .active_low             = 0,
-        },
-        {
-                .name                   = "led3",
-                .gpio                   = AT91_PIN_PB9,
-                .active_low             = 0,
-        },
-};
-
-/*
- * DataFlash
- */
-static struct spi_board_info rsi_ews_spi_devices[] = {
-        {       /* DataFlash chip 1*/
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 0,
-                .max_speed_hz   = 5 * 1000 * 1000,
-        },
-        {       /* DataFlash chip 2*/
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 1,
-                .max_speed_hz   = 5 * 1000 * 1000,
-        },
-};
-
-/*
- * NOR flash
- */
-static struct mtd_partition rsiews_nor_partitions[] = {
-        {
-                .name           = "boot",
-                .offset         = 0,
-                .size           = 3 * SZ_128K,
-                .mask_flags     = MTD_WRITEABLE
-        },
-        {
-                .name           = "kernel",
-                .offset         = MTDPART_OFS_NXTBLK,
-                .size           = SZ_2M - (3 * SZ_128K)
-        },
-        {
-                .name           = "root",
-                .offset         = MTDPART_OFS_NXTBLK,
-                .size           = SZ_8M
-        },
-        {
-                .name           = "kernelupd",
-                .offset         = MTDPART_OFS_NXTBLK,
-                .size           = 3 * SZ_512K,
-                .mask_flags     = MTD_WRITEABLE
-        },
-        {
-                .name           = "rootupd",
-                .offset         = MTDPART_OFS_NXTBLK,
-                .size           = 9 * SZ_512K,
-                .mask_flags     = MTD_WRITEABLE
-        },
-};
-
-static struct physmap_flash_data rsiews_nor_data = {
-        .width          = 2,
-        .parts          = rsiews_nor_partitions,
-        .nr_parts       = ARRAY_SIZE(rsiews_nor_partitions),
-};
-
-#define NOR_BASE        AT91_CHIPSELECT_0
-#define NOR_SIZE        SZ_16M
-
-static struct resource nor_flash_resources[] = {
-        {
-                .start  = NOR_BASE,
-                .end    = NOR_BASE + NOR_SIZE - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device rsiews_nor_flash = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                                .platform_data  = &rsiews_nor_data,
-        },
-        .resource       = nor_flash_resources,
-        .num_resources  = ARRAY_SIZE(nor_flash_resources),
-};
-
-/*
- * Init Func
- */
-static void __init rsi_ews_board_init(void)
-{
-        /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        /* This one is for debugging */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        /* Dialin/-out modem interface */
-        at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
-
-        /* USART3 on ttyS4. (Rx, Tx, RTS) */
-        /* RS485 communication */
-        at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);
-        at91_add_device_serial();
-        at91_set_gpio_output(AT91_PIN_PA21, 0);
-        /* Ethernet */
-        at91_add_device_eth(&rsi_ews_eth_data);
-        /* USB Host */
-        at91_add_device_usbh(&rsi_ews_usbh_data);
-        /* I2C */
-        at91_add_device_i2c(rsi_ews_i2c_devices,
-                        ARRAY_SIZE(rsi_ews_i2c_devices));
-        /* SPI */
-        at91_add_device_spi(rsi_ews_spi_devices,
-                        ARRAY_SIZE(rsi_ews_spi_devices));
-        /* MMC */
-        at91_add_device_mci(0, &rsi_ews_mci0_data);
-        /* NOR Flash */
-        platform_device_register(&rsiews_nor_flash);
-        /* LEDs */
-        at91_gpio_leds(rsi_ews_leds, ARRAY_SIZE(rsi_ews_leds));
-}
-
-MACHINE_START(RSI_EWS, "RSI EWS")
-        /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */
-        .timer          = &at91rm9200_timer,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = rsi_ews_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = rsi_ews_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index b75fbf6003a..4d3a02f1289 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -21,7 +21,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -37,10 +36,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -49,6 +48,23 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -56,8 +72,6 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -65,7 +79,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -73,7 +87,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
  * SPI devices.
  */
 static struct spi_board_info ek_spi_devices[] = {
-#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if !defined(CONFIG_MMC_AT91)
         {       /* DataFlash chip */
                 .modalias       = "mtd_dataflash",
                 .chip_select    = 1,
@@ -95,7 +109,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata ek_macb_data = {
+static struct at91_eth_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 0,
 };
@@ -117,15 +131,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        .det_pin        = -EINVAL,
+//      .det_pin        = ... not connected
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -149,7 +167,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -158,45 +176,17 @@ static void __init ek_add_device_nand(void)
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata ek_mci0_data = {
-        .slot[1] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PC8,
-                .wp_pin         = AT91_PIN_PC4,
-        },
-};
-
-/*
- * LEDs
- */
-static struct gpio_led ek_leds[] = {
-        {       /* D1 */
-                .name                   = "led1",
-                .gpio                   = AT91_PIN_PA9,
-                .active_low             = 1,
-                .default_trigger        = "heartbeat",
-        },
-        {       /* D2 */
-                .name                   = "led2",
-                .gpio                   = AT91_PIN_PA6,
-                .active_low             = 1,
-                .default_trigger        = "timer",
-        }
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .slot_b         = 1,
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PC8,
+        .wp_pin         = AT91_PIN_PC4,
+//      .vcc_pin        = ... not connected
 };
 
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&ek_usbh_data);
@@ -209,18 +199,15 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
-        at91_add_device_mci(0, &ek_mci0_data);
+        at91_add_device_mmc(0, &ek_mmc_data);
         /* I2C */
         at91_add_device_i2c(NULL, 0);
-        /* LEDs */
-        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
 }
 
 MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
         /* Maintainer: Olimex */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index f0135cd1d85..8a50c3e6718 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -41,12 +40,12 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
 
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -55,6 +54,20 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -62,8 +75,6 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -71,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -108,7 +119,7 @@ static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
  * SPI devices.
  */
 static struct spi_board_info ek_spi_devices[] = {
-#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if !defined(CONFIG_MMC_AT91)
         {       /* DataFlash chip */
                 .modalias       = "mtd_dataflash",
                 .chip_select    = 1,
@@ -140,7 +151,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata ek_macb_data = {
+static struct at91_eth_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 1,
 };
@@ -162,16 +173,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        .det_pin        = -EINVAL,
+//      .det_pin        = ... not connected
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -202,7 +216,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -211,12 +225,12 @@ static void __init ek_add_device_nand(void)
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata ek_mci0_data = {
-        .slot[1] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .slot_b         = 1,
+        .wire4          = 1,
+//      .det_pin        = ... not connected
+//      .wp_pin         = ... not connected
+//      .vcc_pin        = ... not connected
 };
 
 
@@ -307,16 +321,6 @@ static void __init ek_add_device_buttons(void) {}
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&ek_usbh_data);
@@ -329,7 +333,7 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
-        at91_add_device_mci(0, &ek_mci0_data);
+        at91_add_device_mmc(0, &ek_mmc_data);
         /* I2C */
         at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
         /* SSC (to AT73C213) */
@@ -345,7 +349,6 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 13ebaa8e410..5096a0ec50c 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -45,12 +44,12 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
 
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -59,6 +58,15 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Setup the LEDs */
+        at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -77,6 +85,8 @@ static struct resource dm9000_resource[] = {
                 .flags  = IORESOURCE_MEM
         },
         [2] = {
+                .start  = AT91_PIN_PC11,
+                .end    = AT91_PIN_PC11,
                 .flags  = IORESOURCE_IRQ
                         | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
         }
@@ -120,10 +130,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
 
 static void __init ek_add_device_dm9000(void)
 {
-        struct resource *r = &dm9000_resource[2];
-
         /* Configure chip-select 2 (DM9000) */
-        sam9_smc_configure(0, 2, &dm9000_smc_config);
+        sam9_smc_configure(2, &dm9000_smc_config);
 
         /* Configure Reset signal as output */
         at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -131,7 +139,6 @@ static void __init ek_add_device_dm9000(void)
         /* Configure Interrupt pin as input, no pull-up */
         at91_set_gpio_input(AT91_PIN_PC11, 0);
 
-        r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
         platform_device_register(&dm9000_device);
 }
 #else
@@ -144,8 +151,6 @@ static void __init ek_add_device_dm9000(void) {}
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -154,7 +159,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PB29,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -174,16 +179,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 22,
         .cle            = 21,
-        .det_pin        = -EINVAL,
+//      .det_pin        = ... not connected
         .rdy_pin        = AT91_PIN_PC15,
         .enable_pin     = AT91_PIN_PC14,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -214,7 +222,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -309,7 +317,7 @@ static struct spi_board_info ek_spi_devices[] = {
                 .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
                 .bus_num        = 0,
                 .platform_data  = &ads_info,
-                .irq            = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0,
+                .irq            = AT91SAM9261_ID_IRQ0,
                 .controller_data = (void *) AT91_PIN_PA28,      /* CS pin */
         },
 #endif
@@ -340,12 +348,8 @@ static struct spi_board_info ek_spi_devices[] = {
  * MCI (SD/MMC)
  * det_pin, wp_pin and vcc_pin are not connected
  */
-static struct mci_platform_data __initdata mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = -EINVAL,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .wire4          = 1,
 };
 
 #endif /* CONFIG_SPI_ATMEL_* */
@@ -571,8 +575,6 @@ static struct gpio_led ek_leds[] = {
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&ek_usbh_data);
@@ -596,7 +598,7 @@ static void __init ek_board_init(void)
         at91_add_device_ssc(AT91SAM9261_ID_SSC1, ATMEL_SSC_TX);
 #else
         /* MMC */
-        at91_add_device_mci(0, &mci0_data);
+        at91_add_device_mmc(0, &ek_mmc_data);
 #endif
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
@@ -614,7 +616,6 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 89b9608742a..ea8f185d3b9 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -20,7 +20,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -44,12 +43,12 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
 
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -58,6 +57,15 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 16.367 MHz crystal */
         at91_initialize(16367660);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -66,8 +74,6 @@ static void __init ek_init_early(void)
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
         .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
-        .vbus_pin_active_low = {1, 1},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -75,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PA25,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -132,7 +138,7 @@ static struct spi_board_info ek_spi_devices[] = {
                 .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
                 .bus_num        = 0,
                 .platform_data  = &ads_info,
-                .irq            = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
+                .irq            = AT91SAM9263_ID_IRQ1,
         },
 #endif
 };
@@ -141,19 +147,18 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata mci1_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PE18,
-                .wp_pin         = AT91_PIN_PE19,
-        },
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PE18,
+        .wp_pin         = AT91_PIN_PE19,
+//      .vcc_pin        = ... not connected
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata ek_macb_data = {
+static struct at91_eth_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PE31,
         .is_rmii        = 1,
 };
@@ -175,16 +180,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        .det_pin        = -EINVAL,
+//      .det_pin        = ... not connected
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -215,7 +223,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -350,7 +358,6 @@ static void __init ek_add_device_buttons(void) {}
  * reset_pin is not connected: NRST
  */
 static struct ac97c_platform_data ek_ac97_data = {
-        .reset_pin      = -EINVAL,
 };
 
 
@@ -405,11 +412,6 @@ static struct at91_can_data ek_can_data = {
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&ek_usbh_data);
@@ -421,7 +423,7 @@ static void __init ek_board_init(void)
         /* Touchscreen */
         ek_add_device_ts();
         /* MMC */
-        at91_add_device_mci(1, &mci1_data);
+        at91_add_device_mmc(1, &ek_mmc_data);
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* NAND */
@@ -445,7 +447,6 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 1b7dd9f688d..817f59d7251 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -18,7 +18,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -32,8 +31,6 @@
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/consumer.h>
 
-#include <linux/platform_data/at91_adc.h>
-
 #include <mach/hardware.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -43,11 +40,11 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
 #include <mach/system_rev.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -68,6 +65,20 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -75,8 +86,6 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -84,7 +93,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
@@ -92,7 +101,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
  * SPI devices.
  */
 static struct spi_board_info ek_spi_devices[] = {
-#if !IS_ENABLED(CONFIG_MMC_ATMELMCI)
+#if !(defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_AT91))
         {       /* DataFlash chip */
                 .modalias       = "mtd_dataflash",
                 .chip_select    = 1,
@@ -114,7 +123,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata ek_macb_data = {
+static struct at91_eth_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 1,
 };
@@ -148,17 +157,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 /* det_pin is not connected */
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
-        .det_pin        = -EINVAL,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -189,7 +200,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -199,23 +210,33 @@ static void __init ek_add_device_nand(void)
  * MCI (SD/MMC)
  * wp_pin and vcc_pin are not connected
  */
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
 static struct mci_platform_data __initdata ek_mmc_data = {
         .slot[1] = {
                 .bus_width      = 4,
                 .detect_pin     = AT91_PIN_PC9,
-                .wp_pin         = -EINVAL,
         },
 
 };
+#else
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .slot_b         = 1,    /* Only one slot so use slot B */
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PC9,
+};
+#endif
 
 static void __init ek_add_device_mmc(void)
 {
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
         if (ek_have_2mmc()) {
                 ek_mmc_data.slot[0].bus_width = 4;
                 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
-                ek_mmc_data.slot[0].wp_pin = -1;
         }
         at91_add_device_mci(0, &ek_mmc_data);
+#else
+        at91_add_device_mmc(0, &ek_mmc_data);
+#endif
 }
 
 /*
@@ -293,16 +314,6 @@ static void __init ek_add_device_buttons(void)
 static void __init ek_add_device_buttons(void) {}
 #endif
 
-/*
- * ADCs
- */
-
-static struct at91_adc_data ek_adc_data = {
-        .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3),
-        .use_external_triggers = true,
-        .vref = 3300,
-};
-
 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
 static struct regulator_consumer_supply ek_audio_consumer_supplies[] = {
         REGULATOR_SUPPLY("AVDD", "0-001b"),
@@ -353,30 +364,10 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
         },
 };
 
-static struct platform_device sam9g20ek_audio_device = {
-        .name   = "at91sam9g20ek-audio",
-        .id     = -1,
-};
-
-static void __init ek_add_device_audio(void)
-{
-        platform_device_register(&sam9g20ek_audio_device);
-}
-
 
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                           | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB Host */
         at91_add_device_usbh(&ek_usbh_data);
@@ -398,20 +389,16 @@ static void __init ek_board_init(void)
         ek_add_device_gpio_leds();
         /* Push Buttons */
         ek_add_device_buttons();
-        /* ADCs */
-        at91_add_device_adc(&ek_adc_data);
         /* PCK0 provides MCLK to the WM8731 */
         at91_set_B_periph(AT91_PIN_PC1, 0);
         /* SSC (for WM8731) */
         at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
-        ek_add_device_audio();
 }
 
 MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
@@ -421,7 +408,6 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index e4cc375e3a3..ad234ccbf57 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -14,7 +14,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -24,15 +23,11 @@
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/leds.h>
+#include <linux/clk.h>
 #include <linux/atmel-mci.h>
-#include <linux/delay.h>
-
-#include <linux/platform_data/at91_adc.h>
 
 #include <mach/hardware.h>
 #include <video/atmel_lcdc.h>
-#include <media/soc_camera.h>
-#include <media/atmel-isi.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -42,12 +37,12 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 #include <mach/system_rev.h>
 
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -56,6 +51,16 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 12.000 MHz crystal */
         at91_initialize(12000000);
+
+        /* DGBU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 not connected on the -EK board */
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -64,8 +69,6 @@ static void __init ek_init_early(void)
 static struct at91_usbh_data __initdata ek_usbh_hs_data = {
         .ports          = 2,
         .vbus_pin       = {AT91_PIN_PD1, AT91_PIN_PD3},
-        .vbus_pin_active_low = {1, 1},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -97,7 +100,6 @@ static struct mci_platform_data __initdata mci0_data = {
         .slot[0] = {
                 .bus_width      = 4,
                 .detect_pin     = AT91_PIN_PD10,
-                .wp_pin         = -EINVAL,
         },
 };
 
@@ -113,7 +115,7 @@ static struct mci_platform_data __initdata mci1_data = {
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata ek_macb_data = {
+static struct at91_eth_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PD5,
         .is_rmii        = 1,
 };
@@ -135,17 +137,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 /* det_pin is not connected */
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
         .rdy_pin        = AT91_PIN_PC8,
         .enable_pin     = AT91_PIN_PC14,
-        .det_pin        = -EINVAL,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -176,78 +180,13 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
 
 
 /*
- *  ISI
- */
-static struct isi_platform_data __initdata isi_data = {
-        .frate                  = ISI_CFG1_FRATE_CAPTURE_ALL,
-        /* to use codec and preview path simultaneously */
-        .full_mode              = 1,
-        .data_width_flags       = ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10,
-        /* ISI_MCK is provided by programmable clock or external clock */
-        .mck_hz                 = 25000000,
-};
-
-
-/*
- * soc-camera OV2640
- */
-#if defined(CONFIG_SOC_CAMERA_OV2640) || \
-        defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
-static unsigned long isi_camera_query_bus_param(struct soc_camera_link *link)
-{
-        /* ISI board for ek using default 8-bits connection */
-        return SOCAM_DATAWIDTH_8;
-}
-
-static int i2c_camera_power(struct device *dev, int on)
-{
-        /* enable or disable the camera */
-        pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
-        at91_set_gpio_output(AT91_PIN_PD13, !on);
-
-        if (!on)
-                goto out;
-
-        /* If enabled, give a reset impulse */
-        at91_set_gpio_output(AT91_PIN_PD12, 0);
-        msleep(20);
-        at91_set_gpio_output(AT91_PIN_PD12, 1);
-        msleep(100);
-
-out:
-        return 0;
-}
-
-static struct i2c_board_info i2c_camera = {
-        I2C_BOARD_INFO("ov2640", 0x30),
-};
-
-static struct soc_camera_link iclink_ov2640 = {
-        .bus_id                 = 0,
-        .board_info             = &i2c_camera,
-        .i2c_adapter_id         = 0,
-        .power                  = i2c_camera_power,
-        .query_bus_param        = isi_camera_query_bus_param,
-};
-
-static struct platform_device isi_ov2640 = {
-        .name   = "soc-camera-pdrv",
-        .id     = 0,
-        .dev    = {
-                .platform_data = &iclink_ov2640,
-        },
-};
-#endif
-
-
-/*
  * LCD Controller
  */
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
@@ -308,14 +247,6 @@ static struct at91_tsadcc_data ek_tsadcc_data = {
         .ts_sample_hold_time    = 0x0a,
 };
 
-/*
- * ADCs
- */
-static struct at91_adc_data ek_adc_data = {
-        .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),
-        .use_external_triggers = true,
-        .vref = 3300,
-};
 
 /*
  * GPIO Buttons
@@ -404,7 +335,6 @@ static void __init ek_add_device_buttons(void) {}
  * reset_pin is not connected: NRST
  */
 static struct ac97c_platform_data ek_ac97_data = {
-        .reset_pin      = -EINVAL,
 };
 
 
@@ -448,22 +378,11 @@ static struct gpio_led ek_pwm_led[] = {
 #endif
 };
 
-static struct platform_device *devices[] __initdata = {
-#if defined(CONFIG_SOC_CAMERA_OV2640) || \
-        defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
-        &isi_ov2640,
-#endif
-};
+
 
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DGBU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 not connected on the -EK board */
-        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
-        at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB HS Host */
         at91_add_device_usbh_ohci(&ek_usbh_hs_data);
@@ -481,14 +400,10 @@ static void __init ek_board_init(void)
         ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(0, NULL, 0);
-        /* ISI, using programmable clock as ISI_MCK */
-        at91_add_device_isi(&isi_data, true);
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
         /* Touch Screen */
         at91_add_device_tsadcc(&ek_tsadcc_data);
-        /* ADC */
-        at91_add_device_adc(&ek_adc_data);
         /* Push Buttons */
         ek_add_device_buttons();
         /* AC97 */
@@ -496,15 +411,12 @@ static void __init ek_board_init(void)
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
-        /* Other platform devices */
-        platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
 MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 377a1097afa..4f14b54b93a 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -8,7 +8,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -30,12 +29,11 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
-
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -44,6 +42,15 @@ static void __init ek_init_early(void)
 {
         /* Initialize processor: 12.000 MHz crystal */
         at91_initialize(12000000);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -57,12 +64,11 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
 /*
  * MCI (SD/MMC)
  */
-static struct mci_platform_data __initdata mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PA15,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata ek_mmc_data = {
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PA15,
+//      .wp_pin         = ... not connected
+//      .vcc_pin        = ... not connected
 };
 
 
@@ -82,16 +88,19 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
         },
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        .det_pin        = -EINVAL,
+//      .det_pin        = ... not connected
         .rdy_pin        = AT91_PIN_PD17,
         .enable_pin     = AT91_PIN_PB6,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 static struct sam9_smc_config __initdata ek_nand_smc_config = {
@@ -115,7 +124,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
+        sam9_smc_configure(3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -200,7 +209,6 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
  * reset_pin is not connected: NRST
  */
 static struct ac97c_platform_data ek_ac97_data = {
-        .reset_pin      = -EINVAL,
 };
 
 
@@ -290,11 +298,6 @@ static void __init ek_add_device_buttons(void) {}
 static void __init ek_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
         at91_add_device_serial();
         /* USB HS */
         at91_add_device_usba(&ek_usba_udc_data);
@@ -305,7 +308,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* MMC */
-        at91_add_device_mci(0, &mci0_data);
+        at91_add_device_mmc(0, &ek_mmc_data);
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
         /* AC97 */
@@ -322,7 +325,6 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = ek_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = ek_board_init,
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 98771500ddb..c73d25e5fae 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -32,10 +32,9 @@
 #include <asm/mach/arch.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
 #include <mach/at91sam9_smc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -44,23 +43,29 @@
 static void __init snapper9260_init_early(void)
 {
         at91_initialize(18432000);
+
+        /* Debug on ttyS0 */
+        at91_register_uart(0, 0, 0);
+        at91_set_serial_console(0);
+
+        at91_register_uart(AT91SAM9260_ID_US0, 1,
+                           ATMEL_UART_CTS | ATMEL_UART_RTS);
+        at91_register_uart(AT91SAM9260_ID_US1, 2,
+                           ATMEL_UART_CTS | ATMEL_UART_RTS);
+        at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
 }
 
 static struct at91_usbh_data __initdata snapper9260_usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata snapper9260_udc_data = {
         .vbus_pin               = SNAPPER9260_IO_EXP_GPIO(5),
         .vbus_active_low        = 1,
         .vbus_polled            = 1,
-        .pullup_pin             = -EINVAL,
 };
 
-static struct macb_platform_data snapper9260_macb_data = {
-        .phy_irq_pin    = -EINVAL,
+static struct at91_eth_data snapper9260_macb_data = {
         .is_rmii        = 1,
 };
 
@@ -92,16 +97,19 @@ static struct mtd_partition __initdata snapper9260_nand_partitions[] = {
         },
 };
 
+static struct mtd_partition * __init
+snapper9260_nand_partition_info(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(snapper9260_nand_partitions);
+        return snapper9260_nand_partitions;
+}
+
 static struct atmel_nand_data __initdata snapper9260_nand_data = {
         .ale            = 21,
         .cle            = 22,
         .rdy_pin        = AT91_PIN_PC13,
-        .parts          = snapper9260_nand_partitions,
-        .num_parts      = ARRAY_SIZE(snapper9260_nand_partitions),
+        .partition_info = snapper9260_nand_partition_info,
         .bus_width_16   = 0,
-        .enable_pin     = -EINVAL,
-        .det_pin        = -EINVAL,
-        .ecc_mode       = NAND_ECC_SOFT,
 };
 
 static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
@@ -137,17 +145,17 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
                 /* Audio codec */
                 I2C_BOARD_INFO("tlv320aic23", 0x1a),
         },
-};
-
-static struct i2c_board_info __initdata snapper9260_i2c_isl1208 = {
+        {
                 /* RTC */
                 I2C_BOARD_INFO("isl1208", 0x6f),
+                .irq = gpio_to_irq(AT91_PIN_PA31),
+        },
 };
 
 static void __init snapper9260_add_device_nand(void)
 {
         at91_set_A_periph(AT91_PIN_PC14, 0);
-        sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
+        sam9_smc_configure(3, &snapper9260_nand_smc_config);
         at91_add_device_nand(&snapper9260_nand_data);
 }
 
@@ -155,18 +163,6 @@ static void __init snapper9260_board_init(void)
 {
         at91_add_device_i2c(snapper9260_i2c_devices,
                             ARRAY_SIZE(snapper9260_i2c_devices));
-
-        snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);
-        i2c_register_board_info(0, &snapper9260_i2c_isl1208, 1);
-
-        /* Debug on ttyS0 */
-        at91_register_uart(0, 0, 0);
-
-        at91_register_uart(AT91SAM9260_ID_US0, 1,
-                           ATMEL_UART_CTS | ATMEL_UART_RTS);
-        at91_register_uart(AT91SAM9260_ID_US1, 2,
-                           ATMEL_UART_CTS | ATMEL_UART_RTS);
-        at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
         at91_add_device_serial();
         at91_add_device_usbh(&snapper9260_usbh_data);
         at91_add_device_udc(&snapper9260_udc_data);
@@ -179,7 +175,6 @@ static void __init snapper9260_board_init(void)
 MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = snapper9260_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = snapper9260_board_init,
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 48a962b61fa..936e5fd7f40 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -25,10 +25,9 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#include <mach/board.h>
 #include <mach/at91sam9_smc.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
 
@@ -37,6 +36,44 @@ void __init stamp9g20_init_early(void)
 {
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* DGBU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
+}
+
+static void __init stamp9g20evb_init_early(void)
+{
+        stamp9g20_init_early();
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                                                | ATMEL_UART_DTR | ATMEL_UART_DSR
+                                                | ATMEL_UART_DCD | ATMEL_UART_RI);
+}
+
+static void __init portuxg20_init_early(void)
+{
+        stamp9g20_init_early();
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                                                | ATMEL_UART_DTR | ATMEL_UART_DSR
+                                                | ATMEL_UART_DCD | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
+        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* USART4 on ttyS5. (Rx, Tx only) */
+        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
+
+        /* USART5 on ttyS6. (Rx, Tx only) */
+        at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
 }
 
 /*
@@ -48,8 +85,6 @@ static struct atmel_nand_data __initdata nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
-        .det_pin        = -EINVAL,
-        .ecc_mode       = NAND_ECC_SOFT,
 };
 
 static struct sam9_smc_config __initdata nand_smc_config = {
@@ -73,7 +108,7 @@ static struct sam9_smc_config __initdata nand_smc_config = {
 static void __init add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &nand_smc_config);
+        sam9_smc_configure(3, &nand_smc_config);
 
         at91_add_device_nand(&nand_data);
 }
@@ -83,13 +118,18 @@ static void __init add_device_nand(void)
  * MCI (SD/MMC)
  * det_pin, wp_pin and vcc_pin are not connected
  */
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
 static struct mci_platform_data __initdata mmc_data = {
         .slot[0] = {
                 .bus_width      = 4,
-                .detect_pin     = -1,
-                .wp_pin         = -1,
         },
 };
+#else
+static struct at91_mmc_data __initdata mmc_data = {
+        .slot_b         = 0,
+        .wire4          = 1,
+};
+#endif
 
 
 /*
@@ -97,8 +137,6 @@ static struct mci_platform_data __initdata mmc_data = {
  */
 static struct at91_usbh_data __initdata usbh_data = {
         .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -107,19 +145,19 @@ static struct at91_usbh_data __initdata usbh_data = {
  */
 static struct at91_udc_data __initdata portuxg20_udc_data = {
         .vbus_pin       = AT91_PIN_PC7,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
         .vbus_pin       = AT91_PIN_PA22,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct macb_platform_data __initdata macb_data = {
+static struct at91_eth_data __initdata macb_data = {
         .phy_irq_pin    = AT91_PIN_PA28,
         .is_rmii        = 1,
 };
@@ -207,35 +245,21 @@ void add_w1(void)
 void __init stamp9g20_board_init(void)
 {
         /* Serial */
-        /* DGBU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
         at91_add_device_serial();
         /* NAND */
         add_device_nand();
         /* MMC */
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
         at91_add_device_mci(0, &mmc_data);
+#else
+        at91_add_device_mmc(0, &mmc_data);
+#endif
         /* W1 */
         add_w1();
 }
 
 static void __init portuxg20_board_init(void)
 {
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                                                | ATMEL_UART_DTR | ATMEL_UART_DSR
-                                                | ATMEL_UART_DCD | ATMEL_UART_RI);
-
-        /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
-
-        /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
-        at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
-
-        /* USART4 on ttyS5. (Rx, Tx only) */
-        at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
-
-        /* USART5 on ttyS6. (Rx, Tx only) */
-        at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
         stamp9g20_board_init();
         /* USB Host */
         at91_add_device_usbh(&usbh_data);
@@ -253,10 +277,6 @@ static void __init portuxg20_board_init(void)
 
 static void __init stamp9g20evb_board_init(void)
 {
-        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                                                | ATMEL_UART_DTR | ATMEL_UART_DSR
-                                                | ATMEL_UART_DCD | ATMEL_UART_RI);
         stamp9g20_board_init();
         /* USB Host */
         at91_add_device_usbh(&usbh_data);
@@ -274,8 +294,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")
         /* Maintainer: taskit GmbH */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = stamp9g20_init_early,
+        .init_early     = portuxg20_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = portuxg20_board_init,
 MACHINE_END
@@ -284,8 +303,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")
         /* Maintainer: taskit GmbH */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = stamp9g20_init_early,
+        .init_early     = stamp9g20evb_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = stamp9g20evb_board_init,
 MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
deleted file mode 100644
index c1060f96e58..00000000000
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ /dev/null
@@ -1,384 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-usb-a926x.c
- *
- *  Copyright (C) 2005 SAN People
- *  Copyright (C) 2007 Atmel Corporation.
- *  Copyright (C) 2007 Calao-systems
- *  Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/gpio_keys.h>
-#include <linux/gpio.h>
-#include <linux/input.h>
-#include <linux/spi/mmc_spi.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/at91sam9_smc.h>
-
-#include "at91_aic.h"
-#include "at91_shdwc.h"
-#include "board.h"
-#include "sam9_smc.h"
-#include "generic.h"
-
-
-static void __init ek_init_early(void)
-{
-        /* Initialize processor: 12.00 MHz crystal */
-        at91_initialize(12000000);
-}
-
-/*
- * USB Host port
- */
-static struct at91_usbh_data __initdata ek_usbh_data = {
-        .ports          = 2,
-        .vbus_pin       = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-/*
- * USB Device port
- */
-static struct at91_udc_data __initdata ek_udc_data = {
-        .vbus_pin       = AT91_PIN_PB11,
-        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
-};
-
-static void __init ek_add_device_udc(void)
-{
-        if (machine_is_usb_a9260() || machine_is_usb_a9g20())
-                ek_udc_data.vbus_pin = AT91_PIN_PC5;
-
-        at91_add_device_udc(&ek_udc_data);
-}
-
-#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
-#define MMC_SPI_CARD_DETECT_INT AT91_PIN_PC4
-static int at91_mmc_spi_init(struct device *dev,
-        irqreturn_t (*detect_int)(int, void *), void *data)
-{
-        /* Configure Interrupt pin as input, no pull-up */
-        at91_set_gpio_input(MMC_SPI_CARD_DETECT_INT, 0);
-        return request_irq(gpio_to_irq(MMC_SPI_CARD_DETECT_INT), detect_int,
-                IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                "mmc-spi-detect", data);
-}
-
-static void at91_mmc_spi_exit(struct device *dev, void *data)
-{
-        free_irq(gpio_to_irq(MMC_SPI_CARD_DETECT_INT), data);
-}
-
-static struct mmc_spi_platform_data at91_mmc_spi_pdata = {
-        .init = at91_mmc_spi_init,
-        .exit = at91_mmc_spi_exit,
-        .detect_delay = 100, /* msecs */
-};
-#endif
-
-/*
- * SPI devices.
- */
-static struct spi_board_info usb_a9263_spi_devices[] = {
-        {       /* DataFlash chip */
-                .modalias       = "mtd_dataflash",
-                .chip_select    = 0,
-                .max_speed_hz   = 15 * 1000 * 1000,
-                .bus_num        = 0,
-        }
-};
-
-static struct spi_board_info usb_a9g20_spi_devices[] = {
-#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
-        {
-                .modalias = "mmc_spi",
-                .max_speed_hz = 20000000,       /* max spi clock (SCK) speed in HZ */
-                .bus_num = 1,
-                .chip_select = 0,
-                .platform_data = &at91_mmc_spi_pdata,
-                .mode = SPI_MODE_3,
-        },
-#endif
-};
-
-static void __init ek_add_device_spi(void)
-{
-        if (machine_is_usb_a9263())
-                at91_add_device_spi(usb_a9263_spi_devices, ARRAY_SIZE(usb_a9263_spi_devices));
-        else if (machine_is_usb_a9g20())
-                at91_add_device_spi(usb_a9g20_spi_devices, ARRAY_SIZE(usb_a9g20_spi_devices));
-}
-
-/*
- * MACB Ethernet device
- */
-static struct macb_platform_data __initdata ek_macb_data = {
-        .phy_irq_pin    = AT91_PIN_PE31,
-        .is_rmii        = 1,
-};
-
-static void __init ek_add_device_eth(void)
-{
-        if (machine_is_usb_a9260() || machine_is_usb_a9g20())
-                ek_macb_data.phy_irq_pin = AT91_PIN_PA31;
-
-        at91_add_device_eth(&ek_macb_data);
-}
-
-/*
- * NAND flash
- */
-static struct mtd_partition __initdata ek_nand_partition[] = {
-        {
-                .name   = "barebox",
-                .offset = 0,
-                .size   = 3 * SZ_128K,
-        }, {
-                .name   = "bareboxenv",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = SZ_128K,
-        }, {
-                .name   = "bareboxenv2",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = SZ_128K,
-        }, {
-                .name   = "oftree",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = SZ_128K,
-        }, {
-                .name   = "kernel",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = 4 * SZ_1M,
-        }, {
-                .name   = "rootfs",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = 120 * SZ_1M,
-        }, {
-                .name   = "data",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size   = MTDPART_SIZ_FULL,
-        }
-};
-
-static struct atmel_nand_data __initdata ek_nand_data = {
-        .ale            = 21,
-        .cle            = 22,
-        .det_pin        = -EINVAL,
-        .rdy_pin        = AT91_PIN_PA22,
-        .enable_pin     = AT91_PIN_PD15,
-        .ecc_mode       = NAND_ECC_SOFT,
-        .on_flash_bbt   = 1,
-        .parts          = ek_nand_partition,
-        .num_parts      = ARRAY_SIZE(ek_nand_partition),
-};
-
-static struct sam9_smc_config __initdata usb_a9260_nand_smc_config = {
-        .ncs_read_setup         = 0,
-        .nrd_setup              = 1,
-        .ncs_write_setup        = 0,
-        .nwe_setup              = 1,
-
-        .ncs_read_pulse         = 3,
-        .nrd_pulse              = 3,
-        .ncs_write_pulse        = 3,
-        .nwe_pulse              = 3,
-
-        .read_cycle             = 5,
-        .write_cycle            = 5,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
-        .tdf_cycles             = 2,
-};
-
-static struct sam9_smc_config __initdata usb_a9g20_nand_smc_config = {
-        .ncs_read_setup         = 0,
-        .nrd_setup              = 2,
-        .ncs_write_setup        = 0,
-        .nwe_setup              = 2,
-
-        .ncs_read_pulse         = 4,
-        .nrd_pulse              = 4,
-        .ncs_write_pulse        = 4,
-        .nwe_pulse              = 4,
-
-        .read_cycle             = 7,
-        .write_cycle            = 7,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
-        .tdf_cycles             = 3,
-};
-
-static void __init ek_add_device_nand(void)
-{
-        if (machine_is_usb_a9260() || machine_is_usb_a9g20()) {
-                ek_nand_data.rdy_pin    = AT91_PIN_PC13;
-                ek_nand_data.enable_pin = AT91_PIN_PC14;
-        }
-
-        /* configure chip-select 3 (NAND) */
-        if (machine_is_usb_a9g20())
-                sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config);
-        else
-                sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config);
-
-        at91_add_device_nand(&ek_nand_data);
-}
-
-
-/*
- * GPIO Buttons
- */
-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-static struct gpio_keys_button ek_buttons[] = {
-        {       /* USER PUSH BUTTON */
-                .code           = KEY_ENTER,
-                .gpio           = AT91_PIN_PB10,
-                .active_low     = 1,
-                .desc           = "user_pb",
-                .wakeup         = 1,
-        }
-};
-
-static struct gpio_keys_platform_data ek_button_data = {
-        .buttons        = ek_buttons,
-        .nbuttons       = ARRAY_SIZE(ek_buttons),
-};
-
-static struct platform_device ek_button_device = {
-        .name           = "gpio-keys",
-        .id             = -1,
-        .num_resources  = 0,
-        .dev            = {
-                .platform_data  = &ek_button_data,
-        }
-};
-
-static void __init ek_add_device_buttons(void)
-{
-        at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
-        at91_set_deglitch(AT91_PIN_PB10, 1);
-
-        platform_device_register(&ek_button_device);
-}
-#else
-static void __init ek_add_device_buttons(void) {}
-#endif
-
-/*
- * LEDs
- */
-static struct gpio_led ek_leds[] = {
-        {       /* user_led (green) */
-                .name                   = "user_led",
-                .gpio                   = AT91_PIN_PB21,
-                .active_low             = 1,
-                .default_trigger        = "heartbeat",
-        }
-};
-
-static struct i2c_board_info __initdata ek_i2c_devices[] = {
-        {
-                I2C_BOARD_INFO("rv3029c2", 0x56),
-        },
-};
-
-static void __init ek_add_device_leds(void)
-{
-        if (machine_is_usb_a9260() || machine_is_usb_a9g20())
-                ek_leds[0].active_low = 0;
-
-        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
-}
-
-static void __init ek_board_init(void)
-{
-        /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-        at91_add_device_serial();
-        /* USB Host */
-        at91_add_device_usbh(&ek_usbh_data);
-        /* USB Device */
-        ek_add_device_udc();
-        /* SPI */
-        ek_add_device_spi();
-        /* Ethernet */
-        ek_add_device_eth();
-        /* NAND */
-        ek_add_device_nand();
-        /* Push Buttons */
-        ek_add_device_buttons();
-        /* LEDs */
-        ek_add_device_leds();
-
-        if (machine_is_usb_a9g20()) {
-                /* I2C */
-                at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
-        } else {
-                /* I2C */
-                at91_add_device_i2c(NULL, 0);
-                /* shutdown controller, wakeup button (5 msec low) */
-                at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
-                                | AT91_SHDW_WKMODE0_LOW
-                                | AT91_SHDW_RTTWKEN);
-        }
-}
-
-MACHINE_START(USB_A9263, "CALAO USB_A9263")
-        /* Maintainer: calao-systems */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = ek_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = ek_board_init,
-MACHINE_END
-
-MACHINE_START(USB_A9260, "CALAO USB_A9260")
-        /* Maintainer: calao-systems */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = ek_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = ek_board_init,
-MACHINE_END
-
-MACHINE_START(USB_A9G20, "CALAO USB_A92G0")
-        /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */
-        .timer          = &at91sam926x_timer,
-        .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
-        .init_early     = ek_init_early,
-        .init_irq       = at91_init_irq_default,
-        .init_machine   = ek_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 8673aebcb85..95edcbd2aec 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -22,7 +22,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -43,12 +42,11 @@
 #include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
 #include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
-#include "board.h"
 #include "generic.h"
 
 
@@ -59,6 +57,26 @@ static void __init yl9200_init_early(void)
 
         /* Initialize processor: 18.432 MHz crystal */
         at91_initialize(18432000);
+
+        /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
+        at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
+
+        /* DBGU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                        | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                        | ATMEL_UART_RI);
+
+        /* USART0 on ttyS2. (Rx & Tx only to JP3) */
+        at91_register_uart(AT91RM9200_ID_US0, 2, 0);
+
+        /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
+        at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
 }
 
 /*
@@ -92,7 +110,7 @@ static struct gpio_led yl9200_leds[] = {
 /*
  * Ethernet
  */
-static struct macb_platform_data __initdata yl9200_eth_data = {
+static struct at91_eth_data __initdata yl9200_eth_data = {
         .phy_irq_pin            = AT91_PIN_PB28,
         .is_rmii                = 1,
 };
@@ -102,8 +120,6 @@ static struct macb_platform_data __initdata yl9200_eth_data = {
  */
 static struct at91_usbh_data __initdata yl9200_usbh_data = {
         .ports                  = 1,    /* PQFP version of AT91RM9200 */
-        .vbus_pin               = {-EINVAL, -EINVAL},
-        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -119,12 +135,10 @@ static struct at91_udc_data __initdata yl9200_udc_data = {
 /*
  * MMC
  */
-static struct mci_platform_data __initdata yl9200_mci0_data = {
-        .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = AT91_PIN_PB9,
-                .wp_pin         = -EINVAL,
-        },
+static struct at91_mmc_data __initdata yl9200_mmc_data = {
+        .det_pin        = AT91_PIN_PB9,
+        // .wp_pin      = ... not connected
+        .wire4          = 1,
 };
 
 /*
@@ -158,15 +172,19 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = {
         }
 };
 
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(yl9200_nand_partition);
+        return yl9200_nand_partition;
+}
+
 static struct atmel_nand_data __initdata yl9200_nand_data = {
         .ale            = 6,
         .cle            = 7,
-        .det_pin        = -EINVAL,
+        // .det_pin     = ... not connected
         .rdy_pin        = AT91_PIN_PC14,        /* R/!B (Sheet10) */
         .enable_pin     = AT91_PIN_PC15,        /* !CE  (Sheet10) */
-        .ecc_mode       = NAND_ECC_SOFT,
-        .parts          = yl9200_nand_partition,
-        .num_parts      = ARRAY_SIZE(yl9200_nand_partition),
+        .partition_info = nand_partitions,
 };
 
 /*
@@ -371,13 +389,13 @@ static struct spi_board_info yl9200_spi_devices[] = {
 #include <video/s1d13xxxfb.h>
 
 
-static void yl9200_init_video(void)
+static void __init yl9200_init_video(void)
 {
         /* NWAIT Signal */
         at91_set_A_periph(AT91_PIN_PC6, 0);
 
         /* Initialization of the Static Memory Controller for Chip Select 2 */
-        at91_ramc_write(0, AT91_SMC_CSR(2), AT91_SMC_DBW_16             /* 16 bit */
+        at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16         /* 16 bit */
                         | AT91_SMC_WSEN | AT91_SMC_NWS_(0x4)    /* wait states */
                         | AT91_SMC_TDF_(0x100)                  /* float time */
         );
@@ -543,19 +561,6 @@ void __init yl9200_add_device_video(void) {}
 static void __init yl9200_board_init(void)
 {
         /* Serial */
-        /* DBGU on ttyS0. (Rx & Tx only) */
-        at91_register_uart(0, 0, 0);
-
-        /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
-        at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
-                        | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
-                        | ATMEL_UART_RI);
-
-        /* USART0 on ttyS2. (Rx & Tx only to JP3) */
-        at91_register_uart(AT91RM9200_ID_US0, 2, 0);
-
-        /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */
-        at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);
         at91_add_device_serial();
         /* Ethernet */
         at91_add_device_eth(&yl9200_eth_data);
@@ -566,7 +571,7 @@ static void __init yl9200_board_init(void)
         /* I2C */
         at91_add_device_i2c(yl9200_i2c_devices, ARRAY_SIZE(yl9200_i2c_devices));
         /* MMC */
-        at91_add_device_mci(0, &yl9200_mci0_data);
+        at91_add_device_mmc(0, &yl9200_mmc_data);
         /* NAND */
         at91_add_device_nand(&yl9200_nand_data);
         /* NOR Flash */
@@ -589,7 +594,6 @@ MACHINE_START(YL9200, "uCdragon YL-9200")
         /* Maintainer: S.Birtles */
         .timer          = &at91rm9200_timer,
         .map_io         = at91_map_io,
-        .handle_irq     = at91_aic_handle_irq,
         .init_early     = yl9200_init_early,
         .init_irq       = at91_init_irq_default,
         .init_machine   = yl9200_board_init,
diff --git a/arch/arm/mach-at91/board.h b/arch/arm/mach-at91/board.h
deleted file mode 100644
index 4a234fb2ab3..00000000000
--- a/arch/arm/mach-at91/board.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/board.h
- *
- *  Copyright (C) 2005 HP Labs
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-/*
- * These are data structures found in platform_device.dev.platform_data,
- * and describing board-specific data needed by drivers.  For example,
- * which pin is used for a given GPIO role.
- *
- * In 2.6, drivers should strongly avoid board-specific knowledge so
- * that supporting new boards normally won't require driver patches.
- * Most board-specific knowledge should be in arch/.../board-*.c files.
- */
-
-#ifndef __ASM_ARCH_BOARD_H
-#define __ASM_ARCH_BOARD_H
-
-#include <linux/platform_data/atmel.h>
-
- /* USB Device */
-extern void __init at91_add_device_udc(struct at91_udc_data *data);
-
- /* USB High Speed Device */
-extern void __init at91_add_device_usba(struct usba_platform_data *data);
-
- /* Compact Flash */
-extern void __init at91_add_device_cf(struct at91_cf_data *data);
-
- /* MMC / SD */
-  /* atmel-mci platform config */
-extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data);
-
-extern void __init at91_add_device_eth(struct macb_platform_data *data);
-
- /* USB Host */
-extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
-extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
-extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
-
-extern void __init at91_add_device_nand(struct atmel_nand_data *data);
-
- /* I2C*/
-#if defined(CONFIG_ARCH_AT91SAM9G45)
-extern void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices);
-#else
-extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices);
-#endif
-
- /* SPI */
-extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
-
- /* Serial */
-#define ATMEL_UART_CTS  0x01
-#define ATMEL_UART_RTS  0x02
-#define ATMEL_UART_DSR  0x04
-#define ATMEL_UART_DTR  0x08
-#define ATMEL_UART_DCD  0x10
-#define ATMEL_UART_RI   0x20
-
-extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);
-
-extern struct platform_device *atmel_default_console_device;
-
-extern void __init at91_add_device_serial(void);
-
-/*
- * PWM
- */
-#define AT91_PWM0       0
-#define AT91_PWM1       1
-#define AT91_PWM2       2
-#define AT91_PWM3       3
-
-extern void __init at91_add_device_pwm(u32 mask);
-
-/*
- * SSC -- accessed through ssc_request(id).  Drivers don't bind to SSC
- * platform devices.  Their SSC ID is part of their configuration data,
- * along with information about which SSC signals they should use.
- */
-#define ATMEL_SSC_TK    0x01
-#define ATMEL_SSC_TF    0x02
-#define ATMEL_SSC_TD    0x04
-#define ATMEL_SSC_TX    (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
-
-#define ATMEL_SSC_RK    0x10
-#define ATMEL_SSC_RF    0x20
-#define ATMEL_SSC_RD    0x40
-#define ATMEL_SSC_RX    (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
-
-extern void __init at91_add_device_ssc(unsigned id, unsigned pins);
-
- /* LCD Controller */
-struct atmel_lcdfb_info;
-extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
-
- /* AC97 */
-extern void __init at91_add_device_ac97(struct ac97c_platform_data *data);
-
- /* ISI */
-struct isi_platform_data;
-extern void __init at91_add_device_isi(struct isi_platform_data *data,
-                bool use_pck_as_mck);
-
- /* Touchscreen Controller */
-extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data);
-
-/* CAN */
-extern void __init at91_add_device_can(struct at91_can_data *data);
-
- /* LEDs */
-extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
-extern void __init at91_pwm_leds(struct gpio_led *leds, int nr);
-
-#endif
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 33361505c0c..61873f3aa92 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -23,19 +23,14 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/of_address.h>
 
 #include <mach/hardware.h>
 #include <mach/at91_pmc.h>
 #include <mach/cpu.h>
 
-#include <asm/proc-fns.h>
-
 #include "clock.h"
 #include "generic.h"
 
-void __iomem *at91_pmc_base;
-EXPORT_SYMBOL_GPL(at91_pmc_base);
 
 /*
  * There's a lot more which can be done with clocks, including cpufreq
@@ -52,49 +47,26 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
 /*
  * Chips have some kind of clocks : group them by functionality
  */
-#define cpu_has_utmi()          (  cpu_is_at91sam9rl() \
-                                || cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5())
+#define cpu_has_utmi()          (  cpu_is_at91cap9() \
+                                || cpu_is_at91sam9rl() \
+                                || cpu_is_at91sam9g45())
 
 #define cpu_has_800M_plla()     (  cpu_is_at91sam9g20() \
-                                || cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5() \
-                                || cpu_is_at91sam9n12())
+                                || cpu_is_at91sam9g45())
 
 #define cpu_has_300M_plla()     (cpu_is_at91sam9g10())
 
-#define cpu_has_240M_plla()     (cpu_is_at91sam9261() \
-                                || cpu_is_at91sam9263() \
-                                || cpu_is_at91sam9rl())
-
-#define cpu_has_210M_plla()     (cpu_is_at91sam9260())
-
 #define cpu_has_pllb()          (!(cpu_is_at91sam9rl() \
-                                || cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5() \
-                                || cpu_is_at91sam9n12()))
+                                || cpu_is_at91sam9g45()))
 
-#define cpu_has_upll()          (cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5())
+#define cpu_has_upll()          (cpu_is_at91sam9g45())
 
 /* USB host HS & FS */
 #define cpu_has_uhp()           (!cpu_is_at91sam9rl())
 
 /* USB device FS only */
 #define cpu_has_udpfs()         (!(cpu_is_at91sam9rl() \
-                                || cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5()))
-
-#define cpu_has_plladiv2()      (cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5() \
-                                || cpu_is_at91sam9n12())
-
-#define cpu_has_mdiv3()         (cpu_is_at91sam9g45() \
-                                || cpu_is_at91sam9x5() \
-                                || cpu_is_at91sam9n12())
-
-#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5() \
-                                || cpu_is_at91sam9n12())
+                                || cpu_is_at91sam9g45()))
 
 static LIST_HEAD(clocks);
 static DEFINE_SPINLOCK(clk_lock);
@@ -139,11 +111,11 @@ static void pllb_mode(struct clk *clk, int is_on)
                 value = 0;
 
         // REVISIT: Add work-around for AT91RM9200 Errata #26 ?
-        at91_pmc_write(AT91_CKGR_PLLBR, value);
+        at91_sys_write(AT91_CKGR_PLLBR, value);
 
         do {
                 cpu_relax();
-        } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
+        } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
 }
 
 static struct clk pllb = {
@@ -158,24 +130,31 @@ static struct clk pllb = {
 static void pmc_sys_mode(struct clk *clk, int is_on)
 {
         if (is_on)
-                at91_pmc_write(AT91_PMC_SCER, clk->pmc_mask);
+                at91_sys_write(AT91_PMC_SCER, clk->pmc_mask);
         else
-                at91_pmc_write(AT91_PMC_SCDR, clk->pmc_mask);
+                at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
 }
 
 static void pmc_uckr_mode(struct clk *clk, int is_on)
 {
-        unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
+        unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
+
+        if (cpu_is_at91sam9g45()) {
+                if (is_on)
+                        uckr |= AT91_PMC_BIASEN;
+                else
+                        uckr &= ~AT91_PMC_BIASEN;
+        }
 
         if (is_on) {
                 is_on = AT91_PMC_LOCKU;
-                at91_pmc_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
+                at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
         } else
-                at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
+                at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
 
         do {
                 cpu_relax();
-        } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
+        } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
 }
 
 /* USB function clocks (PLLB must be 48 MHz) */
@@ -211,9 +190,9 @@ struct clk mck = {
 static void pmc_periph_mode(struct clk *clk, int is_on)
 {
         if (is_on)
-                at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask);
+                at91_sys_write(AT91_PMC_PCER, clk->pmc_mask);
         else
-                at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask);
+                at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
 }
 
 static struct clk __init *at91_css_to_clk(unsigned long css)
@@ -231,24 +210,11 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
                                 return &utmi_clk;
                         else if (cpu_has_pllb())
                                 return &pllb;
-                        break;
-                /* alternate PMC: can use master clock */
-                case AT91_PMC_CSS_MASTER:
-                        return &mck;
         }
 
         return NULL;
 }
 
-static int pmc_prescaler_divider(u32 reg)
-{
-        if (cpu_has_alt_prescaler()) {
-                return 1 << ((reg & AT91_PMC_ALT_PRES) >> PMC_ALT_PRES_OFFSET);
-        } else {
-                return 1 << ((reg & AT91_PMC_PRES) >> PMC_PRES_OFFSET);
-        }
-}
-
 static void __clk_enable(struct clk *clk)
 {
         if (clk->parent)
@@ -350,22 +316,12 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 {
         unsigned long   flags;
         unsigned        prescale;
-        unsigned long   prescale_offset, css_mask;
         unsigned long   actual;
 
         if (!clk_is_programmable(clk))
                 return -EINVAL;
         if (clk->users)
                 return -EBUSY;
-
-        if (cpu_has_alt_prescaler()) {
-                prescale_offset = PMC_ALT_PRES_OFFSET;
-                css_mask = AT91_PMC_ALT_PCKR_CSS;
-        } else {
-                prescale_offset = PMC_PRES_OFFSET;
-                css_mask = AT91_PMC_CSS;
-        }
-
         spin_lock_irqsave(&clk_lock, flags);
 
         actual = clk->parent->rate_hz;
@@ -373,10 +329,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
                 if (actual && actual <= rate) {
                         u32     pckr;
 
-                        pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
-                        pckr &= css_mask;       /* keep clock selection */
-                        pckr |= prescale << prescale_offset;
-                        at91_pmc_write(AT91_PMC_PCKR(clk->id), pckr);
+                        pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
+                        pckr &= AT91_PMC_CSS;   /* clock selection */
+                        pckr |= prescale << 2;
+                        at91_sys_write(AT91_PMC_PCKR(clk->id), pckr);
                         clk->rate_hz = actual;
                         break;
                 }
@@ -410,7 +366,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
         clk->rate_hz = parent->rate_hz;
         clk->parent = parent;
-        at91_pmc_write(AT91_PMC_PCKR(clk->id), parent->id);
+        at91_sys_write(AT91_PMC_PCKR(clk->id), parent->id);
 
         spin_unlock_irqrestore(&clk_lock, flags);
         return 0;
@@ -422,17 +378,11 @@ static void __init init_programmable_clock(struct clk *clk)
 {
         struct clk      *parent;
         u32             pckr;
-        unsigned int    css_mask;
-
-        if (cpu_has_alt_prescaler())
-                css_mask = AT91_PMC_ALT_PCKR_CSS;
-        else
-                css_mask = AT91_PMC_CSS;
 
-        pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
-        parent = at91_css_to_clk(pckr & css_mask);
+        pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
+        parent = at91_css_to_clk(pckr & AT91_PMC_CSS);
         clk->parent = parent;
-        clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
+        clk->rate_hz = parent->rate_hz / (1 << ((pckr & AT91_PMC_PRES) >> 2));
 }
 
 #endif  /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
@@ -446,24 +396,19 @@ static int at91_clk_show(struct seq_file *s, void *unused)
         u32             scsr, pcsr, uckr = 0, sr;
         struct clk      *clk;
 
-        scsr = at91_pmc_read(AT91_PMC_SCSR);
-        pcsr = at91_pmc_read(AT91_PMC_PCSR);
-        sr = at91_pmc_read(AT91_PMC_SR);
-        seq_printf(s, "SCSR = %8x\n", scsr);
-        seq_printf(s, "PCSR = %8x\n", pcsr);
-        seq_printf(s, "MOR  = %8x\n", at91_pmc_read(AT91_CKGR_MOR));
-        seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR));
-        seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR));
+        seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
+        seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR));
+        seq_printf(s, "MOR  = %8x\n", at91_sys_read(AT91_CKGR_MOR));
+        seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
+        seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
         if (cpu_has_pllb())
-                seq_printf(s, "PLLB = %8x\n", at91_pmc_read(AT91_CKGR_PLLBR));
-        if (cpu_has_utmi()) {
-                uckr = at91_pmc_read(AT91_CKGR_UCKR);
-                seq_printf(s, "UCKR = %8x\n", uckr);
-        }
-        seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
+                seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
+        if (cpu_has_utmi())
+                seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
+        seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
         if (cpu_has_upll())
-                seq_printf(s, "USB  = %8x\n", at91_pmc_read(AT91_PMC_USB));
-        seq_printf(s, "SR   = %8x\n", sr);
+                seq_printf(s, "USB  = %8x\n", at91_sys_read(AT91_PMC_USB));
+        seq_printf(s, "SR   = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
 
         seq_printf(s, "\n");
 
@@ -625,7 +570,7 @@ fail:
         return 0;
 }
 
-static struct clk *const standard_pmc_clocks[] __initconst = {
+static struct clk *const standard_pmc_clocks[] __initdata = {
         /* four primary clocks */
         &clk32k,
         &main_clk,
@@ -651,14 +596,16 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
         if (cpu_is_at91rm9200()) {
                 uhpck.pmc_mask = AT91RM9200_PMC_UHP;
                 udpck.pmc_mask = AT91RM9200_PMC_UDP;
-                at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
+                at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
                    cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
                    cpu_is_at91sam9g10()) {
                 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
                 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
+        } else if (cpu_is_at91cap9()) {
+                uhpck.pmc_mask = AT91CAP9_PMC_UHP;
         }
-        at91_pmc_write(AT91_CKGR_PLLBR, 0);
+        at91_sys_write(AT91_CKGR_PLLBR, 0);
 
         udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
         uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
@@ -675,16 +622,16 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
         /* Setup divider by 10 to reach 48 MHz */
         usbr |= ((10 - 1) << 8) & AT91_PMC_OHCIUSBDIV;
 
-        at91_pmc_write(AT91_PMC_USB, usbr);
+        at91_sys_write(AT91_PMC_USB, usbr);
 
         /* Now set uhpck values */
         uhpck.parent = &utmi_clk;
         uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
         uhpck.rate_hz = utmi_clk.rate_hz;
-        uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
+        uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
 }
 
-static int __init at91_pmc_init(unsigned long main_clock)
+int __init at91_clock_init(unsigned long main_clock)
 {
         unsigned tmp, freq, mckr;
         int i;
@@ -698,26 +645,20 @@ static int __init at91_pmc_init(unsigned long main_clock)
          */
         if (!main_clock) {
                 do {
-                        tmp = at91_pmc_read(AT91_CKGR_MCFR);
+                        tmp = at91_sys_read(AT91_CKGR_MCFR);
                 } while (!(tmp & AT91_PMC_MAINRDY));
                 main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
         }
         main_clk.rate_hz = main_clock;
 
         /* report if PLLA is more than mildly overclocked */
-        plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR));
+        plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
         if (cpu_has_300M_plla()) {
                 if (plla.rate_hz > 300000000)
                         pll_overclock = true;
         } else if (cpu_has_800M_plla()) {
                 if (plla.rate_hz > 800000000)
                         pll_overclock = true;
-        } else if (cpu_has_240M_plla()) {
-                if (plla.rate_hz > 240000000)
-                        pll_overclock = true;
-        } else if (cpu_has_210M_plla()) {
-                if (plla.rate_hz > 210000000)
-                        pll_overclock = true;
         } else {
                 if (plla.rate_hz > 209000000)
                         pll_overclock = true;
@@ -725,8 +666,8 @@ static int __init at91_pmc_init(unsigned long main_clock)
         if (pll_overclock)
                 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
 
-        if (cpu_has_plladiv2()) {
-                mckr = at91_pmc_read(AT91_PMC_MCKR);
+        if (cpu_is_at91sam9g45()) {
+                mckr = at91_sys_read(AT91_PMC_MCKR);
                 plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12));      /* plla divisor by 2 */
         }
 
@@ -747,10 +688,6 @@ static int __init at91_pmc_init(unsigned long main_clock)
                  * (obtain the USB High Speed 480 MHz when input is 12 MHz)
                  */
                 utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz;
-
-                /* UTMI bias and PLL are managed at the same time */
-                if (cpu_has_upll())
-                        utmi_clk.pmc_mask |= AT91_PMC_BIASEN;
         }
 
         /*
@@ -766,10 +703,10 @@ static int __init at91_pmc_init(unsigned long main_clock)
          * MCK and CPU derive from one of those primary clocks.
          * For now, assume this parentage won't change.
          */
-        mckr = at91_pmc_read(AT91_PMC_MCKR);
+        mckr = at91_sys_read(AT91_PMC_MCKR);
         mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
         freq = mck.parent->rate_hz;
-        freq /= pmc_prescaler_divider(mckr);                                    /* prescale */
+        freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2));                           /* prescale */
         if (cpu_is_at91rm9200()) {
                 mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8));       /* mdiv */
         } else if (cpu_is_at91sam9g20()) {
@@ -777,19 +714,13 @@ static int __init at91_pmc_init(unsigned long main_clock)
                         freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq;    /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
                 if (mckr & AT91_PMC_PDIV)
                         freq /= 2;              /* processor clock division */
-        } else if (cpu_has_mdiv3()) {
+        } else if (cpu_is_at91sam9g45()) {
                 mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ?
                         freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
         } else {
                 mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8));              /* mdiv */
         }
 
-        if (cpu_has_alt_prescaler()) {
-                /* Programmable clocks can use MCK */
-                mck.type |= CLK_TYPE_PRIMARY;
-                mck.id = 4;
-        }
-
         /* Register the PMC's standard clocks */
         for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
                 at91_clk_add(standard_pmc_clocks[i]);
@@ -817,55 +748,6 @@ static int __init at91_pmc_init(unsigned long main_clock)
         return 0;
 }
 
-#if defined(CONFIG_OF)
-static struct of_device_id pmc_ids[] = {
-        { .compatible = "atmel,at91rm9200-pmc" },
-        { /*sentinel*/ }
-};
-
-static struct of_device_id osc_ids[] = {
-        { .compatible = "atmel,osc" },
-        { /*sentinel*/ }
-};
-
-int __init at91_dt_clock_init(void)
-{
-        struct device_node *np;
-        u32 main_clock = 0;
-
-        np = of_find_matching_node(NULL, pmc_ids);
-        if (!np)
-                panic("unable to find compatible pmc node in dtb\n");
-
-        at91_pmc_base = of_iomap(np, 0);
-        if (!at91_pmc_base)
-                panic("unable to map pmc cpu registers\n");
-
-        of_node_put(np);
-
-        /* retrieve the freqency of fixed clocks from device tree */
-        np = of_find_matching_node(NULL, osc_ids);
-        if (np) {
-                u32 rate;
-                if (!of_property_read_u32(np, "clock-frequency", &rate))
-                        main_clock = rate;
-        }
-
-        of_node_put(np);
-
-        return at91_pmc_init(main_clock);
-}
-#endif
-
-int __init at91_clock_init(unsigned long main_clock)
-{
-        at91_pmc_base = ioremap(AT91_PMC, 256);
-        if (!at91_pmc_base)
-                panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
-
-        return at91_pmc_init(main_clock);
-}
-
 /*
  * Several unused clocks may be active.  Turn them off.
  */
@@ -888,15 +770,9 @@ static int __init at91_clock_reset(void)
                 pr_debug("Clocks: disable unused %s\n", clk->name);
         }
 
-        at91_pmc_write(AT91_PMC_PCDR, pcdr);
-        at91_pmc_write(AT91_PMC_SCDR, scdr);
+        at91_sys_write(AT91_PMC_PCDR, pcdr);
+        at91_sys_write(AT91_PMC_SCDR, scdr);
 
         return 0;
 }
 late_initcall(at91_clock_reset);
-
-void at91sam9_idle(void)
-{
-        at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
-        cpu_do_idle();
-}
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index 0c6381516a5..1cfeac1483d 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -17,11 +17,8 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/cpuidle.h>
-#include <linux/io.h>
-#include <linux/export.h>
 #include <asm/proc-fns.h>
-#include <asm/cpuidle.h>
-#include <mach/cpu.h>
+#include <linux/io.h>
 
 #include "pm.h"
 
@@ -29,46 +26,63 @@
 
 static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
 
+static struct cpuidle_driver at91_idle_driver = {
+        .name =         "at91_idle",
+        .owner =        THIS_MODULE,
+};
+
 /* Actual code that puts the SoC in different idle states */
 static int at91_enter_idle(struct cpuidle_device *dev,
-                        struct cpuidle_driver *drv,
-                               int index)
+                               struct cpuidle_state *state)
 {
-        if (cpu_is_at91rm9200())
-                at91rm9200_standby();
-        else if (cpu_is_at91sam9g45())
-                at91sam9g45_standby();
-        else
-                at91sam9_standby();
+        struct timeval before, after;
+        int idle_time;
+        u32 saved_lpr;
 
-        return index;
+        local_irq_disable();
+        do_gettimeofday(&before);
+        if (state == &dev->states[0])
+                /* Wait for interrupt state */
+                cpu_do_idle();
+        else if (state == &dev->states[1]) {
+                asm("b 1f; .align 5; 1:");
+                asm("mcr p15, 0, r0, c7, c10, 4");      /* drain write buffer */
+                saved_lpr = sdram_selfrefresh_enable();
+                cpu_do_idle();
+                sdram_selfrefresh_disable(saved_lpr);
+        }
+        do_gettimeofday(&after);
+        local_irq_enable();
+        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+                        (after.tv_usec - before.tv_usec);
+        return idle_time;
 }
 
-static struct cpuidle_driver at91_idle_driver = {
-        .name                   = "at91_idle",
-        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
-        .states[0]              = ARM_CPUIDLE_WFI_STATE,
-        .states[1]              = {
-                .enter                  = at91_enter_idle,
-                .exit_latency           = 10,
-                .target_residency       = 100000,
-                .flags                  = CPUIDLE_FLAG_TIME_VALID,
-                .name                   = "RAM_SR",
-                .desc                   = "WFI and DDR Self Refresh",
-        },
-        .state_count = AT91_MAX_STATES,
-};
-
 /* Initialize CPU idle by registering the idle states */
 static int at91_init_cpuidle(void)
 {
         struct cpuidle_device *device;
 
+        cpuidle_register_driver(&at91_idle_driver);
+
         device = &per_cpu(at91_cpuidle_device, smp_processor_id());
         device->state_count = AT91_MAX_STATES;
 
-        cpuidle_register_driver(&at91_idle_driver);
+        /* Wait for interrupt state */
+        device->states[0].enter = at91_enter_idle;
+        device->states[0].exit_latency = 1;
+        device->states[0].target_residency = 10000;
+        device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
+        strcpy(device->states[0].name, "WFI");
+        strcpy(device->states[0].desc, "Wait for interrupt");
+
+        /* Wait for interrupt and RAM self refresh state */
+        device->states[1].enter = at91_enter_idle;
+        device->states[1].exit_latency = 10;
+        device->states[1].target_residency = 10000;
+        device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
+        strcpy(device->states[1].name, "RAM_SR");
+        strcpy(device->states[1].desc, "WFI and RAM Self Refresh");
 
         if (cpuidle_register_device(device)) {
                 printk(KERN_ERR "at91_init_cpuidle: Failed registering\n");
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index fc593d615e7..938b34f5774 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -9,7 +9,6 @@
  */
 
 #include <linux/clkdev.h>
-#include <linux/of.h>
 
  /* Map io */
 extern void __init at91_map_io(void);
@@ -20,33 +19,34 @@ extern void __init at91_init_sram(int bank, unsigned long base,
 extern void __init at91rm9200_set_type(int type);
 extern void __init at91_initialize(unsigned long main_clock);
 extern void __init at91x40_initialize(unsigned long main_clock);
-extern void __init at91rm9200_dt_initialize(void);
-extern void __init at91_dt_initialize(void);
 
  /* Interrupts */
 extern void __init at91_init_irq_default(void);
 extern void __init at91_init_interrupts(unsigned int priority[]);
 extern void __init at91x40_init_interrupts(unsigned int priority[]);
-extern void __init at91_aic_init(unsigned int priority[],
-                                 unsigned int ext_irq_mask);
-extern int  __init at91_aic_of_init(struct device_node *node,
-                                    struct device_node *parent);
-extern int  __init at91_aic5_of_init(struct device_node *node,
-                                    struct device_node *parent);
-
+extern void __init at91_aic_init(unsigned int priority[]);
 
  /* Timer */
 struct sys_timer;
-extern void at91rm9200_ioremap_st(u32 addr);
 extern struct sys_timer at91rm9200_timer;
-extern void at91sam926x_ioremap_pit(u32 addr);
 extern struct sys_timer at91sam926x_timer;
 extern struct sys_timer at91x40_timer;
 
  /* Clocks */
+/*
+ * function to specify the clock of the default console. As we do not
+ * use the device/driver bus, the dev_name is not intialize. So we need
+ * to link the clock to a specific con_id only "usart"
+ */
+extern void __init at91rm9200_set_console_clock(int id);
+extern void __init at91sam9260_set_console_clock(int id);
+extern void __init at91sam9261_set_console_clock(int id);
+extern void __init at91sam9263_set_console_clock(int id);
+extern void __init at91sam9rl_set_console_clock(int id);
+extern void __init at91sam9g45_set_console_clock(int id);
+extern void __init at91cap9_set_console_clock(int id);
 #ifdef CONFIG_AT91_PMC_UNIT
 extern int __init at91_clock_init(unsigned long main_clock);
-extern int __init at91_dt_clock_init(void);
 #else
 static int inline at91_clock_init(unsigned long main_clock) { return 0; }
 #endif
@@ -56,22 +56,8 @@ struct device;
 extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
-/* idle */
-extern void at91sam9_idle(void);
-
 /* reset */
-extern void at91_ioremap_rstc(u32 base_addr);
-extern void at91sam9_alt_restart(char, const char *);
-extern void at91sam9g45_restart(char, const char *);
-
-/* shutdown */
-extern void at91_ioremap_shdwc(u32 base_addr);
-
-/* Matrix */
-extern void at91_ioremap_matrix(u32 base_addr);
-
-/* Ram Controler */
-extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
+extern void at91sam9_alt_reset(void);
 
  /* GPIO */
 #define AT91RM9200_PQFP         3       /* AT91RM9200 PQFP package has 3 banks */
@@ -79,11 +65,11 @@ extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
 
 struct at91_gpio_bank {
         unsigned short id;              /* peripheral ID */
-        unsigned long regbase;          /* offset from system peripheral base */
+        unsigned long offset;           /* offset from system peripheral base */
+        struct clk *clock;              /* associated clock */
 };
 extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
 extern void __init at91_gpio_irq_setup(void);
-extern int  __init at91_gpio_of_irq_setup(struct device_node *node,
-                                          struct device_node *parent);
 
+extern void (*at91_arch_reset)(void);
 extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index c5d7e1e9d75..4615528205c 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -11,8 +11,6 @@
 
 #include <linux/clk.h>
 #include <linux/errno.h>
-#include <linux/device.h>
-#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/debugfs.h>
@@ -21,32 +19,24 @@
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/io.h>
-#include <linux/irqdomain.h>
-#include <linux/of_address.h>
-
-#include <asm/mach/irq.h>
 
 #include <mach/hardware.h>
 #include <mach/at91_pio.h>
+#include <mach/gpio.h>
 
-#include "generic.h"
+#include <asm/gpio.h>
 
-#define MAX_NB_GPIO_PER_BANK    32
+#include "generic.h"
 
 struct at91_gpio_chip {
         struct gpio_chip        chip;
         struct at91_gpio_chip   *next;          /* Bank sharing same clock */
-        int                     pioc_hwirq;     /* PIO bank interrupt identifier on AIC */
-        int                     pioc_virq;      /* PIO bank Linux virtual interrupt */
-        int                     pioc_idx;       /* PIO bank index */
-        void __iomem            *regbase;       /* PIO bank virtual address */
-        struct clk              *clock;         /* associated clock */
-        struct irq_domain       *domain;        /* associated irq domain */
+        struct at91_gpio_bank   *bank;          /* Bank definition */
+        void __iomem            *regbase;       /* Base of register bank */
 };
 
 #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
 
-static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset);
 static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip);
 static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val);
 static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset);
@@ -54,44 +44,35 @@ static int at91_gpiolib_direction_output(struct gpio_chip *chip,
                                          unsigned offset, int val);
 static int at91_gpiolib_direction_input(struct gpio_chip *chip,
                                         unsigned offset);
-static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset);
 
-#define AT91_GPIO_CHIP(name)                                            \
+#define AT91_GPIO_CHIP(name, base_gpio, nr_gpio)                        \
         {                                                               \
                 .chip = {                                               \
                         .label            = name,                       \
-                        .request          = at91_gpiolib_request,       \
                         .direction_input  = at91_gpiolib_direction_input, \
                         .direction_output = at91_gpiolib_direction_output, \
                         .get              = at91_gpiolib_get,           \
                         .set              = at91_gpiolib_set,           \
                         .dbg_show         = at91_gpiolib_dbg_show,      \
-                        .to_irq           = at91_gpiolib_to_irq,        \
-                        .ngpio            = MAX_NB_GPIO_PER_BANK,       \
+                        .base             = base_gpio,                  \
+                        .ngpio            = nr_gpio,                    \
                 },                                                      \
         }
 
 static struct at91_gpio_chip gpio_chip[] = {
-        AT91_GPIO_CHIP("pioA"),
-        AT91_GPIO_CHIP("pioB"),
-        AT91_GPIO_CHIP("pioC"),
-        AT91_GPIO_CHIP("pioD"),
-        AT91_GPIO_CHIP("pioE"),
+        AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32),
+        AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32),
+        AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32),
+        AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32),
+        AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32),
 };
 
 static int gpio_banks;
-static unsigned long at91_gpio_caps;
-
-/* All PIO controllers support PIO3 features */
-#define AT91_GPIO_CAP_PIO3      (1 <<  0)
-
-#define has_pio3()      (at91_gpio_caps & AT91_GPIO_CAP_PIO3)
-
-/*--------------------------------------------------------------------------*/
 
 static inline void __iomem *pin_to_controller(unsigned pin)
 {
-        pin /= MAX_NB_GPIO_PER_BANK;
+        pin -= PIN_BASE;
+        pin /= 32;
         if (likely(pin < gpio_banks))
                 return gpio_chip[pin].regbase;
 
@@ -100,29 +81,11 @@ static inline void __iomem *pin_to_controller(unsigned pin)
 
 static inline unsigned pin_to_mask(unsigned pin)
 {
-        return 1 << (pin % MAX_NB_GPIO_PER_BANK);
+        pin -= PIN_BASE;
+        return 1 << (pin % 32);
 }
 
 
-static char peripheral_function(void __iomem *pio, unsigned mask)
-{
-        char    ret = 'X';
-        u8      select;
-
-        if (pio) {
-                if (has_pio3()) {
-                        select = !!(__raw_readl(pio + PIO_ABCDSR1) & mask);
-                        select |= (!!(__raw_readl(pio + PIO_ABCDSR2) & mask) << 1);
-                        ret = 'A' + select;
-                } else {
-                        ret = __raw_readl(pio + PIO_ABSR) & mask ?
-                                                        'B' : 'A';
-                }
-        }
-
-        return ret;
-}
-
 /*--------------------------------------------------------------------------*/
 
 /* Not all hardware capabilities are exposed through these calls; they
@@ -170,14 +133,7 @@ int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup)
 
         __raw_writel(mask, pio + PIO_IDR);
         __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-        if (has_pio3()) {
-                __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask,
-                                                        pio + PIO_ABCDSR1);
-                __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
-                                                        pio + PIO_ABCDSR2);
-        } else {
-                __raw_writel(mask, pio + PIO_ASR);
-        }
+        __raw_writel(mask, pio + PIO_ASR);
         __raw_writel(mask, pio + PIO_PDR);
         return 0;
 }
@@ -197,14 +153,7 @@ int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup)
 
         __raw_writel(mask, pio + PIO_IDR);
         __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-        if (has_pio3()) {
-                __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask,
-                                                        pio + PIO_ABCDSR1);
-                __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
-                                                        pio + PIO_ABCDSR2);
-        } else {
-                __raw_writel(mask, pio + PIO_BSR);
-        }
+        __raw_writel(mask, pio + PIO_BSR);
         __raw_writel(mask, pio + PIO_PDR);
         return 0;
 }
@@ -212,50 +161,8 @@ EXPORT_SYMBOL(at91_set_B_periph);
 
 
 /*
- * mux the pin to the "C" internal peripheral role.
- */
-int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup)
-{
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
-
-        if (!pio || !has_pio3())
-                return -EINVAL;
-
-        __raw_writel(mask, pio + PIO_IDR);
-        __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-        __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
-        __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
-        __raw_writel(mask, pio + PIO_PDR);
-        return 0;
-}
-EXPORT_SYMBOL(at91_set_C_periph);
-
-
-/*
- * mux the pin to the "D" internal peripheral role.
- */
-int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup)
-{
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
-
-        if (!pio || !has_pio3())
-                return -EINVAL;
-
-        __raw_writel(mask, pio + PIO_IDR);
-        __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-        __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
-        __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
-        __raw_writel(mask, pio + PIO_PDR);
-        return 0;
-}
-EXPORT_SYMBOL(at91_set_D_periph);
-
-
-/*
- * mux the pin to the gpio controller (instead of "A", "B", "C"
- * or "D" peripheral), and configure it for an input.
+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
+ * configure it for an input.
  */
 int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup)
 {
@@ -275,8 +182,8 @@ EXPORT_SYMBOL(at91_set_gpio_input);
 
 
 /*
- * mux the pin to the gpio controller (instead of "A", "B", "C"
- * or "D" peripheral), and configure it for an output.
+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
+ * and configure it for an output.
  */
 int __init_or_module at91_set_gpio_output(unsigned pin, int value)
 {
@@ -306,37 +213,12 @@ int __init_or_module at91_set_deglitch(unsigned pin, int is_on)
 
         if (!pio)
                 return -EINVAL;
-
-        if (has_pio3() && is_on)
-                __raw_writel(mask, pio + PIO_IFSCDR);
         __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
         return 0;
 }
 EXPORT_SYMBOL(at91_set_deglitch);
 
 /*
- * enable/disable the debounce filter;
- */
-int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div)
-{
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
-
-        if (!pio || !has_pio3())
-                return -EINVAL;
-
-        if (is_on) {
-                __raw_writel(mask, pio + PIO_IFSCER);
-                __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
-                __raw_writel(mask, pio + PIO_IFER);
-        } else {
-                __raw_writel(mask, pio + PIO_IFDR);
-        }
-        return 0;
-}
-EXPORT_SYMBOL(at91_set_debounce);
-
-/*
  * enable/disable the multi-driver; This is only valid for output and
  * allows the output pin to run as an open collector output.
  */
@@ -354,41 +236,6 @@ int __init_or_module at91_set_multi_drive(unsigned pin, int is_on)
 EXPORT_SYMBOL(at91_set_multi_drive);
 
 /*
- * enable/disable the pull-down.
- * If pull-up already enabled while calling the function, we disable it.
- */
-int __init_or_module at91_set_pulldown(unsigned pin, int is_on)
-{
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
-
-        if (!pio || !has_pio3())
-                return -EINVAL;
-
-        /* Disable pull-up anyway */
-        __raw_writel(mask, pio + PIO_PUDR);
-        __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
-        return 0;
-}
-EXPORT_SYMBOL(at91_set_pulldown);
-
-/*
- * disable Schmitt trigger
- */
-int __init_or_module at91_disable_schmitt_trig(unsigned pin)
-{
-        void __iomem    *pio = pin_to_controller(pin);
-        unsigned        mask = pin_to_mask(pin);
-
-        if (!pio || !has_pio3())
-                return -EINVAL;
-
-        __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
-        return 0;
-}
-EXPORT_SYMBOL(at91_disable_schmitt_trig);
-
-/*
  * assuming the pin is muxed as a gpio output, set its value.
  */
 int at91_set_gpio_value(unsigned pin, int value)
@@ -429,9 +276,8 @@ static u32 backups[MAX_GPIO_BANKS];
 
 static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
 {
-        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
-        unsigned        mask = 1 << d->hwirq;
-        unsigned        bank = at91_gpio->pioc_idx;
+        unsigned        mask = pin_to_mask(d->irq);
+        unsigned        bank = (d->irq - PIN_BASE) / 32;
 
         if (unlikely(bank >= MAX_GPIO_BANKS))
                 return -EINVAL;
@@ -441,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
         else
                 wakeups[bank] &= ~mask;
 
-        irq_set_irq_wake(at91_gpio->pioc_virq, state);
+        irq_set_irq_wake(gpio_chip[bank].bank->id, state);
 
         return 0;
 }
@@ -457,10 +303,9 @@ void at91_gpio_suspend(void)
                 __raw_writel(backups[i], pio + PIO_IDR);
                 __raw_writel(wakeups[i], pio + PIO_IER);
 
-                if (!wakeups[i]) {
-                        clk_unprepare(gpio_chip[i].clock);
-                        clk_disable(gpio_chip[i].clock);
-                } else {
+                if (!wakeups[i])
+                        clk_disable(gpio_chip[i].bank->clock);
+                else {
 #ifdef CONFIG_PM_DEBUG
                         printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
 #endif
@@ -475,10 +320,8 @@ void at91_gpio_resume(void)
         for (i = 0; i < gpio_banks; i++) {
                 void __iomem    *pio = gpio_chip[i].regbase;
 
-                if (!wakeups[i]) {
-                        if (clk_prepare(gpio_chip[i].clock) == 0)
-                                clk_enable(gpio_chip[i].clock);
-                }
+                if (!wakeups[i])
+                        clk_enable(gpio_chip[i].bank->clock);
 
                 __raw_writel(wakeups[i], pio + PIO_IDR);
                 __raw_writel(backups[i], pio + PIO_IER);
@@ -494,10 +337,7 @@ void at91_gpio_resume(void)
  * To use any AT91_PIN_* as an externally triggered IRQ, first call
  * at91_set_gpio_input() then maybe enable its glitch filter.
  * Then just request_irq() with the pin ID; it works like any ARM IRQ
- * handler.
- * First implementation always triggers on rising and falling edges
- * whereas the newer PIO3 can be additionally configured to trigger on
- * level, edge with any polarity.
+ * handler, though it always triggers on rising and falling edges.
  *
  * Alternatively, certain pins may be used directly as IRQ0..IRQ6 after
  * configuring them with at91_set_a_periph() or at91_set_b_periph().
@@ -506,9 +346,8 @@ void at91_gpio_resume(void)
 
 static void gpio_irq_mask(struct irq_data *d)
 {
-        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
-        void __iomem    *pio = at91_gpio->regbase;
-        unsigned        mask = 1 << d->hwirq;
+        void __iomem    *pio = pin_to_controller(d->irq);
+        unsigned        mask = pin_to_mask(d->irq);
 
         if (pio)
                 __raw_writel(mask, pio + PIO_IDR);
@@ -516,9 +355,8 @@ static void gpio_irq_mask(struct irq_data *d)
 
 static void gpio_irq_unmask(struct irq_data *d)
 {
-        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
-        void __iomem    *pio = at91_gpio->regbase;
-        unsigned        mask = 1 << d->hwirq;
+        void __iomem    *pio = pin_to_controller(d->irq);
+        unsigned        mask = pin_to_mask(d->irq);
 
         if (pio)
                 __raw_writel(mask, pio + PIO_IER);
@@ -535,68 +373,26 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
         }
 }
 
-/* Alternate irq type for PIO3 support */
-static int alt_gpio_irq_type(struct irq_data *d, unsigned type)
-{
-        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
-        void __iomem    *pio = at91_gpio->regbase;
-        unsigned        mask = 1 << d->hwirq;
-
-        switch (type) {
-        case IRQ_TYPE_EDGE_RISING:
-                __raw_writel(mask, pio + PIO_ESR);
-                __raw_writel(mask, pio + PIO_REHLSR);
-                break;
-        case IRQ_TYPE_EDGE_FALLING:
-                __raw_writel(mask, pio + PIO_ESR);
-                __raw_writel(mask, pio + PIO_FELLSR);
-                break;
-        case IRQ_TYPE_LEVEL_LOW:
-                __raw_writel(mask, pio + PIO_LSR);
-                __raw_writel(mask, pio + PIO_FELLSR);
-                break;
-        case IRQ_TYPE_LEVEL_HIGH:
-                __raw_writel(mask, pio + PIO_LSR);
-                __raw_writel(mask, pio + PIO_REHLSR);
-                break;
-        case IRQ_TYPE_EDGE_BOTH:
-                /*
-                 * disable additional interrupt modes:
-                 * fall back to default behavior
-                 */
-                __raw_writel(mask, pio + PIO_AIMDR);
-                return 0;
-        case IRQ_TYPE_NONE:
-        default:
-                pr_warn("AT91: No type for irq %d\n", gpio_to_irq(d->irq));
-                return -EINVAL;
-        }
-
-        /* enable additional interrupt modes */
-        __raw_writel(mask, pio + PIO_AIMER);
-
-        return 0;
-}
-
 static struct irq_chip gpio_irqchip = {
         .name           = "GPIO",
         .irq_disable    = gpio_irq_mask,
         .irq_mask       = gpio_irq_mask,
         .irq_unmask     = gpio_irq_unmask,
-        /* .irq_set_type is set dynamically */
+        .irq_set_type   = gpio_irq_type,
         .irq_set_wake   = gpio_irq_set_wake,
 };
 
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 {
-        struct irq_chip *chip = irq_desc_get_chip(desc);
+        unsigned        pin;
         struct irq_data *idata = irq_desc_get_irq_data(desc);
+        struct irq_chip *chip = irq_data_get_irq_chip(idata);
         struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
         void __iomem    *pio = at91_gpio->regbase;
-        unsigned long   isr;
-        int             n;
+        u32             isr;
 
-        chained_irq_enter(chip, desc);
+        /* temporarily mask (level sensitive) parent IRQ */
+        chip->irq_ack(idata);
         for (;;) {
                 /* Reading ISR acks pending (edge triggered) GPIO interrupts.
                  * When there none are pending, we're finished unless we need
@@ -611,13 +407,16 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                         continue;
                 }
 
-                n = find_first_bit(&isr, BITS_PER_LONG);
-                while (n < BITS_PER_LONG) {
-                        generic_handle_irq(irq_find_mapping(at91_gpio->domain, n));
-                        n = find_next_bit(&isr, BITS_PER_LONG, n + 1);
+                pin = at91_gpio->chip.base;
+
+                while (isr) {
+                        if (isr & 1)
+                                generic_handle_irq(pin);
+                        pin++;
+                        isr >>= 1;
                 }
         }
-        chained_irq_exit(chip, desc);
+        chip->irq_unmask(idata);
         /* now it may re-trigger */
 }
 
@@ -625,33 +424,6 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 
 #ifdef CONFIG_DEBUG_FS
 
-static void gpio_printf(struct seq_file *s, void __iomem *pio, unsigned mask)
-{
-        char    *trigger = NULL;
-        char    *polarity = NULL;
-
-        if (__raw_readl(pio + PIO_IMR) & mask) {
-                if (!has_pio3() || !(__raw_readl(pio + PIO_AIMMR) & mask )) {
-                        trigger = "edge";
-                        polarity = "both";
-                } else {
-                        if (__raw_readl(pio + PIO_ELSR) & mask) {
-                                trigger = "level";
-                                polarity = __raw_readl(pio + PIO_FRLHSR) & mask ?
-                                        "high" : "low";
-                        } else {
-                                trigger = "edge";
-                                polarity = __raw_readl(pio + PIO_FRLHSR) & mask ?
-                                                "rising" : "falling";
-                        }
-                }
-                seq_printf(s, "IRQ:%s-%s\t", trigger, polarity);
-        } else {
-                seq_printf(s, "GPIO:%s\t\t",
-                                __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
-        }
-}
-
 static int at91_gpio_show(struct seq_file *s, void *unused)
 {
         int bank, j;
@@ -659,7 +431,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
         /* print heading */
         seq_printf(s, "Pin\t");
         for (bank = 0; bank < gpio_banks; bank++) {
-                seq_printf(s, "PIO%c\t\t", 'A' + bank);
+                seq_printf(s, "PIO%c\t", 'A' + bank);
         };
         seq_printf(s, "\n\n");
 
@@ -668,15 +440,16 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
                 seq_printf(s, "%i:\t", j);
 
                 for (bank = 0; bank < gpio_banks; bank++) {
-                        unsigned        pin  = (32 * bank) + j;
+                        unsigned        pin  = PIN_BASE + (32 * bank) + j;
                         void __iomem    *pio = pin_to_controller(pin);
                         unsigned        mask = pin_to_mask(pin);
 
                         if (__raw_readl(pio + PIO_PSR) & mask)
-                                gpio_printf(s, pio, mask);
+                                seq_printf(s, "GPIO:%s", __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
                         else
-                                seq_printf(s, "%c\t\t",
-                                                peripheral_function(pio, mask));
+                                seq_printf(s, "%s", __raw_readl(pio + PIO_ABSR) & mask ? "B" : "A");
+
+                        seq_printf(s, "\t");
                 }
 
                 seq_printf(s, "\n");
@@ -716,90 +489,47 @@ postcore_initcall(at91_gpio_debugfs_init);
 static struct lock_class_key gpio_lock_class;
 
 /*
- * irqdomain initialization: pile up irqdomains on top of AIC range
- */
-static void __init at91_gpio_irqdomain(struct at91_gpio_chip *at91_gpio)
-{
-        int irq_base;
-
-        irq_base = irq_alloc_descs(-1, 0, at91_gpio->chip.ngpio, 0);
-        if (irq_base < 0)
-                panic("at91_gpio.%d: error %d: couldn't allocate IRQ numbers.\n",
-                        at91_gpio->pioc_idx, irq_base);
-        at91_gpio->domain = irq_domain_add_legacy(NULL, at91_gpio->chip.ngpio,
-                                                  irq_base, 0,
-                                                  &irq_domain_simple_ops, NULL);
-        if (!at91_gpio->domain)
-                panic("at91_gpio.%d: couldn't allocate irq domain.\n",
-                        at91_gpio->pioc_idx);
-}
-
-/*
  * Called from the processor-specific init to enable GPIO interrupt support.
  */
 void __init at91_gpio_irq_setup(void)
 {
-        unsigned                pioc;
-        int                     gpio_irqnbr = 0;
+        unsigned                pioc, pin;
         struct at91_gpio_chip   *this, *prev;
 
-        /* Setup proper .irq_set_type function */
-        if (has_pio3())
-                gpio_irqchip.irq_set_type = alt_gpio_irq_type;
-        else
-                gpio_irqchip.irq_set_type = gpio_irq_type;
-
-        for (pioc = 0, this = gpio_chip, prev = NULL;
+        for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL;
                         pioc++ < gpio_banks;
                         prev = this, this++) {
-                int offset;
+                unsigned        id = this->bank->id;
+                unsigned        i;
 
                 __raw_writel(~0, this->regbase + PIO_IDR);
 
-                /* setup irq domain for this GPIO controller */
-                at91_gpio_irqdomain(this);
-
-                for (offset = 0; offset < this->chip.ngpio; offset++) {
-                        unsigned int virq = irq_find_mapping(this->domain, offset);
-                        irq_set_lockdep_class(virq, &gpio_lock_class);
+                for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
+                        irq_set_lockdep_class(pin, &gpio_lock_class);
 
                         /*
                          * Can use the "simple" and not "edge" handler since it's
                          * shorter, and the AIC handles interrupts sanely.
                          */
-                        irq_set_chip_and_handler(virq, &gpio_irqchip,
+                        irq_set_chip_and_handler(pin, &gpio_irqchip,
                                                  handle_simple_irq);
-                        set_irq_flags(virq, IRQF_VALID);
-                        irq_set_chip_data(virq, this);
-
-                        gpio_irqnbr++;
+                        set_irq_flags(pin, IRQF_VALID);
                 }
 
                 /* The toplevel handler handles one bank of GPIOs, except
-                 * on some SoC it can handles up to three...
-                 * We only set up the handler for the first of the list.
+                 * AT91SAM9263_ID_PIOCDE handles three... PIOC is first in
+                 * the list, so we only set up that handler.
                  */
                 if (prev && prev->next == this)
                         continue;
 
-                this->pioc_virq = irq_create_mapping(NULL, this->pioc_hwirq);
-                irq_set_chip_data(this->pioc_virq, this);
-                irq_set_chained_handler(this->pioc_virq, gpio_irq_handler);
+                irq_set_chip_data(id, this);
+                irq_set_chained_handler(id, gpio_irq_handler);
         }
-        pr_info("AT91: %d gpio irqs in %d banks\n", gpio_irqnbr, gpio_banks);
+        pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
 }
 
 /* gpiolib support */
-static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset)
-{
-        struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
-        void __iomem *pio = at91_gpio->regbase;
-        unsigned mask = 1 << offset;
-
-        __raw_writel(mask, pio + PIO_PER);
-        return 0;
-}
-
 static int at91_gpiolib_direction_input(struct gpio_chip *chip,
                                         unsigned offset)
 {
@@ -862,105 +592,38 @@ static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
                                            at91_get_gpio_value(pin) ?
                                            "set" : "clear");
                         else
-                                seq_printf(s, "[periph %c]\n",
-                                           peripheral_function(pio, mask));
+                                seq_printf(s, "[periph %s]\n",
+                                           __raw_readl(pio + PIO_ABSR) &
+                                           mask ? "B" : "A");
                 }
         }
 }
 
-static int at91_gpiolib_to_irq(struct gpio_chip *chip, unsigned offset)
-{
-        struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
-        int virq;
-
-        if (offset < chip->ngpio)
-                virq = irq_create_mapping(at91_gpio->domain, offset);
-        else
-                virq = -ENXIO;
-
-        dev_dbg(chip->dev, "%s: request IRQ for GPIO %d, return %d\n",
-                                chip->label, offset + chip->base, virq);
-        return virq;
-}
-
-static int __init at91_gpio_setup_clk(int idx)
-{
-        struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
-
-        /* retreive PIO controller's clock */
-        at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
-        if (IS_ERR(at91_gpio->clock)) {
-                pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", idx);
-                goto err;
-        }
-
-        if (clk_prepare(at91_gpio->clock))
-                goto clk_prep_err;
-
-        /* enable PIO controller's clock */
-        if (clk_enable(at91_gpio->clock)) {
-                pr_err("at91_gpio.%d, failed to enable clock, ignoring.\n", idx);
-                goto clk_err;
-        }
-
-        return 0;
-
-clk_err:
-        clk_unprepare(at91_gpio->clock);
-clk_prep_err:
-        clk_put(at91_gpio->clock);
-err:
-        return -EINVAL;
-}
-
-static void __init at91_gpio_init_one(int idx, u32 regbase, int pioc_hwirq)
-{
-        struct at91_gpio_chip *at91_gpio = &gpio_chip[idx];
-
-        at91_gpio->chip.base = idx * MAX_NB_GPIO_PER_BANK;
-        at91_gpio->pioc_hwirq = pioc_hwirq;
-        at91_gpio->pioc_idx = idx;
-
-        at91_gpio->regbase = ioremap(regbase, 512);
-        if (!at91_gpio->regbase) {
-                pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", idx);
-                return;
-        }
-
-        if (at91_gpio_setup_clk(idx))
-                goto ioremap_err;
-
-        gpio_banks = max(gpio_banks, idx + 1);
-        return;
-
-ioremap_err:
-        iounmap(at91_gpio->regbase);
-}
-
 /*
  * Called from the processor-specific init to enable GPIO pin support.
  */
 void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
 {
-        unsigned i;
+        unsigned                i;
         struct at91_gpio_chip *at91_gpio, *last = NULL;
 
         BUG_ON(nr_banks > MAX_GPIO_BANKS);
 
-        if (of_have_populated_dt())
-                return;
-
-        for (i = 0; i < nr_banks; i++)
-                at91_gpio_init_one(i, data[i].regbase, data[i].id);
+        gpio_banks = nr_banks;
 
-        for (i = 0; i < gpio_banks; i++) {
+        for (i = 0; i < nr_banks; i++) {
                 at91_gpio = &gpio_chip[i];
 
-                /*
-                 * GPIO controller are grouped on some SoC:
-                 * PIOC, PIOD and PIOE can share the same IRQ line
-                 */
-                if (last && last->pioc_hwirq == at91_gpio->pioc_hwirq)
+                at91_gpio->bank = &data[i];
+                at91_gpio->chip.base = PIN_BASE + i * 32;
+                at91_gpio->regbase = at91_gpio->bank->offset +
+                        (void __iomem *)AT91_VA_BASE_SYS;
+
+                /* enable PIO controller's clock */
+                clk_enable(at91_gpio->bank->clock);
+
+                /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
+                if (last && last->bank->id == at91_gpio->bank->id)
                         last->next = at91_gpio;
                 last = at91_gpio;
 
diff --git a/arch/arm/mach-at91/gsia18s.h b/arch/arm/mach-at91/gsia18s.h
deleted file mode 100644
index 307c194926f..00000000000
--- a/arch/arm/mach-at91/gsia18s.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* Buttons */
-#define GPIO_TRIG_NET_IN                AT91_PIN_PB21
-#define GPIO_CARD_UNMOUNT_0             AT91_PIN_PB13
-#define GPIO_CARD_UNMOUNT_1             AT91_PIN_PB12
-#define GPIO_KEY_POWER                  AT91_PIN_PA25
-
-/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */
-#define GS_IA18_S_PCF_GPIO_BASE0        NR_BUILTIN_GPIO
-#define PCF_GPIO_HDC_POWER              (GS_IA18_S_PCF_GPIO_BASE0 + 0)
-#define PCF_GPIO_WIFI_SETUP             (GS_IA18_S_PCF_GPIO_BASE0 + 1)
-#define PCF_GPIO_WIFI_ENABLE            (GS_IA18_S_PCF_GPIO_BASE0 + 2)
-#define PCF_GPIO_WIFI_RESET             (GS_IA18_S_PCF_GPIO_BASE0 + 3)
-#define PCF_GPIO_ETH_DETECT             4 /* this is a GPI */
-#define PCF_GPIO_GPS_SETUP              (GS_IA18_S_PCF_GPIO_BASE0 + 5)
-#define PCF_GPIO_GPS_STANDBY            (GS_IA18_S_PCF_GPIO_BASE0 + 6)
-#define PCF_GPIO_GPS_POWER              (GS_IA18_S_PCF_GPIO_BASE0 + 7)
-
-/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */
-#define GS_IA18_S_PCF_GPIO_BASE1        (GS_IA18_S_PCF_GPIO_BASE0 + 8)
-#define PCF_GPIO_ALARM1                 (GS_IA18_S_PCF_GPIO_BASE1 + 0)
-#define PCF_GPIO_ALARM2                 (GS_IA18_S_PCF_GPIO_BASE1 + 1)
-#define PCF_GPIO_ALARM3                 (GS_IA18_S_PCF_GPIO_BASE1 + 2)
-#define PCF_GPIO_ALARM4                 (GS_IA18_S_PCF_GPIO_BASE1 + 3)
-/* bits 4, 5, 6 not used */
-#define PCF_GPIO_ALARM_V_RELAY_ON       (GS_IA18_S_PCF_GPIO_BASE1 + 7)
-
-/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */
-#define GS_IA18_S_PCF_GPIO_BASE2        (GS_IA18_S_PCF_GPIO_BASE1 + 8)
-#define PCF_GPIO_MODEM_POWER            (GS_IA18_S_PCF_GPIO_BASE2 + 0)
-#define PCF_GPIO_MODEM_RESET            (GS_IA18_S_PCF_GPIO_BASE2 + 3)
-/* bits 1, 2, 4, 5 not used */
-#define PCF_GPIO_TRX_RESET              (GS_IA18_S_PCF_GPIO_BASE2 + 6)
-/* bit 7 not used */
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index 2aa0c5e1349..dbfe455a4c4 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
 #define dbgu_readl(dbgu, field) \
         __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
 
-#if !defined(CONFIG_ARCH_AT91X40)
+#ifdef AT91_DBGU
 #define AT91_DBGU_CR            (0x00)  /* Control Register */
 #define AT91_DBGU_MR            (0x04)  /* Mode Register */
 #define AT91_DBGU_IER           (0x08)  /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
deleted file mode 100644
index 02fae9de746..00000000000
--- a/arch/arm/mach-at91/include/mach/at91_matrix.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Under GPLv2
- */
-
-#ifndef __MACH_AT91_MATRIX_H__
-#define __MACH_AT91_MATRIX_H__
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_matrix_base;
-
-#define at91_matrix_read(field) \
-        __raw_readl(at91_matrix_base + field)
-
-#define at91_matrix_write(field, value) \
-        __raw_writel(value, at91_matrix_base + field);
-
-#else
-.extern at91_matrix_base
-#endif
-
-#endif /* __MACH_AT91_MATRIX_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h
index 732b11c37f1..c6a31bf8a5c 100644
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ b/arch/arm/mach-at91/include/mach/at91_pio.h
@@ -40,35 +40,10 @@
 #define PIO_PUER        0x64    /* Pull-up Enable Register */
 #define PIO_PUSR        0x68    /* Pull-up Status Register */
 #define PIO_ASR         0x70    /* Peripheral A Select Register */
-#define PIO_ABCDSR1     0x70    /* Peripheral ABCD Select Register 1 [some sam9 only] */
 #define PIO_BSR         0x74    /* Peripheral B Select Register */
-#define PIO_ABCDSR2     0x74    /* Peripheral ABCD Select Register 2 [some sam9 only] */
 #define PIO_ABSR        0x78    /* AB Status Register */
-#define PIO_IFSCDR      0x80    /* Input Filter Slow Clock Disable Register */
-#define PIO_IFSCER      0x84    /* Input Filter Slow Clock Enable Register */
-#define PIO_IFSCSR      0x88    /* Input Filter Slow Clock Status Register */
-#define PIO_SCDR        0x8c    /* Slow Clock Divider Debouncing Register */
-#define         PIO_SCDR_DIV    (0x3fff <<  0)          /* Slow Clock Divider Mask */
-#define PIO_PPDDR       0x90    /* Pad Pull-down Disable Register */
-#define PIO_PPDER       0x94    /* Pad Pull-down Enable Register */
-#define PIO_PPDSR       0x98    /* Pad Pull-down Status Register */
 #define PIO_OWER        0xa0    /* Output Write Enable Register */
 #define PIO_OWDR        0xa4    /* Output Write Disable Register */
 #define PIO_OWSR        0xa8    /* Output Write Status Register */
-#define PIO_AIMER       0xb0    /* Additional Interrupt Modes Enable Register */
-#define PIO_AIMDR       0xb4    /* Additional Interrupt Modes Disable Register */
-#define PIO_AIMMR       0xb8    /* Additional Interrupt Modes Mask Register */
-#define PIO_ESR         0xc0    /* Edge Select Register */
-#define PIO_LSR         0xc4    /* Level Select Register */
-#define PIO_ELSR        0xc8    /* Edge/Level Status Register */
-#define PIO_FELLSR      0xd0    /* Falling Edge/Low Level Select Register */
-#define PIO_REHLSR      0xd4    /* Rising Edge/ High Level Select Register */
-#define PIO_FRLHSR      0xd8    /* Fall/Rise - Low/High Status Register */
-#define PIO_SCHMITT     0x100   /* Schmitt Trigger Register */
-
-#define ABCDSR_PERIPH_A 0x0
-#define ABCDSR_PERIPH_B 0x1
-#define ABCDSR_PERIPH_C 0x2
-#define ABCDSR_PERIPH_D 0x3
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index ea2c57a86ca..e46f93e34aa 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -16,27 +16,17 @@
 #ifndef AT91_PMC_H
 #define AT91_PMC_H
 
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_pmc_base;
+#define AT91_PMC_SCER           (AT91_PMC + 0x00)       /* System Clock Enable Register */
+#define AT91_PMC_SCDR           (AT91_PMC + 0x04)       /* System Clock Disable Register */
 
-#define at91_pmc_read(field) \
-        __raw_readl(at91_pmc_base + field)
-
-#define at91_pmc_write(field, value) \
-        __raw_writel(value, at91_pmc_base + field)
-#else
-.extern at91_pmc_base
-#endif
-
-#define AT91_PMC_SCER           0x00                    /* System Clock Enable Register */
-#define AT91_PMC_SCDR           0x04                    /* System Clock Disable Register */
-
-#define AT91_PMC_SCSR           0x08                    /* System Clock Status Register */
+#define AT91_PMC_SCSR           (AT91_PMC + 0x08)       /* System Clock Status Register */
 #define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
+#define         AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [CAP9 revC & some SAM9 only] */
 #define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
+#define         AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
 #define         AT91SAM926x_PMC_UDP     (1 <<  7)               /* USB Devcice Port Clock [AT91SAM926x only] */
 #define         AT91_PMC_PCK0           (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1           (1 <<  9)               /* Programmable Clock 1 */
@@ -46,31 +36,27 @@ extern void __iomem *at91_pmc_base;
 #define         AT91_PMC_HCK0           (1 << 16)               /* AHB Clock (USB host) [AT91SAM9261 only] */
 #define         AT91_PMC_HCK1           (1 << 17)               /* AHB Clock (LCD) [AT91SAM9261 only] */
 
-#define AT91_PMC_PCER           0x10                    /* Peripheral Clock Enable Register */
-#define AT91_PMC_PCDR           0x14                    /* Peripheral Clock Disable Register */
-#define AT91_PMC_PCSR           0x18                    /* Peripheral Clock Status Register */
+#define AT91_PMC_PCER           (AT91_PMC + 0x10)       /* Peripheral Clock Enable Register */
+#define AT91_PMC_PCDR           (AT91_PMC + 0x14)       /* Peripheral Clock Disable Register */
+#define AT91_PMC_PCSR           (AT91_PMC + 0x18)       /* Peripheral Clock Status Register */
 
-#define AT91_CKGR_UCKR          0x1C                    /* UTMI Clock Register [some SAM9] */
+#define AT91_CKGR_UCKR          (AT91_PMC + 0x1C)       /* UTMI Clock Register [some SAM9, CAP9] */
 #define         AT91_PMC_UPLLEN         (1   << 16)             /* UTMI PLL Enable */
 #define         AT91_PMC_UPLLCOUNT      (0xf << 20)             /* UTMI PLL Start-up Time */
 #define         AT91_PMC_BIASEN         (1   << 24)             /* UTMI BIAS Enable */
 #define         AT91_PMC_BIASCOUNT      (0xf << 28)             /* UTMI BIAS Start-up Time */
 
-#define AT91_CKGR_MOR           0x20                    /* Main Oscillator Register [not on SAM9RL] */
-#define         AT91_PMC_MOSCEN         (1    <<  0)            /* Main Oscillator Enable */
-#define         AT91_PMC_OSCBYPASS      (1    <<  1)            /* Oscillator Bypass */
-#define         AT91_PMC_MOSCRCEN       (1    <<  3)            /* Main On-Chip RC Oscillator Enable [some SAM9] */
-#define         AT91_PMC_OSCOUNT        (0xff <<  8)            /* Main Oscillator Start-up Time */
-#define         AT91_PMC_KEY            (0x37 << 16)            /* MOR Writing Key */
-#define         AT91_PMC_MOSCSEL        (1    << 24)            /* Main Oscillator Selection [some SAM9] */
-#define         AT91_PMC_CFDEN          (1    << 25)            /* Clock Failure Detector Enable [some SAM9] */
+#define AT91_CKGR_MOR           (AT91_PMC + 0x20)       /* Main Oscillator Register [not on SAM9RL] */
+#define         AT91_PMC_MOSCEN         (1    << 0)             /* Main Oscillator Enable */
+#define         AT91_PMC_OSCBYPASS      (1    << 1)             /* Oscillator Bypass [SAM9x, CAP9] */
+#define         AT91_PMC_OSCOUNT        (0xff << 8)             /* Main Oscillator Start-up Time */
 
-#define AT91_CKGR_MCFR          0x24                    /* Main Clock Frequency Register */
+#define AT91_CKGR_MCFR          (AT91_PMC + 0x24)       /* Main Clock Frequency Register */
 #define         AT91_PMC_MAINF          (0xffff <<  0)          /* Main Clock Frequency */
 #define         AT91_PMC_MAINRDY        (1      << 16)          /* Main Clock Ready */
 
-#define AT91_CKGR_PLLAR         0x28                    /* PLL A Register */
-#define AT91_CKGR_PLLBR         0x2c                    /* PLL B Register */
+#define AT91_CKGR_PLLAR         (AT91_PMC + 0x28)       /* PLL A Register */
+#define AT91_CKGR_PLLBR         (AT91_PMC + 0x2c)       /* PLL B Register */
 #define         AT91_PMC_DIV            (0xff  <<  0)           /* Divider */
 #define         AT91_PMC_PLLCOUNT       (0x3f  <<  8)           /* PLL Counter */
 #define         AT91_PMC_OUT            (3     << 14)           /* PLL Clock Frequency Range */
@@ -81,37 +67,27 @@ extern void __iomem *at91_pmc_base;
 #define                 AT91_PMC_USBDIV_4               (2 << 28)
 #define         AT91_PMC_USB96M         (1     << 28)           /* Divider by 2 Enable (PLLB only) */
 
-#define AT91_PMC_MCKR           0x30                    /* Master Clock Register */
+#define AT91_PMC_MCKR           (AT91_PMC + 0x30)       /* Master Clock Register */
 #define         AT91_PMC_CSS            (3 <<  0)               /* Master Clock Selection */
 #define                 AT91_PMC_CSS_SLOW               (0 << 0)
 #define                 AT91_PMC_CSS_MAIN               (1 << 0)
 #define                 AT91_PMC_CSS_PLLA               (2 << 0)
 #define                 AT91_PMC_CSS_PLLB               (3 << 0)
 #define                 AT91_PMC_CSS_UPLL               (3 << 0)        /* [some SAM9 only] */
-#define         PMC_PRES_OFFSET         2
-#define         AT91_PMC_PRES           (7 <<  PMC_PRES_OFFSET)         /* Master Clock Prescaler */
-#define                 AT91_PMC_PRES_1                 (0 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_2                 (1 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_4                 (2 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_8                 (3 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_16                (4 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_32                (5 << PMC_PRES_OFFSET)
-#define                 AT91_PMC_PRES_64                (6 << PMC_PRES_OFFSET)
-#define         PMC_ALT_PRES_OFFSET     4
-#define         AT91_PMC_ALT_PRES       (7 <<  PMC_ALT_PRES_OFFSET)             /* Master Clock Prescaler [alternate location] */
-#define                 AT91_PMC_ALT_PRES_1             (0 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_2             (1 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_4             (2 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_8             (3 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_16            (4 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_32            (5 << PMC_ALT_PRES_OFFSET)
-#define                 AT91_PMC_ALT_PRES_64            (6 << PMC_ALT_PRES_OFFSET)
+#define         AT91_PMC_PRES           (7 <<  2)               /* Master Clock Prescaler */
+#define                 AT91_PMC_PRES_1                 (0 << 2)
+#define                 AT91_PMC_PRES_2                 (1 << 2)
+#define                 AT91_PMC_PRES_4                 (2 << 2)
+#define                 AT91_PMC_PRES_8                 (3 << 2)
+#define                 AT91_PMC_PRES_16                (4 << 2)
+#define                 AT91_PMC_PRES_32                (5 << 2)
+#define                 AT91_PMC_PRES_64                (6 << 2)
 #define         AT91_PMC_MDIV           (3 <<  8)               /* Master Clock Division */
 #define                 AT91RM9200_PMC_MDIV_1           (0 << 8)        /* [AT91RM9200 only] */
 #define                 AT91RM9200_PMC_MDIV_2           (1 << 8)
 #define                 AT91RM9200_PMC_MDIV_3           (2 << 8)
 #define                 AT91RM9200_PMC_MDIV_4           (3 << 8)
-#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9 only] */
+#define                 AT91SAM9_PMC_MDIV_1             (0 << 8)        /* [SAM9,CAP9 only] */
 #define                 AT91SAM9_PMC_MDIV_2             (1 << 8)
 #define                 AT91SAM9_PMC_MDIV_4             (2 << 8)
 #define                 AT91SAM9_PMC_MDIV_6             (3 << 8)        /* [some SAM9 only] */
@@ -123,55 +99,35 @@ extern void __iomem *at91_pmc_base;
 #define                 AT91_PMC_PLLADIV2_OFF           (0 << 12)
 #define                 AT91_PMC_PLLADIV2_ON            (1 << 12)
 
-#define AT91_PMC_USB            0x38                    /* USB Clock Register [some SAM9 only] */
+#define AT91_PMC_USB            (AT91_PMC + 0x38)       /* USB Clock Register [some SAM9 only] */
 #define         AT91_PMC_USBS           (0x1 <<  0)             /* USB OHCI Input clock selection */
 #define                 AT91_PMC_USBS_PLLA              (0 << 0)
 #define                 AT91_PMC_USBS_UPLL              (1 << 0)
 #define         AT91_PMC_OHCIUSBDIV     (0xF <<  8)             /* Divider for USB OHCI Clock */
 
-#define AT91_PMC_SMD            0x3c                    /* Soft Modem Clock Register [some SAM9 only] */
-#define         AT91_PMC_SMDS           (0x1  <<  0)            /* SMD input clock selection */
-#define         AT91_PMC_SMD_DIV        (0x1f <<  8)            /* SMD input clock divider */
-#define         AT91_PMC_SMDDIV(n)      (((n) <<  8) & AT91_PMC_SMD_DIV)
-
-#define AT91_PMC_PCKR(n)        (0x40 + ((n) * 4))      /* Programmable Clock 0-N Registers */
-#define         AT91_PMC_ALT_PCKR_CSS   (0x7 <<  0)             /* Programmable Clock Source Selection [alternate length] */
-#define                 AT91_PMC_CSS_MASTER             (4 << 0)        /* [some SAM9 only] */
+#define AT91_PMC_PCKR(n)        (AT91_PMC + 0x40 + ((n) * 4))   /* Programmable Clock 0-N Registers */
 #define         AT91_PMC_CSSMCK         (0x1 <<  8)             /* CSS or Master Clock Selection */
 #define                 AT91_PMC_CSSMCK_CSS             (0 << 8)
 #define                 AT91_PMC_CSSMCK_MCK             (1 << 8)
 
-#define AT91_PMC_IER            0x60                    /* Interrupt Enable Register */
-#define AT91_PMC_IDR            0x64                    /* Interrupt Disable Register */
-#define AT91_PMC_SR             0x68                    /* Status Register */
+#define AT91_PMC_IER            (AT91_PMC + 0x60)       /* Interrupt Enable Register */
+#define AT91_PMC_IDR            (AT91_PMC + 0x64)       /* Interrupt Disable Register */
+#define AT91_PMC_SR             (AT91_PMC + 0x68)       /* Status Register */
 #define         AT91_PMC_MOSCS          (1 <<  0)               /* MOSCS Flag */
 #define         AT91_PMC_LOCKA          (1 <<  1)               /* PLLA Lock */
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
-#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
+#define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9, AT91CAP9 only] */
+#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
-#define         AT91_PMC_MOSCSELS       (1 << 16)               /* Main Oscillator Selection [some SAM9] */
-#define         AT91_PMC_MOSCRCS        (1 << 17)               /* Main On-Chip RC [some SAM9] */
-#define         AT91_PMC_CFDEV          (1 << 18)               /* Clock Failure Detector Event [some SAM9] */
-#define AT91_PMC_IMR            0x6c                    /* Interrupt Mask Register */
-
-#define AT91_PMC_PROT           0xe4                    /* Write Protect Mode Register [some SAM9] */
-#define         AT91_PMC_WPEN           (0x1  <<  0)            /* Write Protect Enable */
-#define         AT91_PMC_WPKEY          (0xffffff << 8)         /* Write Protect Key */
-#define         AT91_PMC_PROTKEY        (0x504d43 << 8)         /* Activation Code */
+#define AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
 
-#define AT91_PMC_WPSR           0xe8                    /* Write Protect Status Register [some SAM9] */
-#define         AT91_PMC_WPVS           (0x1  <<  0)            /* Write Protect Violation Status */
-#define         AT91_PMC_WPVSRC         (0xffff  <<  8)         /* Write Protect Violation Source */
+#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
+#define         AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
 
-#define AT91_PMC_PCR            0x10c                   /* Peripheral Control Register [some SAM9] */
-#define         AT91_PMC_PCR_PID        (0x3f  <<  0)           /* Peripheral ID */
-#define         AT91_PMC_PCR_CMD        (0x1  <<  12)           /* Command */
-#define         AT91_PMC_PCR_DIV        (0x3  <<  16)           /* Divisor Value */
-#define         AT91_PMC_PCRDIV(n)      (((n) <<  16) & AT91_PMC_PCR_DIV)
-#define         AT91_PMC_PCR_EN         (0x1  <<  28)           /* Enable */
+#define AT91_PMC_VER            (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
deleted file mode 100644
index d8aeb278614..00000000000
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Header file for the Atmel RAM Controller
- *
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Under GPLv2 only
- */
-
-#ifndef __AT91_RAMC_H__
-#define __AT91_RAMC_H__
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_ramc_base[];
-
-#define at91_ramc_read(id, field) \
-        __raw_readl(at91_ramc_base[id] + field)
-
-#define at91_ramc_write(id, field, value) \
-        __raw_writel(value, at91_ramc_base[id] + field)
-#else
-.extern at91_ramc_base
-#endif
-
-#define AT91_MEMCTRL_MC         0
-#define AT91_MEMCTRL_SDRAMC     1
-#define AT91_MEMCTRL_DDRSDR     2
-
-#include <mach/at91rm9200_sdramc.h>
-#include <mach/at91sam9_ddrsdr.h>
-#include <mach/at91sam9_sdramc.h>
-
-#endif /* __AT91_RAMC_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h
index 969aac27109..8847173e410 100644
--- a/arch/arm/mach-at91/include/mach/at91_st.h
+++ b/arch/arm/mach-at91/include/mach/at91_st.h
@@ -16,46 +16,34 @@
 #ifndef AT91_ST_H
 #define AT91_ST_H
 
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_st_base;
-
-#define at91_st_read(field) \
-        __raw_readl(at91_st_base + field)
-
-#define at91_st_write(field, value) \
-        __raw_writel(value, at91_st_base + field);
-#else
-.extern at91_st_base
-#endif
-
-#define AT91_ST_CR              0x00                    /* Control Register */
+#define AT91_ST_CR              (AT91_ST + 0x00)        /* Control Register */
 #define         AT91_ST_WDRST           (1 << 0)                /* Watchdog Timer Restart */
 
-#define AT91_ST_PIMR            0x04                    /* Period Interval Mode Register */
+#define AT91_ST_PIMR            (AT91_ST + 0x04)        /* Period Interval Mode Register */
 #define         AT91_ST_PIV             (0xffff <<  0)          /* Period Interval Value */
 
-#define AT91_ST_WDMR            0x08                    /* Watchdog Mode Register */
+#define AT91_ST_WDMR            (AT91_ST + 0x08)        /* Watchdog Mode Register */
 #define         AT91_ST_WDV             (0xffff <<  0)          /* Watchdog Counter Value */
 #define         AT91_ST_RSTEN           (1      << 16)          /* Reset Enable */
 #define         AT91_ST_EXTEN           (1      << 17)          /* External Signal Assertion Enable */
 
-#define AT91_ST_RTMR            0x0c                    /* Real-time Mode Register */
+#define AT91_ST_RTMR            (AT91_ST + 0x0c)        /* Real-time Mode Register */
 #define         AT91_ST_RTPRES          (0xffff <<  0)          /* Real-time Prescalar Value */
 
-#define AT91_ST_SR              0x10                    /* Status Register */
+#define AT91_ST_SR              (AT91_ST + 0x10)        /* Status Register */
 #define         AT91_ST_PITS            (1 << 0)                /* Period Interval Timer Status */
 #define         AT91_ST_WDOVF           (1 << 1)                /* Watchdog Overflow */
 #define         AT91_ST_RTTINC          (1 << 2)                /* Real-time Timer Increment */
 #define         AT91_ST_ALMS            (1 << 3)                /* Alarm Status */
 
-#define AT91_ST_IER             0x14                    /* Interrupt Enable Register */
-#define AT91_ST_IDR             0x18                    /* Interrupt Disable Register */
-#define AT91_ST_IMR             0x1c                    /* Interrupt Mask Register */
+#define AT91_ST_IER             (AT91_ST + 0x14)        /* Interrupt Enable Register */
+#define AT91_ST_IDR             (AT91_ST + 0x18)        /* Interrupt Disable Register */
+#define AT91_ST_IMR             (AT91_ST + 0x1c)        /* Interrupt Mask Register */
 
-#define AT91_ST_RTAR            0x20                    /* Real-time Alarm Register */
+#define AT91_ST_RTAR            (AT91_ST + 0x20)        /* Real-time Alarm Register */
 #define         AT91_ST_ALMV            (0xfffff << 0)          /* Alarm Value */
 
-#define AT91_ST_CRTR            0x24                    /* Current Real-time Register */
+#define AT91_ST_CRTR            (AT91_ST + 0x24)        /* Current Real-time Register */
 #define         AT91_ST_CRTV            (0xfffff << 0)          /* Current Real-Time Value */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index e67317c6776..e4037b50030 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -77,16 +77,25 @@
 
 
 /*
- * System Peripherals
+ * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91RM9200_BASE_DBGU    AT91_BASE_DBGU0 /* Debug Unit */
-#define AT91RM9200_BASE_PIOA    0xfffff400      /* PIO Controller A */
-#define AT91RM9200_BASE_PIOB    0xfffff600      /* PIO Controller B */
-#define AT91RM9200_BASE_PIOC    0xfffff800      /* PIO Controller C */
-#define AT91RM9200_BASE_PIOD    0xfffffa00      /* PIO Controller D */
-#define AT91RM9200_BASE_ST      0xfffffd00      /* System Timer */
-#define AT91RM9200_BASE_RTC     0xfffffe00      /* Real-Time Clock */
-#define AT91RM9200_BASE_MC      0xffffff00      /* Memory Controllers */
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)    /* Advanced Interrupt Controller */
+#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)    /* Debug Unit */
+#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)    /* PIO Controller A */
+#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)    /* PIO Controller B */
+#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)    /* PIO Controller C */
+#define AT91_PIOD       (0xfffffa00 - AT91_BASE_SYS)    /* PIO Controller D */
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)    /* Power Management Controller */
+#define AT91_ST         (0xfffffd00 - AT91_BASE_SYS)    /* System Timer */
+#define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)    /* Real-Time Clock */
+#define AT91_MC         (0xffffff00 - AT91_BASE_SYS)    /* Memory Controllers */
+
+#define AT91_USART0     AT91RM9200_BASE_US0
+#define AT91_USART1     AT91RM9200_BASE_US1
+#define AT91_USART2     AT91RM9200_BASE_US2
+#define AT91_USART3     AT91RM9200_BASE_US3
+
+#define AT91_MATRIX     0       /* not supported */
 
 /*
  * Internal Memory.
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
index aeaadfb452a..d34e4ed8934 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
@@ -17,10 +17,10 @@
 #define AT91RM9200_MC_H
 
 /* Memory Controller */
-#define AT91_MC_RCR             0x00                    /* MC Remap Control Register */
+#define AT91_MC_RCR             (AT91_MC + 0x00)        /* MC Remap Control Register */
 #define         AT91_MC_RCB             (1 <<  0)               /* Remap Command Bit */
 
-#define AT91_MC_ASR             0x04                    /* MC Abort Status Register */
+#define AT91_MC_ASR             (AT91_MC + 0x04)        /* MC Abort Status Register */
 #define         AT91_MC_UNADD           (1 <<  0)               /* Undefined Address Abort Status */
 #define         AT91_MC_MISADD          (1 <<  1)               /* Misaligned Address Abort Status */
 #define         AT91_MC_ABTSZ           (3 <<  8)               /* Abort Size Status */
@@ -40,16 +40,16 @@
 #define         AT91_MC_SVMST2          (1 << 26)               /* Saved UHP Abort Source */
 #define         AT91_MC_SVMST3          (1 << 27)               /* Saved EMAC Abort Source */
 
-#define AT91_MC_AASR            0x08                    /* MC Abort Address Status Register */
+#define AT91_MC_AASR            (AT91_MC + 0x08)        /* MC Abort Address Status Register */
 
-#define AT91_MC_MPR             0x0c                    /* MC Master Priority Register */
+#define AT91_MC_MPR             (AT91_MC + 0x0c)        /* MC Master Priority Register */
 #define         AT91_MPR_MSTP0          (7 <<  0)               /* ARM920T Priority */
 #define         AT91_MPR_MSTP1          (7 <<  4)               /* PDC Priority */
 #define         AT91_MPR_MSTP2          (7 <<  8)               /* UHP Priority */
 #define         AT91_MPR_MSTP3          (7 << 12)               /* EMAC Priority */
 
 /* External Bus Interface (EBI) registers */
-#define AT91_EBI_CSA            0x60                    /* Chip Select Assignment Register */
+#define AT91_EBI_CSA            (AT91_MC + 0x60)        /* Chip Select Assignment Register */
 #define         AT91_EBI_CS0A           (1 << 0)                /* Chip Select 0 Assignment */
 #define                 AT91_EBI_CS0A_SMC               (0 << 0)
 #define                 AT91_EBI_CS0A_BFC               (1 << 0)
@@ -66,7 +66,7 @@
 #define         AT91_EBI_DBPUC          (1 << 0)                /* Data Bus Pull-Up Configuration */
 
 /* Static Memory Controller (SMC) registers */
-#define AT91_SMC_CSR(n)         (0x70 + ((n) * 4))      /* SMC Chip Select Register */
+#define AT91_SMC_CSR(n)         (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
 #define         AT91_SMC_NWS            (0x7f <<  0)            /* Number of Wait States */
 #define                 AT91_SMC_NWS_(x)        ((x) << 0)
 #define         AT91_SMC_WSEN           (1    <<  7)            /* Wait State Enable */
@@ -87,8 +87,52 @@
 #define         AT91_SMC_RWHOLD         (7 << 28)               /* Read & Write Signal Hold Time */
 #define                 AT91_SMC_RWHOLD_(x)     ((x) << 28)
 
+/* SDRAM Controller registers */
+#define AT91_SDRAMC_MR          (AT91_MC + 0x90)        /* Mode Register */
+#define         AT91_SDRAMC_MODE        (0xf << 0)              /* Command Mode */
+#define                 AT91_SDRAMC_MODE_NORMAL         (0 << 0)
+#define                 AT91_SDRAMC_MODE_NOP            (1 << 0)
+#define                 AT91_SDRAMC_MODE_PRECHARGE      (2 << 0)
+#define                 AT91_SDRAMC_MODE_LMR            (3 << 0)
+#define                 AT91_SDRAMC_MODE_REFRESH        (4 << 0)
+#define         AT91_SDRAMC_DBW         (1   << 4)              /* Data Bus Width */
+#define                 AT91_SDRAMC_DBW_32      (0 << 4)
+#define                 AT91_SDRAMC_DBW_16      (1 << 4)
+
+#define AT91_SDRAMC_TR          (AT91_MC + 0x94)        /* Refresh Timer Register */
+#define         AT91_SDRAMC_COUNT       (0xfff << 0)            /* Refresh Timer Count */
+
+#define AT91_SDRAMC_CR          (AT91_MC + 0x98)        /* Configuration Register */
+#define         AT91_SDRAMC_NC          (3   <<  0)             /* Number of Column Bits */
+#define                 AT91_SDRAMC_NC_8        (0 << 0)
+#define                 AT91_SDRAMC_NC_9        (1 << 0)
+#define                 AT91_SDRAMC_NC_10       (2 << 0)
+#define                 AT91_SDRAMC_NC_11       (3 << 0)
+#define         AT91_SDRAMC_NR          (3   <<  2)             /* Number of Row Bits */
+#define                 AT91_SDRAMC_NR_11       (0 << 2)
+#define                 AT91_SDRAMC_NR_12       (1 << 2)
+#define                 AT91_SDRAMC_NR_13       (2 << 2)
+#define         AT91_SDRAMC_NB          (1   <<  4)             /* Number of Banks */
+#define                 AT91_SDRAMC_NB_2        (0 << 4)
+#define                 AT91_SDRAMC_NB_4        (1 << 4)
+#define         AT91_SDRAMC_CAS         (3   <<  5)             /* CAS Latency */
+#define                 AT91_SDRAMC_CAS_2       (2 << 5)
+#define         AT91_SDRAMC_TWR         (0xf <<  7)             /* Write Recovery Delay */
+#define         AT91_SDRAMC_TRC         (0xf << 11)             /* Row Cycle Delay */
+#define         AT91_SDRAMC_TRP         (0xf << 15)             /* Row Precharge Delay */
+#define         AT91_SDRAMC_TRCD        (0xf << 19)             /* Row to Column Delay */
+#define         AT91_SDRAMC_TRAS        (0xf << 23)             /* Active to Precharge Delay */
+#define         AT91_SDRAMC_TXSR        (0xf << 27)             /* Exit Self Refresh to Active Delay */
+
+#define AT91_SDRAMC_SRR         (AT91_MC + 0x9c)        /* Self Refresh Register */
+#define AT91_SDRAMC_LPR         (AT91_MC + 0xa0)        /* Low Power Register */
+#define AT91_SDRAMC_IER         (AT91_MC + 0xa4)        /* Interrupt Enable Register */
+#define AT91_SDRAMC_IDR         (AT91_MC + 0xa8)        /* Interrupt Disable Register */
+#define AT91_SDRAMC_IMR         (AT91_MC + 0xac)        /* Interrupt Mask Register */
+#define AT91_SDRAMC_ISR         (AT91_MC + 0xb0)        /* Interrupt Status Register */
+
 /* Burst Flash Controller register */
-#define AT91_BFC_MR             0xc0                    /* Mode Register */
+#define AT91_BFC_MR             (AT91_MC + 0xc0)        /* Mode Register */
 #define         AT91_BFC_BFCOM          (3   <<  0)             /* Burst Flash Controller Operating Mode */
 #define                 AT91_BFC_BFCOM_DISABLED (0 << 0)
 #define                 AT91_BFC_BFCOM_ASYNC    (1 << 0)
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
deleted file mode 100644
index aa047f458f1..00000000000
--- a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Memory Controllers (SDRAMC only) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91RM9200_SDRAMC_H
-#define AT91RM9200_SDRAMC_H
-
-/* SDRAM Controller registers */
-#define AT91RM9200_SDRAMC_MR            0x90                    /* Mode Register */
-#define         AT91RM9200_SDRAMC_MODE  (0xf << 0)              /* Command Mode */
-#define                 AT91RM9200_SDRAMC_MODE_NORMAL           (0 << 0)
-#define                 AT91RM9200_SDRAMC_MODE_NOP              (1 << 0)
-#define                 AT91RM9200_SDRAMC_MODE_PRECHARGE        (2 << 0)
-#define                 AT91RM9200_SDRAMC_MODE_LMR              (3 << 0)
-#define                 AT91RM9200_SDRAMC_MODE_REFRESH  (4 << 0)
-#define         AT91RM9200_SDRAMC_DBW           (1   << 4)              /* Data Bus Width */
-#define                 AT91RM9200_SDRAMC_DBW_32        (0 << 4)
-#define                 AT91RM9200_SDRAMC_DBW_16        (1 << 4)
-
-#define AT91RM9200_SDRAMC_TR            0x94                    /* Refresh Timer Register */
-#define         AT91RM9200_SDRAMC_COUNT (0xfff << 0)            /* Refresh Timer Count */
-
-#define AT91RM9200_SDRAMC_CR            0x98                    /* Configuration Register */
-#define         AT91RM9200_SDRAMC_NC            (3   <<  0)             /* Number of Column Bits */
-#define                 AT91RM9200_SDRAMC_NC_8  (0 << 0)
-#define                 AT91RM9200_SDRAMC_NC_9  (1 << 0)
-#define                 AT91RM9200_SDRAMC_NC_10 (2 << 0)
-#define                 AT91RM9200_SDRAMC_NC_11 (3 << 0)
-#define         AT91RM9200_SDRAMC_NR            (3   <<  2)             /* Number of Row Bits */
-#define                 AT91RM9200_SDRAMC_NR_11 (0 << 2)
-#define                 AT91RM9200_SDRAMC_NR_12 (1 << 2)
-#define                 AT91RM9200_SDRAMC_NR_13 (2 << 2)
-#define         AT91RM9200_SDRAMC_NB            (1   <<  4)             /* Number of Banks */
-#define                 AT91RM9200_SDRAMC_NB_2  (0 << 4)
-#define                 AT91RM9200_SDRAMC_NB_4  (1 << 4)
-#define         AT91RM9200_SDRAMC_CAS           (3   <<  5)             /* CAS Latency */
-#define                 AT91RM9200_SDRAMC_CAS_2 (2 << 5)
-#define         AT91RM9200_SDRAMC_TWR           (0xf <<  7)             /* Write Recovery Delay */
-#define         AT91RM9200_SDRAMC_TRC           (0xf << 11)             /* Row Cycle Delay */
-#define         AT91RM9200_SDRAMC_TRP           (0xf << 15)             /* Row Precharge Delay */
-#define         AT91RM9200_SDRAMC_TRCD  (0xf << 19)             /* Row to Column Delay */
-#define         AT91RM9200_SDRAMC_TRAS  (0xf << 23)             /* Active to Precharge Delay */
-#define         AT91RM9200_SDRAMC_TXSR  (0xf << 27)             /* Exit Self Refresh to Active Delay */
-
-#define AT91RM9200_SDRAMC_SRR           0x9c                    /* Self Refresh Register */
-#define AT91RM9200_SDRAMC_LPR           0xa0                    /* Low Power Register */
-#define AT91RM9200_SDRAMC_IER           0xa4                    /* Interrupt Enable Register */
-#define AT91RM9200_SDRAMC_IDR           0xa8                    /* Interrupt Disable Register */
-#define AT91RM9200_SDRAMC_IMR           0xac                    /* Interrupt Mask Register */
-#define AT91RM9200_SDRAMC_ISR           0xb0                    /* Interrupt Status Register */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 416c7b6c56d..9a791165913 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -78,22 +78,32 @@
 #define AT91SAM9260_BASE_ADC            0xfffe0000
 
 /*
- * System Peripherals
+ * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91SAM9260_BASE_ECC    0xffffe800
-#define AT91SAM9260_BASE_SDRAMC 0xffffea00
-#define AT91SAM9260_BASE_SMC    0xffffec00
-#define AT91SAM9260_BASE_MATRIX 0xffffee00
-#define AT91SAM9260_BASE_DBGU   AT91_BASE_DBGU0
-#define AT91SAM9260_BASE_PIOA   0xfffff400
-#define AT91SAM9260_BASE_PIOB   0xfffff600
-#define AT91SAM9260_BASE_PIOC   0xfffff800
-#define AT91SAM9260_BASE_RSTC   0xfffffd00
-#define AT91SAM9260_BASE_SHDWC  0xfffffd10
-#define AT91SAM9260_BASE_RTT    0xfffffd20
-#define AT91SAM9260_BASE_PIT    0xfffffd30
-#define AT91SAM9260_BASE_WDT    0xfffffd40
-#define AT91SAM9260_BASE_GPBR   0xfffffd50
+#define AT91_ECC        (0xffffe800 - AT91_BASE_SYS)
+#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
+#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
+#define AT91_CCFG       (0xffffef10 - AT91_BASE_SYS)
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
+#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
+#define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
+
+#define AT91_USART0     AT91SAM9260_BASE_US0
+#define AT91_USART1     AT91SAM9260_BASE_US1
+#define AT91_USART2     AT91SAM9260_BASE_US2
+#define AT91_USART3     AT91SAM9260_BASE_US3
+#define AT91_USART4     AT91SAM9260_BASE_US4
+#define AT91_USART5     AT91SAM9260_BASE_US5
 
 
 /*
@@ -106,8 +116,6 @@
 #define AT91SAM9260_SRAM0_SIZE  SZ_4K           /* Internal SRAM 0 size (4Kb) */
 #define AT91SAM9260_SRAM1_BASE  0x00300000      /* Internal SRAM 1 base address */
 #define AT91SAM9260_SRAM1_SIZE  SZ_4K           /* Internal SRAM 1 size (4Kb) */
-#define AT91SAM9260_SRAM_BASE   0x002FF000      /* Internal SRAM base address */
-#define AT91SAM9260_SRAM_SIZE   SZ_8K           /* Internal SRAM size (8Kb) */
 
 #define AT91SAM9260_UHP_BASE    0x00500000      /* USB Host controller */
 
@@ -121,8 +129,6 @@
 #define AT91SAM9G20_SRAM0_SIZE  SZ_16K          /* Internal SRAM 0 size (16Kb) */
 #define AT91SAM9G20_SRAM1_BASE  0x00300000      /* Internal SRAM 1 base address */
 #define AT91SAM9G20_SRAM1_SIZE  SZ_16K          /* Internal SRAM 1 size (16Kb) */
-#define AT91SAM9G20_SRAM_BASE   0x002FC000      /* Internal SRAM base address */
-#define AT91SAM9G20_SRAM_SIZE   SZ_32K          /* Internal SRAM size (32Kb) */
 
 #define AT91SAM9G20_UHP_BASE    0x00500000      /* USB Host controller */
 
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
index f459df42062..020f02ed921 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
@@ -15,12 +15,12 @@
 #ifndef AT91SAM9260_MATRIX_H
 #define AT91SAM9260_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
 #define         AT91_MATRIX_ULBT                (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -28,11 +28,11 @@
 #define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
 #define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
 
-#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff <<  0)    /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -43,11 +43,11 @@
 #define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
 #define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
 
-#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -55,11 +55,11 @@
 #define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
 #define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
 
-#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 
-#define AT91_MATRIX_EBICSA      0x11C                   /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x11C)   /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index a041406d06e..ce596204cef 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -63,21 +63,27 @@
 
 
 /*
- * System Peripherals
+ * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91SAM9261_BASE_SMC    0xffffec00
-#define AT91SAM9261_BASE_MATRIX 0xffffee00
-#define AT91SAM9261_BASE_SDRAMC 0xffffea00
-#define AT91SAM9261_BASE_DBGU   AT91_BASE_DBGU0
-#define AT91SAM9261_BASE_PIOA   0xfffff400
-#define AT91SAM9261_BASE_PIOB   0xfffff600
-#define AT91SAM9261_BASE_PIOC   0xfffff800
-#define AT91SAM9261_BASE_RSTC   0xfffffd00
-#define AT91SAM9261_BASE_SHDWC  0xfffffd10
-#define AT91SAM9261_BASE_RTT    0xfffffd20
-#define AT91SAM9261_BASE_PIT    0xfffffd30
-#define AT91SAM9261_BASE_WDT    0xfffffd40
-#define AT91SAM9261_BASE_GPBR   0xfffffd50
+#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
+#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
+#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
+#define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
+
+#define AT91_USART0     AT91SAM9261_BASE_US0
+#define AT91_USART1     AT91SAM9261_BASE_US1
+#define AT91_USART2     AT91SAM9261_BASE_US2
 
 
 /*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
index a50cdf8b8ca..69c6501915d 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
@@ -15,15 +15,15 @@
 #ifndef AT91SAM9261_MATRIX_H
 #define AT91SAM9261_MATRIX_H
 
-#define AT91_MATRIX_MCFG        0x00                    /* Master Configuration Register */
+#define AT91_MATRIX_MCFG        (AT91_MATRIX + 0x00)    /* Master Configuration Register */
 #define         AT91_MATRIX_RCB0        (1 << 0)                /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1        (1 << 1)                /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 
-#define AT91_MATRIX_SCFG0       0x04                    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       0x08                    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       0x0C                    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       0x10                    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       0x14                    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x04)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x08)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x0C)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x10)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x14)    /* Slave Configuration Register 4 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -31,7 +31,7 @@
 #define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
 #define         AT91_MATRIX_FIXED_DEFMSTR       (7    << 18)    /* Fixed Index of Default Master */
 
-#define AT91_MATRIX_TCR         0x24                    /* TCM Configuration Register */
+#define AT91_MATRIX_TCR         (AT91_MATRIX + 0x24)    /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_16             (5 << 0)
@@ -43,7 +43,7 @@
 #define                 AT91_MATRIX_DTCM_32             (6 << 4)
 #define                 AT91_MATRIX_DTCM_64             (7 << 4)
 
-#define AT91_MATRIX_EBICSA      0x30                    /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x30)    /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
@@ -58,7 +58,7 @@
 #define                 AT91_MATRIX_CS5A_SMC_CF2        (1 << 5)
 #define         AT91_MATRIX_DBPUC               (1 << 8)        /* Data Bus Pull-up Configuration */
 
-#define AT91_MATRIX_USBPUCR     0x34                    /* USB Pad Pull-Up Control Register */
+#define AT91_MATRIX_USBPUCR     (AT91_MATRIX + 0x34)    /* USB Pad Pull-Up Control Register */
 #define         AT91_MATRIX_USBPUCR_PUON        (1 << 30)       /* USB Device PAD Pull-up Enable */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index d201029d60b..f1b92961a2b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -72,28 +72,35 @@
 #define AT91SAM9263_BASE_2DGE           0xfffc8000
 
 /*
- * System Peripherals
+ * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91SAM9263_BASE_ECC0   0xffffe000
-#define AT91SAM9263_BASE_SDRAMC0 0xffffe200
-#define AT91SAM9263_BASE_SMC0   0xffffe400
-#define AT91SAM9263_BASE_ECC1   0xffffe600
-#define AT91SAM9263_BASE_SDRAMC1 0xffffe800
-#define AT91SAM9263_BASE_SMC1   0xffffea00
-#define AT91SAM9263_BASE_MATRIX 0xffffec00
-#define AT91SAM9263_BASE_DBGU   AT91_BASE_DBGU1
-#define AT91SAM9263_BASE_PIOA   0xfffff200
-#define AT91SAM9263_BASE_PIOB   0xfffff400
-#define AT91SAM9263_BASE_PIOC   0xfffff600
-#define AT91SAM9263_BASE_PIOD   0xfffff800
-#define AT91SAM9263_BASE_PIOE   0xfffffa00
-#define AT91SAM9263_BASE_RSTC   0xfffffd00
-#define AT91SAM9263_BASE_SHDWC  0xfffffd10
-#define AT91SAM9263_BASE_RTT0   0xfffffd20
-#define AT91SAM9263_BASE_PIT    0xfffffd30
-#define AT91SAM9263_BASE_WDT    0xfffffd40
-#define AT91SAM9263_BASE_RTT1   0xfffffd50
-#define AT91SAM9263_BASE_GPBR   0xfffffd60
+#define AT91_ECC0       (0xffffe000 - AT91_BASE_SYS)
+#define AT91_SDRAMC0    (0xffffe200 - AT91_BASE_SYS)
+#define AT91_SMC0       (0xffffe400 - AT91_BASE_SYS)
+#define AT91_ECC1       (0xffffe600 - AT91_BASE_SYS)
+#define AT91_SDRAMC1    (0xffffe800 - AT91_BASE_SYS)
+#define AT91_SMC1       (0xffffea00 - AT91_BASE_SYS)
+#define AT91_MATRIX     (0xffffec00 - AT91_BASE_SYS)
+#define AT91_CCFG       (0xffffed10 - AT91_BASE_SYS)
+#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
+#define AT91_PIOA       (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOB       (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOC       (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOD       (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PIOE       (0xfffffa00 - AT91_BASE_SYS)
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT0       (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
+#define AT91_RTT1       (0xfffffd50 - AT91_BASE_SYS)
+#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
+
+#define AT91_USART0     AT91SAM9263_BASE_US0
+#define AT91_USART1     AT91SAM9263_BASE_US1
+#define AT91_USART2     AT91SAM9263_BASE_US2
 
 #define AT91_SMC        AT91_SMC0
 
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
index ebb5fdb565e..9b3efd3eb2f 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
@@ -15,15 +15,15 @@
 #ifndef AT91SAM9263_MATRIX_H
 #define AT91SAM9263_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       0x18                    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       0x1C                    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       0x20                    /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
 #define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -31,14 +31,14 @@
 #define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
 #define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
 
-#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       0x54                    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       0x58                    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       0x5C                    /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -49,22 +49,22 @@
 #define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
 #define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
 
-#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       0x84                    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       0x8C                    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       0x94                    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       0x9C                    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       0xA4                    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       0xA8                    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       0xAC                    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       0xB0                    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       0xB4                    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       0xB8                    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       0xBC                    /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -75,7 +75,7 @@
 #define         AT91_MATRIX_M7PR                (3 << 28)       /* Master 7 Priority */
 #define         AT91_MATRIX_M8PR                (3 << 0)        /* Master 8 Priority (in Register B) */
 
-#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 #define         AT91_MATRIX_RCB2                (1 << 2)
@@ -86,7 +86,7 @@
 #define         AT91_MATRIX_RCB7                (1 << 7)
 #define         AT91_MATRIX_RCB8                (1 << 8)
 
-#define AT91_MATRIX_TCMR        0x114                   /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x114)   /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_16             (5 << 0)
@@ -96,7 +96,7 @@
 #define                 AT91_MATRIX_DTCM_16             (5 << 4)
 #define                 AT91_MATRIX_DTCM_32             (6 << 4)
 
-#define AT91_MATRIX_EBI0CSA     0x120                   /* EBI0 Chip Select Assignment Register */
+#define AT91_MATRIX_EBI0CSA     (AT91_MATRIX + 0x120)   /* EBI0 Chip Select Assignment Register */
 #define         AT91_MATRIX_EBI0_CS1A           (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_EBI0_CS1A_SMC               (0 << 1)
 #define                 AT91_MATRIX_EBI0_CS1A_SDRAMC            (1 << 1)
@@ -114,7 +114,7 @@
 #define                 AT91_MATRIX_EBI0_VDDIOMSEL_1_8V         (0 << 16)
 #define                 AT91_MATRIX_EBI0_VDDIOMSEL_3_3V         (1 << 16)
 
-#define AT91_MATRIX_EBI1CSA     0x124                   /* EBI1 Chip Select Assignment Register */
+#define AT91_MATRIX_EBI1CSA     (AT91_MATRIX + 0x124)   /* EBI1 Chip Select Assignment Register */
 #define         AT91_MATRIX_EBI1_CS1A           (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_EBI1_CS1A_SMC               (0 << 1)
 #define                 AT91_MATRIX_EBI1_CS1A_SDRAMC            (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index 0210797abf2..d27b15ba8eb 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -46,10 +46,10 @@
 #define                 AT91_DDRSDRC_CAS_25     (6 << 4)
 #define         AT91_DDRSDRC_RST_DLL    (1 << 7)                /* Reset DLL */
 #define         AT91_DDRSDRC_DICDS      (1 << 8)                /* Output impedance control */
-#define         AT91_DDRSDRC_DIS_DLL    (1 << 9)                /* Disable DLL [SAM9 Only] */
-#define         AT91_DDRSDRC_OCD        (1 << 12)               /* Off-Chip Driver [SAM9 Only] */
-#define         AT91_DDRSDRC_DQMS       (1 << 16)               /* Mask Data is Shared [SAM9 Only] */
-#define         AT91_DDRSDRC_ACTBST     (1 << 18)               /* Active Bank X to Burst Stop Read Access Bank Y [SAM9 Only] */
+#define         AT91_DDRSDRC_DIS_DLL    (1 << 9)                /* Disable DLL */
+#define         AT91_DDRSDRC_OCD        (1 << 12)               /* Off-Chip Driver */
+#define         AT91_DDRSDRC_DQMS       (1 << 16)               /* Mask Data is Shared */
+#define         AT91_DDRSDRC_ACTBST     (1 << 18)               /* Active Bank X to Burst Stop Read Access Bank Y */
 
 #define AT91_DDRSDRC_T0PR       0x0C    /* Timing 0 Register */
 #define         AT91_DDRSDRC_TRAS       (0xf <<  0)             /* Active to Precharge delay */
@@ -59,7 +59,7 @@
 #define         AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
 #define         AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
 #define         AT91_DDRSDRC_TWTR       (0x7 << 24)             /* Internal Write to Read delay */
-#define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay [SAM9 Only] */
+#define         AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay */
 #define         AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
 
 #define AT91_DDRSDRC_T1PR       0x10    /* Timing 1 Register */
@@ -68,7 +68,7 @@
 #define         AT91_DDRSDRC_TXSRD      (0xff << 16)            /* Exit self-refresh to read */
 #define         AT91_DDRSDRC_TXP        (0xf  << 24)            /* Exit power-down delay */
 
-#define AT91_DDRSDRC_T2PR       0x14    /* Timing 2 Register [SAM9 Only] */
+#define AT91_DDRSDRC_T2PR       0x14    /* Timing 2 Register */
 #define         AT91_DDRSDRC_TXARD      (0xf  << 0)             /* Exit active power down delay to read command in mode "Fast Exit" */
 #define         AT91_DDRSDRC_TXARDS     (0xf  << 4)             /* Exit active power down delay to read command in mode "Slow Exit" */
 #define         AT91_DDRSDRC_TRPA       (0xf  << 8)             /* Row Precharge All delay */
@@ -96,7 +96,7 @@
 #define                 AT91_DDRSDRC_MD_SDR             0
 #define                 AT91_DDRSDRC_MD_LOW_POWER_SDR   1
 #define                 AT91_DDRSDRC_MD_LOW_POWER_DDR   3
-#define                 AT91_DDRSDRC_MD_DDR2            6       /* [SAM9 Only] */
+#define                 AT91_DDRSDRC_MD_DDR2            6
 #define         AT91_DDRSDRC_DBW        (1 << 4)                /* Data Bus Width */
 #define                 AT91_DDRSDRC_DBW_32BITS         (0 <<  4)
 #define                 AT91_DDRSDRC_DBW_16BITS         (1 <<  4)
@@ -107,18 +107,24 @@
 #define         AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
 #define         AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
 
-#define AT91_DDRSDRC_HS         0x2C    /* High Speed Register [SAM9 Only] */
+#define AT91_DDRSDRC_HS         0x2C    /* High Speed Register */
 #define         AT91_DDRSDRC_DIS_ATCP_RD        (1 << 2)        /* Anticip read access is disabled */
 
 #define AT91_DDRSDRC_DELAY(n)   (0x30 + (0x4 * (n)))    /* Delay I/O Register n */
 
-#define AT91_DDRSDRC_WPMR       0xE4    /* Write Protect Mode Register [SAM9 Only] */
+#define AT91_DDRSDRC_WPMR       0xE4    /* Write Protect Mode Register */
 #define         AT91_DDRSDRC_WP         (1 << 0)                /* Write protect enable */
 #define         AT91_DDRSDRC_WPKEY      (0xffffff << 8)         /* Write protect key */
 #define         AT91_DDRSDRC_KEY        (0x444452 << 8)         /* Write protect key = "DDR" */
 
-#define AT91_DDRSDRC_WPSR       0xE8    /* Write Protect Status Register [SAM9 Only] */
+#define AT91_DDRSDRC_WPSR       0xE8    /* Write Protect Status Register */
 #define         AT91_DDRSDRC_WPVS       (1 << 0)                /* Write protect violation status */
 #define         AT91_DDRSDRC_WPVSRC     (0xffff << 8)           /* Write protect violation source */
 
+/* Register access macros */
+#define at91_ramc_read(num, reg) \
+        at91_sys_read(AT91_DDRSDRC##num + reg)
+#define at91_ramc_write(num, reg, value) \
+        at91_sys_write(AT91_DDRSDRC##num + reg, value)
+
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index 3d085a9a745..100f5a59292 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -82,4 +82,10 @@
 #define                 AT91_SDRAMC_MD_SDRAM            0
 #define                 AT91_SDRAMC_MD_LOW_POWER_SDRAM  1
 
+/* Register access macros */
+#define at91_ramc_read(num, reg) \
+        at91_sys_read(AT91_SDRAMC##num + reg)
+#define at91_ramc_write(num, reg, value) \
+        at91_sys_write(AT91_SDRAMC##num + reg, value)
+
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index 175e1fdd9fe..57de6207e57 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -16,38 +16,7 @@
 #ifndef AT91SAM9_SMC_H
 #define AT91SAM9_SMC_H
 
-#include <mach/cpu.h>
-
-#ifndef __ASSEMBLY__
-struct sam9_smc_config {
-        /* Setup register */
-        u8 ncs_read_setup;
-        u8 nrd_setup;
-        u8 ncs_write_setup;
-        u8 nwe_setup;
-
-        /* Pulse register */
-        u8 ncs_read_pulse;
-        u8 nrd_pulse;
-        u8 ncs_write_pulse;
-        u8 nwe_pulse;
-
-        /* Cycle register */
-        u16 read_cycle;
-        u16 write_cycle;
-
-        /* Mode register */
-        u32 mode;
-        u8 tdf_cycles:4;
-};
-
-extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);
-extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
-#endif
-
-#define AT91_SMC_SETUP          0x00                            /* Setup Register for CS n */
+#define AT91_SMC_SETUP(n)       (AT91_SMC + 0x00 + ((n)*0x10))  /* Setup Register for CS n */
 #define         AT91_SMC_NWESETUP       (0x3f << 0)                     /* NWE Setup Length */
 #define                 AT91_SMC_NWESETUP_(x)   ((x) << 0)
 #define         AT91_SMC_NCS_WRSETUP    (0x3f << 8)                     /* NCS Setup Length in Write Access */
@@ -57,7 +26,7 @@ extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
 #define         AT91_SMC_NCS_RDSETUP    (0x3f << 24)                    /* NCS Setup Length in Read Access */
 #define                 AT91_SMC_NCS_RDSETUP_(x)        ((x) << 24)
 
-#define AT91_SMC_PULSE          0x04                            /* Pulse Register for CS n */
+#define AT91_SMC_PULSE(n)       (AT91_SMC + 0x04 + ((n)*0x10))  /* Pulse Register for CS n */
 #define         AT91_SMC_NWEPULSE       (0x7f <<  0)                    /* NWE Pulse Length */
 #define                 AT91_SMC_NWEPULSE_(x)   ((x) << 0)
 #define         AT91_SMC_NCS_WRPULSE    (0x7f <<  8)                    /* NCS Pulse Length in Write Access */
@@ -67,13 +36,13 @@ extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
 #define         AT91_SMC_NCS_RDPULSE    (0x7f << 24)                    /* NCS Pulse Length in Read Access */
 #define                 AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
 
-#define AT91_SMC_CYCLE          0x08                            /* Cycle Register for CS n */
+#define AT91_SMC_CYCLE(n)       (AT91_SMC + 0x08 + ((n)*0x10))  /* Cycle Register for CS n */
 #define         AT91_SMC_NWECYCLE       (0x1ff << 0 )                   /* Total Write Cycle Length */
 #define                 AT91_SMC_NWECYCLE_(x)   ((x) << 0)
 #define         AT91_SMC_NRDCYCLE       (0x1ff << 16)                   /* Total Read Cycle Length */
 #define                 AT91_SMC_NRDCYCLE_(x)   ((x) << 16)
 
-#define AT91_SMC_MODE           0x0c                            /* Mode Register for CS n */
+#define AT91_SMC_MODE(n)        (AT91_SMC + 0x0c + ((n)*0x10))  /* Mode Register for CS n */
 #define         AT91_SMC_READMODE       (1 <<  0)                       /* Read Mode */
 #define         AT91_SMC_WRITEMODE      (1 <<  1)                       /* Write Mode */
 #define         AT91_SMC_EXNWMODE       (3 <<  4)                       /* NWAIT Mode */
@@ -97,4 +66,11 @@ extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
 #define                 AT91_SMC_PS_16                  (2 << 28)
 #define                 AT91_SMC_PS_32                  (3 << 28)
 
+#if defined(AT91_SMC1)          /* The AT91SAM9263 has 2 Static Memory contollers */
+#define AT91_SMC1_SETUP(n)      (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
+#define AT91_SMC1_PULSE(n)      (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
+#define AT91_SMC1_CYCLE(n)      (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
+#define AT91_SMC1_MODE(n)       (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
+#endif
+
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 8eba1021f53..2c611b9a013 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -84,27 +84,34 @@
 #define AT91SAM9G45_BASE_TC5            0xfffd4080
 
 /*
- * System Peripherals
+ * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91SAM9G45_BASE_ECC    0xffffe200
-#define AT91SAM9G45_BASE_DDRSDRC1 0xffffe400
-#define AT91SAM9G45_BASE_DDRSDRC0 0xffffe600
-#define AT91SAM9G45_BASE_DMA    0xffffec00
-#define AT91SAM9G45_BASE_SMC    0xffffe800
-#define AT91SAM9G45_BASE_MATRIX 0xffffea00
-#define AT91SAM9G45_BASE_DBGU   AT91_BASE_DBGU1
-#define AT91SAM9G45_BASE_PIOA   0xfffff200
-#define AT91SAM9G45_BASE_PIOB   0xfffff400
-#define AT91SAM9G45_BASE_PIOC   0xfffff600
-#define AT91SAM9G45_BASE_PIOD   0xfffff800
-#define AT91SAM9G45_BASE_PIOE   0xfffffa00
-#define AT91SAM9G45_BASE_RSTC   0xfffffd00
-#define AT91SAM9G45_BASE_SHDWC  0xfffffd10
-#define AT91SAM9G45_BASE_RTT    0xfffffd20
-#define AT91SAM9G45_BASE_PIT    0xfffffd30
-#define AT91SAM9G45_BASE_WDT    0xfffffd40
-#define AT91SAM9G45_BASE_RTC    0xfffffdb0
-#define AT91SAM9G45_BASE_GPBR   0xfffffd60
+#define AT91_ECC        (0xffffe200 - AT91_BASE_SYS)
+#define AT91_DDRSDRC1   (0xffffe400 - AT91_BASE_SYS)
+#define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
+#define AT91_SMC        (0xffffe800 - AT91_BASE_SYS)
+#define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
+#define AT91_DMA        (0xffffec00 - AT91_BASE_SYS)
+#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
+#define AT91_PIOA       (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOB       (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOC       (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOD       (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PIOE       (0xfffffa00 - AT91_BASE_SYS)
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
+#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
+#define AT91_RTC        (0xfffffdb0 - AT91_BASE_SYS)
+
+#define AT91_USART0     AT91SAM9G45_BASE_US0
+#define AT91_USART1     AT91SAM9G45_BASE_US1
+#define AT91_USART2     AT91SAM9G45_BASE_US2
+#define AT91_USART3     AT91SAM9G45_BASE_US3
 
 /*
  * Internal Memory.
@@ -121,6 +128,8 @@
 #define AT91SAM9G45_EHCI_BASE   0x00800000      /* USB Host controller (EHCI) */
 #define AT91SAM9G45_VDEC_BASE   0x00900000      /* Video Decoder Controller */
 
+#define CONSISTENT_DMA_SIZE     SZ_4M
+
 /*
  * DMA peripheral identifiers
  * for hardware handshaking interface
@@ -136,8 +145,6 @@
 #define AT_DMA_ID_SSC1_RX        8
 #define AT_DMA_ID_AC97_TX        9
 #define AT_DMA_ID_AC97_RX       10
-#define AT_DMA_ID_AES_TX        11
-#define AT_DMA_ID_AES_RX        12
 #define AT_DMA_ID_MCI1          13
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
index b76e2ed2fbc..c972d60e0ae 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
@@ -15,18 +15,18 @@
 #ifndef AT91SAM9G45_MATRIX_H
 #define AT91SAM9G45_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6       0x18                    /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7       0x1C                    /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8       0x20                    /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9       0x24                    /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10      0x28                    /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11      0x2C                    /* Master Configuration Register 11 */
+#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6       (AT91_MATRIX + 0x18)    /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7       (AT91_MATRIX + 0x1C)    /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8       (AT91_MATRIX + 0x20)    /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG9       (AT91_MATRIX + 0x24)    /* Master Configuration Register 9 */
+#define AT91_MATRIX_MCFG10      (AT91_MATRIX + 0x28)    /* Master Configuration Register 10 */
+#define AT91_MATRIX_MCFG11      (AT91_MATRIX + 0x2C)    /* Master Configuration Register 11 */
 #define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -37,14 +37,14 @@
 #define                 AT91_MATRIX_ULBT_SIXTYFOUR      (6 << 0)
 #define                 AT91_MATRIX_ULBT_128            (7 << 0)
 
-#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       0x54                    /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6       0x58                    /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7       0x5C                    /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6       (AT91_MATRIX + 0x58)    /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7       (AT91_MATRIX + 0x5C)    /* Slave Configuration Register 7 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0x1ff << 0)    /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -52,22 +52,22 @@
 #define                 AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
 #define         AT91_MATRIX_FIXED_DEFMSTR       (0xf  << 18)    /* Fixed Index of Default Master */
 
-#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0       0x84                    /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1       0x8C                    /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2       0x94                    /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3       0x9C                    /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4       0xA4                    /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5       0xA8                    /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5       0xAC                    /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6       0xB0                    /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6       0xB4                    /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7       0xB8                    /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7       0xBC                    /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0       (AT91_MATRIX + 0x84)    /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1       (AT91_MATRIX + 0x8C)    /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2       (AT91_MATRIX + 0x94)    /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3       (AT91_MATRIX + 0x9C)    /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4       (AT91_MATRIX + 0xA4)    /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5       (AT91_MATRIX + 0xAC)    /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6       (AT91_MATRIX + 0xB0)    /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6       (AT91_MATRIX + 0xB4)    /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7       (AT91_MATRIX + 0xB8)    /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7       (AT91_MATRIX + 0xBC)    /* Priority Register B for Slave 7 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -81,7 +81,7 @@
 #define         AT91_MATRIX_M10PR               (3 << 8)        /* Master 10 Priority (in Register B) */
 #define         AT91_MATRIX_M11PR               (3 << 12)       /* Master 11 Priority (in Register B) */
 
-#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 #define         AT91_MATRIX_RCB2                (1 << 2)
@@ -95,7 +95,7 @@
 #define         AT91_MATRIX_RCB10               (1 << 10)
 #define         AT91_MATRIX_RCB11               (1 << 11)
 
-#define AT91_MATRIX_TCMR        0x110                   /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x110)   /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_32             (6 << 0)
@@ -107,12 +107,12 @@
 #define                 AT91_MATRIX_TCM_NO_WS           (0x0 << 11)
 #define                 AT91_MATRIX_TCM_ONE_WS          (0x1 << 11)
 
-#define AT91_MATRIX_VIDEO       0x118                   /* Video Mode Configuration Register */
+#define AT91_MATRIX_VIDEO       (AT91_MATRIX + 0x118)   /* Video Mode Configuration Register */
 #define         AT91C_VDEC_SEL                  (0x1 <<  0) /* Video Mode Selection */
 #define                 AT91C_VDEC_SEL_OFF              (0 << 0)
 #define                 AT91C_VDEC_SEL_ON               (1 << 0)
 
-#define AT91_MATRIX_EBICSA      0x128                   /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x128)   /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
 #define                 AT91_MATRIX_EBI_CS1A_SDRAMC             (1 << 1)
@@ -138,13 +138,13 @@
 #define                 AT91_MATRIX_EBI_DDR_IOSR_REDUCED        (0 << 18)
 #define                 AT91_MATRIX_EBI_DDR_IOSR_NORMAL         (1 << 18)
 
-#define AT91_MATRIX_WPMR        0x1E4                   /* Write Protect Mode Register */
+#define AT91_MATRIX_WPMR        (AT91_MATRIX + 0x1E4)   /* Write Protect Mode Register */
 #define         AT91_MATRIX_WPMR_WPEN           (1 << 0)        /* Write Protect ENable */
 #define                 AT91_MATRIX_WPMR_WP_WPDIS               (0 << 0)
 #define                 AT91_MATRIX_WPMR_WP_WPEN                (1 << 0)
 #define         AT91_MATRIX_WPMR_WPKEY          (0xFFFFFF << 8) /* Write Protect KEY */
 
-#define AT91_MATRIX_WPSR        0x1E8                   /* Write Protect Status Register */
+#define AT91_MATRIX_WPSR        (AT91_MATRIX + 0x1E8)   /* Write Protect Status Register */
 #define         AT91_MATRIX_WPSR_WPVS           (1 << 0)        /* Write Protect Violation Status */
 #define                 AT91_MATRIX_WPSR_NO_WPV         (0 << 0)
 #define                 AT91_MATRIX_WPSR_WPV            (1 << 0)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12.h b/arch/arm/mach-at91/include/mach/at91sam9n12.h
deleted file mode 100644
index d374b87c045..00000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9n12.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * SoC specific header file for the AT91SAM9N12
- *
- * Copyright (C) 2012 Atmel Corporation
- *
- * Common definitions, based on AT91SAM9N12 SoC datasheet
- *
- * Licensed under GPLv2 or later
- */
-
-#ifndef _AT91SAM9N12_H_
-#define _AT91SAM9N12_H_
-
-/*
- * Peripheral identifiers/interrupts.
- */
-#define AT91SAM9N12_ID_PIOAB    2       /* Parallel I/O Controller A and B */
-#define AT91SAM9N12_ID_PIOCD    3       /* Parallel I/O Controller C and D */
-#define AT91SAM9N12_ID_FUSE     4       /* FUSE Controller */
-#define AT91SAM9N12_ID_USART0   5       /* USART 0 */
-#define AT91SAM9N12_ID_USART1   6       /* USART 1 */
-#define AT91SAM9N12_ID_USART2   7       /* USART 2 */
-#define AT91SAM9N12_ID_USART3   8       /* USART 3 */
-#define AT91SAM9N12_ID_TWI0     9       /* Two-Wire Interface 0 */
-#define AT91SAM9N12_ID_TWI1     10      /* Two-Wire Interface 1 */
-#define AT91SAM9N12_ID_MCI      12      /* High Speed Multimedia Card Interface */
-#define AT91SAM9N12_ID_SPI0     13      /* Serial Peripheral Interface 0 */
-#define AT91SAM9N12_ID_SPI1     14      /* Serial Peripheral Interface 1 */
-#define AT91SAM9N12_ID_UART0    15      /* UART 0 */
-#define AT91SAM9N12_ID_UART1    16      /* UART 1 */
-#define AT91SAM9N12_ID_TCB      17      /* Timer Counter 0, 1, 2, 3, 4 and 5 */
-#define AT91SAM9N12_ID_PWM      18      /* Pulse Width Modulation Controller */
-#define AT91SAM9N12_ID_ADC      19      /* ADC Controller */
-#define AT91SAM9N12_ID_DMA      20      /* DMA Controller */
-#define AT91SAM9N12_ID_UHP      22      /* USB Host High Speed */
-#define AT91SAM9N12_ID_UDP      23      /* USB Device High Speed */
-#define AT91SAM9N12_ID_LCDC     25      /* LCD Controller */
-#define AT91SAM9N12_ID_ISI      25      /* Image Sensor Interface */
-#define AT91SAM9N12_ID_SSC      28      /* Synchronous Serial Controller */
-#define AT91SAM9N12_ID_TRNG     30      /* TRNG */
-#define AT91SAM9N12_ID_IRQ0     31      /* Advanced Interrupt Controller */
-
-/*
- * User Peripheral physical base addresses.
- */
-#define AT91SAM9N12_BASE_USART0 0xf801c000
-#define AT91SAM9N12_BASE_USART1 0xf8020000
-#define AT91SAM9N12_BASE_USART2 0xf8024000
-#define AT91SAM9N12_BASE_USART3 0xf8028000
-
-/*
- * Internal Memory.
- */
-#define AT91SAM9N12_SRAM_BASE   0x00300000      /* Internal SRAM base address */
-#define AT91SAM9N12_SRAM_SIZE   SZ_32K          /* Internal SRAM size (32Kb) */
-
-#define AT91SAM9N12_ROM_BASE    0x00100000      /* Internal ROM base address */
-#define AT91SAM9N12_ROM_SIZE    SZ_128K         /* Internal ROM size (128Kb) */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
deleted file mode 100644
index 40060cd62fa..00000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9N12
- *
- * Copyright (C) 2012 Atmel Corporation.
- *
- * Only EBI related registers.
- * Write Protect register definitions may be useful.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef _AT91SAM9N12_MATRIX_H_
-#define _AT91SAM9N12_MATRIX_H_
-
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x118)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
-#define                 AT91_MATRIX_EBI_CS1A_SDRAMC             (1 << 1)
-#define         AT91_MATRIX_EBI_CS3A            (1 << 3)        /* Chip Select 3 Assignment */
-#define                 AT91_MATRIX_EBI_CS3A_SMC                (0 << 3)
-#define                 AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH      (1 << 3)
-#define         AT91_MATRIX_EBI_DBPUC           (1 << 8)        /* Data Bus Pull-up Configuration */
-#define                 AT91_MATRIX_EBI_DBPU_ON                 (0 << 8)
-#define                 AT91_MATRIX_EBI_DBPU_OFF                (1 << 8)
-#define         AT91_MATRIX_EBI_VDDIOMSEL       (1 << 16)       /* Memory voltage selection */
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_1_8V          (0 << 16)
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_3_3V          (1 << 16)
-#define         AT91_MATRIX_EBI_EBI_IOSR        (1 << 17)       /* EBI I/O slew rate selection */
-#define                 AT91_MATRIX_EBI_EBI_IOSR_REDUCED        (0 << 17)
-#define                 AT91_MATRIX_EBI_EBI_IOSR_NORMAL         (1 << 17)
-#define         AT91_MATRIX_EBI_DDR_IOSR        (1 << 18)       /* DDR2 dedicated port I/O slew rate selection */
-#define                 AT91_MATRIX_EBI_DDR_IOSR_REDUCED        (0 << 18)
-#define                 AT91_MATRIX_EBI_DDR_IOSR_NORMAL         (1 << 18)
-#define         AT91_MATRIX_NFD0_SELECT         (1 << 24)       /* NAND Flash Data Bus Selection */
-#define                 AT91_MATRIX_NFD0_ON_D0                  (0 << 24)
-#define                 AT91_MATRIX_NFD0_ON_D16                 (1 << 24)
-#define         AT91_MATRIX_DDR_MP_EN           (1 << 25)       /* DDR Multi-port Enable */
-#define                 AT91_MATRIX_MP_OFF                      (0 << 25)
-#define                 AT91_MATRIX_MP_ON                       (1 << 25)
-
-#define AT91_MATRIX_WPMR        (AT91_MATRIX + 0x1E4)   /* Write Protect Mode Register */
-#define         AT91_MATRIX_WPMR_WPEN           (1 << 0)        /* Write Protect ENable */
-#define                 AT91_MATRIX_WPMR_WP_WPDIS               (0 << 0)
-#define                 AT91_MATRIX_WPMR_WP_WPEN                (1 << 0)
-#define         AT91_MATRIX_WPMR_WPKEY          (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR        (AT91_MATRIX + 0x1E8)   /* Write Protect Status Register */
-#define         AT91_MATRIX_WPSR_WPVS           (1 << 0)        /* Write Protect Violation Status */
-#define                 AT91_MATRIX_WPSR_NO_WPV         (0 << 0)
-#define                 AT91_MATRIX_WPSR_WPV            (1 << 0)
-#define         AT91_MATRIX_WPSR_WPVSRC         (0xFFFF << 8)   /* Write Protect Violation Source */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index a15db56d33f..1aabacd315d 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,25 +69,32 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
+#define AT91_DMA        (0xffffe600 - AT91_BASE_SYS)
+#define AT91_ECC        (0xffffe800 - AT91_BASE_SYS)
+#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
+#define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
+#define AT91_CCFG       (0xffffef10 - AT91_BASE_SYS)
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
+#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PIOD       (0xfffffa00 - AT91_BASE_SYS)
+#define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_SCKCR      (0xfffffd50 - AT91_BASE_SYS)
+#define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
+#define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)
 
-#define AT91SAM9RL_BASE_DMA     0xffffe600
-#define AT91SAM9RL_BASE_ECC     0xffffe800
-#define AT91SAM9RL_BASE_SDRAMC  0xffffea00
-#define AT91SAM9RL_BASE_SMC     0xffffec00
-#define AT91SAM9RL_BASE_MATRIX  0xffffee00
-#define AT91SAM9RL_BASE_DBGU    AT91_BASE_DBGU0
-#define AT91SAM9RL_BASE_PIOA    0xfffff400
-#define AT91SAM9RL_BASE_PIOB    0xfffff600
-#define AT91SAM9RL_BASE_PIOC    0xfffff800
-#define AT91SAM9RL_BASE_PIOD    0xfffffa00
-#define AT91SAM9RL_BASE_RSTC    0xfffffd00
-#define AT91SAM9RL_BASE_SHDWC   0xfffffd10
-#define AT91SAM9RL_BASE_RTT     0xfffffd20
-#define AT91SAM9RL_BASE_PIT     0xfffffd30
-#define AT91SAM9RL_BASE_WDT     0xfffffd40
-#define AT91SAM9RL_BASE_GPBR    0xfffffd60
-#define AT91SAM9RL_BASE_RTC     0xfffffe00
+#define AT91_USART0     AT91SAM9RL_BASE_US0
+#define AT91_USART1     AT91SAM9RL_BASE_US1
+#define AT91_USART2     AT91SAM9RL_BASE_US2
+#define AT91_USART3     AT91SAM9RL_BASE_US3
 
 
 /*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
index 6d160adadaf..5f9149071fe 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
@@ -14,12 +14,12 @@
 #ifndef AT91SAM9RL_MATRIX_H
 #define AT91SAM9RL_MATRIX_H
 
-#define AT91_MATRIX_MCFG0       0x00                    /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1       0x04                    /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2       0x08                    /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3       0x0C                    /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4       0x10                    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       0x14                    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG0       (AT91_MATRIX + 0x00)    /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1       (AT91_MATRIX + 0x04)    /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
 #define         AT91_MATRIX_ULBT        (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
@@ -27,12 +27,12 @@
 #define                 AT91_MATRIX_ULBT_EIGHT          (3 << 0)
 #define                 AT91_MATRIX_ULBT_SIXTEEN        (4 << 0)
 
-#define AT91_MATRIX_SCFG0       0x40                    /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1       0x44                    /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2       0x48                    /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3       0x4C                    /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4       0x50                    /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5       0x54                    /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x40)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x44)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2       (AT91_MATRIX + 0x48)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3       (AT91_MATRIX + 0x4C)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4       (AT91_MATRIX + 0x50)    /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5       (AT91_MATRIX + 0x54)    /* Slave Configuration Register 5 */
 #define         AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
 #define         AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
 #define                 AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
@@ -43,12 +43,12 @@
 #define                 AT91_MATRIX_ARBT_ROUND_ROBIN    (0 << 24)
 #define                 AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
 
-#define AT91_MATRIX_PRAS0       0x80                    /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1       0x88                    /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2       0x90                    /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3       0x98                    /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4       0xA0                    /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRAS5       0xA8                    /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRAS0       (AT91_MATRIX + 0x80)    /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRAS1       (AT91_MATRIX + 0x88)    /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRAS2       (AT91_MATRIX + 0x90)    /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRAS3       (AT91_MATRIX + 0x98)    /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRAS4       (AT91_MATRIX + 0xA0)    /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRAS5       (AT91_MATRIX + 0xA8)    /* Priority Register A for Slave 5 */
 #define         AT91_MATRIX_M0PR                (3 << 0)        /* Master 0 Priority */
 #define         AT91_MATRIX_M1PR                (3 << 4)        /* Master 1 Priority */
 #define         AT91_MATRIX_M2PR                (3 << 8)        /* Master 2 Priority */
@@ -56,7 +56,7 @@
 #define         AT91_MATRIX_M4PR                (3 << 16)       /* Master 4 Priority */
 #define         AT91_MATRIX_M5PR                (3 << 20)       /* Master 5 Priority */
 
-#define AT91_MATRIX_MRCR        0x100                   /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR        (AT91_MATRIX + 0x100)   /* Master Remap Control Register */
 #define         AT91_MATRIX_RCB0                (1 << 0)        /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 #define         AT91_MATRIX_RCB2                (1 << 2)
@@ -64,7 +64,7 @@
 #define         AT91_MATRIX_RCB4                (1 << 4)
 #define         AT91_MATRIX_RCB5                (1 << 5)
 
-#define AT91_MATRIX_TCMR        0x114                   /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR        (AT91_MATRIX + 0x114)   /* TCM Configuration Register */
 #define         AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
 #define                 AT91_MATRIX_ITCM_0              (0 << 0)
 #define                 AT91_MATRIX_ITCM_16             (5 << 0)
@@ -74,7 +74,7 @@
 #define                 AT91_MATRIX_DTCM_16             (5 << 4)
 #define                 AT91_MATRIX_DTCM_32             (6 << 4)
 
-#define AT91_MATRIX_EBICSA      0x120                   /* EBI0 Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI0 Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
deleted file mode 100644
index c75ee19b58d..00000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Chip-specific header file for the AT91SAM9x5 family
- *
- *  Copyright (C) 2009-2012 Atmel Corporation.
- *
- * Common definitions.
- * Based on AT91SAM9x5 datasheet.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef AT91SAM9X5_H
-#define AT91SAM9X5_H
-
-/*
- * Peripheral identifiers/interrupts.
- */
-#define AT91SAM9X5_ID_PIOAB     2       /* Parallel I/O Controller A and B */
-#define AT91SAM9X5_ID_PIOCD     3       /* Parallel I/O Controller C and D */
-#define AT91SAM9X5_ID_SMD       4       /* SMD Soft Modem (SMD) */
-#define AT91SAM9X5_ID_USART0    5       /* USART 0 */
-#define AT91SAM9X5_ID_USART1    6       /* USART 1 */
-#define AT91SAM9X5_ID_USART2    7       /* USART 2 */
-#define AT91SAM9X5_ID_USART3    8       /* USART 3 */
-#define AT91SAM9X5_ID_TWI0      9       /* Two-Wire Interface 0 */
-#define AT91SAM9X5_ID_TWI1      10      /* Two-Wire Interface 1 */
-#define AT91SAM9X5_ID_TWI2      11      /* Two-Wire Interface 2 */
-#define AT91SAM9X5_ID_MCI0      12      /* High Speed Multimedia Card Interface 0 */
-#define AT91SAM9X5_ID_SPI0      13      /* Serial Peripheral Interface 0 */
-#define AT91SAM9X5_ID_SPI1      14      /* Serial Peripheral Interface 1 */
-#define AT91SAM9X5_ID_UART0     15      /* UART 0 */
-#define AT91SAM9X5_ID_UART1     16      /* UART 1 */
-#define AT91SAM9X5_ID_TCB       17      /* Timer Counter 0, 1, 2, 3, 4 and 5 */
-#define AT91SAM9X5_ID_PWM       18      /* Pulse Width Modulation Controller */
-#define AT91SAM9X5_ID_ADC       19      /* ADC Controller */
-#define AT91SAM9X5_ID_DMA0      20      /* DMA Controller 0 */
-#define AT91SAM9X5_ID_DMA1      21      /* DMA Controller 1 */
-#define AT91SAM9X5_ID_UHPHS     22      /* USB Host High Speed */
-#define AT91SAM9X5_ID_UDPHS     23      /* USB Device High Speed */
-#define AT91SAM9X5_ID_EMAC0     24      /* Ethernet MAC0 */
-#define AT91SAM9X5_ID_LCDC      25      /* LCD Controller */
-#define AT91SAM9X5_ID_ISI       25      /* Image Sensor Interface */
-#define AT91SAM9X5_ID_MCI1      26      /* High Speed Multimedia Card Interface 1 */
-#define AT91SAM9X5_ID_EMAC1     27      /* Ethernet MAC1 */
-#define AT91SAM9X5_ID_SSC       28      /* Synchronous Serial Controller */
-#define AT91SAM9X5_ID_CAN0      29      /* CAN Controller 0 */
-#define AT91SAM9X5_ID_CAN1      30      /* CAN Controller 1 */
-#define AT91SAM9X5_ID_IRQ0      31      /* Advanced Interrupt Controller */
-
-/*
- * User Peripheral physical base addresses.
- */
-#define AT91SAM9X5_BASE_USART0  0xf801c000
-#define AT91SAM9X5_BASE_USART1  0xf8020000
-#define AT91SAM9X5_BASE_USART2  0xf8024000
-
-/*
- * Internal Memory.
- */
-#define AT91SAM9X5_SRAM_BASE    0x00300000      /* Internal SRAM base address */
-#define AT91SAM9X5_SRAM_SIZE    SZ_32K          /* Internal SRAM size (32Kb) */
-
-#define AT91SAM9X5_ROM_BASE     0x00400000      /* Internal ROM base address */
-#define AT91SAM9X5_ROM_SIZE     SZ_64K          /* Internal ROM size (64Kb) */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
deleted file mode 100644
index a606d396647..00000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9x5 family
- *
- *  Copyright (C) 2009-2012 Atmel Corporation.
- *
- * Only EBI related registers.
- * Write Protect register definitions may be useful.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef AT91SAM9X5_MATRIX_H
-#define AT91SAM9X5_MATRIX_H
-
-#define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x120)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_EBI_CS1A            (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_EBI_CS1A_SMC                (0 << 1)
-#define                 AT91_MATRIX_EBI_CS1A_SDRAMC             (1 << 1)
-#define         AT91_MATRIX_EBI_CS3A            (1 << 3)        /* Chip Select 3 Assignment */
-#define                 AT91_MATRIX_EBI_CS3A_SMC                (0 << 3)
-#define                 AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH      (1 << 3)
-#define         AT91_MATRIX_EBI_DBPUC           (1 << 8)        /* Data Bus Pull-up Configuration */
-#define                 AT91_MATRIX_EBI_DBPU_ON                 (0 << 8)
-#define                 AT91_MATRIX_EBI_DBPU_OFF                (1 << 8)
-#define         AT91_MATRIX_EBI_VDDIOMSEL       (1 << 16)       /* Memory voltage selection */
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_1_8V          (0 << 16)
-#define                 AT91_MATRIX_EBI_VDDIOMSEL_3_3V          (1 << 16)
-#define         AT91_MATRIX_EBI_EBI_IOSR        (1 << 17)       /* EBI I/O slew rate selection */
-#define                 AT91_MATRIX_EBI_EBI_IOSR_REDUCED        (0 << 17)
-#define                 AT91_MATRIX_EBI_EBI_IOSR_NORMAL         (1 << 17)
-#define         AT91_MATRIX_EBI_DDR_IOSR        (1 << 18)       /* DDR2 dedicated port I/O slew rate selection */
-#define                 AT91_MATRIX_EBI_DDR_IOSR_REDUCED        (0 << 18)
-#define                 AT91_MATRIX_EBI_DDR_IOSR_NORMAL         (1 << 18)
-#define         AT91_MATRIX_NFD0_SELECT         (1 << 24)       /* NAND Flash Data Bus Selection */
-#define                 AT91_MATRIX_NFD0_ON_D0                  (0 << 24)
-#define                 AT91_MATRIX_NFD0_ON_D16                 (1 << 24)
-#define         AT91_MATRIX_DDR_MP_EN           (1 << 25)       /* DDR Multi-port Enable */
-#define                 AT91_MATRIX_MP_OFF                      (0 << 25)
-#define                 AT91_MATRIX_MP_ON                       (1 << 25)
-
-#define AT91_MATRIX_WPMR        (AT91_MATRIX + 0x1E4)   /* Write Protect Mode Register */
-#define         AT91_MATRIX_WPMR_WPEN           (1 << 0)        /* Write Protect ENable */
-#define                 AT91_MATRIX_WPMR_WP_WPDIS               (0 << 0)
-#define                 AT91_MATRIX_WPMR_WP_WPEN                (1 << 0)
-#define         AT91_MATRIX_WPMR_WPKEY          (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR        (AT91_MATRIX + 0x1E8)   /* Write Protect Status Register */
-#define         AT91_MATRIX_WPSR_WPVS           (1 << 0)        /* Write Protect Violation Status */
-#define                 AT91_MATRIX_WPSR_NO_WPV         (0 << 0)
-#define                 AT91_MATRIX_WPSR_WPV            (1 << 0)
-#define         AT91_MATRIX_WPSR_WPVSRC         (0xFFFF << 8)   /* Write Protect Violation Source */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index 90680217064..a152ff87e68 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -28,18 +28,19 @@
 #define AT91X40_ID_IRQ2         18      /* External IRQ 2 */
 
 /*
- * System Peripherals
+ * System Peripherals (offset from AT91_BASE_SYS)
  */
 #define AT91_BASE_SYS   0xffc00000
 
-#define AT91_EBI        0xffe00000      /* External Bus Interface */
-#define AT91_SF         0xfff00000      /* Special Function */
-#define AT91_USART1     0xfffcc000      /* USART 1 */
-#define AT91_USART0     0xfffd0000      /* USART 0 */
-#define AT91_TC         0xfffe0000      /* Timer Counter */
-#define AT91_PIOA       0xffff0000      /* PIO Controller A */
-#define AT91_PS         0xffff4000      /* Power Save */
-#define AT91_WD         0xffff8000      /* Watchdog Timer */
+#define AT91_EBI        (0xffe00000 - AT91_BASE_SYS)    /* External Bus Interface */
+#define AT91_SF         (0xfff00000 - AT91_BASE_SYS)    /* Special Function */
+#define AT91_USART1     (0xfffcc000 - AT91_BASE_SYS)    /* USART 1 */
+#define AT91_USART0     (0xfffd0000 - AT91_BASE_SYS)    /* USART 0 */
+#define AT91_TC         (0xfffe0000 - AT91_BASE_SYS)    /* Timer Counter */
+#define AT91_PIOA       (0xffff0000 - AT91_BASE_SYS)    /* PIO Controller A */
+#define AT91_PS         (0xffff4000 - AT91_BASE_SYS)    /* Power Save */
+#define AT91_WD         (0xffff8000 - AT91_BASE_SYS)    /* Watchdog Timer */
+#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)    /* Advanced Interrupt Controller */
 
 /*
  * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
diff --git a/arch/arm/mach-at91/include/mach/atmel-mci.h b/arch/arm/mach-at91/include/mach/atmel-mci.h
index 3069e413557..998cb0c0713 100644
--- a/arch/arm/mach-at91/include/mach/atmel-mci.h
+++ b/arch/arm/mach-at91/include/mach/atmel-mci.h
@@ -1,7 +1,7 @@
 #ifndef __MACH_ATMEL_MCI_H
 #define __MACH_ATMEL_MCI_H
 
-#include <linux/platform_data/dma-atmel.h>
+#include <mach/at_hdmac.h>
 
 /**
  * struct mci_dma_data - DMA data for MCI interface
@@ -14,4 +14,11 @@ struct mci_dma_data {
 #define slave_data_ptr(s)       (&(s)->sdata)
 #define find_slave_dev(s)       ((s)->sdata.dma_dev)
 
+#define setup_dma_addr(s, t, r) do {            \
+        if (s) {                                \
+                (s)->sdata.tx_reg = (t);        \
+                (s)->sdata.rx_reg = (r);        \
+        }                                       \
+} while (0)
+
 #endif /* __MACH_ATMEL_MCI_H */
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index b6504c19d55..f6ce936dba2 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -25,7 +25,7 @@
 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
 #define ARCH_ID_AT91SAM9X5      0x819a05a0
-#define ARCH_ID_AT91SAM9N12     0x819a07a0
+#define ARCH_ID_AT91CAP9        0x039A03A0
 
 #define ARCH_ID_AT91SAM9XE128   0x329973a0
 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
@@ -51,15 +51,21 @@
 #define ARCH_FAMILY_AT91SAM9    0x01900000
 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
 
+/* PMC revision */
+#define ARCH_REVISION_CAP9_B    0x399
+#define ARCH_REVISION_CAP9_C    0x601
+
 /* RM9200 type */
 #define ARCH_REVISON_9200_BGA   (0 << 0)
 #define ARCH_REVISON_9200_PQFP  (1 << 0)
 
-#ifndef __ASSEMBLY__
 enum at91_soc_type {
         /* 920T */
         AT91_SOC_RM9200,
 
+        /* CAP */
+        AT91_SOC_CAP9,
+
         /* SAM92xx */
         AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
 
@@ -72,9 +78,6 @@ enum at91_soc_type {
         /* SAM9X5 */
         AT91_SOC_SAM9X5,
 
-        /* SAM9N12 */
-        AT91_SOC_SAM9N12,
-
         /* Unknown type */
         AT91_SOC_NONE
 };
@@ -83,6 +86,9 @@ enum at91_soc_subtype {
         /* RM9200 */
         AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
 
+        /* CAP9 */
+        AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C,
+
         /* SAM9260 */
         AT91_SOC_SAM9XE,
 
@@ -111,7 +117,7 @@ static inline int at91_soc_is_detected(void)
         return at91_soc_initdata.type != AT91_SOC_NONE;
 }
 
-#ifdef CONFIG_SOC_AT91RM9200
+#ifdef CONFIG_ARCH_AT91RM9200
 #define cpu_is_at91rm9200()     (at91_soc_initdata.type == AT91_SOC_RM9200)
 #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
 #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
@@ -121,37 +127,45 @@ static inline int at91_soc_is_detected(void)
 #define cpu_is_at91rm9200_pqfp() (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9260
+#ifdef CONFIG_ARCH_AT91SAM9260
 #define cpu_is_at91sam9xe()     (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
 #define cpu_is_at91sam9260()    (at91_soc_initdata.type == AT91_SOC_SAM9260)
-#define cpu_is_at91sam9g20()    (at91_soc_initdata.type == AT91_SOC_SAM9G20)
 #else
 #define cpu_is_at91sam9xe()     (0)
 #define cpu_is_at91sam9260()    (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G20
+#define cpu_is_at91sam9g20()    (at91_soc_initdata.type == AT91_SOC_SAM9G20)
+#else
 #define cpu_is_at91sam9g20()    (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9261
+#ifdef CONFIG_ARCH_AT91SAM9261
 #define cpu_is_at91sam9261()    (at91_soc_initdata.type == AT91_SOC_SAM9261)
-#define cpu_is_at91sam9g10()    (at91_soc_initdata.type == AT91_SOC_SAM9G10)
 #else
 #define cpu_is_at91sam9261()    (0)
+#endif
+
+#ifdef CONFIG_ARCH_AT91SAM9G10
+#define cpu_is_at91sam9g10()    (at91_soc_initdata.type == AT91_SOC_SAM9G10)
+#else
 #define cpu_is_at91sam9g10()    (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9263
+#ifdef CONFIG_ARCH_AT91SAM9263
 #define cpu_is_at91sam9263()    (at91_soc_initdata.type == AT91_SOC_SAM9263)
 #else
 #define cpu_is_at91sam9263()    (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9RL
+#ifdef CONFIG_ARCH_AT91SAM9RL
 #define cpu_is_at91sam9rl()     (at91_soc_initdata.type == AT91_SOC_SAM9RL)
 #else
 #define cpu_is_at91sam9rl()     (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9G45
+#ifdef CONFIG_ARCH_AT91SAM9G45
 #define cpu_is_at91sam9g45()    (at91_soc_initdata.type == AT91_SOC_SAM9G45)
 #define cpu_is_at91sam9g45es()  (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
 #define cpu_is_at91sam9m10()    (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
@@ -165,7 +179,7 @@ static inline int at91_soc_is_detected(void)
 #define cpu_is_at91sam9m11()    (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9X5
+#ifdef CONFIG_ARCH_AT91SAM9X5
 #define cpu_is_at91sam9x5()     (at91_soc_initdata.type == AT91_SOC_SAM9X5)
 #define cpu_is_at91sam9g15()    (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
 #define cpu_is_at91sam9g35()    (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
@@ -181,10 +195,14 @@ static inline int at91_soc_is_detected(void)
 #define cpu_is_at91sam9x25()    (0)
 #endif
 
-#ifdef CONFIG_SOC_AT91SAM9N12
-#define cpu_is_at91sam9n12()    (at91_soc_initdata.type == AT91_SOC_SAM9N12)
+#ifdef CONFIG_ARCH_AT91CAP9
+#define cpu_is_at91cap9()       (at91_soc_initdata.type == AT91_SOC_CAP9)
+#define cpu_is_at91cap9_revB()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B)
+#define cpu_is_at91cap9_revC()  (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C)
 #else
-#define cpu_is_at91sam9n12()    (0)
+#define cpu_is_at91cap9()       (0)
+#define cpu_is_at91cap9_revB()  (0)
+#define cpu_is_at91cap9_revC()  (0)
 #endif
 
 /*
@@ -192,6 +210,5 @@ static inline int at91_soc_is_detected(void)
  * definitions may reduce clutter in common drivers.
  */
 #define cpu_is_at32ap7000()     (0)
-#endif /* __ASSEMBLY__ */
 
 #endif /* __MACH_CPU_H__ */
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index c6bb9e2d9ba..bc1e0b2e2f4 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,15 +14,9 @@
 #include <mach/hardware.h>
 #include <mach/at91_dbgu.h>
 
-#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
-#define AT91_DBGU AT91_BASE_DBGU0
-#else
-#define AT91_DBGU AT91_BASE_DBGU1
-#endif
-
-        .macro  addruart, rp, rv, tmp
-        ldr     \rp, =AT91_DBGU                         @ System peripherals (phys address)
-        ldr     \rv, =AT91_IO_P2V(AT91_DBGU)            @ System peripherals (virt address)
+        .macro  addruart, rp, rv
+        ldr     \rp, =(AT91_BASE_SYS + AT91_DBGU)       @ System peripherals (phys address)
+        ldr     \rv, =(AT91_VA_BASE_SYS + AT91_DBGU)    @ System peripherals (virt address)
         .endm
 
         .macro  senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index eed465ab0dd..056dc6674b6 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -16,190 +16,187 @@
 #include <linux/kernel.h>
 #include <asm/irq.h>
 
+#define PIN_BASE                NR_AIC_IRQS
+
 #define MAX_GPIO_BANKS          5
-#define NR_BUILTIN_GPIO         (MAX_GPIO_BANKS * 32)
+#define NR_BUILTIN_GPIO         (PIN_BASE + (MAX_GPIO_BANKS * 32))
 
 /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
 
-#define AT91_PIN_PA0    (0x00 + 0)
-#define AT91_PIN_PA1    (0x00 + 1)
-#define AT91_PIN_PA2    (0x00 + 2)
-#define AT91_PIN_PA3    (0x00 + 3)
-#define AT91_PIN_PA4    (0x00 + 4)
-#define AT91_PIN_PA5    (0x00 + 5)
-#define AT91_PIN_PA6    (0x00 + 6)
-#define AT91_PIN_PA7    (0x00 + 7)
-#define AT91_PIN_PA8    (0x00 + 8)
-#define AT91_PIN_PA9    (0x00 + 9)
-#define AT91_PIN_PA10   (0x00 + 10)
-#define AT91_PIN_PA11   (0x00 + 11)
-#define AT91_PIN_PA12   (0x00 + 12)
-#define AT91_PIN_PA13   (0x00 + 13)
-#define AT91_PIN_PA14   (0x00 + 14)
-#define AT91_PIN_PA15   (0x00 + 15)
-#define AT91_PIN_PA16   (0x00 + 16)
-#define AT91_PIN_PA17   (0x00 + 17)
-#define AT91_PIN_PA18   (0x00 + 18)
-#define AT91_PIN_PA19   (0x00 + 19)
-#define AT91_PIN_PA20   (0x00 + 20)
-#define AT91_PIN_PA21   (0x00 + 21)
-#define AT91_PIN_PA22   (0x00 + 22)
-#define AT91_PIN_PA23   (0x00 + 23)
-#define AT91_PIN_PA24   (0x00 + 24)
-#define AT91_PIN_PA25   (0x00 + 25)
-#define AT91_PIN_PA26   (0x00 + 26)
-#define AT91_PIN_PA27   (0x00 + 27)
-#define AT91_PIN_PA28   (0x00 + 28)
-#define AT91_PIN_PA29   (0x00 + 29)
-#define AT91_PIN_PA30   (0x00 + 30)
-#define AT91_PIN_PA31   (0x00 + 31)
-
-#define AT91_PIN_PB0    (0x20 + 0)
-#define AT91_PIN_PB1    (0x20 + 1)
-#define AT91_PIN_PB2    (0x20 + 2)
-#define AT91_PIN_PB3    (0x20 + 3)
-#define AT91_PIN_PB4    (0x20 + 4)
-#define AT91_PIN_PB5    (0x20 + 5)
-#define AT91_PIN_PB6    (0x20 + 6)
-#define AT91_PIN_PB7    (0x20 + 7)
-#define AT91_PIN_PB8    (0x20 + 8)
-#define AT91_PIN_PB9    (0x20 + 9)
-#define AT91_PIN_PB10   (0x20 + 10)
-#define AT91_PIN_PB11   (0x20 + 11)
-#define AT91_PIN_PB12   (0x20 + 12)
-#define AT91_PIN_PB13   (0x20 + 13)
-#define AT91_PIN_PB14   (0x20 + 14)
-#define AT91_PIN_PB15   (0x20 + 15)
-#define AT91_PIN_PB16   (0x20 + 16)
-#define AT91_PIN_PB17   (0x20 + 17)
-#define AT91_PIN_PB18   (0x20 + 18)
-#define AT91_PIN_PB19   (0x20 + 19)
-#define AT91_PIN_PB20   (0x20 + 20)
-#define AT91_PIN_PB21   (0x20 + 21)
-#define AT91_PIN_PB22   (0x20 + 22)
-#define AT91_PIN_PB23   (0x20 + 23)
-#define AT91_PIN_PB24   (0x20 + 24)
-#define AT91_PIN_PB25   (0x20 + 25)
-#define AT91_PIN_PB26   (0x20 + 26)
-#define AT91_PIN_PB27   (0x20 + 27)
-#define AT91_PIN_PB28   (0x20 + 28)
-#define AT91_PIN_PB29   (0x20 + 29)
-#define AT91_PIN_PB30   (0x20 + 30)
-#define AT91_PIN_PB31   (0x20 + 31)
-
-#define AT91_PIN_PC0    (0x40 + 0)
-#define AT91_PIN_PC1    (0x40 + 1)
-#define AT91_PIN_PC2    (0x40 + 2)
-#define AT91_PIN_PC3    (0x40 + 3)
-#define AT91_PIN_PC4    (0x40 + 4)
-#define AT91_PIN_PC5    (0x40 + 5)
-#define AT91_PIN_PC6    (0x40 + 6)
-#define AT91_PIN_PC7    (0x40 + 7)
-#define AT91_PIN_PC8    (0x40 + 8)
-#define AT91_PIN_PC9    (0x40 + 9)
-#define AT91_PIN_PC10   (0x40 + 10)
-#define AT91_PIN_PC11   (0x40 + 11)
-#define AT91_PIN_PC12   (0x40 + 12)
-#define AT91_PIN_PC13   (0x40 + 13)
-#define AT91_PIN_PC14   (0x40 + 14)
-#define AT91_PIN_PC15   (0x40 + 15)
-#define AT91_PIN_PC16   (0x40 + 16)
-#define AT91_PIN_PC17   (0x40 + 17)
-#define AT91_PIN_PC18   (0x40 + 18)
-#define AT91_PIN_PC19   (0x40 + 19)
-#define AT91_PIN_PC20   (0x40 + 20)
-#define AT91_PIN_PC21   (0x40 + 21)
-#define AT91_PIN_PC22   (0x40 + 22)
-#define AT91_PIN_PC23   (0x40 + 23)
-#define AT91_PIN_PC24   (0x40 + 24)
-#define AT91_PIN_PC25   (0x40 + 25)
-#define AT91_PIN_PC26   (0x40 + 26)
-#define AT91_PIN_PC27   (0x40 + 27)
-#define AT91_PIN_PC28   (0x40 + 28)
-#define AT91_PIN_PC29   (0x40 + 29)
-#define AT91_PIN_PC30   (0x40 + 30)
-#define AT91_PIN_PC31   (0x40 + 31)
-
-#define AT91_PIN_PD0    (0x60 + 0)
-#define AT91_PIN_PD1    (0x60 + 1)
-#define AT91_PIN_PD2    (0x60 + 2)
-#define AT91_PIN_PD3    (0x60 + 3)
-#define AT91_PIN_PD4    (0x60 + 4)
-#define AT91_PIN_PD5    (0x60 + 5)
-#define AT91_PIN_PD6    (0x60 + 6)
-#define AT91_PIN_PD7    (0x60 + 7)
-#define AT91_PIN_PD8    (0x60 + 8)
-#define AT91_PIN_PD9    (0x60 + 9)
-#define AT91_PIN_PD10   (0x60 + 10)
-#define AT91_PIN_PD11   (0x60 + 11)
-#define AT91_PIN_PD12   (0x60 + 12)
-#define AT91_PIN_PD13   (0x60 + 13)
-#define AT91_PIN_PD14   (0x60 + 14)
-#define AT91_PIN_PD15   (0x60 + 15)
-#define AT91_PIN_PD16   (0x60 + 16)
-#define AT91_PIN_PD17   (0x60 + 17)
-#define AT91_PIN_PD18   (0x60 + 18)
-#define AT91_PIN_PD19   (0x60 + 19)
-#define AT91_PIN_PD20   (0x60 + 20)
-#define AT91_PIN_PD21   (0x60 + 21)
-#define AT91_PIN_PD22   (0x60 + 22)
-#define AT91_PIN_PD23   (0x60 + 23)
-#define AT91_PIN_PD24   (0x60 + 24)
-#define AT91_PIN_PD25   (0x60 + 25)
-#define AT91_PIN_PD26   (0x60 + 26)
-#define AT91_PIN_PD27   (0x60 + 27)
-#define AT91_PIN_PD28   (0x60 + 28)
-#define AT91_PIN_PD29   (0x60 + 29)
-#define AT91_PIN_PD30   (0x60 + 30)
-#define AT91_PIN_PD31   (0x60 + 31)
-
-#define AT91_PIN_PE0    (0x80 + 0)
-#define AT91_PIN_PE1    (0x80 + 1)
-#define AT91_PIN_PE2    (0x80 + 2)
-#define AT91_PIN_PE3    (0x80 + 3)
-#define AT91_PIN_PE4    (0x80 + 4)
-#define AT91_PIN_PE5    (0x80 + 5)
-#define AT91_PIN_PE6    (0x80 + 6)
-#define AT91_PIN_PE7    (0x80 + 7)
-#define AT91_PIN_PE8    (0x80 + 8)
-#define AT91_PIN_PE9    (0x80 + 9)
-#define AT91_PIN_PE10   (0x80 + 10)
-#define AT91_PIN_PE11   (0x80 + 11)
-#define AT91_PIN_PE12   (0x80 + 12)
-#define AT91_PIN_PE13   (0x80 + 13)
-#define AT91_PIN_PE14   (0x80 + 14)
-#define AT91_PIN_PE15   (0x80 + 15)
-#define AT91_PIN_PE16   (0x80 + 16)
-#define AT91_PIN_PE17   (0x80 + 17)
-#define AT91_PIN_PE18   (0x80 + 18)
-#define AT91_PIN_PE19   (0x80 + 19)
-#define AT91_PIN_PE20   (0x80 + 20)
-#define AT91_PIN_PE21   (0x80 + 21)
-#define AT91_PIN_PE22   (0x80 + 22)
-#define AT91_PIN_PE23   (0x80 + 23)
-#define AT91_PIN_PE24   (0x80 + 24)
-#define AT91_PIN_PE25   (0x80 + 25)
-#define AT91_PIN_PE26   (0x80 + 26)
-#define AT91_PIN_PE27   (0x80 + 27)
-#define AT91_PIN_PE28   (0x80 + 28)
-#define AT91_PIN_PE29   (0x80 + 29)
-#define AT91_PIN_PE30   (0x80 + 30)
-#define AT91_PIN_PE31   (0x80 + 31)
+#define AT91_PIN_PA0    (PIN_BASE + 0x00 + 0)
+#define AT91_PIN_PA1    (PIN_BASE + 0x00 + 1)
+#define AT91_PIN_PA2    (PIN_BASE + 0x00 + 2)
+#define AT91_PIN_PA3    (PIN_BASE + 0x00 + 3)
+#define AT91_PIN_PA4    (PIN_BASE + 0x00 + 4)
+#define AT91_PIN_PA5    (PIN_BASE + 0x00 + 5)
+#define AT91_PIN_PA6    (PIN_BASE + 0x00 + 6)
+#define AT91_PIN_PA7    (PIN_BASE + 0x00 + 7)
+#define AT91_PIN_PA8    (PIN_BASE + 0x00 + 8)
+#define AT91_PIN_PA9    (PIN_BASE + 0x00 + 9)
+#define AT91_PIN_PA10   (PIN_BASE + 0x00 + 10)
+#define AT91_PIN_PA11   (PIN_BASE + 0x00 + 11)
+#define AT91_PIN_PA12   (PIN_BASE + 0x00 + 12)
+#define AT91_PIN_PA13   (PIN_BASE + 0x00 + 13)
+#define AT91_PIN_PA14   (PIN_BASE + 0x00 + 14)
+#define AT91_PIN_PA15   (PIN_BASE + 0x00 + 15)
+#define AT91_PIN_PA16   (PIN_BASE + 0x00 + 16)
+#define AT91_PIN_PA17   (PIN_BASE + 0x00 + 17)
+#define AT91_PIN_PA18   (PIN_BASE + 0x00 + 18)
+#define AT91_PIN_PA19   (PIN_BASE + 0x00 + 19)
+#define AT91_PIN_PA20   (PIN_BASE + 0x00 + 20)
+#define AT91_PIN_PA21   (PIN_BASE + 0x00 + 21)
+#define AT91_PIN_PA22   (PIN_BASE + 0x00 + 22)
+#define AT91_PIN_PA23   (PIN_BASE + 0x00 + 23)
+#define AT91_PIN_PA24   (PIN_BASE + 0x00 + 24)
+#define AT91_PIN_PA25   (PIN_BASE + 0x00 + 25)
+#define AT91_PIN_PA26   (PIN_BASE + 0x00 + 26)
+#define AT91_PIN_PA27   (PIN_BASE + 0x00 + 27)
+#define AT91_PIN_PA28   (PIN_BASE + 0x00 + 28)
+#define AT91_PIN_PA29   (PIN_BASE + 0x00 + 29)
+#define AT91_PIN_PA30   (PIN_BASE + 0x00 + 30)
+#define AT91_PIN_PA31   (PIN_BASE + 0x00 + 31)
+
+#define AT91_PIN_PB0    (PIN_BASE + 0x20 + 0)
+#define AT91_PIN_PB1    (PIN_BASE + 0x20 + 1)
+#define AT91_PIN_PB2    (PIN_BASE + 0x20 + 2)
+#define AT91_PIN_PB3    (PIN_BASE + 0x20 + 3)
+#define AT91_PIN_PB4    (PIN_BASE + 0x20 + 4)
+#define AT91_PIN_PB5    (PIN_BASE + 0x20 + 5)
+#define AT91_PIN_PB6    (PIN_BASE + 0x20 + 6)
+#define AT91_PIN_PB7    (PIN_BASE + 0x20 + 7)
+#define AT91_PIN_PB8    (PIN_BASE + 0x20 + 8)
+#define AT91_PIN_PB9    (PIN_BASE + 0x20 + 9)
+#define AT91_PIN_PB10   (PIN_BASE + 0x20 + 10)
+#define AT91_PIN_PB11   (PIN_BASE + 0x20 + 11)
+#define AT91_PIN_PB12   (PIN_BASE + 0x20 + 12)
+#define AT91_PIN_PB13   (PIN_BASE + 0x20 + 13)
+#define AT91_PIN_PB14   (PIN_BASE + 0x20 + 14)
+#define AT91_PIN_PB15   (PIN_BASE + 0x20 + 15)
+#define AT91_PIN_PB16   (PIN_BASE + 0x20 + 16)
+#define AT91_PIN_PB17   (PIN_BASE + 0x20 + 17)
+#define AT91_PIN_PB18   (PIN_BASE + 0x20 + 18)
+#define AT91_PIN_PB19   (PIN_BASE + 0x20 + 19)
+#define AT91_PIN_PB20   (PIN_BASE + 0x20 + 20)
+#define AT91_PIN_PB21   (PIN_BASE + 0x20 + 21)
+#define AT91_PIN_PB22   (PIN_BASE + 0x20 + 22)
+#define AT91_PIN_PB23   (PIN_BASE + 0x20 + 23)
+#define AT91_PIN_PB24   (PIN_BASE + 0x20 + 24)
+#define AT91_PIN_PB25   (PIN_BASE + 0x20 + 25)
+#define AT91_PIN_PB26   (PIN_BASE + 0x20 + 26)
+#define AT91_PIN_PB27   (PIN_BASE + 0x20 + 27)
+#define AT91_PIN_PB28   (PIN_BASE + 0x20 + 28)
+#define AT91_PIN_PB29   (PIN_BASE + 0x20 + 29)
+#define AT91_PIN_PB30   (PIN_BASE + 0x20 + 30)
+#define AT91_PIN_PB31   (PIN_BASE + 0x20 + 31)
+
+#define AT91_PIN_PC0    (PIN_BASE + 0x40 + 0)
+#define AT91_PIN_PC1    (PIN_BASE + 0x40 + 1)
+#define AT91_PIN_PC2    (PIN_BASE + 0x40 + 2)
+#define AT91_PIN_PC3    (PIN_BASE + 0x40 + 3)
+#define AT91_PIN_PC4    (PIN_BASE + 0x40 + 4)
+#define AT91_PIN_PC5    (PIN_BASE + 0x40 + 5)
+#define AT91_PIN_PC6    (PIN_BASE + 0x40 + 6)
+#define AT91_PIN_PC7    (PIN_BASE + 0x40 + 7)
+#define AT91_PIN_PC8    (PIN_BASE + 0x40 + 8)
+#define AT91_PIN_PC9    (PIN_BASE + 0x40 + 9)
+#define AT91_PIN_PC10   (PIN_BASE + 0x40 + 10)
+#define AT91_PIN_PC11   (PIN_BASE + 0x40 + 11)
+#define AT91_PIN_PC12   (PIN_BASE + 0x40 + 12)
+#define AT91_PIN_PC13   (PIN_BASE + 0x40 + 13)
+#define AT91_PIN_PC14   (PIN_BASE + 0x40 + 14)
+#define AT91_PIN_PC15   (PIN_BASE + 0x40 + 15)
+#define AT91_PIN_PC16   (PIN_BASE + 0x40 + 16)
+#define AT91_PIN_PC17   (PIN_BASE + 0x40 + 17)
+#define AT91_PIN_PC18   (PIN_BASE + 0x40 + 18)
+#define AT91_PIN_PC19   (PIN_BASE + 0x40 + 19)
+#define AT91_PIN_PC20   (PIN_BASE + 0x40 + 20)
+#define AT91_PIN_PC21   (PIN_BASE + 0x40 + 21)
+#define AT91_PIN_PC22   (PIN_BASE + 0x40 + 22)
+#define AT91_PIN_PC23   (PIN_BASE + 0x40 + 23)
+#define AT91_PIN_PC24   (PIN_BASE + 0x40 + 24)
+#define AT91_PIN_PC25   (PIN_BASE + 0x40 + 25)
+#define AT91_PIN_PC26   (PIN_BASE + 0x40 + 26)
+#define AT91_PIN_PC27   (PIN_BASE + 0x40 + 27)
+#define AT91_PIN_PC28   (PIN_BASE + 0x40 + 28)
+#define AT91_PIN_PC29   (PIN_BASE + 0x40 + 29)
+#define AT91_PIN_PC30   (PIN_BASE + 0x40 + 30)
+#define AT91_PIN_PC31   (PIN_BASE + 0x40 + 31)
+
+#define AT91_PIN_PD0    (PIN_BASE + 0x60 + 0)
+#define AT91_PIN_PD1    (PIN_BASE + 0x60 + 1)
+#define AT91_PIN_PD2    (PIN_BASE + 0x60 + 2)
+#define AT91_PIN_PD3    (PIN_BASE + 0x60 + 3)
+#define AT91_PIN_PD4    (PIN_BASE + 0x60 + 4)
+#define AT91_PIN_PD5    (PIN_BASE + 0x60 + 5)
+#define AT91_PIN_PD6    (PIN_BASE + 0x60 + 6)
+#define AT91_PIN_PD7    (PIN_BASE + 0x60 + 7)
+#define AT91_PIN_PD8    (PIN_BASE + 0x60 + 8)
+#define AT91_PIN_PD9    (PIN_BASE + 0x60 + 9)
+#define AT91_PIN_PD10   (PIN_BASE + 0x60 + 10)
+#define AT91_PIN_PD11   (PIN_BASE + 0x60 + 11)
+#define AT91_PIN_PD12   (PIN_BASE + 0x60 + 12)
+#define AT91_PIN_PD13   (PIN_BASE + 0x60 + 13)
+#define AT91_PIN_PD14   (PIN_BASE + 0x60 + 14)
+#define AT91_PIN_PD15   (PIN_BASE + 0x60 + 15)
+#define AT91_PIN_PD16   (PIN_BASE + 0x60 + 16)
+#define AT91_PIN_PD17   (PIN_BASE + 0x60 + 17)
+#define AT91_PIN_PD18   (PIN_BASE + 0x60 + 18)
+#define AT91_PIN_PD19   (PIN_BASE + 0x60 + 19)
+#define AT91_PIN_PD20   (PIN_BASE + 0x60 + 20)
+#define AT91_PIN_PD21   (PIN_BASE + 0x60 + 21)
+#define AT91_PIN_PD22   (PIN_BASE + 0x60 + 22)
+#define AT91_PIN_PD23   (PIN_BASE + 0x60 + 23)
+#define AT91_PIN_PD24   (PIN_BASE + 0x60 + 24)
+#define AT91_PIN_PD25   (PIN_BASE + 0x60 + 25)
+#define AT91_PIN_PD26   (PIN_BASE + 0x60 + 26)
+#define AT91_PIN_PD27   (PIN_BASE + 0x60 + 27)
+#define AT91_PIN_PD28   (PIN_BASE + 0x60 + 28)
+#define AT91_PIN_PD29   (PIN_BASE + 0x60 + 29)
+#define AT91_PIN_PD30   (PIN_BASE + 0x60 + 30)
+#define AT91_PIN_PD31   (PIN_BASE + 0x60 + 31)
+
+#define AT91_PIN_PE0    (PIN_BASE + 0x80 + 0)
+#define AT91_PIN_PE1    (PIN_BASE + 0x80 + 1)
+#define AT91_PIN_PE2    (PIN_BASE + 0x80 + 2)
+#define AT91_PIN_PE3    (PIN_BASE + 0x80 + 3)
+#define AT91_PIN_PE4    (PIN_BASE + 0x80 + 4)
+#define AT91_PIN_PE5    (PIN_BASE + 0x80 + 5)
+#define AT91_PIN_PE6    (PIN_BASE + 0x80 + 6)
+#define AT91_PIN_PE7    (PIN_BASE + 0x80 + 7)
+#define AT91_PIN_PE8    (PIN_BASE + 0x80 + 8)
+#define AT91_PIN_PE9    (PIN_BASE + 0x80 + 9)
+#define AT91_PIN_PE10   (PIN_BASE + 0x80 + 10)
+#define AT91_PIN_PE11   (PIN_BASE + 0x80 + 11)
+#define AT91_PIN_PE12   (PIN_BASE + 0x80 + 12)
+#define AT91_PIN_PE13   (PIN_BASE + 0x80 + 13)
+#define AT91_PIN_PE14   (PIN_BASE + 0x80 + 14)
+#define AT91_PIN_PE15   (PIN_BASE + 0x80 + 15)
+#define AT91_PIN_PE16   (PIN_BASE + 0x80 + 16)
+#define AT91_PIN_PE17   (PIN_BASE + 0x80 + 17)
+#define AT91_PIN_PE18   (PIN_BASE + 0x80 + 18)
+#define AT91_PIN_PE19   (PIN_BASE + 0x80 + 19)
+#define AT91_PIN_PE20   (PIN_BASE + 0x80 + 20)
+#define AT91_PIN_PE21   (PIN_BASE + 0x80 + 21)
+#define AT91_PIN_PE22   (PIN_BASE + 0x80 + 22)
+#define AT91_PIN_PE23   (PIN_BASE + 0x80 + 23)
+#define AT91_PIN_PE24   (PIN_BASE + 0x80 + 24)
+#define AT91_PIN_PE25   (PIN_BASE + 0x80 + 25)
+#define AT91_PIN_PE26   (PIN_BASE + 0x80 + 26)
+#define AT91_PIN_PE27   (PIN_BASE + 0x80 + 27)
+#define AT91_PIN_PE28   (PIN_BASE + 0x80 + 28)
+#define AT91_PIN_PE29   (PIN_BASE + 0x80 + 29)
+#define AT91_PIN_PE30   (PIN_BASE + 0x80 + 30)
+#define AT91_PIN_PE31   (PIN_BASE + 0x80 + 31)
 
 #ifndef __ASSEMBLY__
 /* setup setup routines, called from board init or driver probe() */
 extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
-extern int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup);
-extern int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
 extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
 extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
-extern int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div);
 extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
-extern int __init_or_module at91_set_pulldown(unsigned pin, int is_on);
-extern int __init_or_module at91_disable_schmitt_trig(unsigned pin);
 
 /* callable at any time */
 extern int at91_set_gpio_value(unsigned pin, int value);
@@ -209,6 +206,23 @@ extern int at91_get_gpio_value(unsigned pin);
 extern void at91_gpio_suspend(void);
 extern void at91_gpio_resume(void);
 
+/*-------------------------------------------------------------------------*/
+
+/* wrappers for "new style" GPIO calls. the old AT91-specific ones should
+ * eventually be removed (along with this errno.h inclusion), and the
+ * gpio request/free calls should probably be implemented.
+ */
+
+#include <asm/errno.h>
+#include <asm-generic/gpio.h>           /* cansleep wrappers */
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+
+#define gpio_to_irq(gpio) (gpio)
+#define irq_to_gpio(irq)  (irq)
+
 #endif  /* __ASSEMBLY__ */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index a832e070761..483478d8be6 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,24 +16,27 @@
 
 #include <asm/sizes.h>
 
-/* DBGU base */
-/* rm9200, 9260/9g20, 9261/9g10, 9rl */
-#define AT91_BASE_DBGU0 0xfffff200
-/* 9263, 9g45 */
-#define AT91_BASE_DBGU1 0xffffee00
-
-#if defined(CONFIG_ARCH_AT91X40)
-#include <mach/at91x40.h>
-#else
+#if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200.h>
+#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
 #include <mach/at91sam9260.h>
+#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)
 #include <mach/at91sam9261.h>
+#elif defined(CONFIG_ARCH_AT91SAM9263)
 #include <mach/at91sam9263.h>
+#elif defined(CONFIG_ARCH_AT91SAM9RL)
 #include <mach/at91sam9rl.h>
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
 #include <mach/at91sam9g45.h>
-#include <mach/at91sam9x5.h>
-#include <mach/at91sam9n12.h>
+#elif defined(CONFIG_ARCH_AT91CAP9)
+#include <mach/at91cap9.h>
+#elif defined(CONFIG_ARCH_AT91X40)
+#include <mach/at91x40.h>
+#else
+#error "Unsupported AT91 processor"
+#endif
 
+#if !defined(CONFIG_ARCH_AT91X40)
 /*
  * On all at91 except rm9200 and x40 have the System Controller starts
  * at address 0xffffc000 and has a size of 16KiB.
@@ -49,13 +52,6 @@
 #endif
 
 /*
- * On all at91 have the Advanced Interrupt Controller starts at address
- * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
- */
-#define AT91_AIC        0xfffff000
-#define AT91_PMC        0xfffffc00
-
-/*
  * Peripheral identifiers/interrupts.
  */
 #define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
@@ -67,13 +63,13 @@
  * to 0xFEF78000 .. 0xFF000000.  (544Kb)
  */
 #define AT91_IO_PHYS_BASE       0xFFF78000
-#define AT91_IO_VIRT_BASE       IOMEM(0xFF000000 - AT91_IO_SIZE)
+#define AT91_IO_VIRT_BASE       (0xFF000000 - AT91_IO_SIZE)
 #else
 /*
  * Identity mapping for the non MMU case.
  */
 #define AT91_IO_PHYS_BASE       AT91_BASE_SYS
-#define AT91_IO_VIRT_BASE       IOMEM(AT91_IO_PHYS_BASE)
+#define AT91_IO_VIRT_BASE       AT91_IO_PHYS_BASE
 #endif
 
 #define AT91_IO_SIZE            (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
@@ -85,11 +81,15 @@
  * Virtual to Physical Address mapping for IO devices.
  */
 #define AT91_VA_BASE_SYS        AT91_IO_P2V(AT91_BASE_SYS)
+#define AT91_VA_BASE_EMAC       AT91_IO_P2V(AT91RM9200_BASE_EMAC)
 
  /* Internal SRAM is mapped below the IO devices */
 #define AT91_SRAM_MAX           SZ_1M
 #define AT91_VIRT_BASE          (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
 
+/* Serial ports */
+#define ATMEL_MAX_UART          7               /* 6 USART3's and one DBGU port (SAM9260) */
+
 /* External Memory Map */
 #define AT91_CHIPSELECT_0       0x10000000
 #define AT91_CHIPSELECT_1       0x20000000
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 2d9ca045574..4298e7806c7 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -21,7 +21,37 @@
 #ifndef __ASM_ARCH_IO_H
 #define __ASM_ARCH_IO_H
 
+#include <mach/hardware.h>
+
 #define IO_SPACE_LIMIT          0xFFFFFFFF
-#define __io(a)                 __typesafe_io(a)
+
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#ifndef __ASSEMBLY__
+
+#ifndef CONFIG_ARCH_AT91X40
+#define __arch_ioremap  at91_ioremap
+#define __arch_iounmap  at91_iounmap
+#endif
+
+void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
+void at91_iounmap(volatile void __iomem *addr);
+
+static inline unsigned int at91_sys_read(unsigned int reg_offset)
+{
+        void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
+
+        return __raw_readl(addr + reg_offset);
+}
+
+static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
+{
+        void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
+
+        __raw_writel(value, addr + reg_offset);
+}
+
+#endif
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index ef79a9aafc0..8f4866045b4 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -7,8 +7,6 @@
 #ifndef __ARCH_SYSTEM_REV_H__
 #define __ARCH_SYSTEM_REV_H__
 
-#include <asm/system_info.h>
-
 /*
  * board revision encoding
  * mach specific
@@ -21,7 +19,7 @@
 #define BOARD_HAVE_NAND_16BIT   (1 << 31)
 static inline int board_have_nand_16bit(void)
 {
-        return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
+        return system_rev & BOARD_HAVE_NAND_16BIT;
 }
 
 #endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h
index 5e917a66edd..31ac2d97f14 100644
--- a/arch/arm/mach-at91/include/mach/timex.h
+++ b/arch/arm/mach-at91/include/mach/timex.h
@@ -23,15 +23,65 @@
 
 #include <mach/hardware.h>
 
-#ifdef CONFIG_ARCH_AT91X40
+#if defined(CONFIG_ARCH_AT91RM9200)
 
-#define AT91X40_MASTER_CLOCK    40000000
-#define CLOCK_TICK_RATE         (AT91X40_MASTER_CLOCK)
+#define CLOCK_TICK_RATE         (AT91_SLOW_CLOCK)
 
+#elif defined(CONFIG_ARCH_AT91SAM9260)
+
+#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260)
+#define AT91SAM9_MASTER_CLOCK   90000000
 #else
+#define AT91SAM9_MASTER_CLOCK   99300000
+#endif
+
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91SAM9261)
+
+#define AT91SAM9_MASTER_CLOCK   99300000
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91SAM9G10)
+
+#define AT91SAM9_MASTER_CLOCK   133000000
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91SAM9263)
+
+#if defined(CONFIG_MACH_USB_A9263)
+#define AT91SAM9_MASTER_CLOCK   90000000
+#else
+#define AT91SAM9_MASTER_CLOCK   99959500
+#endif
 
-#define CLOCK_TICK_RATE         12345678
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91SAM9RL)
+
+#define AT91SAM9_MASTER_CLOCK   100000000
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91SAM9G20)
+
+#define AT91SAM9_MASTER_CLOCK   132096000
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+
+#define AT91SAM9_MASTER_CLOCK   133333333
+#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91CAP9)
+
+#define AT91CAP9_MASTER_CLOCK   100000000
+#define CLOCK_TICK_RATE         (AT91CAP9_MASTER_CLOCK/16)
+
+#elif defined(CONFIG_ARCH_AT91X40)
+
+#define AT91X40_MASTER_CLOCK    40000000
+#define CLOCK_TICK_RATE         (AT91X40_MASTER_CLOCK)
 
 #endif
 
-#endif /* __ASM_ARCH_TIMEX_H */
+#endif
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 97ad68a826f..18bdcdeb474 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -1,8 +1,7 @@
 /*
  * arch/arm/mach-at91/include/mach/uncompress.h
  *
- * Copyright (C) 2003 SAN People
- * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *  Copyright (C) 2003 SAN People
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -24,149 +23,21 @@
 
 #include <linux/io.h>
 #include <linux/atmel_serial.h>
-#include <mach/hardware.h>
 
-#include <mach/at91_dbgu.h>
-#include <mach/cpu.h>
-
-void __iomem *at91_uart;
-
-#if !defined(CONFIG_ARCH_AT91X40)
-static const u32 uarts_rm9200[] = {
-        AT91_BASE_DBGU0,
-        AT91RM9200_BASE_US0,
-        AT91RM9200_BASE_US1,
-        AT91RM9200_BASE_US2,
-        AT91RM9200_BASE_US3,
-        0,
-};
-
-static const u32 uarts_sam9260[] = {
-        AT91_BASE_DBGU0,
-        AT91SAM9260_BASE_US0,
-        AT91SAM9260_BASE_US1,
-        AT91SAM9260_BASE_US2,
-        AT91SAM9260_BASE_US3,
-        AT91SAM9260_BASE_US4,
-        AT91SAM9260_BASE_US5,
-        0,
-};
-
-static const u32 uarts_sam9261[] = {
-        AT91_BASE_DBGU0,
-        AT91SAM9261_BASE_US0,
-        AT91SAM9261_BASE_US1,
-        AT91SAM9261_BASE_US2,
-        0,
-};
-
-static const u32 uarts_sam9263[] = {
-        AT91_BASE_DBGU1,
-        AT91SAM9263_BASE_US0,
-        AT91SAM9263_BASE_US1,
-        AT91SAM9263_BASE_US2,
-        0,
-};
-
-static const u32 uarts_sam9g45[] = {
-        AT91_BASE_DBGU1,
-        AT91SAM9G45_BASE_US0,
-        AT91SAM9G45_BASE_US1,
-        AT91SAM9G45_BASE_US2,
-        AT91SAM9G45_BASE_US3,
-        0,
-};
-
-static const u32 uarts_sam9rl[] = {
-        AT91_BASE_DBGU0,
-        AT91SAM9RL_BASE_US0,
-        AT91SAM9RL_BASE_US1,
-        AT91SAM9RL_BASE_US2,
-        AT91SAM9RL_BASE_US3,
-        0,
-};
-
-static const u32 uarts_sam9x5[] = {
-        AT91_BASE_DBGU0,
-        AT91SAM9X5_BASE_USART0,
-        AT91SAM9X5_BASE_USART1,
-        AT91SAM9X5_BASE_USART2,
-        0,
-};
-
-static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
-{
-        u32 cidr, socid;
-
-        cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
-        socid = cidr & ~AT91_CIDR_VERSION;
-
-        switch (socid) {
-        case ARCH_ID_AT91RM9200:
-                return uarts_rm9200;
-
-        case ARCH_ID_AT91SAM9G20:
-        case ARCH_ID_AT91SAM9260:
-                return uarts_sam9260;
-
-        case ARCH_ID_AT91SAM9261:
-                return uarts_sam9261;
-
-        case ARCH_ID_AT91SAM9263:
-                return uarts_sam9263;
-
-        case ARCH_ID_AT91SAM9G45:
-                return uarts_sam9g45;
-
-        case ARCH_ID_AT91SAM9RL64:
-                return uarts_sam9rl;
-
-        case ARCH_ID_AT91SAM9X5:
-                return uarts_sam9x5;
-        }
-
-        /* at91sam9g10 */
-        if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
-                return uarts_sam9261;
-        }
-        /* at91sam9xe */
-        else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
-                return uarts_sam9260;
-        }
-
-        return NULL;
-}
-
-static inline void arch_decomp_setup(void)
-{
-        int i = 0;
-        const u32* usarts;
-
-        usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
-
-        if (!usarts)
-                usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
-        if (!usarts) {
-                at91_uart = NULL;
-                return;
-        }
-
-        do {
-                /* physical address */
-                at91_uart = (void __iomem *)usarts[i];
-
-                if (__raw_readl(at91_uart + ATMEL_US_BRGR))
-                        return;
-                i++;
-        } while (usarts[i]);
-
-        at91_uart = NULL;
-}
-#else
-static inline void arch_decomp_setup(void)
-{
-        at91_uart = NULL;
-}
+#if defined(CONFIG_AT91_EARLY_DBGU)
+#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
+#elif defined(CONFIG_AT91_EARLY_USART0)
+#define UART_OFFSET AT91_USART0
+#elif defined(CONFIG_AT91_EARLY_USART1)
+#define UART_OFFSET AT91_USART1
+#elif defined(CONFIG_AT91_EARLY_USART2)
+#define UART_OFFSET AT91_USART2
+#elif defined(CONFIG_AT91_EARLY_USART3)
+#define UART_OFFSET AT91_USART3
+#elif defined(CONFIG_AT91_EARLY_USART4)
+#define UART_OFFSET AT91_USART4
+#elif defined(CONFIG_AT91_EARLY_USART5)
+#define UART_OFFSET AT91_USART5
 #endif
 
 /*
@@ -178,24 +49,28 @@ static inline void arch_decomp_setup(void)
  */
 static void putc(int c)
 {
-        if (!at91_uart)
-                return;
+#ifdef UART_OFFSET
+        void __iomem *sys = (void __iomem *) UART_OFFSET;       /* physical address */
 
-        while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
+        while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
                 barrier();
-        __raw_writel(c, at91_uart + ATMEL_US_THR);
+        __raw_writel(c, sys + ATMEL_US_THR);
+#endif
 }
 
 static inline void flush(void)
 {
-        if (!at91_uart)
-                return;
+#ifdef UART_OFFSET
+        void __iomem *sys = (void __iomem *) UART_OFFSET;       /* physical address */
 
         /* wait for transmission to complete */
-        while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
+        while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
                 barrier();
+#endif
 }
 
+#define arch_decomp_setup()
+
 #define arch_decomp_wdog()
 
 #endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 8e210262aee..9665265ec75 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -23,226 +23,36 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/mm.h>
-#include <linux/bitmap.h>
 #include <linux/types.h>
-#include <linux/irq.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/irqdomain.h>
-#include <linux/err.h>
-#include <linux/slab.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
 
-#include <asm/exception.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
 
-#include "at91_aic.h"
-
-void __iomem *at91_aic_base;
-static struct irq_domain *at91_aic_domain;
-static struct device_node *at91_aic_np;
-static unsigned int n_irqs = NR_AIC_IRQS;
-static unsigned long at91_aic_caps = 0;
-
-/* AIC5 introduces a Source Select Register */
-#define AT91_AIC_CAP_AIC5       (1 << 0)
-#define has_aic5()              (at91_aic_caps & AT91_AIC_CAP_AIC5)
-
-#ifdef CONFIG_PM
-
-static unsigned long *wakeups;
-static unsigned long *backups;
-
-#define set_backup(bit) set_bit(bit, backups)
-#define clear_backup(bit) clear_bit(bit, backups)
-
-static int at91_aic_pm_init(void)
-{
-        backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL);
-        if (!backups)
-                return -ENOMEM;
-
-        wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL);
-        if (!wakeups) {
-                kfree(backups);
-                return -ENOMEM;
-        }
-
-        return 0;
-}
-
-static int at91_aic_set_wake(struct irq_data *d, unsigned value)
-{
-        if (unlikely(d->hwirq >= n_irqs))
-                return -EINVAL;
-
-        if (value)
-                set_bit(d->hwirq, wakeups);
-        else
-                clear_bit(d->hwirq, wakeups);
-
-        return 0;
-}
-
-void at91_irq_suspend(void)
-{
-        int i = 0, bit;
-
-        if (has_aic5()) {
-                /* disable enabled irqs */
-                while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
-                        at91_aic_write(AT91_AIC5_SSR,
-                                       bit & AT91_AIC5_INTSEL_MSK);
-                        at91_aic_write(AT91_AIC5_IDCR, 1);
-                        i = bit;
-                }
-                /* enable wakeup irqs */
-                i = 0;
-                while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
-                        at91_aic_write(AT91_AIC5_SSR,
-                                       bit & AT91_AIC5_INTSEL_MSK);
-                        at91_aic_write(AT91_AIC5_IECR, 1);
-                        i = bit;
-                }
-        } else {
-                at91_aic_write(AT91_AIC_IDCR, *backups);
-                at91_aic_write(AT91_AIC_IECR, *wakeups);
-        }
-}
-
-void at91_irq_resume(void)
-{
-        int i = 0, bit;
-
-        if (has_aic5()) {
-                /* disable wakeup irqs */
-                while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
-                        at91_aic_write(AT91_AIC5_SSR,
-                                       bit & AT91_AIC5_INTSEL_MSK);
-                        at91_aic_write(AT91_AIC5_IDCR, 1);
-                        i = bit;
-                }
-                /* enable irqs disabled for suspend */
-                i = 0;
-                while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
-                        at91_aic_write(AT91_AIC5_SSR,
-                                       bit & AT91_AIC5_INTSEL_MSK);
-                        at91_aic_write(AT91_AIC5_IECR, 1);
-                        i = bit;
-                }
-        } else {
-                at91_aic_write(AT91_AIC_IDCR, *wakeups);
-                at91_aic_write(AT91_AIC_IECR, *backups);
-        }
-}
-
-#else
-static inline int at91_aic_pm_init(void)
-{
-        return 0;
-}
-
-#define set_backup(bit)
-#define clear_backup(bit)
-#define at91_aic_set_wake       NULL
-
-#endif /* CONFIG_PM */
-
-asmlinkage void __exception_irq_entry
-at91_aic_handle_irq(struct pt_regs *regs)
-{
-        u32 irqnr;
-        u32 irqstat;
-
-        irqnr = at91_aic_read(AT91_AIC_IVR);
-        irqstat = at91_aic_read(AT91_AIC_ISR);
-
-        /*
-         * ISR value is 0 when there is no current interrupt or when there is
-         * a spurious interrupt
-         */
-        if (!irqstat)
-                at91_aic_write(AT91_AIC_EOICR, 0);
-        else
-                handle_IRQ(irqnr, regs);
-}
-
-asmlinkage void __exception_irq_entry
-at91_aic5_handle_irq(struct pt_regs *regs)
-{
-        u32 irqnr;
-        u32 irqstat;
-
-        irqnr = at91_aic_read(AT91_AIC5_IVR);
-        irqstat = at91_aic_read(AT91_AIC5_ISR);
-
-        if (!irqstat)
-                at91_aic_write(AT91_AIC5_EOICR, 0);
-        else
-                handle_IRQ(irqnr, regs);
-}
 
 static void at91_aic_mask_irq(struct irq_data *d)
 {
         /* Disable interrupt on AIC */
-        at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq);
-        /* Update ISR cache */
-        clear_backup(d->hwirq);
-}
-
-static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
-{
-        /* Disable interrupt on AIC5 */
-        at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
-        at91_aic_write(AT91_AIC5_IDCR, 1);
-        /* Update ISR cache */
-        clear_backup(d->hwirq);
+        at91_sys_write(AT91_AIC_IDCR, 1 << d->irq);
 }
 
 static void at91_aic_unmask_irq(struct irq_data *d)
 {
         /* Enable interrupt on AIC */
-        at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq);
-        /* Update ISR cache */
-        set_backup(d->hwirq);
+        at91_sys_write(AT91_AIC_IECR, 1 << d->irq);
 }
 
-static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
-{
-        /* Enable interrupt on AIC5 */
-        at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
-        at91_aic_write(AT91_AIC5_IECR, 1);
-        /* Update ISR cache */
-        set_backup(d->hwirq);
-}
-
-static void at91_aic_eoi(struct irq_data *d)
-{
-        /*
-         * Mark end-of-interrupt on AIC, the controller doesn't care about
-         * the value written. Moreover it's a write-only register.
-         */
-        at91_aic_write(AT91_AIC_EOICR, 0);
-}
-
-static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
-{
-        at91_aic_write(AT91_AIC5_EOICR, 0);
-}
-
-unsigned long *at91_extern_irq;
+unsigned int at91_extern_irq;
 
-#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq)
+#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
 
-static int at91_aic_compute_srctype(struct irq_data *d, unsigned type)
+static int at91_aic_set_type(struct irq_data *d, unsigned type)
 {
-        int srctype;
+        unsigned int smr, srctype;
 
         switch (type) {
         case IRQ_TYPE_LEVEL_HIGH:
@@ -252,300 +62,105 @@ static int at91_aic_compute_srctype(struct irq_data *d, unsigned type)
                 srctype = AT91_AIC_SRCTYPE_RISING;
                 break;
         case IRQ_TYPE_LEVEL_LOW:
-                if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq))               /* only supported on external interrupts */
+                if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))           /* only supported on external interrupts */
                         srctype = AT91_AIC_SRCTYPE_LOW;
                 else
-                        srctype = -EINVAL;
+                        return -EINVAL;
                 break;
         case IRQ_TYPE_EDGE_FALLING:
-                if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq))               /* only supported on external interrupts */
+                if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))           /* only supported on external interrupts */
                         srctype = AT91_AIC_SRCTYPE_FALLING;
                 else
-                        srctype = -EINVAL;
+                        return -EINVAL;
                 break;
         default:
-                srctype = -EINVAL;
-        }
-
-        return srctype;
-}
-
-static int at91_aic_set_type(struct irq_data *d, unsigned type)
-{
-        unsigned int smr;
-        int srctype;
-
-        srctype = at91_aic_compute_srctype(d, type);
-        if (srctype < 0)
-                return srctype;
-
-        if (has_aic5()) {
-                at91_aic_write(AT91_AIC5_SSR,
-                               d->hwirq & AT91_AIC5_INTSEL_MSK);
-                smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE;
-                at91_aic_write(AT91_AIC5_SMR, smr | srctype);
-        } else {
-                smr = at91_aic_read(AT91_AIC_SMR(d->hwirq))
-                      & ~AT91_AIC_SRCTYPE;
-                at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
-        }
-
-        return 0;
-}
-
-static struct irq_chip at91_aic_chip = {
-        .name           = "AIC",
-        .irq_mask       = at91_aic_mask_irq,
-        .irq_unmask     = at91_aic_unmask_irq,
-        .irq_set_type   = at91_aic_set_type,
-        .irq_set_wake   = at91_aic_set_wake,
-        .irq_eoi        = at91_aic_eoi,
-};
-
-static void __init at91_aic_hw_init(unsigned int spu_vector)
-{
-        int i;
-
-        /*
-         * Perform 8 End Of Interrupt Command to make sure AIC
-         * will not Lock out nIRQ
-         */
-        for (i = 0; i < 8; i++)
-                at91_aic_write(AT91_AIC_EOICR, 0);
-
-        /*
-         * Spurious Interrupt ID in Spurious Vector Register.
-         * When there is no current interrupt, the IRQ Vector Register
-         * reads the value stored in AIC_SPU
-         */
-        at91_aic_write(AT91_AIC_SPU, spu_vector);
-
-        /* No debugging in AIC: Debug (Protect) Control Register */
-        at91_aic_write(AT91_AIC_DCR, 0);
-
-        /* Disable and clear all interrupts initially */
-        at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
-        at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
-}
-
-static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector)
-{
-        int i;
-
-        /*
-         * Perform 8 End Of Interrupt Command to make sure AIC
-         * will not Lock out nIRQ
-         */
-        for (i = 0; i < 8; i++)
-                at91_aic_write(AT91_AIC5_EOICR, 0);
-
-        /*
-         * Spurious Interrupt ID in Spurious Vector Register.
-         * When there is no current interrupt, the IRQ Vector Register
-         * reads the value stored in AIC_SPU
-         */
-        at91_aic_write(AT91_AIC5_SPU, spu_vector);
-
-        /* No debugging in AIC: Debug (Protect) Control Register */
-        at91_aic_write(AT91_AIC5_DCR, 0);
-
-        /* Disable and clear all interrupts initially */
-        for (i = 0; i < n_irqs; i++) {
-                at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK);
-                at91_aic_write(AT91_AIC5_IDCR, 1);
-                at91_aic_write(AT91_AIC5_ICCR, 1);
+                return -EINVAL;
         }
-}
-
-#if defined(CONFIG_OF)
-static unsigned int *at91_aic_irq_priorities;
-
-static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
-                                                        irq_hw_number_t hw)
-{
-        /* Put virq number in Source Vector Register */
-        at91_aic_write(AT91_AIC_SVR(hw), virq);
-
-        /* Active Low interrupt, with priority */
-        at91_aic_write(AT91_AIC_SMR(hw),
-                       AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
-
-        irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
-        set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
 
+        smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
+        at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype);
         return 0;
 }
 
-static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq,
-                irq_hw_number_t hw)
-{
-        at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK);
-
-        /* Put virq number in Source Vector Register */
-        at91_aic_write(AT91_AIC5_SVR, virq);
-
-        /* Active Low interrupt, with priority */
-        at91_aic_write(AT91_AIC5_SMR,
-                       AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
-
-        irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
-        set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+#ifdef CONFIG_PM
 
-        return 0;
-}
+static u32 wakeups;
+static u32 backups;
 
-static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
-                                const u32 *intspec, unsigned int intsize,
-                                irq_hw_number_t *out_hwirq, unsigned int *out_type)
+static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 {
-        if (WARN_ON(intsize < 3))
-                return -EINVAL;
-        if (WARN_ON(intspec[0] >= n_irqs))
-                return -EINVAL;
-        if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY)
-                    || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
+        if (unlikely(d->irq >= 32))
                 return -EINVAL;
 
-        *out_hwirq = intspec[0];
-        *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
-        at91_aic_irq_priorities[*out_hwirq] = intspec[2];
+        if (value)
+                wakeups |= (1 << d->irq);
+        else
+                wakeups &= ~(1 << d->irq);
 
         return 0;
 }
 
-static struct irq_domain_ops at91_aic_irq_ops = {
-        .map    = at91_aic_irq_map,
-        .xlate  = at91_aic_irq_domain_xlate,
-};
-
-int __init at91_aic_of_common_init(struct device_node *node,
-                                    struct device_node *parent)
+void at91_irq_suspend(void)
 {
-        struct property *prop;
-        const __be32 *p;
-        u32 val;
-
-        at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
-                                  * sizeof(*at91_extern_irq), GFP_KERNEL);
-        if (!at91_extern_irq)
-                return -ENOMEM;
-
-        if (at91_aic_pm_init()) {
-                kfree(at91_extern_irq);
-                return -ENOMEM;
-        }
-
-        at91_aic_irq_priorities = kzalloc(n_irqs
-                                          * sizeof(*at91_aic_irq_priorities),
-                                          GFP_KERNEL);
-        if (!at91_aic_irq_priorities)
-                return -ENOMEM;
-
-        at91_aic_base = of_iomap(node, 0);
-        at91_aic_np = node;
-
-        at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs,
-                                                &at91_aic_irq_ops, NULL);
-        if (!at91_aic_domain)
-                panic("Unable to add AIC irq domain (DT)\n");
-
-        of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
-                if (val >= n_irqs)
-                        pr_warn("AIC: external irq %d >= %d skip it\n",
-                                val, n_irqs);
-                else
-                        set_bit(val, at91_extern_irq);
-        }
-
-        irq_set_default_host(at91_aic_domain);
-
-        return 0;
+        backups = at91_sys_read(AT91_AIC_IMR);
+        at91_sys_write(AT91_AIC_IDCR, backups);
+        at91_sys_write(AT91_AIC_IECR, wakeups);
 }
 
-int __init at91_aic_of_init(struct device_node *node,
-                                     struct device_node *parent)
+void at91_irq_resume(void)
 {
-        int err;
-
-        err = at91_aic_of_common_init(node, parent);
-        if (err)
-                return err;
-
-        at91_aic_hw_init(n_irqs);
-
-        return 0;
+        at91_sys_write(AT91_AIC_IDCR, wakeups);
+        at91_sys_write(AT91_AIC_IECR, backups);
 }
 
-int __init at91_aic5_of_init(struct device_node *node,
-                                     struct device_node *parent)
-{
-        int err;
-
-        at91_aic_caps |= AT91_AIC_CAP_AIC5;
-        n_irqs = NR_AIC5_IRQS;
-        at91_aic_chip.irq_ack           = at91_aic5_mask_irq;
-        at91_aic_chip.irq_mask          = at91_aic5_mask_irq;
-        at91_aic_chip.irq_unmask        = at91_aic5_unmask_irq;
-        at91_aic_chip.irq_eoi           = at91_aic5_eoi;
-        at91_aic_irq_ops.map            = at91_aic5_irq_map;
-
-        err = at91_aic_of_common_init(node, parent);
-        if (err)
-                return err;
-
-        at91_aic5_hw_init(n_irqs);
-
-        return 0;
-}
+#else
+#define at91_aic_set_wake       NULL
 #endif
 
+static struct irq_chip at91_aic_chip = {
+        .name           = "AIC",
+        .irq_ack        = at91_aic_mask_irq,
+        .irq_mask       = at91_aic_mask_irq,
+        .irq_unmask     = at91_aic_unmask_irq,
+        .irq_set_type   = at91_aic_set_type,
+        .irq_set_wake   = at91_aic_set_wake,
+};
+
 /*
  * Initialize the AIC interrupt controller.
  */
-void __init at91_aic_init(unsigned int *priority, unsigned int ext_irq_mask)
+void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
 {
         unsigned int i;
-        int irq_base;
-
-        at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
-                                  * sizeof(*at91_extern_irq), GFP_KERNEL);
-
-        if (at91_aic_pm_init() || at91_extern_irq == NULL)
-                panic("Unable to allocate bit maps\n");
-
-        *at91_extern_irq = ext_irq_mask;
-
-        at91_aic_base = ioremap(AT91_AIC, 512);
-        if (!at91_aic_base)
-                panic("Unable to ioremap AIC registers\n");
-
-        /* Add irq domain for AIC */
-        irq_base = irq_alloc_descs(-1, 0, n_irqs, 0);
-        if (irq_base < 0) {
-                WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n");
-                irq_base = 0;
-        }
-        at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs,
-                                                irq_base, 0,
-                                                &irq_domain_simple_ops, NULL);
-
-        if (!at91_aic_domain)
-                panic("Unable to add AIC irq domain\n");
-
-        irq_set_default_host(at91_aic_domain);
 
         /*
          * The IVR is used by macro get_irqnr_and_base to read and verify.
          * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
          */
-        for (i = 0; i < n_irqs; i++) {
-                /* Put hardware irq number in Source Vector Register: */
-                at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i);
+        for (i = 0; i < NR_AIC_IRQS; i++) {
+                /* Put irq number in Source Vector Register: */
+                at91_sys_write(AT91_AIC_SVR(i), i);
                 /* Active Low interrupt, with the specified priority */
-                at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
-                irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);
+                at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
+
+                irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+
+                /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
+                if (i < 8)
+                        at91_sys_write(AT91_AIC_EOICR, 0);
         }
 
-        at91_aic_hw_init(n_irqs);
+        /*
+         * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
+         * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
+         */
+        at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
+
+        /* No debugging in AIC: Debug (Protect) Control Register */
+        at91_sys_write(AT91_AIC_DCR, 0);
+
+        /* Disable and clear all interrupts initially */
+        at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
+        at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
 }
diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c
index 3e22978b554..0415a839e1a 100644
--- a/arch/arm/mach-at91/leds.c
+++ b/arch/arm/mach-at91/leds.c
@@ -9,13 +9,13 @@
  * 2 of the License, or (at your option) any later version.
 */
 
-#include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
 
-#include "board.h"
+#include <mach/board.h>
+#include <mach/gpio.h>
 
 
 /* ------------------------------------------------------------------------- */
@@ -90,3 +90,108 @@ void __init at91_pwm_leds(struct gpio_led *leds, int nr)
 #else
 void __init at91_pwm_leds(struct gpio_led *leds, int nr){}
 #endif
+
+
+/* ------------------------------------------------------------------------- */
+
+#if defined(CONFIG_LEDS)
+
+#include <asm/leds.h>
+
+/*
+ * Old ARM-specific LED framework; not fully functional when generic time is
+ * in use.
+ */
+
+static u8 at91_leds_cpu;
+static u8 at91_leds_timer;
+
+static inline void at91_led_on(unsigned int led)
+{
+        at91_set_gpio_value(led, 0);
+}
+
+static inline void at91_led_off(unsigned int led)
+{
+        at91_set_gpio_value(led, 1);
+}
+
+static inline void at91_led_toggle(unsigned int led)
+{
+        unsigned long is_off = at91_get_gpio_value(led);
+        if (is_off)
+                at91_led_on(led);
+        else
+                at91_led_off(led);
+}
+
+
+/*
+ * Handle LED events.
+ */
+static void at91_leds_event(led_event_t evt)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+
+        switch(evt) {
+        case led_start:         /* System startup */
+                at91_led_on(at91_leds_cpu);
+                break;
+
+        case led_stop:          /* System stop / suspend */
+                at91_led_off(at91_leds_cpu);
+                break;
+
+#ifdef CONFIG_LEDS_TIMER
+        case led_timer:         /* Every 50 timer ticks */
+                at91_led_toggle(at91_leds_timer);
+                break;
+#endif
+
+#ifdef CONFIG_LEDS_CPU
+        case led_idle_start:    /* Entering idle state */
+                at91_led_off(at91_leds_cpu);
+                break;
+
+        case led_idle_end:      /* Exit idle state */
+                at91_led_on(at91_leds_cpu);
+                break;
+#endif
+
+        default:
+                break;
+        }
+
+        local_irq_restore(flags);
+}
+
+
+static int __init leds_init(void)
+{
+        if (!at91_leds_timer || !at91_leds_cpu)
+                return -ENODEV;
+
+        leds_event = at91_leds_event;
+
+        leds_event(led_start);
+        return 0;
+}
+
+__initcall(leds_init);
+
+
+void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+{
+        /* Enable GPIO to access the LEDs */
+        at91_set_gpio_output(cpu_led, 1);
+        at91_set_gpio_output(timer_led, 1);
+
+        at91_leds_cpu   = cpu_led;
+        at91_leds_timer = timer_led;
+}
+
+#else
+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index adb6db888a1..4159eca7894 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -10,7 +10,6 @@
  * (at your option) any later version.
  */
 
-#include <linux/gpio.h>
 #include <linux/suspend.h>
 #include <linux/sched.h>
 #include <linux/proc_fs.h>
@@ -26,18 +25,19 @@
 #include <asm/mach/irq.h>
 
 #include <mach/at91_pmc.h>
+#include <mach/gpio.h>
 #include <mach/cpu.h>
 
-#include "at91_aic.h"
 #include "generic.h"
 #include "pm.h"
 
 /*
  * Show the reason for the previous system reset.
  */
+#if defined(AT91_SHDWC)
 
-#include "at91_rstc.h"
-#include "at91_shdwc.h"
+#include <mach/at91_rstc.h>
+#include <mach/at91_shdwc.h>
 
 static void __init show_reset_status(void)
 {
@@ -58,11 +58,8 @@ static void __init show_reset_status(void)
         char *reason, *r2 = reset;
         u32 reset_type, wake_type;
 
-        if (!at91_shdwc_base || !at91_rstc_base)
-                return;
-
-        reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
-        wake_type = at91_shdwc_read(AT91_SHDW_SR);
+        reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
+        wake_type = at91_sys_read(AT91_SHDW_SR);
 
         switch (reset_type) {
         case AT91_RSTC_RSTTYP_GENERAL:
@@ -102,6 +99,10 @@ static void __init show_reset_status(void)
         }
         pr_info("AT91: Starting after %s %s\n", reason, r2);
 }
+#else
+static void __init show_reset_status(void) {}
+#endif
+
 
 static int at91_pm_valid_state(suspend_state_t state)
 {
@@ -137,7 +138,7 @@ static int at91_pm_verify_clocks(void)
         unsigned long scsr;
         int i;
 
-        scsr = at91_pmc_read(AT91_PMC_SCSR);
+        scsr = at91_sys_read(AT91_PMC_SCSR);
 
         /* USB must not be using PLLB */
         if (cpu_is_at91rm9200()) {
@@ -151,11 +152,14 @@ static int at91_pm_verify_clocks(void)
                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
                         return 0;
                 }
+        } else if (cpu_is_at91cap9()) {
+                if ((scsr & AT91CAP9_PMC_UHP) != 0) {
+                        pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
+                        return 0;
+                }
         }
 
-        if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS))
-                return 1;
-
+#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
         /* PCK0..PCK3 must be disabled, or configured to use clk32k */
         for (i = 0; i < 4; i++) {
                 u32 css;
@@ -163,12 +167,13 @@ static int at91_pm_verify_clocks(void)
                 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
                         continue;
 
-                css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
+                css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
                 if (css != AT91_PMC_CSS_SLOW) {
                         pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
                         return 0;
                 }
         }
+#endif
 
         return 1;
 }
@@ -190,27 +195,27 @@ int at91_suspend_entering_slow_clock(void)
 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
 
 
-static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
-                          void __iomem *ramc1, int memctrl);
+static void (*slow_clock)(void);
 
 #ifdef CONFIG_AT91_SLOW_CLOCK
-extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
-                            void __iomem *ramc1, int memctrl);
+extern void at91_slow_clock(void);
 extern u32 at91_slow_clock_sz;
 #endif
 
+
 static int at91_pm_enter(suspend_state_t state)
 {
+        u32 saved_lpr;
         at91_gpio_suspend();
         at91_irq_suspend();
 
         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
                         /* remember all the always-wake irqs */
-                        (at91_pmc_read(AT91_PMC_PCSR)
+                        (at91_sys_read(AT91_PMC_PCSR)
                                         | (1 << AT91_ID_FIQ)
                                         | (1 << AT91_ID_SYS)
                                         | (at91_extern_irq))
-                                & at91_aic_read(AT91_AIC_IMR),
+                                & at91_sys_read(AT91_AIC_IMR),
                         state);
 
         switch (state) {
@@ -231,18 +236,11 @@ static int at91_pm_enter(suspend_state_t state)
                          * turning off the main oscillator; reverse on wakeup.
                          */
                         if (slow_clock) {
-                                int memctrl = AT91_MEMCTRL_SDRAMC;
-
-                                if (cpu_is_at91rm9200())
-                                        memctrl = AT91_MEMCTRL_MC;
-                                else if (cpu_is_at91sam9g45())
-                                        memctrl = AT91_MEMCTRL_DDRSDR;
 #ifdef CONFIG_AT91_SLOW_CLOCK
                                 /* copy slow_clock handler to SRAM, and call it */
                                 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
 #endif
-                                slow_clock(at91_pmc_base, at91_ramc_base[0],
-                                           at91_ramc_base[1], memctrl);
+                                slow_clock();
                                 break;
                         } else {
                                 pr_info("AT91: PM - no slow clock mode enabled ...\n");
@@ -263,12 +261,16 @@ static int at91_pm_enter(suspend_state_t state)
                          * For ARM 926 based chips, this requirement is weaker
                          * as at91sam9 can access a RAM in self-refresh mode.
                          */
-                        if (cpu_is_at91rm9200())
-                                at91rm9200_standby();
-                        else if (cpu_is_at91sam9g45())
-                                at91sam9g45_standby();
-                        else
-                                at91sam9_standby();
+                        asm volatile (  "mov r0, #0\n\t"
+                                        "b 1f\n\t"
+                                        ".align 5\n\t"
+                                        "1: mcr p15, 0, r0, c7, c10, 4\n\t"
+                                        : /* no output */
+                                        : /* no input */
+                                        : "r0");
+                        saved_lpr = sdram_selfrefresh_enable();
+                        wait_for_interrupt_enable();
+                        sdram_selfrefresh_disable(saved_lpr);
                         break;
 
                 case PM_SUSPEND_ON:
@@ -281,7 +283,7 @@ static int at91_pm_enter(suspend_state_t state)
         }
 
         pr_debug("AT91: PM - wakeup %08x\n",
-                        at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
+                        at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
 
 error:
         target_state = PM_SUSPEND_ON;
@@ -314,9 +316,10 @@ static int __init at91_pm_init(void)
 
         pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
 
+#ifdef CONFIG_ARCH_AT91RM9200
         /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
-        if (cpu_is_at91rm9200())
-                at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
+        at91_sys_write(AT91_SDRAMC_LPR, 0);
+#endif
 
         suspend_set_ops(&at91_pm_ops);
 
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 38f467c6b71..ce9a2069911 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -1,18 +1,5 @@
-/*
- * AT91 Power Management
- *
- * Copyright (C) 2005 David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef __ARCH_ARM_MACH_AT91_PM
-#define __ARCH_ARM_MACH_AT91_PM
-
-#include <mach/at91_ramc.h>
-#include <mach/at91rm9200_sdramc.h>
+#ifdef CONFIG_ARCH_AT91RM9200
+#include <mach/at91rm9200_mc.h>
 
 /*
  * The AT91RM9200 goes into self-refresh mode with this command, and will
@@ -24,33 +11,51 @@
  * still in self-refresh is "not recommended", but seems to work.
  */
 
-static inline void at91rm9200_standby(void)
+static inline u32 sdram_selfrefresh_enable(void)
+{
+        u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
+
+        at91_sys_write(AT91_SDRAMC_LPR, 0);
+        at91_sys_write(AT91_SDRAMC_SRR, 1);
+        return saved_lpr;
+}
+
+#define sdram_selfrefresh_disable(saved_lpr)    at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
+#define wait_for_interrupt_enable()             asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
+                                                                : : "r" (0))
+
+#elif defined(CONFIG_ARCH_AT91CAP9)
+#include <mach/at91cap9_ddrsdr.h>
+
+
+static inline u32 sdram_selfrefresh_enable(void)
 {
-        u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
-
-        asm volatile(
-                "b    1f\n\t"
-                ".align    5\n\t"
-                "1:  mcr    p15, 0, %0, c7, c10, 4\n\t"
-                "    str    %0, [%1, %2]\n\t"
-                "    str    %3, [%1, %4]\n\t"
-                "    mcr    p15, 0, %0, c7, c0, 4\n\t"
-                "    str    %5, [%1, %2]"
-                :
-                : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
-                  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
-                  "r" (lpr));
+        u32 saved_lpr, lpr;
+
+        saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR);
+
+        lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
+        at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
+        return saved_lpr;
 }
 
+#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr)
+#define wait_for_interrupt_enable()             cpu_do_idle()
+
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+#include <mach/at91sam9_ddrsdr.h>
+
 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
  * remember.
  */
-static inline void at91sam9g45_standby(void)
+static u32 saved_lpr1;
+
+static inline u32 sdram_selfrefresh_enable(void)
 {
-        /* Those two values allow us to delay self-refresh activation
+        /* Those tow values allow us to delay self-refresh activation
          * to the maximum. */
         u32 lpr0, lpr1;
-        u32 saved_lpr0, saved_lpr1;
+        u32 saved_lpr0;
 
         saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
         lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
@@ -64,13 +69,20 @@ static inline void at91sam9g45_standby(void)
         at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
         at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
 
-        cpu_do_idle();
-
-        at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
-        at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
+        return saved_lpr0;
 }
 
-#ifdef CONFIG_SOC_AT91SAM9263
+#define sdram_selfrefresh_disable(saved_lpr0)   \
+        do { \
+                at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
+                at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
+        } while (0)
+#define wait_for_interrupt_enable()             cpu_do_idle()
+
+#else
+#include <mach/at91sam9_sdramc.h>
+
+#ifdef CONFIG_ARCH_AT91SAM9263
 /*
  * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
  * handle those cases both here and in the Suspend-To-RAM support.
@@ -78,19 +90,18 @@ static inline void at91sam9g45_standby(void)
 #warning Assuming EB1 SDRAM controller is *NOT* used
 #endif
 
-static inline void at91sam9_standby(void)
+static inline u32 sdram_selfrefresh_enable(void)
 {
         u32 saved_lpr, lpr;
 
         saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
 
         lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
-        at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
-                        AT91_SDRAMC_LPCB_SELF_REFRESH);
-
-        cpu_do_idle();
-
-        at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
+        at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
+        return saved_lpr;
 }
 
+#define sdram_selfrefresh_disable(saved_lpr)    at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
+#define wait_for_interrupt_enable()             cpu_do_idle()
+
 #endif
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 098c28ddf02..f7922a43617 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -15,10 +15,19 @@
 #include <linux/linkage.h>
 #include <mach/hardware.h>
 #include <mach/at91_pmc.h>
-#include <mach/at91_ramc.h>
+
+#if defined(CONFIG_ARCH_AT91RM9200)
+#include <mach/at91rm9200_mc.h>
+#elif defined(CONFIG_ARCH_AT91CAP9)
+#include <mach/at91cap9_ddrsdr.h>
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+#include <mach/at91sam9_ddrsdr.h>
+#else
+#include <mach/at91sam9_sdramc.h>
+#endif
 
 
-#ifdef CONFIG_SOC_AT91SAM9263
+#ifdef CONFIG_ARCH_AT91SAM9263
 /*
  * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
  * handle those cases both here and in the Suspend-To-RAM support.
@@ -39,23 +48,17 @@
 #define PLLALOCK_TIMEOUT        1000
 #define PLLBLOCK_TIMEOUT        1000
 
-pmc     .req    r0
-sdramc  .req    r1
-ramc1   .req    r2
-memctrl .req    r3
-tmp1    .req    r4
-tmp2    .req    r5
 
 /*
  * Wait until master clock is ready (after switching master clock source)
  */
         .macro wait_mckrdy
-        mov     tmp2, #MCKRDY_TIMEOUT
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
+        mov     r4, #MCKRDY_TIMEOUT
+1:      sub     r4, r4, #1
+        cmp     r4, #0
         beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
-        tst     tmp1, #AT91_PMC_MCKRDY
+        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+        tst     r3, #AT91_PMC_MCKRDY
         beq     1b
 2:
         .endm
@@ -64,12 +67,12 @@ tmp2	.req	r5
  * Wait until master oscillator has stabilized.
  */
         .macro wait_moscrdy
-        mov     tmp2, #MOSCRDY_TIMEOUT
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
+        mov     r4, #MOSCRDY_TIMEOUT
+1:      sub     r4, r4, #1
+        cmp     r4, #0
         beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
-        tst     tmp1, #AT91_PMC_MOSCS
+        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+        tst     r3, #AT91_PMC_MOSCS
         beq     1b
 2:
         .endm
@@ -78,12 +81,12 @@ tmp2	.req	r5
  * Wait until PLLA has locked.
  */
         .macro wait_pllalock
-        mov     tmp2, #PLLALOCK_TIMEOUT
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
+        mov     r4, #PLLALOCK_TIMEOUT
+1:      sub     r4, r4, #1
+        cmp     r4, #0
         beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
-        tst     tmp1, #AT91_PMC_LOCKA
+        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+        tst     r3, #AT91_PMC_LOCKA
         beq     1b
 2:
         .endm
@@ -92,98 +95,80 @@ tmp2	.req	r5
  * Wait until PLLB has locked.
  */
         .macro wait_pllblock
-        mov     tmp2, #PLLBLOCK_TIMEOUT
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
+        mov     r4, #PLLBLOCK_TIMEOUT
+1:      sub     r4, r4, #1
+        cmp     r4, #0
         beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
-        tst     tmp1, #AT91_PMC_LOCKB
+        ldr     r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+        tst     r3, #AT91_PMC_LOCKB
         beq     1b
 2:
         .endm
 
         .text
 
-/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
- *                      void __iomem *ramc1, int memctrl)
- */
 ENTRY(at91_slow_clock)
         /* Save registers on stack */
-        stmfd   sp!, {r4 - r12, lr}
+        stmfd   sp!, {r0 - r12, lr}
 
         /*
          * Register usage:
-         *  R0 = Base address of AT91_PMC
-         *  R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
-         *  R2 = Base address of second RAM Controller or 0 if not present
-         *  R3 = Memory controller
+         *  R1 = Base address of AT91_PMC
+         *  R2 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
+         *  R3 = temporary register
          *  R4 = temporary register
-         *  R5 = temporary register
+         *  R5 = Base address of second RAM Controller or 0 if not present
          */
+        ldr     r1, .at91_va_base_pmc
+        ldr     r2, .at91_va_base_sdramc
+        ldr     r5, .at91_va_base_ramc1
 
         /* Drain write buffer */
-        mov     tmp1, #0
-        mcr     p15, 0, tmp1, c7, c10, 4
-
-        cmp     memctrl, #AT91_MEMCTRL_MC
-        bne     ddr_sr_enable
+        mov     r0, #0
+        mcr     p15, 0, r0, c7, c10, 4
 
-        /*
-         * at91rm9200 Memory controller
-         */
+#ifdef CONFIG_ARCH_AT91RM9200
         /* Put SDRAM in self-refresh mode */
-        mov     tmp1, #1
-        str     tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR]
-        b       sdr_sr_done
-
-        /*
-         * DDRSDR Memory controller
-         */
-ddr_sr_enable:
-        cmp     memctrl, #AT91_MEMCTRL_DDRSDR
-        bne     sdr_sr_enable
+        mov     r3, #1
+        str     r3, [r2, #AT91_SDRAMC_SRR]
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+        || defined(CONFIG_ARCH_AT91SAM9G45)
 
         /* prepare for DDRAM self-refresh mode */
-        ldr     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
-        str     tmp1, .saved_sam9_lpr
-        bic     tmp1, #AT91_DDRSDRC_LPCB
-        orr     tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+        ldr     r3, [r2, #AT91_DDRSDRC_LPR]
+        str     r3, .saved_sam9_lpr
+        bic     r3, #AT91_DDRSDRC_LPCB
+        orr     r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
 
         /* figure out if we use the second ram controller */
-        cmp     ramc1, #0
-        ldrne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
-        strne   tmp2, .saved_sam9_lpr1
-        bicne   tmp2, #AT91_DDRSDRC_LPCB
-        orrne   tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+        cmp     r5, #0
+        ldrne   r4, [r5, #AT91_DDRSDRC_LPR]
+        strne   r4, .saved_sam9_lpr1
+        bicne   r4, #AT91_DDRSDRC_LPCB
+        orrne   r4, #AT91_DDRSDRC_LPCB_SELF_REFRESH
 
         /* Enable DDRAM self-refresh mode */
-        str     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
-        strne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
-
-        b       sdr_sr_done
-
-        /*
-         * SDRAMC Memory controller
-         */
-sdr_sr_enable:
+        str     r3, [r2, #AT91_DDRSDRC_LPR]
+        strne   r4, [r5, #AT91_DDRSDRC_LPR]
+#else
         /* Enable SDRAM self-refresh mode */
-        ldr     tmp1, [sdramc, #AT91_SDRAMC_LPR]
-        str     tmp1, .saved_sam9_lpr
+        ldr     r3, [r2, #AT91_SDRAMC_LPR]
+        str     r3, .saved_sam9_lpr
 
-        bic     tmp1, #AT91_SDRAMC_LPCB
-        orr     tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH
-        str     tmp1, [sdramc, #AT91_SDRAMC_LPR]
+        bic     r3, #AT91_SDRAMC_LPCB
+        orr     r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
+        str     r3, [r2, #AT91_SDRAMC_LPR]
+#endif
 
-sdr_sr_done:
         /* Save Master clock setting */
-        ldr     tmp1, [pmc, #AT91_PMC_MCKR]
-        str     tmp1, .saved_mckr
+        ldr     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+        str     r3, .saved_mckr
 
         /*
          * Set the Master clock source to slow clock
          */
-        bic     tmp1, tmp1, #AT91_PMC_CSS
-        str     tmp1, [pmc, #AT91_PMC_MCKR]
+        bic     r3, r3, #AT91_PMC_CSS
+        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
 
         wait_mckrdy
 
@@ -193,61 +178,61 @@ sdr_sr_done:
          *
          * See AT91RM9200 errata #27 and #28 for details.
          */
-        mov     tmp1, #0
-        str     tmp1, [pmc, #AT91_PMC_MCKR]
+        mov     r3, #0
+        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
 
         wait_mckrdy
 #endif
 
         /* Save PLLA setting and disable it */
-        ldr     tmp1, [pmc, #AT91_CKGR_PLLAR]
-        str     tmp1, .saved_pllar
+        ldr     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+        str     r3, .saved_pllar
 
-        mov     tmp1, #AT91_PMC_PLLCOUNT
-        orr     tmp1, tmp1, #(1 << 29)          /* bit 29 always set */
-        str     tmp1, [pmc, #AT91_CKGR_PLLAR]
+        mov     r3, #AT91_PMC_PLLCOUNT
+        orr     r3, r3, #(1 << 29)              /* bit 29 always set */
+        str     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
 
         /* Save PLLB setting and disable it */
-        ldr     tmp1, [pmc, #AT91_CKGR_PLLBR]
-        str     tmp1, .saved_pllbr
+        ldr     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+        str     r3, .saved_pllbr
 
-        mov     tmp1, #AT91_PMC_PLLCOUNT
-        str     tmp1, [pmc, #AT91_CKGR_PLLBR]
+        mov     r3, #AT91_PMC_PLLCOUNT
+        str     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
 
         /* Turn off the main oscillator */
-        ldr     tmp1, [pmc, #AT91_CKGR_MOR]
-        bic     tmp1, tmp1, #AT91_PMC_MOSCEN
-        str     tmp1, [pmc, #AT91_CKGR_MOR]
+        ldr     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+        bic     r3, r3, #AT91_PMC_MOSCEN
+        str     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
 
         /* Wait for interrupt */
-        mcr     p15, 0, tmp1, c7, c0, 4
+        mcr     p15, 0, r0, c7, c0, 4
 
         /* Turn on the main oscillator */
-        ldr     tmp1, [pmc, #AT91_CKGR_MOR]
-        orr     tmp1, tmp1, #AT91_PMC_MOSCEN
-        str     tmp1, [pmc, #AT91_CKGR_MOR]
+        ldr     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+        orr     r3, r3, #AT91_PMC_MOSCEN
+        str     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
 
         wait_moscrdy
 
         /* Restore PLLB setting */
-        ldr     tmp1, .saved_pllbr
-        str     tmp1, [pmc, #AT91_CKGR_PLLBR]
+        ldr     r3, .saved_pllbr
+        str     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
 
-        tst     tmp1, #(AT91_PMC_MUL &  0xff0000)
+        tst     r3, #(AT91_PMC_MUL &  0xff0000)
         bne     1f
-        tst     tmp1, #(AT91_PMC_MUL & ~0xff0000)
+        tst     r3, #(AT91_PMC_MUL & ~0xff0000)
         beq     2f
 1:
         wait_pllblock
 2:
 
         /* Restore PLLA setting */
-        ldr     tmp1, .saved_pllar
-        str     tmp1, [pmc, #AT91_CKGR_PLLAR]
+        ldr     r3, .saved_pllar
+        str     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
 
-        tst     tmp1, #(AT91_PMC_MUL &  0xff0000)
+        tst     r3, #(AT91_PMC_MUL &  0xff0000)
         bne     3f
-        tst     tmp1, #(AT91_PMC_MUL & ~0xff0000)
+        tst     r3, #(AT91_PMC_MUL & ~0xff0000)
         beq     4f
 3:
         wait_pllalock
@@ -260,11 +245,11 @@ sdr_sr_done:
          *
          * See AT91RM9200 errata #27 and #28 for details.
          */
-        ldr     tmp1, .saved_mckr
-        tst     tmp1, #AT91_PMC_PRES
+        ldr     r3, .saved_mckr
+        tst     r3, #AT91_PMC_PRES
         beq     2f
-        and     tmp1, tmp1, #AT91_PMC_PRES
-        str     tmp1, [pmc, #AT91_PMC_MCKR]
+        and     r3, r3, #AT91_PMC_PRES
+        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
 
         wait_mckrdy
 #endif
@@ -272,45 +257,32 @@ sdr_sr_done:
         /*
          * Restore master clock setting
          */
-2:      ldr     tmp1, .saved_mckr
-        str     tmp1, [pmc, #AT91_PMC_MCKR]
+2:      ldr     r3, .saved_mckr
+        str     r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
 
         wait_mckrdy
 
-        /*
-         * at91rm9200 Memory controller
-         * Do nothing - self-refresh is automatically disabled.
-         */
-        cmp     memctrl, #AT91_MEMCTRL_MC
-        beq     ram_restored
-
-        /*
-         * DDRSDR Memory controller
-         */
-        cmp     memctrl, #AT91_MEMCTRL_DDRSDR
-        bne     sdr_en_restore
+#ifdef CONFIG_ARCH_AT91RM9200
+        /* Do nothing - self-refresh is automatically disabled. */
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+        || defined(CONFIG_ARCH_AT91SAM9G45)
         /* Restore LPR on AT91 with DDRAM */
-        ldr     tmp1, .saved_sam9_lpr
-        str     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
+        ldr     r3, .saved_sam9_lpr
+        str     r3, [r2, #AT91_DDRSDRC_LPR]
 
         /* if we use the second ram controller */
-        cmp     ramc1, #0
-        ldrne   tmp2, .saved_sam9_lpr1
-        strne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
-
-        b       ram_restored
+        cmp     r5, #0
+        ldrne   r4, .saved_sam9_lpr1
+        strne   r4, [r5, #AT91_DDRSDRC_LPR]
 
-        /*
-         * SDRAMC Memory controller
-         */
-sdr_en_restore:
+#else
         /* Restore LPR on AT91 with SDRAM */
-        ldr     tmp1, .saved_sam9_lpr
-        str     tmp1, [sdramc, #AT91_SDRAMC_LPR]
+        ldr     r3, .saved_sam9_lpr
+        str     r3, [r2, #AT91_SDRAMC_LPR]
+#endif
 
-ram_restored:
         /* Restore registers, and return */
-        ldmfd   sp!, {r4 - r12, pc}
+        ldmfd   sp!, {r0 - r12, pc}
 
 
 .saved_mckr:
@@ -328,5 +300,27 @@ ram_restored:
 .saved_sam9_lpr1:
         .word 0
 
+.at91_va_base_pmc:
+        .word AT91_VA_BASE_SYS + AT91_PMC
+
+#ifdef CONFIG_ARCH_AT91RM9200
+.at91_va_base_sdramc:
+        .word AT91_VA_BASE_SYS
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+        || defined(CONFIG_ARCH_AT91SAM9G45)
+.at91_va_base_sdramc:
+        .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
+#else
+.at91_va_base_sdramc:
+        .word AT91_VA_BASE_SYS + AT91_SDRAMC0
+#endif
+
+.at91_va_base_ramc1:
+#if defined(CONFIG_ARCH_AT91SAM9G45)
+        .word AT91_VA_BASE_SYS + AT91_DDRSDRC1
+#else
+        .word 0
+#endif
+
 ENTRY(at91_slow_clock_sz)
         .word .-at91_slow_clock
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index 99a0a1d2b7d..5eab6aa621d 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -2,7 +2,6 @@
  * linux/arch/arm/mach-at91/sam9_smc.c
  *
  * Copyright (C) 2008 Andrew Victor
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -11,123 +10,38 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
 
 #include <mach/at91sam9_smc.h>
 
 #include "sam9_smc.h"
 
-
-#define AT91_SMC_CS(id, n)      (smc_base_addr[id] + ((n) * 0x10))
-
-static void __iomem *smc_base_addr[2];
-
-static void sam9_smc_cs_write_mode(void __iomem *base,
-                                        struct sam9_smc_config *config)
-{
-        __raw_writel(config->mode
-                   | AT91_SMC_TDF_(config->tdf_cycles),
-                   base + AT91_SMC_MODE);
-}
-
-void sam9_smc_write_mode(int id, int cs,
-                                        struct sam9_smc_config *config)
-{
-        sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
-}
-
-static void sam9_smc_cs_configure(void __iomem *base,
-                                        struct sam9_smc_config *config)
-{
-
-        /* Setup register */
-        __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
-                   | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
-                   | AT91_SMC_NRDSETUP_(config->nrd_setup)
-                   | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
-                   base + AT91_SMC_SETUP);
-
-        /* Pulse register */
-        __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
-                   | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
-                   | AT91_SMC_NRDPULSE_(config->nrd_pulse)
-                   | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
-                   base + AT91_SMC_PULSE);
-
-        /* Cycle register */
-        __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
-                   | AT91_SMC_NRDCYCLE_(config->read_cycle),
-                   base + AT91_SMC_CYCLE);
-
-        /* Mode register */
-        sam9_smc_cs_write_mode(base, config);
-}
-
-void sam9_smc_configure(int id, int cs,
-                                        struct sam9_smc_config *config)
+void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)
 {
-        sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
-}
-
-static void sam9_smc_cs_read_mode(void __iomem *base,
-                                        struct sam9_smc_config *config)
-{
-        u32 val = __raw_readl(base + AT91_SMC_MODE);
-
-        config->mode = (val & ~AT91_SMC_NWECYCLE);
-        config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
-}
-
-void sam9_smc_read_mode(int id, int cs,
-                                        struct sam9_smc_config *config)
-{
-        sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
-}
-
-static void sam9_smc_cs_read(void __iomem *base,
-                                        struct sam9_smc_config *config)
-{
-        u32 val;
-
         /* Setup register */
-        val = __raw_readl(base + AT91_SMC_SETUP);
-
-        config->nwe_setup = val & AT91_SMC_NWESETUP;
-        config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
-        config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
-        config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
+        at91_sys_write(AT91_SMC_SETUP(cs),
+                  AT91_SMC_NWESETUP_(config->nwe_setup)
+                | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
+                | AT91_SMC_NRDSETUP_(config->nrd_setup)
+                | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)
+        );
 
         /* Pulse register */
-        val = __raw_readl(base + AT91_SMC_PULSE);
-
-        config->nwe_setup = val & AT91_SMC_NWEPULSE;
-        config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
-        config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
-        config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
+        at91_sys_write(AT91_SMC_PULSE(cs),
+                  AT91_SMC_NWEPULSE_(config->nwe_pulse)
+                | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
+                | AT91_SMC_NRDPULSE_(config->nrd_pulse)
+                | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)
+        );
 
         /* Cycle register */
-        val = __raw_readl(base + AT91_SMC_CYCLE);
-
-        config->write_cycle = val & AT91_SMC_NWECYCLE;
-        config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
+        at91_sys_write(AT91_SMC_CYCLE(cs),
+                  AT91_SMC_NWECYCLE_(config->write_cycle)
+                | AT91_SMC_NRDCYCLE_(config->read_cycle)
+        );
 
         /* Mode register */
-        sam9_smc_cs_read_mode(base, config);
-}
-
-void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
-{
-        sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
-}
-
-void __init at91sam9_ioremap_smc(int id, u32 addr)
-{
-        if (id > 1) {
-                pr_warn("%s: id > 2\n", __func__);
-                return;
-        }
-        smc_base_addr[id] = ioremap(addr, 512);
-        if (!smc_base_addr[id])
-                pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
+        at91_sys_write(AT91_SMC_MODE(cs),
+                  config->mode
+                | AT91_SMC_TDF_(config->tdf_cycles)
+        );
 }
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
index 3e52dcd4a59..bf72cfb3455 100644
--- a/arch/arm/mach-at91/sam9_smc.h
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -8,4 +8,26 @@
  * published by the Free Software Foundation.
  */
 
-extern void __init at91sam9_ioremap_smc(int id, u32 addr);
+struct sam9_smc_config {
+        /* Setup register */
+        u8 ncs_read_setup;
+        u8 nrd_setup;
+        u8 ncs_write_setup;
+        u8 nwe_setup;
+
+        /* Pulse register */
+        u8 ncs_read_pulse;
+        u8 nrd_pulse;
+        u8 ncs_write_pulse;
+        u8 nwe_pulse;
+
+        /* Cycle register */
+        u16 read_cycle;
+        u16 write_cycle;
+
+        /* Mode register */
+        u32 mode;
+        u8 tdf_cycles:4;
+};
+
+extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 9ee866ce047..aa64294c7db 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -8,11 +8,7 @@
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/mm.h>
-#include <linux/pm.h>
-#include <linux/of_address.h>
-#include <linux/pinctrl/machine.h>
 
-#include <asm/system_misc.h>
 #include <asm/mach/map.h>
 
 #include <mach/hardware.h>
@@ -20,7 +16,6 @@
 #include <mach/at91_dbgu.h>
 #include <mach/at91_pmc.h>
 
-#include "at91_shdwc.h"
 #include "soc.h"
 #include "generic.h"
 
@@ -32,12 +27,9 @@ EXPORT_SYMBOL(at91_soc_initdata);
 void __init at91rm9200_set_type(int type)
 {
         if (type == ARCH_REVISON_9200_PQFP)
-                at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
-        else
                 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
-
-        pr_info("AT91: filled in soc subtype: %s\n",
-                at91_get_soc_subtype(&at91_soc_initdata));
+        else
+                at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
 }
 
 void __init at91_init_irq_default(void)
@@ -48,33 +40,19 @@ void __init at91_init_irq_default(void)
 void __init at91_init_interrupts(unsigned int *priority)
 {
         /* Initialize the AIC interrupt controller */
-        at91_aic_init(priority, at91_extern_irq);
+        at91_aic_init(priority);
 
         /* Enable GPIO interrupts */
         at91_gpio_irq_setup();
 }
 
-void __iomem *at91_ramc_base[2];
-EXPORT_SYMBOL_GPL(at91_ramc_base);
-
-void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
-{
-        if (id < 0 || id > 1) {
-                pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
-                BUG();
-        }
-        at91_ramc_base[id] = ioremap(addr, size);
-        if (!at91_ramc_base[id])
-                panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
-}
-
 static struct map_desc sram_desc[2] __initdata;
 
 void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
 {
         struct map_desc *desc = &sram_desc[bank];
 
-        desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
+        desc->virtual = AT91_IO_VIRT_BASE - length;
         if (bank > 0)
                 desc->virtual -= sram_desc[bank - 1].length;
 
@@ -88,13 +66,34 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
         iotable_init(desc, 1);
 }
 
-static struct map_desc at91_io_desc __initdata __maybe_unused = {
-        .virtual        = (unsigned long)AT91_VA_BASE_SYS,
+static struct map_desc at91_io_desc __initdata = {
+        .virtual        = AT91_VA_BASE_SYS,
         .pfn            = __phys_to_pfn(AT91_BASE_SYS),
         .length         = SZ_16K,
         .type           = MT_DEVICE,
 };
 
+void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
+{
+        if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
+                return (void __iomem *)AT91_IO_P2V(p);
+
+        return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
+}
+EXPORT_SYMBOL(at91_ioremap);
+
+void at91_iounmap(volatile void __iomem *addr)
+{
+        unsigned long virt = (unsigned long)addr;
+
+        if (virt >= VMALLOC_START && virt < VMALLOC_END)
+                __iounmap(addr);
+}
+EXPORT_SYMBOL(at91_iounmap);
+
+#define AT91_DBGU0      0xfffff200
+#define AT91_DBGU1      0xffffee00
+
 static void __init soc_detect(u32 dbgu_base)
 {
         u32 cidr, socid;
@@ -103,6 +102,20 @@ static void __init soc_detect(u32 dbgu_base)
         socid = cidr & ~AT91_CIDR_VERSION;
 
         switch (socid) {
+        case ARCH_ID_AT91CAP9: {
+#ifdef CONFIG_AT91_PMC_UNIT
+                u32 pmc_ver = at91_sys_read(AT91_PMC_VER);
+
+                if (pmc_ver == ARCH_REVISION_CAP9_B)
+                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B;
+                else if (pmc_ver == ARCH_REVISION_CAP9_C)
+                        at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C;
+#endif
+                at91_soc_initdata.type = AT91_SOC_CAP9;
+                at91_boot_soc = at91cap9_soc;
+                break;
+        }
+
         case ARCH_ID_AT91RM9200:
                 at91_soc_initdata.type = AT91_SOC_RM9200;
                 at91_boot_soc = at91rm9200_soc;
@@ -144,15 +157,10 @@ static void __init soc_detect(u32 dbgu_base)
                 at91_soc_initdata.type = AT91_SOC_SAM9X5;
                 at91_boot_soc = at91sam9x5_soc;
                 break;
-
-        case ARCH_ID_AT91SAM9N12:
-                at91_soc_initdata.type = AT91_SOC_SAM9N12;
-                at91_boot_soc = at91sam9n12_soc;
-                break;
         }
 
         /* at91sam9g10 */
-        if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
+        if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
                 at91_soc_initdata.type = AT91_SOC_SAM9G10;
                 at91_boot_soc = at91sam9261_soc;
         }
@@ -208,6 +216,7 @@ static void __init soc_detect(u32 dbgu_base)
 
 static const char *soc_name[] = {
         [AT91_SOC_RM9200]       = "at91rm9200",
+        [AT91_SOC_CAP9]         = "at91cap9",
         [AT91_SOC_SAM9260]      = "at91sam9260",
         [AT91_SOC_SAM9261]      = "at91sam9261",
         [AT91_SOC_SAM9263]      = "at91sam9263",
@@ -216,7 +225,6 @@ static const char *soc_name[] = {
         [AT91_SOC_SAM9G45]      = "at91sam9g45",
         [AT91_SOC_SAM9RL]       = "at91sam9rl",
         [AT91_SOC_SAM9X5]       = "at91sam9x5",
-        [AT91_SOC_SAM9N12]      = "at91sam9n12",
         [AT91_SOC_NONE]         = "Unknown"
 };
 
@@ -229,6 +237,8 @@ EXPORT_SYMBOL(at91_get_soc_type);
 static const char *soc_subtype_name[] = {
         [AT91_SOC_RM9200_BGA]   = "at91rm9200 BGA",
         [AT91_SOC_RM9200_PQFP]  = "at91rm9200 PQFP",
+        [AT91_SOC_CAP9_REV_B]   = "at91cap9 revB",
+        [AT91_SOC_CAP9_REV_C]   = "at91cap9 revC",
         [AT91_SOC_SAM9XE]       = "at91sam9xe",
         [AT91_SOC_SAM9G45ES]    = "at91sam9g45es",
         [AT91_SOC_SAM9M10]      = "at91sam9m10",
@@ -256,9 +266,9 @@ void __init at91_map_io(void)
         at91_soc_initdata.type = AT91_SOC_NONE;
         at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 
-        soc_detect(AT91_BASE_DBGU0);
+        soc_detect(AT91_DBGU0);
         if (!at91_soc_is_detected())
-                soc_detect(AT91_BASE_DBGU1);
+                soc_detect(AT91_DBGU1);
 
         if (!at91_soc_is_detected())
                 panic("AT91: Impossible to detect the SOC type");
@@ -275,203 +285,8 @@ void __init at91_map_io(void)
                 at91_boot_soc.map_io();
 }
 
-void __iomem *at91_shdwc_base = NULL;
-
-static void at91sam9_poweroff(void)
-{
-        at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-void __init at91_ioremap_shdwc(u32 base_addr)
-{
-        at91_shdwc_base = ioremap(base_addr, 16);
-        if (!at91_shdwc_base)
-                panic("Impossible to ioremap at91_shdwc_base\n");
-        pm_power_off = at91sam9_poweroff;
-}
-
-void __iomem *at91_rstc_base;
-
-void __init at91_ioremap_rstc(u32 base_addr)
-{
-        at91_rstc_base = ioremap(base_addr, 16);
-        if (!at91_rstc_base)
-                panic("Impossible to ioremap at91_rstc_base\n");
-}
-
-void __iomem *at91_matrix_base;
-EXPORT_SYMBOL_GPL(at91_matrix_base);
-
-void __init at91_ioremap_matrix(u32 base_addr)
-{
-        at91_matrix_base = ioremap(base_addr, 512);
-        if (!at91_matrix_base)
-                panic("Impossible to ioremap at91_matrix_base\n");
-}
-
-#if defined(CONFIG_OF)
-static struct of_device_id rstc_ids[] = {
-        { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
-        { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
-        { /*sentinel*/ }
-};
-
-static void at91_dt_rstc(void)
-{
-        struct device_node *np;
-        const struct of_device_id *of_id;
-
-        np = of_find_matching_node(NULL, rstc_ids);
-        if (!np)
-                panic("unable to find compatible rstc node in dtb\n");
-
-        at91_rstc_base = of_iomap(np, 0);
-        if (!at91_rstc_base)
-                panic("unable to map rstc cpu registers\n");
-
-        of_id = of_match_node(rstc_ids, np);
-        if (!of_id)
-                panic("AT91: rtsc no restart function availlable\n");
-
-        arm_pm_restart = of_id->data;
-
-        of_node_put(np);
-}
-
-static struct of_device_id ramc_ids[] = {
-        { .compatible = "atmel,at91rm9200-sdramc" },
-        { .compatible = "atmel,at91sam9260-sdramc" },
-        { .compatible = "atmel,at91sam9g45-ddramc" },
-        { /*sentinel*/ }
-};
-
-static void at91_dt_ramc(void)
-{
-        struct device_node *np;
-
-        np = of_find_matching_node(NULL, ramc_ids);
-        if (!np)
-                panic("unable to find compatible ram conroller node in dtb\n");
-
-        at91_ramc_base[0] = of_iomap(np, 0);
-        if (!at91_ramc_base[0])
-                panic("unable to map ramc[0] cpu registers\n");
-        /* the controller may have 2 banks */
-        at91_ramc_base[1] = of_iomap(np, 1);
-
-        of_node_put(np);
-}
-
-static struct of_device_id shdwc_ids[] = {
-        { .compatible = "atmel,at91sam9260-shdwc", },
-        { .compatible = "atmel,at91sam9rl-shdwc", },
-        { .compatible = "atmel,at91sam9x5-shdwc", },
-        { /*sentinel*/ }
-};
-
-static const char *shdwc_wakeup_modes[] = {
-        [AT91_SHDW_WKMODE0_NONE]        = "none",
-        [AT91_SHDW_WKMODE0_HIGH]        = "high",
-        [AT91_SHDW_WKMODE0_LOW]         = "low",
-        [AT91_SHDW_WKMODE0_ANYLEVEL]    = "any",
-};
-
-const int at91_dtget_shdwc_wakeup_mode(struct device_node *np)
-{
-        const char *pm;
-        int err, i;
-
-        err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
-        if (err < 0)
-                return AT91_SHDW_WKMODE0_ANYLEVEL;
-
-        for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
-                if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
-                        return i;
-
-        return -ENODEV;
-}
-
-static void at91_dt_shdwc(void)
-{
-        struct device_node *np;
-        int wakeup_mode;
-        u32 reg;
-        u32 mode = 0;
-
-        np = of_find_matching_node(NULL, shdwc_ids);
-        if (!np) {
-                pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n");
-                return;
-        }
-
-        at91_shdwc_base = of_iomap(np, 0);
-        if (!at91_shdwc_base)
-                panic("AT91: unable to map shdwc cpu registers\n");
-
-        wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
-        if (wakeup_mode < 0) {
-                pr_warn("AT91: shdwc unknown wakeup mode\n");
-                goto end;
-        }
-
-        if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) {
-                if (reg > AT91_SHDW_CPTWK0_MAX) {
-                        pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n",
-                                reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
-                        reg = AT91_SHDW_CPTWK0_MAX;
-                }
-                mode |= AT91_SHDW_CPTWK0_(reg);
-        }
-
-        if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
-                        mode |= AT91_SHDW_RTCWKEN;
-
-        if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
-                        mode |= AT91_SHDW_RTTWKEN;
-
-        at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
-
-end:
-        pm_power_off = at91sam9_poweroff;
-
-        of_node_put(np);
-}
-
-void __init at91rm9200_dt_initialize(void)
-{
-        at91_dt_ramc();
-
-        /* Init clock subsystem */
-        at91_dt_clock_init();
-
-        /* Register the processor-specific clocks */
-        at91_boot_soc.register_clocks();
-
-        at91_boot_soc.init();
-}
-
-void __init at91_dt_initialize(void)
-{
-        at91_dt_rstc();
-        at91_dt_ramc();
-        at91_dt_shdwc();
-
-        /* Init clock subsystem */
-        at91_dt_clock_init();
-
-        /* Register the processor-specific clocks */
-        at91_boot_soc.register_clocks();
-
-        if (at91_boot_soc.init)
-                at91_boot_soc.init();
-}
-#endif
-
 void __init at91_initialize(unsigned long main_clock)
 {
-        at91_boot_soc.ioremap_registers();
-
         /* Init clock subsystem */
         at91_clock_init(main_clock);
 
@@ -479,6 +294,4 @@ void __init at91_initialize(unsigned long main_clock)
         at91_boot_soc.register_clocks();
 
         at91_boot_soc.init();
-
-        pinctrl_provide_dummies();
 }
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 9c6d3d4f9a2..21ed8816e6f 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -5,15 +5,14 @@
  */
 
 struct at91_init_soc {
-        int builtin;
         unsigned int *default_irq_priority;
         void (*map_io)(void);
-        void (*ioremap_registers)(void);
         void (*register_clocks)(void);
         void (*init)(void);
 };
 
 extern struct at91_init_soc at91_boot_soc;
+extern struct at91_init_soc at91cap9_soc;
 extern struct at91_init_soc at91rm9200_soc;
 extern struct at91_init_soc at91sam9260_soc;
 extern struct at91_init_soc at91sam9261_soc;
@@ -21,50 +20,40 @@ extern struct at91_init_soc at91sam9263_soc;
 extern struct at91_init_soc at91sam9g45_soc;
 extern struct at91_init_soc at91sam9rl_soc;
 extern struct at91_init_soc at91sam9x5_soc;
-extern struct at91_init_soc at91sam9n12_soc;
-
-#define AT91_SOC_START(_name)                           \
-struct at91_init_soc __initdata at91##_name##_soc       \
- __used                                                 \
-                                                = {     \
-        .builtin        = 1,                            \
-
-#define AT91_SOC_END                                    \
-};
 
 static inline int at91_soc_is_enabled(void)
 {
-        return at91_boot_soc.builtin;
+        return at91_boot_soc.init != NULL;
 }
 
-#if !defined(CONFIG_SOC_AT91RM9200)
+#if !defined(CONFIG_ARCH_AT91CAP9)
+#define at91cap9_soc    at91_boot_soc
+#endif
+
+#if !defined(CONFIG_ARCH_AT91RM9200)
 #define at91rm9200_soc  at91_boot_soc
 #endif
 
-#if !defined(CONFIG_SOC_AT91SAM9260)
+#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20))
 #define at91sam9260_soc at91_boot_soc
 #endif
 
-#if !defined(CONFIG_SOC_AT91SAM9261)
+#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10))
 #define at91sam9261_soc at91_boot_soc
 #endif
 
-#if !defined(CONFIG_SOC_AT91SAM9263)
+#if !defined(CONFIG_ARCH_AT91SAM9263)
 #define at91sam9263_soc at91_boot_soc
 #endif
 
-#if !defined(CONFIG_SOC_AT91SAM9G45)
+#if !defined(CONFIG_ARCH_AT91SAM9G45)
 #define at91sam9g45_soc at91_boot_soc
 #endif
 
-#if !defined(CONFIG_SOC_AT91SAM9RL)
+#if !defined(CONFIG_ARCH_AT91SAM9RL)
 #define at91sam9rl_soc  at91_boot_soc
 #endif
 
-#if !defined(CONFIG_SOC_AT91SAM9X5)
+#if !defined(CONFIG_ARCH_AT91SAM9X5)
 #define at91sam9x5_soc  at91_boot_soc
 #endif
-
-#if !defined(CONFIG_SOC_AT91SAM9N12)
-#define at91sam9n12_soc at91_boot_soc
-#endif
diff --git a/arch/arm/mach-at91/stamp9g20.h b/arch/arm/mach-at91/stamp9g20.h
deleted file mode 100644
index f62c0abca4b..00000000000
--- a/arch/arm/mach-at91/stamp9g20.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_STAMP9G20_H
-#define __MACH_STAMP9G20_H
-
-void stamp9g20_init_early(void);
-void stamp9g20_board_init(void);
-
-#endif