aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree
diff options
context:
space:
mode:
authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
commitfcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch)
treea57612d1888735a2ec7972891b68c1ac5ec8faea /Documentation/devicetree
parent8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff)
Added missing tegra files.HEADmaster
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio_nvidia.txt8
-rw-r--r--Documentation/devicetree/bindings/gpio/led.txt58
-rw-r--r--Documentation/devicetree/bindings/i2c/arm-versatile.txt10
-rw-r--r--Documentation/devicetree/bindings/i2c/ce4100-i2c.txt93
-rw-r--r--Documentation/devicetree/bindings/i2c/fsl-i2c.txt64
-rw-r--r--Documentation/devicetree/bindings/spi/spi_nvidia.txt5
6 files changed, 238 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
new file mode 100644
index 00000000000..eb4b530d64e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
@@ -0,0 +1,8 @@
1NVIDIA Tegra 2 GPIO controller
2
3Required properties:
4- compatible : "nvidia,tegra20-gpio"
5- #gpio-cells : Should be two. The first cell is the pin number and the
6 second cell is used to specify optional parameters:
7 - bit 0 specifies polarity (0 for normal, 1 for inverted)
8- gpio-controller : Marks the device node as a GPIO controller.
diff --git a/Documentation/devicetree/bindings/gpio/led.txt b/Documentation/devicetree/bindings/gpio/led.txt
new file mode 100644
index 00000000000..064db928c3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/led.txt
@@ -0,0 +1,58 @@
1LEDs connected to GPIO lines
2
3Required properties:
4- compatible : should be "gpio-leds".
5
6Each LED is represented as a sub-node of the gpio-leds device. Each
7node's name represents the name of the corresponding LED.
8
9LED sub-node properties:
10- gpios : Should specify the LED's GPIO, see "Specifying GPIO information
11 for devices" in Documentation/powerpc/booting-without-of.txt. Active
12 low LEDs should be indicated using flags in the GPIO specifier.
13- label : (optional) The label for this LED. If omitted, the label is
14 taken from the node name (excluding the unit address).
15- linux,default-trigger : (optional) This parameter, if present, is a
16 string defining the trigger assigned to the LED. Current triggers are:
17 "backlight" - LED will act as a back-light, controlled by the framebuffer
18 system
19 "default-on" - LED will turn on, but see "default-state" below
20 "heartbeat" - LED "double" flashes at a load average based rate
21 "ide-disk" - LED indicates disk activity
22 "timer" - LED flashes at a fixed, configurable rate
23- default-state: (optional) The initial state of the LED. Valid
24 values are "on", "off", and "keep". If the LED is already on or off
25 and the default-state property is set the to same value, then no
26 glitch should be produced where the LED momentarily turns off (or
27 on). The "keep" setting will keep the LED at whatever its current
28 state is, without producing a glitch. The default is off if this
29 property is not present.
30
31Examples:
32
33leds {
34 compatible = "gpio-leds";
35 hdd {
36 label = "IDE Activity";
37 gpios = <&mcu_pio 0 1>; /* Active low */
38 linux,default-trigger = "ide-disk";
39 };
40
41 fault {
42 gpios = <&mcu_pio 1 0>;
43 /* Keep LED on if BIOS detected hardware fault */
44 default-state = "keep";
45 };
46};
47
48run-control {
49 compatible = "gpio-leds";
50 red {
51 gpios = <&mpc8572 6 0>;
52 default-state = "off";
53 };
54 green {
55 gpios = <&mpc8572 7 0>;
56 default-state = "on";
57 };
58}
diff --git a/Documentation/devicetree/bindings/i2c/arm-versatile.txt b/Documentation/devicetree/bindings/i2c/arm-versatile.txt
new file mode 100644
index 00000000000..361d31c51b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/arm-versatile.txt
@@ -0,0 +1,10 @@
1i2c Controller on ARM Versatile platform:
2
3Required properties:
4- compatible : Must be "arm,versatile-i2c";
5- reg
6- #address-cells = <1>;
7- #size-cells = <0>;
8
9Optional properties:
10- Child nodes conforming to i2c bus binding
diff --git a/Documentation/devicetree/bindings/i2c/ce4100-i2c.txt b/Documentation/devicetree/bindings/i2c/ce4100-i2c.txt
new file mode 100644
index 00000000000..569b1624851
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/ce4100-i2c.txt
@@ -0,0 +1,93 @@
1CE4100 I2C
2----------
3
4CE4100 has one PCI device which is described as the I2C-Controller. This
5PCI device has three PCI-bars, each bar contains a complete I2C
6controller. So we have a total of three independent I2C-Controllers
7which share only an interrupt line.
8The driver is probed via the PCI-ID and is gathering the information of
9attached devices from the devices tree.
10Grant Likely recommended to use the ranges property to map the PCI-Bar
11number to its physical address and to use this to find the child nodes
12of the specific I2C controller. This were his exact words:
13
14 Here's where the magic happens. Each entry in
15 ranges describes how the parent pci address space
16 (middle group of 3) is translated to the local
17 address space (first group of 2) and the size of
18 each range (last cell). In this particular case,
19 the first cell of the local address is chosen to be
20 1:1 mapped to the BARs, and the second is the
21 offset from be base of the BAR (which would be
22 non-zero if you had 2 or more devices mapped off
23 the same BAR)
24
25 ranges allows the address mapping to be described
26 in a way that the OS can interpret without
27 requiring custom device driver code.
28
29This is an example which is used on FalconFalls:
30------------------------------------------------
31 i2c-controller@b,2 {
32 #address-cells = <2>;
33 #size-cells = <1>;
34 compatible = "pci8086,2e68.2",
35 "pci8086,2e68",
36 "pciclass,ff0000",
37 "pciclass,ff00";
38
39 reg = <0x15a00 0x0 0x0 0x0 0x0>;
40 interrupts = <16 1>;
41
42 /* as described by Grant, the first number in the group of
43 * three is the bar number followed by the 64bit bar address
44 * followed by size of the mapping. The bar address
45 * requires also a valid translation in parents ranges
46 * property.
47 */
48 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
49 1 0 0x02000000 0 0xdffe0600 0x100
50 2 0 0x02000000 0 0xdffe0700 0x100>;
51
52 i2c@0 {
53 #address-cells = <1>;
54 #size-cells = <0>;
55 compatible = "intel,ce4100-i2c-controller";
56
57 /* The first number in the reg property is the
58 * number of the bar
59 */
60 reg = <0 0 0x100>;
61
62 /* This I2C controller has no devices */
63 };
64
65 i2c@1 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "intel,ce4100-i2c-controller";
69 reg = <1 0 0x100>;
70
71 /* This I2C controller has one gpio controller */
72 gpio@26 {
73 #gpio-cells = <2>;
74 compatible = "ti,pcf8575";
75 reg = <0x26>;
76 gpio-controller;
77 };
78 };
79
80 i2c@2 {
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "intel,ce4100-i2c-controller";
84 reg = <2 0 0x100>;
85
86 gpio@26 {
87 #gpio-cells = <2>;
88 compatible = "ti,pcf8575";
89 reg = <0x26>;
90 gpio-controller;
91 };
92 };
93 };
diff --git a/Documentation/devicetree/bindings/i2c/fsl-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-i2c.txt
new file mode 100644
index 00000000000..1eacd6b20ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/fsl-i2c.txt
@@ -0,0 +1,64 @@
1* I2C
2
3Required properties :
4
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
7 compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
8 mpc5200 or mpc5200b. For the mpc5121, an additional node
9 "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
10
11Recommended properties :
12
13 - interrupts : <a b> where a is the interrupt number and b is a
14 field that represents an encoding of the sense and level
15 information for the interrupt. This should be encoded based on
16 the information in section 2) depending on the type of interrupt
17 controller you have.
18 - interrupt-parent : the phandle for the interrupt controller that
19 services interrupts for this device.
20 - fsl,preserve-clocking : boolean; if defined, the clock settings
21 from the bootloader are preserved (not touched).
22 - clock-frequency : desired I2C bus clock frequency in Hz.
23 - fsl,timeout : I2C bus timeout in microseconds.
24
25Examples :
26
27 /* MPC5121 based board */
28 i2c@1740 {
29 #address-cells = <1>;
30 #size-cells = <0>;
31 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
32 reg = <0x1740 0x20>;
33 interrupts = <11 0x8>;
34 interrupt-parent = <&ipic>;
35 clock-frequency = <100000>;
36 };
37
38 i2ccontrol@1760 {
39 compatible = "fsl,mpc5121-i2c-ctrl";
40 reg = <0x1760 0x8>;
41 };
42
43 /* MPC5200B based board */
44 i2c@3d00 {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
48 reg = <0x3d00 0x40>;
49 interrupts = <2 15 0>;
50 interrupt-parent = <&mpc5200_pic>;
51 fsl,preserve-clocking;
52 };
53
54 /* MPC8544 base board */
55 i2c@3100 {
56 #address-cells = <1>;
57 #size-cells = <0>;
58 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
59 reg = <0x3100 0x100>;
60 interrupts = <43 2>;
61 interrupt-parent = <&mpic>;
62 clock-frequency = <400000>;
63 fsl,timeout = <10000>;
64 };
diff --git a/Documentation/devicetree/bindings/spi/spi_nvidia.txt b/Documentation/devicetree/bindings/spi/spi_nvidia.txt
new file mode 100644
index 00000000000..6b9e5189669
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi_nvidia.txt
@@ -0,0 +1,5 @@
1NVIDIA Tegra 2 SPI device
2
3Required properties:
4- compatible : should be "nvidia,tegra20-spi".
5- gpios : should specify GPIOs used for chipselect.