diff options
Diffstat (limited to 'drivers/gpu/pvr/sgx/sgxutils.c')
-rw-r--r-- | drivers/gpu/pvr/sgx/sgxutils.c | 301 |
1 files changed, 214 insertions, 87 deletions
diff --git a/drivers/gpu/pvr/sgx/sgxutils.c b/drivers/gpu/pvr/sgx/sgxutils.c index 7f640885b7f..0b205c5029f 100644 --- a/drivers/gpu/pvr/sgx/sgxutils.c +++ b/drivers/gpu/pvr/sgx/sgxutils.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include "osfunc.h" | 40 | #include "osfunc.h" |
41 | #include "pvr_debug.h" | 41 | #include "pvr_debug.h" |
42 | #include "sgxutils.h" | 42 | #include "sgxutils.h" |
43 | #include "ttrace.h" | ||
43 | 44 | ||
44 | #ifdef __linux__ | 45 | #ifdef __linux__ |
45 | #include <linux/kernel.h> | 46 | #include <linux/kernel.h> |
@@ -149,16 +150,23 @@ static INLINE SGXMKIF_COMMAND * SGXAcquireKernelCCBSlot(PVRSRV_SGX_CCB_INFO *psC | |||
149 | return IMG_NULL; | 150 | return IMG_NULL; |
150 | } | 151 | } |
151 | 152 | ||
152 | PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | 153 | PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_DEVICE_NODE *psDeviceNode, |
153 | SGXMKIF_CMD_TYPE eCmdType, | 154 | SGXMKIF_CMD_TYPE eCmdType, |
154 | SGXMKIF_COMMAND *psCommandData, | 155 | SGXMKIF_COMMAND *psCommandData, |
155 | IMG_UINT32 ui32CallerID, | 156 | IMG_UINT32 ui32CallerID, |
156 | IMG_UINT32 ui32PDumpFlags, | 157 | IMG_UINT32 ui32PDumpFlags, |
157 | IMG_BOOL bLastInScene) | 158 | IMG_HANDLE hDevMemContext, |
159 | IMG_BOOL bLastInScene) | ||
158 | { | 160 | { |
159 | PVRSRV_SGX_CCB_INFO *psKernelCCB; | 161 | PVRSRV_SGX_CCB_INFO *psKernelCCB; |
160 | PVRSRV_ERROR eError = PVRSRV_OK; | 162 | PVRSRV_ERROR eError = PVRSRV_OK; |
161 | SGXMKIF_COMMAND *psSGXCommand; | 163 | SGXMKIF_COMMAND *psSGXCommand; |
164 | PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice; | ||
165 | #if defined(FIX_HW_BRN_31620) | ||
166 | IMG_UINT32 ui32CacheMasks[4]; | ||
167 | IMG_UINT32 i; | ||
168 | MMU_CONTEXT *psMMUContext; | ||
169 | #endif | ||
162 | #if defined(PDUMP) | 170 | #if defined(PDUMP) |
163 | IMG_VOID *pvDumpCommand; | 171 | IMG_VOID *pvDumpCommand; |
164 | IMG_BOOL bPDumpIsSuspended = PDumpIsSuspended(); | 172 | IMG_BOOL bPDumpIsSuspended = PDumpIsSuspended(); |
@@ -168,12 +176,37 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
168 | PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags); | 176 | PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags); |
169 | #endif | 177 | #endif |
170 | 178 | ||
171 | #if defined(FIX_HW_BRN_28889) | 179 | #if defined(FIX_HW_BRN_31620) |
180 | for(i=0;i<4;i++) | ||
181 | { | ||
182 | ui32CacheMasks[i] = 0; | ||
183 | } | ||
172 | 184 | ||
185 | psMMUContext = psDevInfo->hKernelMMUContext; | ||
186 | psDeviceNode->pfnMMUGetCacheFlushRange(psMMUContext, &ui32CacheMasks[0]); | ||
173 | 187 | ||
188 | |||
189 | if (hDevMemContext) | ||
190 | { | ||
191 | BM_CONTEXT *psBMContext = (BM_CONTEXT *) hDevMemContext; | ||
174 | 192 | ||
193 | psMMUContext = psBMContext->psMMUContext; | ||
194 | psDeviceNode->pfnMMUGetCacheFlushRange(psMMUContext, &ui32CacheMasks[2]); | ||
195 | } | ||
175 | 196 | ||
176 | if ( (eCmdType != SGXMKIF_CMD_PROCESS_QUEUES) && | 197 | |
198 | if (ui32CacheMasks[0] || ui32CacheMasks[1] || ui32CacheMasks[2] || ui32CacheMasks[3]) | ||
199 | { | ||
200 | psDevInfo->ui32CacheControl |= SGXMKIF_CC_INVAL_BIF_PD; | ||
201 | } | ||
202 | #endif | ||
203 | |||
204 | #if defined(FIX_HW_BRN_28889) | ||
205 | |||
206 | |||
207 | |||
208 | |||
209 | if ( (eCmdType != SGXMKIF_CMD_PROCESS_QUEUES) && | ||
177 | ((psDevInfo->ui32CacheControl & SGXMKIF_CC_INVAL_DATA) != 0) && | 210 | ((psDevInfo->ui32CacheControl & SGXMKIF_CC_INVAL_DATA) != 0) && |
178 | ((psDevInfo->ui32CacheControl & (SGXMKIF_CC_INVAL_BIF_PT | SGXMKIF_CC_INVAL_BIF_PD)) != 0)) | 211 | ((psDevInfo->ui32CacheControl & (SGXMKIF_CC_INVAL_BIF_PT | SGXMKIF_CC_INVAL_BIF_PD)) != 0)) |
179 | { | 212 | { |
@@ -183,18 +216,19 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
183 | SGXMKIF_HOST_CTL *psSGXHostCtl = psDevInfo->psSGXHostCtl; | 216 | SGXMKIF_HOST_CTL *psSGXHostCtl = psDevInfo->psSGXHostCtl; |
184 | SGXMKIF_COMMAND sCacheCommand = {0}; | 217 | SGXMKIF_COMMAND sCacheCommand = {0}; |
185 | 218 | ||
186 | eError = SGXScheduleCCBCommand(psDevInfo, | 219 | eError = SGXScheduleCCBCommand(psDeviceNode, |
187 | SGXMKIF_CMD_PROCESS_QUEUES, | 220 | SGXMKIF_CMD_PROCESS_QUEUES, |
188 | &sCacheCommand, | 221 | &sCacheCommand, |
189 | ui32CallerID, | 222 | ui32CallerID, |
190 | ui32PDumpFlags, | 223 | ui32PDumpFlags, |
224 | hDevMemContext, | ||
191 | bLastInScene); | 225 | bLastInScene); |
192 | if (eError != PVRSRV_OK) | 226 | if (eError != PVRSRV_OK) |
193 | { | 227 | { |
194 | goto Exit; | 228 | goto Exit; |
195 | } | 229 | } |
196 | 230 | ||
197 | 231 | ||
198 | #if !defined(NO_HARDWARE) | 232 | #if !defined(NO_HARDWARE) |
199 | if(PollForValueKM(&psSGXHostCtl->ui32InvalStatus, | 233 | if(PollForValueKM(&psSGXHostCtl->ui32InvalStatus, |
200 | PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE, | 234 | PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE, |
@@ -207,9 +241,9 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
207 | PVR_DBG_BREAK; | 241 | PVR_DBG_BREAK; |
208 | } | 242 | } |
209 | #endif | 243 | #endif |
210 | 244 | ||
211 | #if defined(PDUMP) | 245 | #if defined(PDUMP) |
212 | 246 | ||
213 | PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for BIF cache invalidate request to complete"); | 247 | PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for BIF cache invalidate request to complete"); |
214 | PDUMPMEMPOL(psSGXHostCtlMemInfo, | 248 | PDUMPMEMPOL(psSGXHostCtlMemInfo, |
215 | offsetof(SGXMKIF_HOST_CTL, ui32InvalStatus), | 249 | offsetof(SGXMKIF_HOST_CTL, ui32InvalStatus), |
@@ -218,15 +252,63 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
218 | PDUMP_POLL_OPERATOR_EQUAL, | 252 | PDUMP_POLL_OPERATOR_EQUAL, |
219 | 0, | 253 | 0, |
220 | MAKEUNIQUETAG(psSGXHostCtlMemInfo)); | 254 | MAKEUNIQUETAG(psSGXHostCtlMemInfo)); |
221 | #endif | 255 | #endif |
222 | 256 | ||
223 | psSGXHostCtl->ui32InvalStatus &= ~(PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE); | 257 | psSGXHostCtl->ui32InvalStatus &= ~(PVRSRV_USSE_EDM_BIF_INVAL_COMPLETE); |
224 | PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psSGXHostCtlMemInfo)); | 258 | PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psSGXHostCtlMemInfo)); |
225 | } | 259 | } |
260 | #else | ||
261 | PVR_UNREFERENCED_PARAMETER(hDevMemContext); | ||
226 | #endif | 262 | #endif |
263 | |||
264 | #if defined(FIX_HW_BRN_31620) | ||
265 | if ((eCmdType != SGXMKIF_CMD_FLUSHPDCACHE) && (psDevInfo->ui32CacheControl & SGXMKIF_CC_INVAL_BIF_PD)) | ||
266 | { | ||
267 | SGXMKIF_COMMAND sPDECacheCommand = {0}; | ||
268 | IMG_DEV_PHYADDR sDevPAddr; | ||
227 | 269 | ||
228 | #if defined(PDUMP) | 270 | |
271 | psMMUContext = psDevInfo->hKernelMMUContext; | ||
272 | |||
273 | psDeviceNode->pfnMMUGetPDPhysAddr(psMMUContext, &sDevPAddr); | ||
274 | sPDECacheCommand.ui32Data[0] = sDevPAddr.uiAddr | 1; | ||
275 | sPDECacheCommand.ui32Data[1] = ui32CacheMasks[0]; | ||
276 | sPDECacheCommand.ui32Data[2] = ui32CacheMasks[1]; | ||
277 | |||
278 | |||
279 | if (hDevMemContext) | ||
280 | { | ||
281 | BM_CONTEXT *psBMContext = (BM_CONTEXT *) hDevMemContext; | ||
229 | 282 | ||
283 | psMMUContext = psBMContext->psMMUContext; | ||
284 | |||
285 | psDeviceNode->pfnMMUGetPDPhysAddr(psMMUContext, &sDevPAddr); | ||
286 | |||
287 | sPDECacheCommand.ui32Data[3] = sDevPAddr.uiAddr | 1; | ||
288 | sPDECacheCommand.ui32Data[4] = ui32CacheMasks[2]; | ||
289 | sPDECacheCommand.ui32Data[5] = ui32CacheMasks[3]; | ||
290 | } | ||
291 | |||
292 | |||
293 | if (sPDECacheCommand.ui32Data[1] | sPDECacheCommand.ui32Data[2] | sPDECacheCommand.ui32Data[4] | | ||
294 | sPDECacheCommand.ui32Data[5]) | ||
295 | { | ||
296 | eError = SGXScheduleCCBCommand(psDeviceNode, | ||
297 | SGXMKIF_CMD_FLUSHPDCACHE, | ||
298 | &sPDECacheCommand, | ||
299 | ui32CallerID, | ||
300 | ui32PDumpFlags, | ||
301 | hDevMemContext, | ||
302 | bLastInScene); | ||
303 | if (eError != PVRSRV_OK) | ||
304 | { | ||
305 | goto Exit; | ||
306 | } | ||
307 | } | ||
308 | } | ||
309 | #endif | ||
310 | #if defined(PDUMP) | ||
311 | |||
230 | { | 312 | { |
231 | PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData(); | 313 | PVRSRV_PER_PROCESS_DATA* psPerProc = PVRSRVFindPerProcessData(); |
232 | if(psPerProc != IMG_NULL) | 314 | if(psPerProc != IMG_NULL) |
@@ -234,44 +316,45 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
234 | bPersistentProcess = psPerProc->bPDumpPersistent; | 316 | bPersistentProcess = psPerProc->bPDumpPersistent; |
235 | } | 317 | } |
236 | } | 318 | } |
237 | #endif | 319 | #endif |
238 | psKernelCCB = psDevInfo->psKernelCCBInfo; | 320 | psKernelCCB = psDevInfo->psKernelCCBInfo; |
239 | 321 | ||
240 | psSGXCommand = SGXAcquireKernelCCBSlot(psKernelCCB); | 322 | psSGXCommand = SGXAcquireKernelCCBSlot(psKernelCCB); |
241 | 323 | ||
242 | 324 | ||
243 | if(!psSGXCommand) | 325 | if(!psSGXCommand) |
244 | { | 326 | { |
327 | PVR_DPF((PVR_DBG_ERROR, "SGXScheduleCCBCommand: Wait for CCB space timed out")) ; | ||
245 | eError = PVRSRV_ERROR_TIMEOUT; | 328 | eError = PVRSRV_ERROR_TIMEOUT; |
246 | goto Exit; | 329 | goto Exit; |
247 | } | 330 | } |
248 | 331 | ||
249 | 332 | ||
250 | psCommandData->ui32CacheControl = psDevInfo->ui32CacheControl; | 333 | psCommandData->ui32CacheControl = psDevInfo->ui32CacheControl; |
251 | 334 | ||
252 | #if defined(PDUMP) | 335 | #if defined(PDUMP) |
253 | 336 | ||
254 | psDevInfo->sPDContext.ui32CacheControl |= psDevInfo->ui32CacheControl; | 337 | psDevInfo->sPDContext.ui32CacheControl |= psDevInfo->ui32CacheControl; |
255 | #endif | 338 | #endif |
256 | 339 | ||
257 | 340 | ||
258 | psDevInfo->ui32CacheControl = 0; | 341 | psDevInfo->ui32CacheControl = 0; |
259 | 342 | ||
260 | 343 | ||
261 | *psSGXCommand = *psCommandData; | 344 | *psSGXCommand = *psCommandData; |
262 | 345 | ||
263 | if (eCmdType >= SGXMKIF_CMD_MAX) | 346 | if (eCmdType >= SGXMKIF_CMD_MAX) |
264 | { | 347 | { |
265 | PVR_DPF((PVR_DBG_ERROR,"SGXScheduleCCBCommandKM: Unknown command type: %d", eCmdType)) ; | 348 | PVR_DPF((PVR_DBG_ERROR, "SGXScheduleCCBCommand: Unknown command type: %d", eCmdType)) ; |
266 | eError = PVRSRV_ERROR_INVALID_CCB_COMMAND; | 349 | eError = PVRSRV_ERROR_INVALID_CCB_COMMAND; |
267 | goto Exit; | 350 | goto Exit; |
268 | } | 351 | } |
269 | 352 | ||
270 | if((eCmdType == SGXMKIF_CMD_TA) && bLastInScene) | 353 | if ((eCmdType == SGXMKIF_CMD_TA) && bLastInScene) |
271 | { | 354 | { |
272 | SYS_DATA *psSysData; | 355 | SYS_DATA *psSysData; |
273 | 356 | ||
274 | 357 | ||
275 | SysAcquireData(&psSysData); | 358 | SysAcquireData(&psSysData); |
276 | 359 | ||
277 | if(psSysData->ePendingCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH) | 360 | if(psSysData->ePendingCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH) |
@@ -283,18 +366,18 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
283 | OSCleanCPUCacheKM(); | 366 | OSCleanCPUCacheKM(); |
284 | } | 367 | } |
285 | 368 | ||
286 | 369 | ||
287 | psSysData->ePendingCacheOpType = PVRSRV_MISC_INFO_CPUCACHEOP_NONE; | 370 | psSysData->ePendingCacheOpType = PVRSRV_MISC_INFO_CPUCACHEOP_NONE; |
288 | } | 371 | } |
289 | 372 | ||
290 | PVR_ASSERT(eCmdType < SGXMKIF_CMD_MAX); | 373 | PVR_ASSERT(eCmdType < SGXMKIF_CMD_MAX); |
291 | psSGXCommand->ui32ServiceAddress = psDevInfo->aui32HostKickAddr[eCmdType]; | 374 | psSGXCommand->ui32ServiceAddress = psDevInfo->aui32HostKickAddr[eCmdType]; |
292 | 375 | ||
293 | #if defined(PDUMP) | 376 | #if defined(PDUMP) |
294 | if ((ui32CallerID != ISR_ID) && (bPDumpIsSuspended == IMG_FALSE) && | 377 | if ((ui32CallerID != ISR_ID) && (bPDumpIsSuspended == IMG_FALSE) && |
295 | (bPersistentProcess == IMG_FALSE) ) | 378 | (bPersistentProcess == IMG_FALSE) ) |
296 | { | 379 | { |
297 | 380 | ||
298 | PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags, "Poll for space in the Kernel CCB\r\n"); | 381 | PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags, "Poll for space in the Kernel CCB\r\n"); |
299 | PDUMPMEMPOL(psKernelCCB->psCCBCtlMemInfo, | 382 | PDUMPMEMPOL(psKernelCCB->psCCBCtlMemInfo, |
300 | offsetof(PVRSRV_SGX_CCB_CTL, ui32ReadOffset), | 383 | offsetof(PVRSRV_SGX_CCB_CTL, ui32ReadOffset), |
@@ -314,7 +397,7 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
314 | ui32PDumpFlags, | 397 | ui32PDumpFlags, |
315 | MAKEUNIQUETAG(psKernelCCB->psCCBMemInfo)); | 398 | MAKEUNIQUETAG(psKernelCCB->psCCBMemInfo)); |
316 | 399 | ||
317 | 400 | ||
318 | PDUMPMEM(&psDevInfo->sPDContext.ui32CacheControl, | 401 | PDUMPMEM(&psDevInfo->sPDContext.ui32CacheControl, |
319 | psKernelCCB->psCCBMemInfo, | 402 | psKernelCCB->psCCBMemInfo, |
320 | psKernelCCB->ui32CCBDumpWOff * sizeof(SGXMKIF_COMMAND) + | 403 | psKernelCCB->ui32CCBDumpWOff * sizeof(SGXMKIF_COMMAND) + |
@@ -326,14 +409,14 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
326 | if (PDumpIsCaptureFrameKM() | 409 | if (PDumpIsCaptureFrameKM() |
327 | || ((ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0)) | 410 | || ((ui32PDumpFlags & PDUMP_FLAGS_CONTINUOUS) != 0)) |
328 | { | 411 | { |
329 | 412 | ||
330 | psDevInfo->sPDContext.ui32CacheControl = 0; | 413 | psDevInfo->sPDContext.ui32CacheControl = 0; |
331 | } | 414 | } |
332 | } | 415 | } |
333 | #endif | 416 | #endif |
334 | 417 | ||
335 | #if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE) | 418 | #if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE) |
336 | 419 | ||
337 | eError = PollForValueKM (psKernelCCB->pui32ReadOffset, | 420 | eError = PollForValueKM (psKernelCCB->pui32ReadOffset, |
338 | *psKernelCCB->pui32WriteOffset, | 421 | *psKernelCCB->pui32WriteOffset, |
339 | 0xFF, | 422 | 0xFF, |
@@ -342,12 +425,13 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
342 | IMG_FALSE); | 425 | IMG_FALSE); |
343 | if (eError != PVRSRV_OK) | 426 | if (eError != PVRSRV_OK) |
344 | { | 427 | { |
428 | PVR_DPF((PVR_DBG_ERROR, "SGXScheduleCCBCommand: Timeout waiting for previous command to be read")) ; | ||
345 | eError = PVRSRV_ERROR_TIMEOUT; | 429 | eError = PVRSRV_ERROR_TIMEOUT; |
346 | goto Exit; | 430 | goto Exit; |
347 | } | 431 | } |
348 | #endif | 432 | #endif |
349 | 433 | ||
350 | 434 | ||
351 | 435 | ||
352 | *psKernelCCB->pui32WriteOffset = (*psKernelCCB->pui32WriteOffset + 1) & 255; | 436 | *psKernelCCB->pui32WriteOffset = (*psKernelCCB->pui32WriteOffset + 1) & 255; |
353 | 437 | ||
@@ -400,6 +484,15 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
400 | 484 | ||
401 | OSWriteMemoryBarrier(); | 485 | OSWriteMemoryBarrier(); |
402 | 486 | ||
487 | |||
488 | PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_MKSYNC, PVRSRV_TRACE_CLASS_NONE, | ||
489 | MKSYNC_TOKEN_KERNEL_CCB_OFFSET, *psKernelCCB->pui32WriteOffset); | ||
490 | PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_MKSYNC, PVRSRV_TRACE_CLASS_NONE, | ||
491 | MKSYNC_TOKEN_CORE_CLK, psDevInfo->ui32CoreClockSpeed); | ||
492 | PVR_TTRACE_UI32(PVRSRV_TRACE_GROUP_MKSYNC, PVRSRV_TRACE_CLASS_NONE, | ||
493 | MKSYNC_TOKEN_UKERNEL_CLK, psDevInfo->ui32uKernelTimerClock); | ||
494 | |||
495 | |||
403 | #if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE) | 496 | #if defined(FIX_HW_BRN_26620) && defined(SGX_FEATURE_SYSTEM_CACHE) && !defined(SGX_BYPASS_SYSTEM_CACHE) |
404 | OSWriteHWReg(psDevInfo->pvRegsBaseKM, | 497 | OSWriteHWReg(psDevInfo->pvRegsBaseKM, |
405 | SGX_MP_CORE_SELECT(EUR_CR_EVENT_KICK2, 0), | 498 | SGX_MP_CORE_SELECT(EUR_CR_EVENT_KICK2, 0), |
@@ -413,7 +506,7 @@ PVRSRV_ERROR SGXScheduleCCBCommand(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
413 | OSMemoryBarrier(); | 506 | OSMemoryBarrier(); |
414 | 507 | ||
415 | #if defined(NO_HARDWARE) | 508 | #if defined(NO_HARDWARE) |
416 | 509 | ||
417 | *psKernelCCB->pui32ReadOffset = (*psKernelCCB->pui32ReadOffset + 1) & 255; | 510 | *psKernelCCB->pui32ReadOffset = (*psKernelCCB->pui32ReadOffset + 1) & 255; |
418 | #endif | 511 | #endif |
419 | 512 | ||
@@ -427,10 +520,10 @@ PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE *psDeviceNode, | |||
427 | SGXMKIF_COMMAND *psCommandData, | 520 | SGXMKIF_COMMAND *psCommandData, |
428 | IMG_UINT32 ui32CallerID, | 521 | IMG_UINT32 ui32CallerID, |
429 | IMG_UINT32 ui32PDumpFlags, | 522 | IMG_UINT32 ui32PDumpFlags, |
523 | IMG_HANDLE hDevMemContext, | ||
430 | IMG_BOOL bLastInScene) | 524 | IMG_BOOL bLastInScene) |
431 | { | 525 | { |
432 | PVRSRV_ERROR eError; | 526 | PVRSRV_ERROR eError; |
433 | PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice; | ||
434 | 527 | ||
435 | 528 | ||
436 | PDUMPSUSPEND(); | 529 | PDUMPSUSPEND(); |
@@ -474,7 +567,7 @@ PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE *psDeviceNode, | |||
474 | return eError; | 567 | return eError; |
475 | } | 568 | } |
476 | 569 | ||
477 | eError = SGXScheduleCCBCommand(psDevInfo, eCmdType, psCommandData, ui32CallerID, ui32PDumpFlags, bLastInScene); | 570 | eError = SGXScheduleCCBCommand(psDeviceNode, eCmdType, psCommandData, ui32CallerID, ui32PDumpFlags, hDevMemContext, bLastInScene); |
478 | 571 | ||
479 | PVRSRVPowerUnlock(ui32CallerID); | 572 | PVRSRVPowerUnlock(ui32CallerID); |
480 | 573 | ||
@@ -496,7 +589,7 @@ PVRSRV_ERROR SGXScheduleProcessQueuesKM(PVRSRV_DEVICE_NODE *psDeviceNode) | |||
496 | PVRSRV_ERROR eError; | 589 | PVRSRV_ERROR eError; |
497 | PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice; | 590 | PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice; |
498 | SGXMKIF_HOST_CTL *psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM; | 591 | SGXMKIF_HOST_CTL *psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM; |
499 | IMG_UINT32 ui32PowerStatus; | 592 | IMG_UINT32 ui32PowerStatus; |
500 | SGXMKIF_COMMAND sCommand = {0}; | 593 | SGXMKIF_COMMAND sCommand = {0}; |
501 | 594 | ||
502 | ui32PowerStatus = psHostCtl->ui32PowerStatus; | 595 | ui32PowerStatus = psHostCtl->ui32PowerStatus; |
@@ -506,7 +599,7 @@ PVRSRV_ERROR SGXScheduleProcessQueuesKM(PVRSRV_DEVICE_NODE *psDeviceNode) | |||
506 | return PVRSRV_OK; | 599 | return PVRSRV_OK; |
507 | } | 600 | } |
508 | 601 | ||
509 | eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_PROCESS_QUEUES, &sCommand, ISR_ID, 0, IMG_FALSE); | 602 | eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_PROCESS_QUEUES, &sCommand, ISR_ID, 0, IMG_NULL, IMG_FALSE); |
510 | if (eError != PVRSRV_OK) | 603 | if (eError != PVRSRV_OK) |
511 | { | 604 | { |
512 | PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueuesKM failed to schedule CCB command: %u", eError)); | 605 | PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueuesKM failed to schedule CCB command: %u", eError)); |
@@ -524,7 +617,11 @@ IMG_BOOL SGXIsDevicePowered(PVRSRV_DEVICE_NODE *psDeviceNode) | |||
524 | 617 | ||
525 | IMG_EXPORT | 618 | IMG_EXPORT |
526 | PVRSRV_ERROR SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie, | 619 | PVRSRV_ERROR SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie, |
620 | #if defined (SUPPORT_SID_INTERFACE) | ||
621 | SGX_INTERNAL_DEVINFO_KM *psSGXInternalDevInfo) | ||
622 | #else | ||
527 | SGX_INTERNAL_DEVINFO *psSGXInternalDevInfo) | 623 | SGX_INTERNAL_DEVINFO *psSGXInternalDevInfo) |
624 | #endif | ||
528 | { | 625 | { |
529 | PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookie)->pvDevice; | 626 | PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookie)->pvDevice; |
530 | 627 | ||
@@ -544,65 +641,58 @@ IMG_VOID SGXCleanupRequest(PVRSRV_DEVICE_NODE *psDeviceNode, | |||
544 | IMG_UINT32 ui32CleanupType) | 641 | IMG_UINT32 ui32CleanupType) |
545 | { | 642 | { |
546 | PVRSRV_ERROR eError; | 643 | PVRSRV_ERROR eError; |
547 | PVRSRV_SGXDEV_INFO *psSGXDevInfo = psDeviceNode->pvDevice; | 644 | PVRSRV_SGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice; |
548 | PVRSRV_KERNEL_MEM_INFO *psSGXHostCtlMemInfo = psSGXDevInfo->psKernelSGXHostCtlMemInfo; | 645 | PVRSRV_KERNEL_MEM_INFO *psHostCtlMemInfo = psDevInfo->psKernelSGXHostCtlMemInfo; |
549 | SGXMKIF_HOST_CTL *psSGXHostCtl = psSGXHostCtlMemInfo->pvLinAddrKM; | 646 | SGXMKIF_HOST_CTL *psHostCtl = psHostCtlMemInfo->pvLinAddrKM; |
550 | 647 | ||
551 | if ((psSGXHostCtl->ui32PowerStatus & PVRSRV_USSE_EDM_POWMAN_NO_WORK) != 0) | 648 | SGXMKIF_COMMAND sCommand = {0}; |
552 | { | ||
553 | |||
554 | } | ||
555 | else | ||
556 | { | ||
557 | SGXMKIF_COMMAND sCommand = {0}; | ||
558 | |||
559 | PDUMPCOMMENTWITHFLAGS(0, "Request ukernel resouce clean-up"); | ||
560 | sCommand.ui32Data[0] = ui32CleanupType; | ||
561 | sCommand.ui32Data[1] = (psHWDataDevVAddr == IMG_NULL) ? 0 : psHWDataDevVAddr->uiAddr; | ||
562 | |||
563 | eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_CLEANUP, &sCommand, KERNEL_ID, 0, IMG_FALSE); | ||
564 | if (eError != PVRSRV_OK) | ||
565 | { | ||
566 | PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Failed to submit clean-up command")); | ||
567 | PVR_DBG_BREAK; | ||
568 | } | ||
569 | 649 | ||
570 | 650 | sCommand.ui32Data[0] = ui32CleanupType; | |
571 | #if !defined(NO_HARDWARE) | 651 | sCommand.ui32Data[1] = (psHWDataDevVAddr == IMG_NULL) ? 0 : psHWDataDevVAddr->uiAddr; |
572 | if(PollForValueKM(&psSGXHostCtl->ui32CleanupStatus, | 652 | PDUMPCOMMENTWITHFLAGS(0, "Request ukernel resource clean-up, Type %u, Data 0x%X", sCommand.ui32Data[0], sCommand.ui32Data[1]); |
573 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | ||
574 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | ||
575 | 10 * MAX_HW_TIME_US, | ||
576 | 1000, | ||
577 | IMG_TRUE) != PVRSRV_OK) | ||
578 | { | ||
579 | PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Wait for uKernel to clean up (%u) failed", ui32CleanupType)); | ||
580 | PVR_DBG_BREAK; | ||
581 | } | ||
582 | #endif | ||
583 | 653 | ||
584 | #if defined(PDUMP) | 654 | eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_CLEANUP, &sCommand, KERNEL_ID, 0, IMG_NULL, IMG_FALSE); |
585 | 655 | if (eError != PVRSRV_OK) | |
586 | PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for clean-up request to complete"); | 656 | { |
587 | PDUMPMEMPOL(psSGXHostCtlMemInfo, | 657 | PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Failed to submit clean-up command")); |
588 | offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), | 658 | PVR_DBG_BREAK; |
589 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | 659 | } |
590 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | ||
591 | PDUMP_POLL_OPERATOR_EQUAL, | ||
592 | 0, | ||
593 | MAKEUNIQUETAG(psSGXHostCtlMemInfo)); | ||
594 | #endif | ||
595 | 660 | ||
596 | psSGXHostCtl->ui32CleanupStatus &= ~(PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE); | 661 | |
597 | PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psSGXHostCtlMemInfo)); | 662 | #if !defined(NO_HARDWARE) |
598 | 663 | if(PollForValueKM(&psHostCtl->ui32CleanupStatus, | |
599 | 664 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | |
600 | #if defined(SGX_FEATURE_SYSTEM_CACHE) | 665 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, |
601 | psSGXDevInfo->ui32CacheControl |= (SGXMKIF_CC_INVAL_BIF_SL | SGXMKIF_CC_INVAL_DATA); | 666 | 10 * MAX_HW_TIME_US, |
602 | #else | 667 | 1000, |
603 | psSGXDevInfo->ui32CacheControl |= SGXMKIF_CC_INVAL_DATA; | 668 | IMG_TRUE) != PVRSRV_OK) |
604 | #endif | 669 | { |
670 | PVR_DPF((PVR_DBG_ERROR,"SGXCleanupRequest: Wait for uKernel to clean up (%u) failed", ui32CleanupType)); | ||
671 | PVR_DBG_BREAK; | ||
605 | } | 672 | } |
673 | #endif | ||
674 | |||
675 | #if defined(PDUMP) | ||
676 | |||
677 | PDUMPCOMMENTWITHFLAGS(0, "Host Control - Poll for clean-up request to complete"); | ||
678 | PDUMPMEMPOL(psHostCtlMemInfo, | ||
679 | offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), | ||
680 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | ||
681 | PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE, | ||
682 | PDUMP_POLL_OPERATOR_EQUAL, | ||
683 | 0, | ||
684 | MAKEUNIQUETAG(psHostCtlMemInfo)); | ||
685 | #endif | ||
686 | |||
687 | psHostCtl->ui32CleanupStatus &= ~(PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE); | ||
688 | PDUMPMEM(IMG_NULL, psHostCtlMemInfo, offsetof(SGXMKIF_HOST_CTL, ui32CleanupStatus), sizeof(IMG_UINT32), 0, MAKEUNIQUETAG(psHostCtlMemInfo)); | ||
689 | |||
690 | |||
691 | #if defined(SGX_FEATURE_SYSTEM_CACHE) | ||
692 | psDevInfo->ui32CacheControl |= (SGXMKIF_CC_INVAL_BIF_SL | SGXMKIF_CC_INVAL_DATA); | ||
693 | #else | ||
694 | psDevInfo->ui32CacheControl |= SGXMKIF_CC_INVAL_DATA; | ||
695 | #endif | ||
606 | } | 696 | } |
607 | 697 | ||
608 | 698 | ||
@@ -1018,3 +1108,40 @@ IMG_UINT32 SGXConvertTimeStamp(PVRSRV_SGXDEV_INFO *psDevInfo, | |||
1018 | 1108 | ||
1019 | 1109 | ||
1020 | 1110 | ||
1111 | IMG_EXPORT | ||
1112 | PVRSRV_ERROR PVRSRVGetSGXRevDataKM(PVRSRV_DEVICE_NODE* psDeviceNode, IMG_UINT32 *pui32SGXCoreRev, | ||
1113 | IMG_UINT32 *pui32SGXCoreID) | ||
1114 | { | ||
1115 | PVRSRV_SGXDEV_INFO *psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice; | ||
1116 | SGX_MISC_INFO sMiscInfo; | ||
1117 | PVRSRV_ERROR eError; | ||
1118 | |||
1119 | sMiscInfo.eRequest = SGX_MISC_INFO_REQUEST_SGXREV; | ||
1120 | eError = SGXGetMiscInfoKM(psDevInfo, &sMiscInfo, psDeviceNode, NULL); | ||
1121 | |||
1122 | *pui32SGXCoreRev = sMiscInfo.uData.sSGXFeatures.ui32CoreRev; | ||
1123 | *pui32SGXCoreID = sMiscInfo.uData.sSGXFeatures.ui32CoreID; | ||
1124 | return eError; | ||
1125 | } | ||
1126 | |||
1127 | |||
1128 | PVRSRV_ERROR SGXContextSuspend(PVRSRV_DEVICE_NODE *psDeviceNode, | ||
1129 | IMG_DEV_VIRTADDR *psHWContextDevVAddr, | ||
1130 | IMG_BOOL bResume) | ||
1131 | { | ||
1132 | PVRSRV_ERROR eError; | ||
1133 | SGXMKIF_COMMAND sCommand = {0}; | ||
1134 | |||
1135 | sCommand.ui32Data[0] = psHWContextDevVAddr->uiAddr; | ||
1136 | sCommand.ui32Data[1] = bResume ? PVRSRV_CTXSUSPCMD_RESUME : PVRSRV_CTXSUSPCMD_SUSPEND; | ||
1137 | |||
1138 | eError = SGXScheduleCCBCommandKM(psDeviceNode, SGXMKIF_CMD_CONTEXTSUSPEND, &sCommand, KERNEL_ID, 0, IMG_NULL, IMG_FALSE); | ||
1139 | if (eError != PVRSRV_OK) | ||
1140 | { | ||
1141 | PVR_DPF((PVR_DBG_ERROR,"SGXContextSuspend: Failed to submit context suspend command")); | ||
1142 | return eError; | ||
1143 | } | ||
1144 | |||
1145 | return eError; | ||
1146 | } | ||
1147 | |||