diff options
Diffstat (limited to 'drivers/gpu/pvr/omap4/sysconfig.c')
-rw-r--r-- | drivers/gpu/pvr/omap4/sysconfig.c | 255 |
1 files changed, 97 insertions, 158 deletions
diff --git a/drivers/gpu/pvr/omap4/sysconfig.c b/drivers/gpu/pvr/omap4/sysconfig.c index 56ecb5ab9db..4904f2acb01 100644 --- a/drivers/gpu/pvr/omap4/sysconfig.c +++ b/drivers/gpu/pvr/omap4/sysconfig.c | |||
@@ -63,97 +63,6 @@ IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32 Ioctl, | |||
63 | IMG_UINT32 OutBufLen, | 63 | IMG_UINT32 OutBufLen, |
64 | IMG_UINT32 *pdwBytesTransferred); | 64 | IMG_UINT32 *pdwBytesTransferred); |
65 | 65 | ||
66 | #if defined(DEBUG) && defined(DUMP_OMAP34xx_CLOCKS) && defined(__linux__) | ||
67 | |||
68 | #pragma GCC diagnostic ignored "-Wstrict-prototypes" | ||
69 | #include <mach/clock.h> | ||
70 | |||
71 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)) | ||
72 | #include <../mach-omap2/clock_34xx.h> | ||
73 | #define ONCHIP_CLKS onchip_clks | ||
74 | #else | ||
75 | #include <../mach-omap2/clock34xx.h> | ||
76 | #define ONCHIP_CLKS onchip_34xx_clks | ||
77 | #endif | ||
78 | |||
79 | static void omap3_clk_recalc(struct clk *clk) {} | ||
80 | static void omap3_followparent_recalc(struct clk *clk) {} | ||
81 | static void omap3_propagate_rate(struct clk *clk) {} | ||
82 | static void omap3_table_recalc(struct clk *clk) {} | ||
83 | static long omap3_round_to_table_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
84 | static int omap3_select_table_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
85 | |||
86 | #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) | ||
87 | static void omap3_dpll_recalc(struct clk *clk, unsigned long parent_rate, | ||
88 | u8 rate_storage) {} | ||
89 | static void omap3_clkoutx2_recalc(struct clk *clk, unsigned long parent_rate, | ||
90 | u8 rate_storage) {} | ||
91 | static void omap3_dpll_allow_idle(struct clk *clk) {} | ||
92 | static void omap3_dpll_deny_idle(struct clk *clk) {} | ||
93 | static u32 omap3_dpll_autoidle_read(struct clk *clk) { return 0; } | ||
94 | static int omap3_noncore_dpll_enable(struct clk *clk) { return 0; } | ||
95 | static void omap3_noncore_dpll_disable(struct clk *clk) {} | ||
96 | static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
97 | static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
98 | void followparent_recalc(struct clk *clk, unsigned long new_parent_rate, | ||
99 | u8 rate_storage) {} | ||
100 | long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) { return 0; } | ||
101 | void omap2_clksel_recalc(struct clk *clk, unsigned long new_parent_rate, | ||
102 | u8 rate_storage) {} | ||
103 | long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) { return 0; } | ||
104 | int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) { return 0; } | ||
105 | void omap2_fixed_divisor_recalc(struct clk *clk, unsigned long new_parent_rate, | ||
106 | u8 rate_storage) {} | ||
107 | void omap2_init_clksel_parent(struct clk *clk) {} | ||
108 | #endif | ||
109 | |||
110 | static void dump_omap34xx_clocks(void) | ||
111 | { | ||
112 | struct clk **c; | ||
113 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)) | ||
114 | struct vdd_prcm_config *t1 = vdd1_rate_table; | ||
115 | struct vdd_prcm_config *t2 = vdd2_rate_table; | ||
116 | |||
117 | t1 = t1; | ||
118 | t2 = t2; | ||
119 | #else | ||
120 | |||
121 | omap3_dpll_allow_idle(0); | ||
122 | omap3_dpll_deny_idle(0); | ||
123 | omap3_dpll_autoidle_read(0); | ||
124 | omap3_clk_recalc(0); | ||
125 | omap3_followparent_recalc(0); | ||
126 | omap3_propagate_rate(0); | ||
127 | omap3_table_recalc(0); | ||
128 | omap3_round_to_table_rate(0, 0); | ||
129 | omap3_select_table_rate(0, 0); | ||
130 | #endif | ||
131 | |||
132 | for(c = ONCHIP_CLKS; c < ONCHIP_CLKS + ARRAY_SIZE(ONCHIP_CLKS); c++) | ||
133 | { | ||
134 | struct clk *cp = *c, *copy; | ||
135 | unsigned long rate; | ||
136 | copy = clk_get(NULL, cp->name); | ||
137 | if(!copy) | ||
138 | continue; | ||
139 | rate = clk_get_rate(copy); | ||
140 | if (rate < 1000000) | ||
141 | { | ||
142 | PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu KHz (%lu Hz)", __func__, cp->name, rate/1000, rate)); | ||
143 | } | ||
144 | else | ||
145 | { | ||
146 | PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu MHz (%lu Hz)", __func__, cp->name, rate/1000000, rate)); | ||
147 | } | ||
148 | } | ||
149 | } | ||
150 | |||
151 | #else | ||
152 | |||
153 | static INLINE void dump_omap34xx_clocks(void) {} | ||
154 | |||
155 | #endif | ||
156 | |||
157 | #if defined(SGX_OCP_REGS_ENABLED) | 66 | #if defined(SGX_OCP_REGS_ENABLED) |
158 | 67 | ||
159 | #define SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE (SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE + EUR_CR_OCP_REVISION) | 68 | #define SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE (SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE + EUR_CR_OCP_REVISION) |
@@ -168,6 +77,9 @@ static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) | |||
168 | if(eError == PVRSRV_OK) | 77 | if(eError == PVRSRV_OK) |
169 | { | 78 | { |
170 | OSWriteHWReg(gpvOCPRegsLinAddr, | 79 | OSWriteHWReg(gpvOCPRegsLinAddr, |
80 | EUR_CR_OCP_SYSCONFIG - EUR_CR_OCP_REVISION, | ||
81 | 0x14); | ||
82 | OSWriteHWReg(gpvOCPRegsLinAddr, | ||
171 | EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION, | 83 | EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION, |
172 | EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK); | 84 | EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK); |
173 | } | 85 | } |
@@ -175,14 +87,14 @@ static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) | |||
175 | return eError; | 87 | return eError; |
176 | } | 88 | } |
177 | 89 | ||
178 | #else | 90 | #else |
179 | 91 | ||
180 | static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) | 92 | static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) |
181 | { | 93 | { |
182 | return EnableSGXClocks(psSysData); | 94 | return EnableSGXClocks(psSysData); |
183 | } | 95 | } |
184 | 96 | ||
185 | #endif | 97 | #endif |
186 | 98 | ||
187 | static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData) | 99 | static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData) |
188 | { | 100 | { |
@@ -191,7 +103,7 @@ static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData) | |||
191 | #if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | 103 | #if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) |
192 | if(eError == PVRSRV_OK) | 104 | if(eError == PVRSRV_OK) |
193 | { | 105 | { |
194 | 106 | ||
195 | EnableSGXClocksWrap(psSysData); | 107 | EnableSGXClocksWrap(psSysData); |
196 | } | 108 | } |
197 | #endif | 109 | #endif |
@@ -208,13 +120,13 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData) | |||
208 | 120 | ||
209 | PVR_UNREFERENCED_PARAMETER(psSysData); | 121 | PVR_UNREFERENCED_PARAMETER(psSysData); |
210 | 122 | ||
211 | 123 | ||
212 | gsSGXDeviceMap.ui32Flags = 0x0; | 124 | gsSGXDeviceMap.ui32Flags = 0x0; |
213 | 125 | ||
214 | #if defined(NO_HARDWARE) | 126 | #if defined(NO_HARDWARE) |
215 | 127 | ||
216 | 128 | ||
217 | eError = OSBaseAllocContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, | 129 | eError = OSBaseAllocContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, |
218 | &gsSGXRegsCPUVAddr, | 130 | &gsSGXRegsCPUVAddr, |
219 | &sCpuPAddr); | 131 | &sCpuPAddr); |
220 | if(eError != PVRSRV_OK) | 132 | if(eError != PVRSRV_OK) |
@@ -225,21 +137,21 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData) | |||
225 | gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase); | 137 | gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase); |
226 | gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE; | 138 | gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE; |
227 | #if defined(__linux__) | 139 | #if defined(__linux__) |
228 | 140 | ||
229 | gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr; | 141 | gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr; |
230 | #else | 142 | #else |
231 | 143 | ||
232 | gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL; | 144 | gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL; |
233 | #endif | 145 | #endif |
234 | 146 | ||
235 | OSMemSet(gsSGXRegsCPUVAddr, 0, SYS_OMAP4430_SGX_REGS_SIZE); | 147 | OSMemSet(gsSGXRegsCPUVAddr, 0, SYS_OMAP4430_SGX_REGS_SIZE); |
236 | 148 | ||
237 | 149 | ||
238 | 150 | ||
239 | 151 | ||
240 | gsSGXDeviceMap.ui32IRQ = 0; | 152 | gsSGXDeviceMap.ui32IRQ = 0; |
241 | 153 | ||
242 | #else | 154 | #else |
243 | 155 | ||
244 | gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE; | 156 | gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE; |
245 | gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase); | 157 | gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase); |
@@ -251,11 +163,14 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData) | |||
251 | 163 | ||
252 | #if defined(PDUMP) | 164 | #if defined(PDUMP) |
253 | { | 165 | { |
166 | |||
254 | static IMG_CHAR pszPDumpDevName[] = "SGXMEM"; | 167 | static IMG_CHAR pszPDumpDevName[] = "SGXMEM"; |
255 | gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName; | 168 | gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName; |
256 | } | 169 | } |
257 | #endif | 170 | #endif |
258 | 171 | ||
172 | |||
173 | |||
259 | 174 | ||
260 | return PVRSRV_OK; | 175 | return PVRSRV_OK; |
261 | } | 176 | } |
@@ -318,7 +233,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
318 | IMG_UINT32 i; | 233 | IMG_UINT32 i; |
319 | PVRSRV_ERROR eError; | 234 | PVRSRV_ERROR eError; |
320 | PVRSRV_DEVICE_NODE *psDeviceNode; | 235 | PVRSRV_DEVICE_NODE *psDeviceNode; |
321 | #if !defined(NO_OMAP_TIMER) | 236 | #if !defined(PVR_NO_OMAP_TIMER) |
322 | IMG_CPU_PHYADDR TimerRegPhysBase; | 237 | IMG_CPU_PHYADDR TimerRegPhysBase; |
323 | #endif | 238 | #endif |
324 | #if !defined(SGX_DYNAMIC_TIMING_INFO) | 239 | #if !defined(SGX_DYNAMIC_TIMING_INFO) |
@@ -344,7 +259,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
344 | 259 | ||
345 | gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT; | 260 | gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT; |
346 | 261 | ||
347 | 262 | ||
348 | for(i=0; i<SYS_DEVICE_COUNT; i++) | 263 | for(i=0; i<SYS_DEVICE_COUNT; i++) |
349 | { | 264 | { |
350 | gpsSysData->sDeviceID[i].uiID = i; | 265 | gpsSysData->sDeviceID[i].uiID = i; |
@@ -363,8 +278,8 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
363 | return eError; | 278 | return eError; |
364 | } | 279 | } |
365 | 280 | ||
366 | #if !defined(NO_OMAP_TIMER) | 281 | #if !defined(PVR_NO_OMAP_TIMER) |
367 | TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE; | 282 | TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE; |
368 | gpsSysData->pvSOCTimerRegisterKM = IMG_NULL; | 283 | gpsSysData->pvSOCTimerRegisterKM = IMG_NULL; |
369 | gpsSysData->hSOCTimerRegisterOSMemHandle = 0; | 284 | gpsSysData->hSOCTimerRegisterOSMemHandle = 0; |
370 | OSReservePhys(TimerRegPhysBase, | 285 | OSReservePhys(TimerRegPhysBase, |
@@ -372,27 +287,27 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
372 | PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED, | 287 | PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED, |
373 | (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM, | 288 | (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM, |
374 | &gpsSysData->hSOCTimerRegisterOSMemHandle); | 289 | &gpsSysData->hSOCTimerRegisterOSMemHandle); |
375 | #endif | 290 | #endif |
376 | 291 | ||
377 | #if !defined(SGX_DYNAMIC_TIMING_INFO) | 292 | #if !defined(SGX_DYNAMIC_TIMING_INFO) |
378 | 293 | ||
379 | psTimingInfo = &gsSGXDeviceMap.sTimingInfo; | 294 | psTimingInfo = &gsSGXDeviceMap.sTimingInfo; |
380 | psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED; | 295 | psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED; |
381 | psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; | 296 | psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ; |
382 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | 297 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) |
383 | psTimingInfo->bEnableActivePM = IMG_TRUE; | 298 | psTimingInfo->bEnableActivePM = IMG_TRUE; |
384 | #else | 299 | #else |
385 | psTimingInfo->bEnableActivePM = IMG_FALSE; | 300 | psTimingInfo->bEnableActivePM = IMG_FALSE; |
386 | #endif | 301 | #endif |
387 | psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; | 302 | psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; |
388 | psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ; | 303 | psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ; |
389 | #endif | 304 | #endif |
390 | 305 | ||
391 | 306 | ||
392 | 307 | ||
393 | gpsSysSpecificData->ui32SrcClockDiv = 3; | 308 | gpsSysSpecificData->ui32SrcClockDiv = 3; |
394 | 309 | ||
395 | 310 | ||
396 | 311 | ||
397 | 312 | ||
398 | 313 | ||
@@ -428,6 +343,18 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
428 | } | 343 | } |
429 | #endif | 344 | #endif |
430 | 345 | ||
346 | eError = SysPMRuntimeRegister(); | ||
347 | if (eError != PVRSRV_OK) | ||
348 | { | ||
349 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register with OSPM!")); | ||
350 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
351 | gpsSysData = IMG_NULL; | ||
352 | return eError; | ||
353 | } | ||
354 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME); | ||
355 | |||
356 | |||
357 | |||
431 | 358 | ||
432 | eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice, | 359 | eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice, |
433 | DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID); | 360 | DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID); |
@@ -440,13 +367,14 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
440 | } | 367 | } |
441 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV); | 368 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV); |
442 | 369 | ||
370 | |||
443 | 371 | ||
444 | 372 | ||
445 | 373 | ||
446 | psDeviceNode = gpsSysData->psDeviceNodeList; | 374 | psDeviceNode = gpsSysData->psDeviceNodeList; |
447 | while(psDeviceNode) | 375 | while(psDeviceNode) |
448 | { | 376 | { |
449 | 377 | ||
450 | switch(psDeviceNode->sDevId.eDeviceType) | 378 | switch(psDeviceNode->sDevId.eDeviceType) |
451 | { | 379 | { |
452 | case PVRSRV_DEVICE_TYPE_SGX: | 380 | case PVRSRV_DEVICE_TYPE_SGX: |
@@ -454,16 +382,16 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
454 | DEVICE_MEMORY_INFO *psDevMemoryInfo; | 382 | DEVICE_MEMORY_INFO *psDevMemoryInfo; |
455 | DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap; | 383 | DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap; |
456 | 384 | ||
457 | 385 | ||
458 | 386 | ||
459 | 387 | ||
460 | psDeviceNode->psLocalDevMemArena = IMG_NULL; | 388 | psDeviceNode->psLocalDevMemArena = IMG_NULL; |
461 | 389 | ||
462 | 390 | ||
463 | psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo; | 391 | psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo; |
464 | psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap; | 392 | psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap; |
465 | 393 | ||
466 | 394 | ||
467 | for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++) | 395 | for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++) |
468 | { | 396 | { |
469 | psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG; | 397 | psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG; |
@@ -479,7 +407,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
479 | return PVRSRV_ERROR_INIT_FAILURE; | 407 | return PVRSRV_ERROR_INIT_FAILURE; |
480 | } | 408 | } |
481 | 409 | ||
482 | 410 | ||
483 | psDeviceNode = psDeviceNode->psNext; | 411 | psDeviceNode = psDeviceNode->psNext; |
484 | } | 412 | } |
485 | 413 | ||
@@ -501,9 +429,7 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
501 | gpsSysData = IMG_NULL; | 429 | gpsSysData = IMG_NULL; |
502 | return eError; | 430 | return eError; |
503 | } | 431 | } |
504 | #endif | 432 | #endif |
505 | |||
506 | dump_omap34xx_clocks(); | ||
507 | 433 | ||
508 | eError = PVRSRVInitialiseDevice(gui32SGXDeviceID); | 434 | eError = PVRSRVInitialiseDevice(gui32SGXDeviceID); |
509 | if (eError != PVRSRV_OK) | 435 | if (eError != PVRSRV_OK) |
@@ -516,9 +442,9 @@ PVRSRV_ERROR SysInitialise(IMG_VOID) | |||
516 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV); | 442 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV); |
517 | 443 | ||
518 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | 444 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) |
519 | 445 | ||
520 | DisableSGXClocks(gpsSysData); | 446 | DisableSGXClocks(gpsSysData); |
521 | #endif | 447 | #endif |
522 | 448 | ||
523 | return PVRSRV_OK; | 449 | return PVRSRV_OK; |
524 | } | 450 | } |
@@ -535,7 +461,7 @@ PVRSRV_ERROR SysFinalise(IMG_VOID) | |||
535 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError)); | 461 | PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError)); |
536 | return eError; | 462 | return eError; |
537 | } | 463 | } |
538 | #endif | 464 | #endif |
539 | 465 | ||
540 | eError = OSInstallMISR(gpsSysData); | 466 | eError = OSInstallMISR(gpsSysData); |
541 | if (eError != PVRSRV_OK) | 467 | if (eError != PVRSRV_OK) |
@@ -546,7 +472,7 @@ PVRSRV_ERROR SysFinalise(IMG_VOID) | |||
546 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR); | 472 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR); |
547 | 473 | ||
548 | #if defined(SYS_USING_INTERRUPTS) | 474 | #if defined(SYS_USING_INTERRUPTS) |
549 | 475 | ||
550 | eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode); | 476 | eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode); |
551 | if (eError != PVRSRV_OK) | 477 | if (eError != PVRSRV_OK) |
552 | { | 478 | { |
@@ -554,9 +480,10 @@ PVRSRV_ERROR SysFinalise(IMG_VOID) | |||
554 | return eError; | 480 | return eError; |
555 | } | 481 | } |
556 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); | 482 | SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR); |
557 | #endif | 483 | #endif |
558 | |||
559 | 484 | ||
485 | #if defined(__linux__) | ||
486 | |||
560 | gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase); | 487 | gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase); |
561 | if (!gpsSysData->pszVersionString) | 488 | if (!gpsSysData->pszVersionString) |
562 | { | 489 | { |
@@ -566,11 +493,12 @@ PVRSRV_ERROR SysFinalise(IMG_VOID) | |||
566 | { | 493 | { |
567 | PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString)); | 494 | PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString)); |
568 | } | 495 | } |
496 | #endif | ||
569 | 497 | ||
570 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) | 498 | #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) |
571 | 499 | ||
572 | DisableSGXClocks(gpsSysData); | 500 | DisableSGXClocks(gpsSysData); |
573 | #endif | 501 | #endif |
574 | 502 | ||
575 | gpsSysSpecificData->bSGXInitComplete = IMG_TRUE; | 503 | gpsSysSpecificData->bSGXInitComplete = IMG_TRUE; |
576 | 504 | ||
@@ -592,7 +520,7 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData) | |||
592 | return eError; | 520 | return eError; |
593 | } | 521 | } |
594 | } | 522 | } |
595 | #endif | 523 | #endif |
596 | 524 | ||
597 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR)) | 525 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR)) |
598 | { | 526 | { |
@@ -625,14 +553,26 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData) | |||
625 | return eError; | 553 | return eError; |
626 | } | 554 | } |
627 | } | 555 | } |
628 | 556 | ||
557 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME)) | ||
558 | { | ||
559 | eError = SysPMRuntimeUnregister(); | ||
560 | if (eError != PVRSRV_OK) | ||
561 | { | ||
562 | PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!")); | ||
563 | (IMG_VOID)SysDeinitialise(gpsSysData); | ||
564 | gpsSysData = IMG_NULL; | ||
565 | return eError; | ||
566 | } | ||
567 | } | ||
568 | |||
629 | #if defined(SGX_OCP_REGS_ENABLED) | 569 | #if defined(SGX_OCP_REGS_ENABLED) |
630 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_OCPREGS)) | 570 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_OCPREGS)) |
631 | { | 571 | { |
632 | OSUnMapPhysToLin(gpvOCPRegsLinAddr, | 572 | OSUnMapPhysToLin(gpvOCPRegsLinAddr, |
633 | SYS_OMAP4430_OCP_REGS_SIZE, | 573 | SYS_OMAP4430_OCP_REGS_SIZE, |
634 | PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, | 574 | PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, |
635 | IMG_NULL); | 575 | IMG_NULL); |
636 | } | 576 | } |
637 | #endif | 577 | #endif |
638 | 578 | ||
@@ -644,7 +584,7 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData) | |||
644 | } | 584 | } |
645 | 585 | ||
646 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA)) | 586 | if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA)) |
647 | { | 587 | { |
648 | eError = OSDeInitEnvData(gpsSysData->pvEnvSpecificData); | 588 | eError = OSDeInitEnvData(gpsSysData->pvEnvSpecificData); |
649 | if (eError != PVRSRV_OK) | 589 | if (eError != PVRSRV_OK) |
650 | { | 590 | { |
@@ -653,7 +593,6 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData) | |||
653 | } | 593 | } |
654 | } | 594 | } |
655 | 595 | ||
656 | #if !defined(NO_OMAP_TIMER) | ||
657 | if(gpsSysData->pvSOCTimerRegisterKM) | 596 | if(gpsSysData->pvSOCTimerRegisterKM) |
658 | { | 597 | { |
659 | OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM, | 598 | OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM, |
@@ -661,18 +600,18 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData) | |||
661 | PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED, | 600 | PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED, |
662 | gpsSysData->hSOCTimerRegisterOSMemHandle); | 601 | gpsSysData->hSOCTimerRegisterOSMemHandle); |
663 | } | 602 | } |
664 | #endif | ||
665 | 603 | ||
666 | SysDeinitialiseCommon(gpsSysData); | 604 | SysDeinitialiseCommon(gpsSysData); |
667 | 605 | ||
668 | #if defined(NO_HARDWARE) | 606 | #if defined(NO_HARDWARE) |
669 | if(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV)) | 607 | if(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV)) |
670 | { | 608 | { |
671 | 609 | ||
672 | OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase); | 610 | OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase); |
673 | } | 611 | } |
674 | #endif | 612 | #endif |
675 | 613 | ||
614 | |||
676 | gpsSysSpecificData->ui32SysSpecificData = 0; | 615 | gpsSysSpecificData->ui32SysSpecificData = 0; |
677 | gpsSysSpecificData->bSGXInitComplete = IMG_FALSE; | 616 | gpsSysSpecificData->bSGXInitComplete = IMG_FALSE; |
678 | 617 | ||
@@ -690,7 +629,7 @@ PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE eDeviceType, | |||
690 | { | 629 | { |
691 | case PVRSRV_DEVICE_TYPE_SGX: | 630 | case PVRSRV_DEVICE_TYPE_SGX: |
692 | { | 631 | { |
693 | 632 | ||
694 | *ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap; | 633 | *ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap; |
695 | 634 | ||
696 | break; | 635 | break; |
@@ -711,9 +650,9 @@ IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, | |||
711 | 650 | ||
712 | PVR_UNREFERENCED_PARAMETER(eDeviceType); | 651 | PVR_UNREFERENCED_PARAMETER(eDeviceType); |
713 | 652 | ||
714 | 653 | ||
715 | DevPAddr.uiAddr = CpuPAddr.uiAddr; | 654 | DevPAddr.uiAddr = CpuPAddr.uiAddr; |
716 | 655 | ||
717 | return DevPAddr; | 656 | return DevPAddr; |
718 | } | 657 | } |
719 | 658 | ||
@@ -721,7 +660,7 @@ IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr) | |||
721 | { | 660 | { |
722 | IMG_CPU_PHYADDR cpu_paddr; | 661 | IMG_CPU_PHYADDR cpu_paddr; |
723 | 662 | ||
724 | 663 | ||
725 | cpu_paddr.uiAddr = sys_paddr.uiAddr; | 664 | cpu_paddr.uiAddr = sys_paddr.uiAddr; |
726 | return cpu_paddr; | 665 | return cpu_paddr; |
727 | } | 666 | } |
@@ -730,7 +669,7 @@ IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr) | |||
730 | { | 669 | { |
731 | IMG_SYS_PHYADDR sys_paddr; | 670 | IMG_SYS_PHYADDR sys_paddr; |
732 | 671 | ||
733 | 672 | ||
734 | sys_paddr.uiAddr = cpu_paddr.uiAddr; | 673 | sys_paddr.uiAddr = cpu_paddr.uiAddr; |
735 | return sys_paddr; | 674 | return sys_paddr; |
736 | } | 675 | } |
@@ -742,7 +681,7 @@ IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PH | |||
742 | 681 | ||
743 | PVR_UNREFERENCED_PARAMETER(eDeviceType); | 682 | PVR_UNREFERENCED_PARAMETER(eDeviceType); |
744 | 683 | ||
745 | 684 | ||
746 | DevPAddr.uiAddr = SysPAddr.uiAddr; | 685 | DevPAddr.uiAddr = SysPAddr.uiAddr; |
747 | 686 | ||
748 | return DevPAddr; | 687 | return DevPAddr; |
@@ -755,7 +694,7 @@ IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PH | |||
755 | 694 | ||
756 | PVR_UNREFERENCED_PARAMETER(eDeviceType); | 695 | PVR_UNREFERENCED_PARAMETER(eDeviceType); |
757 | 696 | ||
758 | 697 | ||
759 | SysPAddr.uiAddr = DevPAddr.uiAddr; | 698 | SysPAddr.uiAddr = DevPAddr.uiAddr; |
760 | 699 | ||
761 | return SysPAddr; | 700 | return SysPAddr; |
@@ -779,10 +718,10 @@ IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData, | |||
779 | { | 718 | { |
780 | PVR_UNREFERENCED_PARAMETER(psSysData); | 719 | PVR_UNREFERENCED_PARAMETER(psSysData); |
781 | #if defined(NO_HARDWARE) | 720 | #if defined(NO_HARDWARE) |
782 | 721 | ||
783 | return 0xFFFFFFFF; | 722 | return 0xFFFFFFFF; |
784 | #else | 723 | #else |
785 | 724 | ||
786 | return psDeviceNode->ui32SOCInterruptBit; | 725 | return psDeviceNode->ui32SOCInterruptBit; |
787 | #endif | 726 | #endif |
788 | } | 727 | } |
@@ -793,7 +732,7 @@ IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits) | |||
793 | PVR_UNREFERENCED_PARAMETER(psSysData); | 732 | PVR_UNREFERENCED_PARAMETER(psSysData); |
794 | PVR_UNREFERENCED_PARAMETER(ui32ClearBits); | 733 | PVR_UNREFERENCED_PARAMETER(ui32ClearBits); |
795 | 734 | ||
796 | 735 | ||
797 | OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, | 736 | OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, |
798 | EUR_CR_EVENT_HOST_CLEAR); | 737 | EUR_CR_EVENT_HOST_CLEAR); |
799 | } | 738 | } |
@@ -908,9 +847,9 @@ PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex, | |||
908 | PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3")); | 847 | PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3")); |
909 | DisableSGXClocks(gpsSysData); | 848 | DisableSGXClocks(gpsSysData); |
910 | } | 849 | } |
911 | #else | 850 | #else |
912 | PVR_UNREFERENCED_PARAMETER(eNewPowerState ); | 851 | PVR_UNREFERENCED_PARAMETER(eNewPowerState ); |
913 | #endif | 852 | #endif |
914 | return PVRSRV_OK; | 853 | return PVRSRV_OK; |
915 | } | 854 | } |
916 | 855 | ||
@@ -934,9 +873,9 @@ PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex, | |||
934 | PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3")); | 873 | PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3")); |
935 | eError = EnableSGXClocksWrap(gpsSysData); | 874 | eError = EnableSGXClocksWrap(gpsSysData); |
936 | } | 875 | } |
937 | #else | 876 | #else |
938 | PVR_UNREFERENCED_PARAMETER(eCurrentPowerState); | 877 | PVR_UNREFERENCED_PARAMETER(eCurrentPowerState); |
939 | #endif | 878 | #endif |
940 | 879 | ||
941 | return eError; | 880 | return eError; |
942 | } | 881 | } |
@@ -957,7 +896,7 @@ PVRSRV_ERROR SysOEMFunction ( IMG_UINT32 ui32ID, | |||
957 | if ((ui32ID == OEM_GET_EXT_FUNCS) && | 896 | if ((ui32ID == OEM_GET_EXT_FUNCS) && |
958 | (ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE))) | 897 | (ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE))) |
959 | { | 898 | { |
960 | 899 | ||
961 | PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut; | 900 | PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut; |
962 | psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM; | 901 | psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM; |
963 | return PVRSRV_OK; | 902 | return PVRSRV_OK; |