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authorHemant Hariyani <hemanthariyani@ti.com>2011-08-25 03:01:10 -0400
committerPaolo Pisati <paolo.pisati@canonical.com>2012-08-17 04:18:39 -0400
commitb7f68b0d0649bec8d50054b78873ca40b267321b (patch)
tree56e9917cfa159b1728721dbae9d8c46f33bc2699 /drivers/gpu/pvr/omap4
parent8827e270c06639a9a89390799c8860bf9640ec5f (diff)
OMAP4: SGX-KM: Upgrade DDK to version 1.7.17.4403
This patch upgrades the kernel side graphics driver to version 1.7.17.4403. The corresponding change in the user side must be in place for this to work. Change-Id: Id3a713fa22a227dbcd0ec098589d62b350802247 Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
Diffstat (limited to 'drivers/gpu/pvr/omap4')
-rw-r--r--drivers/gpu/pvr/omap4/sysconfig.c239
-rw-r--r--drivers/gpu/pvr/omap4/sysconfig.h12
-rw-r--r--drivers/gpu/pvr/omap4/syslocal.h61
-rw-r--r--drivers/gpu/pvr/omap4/sysutils_linux.c308
4 files changed, 341 insertions, 279 deletions
diff --git a/drivers/gpu/pvr/omap4/sysconfig.c b/drivers/gpu/pvr/omap4/sysconfig.c
index f08bf8e13fc..5c82be77d46 100644
--- a/drivers/gpu/pvr/omap4/sysconfig.c
+++ b/drivers/gpu/pvr/omap4/sysconfig.c
@@ -24,28 +24,18 @@
24 * 24 *
25 ******************************************************************************/ 25 ******************************************************************************/
26 26
27#include "sysconfig.h"
27#include "services_headers.h" 28#include "services_headers.h"
28#include "kerneldisplay.h" 29#include "kerneldisplay.h"
29#include "oemfuncs.h" 30#include "oemfuncs.h"
30#include "sgxinfo.h" 31#include "sgxinfo.h"
31#include "sgxinfokm.h" 32#include "sgxinfokm.h"
32#include "syslocal.h" 33#include "syslocal.h"
33#include "sysconfig.h"
34
35#include <linux/platform_device.h>
36#include <plat/omap_device.h>
37#include <plat/omap-pm.h>
38 34
39#include "ocpdefs.h" 35#include "ocpdefs.h"
40 36
41#if !defined(NO_HARDWARE) && \ 37#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
42 defined(SYS_USING_INTERRUPTS) && \ 38#include <plat/omap_device.h>
43 defined(SGX540)
44#define SGX_OCP_REGS_ENABLED
45#endif
46
47#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
48extern struct platform_device *gpsPVRLDMDev;
49#endif 39#endif
50 40
51SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL; 41SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL;
@@ -60,10 +50,14 @@ static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
60 50
61#define DEVICE_SGX_INTERRUPT (1 << 0) 51#define DEVICE_SGX_INTERRUPT (1 << 0)
62 52
63#if defined(NO_HARDWARE) 53#if defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED)
64static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr; 54static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr;
65#endif 55#endif
66 56
57#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
58extern struct platform_device *gpsPVRLDMDev;
59#endif
60
67IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32 Ioctl, 61IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32 Ioctl,
68 IMG_BYTE *pInBuf, 62 IMG_BYTE *pInBuf,
69 IMG_UINT32 InBufLen, 63 IMG_UINT32 InBufLen,
@@ -73,25 +67,19 @@ IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32 Ioctl,
73 67
74#if defined(SGX_OCP_REGS_ENABLED) 68#if defined(SGX_OCP_REGS_ENABLED)
75 69
76#define SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE (SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE + EUR_CR_OCP_REVISION)
77#define SYS_OMAP4430_OCP_REGS_SIZE 0x110
78
79static IMG_CPU_VIRTADDR gpvOCPRegsLinAddr; 70static IMG_CPU_VIRTADDR gpvOCPRegsLinAddr;
80 71
81static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData) 72static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
82{ 73{
83 PVRSRV_ERROR eError = EnableSGXClocks(psSysData); 74 PVRSRV_ERROR eError = EnableSGXClocks(psSysData);
84 75
76#if !defined(SGX_OCP_NO_INT_BYPASS)
85 if(eError == PVRSRV_OK) 77 if(eError == PVRSRV_OK)
86 { 78 {
87 OSWriteHWReg(gpvOCPRegsLinAddr, 79 OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_SYSCONFIG, 0x14);
88 EUR_CR_OCP_SYSCONFIG - EUR_CR_OCP_REVISION, 80 OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_DEBUG_CONFIG, EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK);
89 0x14);
90 OSWriteHWReg(gpvOCPRegsLinAddr,
91 EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION,
92 EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK);
93 } 81 }
94 82#endif
95 return eError; 83 return eError;
96} 84}
97 85
@@ -112,7 +100,11 @@ static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
112 if(eError == PVRSRV_OK) 100 if(eError == PVRSRV_OK)
113 { 101 {
114 102
115 EnableSGXClocksWrap(psSysData); 103 eError = EnableSGXClocksWrap(psSysData);
104 if (eError != PVRSRV_OK)
105 {
106 DisableSystemClocks(psSysData);
107 }
116 } 108 }
117#endif 109#endif
118 110
@@ -124,6 +116,11 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
124#if defined(NO_HARDWARE) 116#if defined(NO_HARDWARE)
125 PVRSRV_ERROR eError; 117 PVRSRV_ERROR eError;
126 IMG_CPU_PHYADDR sCpuPAddr; 118 IMG_CPU_PHYADDR sCpuPAddr;
119#else
120#if defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO)
121 struct resource *dev_res;
122 int dev_irq;
123#endif
127#endif 124#endif
128 125
129 PVR_UNREFERENCED_PARAMETER(psSysData); 126 PVR_UNREFERENCED_PARAMETER(psSysData);
@@ -134,7 +131,9 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
134#if defined(NO_HARDWARE) 131#if defined(NO_HARDWARE)
135 132
136 133
137 eError = OSBaseAllocContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, 134 gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE;
135
136 eError = OSBaseAllocContigMemory(gsSGXDeviceMap.ui32RegsSize,
138 &gsSGXRegsCPUVAddr, 137 &gsSGXRegsCPUVAddr,
139 &sCpuPAddr); 138 &sCpuPAddr);
140 if(eError != PVRSRV_OK) 139 if(eError != PVRSRV_OK)
@@ -143,7 +142,6 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
143 } 142 }
144 gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr; 143 gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr;
145 gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase); 144 gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase);
146 gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE;
147#if defined(__linux__) 145#if defined(__linux__)
148 146
149 gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr; 147 gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
@@ -152,7 +150,7 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
152 gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL; 150 gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL;
153#endif 151#endif
154 152
155 OSMemSet(gsSGXRegsCPUVAddr, 0, SYS_OMAP4430_SGX_REGS_SIZE); 153 OSMemSet(gsSGXRegsCPUVAddr, 0, gsSGXDeviceMap.ui32RegsSize);
156 154
157 155
158 156
@@ -160,13 +158,56 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
160 gsSGXDeviceMap.ui32IRQ = 0; 158 gsSGXDeviceMap.ui32IRQ = 0;
161 159
162#else 160#else
161#if defined(PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO)
162
163 dev_res = platform_get_resource(gpsPVRLDMDev, IORESOURCE_MEM, 0);
164 if (dev_res == NULL)
165 {
166 PVR_DPF((PVR_DBG_ERROR, "%s: platform_get_resource failed", __FUNCTION__));
167 return PVRSRV_ERROR_INVALID_DEVICE;
168 }
169
170 dev_irq = platform_get_irq(gpsPVRLDMDev, 0);
171 if (dev_irq < 0)
172 {
173 PVR_DPF((PVR_DBG_ERROR, "%s: platform_get_irq failed (%d)", __FUNCTION__, -dev_irq));
174 return PVRSRV_ERROR_INVALID_DEVICE;
175 }
176
177 gsSGXDeviceMap.sRegsSysPBase.uiAddr = dev_res->start;
178 gsSGXDeviceMap.sRegsCpuPBase =
179 SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
180 PVR_TRACE(("SGX register base: 0x%lx", (unsigned long)gsSGXDeviceMap.sRegsCpuPBase.uiAddr));
163 181
182 gsSGXDeviceMap.ui32RegsSize = (unsigned int)(dev_res->end - dev_res->start);
183 PVR_TRACE(("SGX register size: %d",gsSGXDeviceMap.ui32RegsSize));
184
185 gsSGXDeviceMap.ui32IRQ = dev_irq;
186 PVR_TRACE(("SGX IRQ: %d", gsSGXDeviceMap.ui32IRQ));
187#else
164 gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE; 188 gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP4430_SGX_REGS_SYS_PHYS_BASE;
165 gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase); 189 gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
166 gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE; 190 gsSGXDeviceMap.ui32RegsSize = SYS_OMAP4430_SGX_REGS_SIZE;
167 191
168 gsSGXDeviceMap.ui32IRQ = SYS_OMAP4430_SGX_IRQ; 192 gsSGXDeviceMap.ui32IRQ = SYS_OMAP4430_SGX_IRQ;
169 193
194#endif
195#if defined(SGX_OCP_REGS_ENABLED)
196 gsSGXRegsCPUVAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
197 gsSGXDeviceMap.ui32RegsSize,
198 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
199 IMG_NULL);
200
201 if (gsSGXRegsCPUVAddr == IMG_NULL)
202 {
203 PVR_DPF((PVR_DBG_ERROR,"SysLocateDevices: Failed to map SGX registers"));
204 return PVRSRV_ERROR_BAD_MAPPING;
205 }
206
207
208 gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
209 gpvOCPRegsLinAddr = gsSGXRegsCPUVAddr;
210#endif
170#endif 211#endif
171 212
172#if defined(PDUMP) 213#if defined(PDUMP)
@@ -184,7 +225,7 @@ static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
184} 225}
185 226
186 227
187IMG_CHAR *SysCreateVersionString(IMG_CPU_PHYADDR sRegRegion) 228static IMG_CHAR *SysCreateVersionString(void)
188{ 229{
189 static IMG_CHAR aszVersionString[100]; 230 static IMG_CHAR aszVersionString[100];
190 SYS_DATA *psSysData; 231 SYS_DATA *psSysData;
@@ -193,8 +234,8 @@ IMG_CHAR *SysCreateVersionString(IMG_CPU_PHYADDR sRegRegion)
193#if !defined(NO_HARDWARE) 234#if !defined(NO_HARDWARE)
194 IMG_VOID *pvRegsLinAddr; 235 IMG_VOID *pvRegsLinAddr;
195 236
196 pvRegsLinAddr = OSMapPhysToLin(sRegRegion, 237 pvRegsLinAddr = OSMapPhysToLin(gsSGXDeviceMap.sRegsCpuPBase,
197 SYS_OMAP4430_SGX_REGS_SIZE, 238 gsSGXDeviceMap.ui32RegsSize,
198 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY, 239 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
199 IMG_NULL); 240 IMG_NULL);
200 if(!pvRegsLinAddr) 241 if(!pvRegsLinAddr)
@@ -286,17 +327,6 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
286 return eError; 327 return eError;
287 } 328 }
288 329
289#if !defined(PVR_NO_OMAP_TIMER)
290 TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
291 gpsSysData->pvSOCTimerRegisterKM = IMG_NULL;
292 gpsSysData->hSOCTimerRegisterOSMemHandle = 0;
293 OSReservePhys(TimerRegPhysBase,
294 4,
295 PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
296 (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
297 &gpsSysData->hSOCTimerRegisterOSMemHandle);
298#endif
299
300#if !defined(SGX_DYNAMIC_TIMING_INFO) 330#if !defined(SGX_DYNAMIC_TIMING_INFO)
301 331
302 psTimingInfo = &gsSGXDeviceMap.sTimingInfo; 332 psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
@@ -329,28 +359,6 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
329 } 359 }
330 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV); 360 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
331 361
332#if defined(SGX_OCP_REGS_ENABLED)
333 {
334 IMG_SYS_PHYADDR sOCPRegsSysPBase;
335 IMG_CPU_PHYADDR sOCPRegsCpuPBase;
336
337 sOCPRegsSysPBase.uiAddr = SYS_OMAP4430_OCP_REGS_SYS_PHYS_BASE;
338 sOCPRegsCpuPBase = SysSysPAddrToCpuPAddr(sOCPRegsSysPBase);
339
340 gpvOCPRegsLinAddr = OSMapPhysToLin(sOCPRegsCpuPBase,
341 SYS_OMAP4430_OCP_REGS_SIZE,
342 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
343 IMG_NULL);
344
345 if (gpvOCPRegsLinAddr == IMG_NULL)
346 {
347 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to map OCP registers"));
348 return PVRSRV_ERROR_BAD_MAPPING;
349 }
350 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_OCPREGS);
351 }
352#endif
353
354 eError = SysPMRuntimeRegister(); 362 eError = SysPMRuntimeRegister();
355 if (eError != PVRSRV_OK) 363 if (eError != PVRSRV_OK)
356 { 364 {
@@ -419,8 +427,10 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
419 psDeviceNode = psDeviceNode->psNext; 427 psDeviceNode = psDeviceNode->psNext;
420 } 428 }
421 429
430#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
422 omap_device_set_rate(&gpsPVRLDMDev->dev, 431 omap_device_set_rate(&gpsPVRLDMDev->dev,
423 &gpsPVRLDMDev->dev, SYS_SGX_CLOCK_SPEED); 432 &gpsPVRLDMDev->dev, SYS_SGX_CLOCK_SPEED);
433#endif
424 434
425 eError = EnableSystemClocksWrap(gpsSysData); 435 eError = EnableSystemClocksWrap(gpsSysData);
426 if (eError != PVRSRV_OK) 436 if (eError != PVRSRV_OK)
@@ -457,6 +467,24 @@ PVRSRV_ERROR SysInitialise(IMG_VOID)
457 DisableSGXClocks(gpsSysData); 467 DisableSGXClocks(gpsSysData);
458#endif 468#endif
459 469
470#if !defined(PVR_NO_OMAP_TIMER)
471#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
472 TimerRegPhysBase = gsSysSpecificData.sTimerRegPhysBase;
473#else
474 TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
475#endif
476 gpsSysData->pvSOCTimerRegisterKM = IMG_NULL;
477 gpsSysData->hSOCTimerRegisterOSMemHandle = 0;
478 if (TimerRegPhysBase.uiAddr != 0)
479 {
480 OSReservePhys(TimerRegPhysBase,
481 4,
482 PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
483 (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
484 &gpsSysData->hSOCTimerRegisterOSMemHandle);
485 }
486#endif
487
460 return PVRSRV_OK; 488 return PVRSRV_OK;
461} 489}
462 490
@@ -495,14 +523,14 @@ PVRSRV_ERROR SysFinalise(IMG_VOID)
495 523
496#if defined(__linux__) 524#if defined(__linux__)
497 525
498 gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase); 526 gpsSysData->pszVersionString = SysCreateVersionString();
499 if (!gpsSysData->pszVersionString) 527 if (!gpsSysData->pszVersionString)
500 { 528 {
501 PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string")); 529 PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string"));
502 } 530 }
503 else 531 else
504 { 532 {
505 PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString)); 533 PVR_TRACE(("SysFinalise: Version string: %s", gpsSysData->pszVersionString));
506 } 534 }
507#endif 535#endif
508 536
@@ -521,6 +549,14 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
521{ 549{
522 PVRSRV_ERROR eError; 550 PVRSRV_ERROR eError;
523 551
552 if(gpsSysData->pvSOCTimerRegisterKM)
553 {
554 OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
555 4,
556 PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
557 gpsSysData->hSOCTimerRegisterOSMemHandle);
558 }
559
524#if defined(SYS_USING_INTERRUPTS) 560#if defined(SYS_USING_INTERRUPTS)
525 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR)) 561 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR))
526 { 562 {
@@ -571,22 +607,11 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
571 if (eError != PVRSRV_OK) 607 if (eError != PVRSRV_OK)
572 { 608 {
573 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!")); 609 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: Failed to unregister with OSPM!"));
574 (IMG_VOID)SysDeinitialise(gpsSysData);
575 gpsSysData = IMG_NULL; 610 gpsSysData = IMG_NULL;
576 return eError; 611 return eError;
577 } 612 }
578 } 613 }
579 614
580#if defined(SGX_OCP_REGS_ENABLED)
581 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_OCPREGS))
582 {
583 OSUnMapPhysToLin(gpvOCPRegsLinAddr,
584 SYS_OMAP4430_OCP_REGS_SIZE,
585 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
586 IMG_NULL);
587 }
588#endif
589
590 615
591 616
592 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS)) 617 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
@@ -604,21 +629,26 @@ PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
604 } 629 }
605 } 630 }
606 631
607 if(gpsSysData->pvSOCTimerRegisterKM)
608 {
609 OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
610 4,
611 PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
612 gpsSysData->hSOCTimerRegisterOSMemHandle);
613 }
614
615 SysDeinitialiseCommon(gpsSysData); 632 SysDeinitialiseCommon(gpsSysData);
616 633
617#if defined(NO_HARDWARE) 634#if defined(NO_HARDWARE) || defined(SGX_OCP_REGS_ENABLED)
618 if(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV)) 635 if(gsSGXRegsCPUVAddr != IMG_NULL)
619 { 636 {
637#if defined(NO_HARDWARE)
620 638
621 OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase); 639 OSBaseFreeContigMemory(SYS_OMAP4430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
640#else
641#if defined(SGX_OCP_REGS_ENABLED)
642 OSUnMapPhysToLin(gsSGXRegsCPUVAddr,
643 gsSGXDeviceMap.ui32RegsSize,
644 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
645 IMG_NULL);
646
647 gpvOCPRegsLinAddr = IMG_NULL;
648#endif
649#endif
650 gsSGXRegsCPUVAddr = IMG_NULL;
651 gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
622 } 652 }
623#endif 653#endif
624 654
@@ -740,14 +770,41 @@ IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData,
740 770
741IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits) 771IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits)
742{ 772{
743 PVR_UNREFERENCED_PARAMETER(psSysData);
744 PVR_UNREFERENCED_PARAMETER(ui32ClearBits); 773 PVR_UNREFERENCED_PARAMETER(ui32ClearBits);
745 774#if defined(NO_HARDWARE)
775 PVR_UNREFERENCED_PARAMETER(psSysData);
776#else
777#if defined(SGX_OCP_NO_INT_BYPASS)
778 OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQSTATUS_2, 0x1);
779#endif
746 780
747 OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, 781 OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR);
748 EUR_CR_EVENT_HOST_CLEAR); 782#endif
749} 783}
750 784
785#if defined(SGX_OCP_NO_INT_BYPASS)
786IMG_VOID SysEnableSGXInterrupts(SYS_DATA *psSysData)
787{
788 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
789 if (SYS_SPECIFIC_DATA_TEST(psSysSpecData, SYS_SPECIFIC_DATA_ENABLE_LISR) && !SYS_SPECIFIC_DATA_TEST(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED))
790 {
791 OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQSTATUS_2, 0x1);
792 OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQENABLE_SET_2, 0x1);
793 SYS_SPECIFIC_DATA_SET(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED);
794 }
795}
796
797IMG_VOID SysDisableSGXInterrupts(SYS_DATA *psSysData)
798{
799 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
800
801 if (SYS_SPECIFIC_DATA_TEST(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED))
802 {
803 OSWriteHWReg(gpvOCPRegsLinAddr, EUR_CR_OCP_IRQENABLE_CLR_2, 0x1);
804 SYS_SPECIFIC_DATA_CLEAR(psSysSpecData, SYS_SPECIFIC_DATA_IRQ_ENABLED);
805 }
806}
807#endif
751 808
752PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState) 809PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
753{ 810{
diff --git a/drivers/gpu/pvr/omap4/sysconfig.h b/drivers/gpu/pvr/omap4/sysconfig.h
index 46930b54da9..8e84def99c0 100644
--- a/drivers/gpu/pvr/omap4/sysconfig.h
+++ b/drivers/gpu/pvr/omap4/sysconfig.h
@@ -27,8 +27,6 @@
27#if !defined(__SOCCONFIG_H__) 27#if !defined(__SOCCONFIG_H__)
28#define __SOCCONFIG_H__ 28#define __SOCCONFIG_H__
29 29
30#include "syscommon.h"
31
32#define VS_PRODUCT_NAME "OMAP4" 30#define VS_PRODUCT_NAME "OMAP4"
33 31
34#if defined(SGX540) && (SGX_CORE_REV == 120) 32#if defined(SGX540) && (SGX_CORE_REV == 120)
@@ -51,9 +49,13 @@
51 49
52#define SYS_OMAP4430_SGX_IRQ 53 50#define SYS_OMAP4430_SGX_IRQ 53
53 51
54#define SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088038 52#define SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE 0x48088038
55#define SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE 0x4808803C 53#define SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE 0x4808803C
56#define SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088054 54#define SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE 0x48088054
55
56#if defined(__linux__)
57#define SYS_SGX_DEV_NAME "omap_gpu"
58#endif
57 59
58 60
59#endif 61#endif
diff --git a/drivers/gpu/pvr/omap4/syslocal.h b/drivers/gpu/pvr/omap4/syslocal.h
index bc9a078fc43..e07c51fda75 100644
--- a/drivers/gpu/pvr/omap4/syslocal.h
+++ b/drivers/gpu/pvr/omap4/syslocal.h
@@ -48,16 +48,52 @@
48#endif 48#endif
49#endif 49#endif
50 50
51
52#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
53#if !defined(LDM_PLATFORM)
54#error "LDM_PLATFORM must be set"
55#endif
56#define PVR_LINUX_DYNAMIC_SGX_RESOURCE_INFO
57#include <linux/platform_device.h>
58#endif
59
60#if ((defined(DEBUG) || defined(TIMING)) && \
61 (LINUX_VERSION_CODE == KERNEL_VERSION(2,6,34))) && \
62 !defined(PVR_NO_OMAP_TIMER)
63#define PVR_OMAP4_TIMING_PRCM
64#endif
65
66#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35))
67#include <plat/gpu.h>
68#if !defined(PVR_NO_OMAP_TIMER)
69#define PVR_OMAP_USE_DM_TIMER_API
70#include <plat/dmtimer.h>
71#endif
72#endif
73
74#if !defined(PVR_NO_OMAP_TIMER)
75#define PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA
76#endif
51#endif 77#endif
52 78
79#if !defined(NO_HARDWARE) && \
80 defined(SYS_USING_INTERRUPTS) && \
81 defined(SGX540)
82#define SGX_OCP_REGS_ENABLED
83#endif
84
85#if defined(__linux__)
86#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) && defined(SGX_OCP_REGS_ENABLED)
87#define SGX_OCP_NO_INT_BYPASS
88#endif
89#endif
90
53#if defined (__cplusplus) 91#if defined (__cplusplus)
54extern "C" { 92extern "C" {
55#endif 93#endif
56 94
57 95
58 96
59IMG_CHAR *SysCreateVersionString(IMG_CPU_PHYADDR sRegRegion);
60
61IMG_VOID DisableSystemClocks(SYS_DATA *psSysData); 97IMG_VOID DisableSystemClocks(SYS_DATA *psSysData);
62PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData); 98PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData);
63 99
@@ -78,6 +114,9 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData);
78#define SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS 0x00000400 114#define SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS 0x00000400
79#define SYS_SPECIFIC_DATA_ENABLE_OCPREGS 0x00000800 115#define SYS_SPECIFIC_DATA_ENABLE_OCPREGS 0x00000800
80#define SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME 0x00001000 116#define SYS_SPECIFIC_DATA_ENABLE_PM_RUNTIME 0x00001000
117#if defined(SGX_OCP_REGS_ENABLED) && defined(SGX_OCP_NO_INT_BYPASS)
118#define SYS_SPECIFIC_DATA_IRQ_ENABLED 0x00002000
119#endif
81 120
82#define SYS_SPECIFIC_DATA_SET(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData |= (flag))) 121#define SYS_SPECIFIC_DATA_SET(psSysSpecData, flag) ((IMG_VOID)((psSysSpecData)->ui32SysSpecificData |= (flag)))
83 122
@@ -90,6 +129,9 @@ typedef struct _SYS_SPECIFIC_DATA_TAG_
90 IMG_UINT32 ui32SysSpecificData; 129 IMG_UINT32 ui32SysSpecificData;
91 PVRSRV_DEVICE_NODE *psSGXDevNode; 130 PVRSRV_DEVICE_NODE *psSGXDevNode;
92 IMG_BOOL bSGXInitComplete; 131 IMG_BOOL bSGXInitComplete;
132#if defined(PVR_OMAP_TIMER_BASE_IN_SYS_SPEC_DATA)
133 IMG_CPU_PHYADDR sTimerRegPhysBase;
134#endif
93#if !defined(__linux__) 135#if !defined(__linux__)
94 IMG_BOOL bSGXClocksEnabled; 136 IMG_BOOL bSGXClocksEnabled;
95#endif 137#endif
@@ -107,19 +149,26 @@ typedef struct _SYS_SPECIFIC_DATA_TAG_
107 atomic_t sNotifyLockCPU; 149 atomic_t sNotifyLockCPU;
108 IMG_BOOL bCallVDD2PostFunc; 150 IMG_BOOL bCallVDD2PostFunc;
109#endif 151#endif
110 struct clk *psCORE_CK;
111 struct clk *psSGX_FCK;
112 struct clk *psSGX_ICK;
113 struct clk *psMPU_CK;
114#if defined(DEBUG) || defined(TIMING) 152#if defined(DEBUG) || defined(TIMING)
115 struct clk *psGPT11_FCK; 153 struct clk *psGPT11_FCK;
116 struct clk *psGPT11_ICK; 154 struct clk *psGPT11_ICK;
117#endif 155#endif
156#if defined(PVR_OMAP_USE_DM_TIMER_API)
157 struct omap_dm_timer *psGPTimer;
158#endif
118#endif 159#endif
119} SYS_SPECIFIC_DATA; 160} SYS_SPECIFIC_DATA;
120 161
121extern SYS_SPECIFIC_DATA *gpsSysSpecificData; 162extern SYS_SPECIFIC_DATA *gpsSysSpecificData;
122 163
164#if defined(SGX_OCP_REGS_ENABLED) && defined(SGX_OCP_NO_INT_BYPASS)
165IMG_VOID SysEnableSGXInterrupts(SYS_DATA* psSysData);
166IMG_VOID SysDisableSGXInterrupts(SYS_DATA* psSysData);
167#else
168#define SysEnableSGXInterrupts(psSysData)
169#define SysDisableSGXInterrupts(psSysData)
170#endif
171
123#if defined(SYS_CUSTOM_POWERLOCK_WRAP) 172#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
124IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData); 173IMG_BOOL WrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData);
125IMG_VOID UnwrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData); 174IMG_VOID UnwrapSystemPowerChange(SYS_SPECIFIC_DATA *psSysSpecData);
diff --git a/drivers/gpu/pvr/omap4/sysutils_linux.c b/drivers/gpu/pvr/omap4/sysutils_linux.c
index 52ae877f05e..f7c3ac11424 100644
--- a/drivers/gpu/pvr/omap4/sysutils_linux.c
+++ b/drivers/gpu/pvr/omap4/sysutils_linux.c
@@ -41,16 +41,6 @@
41#include <linux/platform_device.h> 41#include <linux/platform_device.h>
42#include <linux/pm_runtime.h> 42#include <linux/pm_runtime.h>
43 43
44#if !defined(PVR_LINUX_USING_WORKQUEUES)
45#error "PVR_LINUX_USING_WORKQUEUES must be defined"
46#endif
47
48#if ((defined(DEBUG) || defined(TIMING)) && \
49 (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))) && \
50 !defined(PVR_NO_OMAP_TIMER)
51#define PVR_OMAP4_TIMING_PRCM
52#endif
53
54#define ONE_MHZ 1000000 44#define ONE_MHZ 1000000
55#define HZ_TO_MHZ(m) ((m) / ONE_MHZ) 45#define HZ_TO_MHZ(m) ((m) / ONE_MHZ)
56 46
@@ -60,7 +50,7 @@
60#define SGX_PARENT_CLOCK "core_ck" 50#define SGX_PARENT_CLOCK "core_ck"
61#endif 51#endif
62 52
63#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM) 53#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
64extern struct platform_device *gpsPVRLDMDev; 54extern struct platform_device *gpsPVRLDMDev;
65#endif 55#endif
66 56
@@ -134,17 +124,9 @@ IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
134{ 124{
135 IMG_UINT32 rate; 125 IMG_UINT32 rate;
136 126
137#if defined(NO_HARDWARE)
138 rate = SYS_SGX_CLOCK_SPEED; 127 rate = SYS_SGX_CLOCK_SPEED;
139#else 128#if !defined(NO_HARDWARE)
140 PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0); 129 PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
141
142#if defined(OMAP4_PRCM_ENABLE)
143 rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK);
144#else
145 rate = SYS_SGX_CLOCK_SPEED;
146#endif
147 PVR_ASSERT(rate != 0);
148#endif 130#endif
149 psTimingInfo->ui32CoreClockSpeed = rate; 131 psTimingInfo->ui32CoreClockSpeed = rate;
150 psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate); 132 psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
@@ -161,11 +143,6 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
161{ 143{
162#if !defined(NO_HARDWARE) 144#if !defined(NO_HARDWARE)
163 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; 145 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
164#if defined(OMAP4_PRCM_ENABLE)
165 long lNewRate;
166 long lRate;
167 IMG_INT res;
168#endif
169 146
170 147
171 if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0) 148 if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
@@ -175,61 +152,18 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
175 152
176 PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks")); 153 PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
177 154
178#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM) 155#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
179 pm_runtime_get_sync(&gpsPVRLDMDev->dev);
180#endif
181
182#if defined(OMAP4_PRCM_ENABLE)
183
184#if defined(DEBUG)
185 {
186 IMG_UINT32 rate = clk_get_rate(psSysSpecData->psMPU_CK);
187 PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: CPU Clock is %dMhz", HZ_TO_MHZ(rate)));
188 }
189#endif
190
191 res = clk_enable(psSysSpecData->psSGX_FCK);
192 if (res < 0)
193 { 156 {
194 PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
195 return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
196 }
197 157
198 res = clk_enable(psSysSpecData->psSGX_ICK); 158 int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
199 if (res < 0)
200 {
201 PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX interface clock (%d)", res));
202
203 clk_disable(psSysSpecData->psSGX_FCK);
204 return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
205 }
206
207 lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
208 if (lNewRate <= 0)
209 {
210 PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
211 return PVRSRV_ERROR_UNABLE_TO_ROUND_CLOCK_RATE;
212 }
213
214
215 lRate = clk_get_rate(psSysSpecData->psSGX_FCK);
216 if (lRate != lNewRate)
217 {
218 res = clk_set_rate(psSysSpecData->psSGX_FCK, lNewRate);
219 if (res < 0) 159 if (res < 0)
220 { 160 {
221 PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res)); 161 PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
162 return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
222 } 163 }
223 } 164 }
224
225#if defined(DEBUG)
226 {
227 IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
228 PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
229 }
230#endif 165#endif
231 166 SysEnableSGXInterrupts(psSysData);
232#endif
233 167
234 168
235 atomic_set(&psSysSpecData->sSGXClocksEnabled, 1); 169 atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
@@ -254,21 +188,17 @@ IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
254 188
255 PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks")); 189 PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
256 190
257#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM) 191 SysDisableSGXInterrupts(psSysData);
258 pm_runtime_put_sync(&gpsPVRLDMDev->dev);
259#endif
260 192
261#if defined(OMAP4_PRCM_ENABLE) 193#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
262 if (psSysSpecData->psSGX_ICK)
263 { 194 {
264 clk_disable(psSysSpecData->psSGX_ICK); 195 int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
265 } 196 if (res < 0)
266 197 {
267 if (psSysSpecData->psSGX_FCK) 198 PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
268 { 199 }
269 clk_disable(psSysSpecData->psSGX_FCK);
270 } 200 }
271#endif 201#endif
272 202
273 203
274 atomic_set(&psSysSpecData->sSGXClocksEnabled, 0); 204 atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
@@ -278,86 +208,78 @@ IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
278#endif 208#endif
279} 209}
280 210
281PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData) 211#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
212#if defined(PVR_OMAP_USE_DM_TIMER_API)
213#define GPTIMER_TO_USE 11
214static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
282{ 215{
283 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData; 216 PVR_ASSERT(psSysSpecData->psGPTimer == NULL);
284#if (defined(OMAP4_PRCM_ENABLE) || defined(PVR_OMAP4_TIMING_PRCM))
285 struct clk *psCLK;
286 IMG_INT res;
287#endif
288#if defined(PVR_OMAP4_TIMING_PRCM)
289 struct clk *sys_ck;
290 IMG_INT rate;
291#endif
292 PVRSRV_ERROR eError;
293 217
294#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
295 IMG_CPU_PHYADDR TimerRegPhysBase;
296 IMG_HANDLE hTimerEnable;
297 IMG_UINT32 *pui32TimerEnable;
298#endif
299 218
300 PVR_TRACE(("EnableSystemClocks: Enabling System Clocks")); 219 psSysSpecData->psGPTimer = omap_dm_timer_request_specific(GPTIMER_TO_USE);
220 if (psSysSpecData->psGPTimer == NULL)
221 {
301 222
302 if (!psSysSpecData->bSysClocksOneTimeInit) 223 PVR_DPF((PVR_DBG_WARNING, "%s: omap_dm_timer_request_specific failed", __FUNCTION__));
224 return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
225 }
226
227
228 omap_dm_timer_set_source(psSysSpecData->psGPTimer, OMAP_TIMER_SRC_SYS_CLK);
229 omap_dm_timer_enable(psSysSpecData->psGPTimer);
230
231
232 omap_dm_timer_set_load_start(psSysSpecData->psGPTimer, 1, 0);
233
234 omap_dm_timer_start(psSysSpecData->psGPTimer);
235
236
237 psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
238
239 return PVRSRV_OK;
240}
241
242static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
243{
244 if (psSysSpecData->psGPTimer != NULL)
303 { 245 {
304 mutex_init(&psSysSpecData->sPowerLock);
305 246
306 atomic_set(&psSysSpecData->sSGXClocksEnabled, 0); 247 (void) omap_dm_timer_stop(psSysSpecData->psGPTimer);
307 248
308#if defined(OMAP4_PRCM_ENABLE) 249 omap_dm_timer_disable(psSysSpecData->psGPTimer);
309 psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
310 if (IS_ERR(psCLK))
311 {
312 PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get Core Clock"));
313 goto ExitError;
314 }
315 psSysSpecData->psCORE_CK = psCLK;
316 250
317 psCLK = clk_get(NULL, "sgx_fck"); 251 omap_dm_timer_free(psSysSpecData->psGPTimer);
318 if (IS_ERR(psCLK))
319 {
320 PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock"));
321 goto ExitError;
322 }
323 psSysSpecData->psSGX_FCK = psCLK;
324 252
325 psCLK = clk_get(NULL, "sgx_ick"); 253 psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
326 if (IS_ERR(psCLK))
327 {
328 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock"));
329 goto ExitError;
330 }
331 psSysSpecData->psSGX_ICK = psCLK;
332 254
333#if defined(DEBUG) 255 psSysSpecData->psGPTimer = NULL;
334 psCLK = clk_get(NULL, "mpu_ck"); 256 }
335 if (IS_ERR(psCLK)) 257
336 { 258}
337 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get MPU Clock")); 259#else
338 goto ExitError; 260static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
339 } 261{
340 psSysSpecData->psMPU_CK = psCLK; 262#if defined(PVR_OMAP4_TIMING_PRCM)
263 struct clk *psCLK;
264 IMG_INT res;
265 struct clk *sys_ck;
266 IMG_INT rate;
341#endif 267#endif
342 res = clk_set_parent(psSysSpecData->psSGX_FCK, psSysSpecData->psCORE_CK); 268 PVRSRV_ERROR eError;
343 if (res < 0)
344 {
345 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set SGX parent clock (%d)", res));
346 goto ExitError;
347 }
348#endif
349 269
350 psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE; 270 IMG_CPU_PHYADDR sTimerRegPhysBase;
351 } 271 IMG_HANDLE hTimerEnable;
272 IMG_UINT32 *pui32TimerEnable;
273
274 PVR_ASSERT(psSysSpecData->sTimerRegPhysBase.uiAddr == 0);
352 275
353#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
354#if defined(PVR_OMAP4_TIMING_PRCM) 276#if defined(PVR_OMAP4_TIMING_PRCM)
355 277
356 psCLK = clk_get(NULL, "gpt11_fck"); 278 psCLK = clk_get(NULL, "gpt11_fck");
357 if (IS_ERR(psCLK)) 279 if (IS_ERR(psCLK))
358 { 280 {
359 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 functional clock")); 281 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 functional clock"));
360 goto ExitUnRegisterConstraintNotifications; 282 goto ExitError;
361 } 283 }
362 psSysSpecData->psGPT11_FCK = psCLK; 284 psSysSpecData->psGPT11_FCK = psCLK;
363 285
@@ -365,7 +287,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
365 if (IS_ERR(psCLK)) 287 if (IS_ERR(psCLK))
366 { 288 {
367 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 interface clock")); 289 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 interface clock"));
368 goto ExitUnRegisterConstraintNotifications; 290 goto ExitError;
369 } 291 }
370 psSysSpecData->psGPT11_ICK = psCLK; 292 psSysSpecData->psGPT11_ICK = psCLK;
371 293
@@ -373,7 +295,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
373 if (IS_ERR(sys_ck)) 295 if (IS_ERR(sys_ck))
374 { 296 {
375 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get System clock")); 297 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get System clock"));
376 goto ExitUnRegisterConstraintNotifications; 298 goto ExitError;
377 } 299 }
378 300
379 if(clk_get_parent(psSysSpecData->psGPT11_FCK) != sys_ck) 301 if(clk_get_parent(psSysSpecData->psGPT11_FCK) != sys_ck)
@@ -383,7 +305,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
383 if (res < 0) 305 if (res < 0)
384 { 306 {
385 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set GPTIMER11 parent clock (%d)", res)); 307 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set GPTIMER11 parent clock (%d)", res));
386 goto ExitUnRegisterConstraintNotifications; 308 goto ExitError;
387 } 309 }
388 } 310 }
389 311
@@ -394,7 +316,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
394 if (res < 0) 316 if (res < 0)
395 { 317 {
396 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 functional clock (%d)", res)); 318 PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 functional clock (%d)", res));
397 goto ExitUnRegisterConstraintNotifications; 319 goto ExitError;
398 } 320 }
399 321
400 res = clk_enable(psSysSpecData->psGPT11_ICK); 322 res = clk_enable(psSysSpecData->psGPT11_ICK);
@@ -406,8 +328,8 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
406#endif 328#endif
407 329
408 330
409 TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE; 331 sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE;
410 pui32TimerEnable = OSMapPhysToLin(TimerRegPhysBase, 332 pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
411 4, 333 4,
412 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED, 334 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
413 &hTimerEnable); 335 &hTimerEnable);
@@ -432,8 +354,8 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
432 hTimerEnable); 354 hTimerEnable);
433 355
434 356
435 TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE; 357 sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
436 pui32TimerEnable = OSMapPhysToLin(TimerRegPhysBase, 358 pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
437 4, 359 4,
438 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED, 360 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
439 &hTimerEnable); 361 &hTimerEnable);
@@ -452,48 +374,36 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
452 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED, 374 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
453 hTimerEnable); 375 hTimerEnable);
454 376
455#endif 377 psSysSpecData->sTimerRegPhysBase = sTimerRegPhysBase;
456 378
457 eError = PVRSRV_OK; 379 eError = PVRSRV_OK;
380
458 goto Exit; 381 goto Exit;
459 382
460#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
461ExitDisableGPT11ICK: 383ExitDisableGPT11ICK:
462#if defined(PVR_OMAP4_TIMING_PRCM) 384#if defined(PVR_OMAP4_TIMING_PRCM)
463 clk_disable(psSysSpecData->psGPT11_ICK); 385 clk_disable(psSysSpecData->psGPT11_ICK);
464ExitDisableGPT11FCK: 386ExitDisableGPT11FCK:
465 clk_disable(psSysSpecData->psGPT11_FCK); 387 clk_disable(psSysSpecData->psGPT11_FCK);
466ExitUnRegisterConstraintNotifications:
467#endif
468#endif
469#if defined(OMAP4_PRCM_ENABLE)
470ExitError: 388ExitError:
471#endif 389#endif
472 eError = PVRSRV_ERROR_DISABLE_CLOCK_FAILURE; 390 eError = PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
473Exit: 391Exit:
474 return eError; 392 return eError;
475} 393}
476 394
477IMG_VOID DisableSystemClocks(SYS_DATA *psSysData) 395static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
478{ 396{
479#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
480#if defined(PVR_OMAP4_TIMING_PRCM)
481 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
482#endif
483 IMG_CPU_PHYADDR TimerRegPhysBase;
484 IMG_HANDLE hTimerDisable; 397 IMG_HANDLE hTimerDisable;
485 IMG_UINT32 *pui32TimerDisable; 398 IMG_UINT32 *pui32TimerDisable;
486#endif
487 399
488 PVR_TRACE(("DisableSystemClocks: Disabling System Clocks")); 400 if (psSysSpecData->sTimerRegPhysBase.uiAddr == 0)
489 401 {
490 402 return;
491 DisableSGXClocks(psSysData); 403 }
492 404
493#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
494 405
495 TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE; 406 pui32TimerDisable = OSMapPhysToLin(psSysSpecData->sTimerRegPhysBase,
496 pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase,
497 4, 407 4,
498 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED, 408 PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
499 &hTimerDisable); 409 &hTimerDisable);
@@ -512,17 +422,61 @@ IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
512 hTimerDisable); 422 hTimerDisable);
513 } 423 }
514 424
425 psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
426
515#if defined(PVR_OMAP4_TIMING_PRCM) 427#if defined(PVR_OMAP4_TIMING_PRCM)
516 clk_disable(psSysSpecData->psGPT11_ICK); 428 clk_disable(psSysSpecData->psGPT11_ICK);
517 429
518 clk_disable(psSysSpecData->psGPT11_FCK); 430 clk_disable(psSysSpecData->psGPT11_FCK);
519#endif 431#endif
432}
433#endif
434#else
435static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
436{
437 PVR_UNREFERENCED_PARAMETER(psSysSpecData);
438
439 return PVRSRV_OK;
440}
441static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
442{
443 PVR_UNREFERENCED_PARAMETER(psSysSpecData);
444}
520#endif 445#endif
446
447PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
448{
449 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
450
451 PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
452
453 if (!psSysSpecData->bSysClocksOneTimeInit)
454 {
455 mutex_init(&psSysSpecData->sPowerLock);
456
457 atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
458
459 psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
460 }
461
462 return AcquireGPTimer(psSysSpecData);
463}
464
465IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
466{
467 SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
468
469 PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
470
471
472 DisableSGXClocks(psSysData);
473
474 ReleaseGPTimer(psSysSpecData);
521} 475}
522 476
523PVRSRV_ERROR SysPMRuntimeRegister(void) 477PVRSRV_ERROR SysPMRuntimeRegister(void)
524{ 478{
525#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM) 479#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
526 pm_runtime_enable(&gpsPVRLDMDev->dev); 480 pm_runtime_enable(&gpsPVRLDMDev->dev);
527#endif 481#endif
528 return PVRSRV_OK; 482 return PVRSRV_OK;
@@ -530,7 +484,7 @@ PVRSRV_ERROR SysPMRuntimeRegister(void)
530 484
531PVRSRV_ERROR SysPMRuntimeUnregister(void) 485PVRSRV_ERROR SysPMRuntimeUnregister(void)
532{ 486{
533#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM) 487#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
534 pm_runtime_disable(&gpsPVRLDMDev->dev); 488 pm_runtime_disable(&gpsPVRLDMDev->dev);
535#endif 489#endif
536 return PVRSRV_OK; 490 return PVRSRV_OK;
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-25 22:21:14 -0400