diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-13 13:39:38 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-13 13:39:38 -0500 |
commit | 86f6f9b64a730844f1438cbedfacd6fb0170a7f7 (patch) | |
tree | cd80f8610b444ae3bd2ebfc136c2c3299a52bd9b /arch/sh/include | |
parent | d33a6291c1c577ff2272edab7416a0f7308e1cef (diff) | |
parent | 8b6f08eaef16dfcfebc32fa9a017bf70336ad9ec (diff) |
Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (31 commits)
sh: Add support for AP-SH4AD-0A board.
sh: Add support for AP-SH4A-3A board.
sh: Add a new mach type for alpha project boards.
serial: sh-sci: build fixes.
sh: sh7372 SH4AL-DSP probe support
sh: sh7366 Enable SDIO IRQs
sh: sh7343 Enable SDIO IRQs
sh: mach-ecovec24: enable runtime PM for SDHI
sh: sh7723 / ap325rxa enable SDIO IRQs
sh: sh7722 Enable SDIO IRQs
sh: sh7724 Enable SDIO IRQs
sh: Fix up legacy PTEA space attribute mapping.
sh: Stub out legacy PCC pgprot encoding for X2 TLBs.
sh: constify prefetch pointers.
sh: Add a machvec callback for early memblock reservations.
sh: update sh7757lcr_defconfig
sh: add PVR probing for SH7757 3rd cut
sh: Use device_initcall() instead of __initcall()
sh: intc - convert board specific landisk code
sh: Move init_landisk_IRQ to header file
...
Diffstat (limited to 'arch/sh/include')
-rw-r--r-- | arch/sh/include/asm/io.h | 61 | ||||
-rw-r--r-- | arch/sh/include/asm/machvec.h | 1 | ||||
-rw-r--r-- | arch/sh/include/asm/pgtable_32.h | 15 | ||||
-rw-r--r-- | arch/sh/include/asm/processor.h | 2 | ||||
-rw-r--r-- | arch/sh/include/asm/processor_32.h | 6 | ||||
-rw-r--r-- | arch/sh/include/mach-landisk/mach/iodata_landisk.h | 6 |
6 files changed, 26 insertions, 65 deletions
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 89ab2c57a4c..28c5aa58bb4 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h | |||
@@ -11,11 +11,6 @@ | |||
11 | * | 11 | * |
12 | * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers | 12 | * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers |
13 | * automatically, there are also __raw versions, which do not. | 13 | * automatically, there are also __raw versions, which do not. |
14 | * | ||
15 | * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for | ||
16 | * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice | ||
17 | * these have the same semantics as the __raw variants, and as such, all | ||
18 | * new code should be using the __raw versions. | ||
19 | */ | 14 | */ |
20 | #include <linux/errno.h> | 15 | #include <linux/errno.h> |
21 | #include <asm/cache.h> | 16 | #include <asm/cache.h> |
@@ -231,52 +226,6 @@ __BUILD_IOPORT_STRING(q, u64) | |||
231 | 226 | ||
232 | #endif | 227 | #endif |
233 | 228 | ||
234 | /* | ||
235 | * Legacy SuperH on-chip I/O functions | ||
236 | * | ||
237 | * These are all deprecated, all new (and especially cross-platform) code | ||
238 | * should be using the __raw_xxx() routines directly. | ||
239 | */ | ||
240 | static inline u8 __deprecated ctrl_inb(unsigned long addr) | ||
241 | { | ||
242 | return __raw_readb(addr); | ||
243 | } | ||
244 | |||
245 | static inline u16 __deprecated ctrl_inw(unsigned long addr) | ||
246 | { | ||
247 | return __raw_readw(addr); | ||
248 | } | ||
249 | |||
250 | static inline u32 __deprecated ctrl_inl(unsigned long addr) | ||
251 | { | ||
252 | return __raw_readl(addr); | ||
253 | } | ||
254 | |||
255 | static inline u64 __deprecated ctrl_inq(unsigned long addr) | ||
256 | { | ||
257 | return __raw_readq(addr); | ||
258 | } | ||
259 | |||
260 | static inline void __deprecated ctrl_outb(u8 v, unsigned long addr) | ||
261 | { | ||
262 | __raw_writeb(v, addr); | ||
263 | } | ||
264 | |||
265 | static inline void __deprecated ctrl_outw(u16 v, unsigned long addr) | ||
266 | { | ||
267 | __raw_writew(v, addr); | ||
268 | } | ||
269 | |||
270 | static inline void __deprecated ctrl_outl(u32 v, unsigned long addr) | ||
271 | { | ||
272 | __raw_writel(v, addr); | ||
273 | } | ||
274 | |||
275 | static inline void __deprecated ctrl_outq(u64 v, unsigned long addr) | ||
276 | { | ||
277 | __raw_writeq(v, addr); | ||
278 | } | ||
279 | |||
280 | #define IO_SPACE_LIMIT 0xffffffff | 229 | #define IO_SPACE_LIMIT 0xffffffff |
281 | 230 | ||
282 | /* synco on SH-4A, otherwise a nop */ | 231 | /* synco on SH-4A, otherwise a nop */ |
@@ -341,7 +290,15 @@ __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot) | |||
341 | * mapping must be done by the PMB or by using page tables. | 290 | * mapping must be done by the PMB or by using page tables. |
342 | */ | 291 | */ |
343 | if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { | 292 | if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { |
344 | if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE)) | 293 | u64 flags = pgprot_val(prot); |
294 | |||
295 | /* | ||
296 | * Anything using the legacy PTEA space attributes needs | ||
297 | * to be kicked down to page table mappings. | ||
298 | */ | ||
299 | if (unlikely(flags & _PAGE_PCC_MASK)) | ||
300 | return NULL; | ||
301 | if (unlikely(flags & _PAGE_CACHABLE)) | ||
345 | return (void __iomem *)P1SEGADDR(offset); | 302 | return (void __iomem *)P1SEGADDR(offset); |
346 | 303 | ||
347 | return (void __iomem *)P2SEGADDR(offset); | 304 | return (void __iomem *)P2SEGADDR(offset); |
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h index dd5d6e5bf20..57c5c3d0f39 100644 --- a/arch/sh/include/asm/machvec.h +++ b/arch/sh/include/asm/machvec.h | |||
@@ -31,6 +31,7 @@ struct sh_machine_vector { | |||
31 | int (*mv_mode_pins)(void); | 31 | int (*mv_mode_pins)(void); |
32 | 32 | ||
33 | void (*mv_mem_init)(void); | 33 | void (*mv_mem_init)(void); |
34 | void (*mv_mem_reserve)(void); | ||
34 | }; | 35 | }; |
35 | 36 | ||
36 | extern struct sh_machine_vector sh_mv; | 37 | extern struct sh_machine_vector sh_mv; |
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h index 43528ec656b..b799fe71114 100644 --- a/arch/sh/include/asm/pgtable_32.h +++ b/arch/sh/include/asm/pgtable_32.h | |||
@@ -76,6 +76,10 @@ | |||
76 | /* Wrapper for extended mode pgprot twiddling */ | 76 | /* Wrapper for extended mode pgprot twiddling */ |
77 | #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) | 77 | #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) |
78 | 78 | ||
79 | #ifdef CONFIG_X2TLB | ||
80 | #define _PAGE_PCC_MASK 0x00000000 /* No legacy PTEA support */ | ||
81 | #else | ||
82 | |||
79 | /* software: moves to PTEA.TC (Timing Control) */ | 83 | /* software: moves to PTEA.TC (Timing Control) */ |
80 | #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ | 84 | #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ |
81 | #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ | 85 | #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ |
@@ -89,7 +93,8 @@ | |||
89 | #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ | 93 | #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ |
90 | #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ | 94 | #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ |
91 | 95 | ||
92 | #ifndef CONFIG_X2TLB | 96 | #define _PAGE_PCC_MASK 0xe0000001 |
97 | |||
93 | /* copy the ptea attributes */ | 98 | /* copy the ptea attributes */ |
94 | static inline unsigned long copy_ptea_attributes(unsigned long x) | 99 | static inline unsigned long copy_ptea_attributes(unsigned long x) |
95 | { | 100 | { |
@@ -231,13 +236,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x) | |||
231 | _PAGE_EXT_KERN_EXEC)) | 236 | _PAGE_EXT_KERN_EXEC)) |
232 | 237 | ||
233 | #define PAGE_KERNEL_PCC(slot, type) \ | 238 | #define PAGE_KERNEL_PCC(slot, type) \ |
234 | __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ | 239 | __pgprot(0) |
235 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ | ||
236 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
237 | _PAGE_EXT_KERN_WRITE | \ | ||
238 | _PAGE_EXT_KERN_EXEC) \ | ||
239 | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ | ||
240 | (type)) | ||
241 | 240 | ||
242 | #elif defined(CONFIG_MMU) /* SH-X TLB */ | 241 | #elif defined(CONFIG_MMU) /* SH-X TLB */ |
243 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ | 242 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ |
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index c9e7cbc4768..9c7bdfcaebb 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h | |||
@@ -35,7 +35,7 @@ enum cpu_type { | |||
35 | CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3, | 35 | CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3, |
36 | 36 | ||
37 | /* SH4AL-DSP types */ | 37 | /* SH4AL-DSP types */ |
38 | CPU_SH7343, CPU_SH7722, CPU_SH7366, | 38 | CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372, |
39 | 39 | ||
40 | /* SH-5 types */ | 40 | /* SH-5 types */ |
41 | CPU_SH5_101, CPU_SH5_103, | 41 | CPU_SH5_101, CPU_SH5_103, |
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index e3c73cdd8c9..900f8d72ffe 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h | |||
@@ -194,15 +194,17 @@ extern unsigned long get_wchan(struct task_struct *p); | |||
194 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) | 194 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) |
195 | 195 | ||
196 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) | 196 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) |
197 | |||
197 | #define PREFETCH_STRIDE L1_CACHE_BYTES | 198 | #define PREFETCH_STRIDE L1_CACHE_BYTES |
198 | #define ARCH_HAS_PREFETCH | 199 | #define ARCH_HAS_PREFETCH |
199 | #define ARCH_HAS_PREFETCHW | 200 | #define ARCH_HAS_PREFETCHW |
200 | static inline void prefetch(void *x) | 201 | |
202 | static inline void prefetch(const void *x) | ||
201 | { | 203 | { |
202 | __builtin_prefetch(x, 0, 3); | 204 | __builtin_prefetch(x, 0, 3); |
203 | } | 205 | } |
204 | 206 | ||
205 | static inline void prefetchw(void *x) | 207 | static inline void prefetchw(const void *x) |
206 | { | 208 | { |
207 | __builtin_prefetch(x, 1, 3); | 209 | __builtin_prefetch(x, 1, 3); |
208 | } | 210 | } |
diff --git a/arch/sh/include/mach-landisk/mach/iodata_landisk.h b/arch/sh/include/mach-landisk/mach/iodata_landisk.h index 6fb04ab38b9..f432773a957 100644 --- a/arch/sh/include/mach-landisk/mach/iodata_landisk.h +++ b/arch/sh/include/mach-landisk/mach/iodata_landisk.h | |||
@@ -2,7 +2,7 @@ | |||
2 | #define __ASM_SH_IODATA_LANDISK_H | 2 | #define __ASM_SH_IODATA_LANDISK_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * linux/include/asm-sh/landisk/iodata_landisk.h | 5 | * arch/sh/include/mach-landisk/mach/iodata_landisk.h |
6 | * | 6 | * |
7 | * Copyright (C) 2000 Atom Create Engineering Co., Ltd. | 7 | * Copyright (C) 2000 Atom Create Engineering Co., Ltd. |
8 | * | 8 | * |
@@ -27,7 +27,7 @@ | |||
27 | 27 | ||
28 | #define IRQ_PCIINTA 5 /* PCI INTA IRQ */ | 28 | #define IRQ_PCIINTA 5 /* PCI INTA IRQ */ |
29 | #define IRQ_PCIINTB 6 /* PCI INTB IRQ */ | 29 | #define IRQ_PCIINTB 6 /* PCI INTB IRQ */ |
30 | #define IRQ_PCIINDC 7 /* PCI INTC IRQ */ | 30 | #define IRQ_PCIINTC 7 /* PCI INTC IRQ */ |
31 | #define IRQ_PCIINTD 8 /* PCI INTD IRQ */ | 31 | #define IRQ_PCIINTD 8 /* PCI INTD IRQ */ |
32 | #define IRQ_ATA 9 /* ATA IRQ */ | 32 | #define IRQ_ATA 9 /* ATA IRQ */ |
33 | #define IRQ_FATA 10 /* FATA IRQ */ | 33 | #define IRQ_FATA 10 /* FATA IRQ */ |
@@ -35,6 +35,8 @@ | |||
35 | #define IRQ_BUTTON 12 /* USL-5P Button IRQ */ | 35 | #define IRQ_BUTTON 12 /* USL-5P Button IRQ */ |
36 | #define IRQ_FAULT 13 /* USL-5P Fault IRQ */ | 36 | #define IRQ_FAULT 13 /* USL-5P Fault IRQ */ |
37 | 37 | ||
38 | void init_landisk_IRQ(void); | ||
39 | |||
38 | #define __IO_PREFIX landisk | 40 | #define __IO_PREFIX landisk |
39 | #include <asm/io_generic.h> | 41 | #include <asm/io_generic.h> |
40 | 42 | ||