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path: root/drivers/media/video/cx18/cx18-i2c.c
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Diffstat (limited to 'drivers/media/video/cx18/cx18-i2c.c')
-rw-r--r--drivers/media/video/cx18/cx18-i2c.c47
1 files changed, 27 insertions, 20 deletions
diff --git a/drivers/media/video/cx18/cx18-i2c.c b/drivers/media/video/cx18/cx18-i2c.c
index 7d8fb25baae..aa09e557b19 100644
--- a/drivers/media/video/cx18/cx18-i2c.c
+++ b/drivers/media/video/cx18/cx18-i2c.c
@@ -22,6 +22,7 @@
22 */ 22 */
23 23
24#include "cx18-driver.h" 24#include "cx18-driver.h"
25#include "cx18-io.h"
25#include "cx18-cards.h" 26#include "cx18-cards.h"
26#include "cx18-gpio.h" 27#include "cx18-gpio.h"
27#include "cx18-av-core.h" 28#include "cx18-av-core.h"
@@ -156,12 +157,12 @@ static void cx18_setscl(void *data, int state)
156 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx; 157 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
157 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index; 158 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
158 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR; 159 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
159 u32 r = read_reg(addr); 160 u32 r = cx18_read_reg(cx, addr);
160 161
161 if (state) 162 if (state)
162 write_reg_sync(r | SETSCL_BIT, addr); 163 cx18_write_reg_sync(cx, r | SETSCL_BIT, addr);
163 else 164 else
164 write_reg_sync(r & ~SETSCL_BIT, addr); 165 cx18_write_reg_sync(cx, r & ~SETSCL_BIT, addr);
165} 166}
166 167
167static void cx18_setsda(void *data, int state) 168static void cx18_setsda(void *data, int state)
@@ -169,12 +170,12 @@ static void cx18_setsda(void *data, int state)
169 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx; 170 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
170 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index; 171 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
171 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR; 172 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
172 u32 r = read_reg(addr); 173 u32 r = cx18_read_reg(cx, addr);
173 174
174 if (state) 175 if (state)
175 write_reg_sync(r | SETSDL_BIT, addr); 176 cx18_write_reg_sync(cx, r | SETSDL_BIT, addr);
176 else 177 else
177 write_reg_sync(r & ~SETSDL_BIT, addr); 178 cx18_write_reg_sync(cx, r & ~SETSDL_BIT, addr);
178} 179}
179 180
180static int cx18_getscl(void *data) 181static int cx18_getscl(void *data)
@@ -183,7 +184,7 @@ static int cx18_getscl(void *data)
183 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index; 184 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
184 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD; 185 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
185 186
186 return read_reg(addr) & GETSCL_BIT; 187 return cx18_read_reg(cx, addr) & GETSCL_BIT;
187} 188}
188 189
189static int cx18_getsda(void *data) 190static int cx18_getsda(void *data)
@@ -192,7 +193,7 @@ static int cx18_getsda(void *data)
192 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index; 193 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
193 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD; 194 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
194 195
195 return read_reg(addr) & GETSDL_BIT; 196 return cx18_read_reg(cx, addr) & GETSDL_BIT;
196} 197}
197 198
198/* template for i2c-bit-algo */ 199/* template for i2c-bit-algo */
@@ -392,29 +393,33 @@ int init_cx18_i2c(struct cx18 *cx)
392 cx->i2c_adap[i].dev.parent = &cx->dev->dev; 393 cx->i2c_adap[i].dev.parent = &cx->dev->dev;
393 } 394 }
394 395
395 if (read_reg(CX18_REG_I2C_2_WR) != 0x0003c02f) { 396 if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
396 /* Reset/Unreset I2C hardware block */ 397 /* Reset/Unreset I2C hardware block */
397 write_reg(0x10000000, 0xc71004); /* Clock select 220MHz */ 398 /* Clock select 220MHz */
398 write_reg_sync(0x10001000, 0xc71024); /* Clock Enable */ 399 cx18_write_reg(cx, 0x10000000, 0xc71004);
400 /* Clock Enable */
401 cx18_write_reg_sync(cx, 0x10001000, 0xc71024);
399 } 402 }
400 /* courtesy of Steven Toth <stoth@hauppauge.com> */ 403 /* courtesy of Steven Toth <stoth@hauppauge.com> */
401 write_reg_sync(0x00c00000, 0xc7001c); 404 cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c);
402 mdelay(10); 405 mdelay(10);
403 write_reg_sync(0x00c000c0, 0xc7001c); 406 cx18_write_reg_sync(cx, 0x00c000c0, 0xc7001c);
404 mdelay(10); 407 mdelay(10);
405 write_reg_sync(0x00c00000, 0xc7001c); 408 cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c);
406 mdelay(10); 409 mdelay(10);
407 410
408 write_reg_sync(0x00c00000, 0xc730c8); /* Set to edge-triggered intrs. */ 411 /* Set to edge-triggered intrs. */
409 write_reg_sync(0x00c00000, 0xc730c4); /* Clear any stale intrs */ 412 cx18_write_reg_sync(cx, 0x00c00000, 0xc730c8);
413 /* Clear any stale intrs */
414 cx18_write_reg_sync(cx, 0x00c00000, 0xc730c4);
410 415
411 /* Hw I2C1 Clock Freq ~100kHz */ 416 /* Hw I2C1 Clock Freq ~100kHz */
412 write_reg_sync(0x00021c0f & ~4, CX18_REG_I2C_1_WR); 417 cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
413 cx18_setscl(&cx->i2c_algo_cb_data[0], 1); 418 cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
414 cx18_setsda(&cx->i2c_algo_cb_data[0], 1); 419 cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
415 420
416 /* Hw I2C2 Clock Freq ~100kHz */ 421 /* Hw I2C2 Clock Freq ~100kHz */
417 write_reg_sync(0x00021c0f & ~4, CX18_REG_I2C_2_WR); 422 cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
418 cx18_setscl(&cx->i2c_algo_cb_data[1], 1); 423 cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
419 cx18_setsda(&cx->i2c_algo_cb_data[1], 1); 424 cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
420 425
@@ -428,8 +433,10 @@ void exit_cx18_i2c(struct cx18 *cx)
428{ 433{
429 int i; 434 int i;
430 CX18_DEBUG_I2C("i2c exit\n"); 435 CX18_DEBUG_I2C("i2c exit\n");
431 write_reg(read_reg(CX18_REG_I2C_1_WR) | 4, CX18_REG_I2C_1_WR); 436 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
432 write_reg(read_reg(CX18_REG_I2C_2_WR) | 4, CX18_REG_I2C_2_WR); 437 CX18_REG_I2C_1_WR);
438 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
439 CX18_REG_I2C_2_WR);
433 440
434 for (i = 0; i < 2; i++) { 441 for (i = 0; i < 2; i++) {
435 i2c_del_adapter(&cx->i2c_adap[i]); 442 i2c_del_adapter(&cx->i2c_adap[i]);