aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm
diff options
context:
space:
mode:
authorLen Brown <len.brown@intel.com>2009-04-05 02:14:15 -0400
committerLen Brown <len.brown@intel.com>2009-04-05 02:14:15 -0400
commit478c6a43fcbc6c11609f8cee7c7b57223907754f (patch)
treea7f7952099da60d33032aed6de9c0c56c9f8779e /drivers/gpu/drm
parent8a3f257c704e02aee9869decd069a806b45be3f1 (diff)
parent6bb597507f9839b13498781e481f5458aea33620 (diff)
Merge branch 'linus' into release
Conflicts: arch/x86/kernel/cpu/cpufreq/longhaul.c Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/Makefile3
-rw-r--r--drivers/gpu/drm/ati_pcigart.c40
-rw-r--r--drivers/gpu/drm/drm_bufs.c122
-rw-r--r--drivers/gpu/drm/drm_context.c4
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c31
-rw-r--r--drivers/gpu/drm/drm_debugfs.c235
-rw-r--r--drivers/gpu/drm/drm_drv.c100
-rw-r--r--drivers/gpu/drm/drm_edid.c191
-rw-r--r--drivers/gpu/drm/drm_fops.c7
-rw-r--r--drivers/gpu/drm/drm_gem.c9
-rw-r--r--drivers/gpu/drm/drm_info.c328
-rw-r--r--drivers/gpu/drm/drm_ioc32.c4
-rw-r--r--drivers/gpu/drm/drm_memory.c6
-rw-r--r--drivers/gpu/drm/drm_proc.c720
-rw-r--r--drivers/gpu/drm/drm_stub.c108
-rw-r--r--drivers/gpu/drm/drm_sysfs.c42
-rw-r--r--drivers/gpu/drm/drm_vm.c32
-rw-r--r--drivers/gpu/drm/i810/i810_drv.h4
-rw-r--r--drivers/gpu/drm/i830/i830_drv.h4
-rw-r--r--drivers/gpu/drm/i915/Makefile2
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c129
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c44
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h26
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c937
-rw-r--r--drivers/gpu/drm/i915/i915_gem_debug.c2
-rw-r--r--drivers/gpu/drm/i915/i915_gem_debugfs.c263
-rw-r--r--drivers/gpu/drm/i915/i915_gem_proc.c334
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c47
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c67
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h33
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h12
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c68
-rw-r--r--drivers/gpu/drm/i915/intel_display.c428
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c2
-rw-r--r--drivers/gpu/drm/i915/intel_modes.c1
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c193
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo_regs.h3
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c178
-rw-r--r--drivers/gpu/drm/mga/mga_dma.c17
-rw-r--r--drivers/gpu/drm/mga/mga_drv.h8
-rw-r--r--drivers/gpu/drm/r128/r128_cce.c7
-rw-r--r--drivers/gpu/drm/radeon/Makefile2
-rw-r--r--drivers/gpu/drm/radeon/r300_cmdbuf.c11
-rw-r--r--drivers/gpu/drm/radeon/r300_reg.h5
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c2253
-rw-r--r--drivers/gpu/drm/radeon/r600_microcode.h23297
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c522
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c22
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h635
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq.c14
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c51
-rw-r--r--drivers/gpu/drm/savage/savage_bci.c8
-rw-r--r--drivers/gpu/drm/via/via_drv.c6
53 files changed, 29784 insertions, 1833 deletions
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 30022c4a5c1..4ec5061fa58 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -10,7 +10,8 @@ drm-y := drm_auth.o drm_bufs.o drm_cache.o \
10 drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ 10 drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
11 drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ 11 drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
12 drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ 12 drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \
13 drm_crtc.o drm_crtc_helper.o drm_modes.o drm_edid.o 13 drm_crtc.o drm_crtc_helper.o drm_modes.o drm_edid.o \
14 drm_info.o drm_debugfs.o
14 15
15drm-$(CONFIG_COMPAT) += drm_ioc32.o 16drm-$(CONFIG_COMPAT) += drm_ioc32.o
16 17
diff --git a/drivers/gpu/drm/ati_pcigart.c b/drivers/gpu/drm/ati_pcigart.c
index c533d0c9ec6..628eae3e9b8 100644
--- a/drivers/gpu/drm/ati_pcigart.c
+++ b/drivers/gpu/drm/ati_pcigart.c
@@ -77,7 +77,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
77 if (!entry->busaddr[i]) 77 if (!entry->busaddr[i])
78 break; 78 break;
79 pci_unmap_page(dev->pdev, entry->busaddr[i], 79 pci_unmap_page(dev->pdev, entry->busaddr[i],
80 PAGE_SIZE, PCI_DMA_TODEVICE); 80 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
81 } 81 }
82 82
83 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) 83 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
@@ -95,13 +95,14 @@ EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
95 95
96int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 96int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
97{ 97{
98 struct drm_local_map *map = &gart_info->mapping;
98 struct drm_sg_mem *entry = dev->sg; 99 struct drm_sg_mem *entry = dev->sg;
99 void *address = NULL; 100 void *address = NULL;
100 unsigned long pages; 101 unsigned long pages;
101 u32 *pci_gart, page_base; 102 u32 *pci_gart = NULL, page_base, gart_idx;
102 dma_addr_t bus_address = 0; 103 dma_addr_t bus_address = 0;
103 int i, j, ret = 0; 104 int i, j, ret = 0;
104 int max_pages; 105 int max_ati_pages, max_real_pages;
105 106
106 if (!entry) { 107 if (!entry) {
107 DRM_ERROR("no scatter/gather memory!\n"); 108 DRM_ERROR("no scatter/gather memory!\n");
@@ -117,6 +118,7 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
117 goto done; 118 goto done;
118 } 119 }
119 120
121 pci_gart = gart_info->table_handle->vaddr;
120 address = gart_info->table_handle->vaddr; 122 address = gart_info->table_handle->vaddr;
121 bus_address = gart_info->table_handle->busaddr; 123 bus_address = gart_info->table_handle->busaddr;
122 } else { 124 } else {
@@ -127,18 +129,23 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
127 (unsigned long)address); 129 (unsigned long)address);
128 } 130 }
129 131
130 pci_gart = (u32 *) address;
131 132
132 max_pages = (gart_info->table_size / sizeof(u32)); 133 max_ati_pages = (gart_info->table_size / sizeof(u32));
133 pages = (entry->pages <= max_pages) 134 max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
134 ? entry->pages : max_pages; 135 pages = (entry->pages <= max_real_pages)
136 ? entry->pages : max_real_pages;
135 137
136 memset(pci_gart, 0, max_pages * sizeof(u32)); 138 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
139 memset(pci_gart, 0, max_ati_pages * sizeof(u32));
140 } else {
141 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32));
142 }
137 143
144 gart_idx = 0;
138 for (i = 0; i < pages; i++) { 145 for (i = 0; i < pages; i++) {
139 /* we need to support large memory configurations */ 146 /* we need to support large memory configurations */
140 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i], 147 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
141 0, PAGE_SIZE, PCI_DMA_TODEVICE); 148 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
142 if (entry->busaddr[i] == 0) { 149 if (entry->busaddr[i] == 0) {
143 DRM_ERROR("unable to map PCIGART pages!\n"); 150 DRM_ERROR("unable to map PCIGART pages!\n");
144 drm_ati_pcigart_cleanup(dev, gart_info); 151 drm_ati_pcigart_cleanup(dev, gart_info);
@@ -149,19 +156,26 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
149 page_base = (u32) entry->busaddr[i]; 156 page_base = (u32) entry->busaddr[i];
150 157
151 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { 158 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
159 u32 val;
160
152 switch(gart_info->gart_reg_if) { 161 switch(gart_info->gart_reg_if) {
153 case DRM_ATI_GART_IGP: 162 case DRM_ATI_GART_IGP:
154 *pci_gart = cpu_to_le32((page_base) | 0xc); 163 val = page_base | 0xc;
155 break; 164 break;
156 case DRM_ATI_GART_PCIE: 165 case DRM_ATI_GART_PCIE:
157 *pci_gart = cpu_to_le32((page_base >> 8) | 0xc); 166 val = (page_base >> 8) | 0xc;
158 break; 167 break;
159 default: 168 default:
160 case DRM_ATI_GART_PCI: 169 case DRM_ATI_GART_PCI:
161 *pci_gart = cpu_to_le32(page_base); 170 val = page_base;
162 break; 171 break;
163 } 172 }
164 pci_gart++; 173 if (gart_info->gart_table_location ==
174 DRM_ATI_GART_MAIN)
175 pci_gart[gart_idx] = cpu_to_le32(val);
176 else
177 DRM_WRITE32(map, gart_idx * sizeof(u32), val);
178 gart_idx++;
165 page_base += ATI_PCIGART_PAGE_SIZE; 179 page_base += ATI_PCIGART_PAGE_SIZE;
166 } 180 }
167 } 181 }
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 12715d3c078..6d80d17f1e9 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -34,15 +34,17 @@
34 */ 34 */
35 35
36#include <linux/vmalloc.h> 36#include <linux/vmalloc.h>
37#include <linux/log2.h>
38#include <asm/shmparam.h>
37#include "drmP.h" 39#include "drmP.h"
38 40
39unsigned long drm_get_resource_start(struct drm_device *dev, unsigned int resource) 41resource_size_t drm_get_resource_start(struct drm_device *dev, unsigned int resource)
40{ 42{
41 return pci_resource_start(dev->pdev, resource); 43 return pci_resource_start(dev->pdev, resource);
42} 44}
43EXPORT_SYMBOL(drm_get_resource_start); 45EXPORT_SYMBOL(drm_get_resource_start);
44 46
45unsigned long drm_get_resource_len(struct drm_device *dev, unsigned int resource) 47resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned int resource)
46{ 48{
47 return pci_resource_len(dev->pdev, resource); 49 return pci_resource_len(dev->pdev, resource);
48} 50}
@@ -50,24 +52,44 @@ unsigned long drm_get_resource_len(struct drm_device *dev, unsigned int resource
50EXPORT_SYMBOL(drm_get_resource_len); 52EXPORT_SYMBOL(drm_get_resource_len);
51 53
52static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, 54static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
53 drm_local_map_t *map) 55 struct drm_local_map *map)
54{ 56{
55 struct drm_map_list *entry; 57 struct drm_map_list *entry;
56 list_for_each_entry(entry, &dev->maplist, head) { 58 list_for_each_entry(entry, &dev->maplist, head) {
57 if (entry->map && (entry->master == dev->primary->master) && (map->type == entry->map->type) && 59 /*
58 ((entry->map->offset == map->offset) || 60 * Because the kernel-userspace ABI is fixed at a 32-bit offset
59 ((map->type == _DRM_SHM) && (map->flags&_DRM_CONTAINS_LOCK)))) { 61 * while PCI resources may live above that, we ignore the map
62 * offset for maps of type _DRM_FRAMEBUFFER or _DRM_REGISTERS.
63 * It is assumed that each driver will have only one resource of
64 * each type.
65 */
66 if (!entry->map ||
67 map->type != entry->map->type ||
68 entry->master != dev->primary->master)
69 continue;
70 switch (map->type) {
71 case _DRM_SHM:
72 if (map->flags != _DRM_CONTAINS_LOCK)
73 break;
74 case _DRM_REGISTERS:
75 case _DRM_FRAME_BUFFER:
60 return entry; 76 return entry;
77 default: /* Make gcc happy */
78 ;
61 } 79 }
80 if (entry->map->offset == map->offset)
81 return entry;
62 } 82 }
63 83
64 return NULL; 84 return NULL;
65} 85}
66 86
67static int drm_map_handle(struct drm_device *dev, struct drm_hash_item *hash, 87static int drm_map_handle(struct drm_device *dev, struct drm_hash_item *hash,
68 unsigned long user_token, int hashed_handle) 88 unsigned long user_token, int hashed_handle, int shm)
69{ 89{
70 int use_hashed_handle; 90 int use_hashed_handle, shift;
91 unsigned long add;
92
71#if (BITS_PER_LONG == 64) 93#if (BITS_PER_LONG == 64)
72 use_hashed_handle = ((user_token & 0xFFFFFFFF00000000UL) || hashed_handle); 94 use_hashed_handle = ((user_token & 0xFFFFFFFF00000000UL) || hashed_handle);
73#elif (BITS_PER_LONG == 32) 95#elif (BITS_PER_LONG == 32)
@@ -83,30 +105,47 @@ static int drm_map_handle(struct drm_device *dev, struct drm_hash_item *hash,
83 if (ret != -EINVAL) 105 if (ret != -EINVAL)
84 return ret; 106 return ret;
85 } 107 }
108
109 shift = 0;
110 add = DRM_MAP_HASH_OFFSET >> PAGE_SHIFT;
111 if (shm && (SHMLBA > PAGE_SIZE)) {
112 int bits = ilog2(SHMLBA >> PAGE_SHIFT) + 1;
113
114 /* For shared memory, we have to preserve the SHMLBA
115 * bits of the eventual vma->vm_pgoff value during
116 * mmap(). Otherwise we run into cache aliasing problems
117 * on some platforms. On these platforms, the pgoff of
118 * a mmap() request is used to pick a suitable virtual
119 * address for the mmap() region such that it will not
120 * cause cache aliasing problems.
121 *
122 * Therefore, make sure the SHMLBA relevant bits of the
123 * hash value we use are equal to those in the original
124 * kernel virtual address.
125 */
126 shift = bits;
127 add |= ((user_token >> PAGE_SHIFT) & ((1UL << bits) - 1UL));
128 }
129
86 return drm_ht_just_insert_please(&dev->map_hash, hash, 130 return drm_ht_just_insert_please(&dev->map_hash, hash,
87 user_token, 32 - PAGE_SHIFT - 3, 131 user_token, 32 - PAGE_SHIFT - 3,
88 0, DRM_MAP_HASH_OFFSET >> PAGE_SHIFT); 132 shift, add);
89} 133}
90 134
91/** 135/**
92 * Ioctl to specify a range of memory that is available for mapping by a non-root process. 136 * Core function to create a range of memory available for mapping by a
93 * 137 * non-root process.
94 * \param inode device inode.
95 * \param file_priv DRM file private.
96 * \param cmd command.
97 * \param arg pointer to a drm_map structure.
98 * \return zero on success or a negative value on error.
99 * 138 *
100 * Adjusts the memory offset to its absolute value according to the mapping 139 * Adjusts the memory offset to its absolute value according to the mapping
101 * type. Adds the map to the map list drm_device::maplist. Adds MTRR's where 140 * type. Adds the map to the map list drm_device::maplist. Adds MTRR's where
102 * applicable and if supported by the kernel. 141 * applicable and if supported by the kernel.
103 */ 142 */
104static int drm_addmap_core(struct drm_device * dev, unsigned int offset, 143static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
105 unsigned int size, enum drm_map_type type, 144 unsigned int size, enum drm_map_type type,
106 enum drm_map_flags flags, 145 enum drm_map_flags flags,
107 struct drm_map_list ** maplist) 146 struct drm_map_list ** maplist)
108{ 147{
109 struct drm_map *map; 148 struct drm_local_map *map;
110 struct drm_map_list *list; 149 struct drm_map_list *list;
111 drm_dma_handle_t *dmah; 150 drm_dma_handle_t *dmah;
112 unsigned long user_token; 151 unsigned long user_token;
@@ -129,9 +168,9 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
129 drm_free(map, sizeof(*map), DRM_MEM_MAPS); 168 drm_free(map, sizeof(*map), DRM_MEM_MAPS);
130 return -EINVAL; 169 return -EINVAL;
131 } 170 }
132 DRM_DEBUG("offset = 0x%08lx, size = 0x%08lx, type = %d\n", 171 DRM_DEBUG("offset = 0x%08llx, size = 0x%08lx, type = %d\n",
133 map->offset, map->size, map->type); 172 (unsigned long long)map->offset, map->size, map->type);
134 if ((map->offset & (~PAGE_MASK)) || (map->size & (~PAGE_MASK))) { 173 if ((map->offset & (~(resource_size_t)PAGE_MASK)) || (map->size & (~PAGE_MASK))) {
135 drm_free(map, sizeof(*map), DRM_MEM_MAPS); 174 drm_free(map, sizeof(*map), DRM_MEM_MAPS);
136 return -EINVAL; 175 return -EINVAL;
137 } 176 }
@@ -259,7 +298,8 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
259 drm_free(map, sizeof(*map), DRM_MEM_MAPS); 298 drm_free(map, sizeof(*map), DRM_MEM_MAPS);
260 return -EPERM; 299 return -EPERM;
261 } 300 }
262 DRM_DEBUG("AGP offset = 0x%08lx, size = 0x%08lx\n", map->offset, map->size); 301 DRM_DEBUG("AGP offset = 0x%08llx, size = 0x%08lx\n",
302 (unsigned long long)map->offset, map->size);
263 303
264 break; 304 break;
265 case _DRM_GEM: 305 case _DRM_GEM:
@@ -309,7 +349,8 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
309 /* We do it here so that dev->struct_mutex protects the increment */ 349 /* We do it here so that dev->struct_mutex protects the increment */
310 user_token = (map->type == _DRM_SHM) ? (unsigned long)map->handle : 350 user_token = (map->type == _DRM_SHM) ? (unsigned long)map->handle :
311 map->offset; 351 map->offset;
312 ret = drm_map_handle(dev, &list->hash, user_token, 0); 352 ret = drm_map_handle(dev, &list->hash, user_token, 0,
353 (map->type == _DRM_SHM));
313 if (ret) { 354 if (ret) {
314 if (map->type == _DRM_REGISTERS) 355 if (map->type == _DRM_REGISTERS)
315 iounmap(map->handle); 356 iounmap(map->handle);
@@ -327,9 +368,9 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
327 return 0; 368 return 0;
328 } 369 }
329 370
330int drm_addmap(struct drm_device * dev, unsigned int offset, 371int drm_addmap(struct drm_device * dev, resource_size_t offset,
331 unsigned int size, enum drm_map_type type, 372 unsigned int size, enum drm_map_type type,
332 enum drm_map_flags flags, drm_local_map_t ** map_ptr) 373 enum drm_map_flags flags, struct drm_local_map ** map_ptr)
333{ 374{
334 struct drm_map_list *list; 375 struct drm_map_list *list;
335 int rc; 376 int rc;
@@ -342,6 +383,17 @@ int drm_addmap(struct drm_device * dev, unsigned int offset,
342 383
343EXPORT_SYMBOL(drm_addmap); 384EXPORT_SYMBOL(drm_addmap);
344 385
386/**
387 * Ioctl to specify a range of memory that is available for mapping by a
388 * non-root process.
389 *
390 * \param inode device inode.
391 * \param file_priv DRM file private.
392 * \param cmd command.
393 * \param arg pointer to a drm_map structure.
394 * \return zero on success or a negative value on error.
395 *
396 */
345int drm_addmap_ioctl(struct drm_device *dev, void *data, 397int drm_addmap_ioctl(struct drm_device *dev, void *data,
346 struct drm_file *file_priv) 398 struct drm_file *file_priv)
347{ 399{
@@ -367,19 +419,13 @@ int drm_addmap_ioctl(struct drm_device *dev, void *data,
367 * Remove a map private from list and deallocate resources if the mapping 419 * Remove a map private from list and deallocate resources if the mapping
368 * isn't in use. 420 * isn't in use.
369 * 421 *
370 * \param inode device inode.
371 * \param file_priv DRM file private.
372 * \param cmd command.
373 * \param arg pointer to a struct drm_map structure.
374 * \return zero on success or a negative value on error.
375 *
376 * Searches the map on drm_device::maplist, removes it from the list, see if 422 * Searches the map on drm_device::maplist, removes it from the list, see if
377 * its being used, and free any associate resource (such as MTRR's) if it's not 423 * its being used, and free any associate resource (such as MTRR's) if it's not
378 * being on use. 424 * being on use.
379 * 425 *
380 * \sa drm_addmap 426 * \sa drm_addmap
381 */ 427 */
382int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map) 428int drm_rmmap_locked(struct drm_device *dev, struct drm_local_map *map)
383{ 429{
384 struct drm_map_list *r_list = NULL, *list_t; 430 struct drm_map_list *r_list = NULL, *list_t;
385 drm_dma_handle_t dmah; 431 drm_dma_handle_t dmah;
@@ -442,7 +488,7 @@ int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map)
442} 488}
443EXPORT_SYMBOL(drm_rmmap_locked); 489EXPORT_SYMBOL(drm_rmmap_locked);
444 490
445int drm_rmmap(struct drm_device *dev, drm_local_map_t *map) 491int drm_rmmap(struct drm_device *dev, struct drm_local_map *map)
446{ 492{
447 int ret; 493 int ret;
448 494
@@ -462,12 +508,18 @@ EXPORT_SYMBOL(drm_rmmap);
462 * One use case might be after addmap is allowed for normal users for SHM and 508 * One use case might be after addmap is allowed for normal users for SHM and
463 * gets used by drivers that the server doesn't need to care about. This seems 509 * gets used by drivers that the server doesn't need to care about. This seems
464 * unlikely. 510 * unlikely.
511 *
512 * \param inode device inode.
513 * \param file_priv DRM file private.
514 * \param cmd command.
515 * \param arg pointer to a struct drm_map structure.
516 * \return zero on success or a negative value on error.
465 */ 517 */
466int drm_rmmap_ioctl(struct drm_device *dev, void *data, 518int drm_rmmap_ioctl(struct drm_device *dev, void *data,
467 struct drm_file *file_priv) 519 struct drm_file *file_priv)
468{ 520{
469 struct drm_map *request = data; 521 struct drm_map *request = data;
470 drm_local_map_t *map = NULL; 522 struct drm_local_map *map = NULL;
471 struct drm_map_list *r_list; 523 struct drm_map_list *r_list;
472 int ret; 524 int ret;
473 525
@@ -1534,7 +1586,7 @@ int drm_mapbufs(struct drm_device *dev, void *data,
1534 && (dma->flags & _DRM_DMA_USE_SG)) 1586 && (dma->flags & _DRM_DMA_USE_SG))
1535 || (drm_core_check_feature(dev, DRIVER_FB_DMA) 1587 || (drm_core_check_feature(dev, DRIVER_FB_DMA)
1536 && (dma->flags & _DRM_DMA_USE_FB))) { 1588 && (dma->flags & _DRM_DMA_USE_FB))) {
1537 struct drm_map *map = dev->agp_buffer_map; 1589 struct drm_local_map *map = dev->agp_buffer_map;
1538 unsigned long token = dev->agp_buffer_token; 1590 unsigned long token = dev->agp_buffer_token;
1539 1591
1540 if (!map) { 1592 if (!map) {
diff --git a/drivers/gpu/drm/drm_context.c b/drivers/gpu/drm/drm_context.c
index 809ec0f0345..7d1e53c10d4 100644
--- a/drivers/gpu/drm/drm_context.c
+++ b/drivers/gpu/drm/drm_context.c
@@ -143,7 +143,7 @@ int drm_getsareactx(struct drm_device *dev, void *data,
143 struct drm_file *file_priv) 143 struct drm_file *file_priv)
144{ 144{
145 struct drm_ctx_priv_map *request = data; 145 struct drm_ctx_priv_map *request = data;
146 struct drm_map *map; 146 struct drm_local_map *map;
147 struct drm_map_list *_entry; 147 struct drm_map_list *_entry;
148 148
149 mutex_lock(&dev->struct_mutex); 149 mutex_lock(&dev->struct_mutex);
@@ -186,7 +186,7 @@ int drm_setsareactx(struct drm_device *dev, void *data,
186 struct drm_file *file_priv) 186 struct drm_file *file_priv)
187{ 187{
188 struct drm_ctx_priv_map *request = data; 188 struct drm_ctx_priv_map *request = data;
189 struct drm_map *map = NULL; 189 struct drm_local_map *map = NULL;
190 struct drm_map_list *r_list = NULL; 190 struct drm_map_list *r_list = NULL;
191 191
192 mutex_lock(&dev->struct_mutex); 192 mutex_lock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 1c3a8c55714..a04639dc633 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -42,6 +42,26 @@ static struct drm_display_mode std_modes[] = {
42 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 42 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
43}; 43};
44 44
45static void drm_mode_validate_flag(struct drm_connector *connector,
46 int flags)
47{
48 struct drm_display_mode *mode, *t;
49
50 if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE))
51 return;
52
53 list_for_each_entry_safe(mode, t, &connector->modes, head) {
54 if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
55 !(flags & DRM_MODE_FLAG_INTERLACE))
56 mode->status = MODE_NO_INTERLACE;
57 if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
58 !(flags & DRM_MODE_FLAG_DBLSCAN))
59 mode->status = MODE_NO_DBLESCAN;
60 }
61
62 return;
63}
64
45/** 65/**
46 * drm_helper_probe_connector_modes - get complete set of display modes 66 * drm_helper_probe_connector_modes - get complete set of display modes
47 * @dev: DRM device 67 * @dev: DRM device
@@ -72,6 +92,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
72 struct drm_connector_helper_funcs *connector_funcs = 92 struct drm_connector_helper_funcs *connector_funcs =
73 connector->helper_private; 93 connector->helper_private;
74 int count = 0; 94 int count = 0;
95 int mode_flags = 0;
75 96
76 DRM_DEBUG("%s\n", drm_get_connector_name(connector)); 97 DRM_DEBUG("%s\n", drm_get_connector_name(connector));
77 /* set all modes to the unverified state */ 98 /* set all modes to the unverified state */
@@ -96,6 +117,13 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
96 if (maxX && maxY) 117 if (maxX && maxY)
97 drm_mode_validate_size(dev, &connector->modes, maxX, 118 drm_mode_validate_size(dev, &connector->modes, maxX,
98 maxY, 0); 119 maxY, 0);
120
121 if (connector->interlace_allowed)
122 mode_flags |= DRM_MODE_FLAG_INTERLACE;
123 if (connector->doublescan_allowed)
124 mode_flags |= DRM_MODE_FLAG_DBLSCAN;
125 drm_mode_validate_flag(connector, mode_flags);
126
99 list_for_each_entry_safe(mode, t, &connector->modes, head) { 127 list_for_each_entry_safe(mode, t, &connector->modes, head) {
100 if (mode->status == MODE_OK) 128 if (mode->status == MODE_OK)
101 mode->status = connector_funcs->mode_valid(connector, 129 mode->status = connector_funcs->mode_valid(connector,
@@ -885,7 +913,6 @@ bool drm_helper_plugged_event(struct drm_device *dev)
885/** 913/**
886 * drm_initial_config - setup a sane initial connector configuration 914 * drm_initial_config - setup a sane initial connector configuration
887 * @dev: DRM device 915 * @dev: DRM device
888 * @can_grow: this configuration is growable
889 * 916 *
890 * LOCKING: 917 * LOCKING:
891 * Called at init time, must take mode config lock. 918 * Called at init time, must take mode config lock.
@@ -897,7 +924,7 @@ bool drm_helper_plugged_event(struct drm_device *dev)
897 * RETURNS: 924 * RETURNS:
898 * Zero if everything went ok, nonzero otherwise. 925 * Zero if everything went ok, nonzero otherwise.
899 */ 926 */
900bool drm_helper_initial_config(struct drm_device *dev, bool can_grow) 927bool drm_helper_initial_config(struct drm_device *dev)
901{ 928{
902 struct drm_connector *connector; 929 struct drm_connector *connector;
903 int count = 0; 930 int count = 0;
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
new file mode 100644
index 00000000000..c77c6c6d9d2
--- /dev/null
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -0,0 +1,235 @@
1/**
2 * \file drm_debugfs.c
3 * debugfs support for DRM
4 *
5 * \author Ben Gamari <bgamari@gmail.com>
6 */
7
8/*
9 * Created: Sun Dec 21 13:08:50 2008 by bgamari@gmail.com
10 *
11 * Copyright 2008 Ben Gamari <bgamari@gmail.com>
12 *
13 * Permission is hereby granted, free of charge, to any person obtaining a
14 * copy of this software and associated documentation files (the "Software"),
15 * to deal in the Software without restriction, including without limitation
16 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17 * and/or sell copies of the Software, and to permit persons to whom the
18 * Software is furnished to do so, subject to the following conditions:
19 *
20 * The above copyright notice and this permission notice (including the next
21 * paragraph) shall be included in all copies or substantial portions of the
22 * Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
28 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
29 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
30 * OTHER DEALINGS IN THE SOFTWARE.
31 */
32
33#include <linux/debugfs.h>
34#include <linux/seq_file.h>
35#include "drmP.h"
36
37#if defined(CONFIG_DEBUG_FS)
38
39/***************************************************
40 * Initialization, etc.
41 **************************************************/
42
43static struct drm_info_list drm_debugfs_list[] = {
44 {"name", drm_name_info, 0},
45 {"vm", drm_vm_info, 0},
46 {"clients", drm_clients_info, 0},
47 {"queues", drm_queues_info, 0},
48 {"bufs", drm_bufs_info, 0},
49 {"gem_names", drm_gem_name_info, DRIVER_GEM},
50 {"gem_objects", drm_gem_object_info, DRIVER_GEM},
51#if DRM_DEBUG_CODE
52 {"vma", drm_vma_info, 0},
53#endif
54};
55#define DRM_DEBUGFS_ENTRIES ARRAY_SIZE(drm_debugfs_list)
56
57
58static int drm_debugfs_open(struct inode *inode, struct file *file)
59{
60 struct drm_info_node *node = inode->i_private;
61
62 return single_open(file, node->info_ent->show, node);
63}
64
65
66static const struct file_operations drm_debugfs_fops = {
67 .owner = THIS_MODULE,
68 .open = drm_debugfs_open,
69 .read = seq_read,
70 .llseek = seq_lseek,
71 .release = single_release,
72};
73
74
75/**
76 * Initialize a given set of debugfs files for a device
77 *
78 * \param files The array of files to create
79 * \param count The number of files given
80 * \param root DRI debugfs dir entry.
81 * \param minor device minor number
82 * \return Zero on success, non-zero on failure
83 *
84 * Create a given set of debugfs files represented by an array of
85 * gdm_debugfs_lists in the given root directory.
86 */
87int drm_debugfs_create_files(struct drm_info_list *files, int count,
88 struct dentry *root, struct drm_minor *minor)
89{
90 struct drm_device *dev = minor->dev;
91 struct dentry *ent;
92 struct drm_info_node *tmp;
93 char name[64];
94 int i, ret;
95
96 for (i = 0; i < count; i++) {
97 u32 features = files[i].driver_features;
98
99 if (features != 0 &&
100 (dev->driver->driver_features & features) != features)
101 continue;
102
103 tmp = drm_alloc(sizeof(struct drm_info_node),
104 _DRM_DRIVER);
105 ent = debugfs_create_file(files[i].name, S_IFREG | S_IRUGO,
106 root, tmp, &drm_debugfs_fops);
107 if (!ent) {
108 DRM_ERROR("Cannot create /debugfs/dri/%s/%s\n",
109 name, files[i].name);
110 drm_free(tmp, sizeof(struct drm_info_node),
111 _DRM_DRIVER);
112 ret = -1;
113 goto fail;
114 }
115
116 tmp->minor = minor;
117 tmp->dent = ent;
118 tmp->info_ent = &files[i];
119 list_add(&(tmp->list), &(minor->debugfs_nodes.list));
120 }
121 return 0;
122
123fail:
124 drm_debugfs_remove_files(files, count, minor);
125 return ret;
126}
127EXPORT_SYMBOL(drm_debugfs_create_files);
128
129/**
130 * Initialize the DRI debugfs filesystem for a device
131 *
132 * \param dev DRM device
133 * \param minor device minor number
134 * \param root DRI debugfs dir entry.
135 *
136 * Create the DRI debugfs root entry "/debugfs/dri", the device debugfs root entry
137 * "/debugfs/dri/%minor%/", and each entry in debugfs_list as
138 * "/debugfs/dri/%minor%/%name%".
139 */
140int drm_debugfs_init(struct drm_minor *minor, int minor_id,
141 struct dentry *root)
142{
143 struct drm_device *dev = minor->dev;
144 char name[64];
145 int ret;
146
147 INIT_LIST_HEAD(&minor->debugfs_nodes.list);
148 sprintf(name, "%d", minor_id);
149 minor->debugfs_root = debugfs_create_dir(name, root);
150 if (!minor->debugfs_root) {
151 DRM_ERROR("Cannot create /debugfs/dri/%s\n", name);
152 return -1;
153 }
154
155 ret = drm_debugfs_create_files(drm_debugfs_list, DRM_DEBUGFS_ENTRIES,
156 minor->debugfs_root, minor);
157 if (ret) {
158 debugfs_remove(minor->debugfs_root);
159 minor->debugfs_root = NULL;
160 DRM_ERROR("Failed to create core drm debugfs files\n");
161 return ret;
162 }
163
164 if (dev->driver->debugfs_init) {
165 ret = dev->driver->debugfs_init(minor);
166 if (ret) {
167 DRM_ERROR("DRM: Driver failed to initialize "
168 "/debugfs/dri.\n");
169 return ret;
170 }
171 }
172 return 0;
173}
174
175
176/**
177 * Remove a list of debugfs files
178 *
179 * \param files The list of files
180 * \param count The number of files
181 * \param minor The minor of which we should remove the files
182 * \return always zero.
183 *
184 * Remove all debugfs entries created by debugfs_init().
185 */
186int drm_debugfs_remove_files(struct drm_info_list *files, int count,
187 struct drm_minor *minor)
188{
189 struct list_head *pos, *q;
190 struct drm_info_node *tmp;
191 int i;
192
193 for (i = 0; i < count; i++) {
194 list_for_each_safe(pos, q, &minor->debugfs_nodes.list) {
195 tmp = list_entry(pos, struct drm_info_node, list);
196 if (tmp->info_ent == &files[i]) {
197 debugfs_remove(tmp->dent);
198 list_del(pos);
199 drm_free(tmp, sizeof(struct drm_info_node),
200 _DRM_DRIVER);
201 }
202 }
203 }
204 return 0;
205}
206EXPORT_SYMBOL(drm_debugfs_remove_files);
207
208/**
209 * Cleanup the debugfs filesystem resources.
210 *
211 * \param minor device minor number.
212 * \return always zero.
213 *
214 * Remove all debugfs entries created by debugfs_init().
215 */
216int drm_debugfs_cleanup(struct drm_minor *minor)
217{
218 struct drm_device *dev = minor->dev;
219
220 if (!minor->debugfs_root)
221 return 0;
222
223 if (dev->driver->debugfs_cleanup)
224 dev->driver->debugfs_cleanup(minor);
225
226 drm_debugfs_remove_files(drm_debugfs_list, DRM_DEBUGFS_ENTRIES, minor);
227
228 debugfs_remove(minor->debugfs_root);
229 minor->debugfs_root = NULL;
230
231 return 0;
232}
233
234#endif /* CONFIG_DEBUG_FS */
235
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 14c7a23dc15..c4ada8b6295 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -46,9 +46,11 @@
46 * OTHER DEALINGS IN THE SOFTWARE. 46 * OTHER DEALINGS IN THE SOFTWARE.
47 */ 47 */
48 48
49#include <linux/debugfs.h>
49#include "drmP.h" 50#include "drmP.h"
50#include "drm_core.h" 51#include "drm_core.h"
51 52
53
52static int drm_version(struct drm_device *dev, void *data, 54static int drm_version(struct drm_device *dev, void *data,
53 struct drm_file *file_priv); 55 struct drm_file *file_priv);
54 56
@@ -178,7 +180,7 @@ int drm_lastclose(struct drm_device * dev)
178 180
179 /* Clear AGP information */ 181 /* Clear AGP information */
180 if (drm_core_has_AGP(dev) && dev->agp && 182 if (drm_core_has_AGP(dev) && dev->agp &&
181 !drm_core_check_feature(dev, DRIVER_MODESET)) { 183 !drm_core_check_feature(dev, DRIVER_MODESET)) {
182 struct drm_agp_mem *entry, *tempe; 184 struct drm_agp_mem *entry, *tempe;
183 185
184 /* Remove AGP resources, but leave dev->agp 186 /* Remove AGP resources, but leave dev->agp
@@ -252,15 +254,19 @@ int drm_lastclose(struct drm_device * dev)
252int drm_init(struct drm_driver *driver) 254int drm_init(struct drm_driver *driver)
253{ 255{
254 struct pci_dev *pdev = NULL; 256 struct pci_dev *pdev = NULL;
255 struct pci_device_id *pid; 257 const struct pci_device_id *pid;
256 int i; 258 int i;
257 259
258 DRM_DEBUG("\n"); 260 DRM_DEBUG("\n");
259 261
260 INIT_LIST_HEAD(&driver->device_list); 262 INIT_LIST_HEAD(&driver->device_list);
261 263
264 if (driver->driver_features & DRIVER_MODESET)
265 return pci_register_driver(&driver->pci_driver);
266
267 /* If not using KMS, fall back to stealth mode manual scanning. */
262 for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) { 268 for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) {
263 pid = (struct pci_device_id *)&driver->pci_driver.id_table[i]; 269 pid = &driver->pci_driver.id_table[i];
264 270
265 /* Loop around setting up a DRM device for each PCI device 271 /* Loop around setting up a DRM device for each PCI device
266 * matching our ID and device class. If we had the internal 272 * matching our ID and device class. If we had the internal
@@ -285,68 +291,17 @@ int drm_init(struct drm_driver *driver)
285 291
286EXPORT_SYMBOL(drm_init); 292EXPORT_SYMBOL(drm_init);
287 293
288/**
289 * Called via cleanup_module() at module unload time.
290 *
291 * Cleans up all DRM device, calling drm_lastclose().
292 *
293 * \sa drm_init
294 */
295static void drm_cleanup(struct drm_device * dev)
296{
297 struct drm_map_list *r_list, *list_temp;
298 DRM_DEBUG("\n");
299
300 if (!dev) {
301 DRM_ERROR("cleanup called no dev\n");
302 return;
303 }
304
305 drm_vblank_cleanup(dev);
306
307 drm_lastclose(dev);
308
309 if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) &&
310 dev->agp && dev->agp->agp_mtrr >= 0) {
311 int retval;
312 retval = mtrr_del(dev->agp->agp_mtrr,
313 dev->agp->agp_info.aper_base,
314 dev->agp->agp_info.aper_size * 1024 * 1024);
315 DRM_DEBUG("mtrr_del=%d\n", retval);
316 }
317
318 if (dev->driver->unload)
319 dev->driver->unload(dev);
320
321 if (drm_core_has_AGP(dev) && dev->agp) {
322 drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
323 dev->agp = NULL;
324 }
325
326 drm_ht_remove(&dev->map_hash);
327 drm_ctxbitmap_cleanup(dev);
328
329 list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head)
330 drm_rmmap(dev, r_list->map);
331
332 if (drm_core_check_feature(dev, DRIVER_MODESET))
333 drm_put_minor(&dev->control);
334
335 if (dev->driver->driver_features & DRIVER_GEM)
336 drm_gem_destroy(dev);
337
338 drm_put_minor(&dev->primary);
339 if (drm_put_dev(dev))
340 DRM_ERROR("Cannot unload module\n");
341}
342
343void drm_exit(struct drm_driver *driver) 294void drm_exit(struct drm_driver *driver)
344{ 295{
345 struct drm_device *dev, *tmp; 296 struct drm_device *dev, *tmp;
346 DRM_DEBUG("\n"); 297 DRM_DEBUG("\n");
347 298
348 list_for_each_entry_safe(dev, tmp, &driver->device_list, driver_item) 299 if (driver->driver_features & DRIVER_MODESET) {
349 drm_cleanup(dev); 300 pci_unregister_driver(&driver->pci_driver);
301 } else {
302 list_for_each_entry_safe(dev, tmp, &driver->device_list, driver_item)
303 drm_put_dev(dev);
304 }
350 305
351 DRM_INFO("Module unloaded\n"); 306 DRM_INFO("Module unloaded\n");
352} 307}
@@ -382,6 +337,13 @@ static int __init drm_core_init(void)
382 goto err_p3; 337 goto err_p3;
383 } 338 }
384 339
340 drm_debugfs_root = debugfs_create_dir("dri", NULL);
341 if (!drm_debugfs_root) {
342 DRM_ERROR("Cannot create /debugfs/dri\n");
343 ret = -1;
344 goto err_p3;
345 }
346
385 drm_mem_init(); 347 drm_mem_init();
386 348
387 DRM_INFO("Initialized %s %d.%d.%d %s\n", 349 DRM_INFO("Initialized %s %d.%d.%d %s\n",
@@ -400,6 +362,7 @@ err_p1:
400static void __exit drm_core_exit(void) 362static void __exit drm_core_exit(void)
401{ 363{
402 remove_proc_entry("dri", NULL); 364 remove_proc_entry("dri", NULL);
365 debugfs_remove(drm_debugfs_root);
403 drm_sysfs_destroy(); 366 drm_sysfs_destroy();
404 367
405 unregister_chrdev(DRM_MAJOR, "drm"); 368 unregister_chrdev(DRM_MAJOR, "drm");
@@ -458,6 +421,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
458 drm_ioctl_t *func; 421 drm_ioctl_t *func;
459 unsigned int nr = DRM_IOCTL_NR(cmd); 422 unsigned int nr = DRM_IOCTL_NR(cmd);
460 int retcode = -EINVAL; 423 int retcode = -EINVAL;
424 char stack_kdata[128];
461 char *kdata = NULL; 425 char *kdata = NULL;
462 426
463 atomic_inc(&dev->ioctl_count); 427 atomic_inc(&dev->ioctl_count);
@@ -496,10 +460,14 @@ int drm_ioctl(struct inode *inode, struct file *filp,
496 retcode = -EACCES; 460 retcode = -EACCES;
497 } else { 461 } else {
498 if (cmd & (IOC_IN | IOC_OUT)) { 462 if (cmd & (IOC_IN | IOC_OUT)) {
499 kdata = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL); 463 if (_IOC_SIZE(cmd) <= sizeof(stack_kdata)) {
500 if (!kdata) { 464 kdata = stack_kdata;
501 retcode = -ENOMEM; 465 } else {
502 goto err_i1; 466 kdata = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
467 if (!kdata) {
468 retcode = -ENOMEM;
469 goto err_i1;
470 }
503 } 471 }
504 } 472 }
505 473
@@ -520,7 +488,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
520 } 488 }
521 489
522 err_i1: 490 err_i1:
523 if (kdata) 491 if (kdata != stack_kdata)
524 kfree(kdata); 492 kfree(kdata);
525 atomic_dec(&dev->ioctl_count); 493 atomic_dec(&dev->ioctl_count);
526 if (retcode) 494 if (retcode)
@@ -530,7 +498,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
530 498
531EXPORT_SYMBOL(drm_ioctl); 499EXPORT_SYMBOL(drm_ioctl);
532 500
533drm_local_map_t *drm_getsarea(struct drm_device *dev) 501struct drm_local_map *drm_getsarea(struct drm_device *dev)
534{ 502{
535 struct drm_map_list *entry; 503 struct drm_map_list *entry;
536 504
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a839a28d8ee..ca9c6165671 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -125,10 +125,8 @@ static bool edid_is_valid(struct edid *edid)
125 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 125 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
126 goto bad; 126 goto bad;
127 } 127 }
128 if (edid->revision > 3) { 128 if (edid->revision > 4)
129 DRM_ERROR("EDID has minor version %d, which is not between 0-3\n", edid->revision); 129 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
130 goto bad;
131 }
132 130
133 for (i = 0; i < EDID_LENGTH; i++) 131 for (i = 0; i < EDID_LENGTH; i++)
134 csum += raw_edid[i]; 132 csum += raw_edid[i];
@@ -162,7 +160,7 @@ static bool edid_vendor(struct edid *edid, char *vendor)
162 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 160 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
163 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 161 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
164 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 162 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
165 edid_vendor[2] = (edid->mfg_id[2] & 0x1f) + '@'; 163 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
166 164
167 return !strncmp(edid_vendor, vendor, 3); 165 return !strncmp(edid_vendor, vendor, 3);
168} 166}
@@ -550,11 +548,20 @@ static int add_detailed_info(struct drm_connector *connector,
550} 548}
551 549
552#define DDC_ADDR 0x50 550#define DDC_ADDR 0x50
553 551/**
554unsigned char *drm_do_probe_ddc_edid(struct i2c_adapter *adapter) 552 * Get EDID information via I2C.
553 *
554 * \param adapter : i2c device adaptor
555 * \param buf : EDID data buffer to be filled
556 * \param len : EDID data buffer length
557 * \return 0 on success or -1 on failure.
558 *
559 * Try to fetch EDID information by calling i2c driver function.
560 */
561int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
562 unsigned char *buf, int len)
555{ 563{
556 unsigned char start = 0x0; 564 unsigned char start = 0x0;
557 unsigned char *buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
558 struct i2c_msg msgs[] = { 565 struct i2c_msg msgs[] = {
559 { 566 {
560 .addr = DDC_ADDR, 567 .addr = DDC_ADDR,
@@ -564,31 +571,36 @@ unsigned char *drm_do_probe_ddc_edid(struct i2c_adapter *adapter)
564 }, { 571 }, {
565 .addr = DDC_ADDR, 572 .addr = DDC_ADDR,
566 .flags = I2C_M_RD, 573 .flags = I2C_M_RD,
567 .len = EDID_LENGTH, 574 .len = len,
568 .buf = buf, 575 .buf = buf,
569 } 576 }
570 }; 577 };
571 578
572 if (!buf) {
573 dev_warn(&adapter->dev, "unable to allocate memory for EDID "
574 "block.\n");
575 return NULL;
576 }
577
578 if (i2c_transfer(adapter, msgs, 2) == 2) 579 if (i2c_transfer(adapter, msgs, 2) == 2)
579 return buf; 580 return 0;
580 581
581 dev_info(&adapter->dev, "unable to read EDID block.\n"); 582 dev_info(&adapter->dev, "unable to read EDID block.\n");
582 kfree(buf); 583 return -1;
583 return NULL;
584} 584}
585EXPORT_SYMBOL(drm_do_probe_ddc_edid); 585EXPORT_SYMBOL(drm_do_probe_ddc_edid);
586 586
587static unsigned char *drm_ddc_read(struct i2c_adapter *adapter) 587/**
588 * Get EDID information.
589 *
590 * \param adapter : i2c device adaptor.
591 * \param buf : EDID data buffer to be filled
592 * \param len : EDID data buffer length
593 * \return 0 on success or -1 on failure.
594 *
595 * Initialize DDC, then fetch EDID information
596 * by calling drm_do_probe_ddc_edid function.
597 */
598static int drm_ddc_read(struct i2c_adapter *adapter,
599 unsigned char *buf, int len)
588{ 600{
589 struct i2c_algo_bit_data *algo_data = adapter->algo_data; 601 struct i2c_algo_bit_data *algo_data = adapter->algo_data;
590 unsigned char *edid = NULL;
591 int i, j; 602 int i, j;
603 int ret = -1;
592 604
593 algo_data->setscl(algo_data->data, 1); 605 algo_data->setscl(algo_data->data, 1);
594 606
@@ -616,7 +628,7 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
616 msleep(15); 628 msleep(15);
617 629
618 /* Do the real work */ 630 /* Do the real work */
619 edid = drm_do_probe_ddc_edid(adapter); 631 ret = drm_do_probe_ddc_edid(adapter, buf, len);
620 algo_data->setsda(algo_data->data, 0); 632 algo_data->setsda(algo_data->data, 0);
621 algo_data->setscl(algo_data->data, 0); 633 algo_data->setscl(algo_data->data, 0);
622 msleep(15); 634 msleep(15);
@@ -632,7 +644,7 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
632 msleep(15); 644 msleep(15);
633 algo_data->setscl(algo_data->data, 0); 645 algo_data->setscl(algo_data->data, 0);
634 algo_data->setsda(algo_data->data, 0); 646 algo_data->setsda(algo_data->data, 0);
635 if (edid) 647 if (ret == 0)
636 break; 648 break;
637 } 649 }
638 /* Release the DDC lines when done or the Apple Cinema HD display 650 /* Release the DDC lines when done or the Apple Cinema HD display
@@ -641,9 +653,31 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
641 algo_data->setsda(algo_data->data, 1); 653 algo_data->setsda(algo_data->data, 1);
642 algo_data->setscl(algo_data->data, 1); 654 algo_data->setscl(algo_data->data, 1);
643 655
644 return edid; 656 return ret;
645} 657}
646 658
659static int drm_ddc_read_edid(struct drm_connector *connector,
660 struct i2c_adapter *adapter,
661 char *buf, int len)
662{
663 int ret;
664
665 ret = drm_ddc_read(adapter, buf, len);
666 if (ret != 0) {
667 dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n",
668 drm_get_connector_name(connector));
669 goto end;
670 }
671 if (!edid_is_valid((struct edid *)buf)) {
672 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
673 drm_get_connector_name(connector));
674 ret = -1;
675 }
676end:
677 return ret;
678}
679
680#define MAX_EDID_EXT_NUM 4
647/** 681/**
648 * drm_get_edid - get EDID data, if available 682 * drm_get_edid - get EDID data, if available
649 * @connector: connector we're probing 683 * @connector: connector we're probing
@@ -656,27 +690,118 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
656struct edid *drm_get_edid(struct drm_connector *connector, 690struct edid *drm_get_edid(struct drm_connector *connector,
657 struct i2c_adapter *adapter) 691 struct i2c_adapter *adapter)
658{ 692{
693 int ret;
659 struct edid *edid; 694 struct edid *edid;
660 695
661 edid = (struct edid *)drm_ddc_read(adapter); 696 edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
662 if (!edid) { 697 GFP_KERNEL);
663 dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n", 698 if (edid == NULL) {
664 drm_get_connector_name(connector)); 699 dev_warn(&connector->dev->pdev->dev,
665 return NULL; 700 "Failed to allocate EDID\n");
701 goto end;
666 } 702 }
667 if (!edid_is_valid(edid)) { 703
668 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 704 /* Read first EDID block */
669 drm_get_connector_name(connector)); 705 ret = drm_ddc_read_edid(connector, adapter,
670 kfree(edid); 706 (unsigned char *)edid, EDID_LENGTH);
671 return NULL; 707 if (ret != 0)
708 goto clean_up;
709
710 /* There are EDID extensions to be read */
711 if (edid->extensions != 0) {
712 int edid_ext_num = edid->extensions;
713
714 if (edid_ext_num > MAX_EDID_EXT_NUM) {
715 dev_warn(&connector->dev->pdev->dev,
716 "The number of extension(%d) is "
717 "over max (%d), actually read number (%d)\n",
718 edid_ext_num, MAX_EDID_EXT_NUM,
719 MAX_EDID_EXT_NUM);
720 /* Reset EDID extension number to be read */
721 edid_ext_num = MAX_EDID_EXT_NUM;
722 }
723 /* Read EDID including extensions too */
724 ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
725 EDID_LENGTH * (edid_ext_num + 1));
726 if (ret != 0)
727 goto clean_up;
728
672 } 729 }
673 730
674 connector->display_info.raw_edid = (char *)edid; 731 connector->display_info.raw_edid = (char *)edid;
732 goto end;
675 733
734clean_up:
735 kfree(edid);
736 edid = NULL;
737end:
676 return edid; 738 return edid;
739
677} 740}
678EXPORT_SYMBOL(drm_get_edid); 741EXPORT_SYMBOL(drm_get_edid);
679 742
743#define HDMI_IDENTIFIER 0x000C03
744#define VENDOR_BLOCK 0x03
745/**
746 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
747 * @edid: monitor EDID information
748 *
749 * Parse the CEA extension according to CEA-861-B.
750 * Return true if HDMI, false if not or unknown.
751 */
752bool drm_detect_hdmi_monitor(struct edid *edid)
753{
754 char *edid_ext = NULL;
755 int i, hdmi_id, edid_ext_num;
756 int start_offset, end_offset;
757 bool is_hdmi = false;
758
759 /* No EDID or EDID extensions */
760 if (edid == NULL || edid->extensions == 0)
761 goto end;
762
763 /* Chose real EDID extension number */
764 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
765 MAX_EDID_EXT_NUM : edid->extensions;
766
767 /* Find CEA extension */
768 for (i = 0; i < edid_ext_num; i++) {
769 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
770 /* This block is CEA extension */
771 if (edid_ext[0] == 0x02)
772 break;
773 }
774
775 if (i == edid_ext_num)
776 goto end;
777
778 /* Data block offset in CEA extension block */
779 start_offset = 4;
780 end_offset = edid_ext[2];
781
782 /*
783 * Because HDMI identifier is in Vendor Specific Block,
784 * search it from all data blocks of CEA extension.
785 */
786 for (i = start_offset; i < end_offset;
787 /* Increased by data block len */
788 i += ((edid_ext[i] & 0x1f) + 1)) {
789 /* Find vendor specific block */
790 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
791 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
792 edid_ext[i + 3] << 16;
793 /* Find HDMI identifier */
794 if (hdmi_id == HDMI_IDENTIFIER)
795 is_hdmi = true;
796 break;
797 }
798 }
799
800end:
801 return is_hdmi;
802}
803EXPORT_SYMBOL(drm_detect_hdmi_monitor);
804
680/** 805/**
681 * drm_add_edid_modes - add modes from EDID data, if available 806 * drm_add_edid_modes - add modes from EDID data, if available
682 * @connector: connector we're probing 807 * @connector: connector we're probing
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index f52663ebe01..09a3571c990 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -274,6 +274,7 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
274 /* create a new master */ 274 /* create a new master */
275 priv->minor->master = drm_master_create(priv->minor); 275 priv->minor->master = drm_master_create(priv->minor);
276 if (!priv->minor->master) { 276 if (!priv->minor->master) {
277 mutex_unlock(&dev->struct_mutex);
277 ret = -ENOMEM; 278 ret = -ENOMEM;
278 goto out_free; 279 goto out_free;
279 } 280 }
@@ -337,14 +338,10 @@ int drm_fasync(int fd, struct file *filp, int on)
337{ 338{
338 struct drm_file *priv = filp->private_data; 339 struct drm_file *priv = filp->private_data;
339 struct drm_device *dev = priv->minor->dev; 340 struct drm_device *dev = priv->minor->dev;
340 int retcode;
341 341
342 DRM_DEBUG("fd = %d, device = 0x%lx\n", fd, 342 DRM_DEBUG("fd = %d, device = 0x%lx\n", fd,
343 (long)old_encode_dev(priv->minor->device)); 343 (long)old_encode_dev(priv->minor->device));
344 retcode = fasync_helper(fd, filp, on, &dev->buf_async); 344 return fasync_helper(fd, filp, on, &dev->buf_async);
345 if (retcode < 0)
346 return retcode;
347 return 0;
348} 345}
349EXPORT_SYMBOL(drm_fasync); 346EXPORT_SYMBOL(drm_fasync);
350 347
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 88d3368ffdd..4984aa89cf3 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -502,10 +502,9 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
502 struct drm_file *priv = filp->private_data; 502 struct drm_file *priv = filp->private_data;
503 struct drm_device *dev = priv->minor->dev; 503 struct drm_device *dev = priv->minor->dev;
504 struct drm_gem_mm *mm = dev->mm_private; 504 struct drm_gem_mm *mm = dev->mm_private;
505 struct drm_map *map = NULL; 505 struct drm_local_map *map = NULL;
506 struct drm_gem_object *obj; 506 struct drm_gem_object *obj;
507 struct drm_hash_item *hash; 507 struct drm_hash_item *hash;
508 unsigned long prot;
509 int ret = 0; 508 int ret = 0;
510 509
511 mutex_lock(&dev->struct_mutex); 510 mutex_lock(&dev->struct_mutex);
@@ -538,11 +537,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
538 vma->vm_ops = obj->dev->driver->gem_vm_ops; 537 vma->vm_ops = obj->dev->driver->gem_vm_ops;
539 vma->vm_private_data = map->handle; 538 vma->vm_private_data = map->handle;
540 /* FIXME: use pgprot_writecombine when available */ 539 /* FIXME: use pgprot_writecombine when available */
541 prot = pgprot_val(vma->vm_page_prot); 540 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
542#ifdef CONFIG_X86
543 prot |= _PAGE_CACHE_WC;
544#endif
545 vma->vm_page_prot = __pgprot(prot);
546 541
547 /* Take a ref for this mapping of the object, so that the fault 542 /* Take a ref for this mapping of the object, so that the fault
548 * handler can dereference the mmap offset's pointer to the object. 543 * handler can dereference the mmap offset's pointer to the object.
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
new file mode 100644
index 00000000000..f0f6c6b93f3
--- /dev/null
+++ b/drivers/gpu/drm/drm_info.c
@@ -0,0 +1,328 @@
1/**
2 * \file drm_info.c
3 * DRM info file implementations
4 *
5 * \author Ben Gamari <bgamari@gmail.com>
6 */
7
8/*
9 * Created: Sun Dec 21 13:09:50 2008 by bgamari@gmail.com
10 *
11 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
12 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
13 * Copyright 2008 Ben Gamari <bgamari@gmail.com>
14 * All Rights Reserved.
15 *
16 * Permission is hereby granted, free of charge, to any person obtaining a
17 * copy of this software and associated documentation files (the "Software"),
18 * to deal in the Software without restriction, including without limitation
19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
20 * and/or sell copies of the Software, and to permit persons to whom the
21 * Software is furnished to do so, subject to the following conditions:
22 *
23 * The above copyright notice and this permission notice (including the next
24 * paragraph) shall be included in all copies or substantial portions of the
25 * Software.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33 * OTHER DEALINGS IN THE SOFTWARE.
34 */
35
36#include <linux/seq_file.h>
37#include "drmP.h"
38
39/**
40 * Called when "/proc/dri/.../name" is read.
41 *
42 * Prints the device name together with the bus id if available.
43 */
44int drm_name_info(struct seq_file *m, void *data)
45{
46 struct drm_info_node *node = (struct drm_info_node *) m->private;
47 struct drm_minor *minor = node->minor;
48 struct drm_device *dev = minor->dev;
49 struct drm_master *master = minor->master;
50
51 if (!master)
52 return 0;
53
54 if (master->unique) {
55 seq_printf(m, "%s %s %s\n",
56 dev->driver->pci_driver.name,
57 pci_name(dev->pdev), master->unique);
58 } else {
59 seq_printf(m, "%s %s\n", dev->driver->pci_driver.name,
60 pci_name(dev->pdev));
61 }
62
63 return 0;
64}
65
66/**
67 * Called when "/proc/dri/.../vm" is read.
68 *
69 * Prints information about all mappings in drm_device::maplist.
70 */
71int drm_vm_info(struct seq_file *m, void *data)
72{
73 struct drm_info_node *node = (struct drm_info_node *) m->private;
74 struct drm_device *dev = node->minor->dev;
75 struct drm_local_map *map;
76 struct drm_map_list *r_list;
77
78 /* Hardcoded from _DRM_FRAME_BUFFER,
79 _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and
80 _DRM_SCATTER_GATHER and _DRM_CONSISTENT */
81 const char *types[] = { "FB", "REG", "SHM", "AGP", "SG", "PCI" };
82 const char *type;
83 int i;
84
85 mutex_lock(&dev->struct_mutex);
86 seq_printf(m, "slot offset size type flags address mtrr\n\n");
87 i = 0;
88 list_for_each_entry(r_list, &dev->maplist, head) {
89 map = r_list->map;
90 if (!map)
91 continue;
92 if (map->type < 0 || map->type > 5)
93 type = "??";
94 else
95 type = types[map->type];
96
97 seq_printf(m, "%4d 0x%016llx 0x%08lx %4.4s 0x%02x 0x%08lx ",
98 i,
99 (unsigned long long)map->offset,
100 map->size, type, map->flags,
101 (unsigned long) r_list->user_token);
102 if (map->mtrr < 0)
103 seq_printf(m, "none\n");
104 else
105 seq_printf(m, "%4d\n", map->mtrr);
106 i++;
107 }
108 mutex_unlock(&dev->struct_mutex);
109 return 0;
110}
111
112/**
113 * Called when "/proc/dri/.../queues" is read.
114 */
115int drm_queues_info(struct seq_file *m, void *data)
116{
117 struct drm_info_node *node = (struct drm_info_node *) m->private;
118 struct drm_device *dev = node->minor->dev;
119 int i;
120 struct drm_queue *q;
121
122 mutex_lock(&dev->struct_mutex);
123 seq_printf(m, " ctx/flags use fin"
124 " blk/rw/rwf wait flushed queued"
125 " locks\n\n");
126 for (i = 0; i < dev->queue_count; i++) {
127 q = dev->queuelist[i];
128 atomic_inc(&q->use_count);
129 seq_printf(m, "%5d/0x%03x %5d %5d"
130 " %5d/%c%c/%c%c%c %5Zd\n",
131 i,
132 q->flags,
133 atomic_read(&q->use_count),
134 atomic_read(&q->finalization),
135 atomic_read(&q->block_count),
136 atomic_read(&q->block_read) ? 'r' : '-',
137 atomic_read(&q->block_write) ? 'w' : '-',
138 waitqueue_active(&q->read_queue) ? 'r' : '-',
139 waitqueue_active(&q->write_queue) ? 'w' : '-',
140 waitqueue_active(&q->flush_queue) ? 'f' : '-',
141 DRM_BUFCOUNT(&q->waitlist));
142 atomic_dec(&q->use_count);
143 }
144 mutex_unlock(&dev->struct_mutex);
145 return 0;
146}
147
148/**
149 * Called when "/proc/dri/.../bufs" is read.
150 */
151int drm_bufs_info(struct seq_file *m, void *data)
152{
153 struct drm_info_node *node = (struct drm_info_node *) m->private;
154 struct drm_device *dev = node->minor->dev;
155 struct drm_device_dma *dma;
156 int i, seg_pages;
157
158 mutex_lock(&dev->struct_mutex);
159 dma = dev->dma;
160 if (!dma) {
161 mutex_unlock(&dev->struct_mutex);
162 return 0;
163 }
164
165 seq_printf(m, " o size count free segs pages kB\n\n");
166 for (i = 0; i <= DRM_MAX_ORDER; i++) {
167 if (dma->bufs[i].buf_count) {
168 seg_pages = dma->bufs[i].seg_count * (1 << dma->bufs[i].page_order);
169 seq_printf(m, "%2d %8d %5d %5d %5d %5d %5ld\n",
170 i,
171 dma->bufs[i].buf_size,
172 dma->bufs[i].buf_count,
173 atomic_read(&dma->bufs[i].freelist.count),
174 dma->bufs[i].seg_count,
175 seg_pages,
176 seg_pages * PAGE_SIZE / 1024);
177 }
178 }
179 seq_printf(m, "\n");
180 for (i = 0; i < dma->buf_count; i++) {
181 if (i && !(i % 32))
182 seq_printf(m, "\n");
183 seq_printf(m, " %d", dma->buflist[i]->list);
184 }
185 seq_printf(m, "\n");
186 mutex_unlock(&dev->struct_mutex);
187 return 0;
188}
189
190/**
191 * Called when "/proc/dri/.../vblank" is read.
192 */
193int drm_vblank_info(struct seq_file *m, void *data)
194{
195 struct drm_info_node *node = (struct drm_info_node *) m->private;
196 struct drm_device *dev = node->minor->dev;
197 int crtc;
198
199 mutex_lock(&dev->struct_mutex);
200 for (crtc = 0; crtc < dev->num_crtcs; crtc++) {
201 seq_printf(m, "CRTC %d enable: %d\n",
202 crtc, atomic_read(&dev->vblank_refcount[crtc]));
203 seq_printf(m, "CRTC %d counter: %d\n",
204 crtc, drm_vblank_count(dev, crtc));
205 seq_printf(m, "CRTC %d last wait: %d\n",
206 crtc, dev->last_vblank_wait[crtc]);
207 seq_printf(m, "CRTC %d in modeset: %d\n",
208 crtc, dev->vblank_inmodeset[crtc]);
209 }
210 mutex_unlock(&dev->struct_mutex);
211 return 0;
212}
213
214/**
215 * Called when "/proc/dri/.../clients" is read.
216 *
217 */
218int drm_clients_info(struct seq_file *m, void *data)
219{
220 struct drm_info_node *node = (struct drm_info_node *) m->private;
221 struct drm_device *dev = node->minor->dev;
222 struct drm_file *priv;
223
224 mutex_lock(&dev->struct_mutex);
225 seq_printf(m, "a dev pid uid magic ioctls\n\n");
226 list_for_each_entry(priv, &dev->filelist, lhead) {
227 seq_printf(m, "%c %3d %5d %5d %10u %10lu\n",
228 priv->authenticated ? 'y' : 'n',
229 priv->minor->index,
230 priv->pid,
231 priv->uid, priv->magic, priv->ioctl_count);
232 }
233 mutex_unlock(&dev->struct_mutex);
234 return 0;
235}
236
237
238int drm_gem_one_name_info(int id, void *ptr, void *data)
239{
240 struct drm_gem_object *obj = ptr;
241 struct seq_file *m = data;
242
243 seq_printf(m, "name %d size %zd\n", obj->name, obj->size);
244
245 seq_printf(m, "%6d %8zd %7d %8d\n",
246 obj->name, obj->size,
247 atomic_read(&obj->handlecount.refcount),
248 atomic_read(&obj->refcount.refcount));
249 return 0;
250}
251
252int drm_gem_name_info(struct seq_file *m, void *data)
253{
254 struct drm_info_node *node = (struct drm_info_node *) m->private;
255 struct drm_device *dev = node->minor->dev;
256
257 seq_printf(m, " name size handles refcount\n");
258 idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, m);
259 return 0;
260}
261
262int drm_gem_object_info(struct seq_file *m, void* data)
263{
264 struct drm_info_node *node = (struct drm_info_node *) m->private;
265 struct drm_device *dev = node->minor->dev;
266
267 seq_printf(m, "%d objects\n", atomic_read(&dev->object_count));
268 seq_printf(m, "%d object bytes\n", atomic_read(&dev->object_memory));
269 seq_printf(m, "%d pinned\n", atomic_read(&dev->pin_count));
270 seq_printf(m, "%d pin bytes\n", atomic_read(&dev->pin_memory));
271 seq_printf(m, "%d gtt bytes\n", atomic_read(&dev->gtt_memory));
272 seq_printf(m, "%d gtt total\n", dev->gtt_total);
273 return 0;
274}
275
276#if DRM_DEBUG_CODE
277
278int drm_vma_info(struct seq_file *m, void *data)
279{
280 struct drm_info_node *node = (struct drm_info_node *) m->private;
281 struct drm_device *dev = node->minor->dev;
282 struct drm_vma_entry *pt;
283 struct vm_area_struct *vma;
284#if defined(__i386__)
285 unsigned int pgprot;
286#endif
287
288 mutex_lock(&dev->struct_mutex);
289 seq_printf(m, "vma use count: %d, high_memory = %p, 0x%08llx\n",
290 atomic_read(&dev->vma_count),
291 high_memory, (u64)virt_to_phys(high_memory));
292
293 list_for_each_entry(pt, &dev->vmalist, head) {
294 vma = pt->vma;
295 if (!vma)
296 continue;
297 seq_printf(m,
298 "\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx000",
299 pt->pid, vma->vm_start, vma->vm_end,
300 vma->vm_flags & VM_READ ? 'r' : '-',
301 vma->vm_flags & VM_WRITE ? 'w' : '-',
302 vma->vm_flags & VM_EXEC ? 'x' : '-',
303 vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
304 vma->vm_flags & VM_LOCKED ? 'l' : '-',
305 vma->vm_flags & VM_IO ? 'i' : '-',
306 vma->vm_pgoff);
307
308#if defined(__i386__)
309 pgprot = pgprot_val(vma->vm_page_prot);
310 seq_printf(m, " %c%c%c%c%c%c%c%c%c",
311 pgprot & _PAGE_PRESENT ? 'p' : '-',
312 pgprot & _PAGE_RW ? 'w' : 'r',
313 pgprot & _PAGE_USER ? 'u' : 's',
314 pgprot & _PAGE_PWT ? 't' : 'b',
315 pgprot & _PAGE_PCD ? 'u' : 'c',
316 pgprot & _PAGE_ACCESSED ? 'a' : '-',
317 pgprot & _PAGE_DIRTY ? 'd' : '-',
318 pgprot & _PAGE_PSE ? 'm' : 'k',
319 pgprot & _PAGE_GLOBAL ? 'g' : 'l');
320#endif
321 seq_printf(m, "\n");
322 }
323 mutex_unlock(&dev->struct_mutex);
324 return 0;
325}
326
327#endif
328
diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index 920b72fbc95..282d9fdf9f4 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -954,6 +954,7 @@ static int compat_drm_sg_free(struct file *file, unsigned int cmd,
954 DRM_IOCTL_SG_FREE, (unsigned long)request); 954 DRM_IOCTL_SG_FREE, (unsigned long)request);
955} 955}
956 956
957#if defined(CONFIG_X86) || defined(CONFIG_IA64)
957typedef struct drm_update_draw32 { 958typedef struct drm_update_draw32 {
958 drm_drawable_t handle; 959 drm_drawable_t handle;
959 unsigned int type; 960 unsigned int type;
@@ -984,6 +985,7 @@ static int compat_drm_update_draw(struct file *file, unsigned int cmd,
984 DRM_IOCTL_UPDATE_DRAW, (unsigned long)request); 985 DRM_IOCTL_UPDATE_DRAW, (unsigned long)request);
985 return err; 986 return err;
986} 987}
988#endif
987 989
988struct drm_wait_vblank_request32 { 990struct drm_wait_vblank_request32 {
989 enum drm_vblank_seq_type type; 991 enum drm_vblank_seq_type type;
@@ -1066,7 +1068,9 @@ drm_ioctl_compat_t *drm_compat_ioctls[] = {
1066#endif 1068#endif
1067 [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC32)] = compat_drm_sg_alloc, 1069 [DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC32)] = compat_drm_sg_alloc,
1068 [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE32)] = compat_drm_sg_free, 1070 [DRM_IOCTL_NR(DRM_IOCTL_SG_FREE32)] = compat_drm_sg_free,
1071#if defined(CONFIG_X86) || defined(CONFIG_IA64)
1069 [DRM_IOCTL_NR(DRM_IOCTL_UPDATE_DRAW32)] = compat_drm_update_draw, 1072 [DRM_IOCTL_NR(DRM_IOCTL_UPDATE_DRAW32)] = compat_drm_update_draw,
1073#endif
1070 [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK32)] = compat_drm_wait_vblank, 1074 [DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK32)] = compat_drm_wait_vblank,
1071}; 1075};
1072 1076
diff --git a/drivers/gpu/drm/drm_memory.c b/drivers/gpu/drm/drm_memory.c
index bcc869bc409..0c707f533ea 100644
--- a/drivers/gpu/drm/drm_memory.c
+++ b/drivers/gpu/drm/drm_memory.c
@@ -159,7 +159,7 @@ static inline void *agp_remap(unsigned long offset, unsigned long size,
159 159
160#endif /* debug_memory */ 160#endif /* debug_memory */
161 161
162void drm_core_ioremap(struct drm_map *map, struct drm_device *dev) 162void drm_core_ioremap(struct drm_local_map *map, struct drm_device *dev)
163{ 163{
164 if (drm_core_has_AGP(dev) && 164 if (drm_core_has_AGP(dev) &&
165 dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP) 165 dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
@@ -169,7 +169,7 @@ void drm_core_ioremap(struct drm_map *map, struct drm_device *dev)
169} 169}
170EXPORT_SYMBOL(drm_core_ioremap); 170EXPORT_SYMBOL(drm_core_ioremap);
171 171
172void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev) 172void drm_core_ioremap_wc(struct drm_local_map *map, struct drm_device *dev)
173{ 173{
174 if (drm_core_has_AGP(dev) && 174 if (drm_core_has_AGP(dev) &&
175 dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP) 175 dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
@@ -179,7 +179,7 @@ void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev)
179} 179}
180EXPORT_SYMBOL(drm_core_ioremap_wc); 180EXPORT_SYMBOL(drm_core_ioremap_wc);
181 181
182void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev) 182void drm_core_ioremapfree(struct drm_local_map *map, struct drm_device *dev)
183{ 183{
184 if (!map->handle || !map->size) 184 if (!map->handle || !map->size)
185 return; 185 return;
diff --git a/drivers/gpu/drm/drm_proc.c b/drivers/gpu/drm/drm_proc.c
index 8df849f6683..bae5391165a 100644
--- a/drivers/gpu/drm/drm_proc.c
+++ b/drivers/gpu/drm/drm_proc.c
@@ -37,697 +37,195 @@
37 * OTHER DEALINGS IN THE SOFTWARE. 37 * OTHER DEALINGS IN THE SOFTWARE.
38 */ 38 */
39 39
40#include <linux/seq_file.h>
40#include "drmP.h" 41#include "drmP.h"
41 42
42static int drm_name_info(char *buf, char **start, off_t offset, 43/***************************************************
43 int request, int *eof, void *data); 44 * Initialization, etc.
44static int drm_vm_info(char *buf, char **start, off_t offset, 45 **************************************************/
45 int request, int *eof, void *data);
46static int drm_clients_info(char *buf, char **start, off_t offset,
47 int request, int *eof, void *data);
48static int drm_queues_info(char *buf, char **start, off_t offset,
49 int request, int *eof, void *data);
50static int drm_bufs_info(char *buf, char **start, off_t offset,
51 int request, int *eof, void *data);
52static int drm_vblank_info(char *buf, char **start, off_t offset,
53 int request, int *eof, void *data);
54static int drm_gem_name_info(char *buf, char **start, off_t offset,
55 int request, int *eof, void *data);
56static int drm_gem_object_info(char *buf, char **start, off_t offset,
57 int request, int *eof, void *data);
58#if DRM_DEBUG_CODE
59static int drm_vma_info(char *buf, char **start, off_t offset,
60 int request, int *eof, void *data);
61#endif
62 46
63/** 47/**
64 * Proc file list. 48 * Proc file list.
65 */ 49 */
66static struct drm_proc_list { 50static struct drm_info_list drm_proc_list[] = {
67 const char *name; /**< file name */
68 int (*f) (char *, char **, off_t, int, int *, void *); /**< proc callback*/
69 u32 driver_features; /**< Required driver features for this entry */
70} drm_proc_list[] = {
71 {"name", drm_name_info, 0}, 51 {"name", drm_name_info, 0},
72 {"mem", drm_mem_info, 0},
73 {"vm", drm_vm_info, 0}, 52 {"vm", drm_vm_info, 0},
74 {"clients", drm_clients_info, 0}, 53 {"clients", drm_clients_info, 0},
75 {"queues", drm_queues_info, 0}, 54 {"queues", drm_queues_info, 0},
76 {"bufs", drm_bufs_info, 0}, 55 {"bufs", drm_bufs_info, 0},
77 {"vblank", drm_vblank_info, 0},
78 {"gem_names", drm_gem_name_info, DRIVER_GEM}, 56 {"gem_names", drm_gem_name_info, DRIVER_GEM},
79 {"gem_objects", drm_gem_object_info, DRIVER_GEM}, 57 {"gem_objects", drm_gem_object_info, DRIVER_GEM},
80#if DRM_DEBUG_CODE 58#if DRM_DEBUG_CODE
81 {"vma", drm_vma_info}, 59 {"vma", drm_vma_info, 0},
82#endif 60#endif
83}; 61};
84
85#define DRM_PROC_ENTRIES ARRAY_SIZE(drm_proc_list) 62#define DRM_PROC_ENTRIES ARRAY_SIZE(drm_proc_list)
86 63
64static int drm_proc_open(struct inode *inode, struct file *file)
65{
66 struct drm_info_node* node = PDE(inode)->data;
67
68 return single_open(file, node->info_ent->show, node);
69}
70
71static const struct file_operations drm_proc_fops = {
72 .owner = THIS_MODULE,
73 .open = drm_proc_open,
74 .read = seq_read,
75 .llseek = seq_lseek,
76 .release = single_release,
77};
78
79
87/** 80/**
88 * Initialize the DRI proc filesystem for a device. 81 * Initialize a given set of proc files for a device
89 * 82 *
90 * \param dev DRM device. 83 * \param files The array of files to create
91 * \param minor device minor number. 84 * \param count The number of files given
92 * \param root DRI proc dir entry. 85 * \param root DRI proc dir entry.
93 * \param dev_root resulting DRI device proc dir entry. 86 * \param minor device minor number
94 * \return root entry pointer on success, or NULL on failure. 87 * \return Zero on success, non-zero on failure
95 * 88 *
96 * Create the DRI proc root entry "/proc/dri", the device proc root entry 89 * Create a given set of proc files represented by an array of
97 * "/proc/dri/%minor%/", and each entry in proc_list as 90 * gdm_proc_lists in the given root directory.
98 * "/proc/dri/%minor%/%name%".
99 */ 91 */
100int drm_proc_init(struct drm_minor *minor, int minor_id, 92int drm_proc_create_files(struct drm_info_list *files, int count,
101 struct proc_dir_entry *root) 93 struct proc_dir_entry *root, struct drm_minor *minor)
102{ 94{
103 struct drm_device *dev = minor->dev; 95 struct drm_device *dev = minor->dev;
104 struct proc_dir_entry *ent; 96 struct proc_dir_entry *ent;
105 int i, j, ret; 97 struct drm_info_node *tmp;
106 char name[64]; 98 char name[64];
99 int i, ret;
107 100
108 sprintf(name, "%d", minor_id); 101 for (i = 0; i < count; i++) {
109 minor->dev_root = proc_mkdir(name, root); 102 u32 features = files[i].driver_features;
110 if (!minor->dev_root) {
111 DRM_ERROR("Cannot create /proc/dri/%s\n", name);
112 return -1;
113 }
114
115 for (i = 0; i < DRM_PROC_ENTRIES; i++) {
116 u32 features = drm_proc_list[i].driver_features;
117 103
118 if (features != 0 && 104 if (features != 0 &&
119 (dev->driver->driver_features & features) != features) 105 (dev->driver->driver_features & features) != features)
120 continue; 106 continue;
121 107
122 ent = create_proc_entry(drm_proc_list[i].name, 108 tmp = drm_alloc(sizeof(struct drm_info_node), _DRM_DRIVER);
123 S_IFREG | S_IRUGO, minor->dev_root); 109 ent = create_proc_entry(files[i].name, S_IFREG | S_IRUGO, root);
124 if (!ent) { 110 if (!ent) {
125 DRM_ERROR("Cannot create /proc/dri/%s/%s\n", 111 DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
126 name, drm_proc_list[i].name); 112 name, files[i].name);
113 drm_free(tmp, sizeof(struct drm_info_node),
114 _DRM_DRIVER);
127 ret = -1; 115 ret = -1;
128 goto fail; 116 goto fail;
129 } 117 }
130 ent->read_proc = drm_proc_list[i].f;
131 ent->data = minor;
132 }
133 118
134 if (dev->driver->proc_init) { 119 ent->proc_fops = &drm_proc_fops;
135 ret = dev->driver->proc_init(minor); 120 ent->data = tmp;
136 if (ret) { 121 tmp->minor = minor;
137 DRM_ERROR("DRM: Driver failed to initialize " 122 tmp->info_ent = &files[i];
138 "/proc/dri.\n"); 123 list_add(&(tmp->list), &(minor->proc_nodes.list));
139 goto fail;
140 }
141 } 124 }
142
143 return 0; 125 return 0;
144 fail:
145 126
146 for (j = 0; j < i; j++) 127fail:
147 remove_proc_entry(drm_proc_list[i].name, 128 for (i = 0; i < count; i++)
148 minor->dev_root); 129 remove_proc_entry(drm_proc_list[i].name, minor->proc_root);
149 remove_proc_entry(name, root);
150 minor->dev_root = NULL;
151 return ret; 130 return ret;
152} 131}
153 132
154/** 133/**
155 * Cleanup the proc filesystem resources. 134 * Initialize the DRI proc filesystem for a device
156 * 135 *
157 * \param minor device minor number. 136 * \param dev DRM device
137 * \param minor device minor number
158 * \param root DRI proc dir entry. 138 * \param root DRI proc dir entry.
159 * \param dev_root DRI device proc dir entry. 139 * \param dev_root resulting DRI device proc dir entry.
160 * \return always zero. 140 * \return root entry pointer on success, or NULL on failure.
161 * 141 *
162 * Remove all proc entries created by proc_init(). 142 * Create the DRI proc root entry "/proc/dri", the device proc root entry
143 * "/proc/dri/%minor%/", and each entry in proc_list as
144 * "/proc/dri/%minor%/%name%".
163 */ 145 */
164int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root) 146int drm_proc_init(struct drm_minor *minor, int minor_id,
147 struct proc_dir_entry *root)
165{ 148{
166 struct drm_device *dev = minor->dev; 149 struct drm_device *dev = minor->dev;
167 int i;
168 char name[64]; 150 char name[64];
151 int ret;
169 152
170 if (!root || !minor->dev_root) 153 INIT_LIST_HEAD(&minor->proc_nodes.list);
171 return 0; 154 sprintf(name, "%d", minor_id);
172 155 minor->proc_root = proc_mkdir(name, root);
173 if (dev->driver->proc_cleanup) 156 if (!minor->proc_root) {
174 dev->driver->proc_cleanup(minor); 157 DRM_ERROR("Cannot create /proc/dri/%s\n", name);
175 158 return -1;
176 for (i = 0; i < DRM_PROC_ENTRIES; i++)
177 remove_proc_entry(drm_proc_list[i].name, minor->dev_root);
178 sprintf(name, "%d", minor->index);
179 remove_proc_entry(name, root);
180
181 return 0;
182}
183
184/**
185 * Called when "/proc/dri/.../name" is read.
186 *
187 * \param buf output buffer.
188 * \param start start of output data.
189 * \param offset requested start offset.
190 * \param request requested number of bytes.
191 * \param eof whether there is no more data to return.
192 * \param data private data.
193 * \return number of written bytes.
194 *
195 * Prints the device name together with the bus id if available.
196 */
197static int drm_name_info(char *buf, char **start, off_t offset, int request,
198 int *eof, void *data)
199{
200 struct drm_minor *minor = (struct drm_minor *) data;
201 struct drm_master *master = minor->master;
202 struct drm_device *dev = minor->dev;
203 int len = 0;
204
205 if (offset > DRM_PROC_LIMIT) {
206 *eof = 1;
207 return 0;
208 } 159 }
209 160
210 if (!master) 161 ret = drm_proc_create_files(drm_proc_list, DRM_PROC_ENTRIES,
211 return 0; 162 minor->proc_root, minor);
212 163 if (ret) {
213 *start = &buf[offset]; 164 remove_proc_entry(name, root);
214 *eof = 0; 165 minor->proc_root = NULL;
215 166 DRM_ERROR("Failed to create core drm proc files\n");
216 if (master->unique) { 167 return ret;
217 DRM_PROC_PRINT("%s %s %s\n",
218 dev->driver->pci_driver.name,
219 pci_name(dev->pdev), master->unique);
220 } else {
221 DRM_PROC_PRINT("%s %s\n", dev->driver->pci_driver.name,
222 pci_name(dev->pdev));
223 } 168 }
224 169
225 if (len > request + offset) 170 if (dev->driver->proc_init) {
226 return request; 171 ret = dev->driver->proc_init(minor);
227 *eof = 1; 172 if (ret) {
228 return len - offset; 173 DRM_ERROR("DRM: Driver failed to initialize "
229} 174 "/proc/dri.\n");
230 175 return ret;
231/**
232 * Called when "/proc/dri/.../vm" is read.
233 *
234 * \param buf output buffer.
235 * \param start start of output data.
236 * \param offset requested start offset.
237 * \param request requested number of bytes.
238 * \param eof whether there is no more data to return.
239 * \param data private data.
240 * \return number of written bytes.
241 *
242 * Prints information about all mappings in drm_device::maplist.
243 */
244static int drm__vm_info(char *buf, char **start, off_t offset, int request,
245 int *eof, void *data)
246{
247 struct drm_minor *minor = (struct drm_minor *) data;
248 struct drm_device *dev = minor->dev;
249 int len = 0;
250 struct drm_map *map;
251 struct drm_map_list *r_list;
252
253 /* Hardcoded from _DRM_FRAME_BUFFER,
254 _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and
255 _DRM_SCATTER_GATHER and _DRM_CONSISTENT */
256 const char *types[] = { "FB", "REG", "SHM", "AGP", "SG", "PCI" };
257 const char *type;
258 int i;
259
260 if (offset > DRM_PROC_LIMIT) {
261 *eof = 1;
262 return 0;
263 }
264
265 *start = &buf[offset];
266 *eof = 0;
267
268 DRM_PROC_PRINT("slot offset size type flags "
269 "address mtrr\n\n");
270 i = 0;
271 list_for_each_entry(r_list, &dev->maplist, head) {
272 map = r_list->map;
273 if (!map)
274 continue;
275 if (map->type < 0 || map->type > 5)
276 type = "??";
277 else
278 type = types[map->type];
279 DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ",
280 i,
281 map->offset,
282 map->size, type, map->flags,
283 (unsigned long) r_list->user_token);
284 if (map->mtrr < 0) {
285 DRM_PROC_PRINT("none\n");
286 } else {
287 DRM_PROC_PRINT("%4d\n", map->mtrr);
288 } 176 }
289 i++;
290 }
291
292 if (len > request + offset)
293 return request;
294 *eof = 1;
295 return len - offset;
296}
297
298/**
299 * Simply calls _vm_info() while holding the drm_device::struct_mutex lock.
300 */
301static int drm_vm_info(char *buf, char **start, off_t offset, int request,
302 int *eof, void *data)
303{
304 struct drm_minor *minor = (struct drm_minor *) data;
305 struct drm_device *dev = minor->dev;
306 int ret;
307
308 mutex_lock(&dev->struct_mutex);
309 ret = drm__vm_info(buf, start, offset, request, eof, data);
310 mutex_unlock(&dev->struct_mutex);
311 return ret;
312}
313
314/**
315 * Called when "/proc/dri/.../queues" is read.
316 *
317 * \param buf output buffer.
318 * \param start start of output data.
319 * \param offset requested start offset.
320 * \param request requested number of bytes.
321 * \param eof whether there is no more data to return.
322 * \param data private data.
323 * \return number of written bytes.
324 */
325static int drm__queues_info(char *buf, char **start, off_t offset,
326 int request, int *eof, void *data)
327{
328 struct drm_minor *minor = (struct drm_minor *) data;
329 struct drm_device *dev = minor->dev;
330 int len = 0;
331 int i;
332 struct drm_queue *q;
333
334 if (offset > DRM_PROC_LIMIT) {
335 *eof = 1;
336 return 0;
337 } 177 }
338 178 return 0;
339 *start = &buf[offset];
340 *eof = 0;
341
342 DRM_PROC_PRINT(" ctx/flags use fin"
343 " blk/rw/rwf wait flushed queued"
344 " locks\n\n");
345 for (i = 0; i < dev->queue_count; i++) {
346 q = dev->queuelist[i];
347 atomic_inc(&q->use_count);
348 DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
349 "%5d/0x%03x %5d %5d"
350 " %5d/%c%c/%c%c%c %5Zd\n",
351 i,
352 q->flags,
353 atomic_read(&q->use_count),
354 atomic_read(&q->finalization),
355 atomic_read(&q->block_count),
356 atomic_read(&q->block_read) ? 'r' : '-',
357 atomic_read(&q->block_write) ? 'w' : '-',
358 waitqueue_active(&q->read_queue) ? 'r' : '-',
359 waitqueue_active(&q->
360 write_queue) ? 'w' : '-',
361 waitqueue_active(&q->
362 flush_queue) ? 'f' : '-',
363 DRM_BUFCOUNT(&q->waitlist));
364 atomic_dec(&q->use_count);
365 }
366
367 if (len > request + offset)
368 return request;
369 *eof = 1;
370 return len - offset;
371}
372
373/**
374 * Simply calls _queues_info() while holding the drm_device::struct_mutex lock.
375 */
376static int drm_queues_info(char *buf, char **start, off_t offset, int request,
377 int *eof, void *data)
378{
379 struct drm_minor *minor = (struct drm_minor *) data;
380 struct drm_device *dev = minor->dev;
381 int ret;
382
383 mutex_lock(&dev->struct_mutex);
384 ret = drm__queues_info(buf, start, offset, request, eof, data);
385 mutex_unlock(&dev->struct_mutex);
386 return ret;
387} 179}
388 180
389/** 181int drm_proc_remove_files(struct drm_info_list *files, int count,
390 * Called when "/proc/dri/.../bufs" is read. 182 struct drm_minor *minor)
391 *
392 * \param buf output buffer.
393 * \param start start of output data.
394 * \param offset requested start offset.
395 * \param request requested number of bytes.
396 * \param eof whether there is no more data to return.
397 * \param data private data.
398 * \return number of written bytes.
399 */
400static int drm__bufs_info(char *buf, char **start, off_t offset, int request,
401 int *eof, void *data)
402{ 183{
403 struct drm_minor *minor = (struct drm_minor *) data; 184 struct list_head *pos, *q;
404 struct drm_device *dev = minor->dev; 185 struct drm_info_node *tmp;
405 int len = 0;
406 struct drm_device_dma *dma = dev->dma;
407 int i; 186 int i;
408 187
409 if (!dma || offset > DRM_PROC_LIMIT) { 188 for (i = 0; i < count; i++) {
410 *eof = 1; 189 list_for_each_safe(pos, q, &minor->proc_nodes.list) {
411 return 0; 190 tmp = list_entry(pos, struct drm_info_node, list);
412 } 191 if (tmp->info_ent == &files[i]) {
413 192 remove_proc_entry(files[i].name,
414 *start = &buf[offset]; 193 minor->proc_root);
415 *eof = 0; 194 list_del(pos);
416 195 drm_free(tmp, sizeof(struct drm_info_node),
417 DRM_PROC_PRINT(" o size count free segs pages kB\n\n"); 196 _DRM_DRIVER);
418 for (i = 0; i <= DRM_MAX_ORDER; i++) { 197 }
419 if (dma->bufs[i].buf_count) 198 }
420 DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n",
421 i,
422 dma->bufs[i].buf_size,
423 dma->bufs[i].buf_count,
424 atomic_read(&dma->bufs[i]
425 .freelist.count),
426 dma->bufs[i].seg_count,
427 dma->bufs[i].seg_count
428 * (1 << dma->bufs[i].page_order),
429 (dma->bufs[i].seg_count
430 * (1 << dma->bufs[i].page_order))
431 * PAGE_SIZE / 1024);
432 }
433 DRM_PROC_PRINT("\n");
434 for (i = 0; i < dma->buf_count; i++) {
435 if (i && !(i % 32))
436 DRM_PROC_PRINT("\n");
437 DRM_PROC_PRINT(" %d", dma->buflist[i]->list);
438 } 199 }
439 DRM_PROC_PRINT("\n"); 200 return 0;
440
441 if (len > request + offset)
442 return request;
443 *eof = 1;
444 return len - offset;
445}
446
447/**
448 * Simply calls _bufs_info() while holding the drm_device::struct_mutex lock.
449 */
450static int drm_bufs_info(char *buf, char **start, off_t offset, int request,
451 int *eof, void *data)
452{
453 struct drm_minor *minor = (struct drm_minor *) data;
454 struct drm_device *dev = minor->dev;
455 int ret;
456
457 mutex_lock(&dev->struct_mutex);
458 ret = drm__bufs_info(buf, start, offset, request, eof, data);
459 mutex_unlock(&dev->struct_mutex);
460 return ret;
461} 201}
462 202
463/** 203/**
464 * Called when "/proc/dri/.../vblank" is read. 204 * Cleanup the proc filesystem resources.
465 * 205 *
466 * \param buf output buffer. 206 * \param minor device minor number.
467 * \param start start of output data. 207 * \param root DRI proc dir entry.
468 * \param offset requested start offset. 208 * \param dev_root DRI device proc dir entry.
469 * \param request requested number of bytes. 209 * \return always zero.
470 * \param eof whether there is no more data to return.
471 * \param data private data.
472 * \return number of written bytes.
473 */
474static int drm__vblank_info(char *buf, char **start, off_t offset, int request,
475 int *eof, void *data)
476{
477 struct drm_minor *minor = (struct drm_minor *) data;
478 struct drm_device *dev = minor->dev;
479 int len = 0;
480 int crtc;
481
482 if (offset > DRM_PROC_LIMIT) {
483 *eof = 1;
484 return 0;
485 }
486
487 *start = &buf[offset];
488 *eof = 0;
489
490 for (crtc = 0; crtc < dev->num_crtcs; crtc++) {
491 DRM_PROC_PRINT("CRTC %d enable: %d\n",
492 crtc, atomic_read(&dev->vblank_refcount[crtc]));
493 DRM_PROC_PRINT("CRTC %d counter: %d\n",
494 crtc, drm_vblank_count(dev, crtc));
495 DRM_PROC_PRINT("CRTC %d last wait: %d\n",
496 crtc, dev->last_vblank_wait[crtc]);
497 DRM_PROC_PRINT("CRTC %d in modeset: %d\n",
498 crtc, dev->vblank_inmodeset[crtc]);
499 }
500
501 if (len > request + offset)
502 return request;
503 *eof = 1;
504 return len - offset;
505}
506
507/**
508 * Simply calls _vblank_info() while holding the drm_device::struct_mutex lock.
509 */
510static int drm_vblank_info(char *buf, char **start, off_t offset, int request,
511 int *eof, void *data)
512{
513 struct drm_minor *minor = (struct drm_minor *) data;
514 struct drm_device *dev = minor->dev;
515 int ret;
516
517 mutex_lock(&dev->struct_mutex);
518 ret = drm__vblank_info(buf, start, offset, request, eof, data);
519 mutex_unlock(&dev->struct_mutex);
520 return ret;
521}
522
523/**
524 * Called when "/proc/dri/.../clients" is read.
525 * 210 *
526 * \param buf output buffer. 211 * Remove all proc entries created by proc_init().
527 * \param start start of output data.
528 * \param offset requested start offset.
529 * \param request requested number of bytes.
530 * \param eof whether there is no more data to return.
531 * \param data private data.
532 * \return number of written bytes.
533 */ 212 */
534static int drm__clients_info(char *buf, char **start, off_t offset, 213int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root)
535 int request, int *eof, void *data)
536{ 214{
537 struct drm_minor *minor = (struct drm_minor *) data;
538 struct drm_device *dev = minor->dev; 215 struct drm_device *dev = minor->dev;
539 int len = 0; 216 char name[64];
540 struct drm_file *priv;
541 217
542 if (offset > DRM_PROC_LIMIT) { 218 if (!root || !minor->proc_root)
543 *eof = 1;
544 return 0; 219 return 0;
545 }
546
547 *start = &buf[offset];
548 *eof = 0;
549
550 DRM_PROC_PRINT("a dev pid uid magic ioctls\n\n");
551 list_for_each_entry(priv, &dev->filelist, lhead) {
552 DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n",
553 priv->authenticated ? 'y' : 'n',
554 priv->minor->index,
555 priv->pid,
556 priv->uid, priv->magic, priv->ioctl_count);
557 }
558 220
559 if (len > request + offset) 221 if (dev->driver->proc_cleanup)
560 return request; 222 dev->driver->proc_cleanup(minor);
561 *eof = 1;
562 return len - offset;
563}
564
565/**
566 * Simply calls _clients_info() while holding the drm_device::struct_mutex lock.
567 */
568static int drm_clients_info(char *buf, char **start, off_t offset,
569 int request, int *eof, void *data)
570{
571 struct drm_minor *minor = (struct drm_minor *) data;
572 struct drm_device *dev = minor->dev;
573 int ret;
574
575 mutex_lock(&dev->struct_mutex);
576 ret = drm__clients_info(buf, start, offset, request, eof, data);
577 mutex_unlock(&dev->struct_mutex);
578 return ret;
579}
580
581struct drm_gem_name_info_data {
582 int len;
583 char *buf;
584 int eof;
585};
586 223
587static int drm_gem_one_name_info(int id, void *ptr, void *data) 224 drm_proc_remove_files(drm_proc_list, DRM_PROC_ENTRIES, minor);
588{
589 struct drm_gem_object *obj = ptr;
590 struct drm_gem_name_info_data *nid = data;
591 225
592 DRM_INFO("name %d size %zd\n", obj->name, obj->size); 226 sprintf(name, "%d", minor->index);
593 if (nid->eof) 227 remove_proc_entry(name, root);
594 return 0;
595 228
596 nid->len += sprintf(&nid->buf[nid->len],
597 "%6d %8zd %7d %8d\n",
598 obj->name, obj->size,
599 atomic_read(&obj->handlecount.refcount),
600 atomic_read(&obj->refcount.refcount));
601 if (nid->len > DRM_PROC_LIMIT) {
602 nid->eof = 1;
603 return 0;
604 }
605 return 0; 229 return 0;
606} 230}
607 231
608static int drm_gem_name_info(char *buf, char **start, off_t offset,
609 int request, int *eof, void *data)
610{
611 struct drm_minor *minor = (struct drm_minor *) data;
612 struct drm_device *dev = minor->dev;
613 struct drm_gem_name_info_data nid;
614
615 if (offset > DRM_PROC_LIMIT) {
616 *eof = 1;
617 return 0;
618 }
619
620 nid.len = sprintf(buf, " name size handles refcount\n");
621 nid.buf = buf;
622 nid.eof = 0;
623 idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, &nid);
624
625 *start = &buf[offset];
626 *eof = 0;
627 if (nid.len > request + offset)
628 return request;
629 *eof = 1;
630 return nid.len - offset;
631}
632
633static int drm_gem_object_info(char *buf, char **start, off_t offset,
634 int request, int *eof, void *data)
635{
636 struct drm_minor *minor = (struct drm_minor *) data;
637 struct drm_device *dev = minor->dev;
638 int len = 0;
639
640 if (offset > DRM_PROC_LIMIT) {
641 *eof = 1;
642 return 0;
643 }
644
645 *start = &buf[offset];
646 *eof = 0;
647 DRM_PROC_PRINT("%d objects\n", atomic_read(&dev->object_count));
648 DRM_PROC_PRINT("%d object bytes\n", atomic_read(&dev->object_memory));
649 DRM_PROC_PRINT("%d pinned\n", atomic_read(&dev->pin_count));
650 DRM_PROC_PRINT("%d pin bytes\n", atomic_read(&dev->pin_memory));
651 DRM_PROC_PRINT("%d gtt bytes\n", atomic_read(&dev->gtt_memory));
652 DRM_PROC_PRINT("%d gtt total\n", dev->gtt_total);
653 if (len > request + offset)
654 return request;
655 *eof = 1;
656 return len - offset;
657}
658
659#if DRM_DEBUG_CODE
660
661static int drm__vma_info(char *buf, char **start, off_t offset, int request,
662 int *eof, void *data)
663{
664 struct drm_minor *minor = (struct drm_minor *) data;
665 struct drm_device *dev = minor->dev;
666 int len = 0;
667 struct drm_vma_entry *pt;
668 struct vm_area_struct *vma;
669#if defined(__i386__)
670 unsigned int pgprot;
671#endif
672
673 if (offset > DRM_PROC_LIMIT) {
674 *eof = 1;
675 return 0;
676 }
677
678 *start = &buf[offset];
679 *eof = 0;
680
681 DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
682 atomic_read(&dev->vma_count),
683 high_memory, virt_to_phys(high_memory));
684 list_for_each_entry(pt, &dev->vmalist, head) {
685 if (!(vma = pt->vma))
686 continue;
687 DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx000",
688 pt->pid,
689 vma->vm_start,
690 vma->vm_end,
691 vma->vm_flags & VM_READ ? 'r' : '-',
692 vma->vm_flags & VM_WRITE ? 'w' : '-',
693 vma->vm_flags & VM_EXEC ? 'x' : '-',
694 vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
695 vma->vm_flags & VM_LOCKED ? 'l' : '-',
696 vma->vm_flags & VM_IO ? 'i' : '-',
697 vma->vm_pgoff);
698
699#if defined(__i386__)
700 pgprot = pgprot_val(vma->vm_page_prot);
701 DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c",
702 pgprot & _PAGE_PRESENT ? 'p' : '-',
703 pgprot & _PAGE_RW ? 'w' : 'r',
704 pgprot & _PAGE_USER ? 'u' : 's',
705 pgprot & _PAGE_PWT ? 't' : 'b',
706 pgprot & _PAGE_PCD ? 'u' : 'c',
707 pgprot & _PAGE_ACCESSED ? 'a' : '-',
708 pgprot & _PAGE_DIRTY ? 'd' : '-',
709 pgprot & _PAGE_PSE ? 'm' : 'k',
710 pgprot & _PAGE_GLOBAL ? 'g' : 'l');
711#endif
712 DRM_PROC_PRINT("\n");
713 }
714
715 if (len > request + offset)
716 return request;
717 *eof = 1;
718 return len - offset;
719}
720
721static int drm_vma_info(char *buf, char **start, off_t offset, int request,
722 int *eof, void *data)
723{
724 struct drm_minor *minor = (struct drm_minor *) data;
725 struct drm_device *dev = minor->dev;
726 int ret;
727
728 mutex_lock(&dev->struct_mutex);
729 ret = drm__vma_info(buf, start, offset, request, eof, data);
730 mutex_unlock(&dev->struct_mutex);
731 return ret;
732}
733#endif
diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
index 7c8b15b22bf..d009661781b 100644
--- a/drivers/gpu/drm/drm_stub.c
+++ b/drivers/gpu/drm/drm_stub.c
@@ -50,6 +50,7 @@ struct idr drm_minors_idr;
50 50
51struct class *drm_class; 51struct class *drm_class;
52struct proc_dir_entry *drm_proc_root; 52struct proc_dir_entry *drm_proc_root;
53struct dentry *drm_debugfs_root;
53 54
54static int drm_minor_get_id(struct drm_device *dev, int type) 55static int drm_minor_get_id(struct drm_device *dev, int type)
55{ 56{
@@ -313,7 +314,15 @@ static int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int t
313 goto err_mem; 314 goto err_mem;
314 } 315 }
315 } else 316 } else
316 new_minor->dev_root = NULL; 317 new_minor->proc_root = NULL;
318
319#if defined(CONFIG_DEBUG_FS)
320 ret = drm_debugfs_init(new_minor, minor_id, drm_debugfs_root);
321 if (ret) {
322 DRM_ERROR("DRM: Failed to initialize /debugfs/dri.\n");
323 goto err_g2;
324 }
325#endif
317 326
318 ret = drm_sysfs_device_add(new_minor); 327 ret = drm_sysfs_device_add(new_minor);
319 if (ret) { 328 if (ret) {
@@ -372,6 +381,7 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
372 } 381 }
373 382
374 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 383 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
384 pci_set_drvdata(pdev, dev);
375 ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL); 385 ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL);
376 if (ret) 386 if (ret)
377 goto err_g2; 387 goto err_g2;
@@ -395,9 +405,9 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
395 405
396 list_add_tail(&dev->driver_item, &driver->device_list); 406 list_add_tail(&dev->driver_item, &driver->device_list);
397 407
398 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", 408 DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
399 driver->name, driver->major, driver->minor, driver->patchlevel, 409 driver->name, driver->major, driver->minor, driver->patchlevel,
400 driver->date, dev->primary->index); 410 driver->date, pci_name(pdev), dev->primary->index);
401 411
402 return 0; 412 return 0;
403 413
@@ -409,29 +419,7 @@ err_g1:
409 drm_free(dev, sizeof(*dev), DRM_MEM_STUB); 419 drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
410 return ret; 420 return ret;
411} 421}
412 422EXPORT_SYMBOL(drm_get_dev);
413/**
414 * Put a device minor number.
415 *
416 * \param dev device data structure
417 * \return always zero
418 *
419 * Cleans up the proc resources. If it is the last minor then release the foreign
420 * "drm" data, otherwise unregisters the "drm" data, frees the dev list and
421 * unregisters the character device.
422 */
423int drm_put_dev(struct drm_device * dev)
424{
425 DRM_DEBUG("release primary %s\n", dev->driver->pci_driver.name);
426
427 if (dev->devname) {
428 drm_free(dev->devname, strlen(dev->devname) + 1,
429 DRM_MEM_DRIVER);
430 dev->devname = NULL;
431 }
432 drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
433 return 0;
434}
435 423
436/** 424/**
437 * Put a secondary minor number. 425 * Put a secondary minor number.
@@ -451,6 +439,10 @@ int drm_put_minor(struct drm_minor **minor_p)
451 439
452 if (minor->type == DRM_MINOR_LEGACY) 440 if (minor->type == DRM_MINOR_LEGACY)
453 drm_proc_cleanup(minor, drm_proc_root); 441 drm_proc_cleanup(minor, drm_proc_root);
442#if defined(CONFIG_DEBUG_FS)
443 drm_debugfs_cleanup(minor);
444#endif
445
454 drm_sysfs_device_remove(minor); 446 drm_sysfs_device_remove(minor);
455 447
456 idr_remove(&drm_minors_idr, minor->index); 448 idr_remove(&drm_minors_idr, minor->index);
@@ -459,3 +451,67 @@ int drm_put_minor(struct drm_minor **minor_p)
459 *minor_p = NULL; 451 *minor_p = NULL;
460 return 0; 452 return 0;
461} 453}
454
455/**
456 * Called via drm_exit() at module unload time or when pci device is
457 * unplugged.
458 *
459 * Cleans up all DRM device, calling drm_lastclose().
460 *
461 * \sa drm_init
462 */
463void drm_put_dev(struct drm_device *dev)
464{
465 struct drm_driver *driver = dev->driver;
466 struct drm_map_list *r_list, *list_temp;
467
468 DRM_DEBUG("\n");
469
470 if (!dev) {
471 DRM_ERROR("cleanup called no dev\n");
472 return;
473 }
474
475 drm_vblank_cleanup(dev);
476
477 drm_lastclose(dev);
478
479 if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) &&
480 dev->agp && dev->agp->agp_mtrr >= 0) {
481 int retval;
482 retval = mtrr_del(dev->agp->agp_mtrr,
483 dev->agp->agp_info.aper_base,
484 dev->agp->agp_info.aper_size * 1024 * 1024);
485 DRM_DEBUG("mtrr_del=%d\n", retval);
486 }
487
488 if (dev->driver->unload)
489 dev->driver->unload(dev);
490
491 if (drm_core_has_AGP(dev) && dev->agp) {
492 drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
493 dev->agp = NULL;
494 }
495
496 drm_ht_remove(&dev->map_hash);
497 drm_ctxbitmap_cleanup(dev);
498
499 list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head)
500 drm_rmmap(dev, r_list->map);
501
502 if (drm_core_check_feature(dev, DRIVER_MODESET))
503 drm_put_minor(&dev->control);
504
505 if (driver->driver_features & DRIVER_GEM)
506 drm_gem_destroy(dev);
507
508 drm_put_minor(&dev->primary);
509
510 if (dev->devname) {
511 drm_free(dev->devname, strlen(dev->devname) + 1,
512 DRM_MEM_DRIVER);
513 dev->devname = NULL;
514 }
515 drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
516}
517EXPORT_SYMBOL(drm_put_dev);
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 5aa6780652a..bc0c6849360 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -35,7 +35,9 @@ static int drm_sysfs_suspend(struct device *dev, pm_message_t state)
35 struct drm_minor *drm_minor = to_drm_minor(dev); 35 struct drm_minor *drm_minor = to_drm_minor(dev);
36 struct drm_device *drm_dev = drm_minor->dev; 36 struct drm_device *drm_dev = drm_minor->dev;
37 37
38 if (drm_minor->type == DRM_MINOR_LEGACY && drm_dev->driver->suspend) 38 if (drm_minor->type == DRM_MINOR_LEGACY &&
39 !drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
40 drm_dev->driver->suspend)
39 return drm_dev->driver->suspend(drm_dev, state); 41 return drm_dev->driver->suspend(drm_dev, state);
40 42
41 return 0; 43 return 0;
@@ -53,7 +55,9 @@ static int drm_sysfs_resume(struct device *dev)
53 struct drm_minor *drm_minor = to_drm_minor(dev); 55 struct drm_minor *drm_minor = to_drm_minor(dev);
54 struct drm_device *drm_dev = drm_minor->dev; 56 struct drm_device *drm_dev = drm_minor->dev;
55 57
56 if (drm_minor->type == DRM_MINOR_LEGACY && drm_dev->driver->resume) 58 if (drm_minor->type == DRM_MINOR_LEGACY &&
59 !drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
60 drm_dev->driver->resume)
57 return drm_dev->driver->resume(drm_dev); 61 return drm_dev->driver->resume(drm_dev);
58 62
59 return 0; 63 return 0;
@@ -118,20 +122,6 @@ void drm_sysfs_destroy(void)
118 class_destroy(drm_class); 122 class_destroy(drm_class);
119} 123}
120 124
121static ssize_t show_dri(struct device *device, struct device_attribute *attr,
122 char *buf)
123{
124 struct drm_minor *drm_minor = to_drm_minor(device);
125 struct drm_device *drm_dev = drm_minor->dev;
126 if (drm_dev->driver->dri_library_name)
127 return drm_dev->driver->dri_library_name(drm_dev, buf);
128 return snprintf(buf, PAGE_SIZE, "%s\n", drm_dev->driver->pci_driver.name);
129}
130
131static struct device_attribute device_attrs[] = {
132 __ATTR(dri_library_name, S_IRUGO, show_dri, NULL),
133};
134
135/** 125/**
136 * drm_sysfs_device_release - do nothing 126 * drm_sysfs_device_release - do nothing
137 * @dev: Linux device 127 * @dev: Linux device
@@ -359,8 +349,8 @@ int drm_sysfs_connector_add(struct drm_connector *connector)
359 DRM_DEBUG("adding \"%s\" to sysfs\n", 349 DRM_DEBUG("adding \"%s\" to sysfs\n",
360 drm_get_connector_name(connector)); 350 drm_get_connector_name(connector));
361 351
362 snprintf(connector->kdev.bus_id, BUS_ID_SIZE, "card%d-%s", 352 dev_set_name(&connector->kdev, "card%d-%s",
363 dev->primary->index, drm_get_connector_name(connector)); 353 dev->primary->index, drm_get_connector_name(connector));
364 ret = device_register(&connector->kdev); 354 ret = device_register(&connector->kdev);
365 355
366 if (ret) { 356 if (ret) {
@@ -461,6 +451,7 @@ void drm_sysfs_hotplug_event(struct drm_device *dev)
461 451
462 kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, envp); 452 kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, envp);
463} 453}
454EXPORT_SYMBOL(drm_sysfs_hotplug_event);
464 455
465/** 456/**
466 * drm_sysfs_device_add - adds a class device to sysfs for a character driver 457 * drm_sysfs_device_add - adds a class device to sysfs for a character driver
@@ -474,7 +465,6 @@ void drm_sysfs_hotplug_event(struct drm_device *dev)
474int drm_sysfs_device_add(struct drm_minor *minor) 465int drm_sysfs_device_add(struct drm_minor *minor)
475{ 466{
476 int err; 467 int err;
477 int i, j;
478 char *minor_str; 468 char *minor_str;
479 469
480 minor->kdev.parent = &minor->dev->pdev->dev; 470 minor->kdev.parent = &minor->dev->pdev->dev;
@@ -496,18 +486,8 @@ int drm_sysfs_device_add(struct drm_minor *minor)
496 goto err_out; 486 goto err_out;
497 } 487 }
498 488
499 for (i = 0; i < ARRAY_SIZE(device_attrs); i++) {
500 err = device_create_file(&minor->kdev, &device_attrs[i]);
501 if (err)
502 goto err_out_files;
503 }
504
505 return 0; 489 return 0;
506 490
507err_out_files:
508 if (i > 0)
509 for (j = 0; j < i; j++)
510 device_remove_file(&minor->kdev, &device_attrs[j]);
511 device_unregister(&minor->kdev); 491 device_unregister(&minor->kdev);
512err_out: 492err_out:
513 493
@@ -523,9 +503,5 @@ err_out:
523 */ 503 */
524void drm_sysfs_device_remove(struct drm_minor *minor) 504void drm_sysfs_device_remove(struct drm_minor *minor)
525{ 505{
526 int i;
527
528 for (i = 0; i < ARRAY_SIZE(device_attrs); i++)
529 device_remove_file(&minor->kdev, &device_attrs[i]);
530 device_unregister(&minor->kdev); 506 device_unregister(&minor->kdev);
531} 507}
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index 3ffae021d28..22f76567ac7 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -91,7 +91,7 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
91{ 91{
92 struct drm_file *priv = vma->vm_file->private_data; 92 struct drm_file *priv = vma->vm_file->private_data;
93 struct drm_device *dev = priv->minor->dev; 93 struct drm_device *dev = priv->minor->dev;
94 struct drm_map *map = NULL; 94 struct drm_local_map *map = NULL;
95 struct drm_map_list *r_list; 95 struct drm_map_list *r_list;
96 struct drm_hash_item *hash; 96 struct drm_hash_item *hash;
97 97
@@ -115,9 +115,9 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
115 * Using vm_pgoff as a selector forces us to use this unusual 115 * Using vm_pgoff as a selector forces us to use this unusual
116 * addressing scheme. 116 * addressing scheme.
117 */ 117 */
118 unsigned long offset = (unsigned long)vmf->virtual_address - 118 resource_size_t offset = (unsigned long)vmf->virtual_address -
119 vma->vm_start; 119 vma->vm_start;
120 unsigned long baddr = map->offset + offset; 120 resource_size_t baddr = map->offset + offset;
121 struct drm_agp_mem *agpmem; 121 struct drm_agp_mem *agpmem;
122 struct page *page; 122 struct page *page;
123 123
@@ -149,8 +149,10 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
149 vmf->page = page; 149 vmf->page = page;
150 150
151 DRM_DEBUG 151 DRM_DEBUG
152 ("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n", 152 ("baddr = 0x%llx page = 0x%p, offset = 0x%llx, count=%d\n",
153 baddr, __va(agpmem->memory->memory[offset]), offset, 153 (unsigned long long)baddr,
154 __va(agpmem->memory->memory[offset]),
155 (unsigned long long)offset,
154 page_count(page)); 156 page_count(page));
155 return 0; 157 return 0;
156 } 158 }
@@ -176,7 +178,7 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
176 */ 178 */
177static int drm_do_vm_shm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 179static int drm_do_vm_shm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
178{ 180{
179 struct drm_map *map = (struct drm_map *) vma->vm_private_data; 181 struct drm_local_map *map = vma->vm_private_data;
180 unsigned long offset; 182 unsigned long offset;
181 unsigned long i; 183 unsigned long i;
182 struct page *page; 184 struct page *page;
@@ -209,7 +211,7 @@ static void drm_vm_shm_close(struct vm_area_struct *vma)
209 struct drm_file *priv = vma->vm_file->private_data; 211 struct drm_file *priv = vma->vm_file->private_data;
210 struct drm_device *dev = priv->minor->dev; 212 struct drm_device *dev = priv->minor->dev;
211 struct drm_vma_entry *pt, *temp; 213 struct drm_vma_entry *pt, *temp;
212 struct drm_map *map; 214 struct drm_local_map *map;
213 struct drm_map_list *r_list; 215 struct drm_map_list *r_list;
214 int found_maps = 0; 216 int found_maps = 0;
215 217
@@ -322,7 +324,7 @@ static int drm_do_vm_dma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
322 */ 324 */
323static int drm_do_vm_sg_fault(struct vm_area_struct *vma, struct vm_fault *vmf) 325static int drm_do_vm_sg_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
324{ 326{
325 struct drm_map *map = (struct drm_map *) vma->vm_private_data; 327 struct drm_local_map *map = vma->vm_private_data;
326 struct drm_file *priv = vma->vm_file->private_data; 328 struct drm_file *priv = vma->vm_file->private_data;
327 struct drm_device *dev = priv->minor->dev; 329 struct drm_device *dev = priv->minor->dev;
328 struct drm_sg_mem *entry = dev->sg; 330 struct drm_sg_mem *entry = dev->sg;
@@ -512,14 +514,14 @@ static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)
512 return 0; 514 return 0;
513} 515}
514 516
515unsigned long drm_core_get_map_ofs(struct drm_map * map) 517resource_size_t drm_core_get_map_ofs(struct drm_local_map * map)
516{ 518{
517 return map->offset; 519 return map->offset;
518} 520}
519 521
520EXPORT_SYMBOL(drm_core_get_map_ofs); 522EXPORT_SYMBOL(drm_core_get_map_ofs);
521 523
522unsigned long drm_core_get_reg_ofs(struct drm_device *dev) 524resource_size_t drm_core_get_reg_ofs(struct drm_device *dev)
523{ 525{
524#ifdef __alpha__ 526#ifdef __alpha__
525 return dev->hose->dense_mem_base - dev->hose->mem_space->start; 527 return dev->hose->dense_mem_base - dev->hose->mem_space->start;
@@ -547,8 +549,8 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
547{ 549{
548 struct drm_file *priv = filp->private_data; 550 struct drm_file *priv = filp->private_data;
549 struct drm_device *dev = priv->minor->dev; 551 struct drm_device *dev = priv->minor->dev;
550 struct drm_map *map = NULL; 552 struct drm_local_map *map = NULL;
551 unsigned long offset = 0; 553 resource_size_t offset = 0;
552 struct drm_hash_item *hash; 554 struct drm_hash_item *hash;
553 555
554 DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n", 556 DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n",
@@ -623,9 +625,9 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
623 vma->vm_page_prot)) 625 vma->vm_page_prot))
624 return -EAGAIN; 626 return -EAGAIN;
625 DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," 627 DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx,"
626 " offset = 0x%lx\n", 628 " offset = 0x%llx\n",
627 map->type, 629 map->type,
628 vma->vm_start, vma->vm_end, map->offset + offset); 630 vma->vm_start, vma->vm_end, (unsigned long long)(map->offset + offset));
629 vma->vm_ops = &drm_vm_ops; 631 vma->vm_ops = &drm_vm_ops;
630 break; 632 break;
631 case _DRM_CONSISTENT: 633 case _DRM_CONSISTENT:
diff --git a/drivers/gpu/drm/i810/i810_drv.h b/drivers/gpu/drm/i810/i810_drv.h
index 0118849a567..21e2691f28f 100644
--- a/drivers/gpu/drm/i810/i810_drv.h
+++ b/drivers/gpu/drm/i810/i810_drv.h
@@ -77,8 +77,8 @@ typedef struct _drm_i810_ring_buffer {
77} drm_i810_ring_buffer_t; 77} drm_i810_ring_buffer_t;
78 78
79typedef struct drm_i810_private { 79typedef struct drm_i810_private {
80 struct drm_map *sarea_map; 80 struct drm_local_map *sarea_map;
81 struct drm_map *mmio_map; 81 struct drm_local_map *mmio_map;
82 82
83 drm_i810_sarea_t *sarea_priv; 83 drm_i810_sarea_t *sarea_priv;
84 drm_i810_ring_buffer_t ring; 84 drm_i810_ring_buffer_t ring;
diff --git a/drivers/gpu/drm/i830/i830_drv.h b/drivers/gpu/drm/i830/i830_drv.h
index b5bf8cc0fda..da82afe4ded 100644
--- a/drivers/gpu/drm/i830/i830_drv.h
+++ b/drivers/gpu/drm/i830/i830_drv.h
@@ -84,8 +84,8 @@ typedef struct _drm_i830_ring_buffer {
84} drm_i830_ring_buffer_t; 84} drm_i830_ring_buffer_t;
85 85
86typedef struct drm_i830_private { 86typedef struct drm_i830_private {
87 struct drm_map *sarea_map; 87 struct drm_local_map *sarea_map;
88 struct drm_map *mmio_map; 88 struct drm_local_map *mmio_map;
89 89
90 drm_i830_sarea_t *sarea_priv; 90 drm_i830_sarea_t *sarea_priv;
91 drm_i830_ring_buffer_t ring; 91 drm_i830_ring_buffer_t ring;
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 793cba39d83..51c5a050aa7 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -7,7 +7,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
7 i915_suspend.o \ 7 i915_suspend.o \
8 i915_gem.o \ 8 i915_gem.o \
9 i915_gem_debug.o \ 9 i915_gem_debug.o \
10 i915_gem_proc.o \ 10 i915_gem_debugfs.o \
11 i915_gem_tiling.o \ 11 i915_gem_tiling.o \
12 intel_display.o \ 12 intel_display.o \
13 intel_crt.o \ 13 intel_crt.o \
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 638686904e0..a000cf02882 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -41,7 +41,6 @@
41int i915_wait_ring(struct drm_device * dev, int n, const char *caller) 41int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
42{ 42{
43 drm_i915_private_t *dev_priv = dev->dev_private; 43 drm_i915_private_t *dev_priv = dev->dev_private;
44 struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
45 drm_i915_ring_buffer_t *ring = &(dev_priv->ring); 44 drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
46 u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD; 45 u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD;
47 u32 last_acthd = I915_READ(acthd_reg); 46 u32 last_acthd = I915_READ(acthd_reg);
@@ -58,8 +57,12 @@ int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
58 if (ring->space >= n) 57 if (ring->space >= n)
59 return 0; 58 return 0;
60 59
61 if (master_priv->sarea_priv) 60 if (dev->primary->master) {
62 master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; 61 struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
62 if (master_priv->sarea_priv)
63 master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
64 }
65
63 66
64 if (ring->head != last_head) 67 if (ring->head != last_head)
65 i = 0; 68 i = 0;
@@ -356,7 +359,7 @@ static int validate_cmd(int cmd)
356 return ret; 359 return ret;
357} 360}
358 361
359static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwords) 362static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
360{ 363{
361 drm_i915_private_t *dev_priv = dev->dev_private; 364 drm_i915_private_t *dev_priv = dev->dev_private;
362 int i; 365 int i;
@@ -370,8 +373,7 @@ static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwor
370 for (i = 0; i < dwords;) { 373 for (i = 0; i < dwords;) {
371 int cmd, sz; 374 int cmd, sz;
372 375
373 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd))) 376 cmd = buffer[i];
374 return -EINVAL;
375 377
376 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords) 378 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
377 return -EINVAL; 379 return -EINVAL;
@@ -379,11 +381,7 @@ static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwor
379 OUT_RING(cmd); 381 OUT_RING(cmd);
380 382
381 while (++i, --sz) { 383 while (++i, --sz) {
382 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], 384 OUT_RING(buffer[i]);
383 sizeof(cmd))) {
384 return -EINVAL;
385 }
386 OUT_RING(cmd);
387 } 385 }
388 } 386 }
389 387
@@ -397,17 +395,13 @@ static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwor
397 395
398int 396int
399i915_emit_box(struct drm_device *dev, 397i915_emit_box(struct drm_device *dev,
400 struct drm_clip_rect __user *boxes, 398 struct drm_clip_rect *boxes,
401 int i, int DR1, int DR4) 399 int i, int DR1, int DR4)
402{ 400{
403 drm_i915_private_t *dev_priv = dev->dev_private; 401 drm_i915_private_t *dev_priv = dev->dev_private;
404 struct drm_clip_rect box; 402 struct drm_clip_rect box = boxes[i];
405 RING_LOCALS; 403 RING_LOCALS;
406 404
407 if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
408 return -EFAULT;
409 }
410
411 if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) { 405 if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
412 DRM_ERROR("Bad box %d,%d..%d,%d\n", 406 DRM_ERROR("Bad box %d,%d..%d,%d\n",
413 box.x1, box.y1, box.x2, box.y2); 407 box.x1, box.y1, box.x2, box.y2);
@@ -460,7 +454,9 @@ static void i915_emit_breadcrumb(struct drm_device *dev)
460} 454}
461 455
462static int i915_dispatch_cmdbuffer(struct drm_device * dev, 456static int i915_dispatch_cmdbuffer(struct drm_device * dev,
463 drm_i915_cmdbuffer_t * cmd) 457 drm_i915_cmdbuffer_t *cmd,
458 struct drm_clip_rect *cliprects,
459 void *cmdbuf)
464{ 460{
465 int nbox = cmd->num_cliprects; 461 int nbox = cmd->num_cliprects;
466 int i = 0, count, ret; 462 int i = 0, count, ret;
@@ -476,13 +472,13 @@ static int i915_dispatch_cmdbuffer(struct drm_device * dev,
476 472
477 for (i = 0; i < count; i++) { 473 for (i = 0; i < count; i++) {
478 if (i < nbox) { 474 if (i < nbox) {
479 ret = i915_emit_box(dev, cmd->cliprects, i, 475 ret = i915_emit_box(dev, cliprects, i,
480 cmd->DR1, cmd->DR4); 476 cmd->DR1, cmd->DR4);
481 if (ret) 477 if (ret)
482 return ret; 478 return ret;
483 } 479 }
484 480
485 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4); 481 ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4);
486 if (ret) 482 if (ret)
487 return ret; 483 return ret;
488 } 484 }
@@ -492,10 +488,10 @@ static int i915_dispatch_cmdbuffer(struct drm_device * dev,
492} 488}
493 489
494static int i915_dispatch_batchbuffer(struct drm_device * dev, 490static int i915_dispatch_batchbuffer(struct drm_device * dev,
495 drm_i915_batchbuffer_t * batch) 491 drm_i915_batchbuffer_t * batch,
492 struct drm_clip_rect *cliprects)
496{ 493{
497 drm_i915_private_t *dev_priv = dev->dev_private; 494 drm_i915_private_t *dev_priv = dev->dev_private;
498 struct drm_clip_rect __user *boxes = batch->cliprects;
499 int nbox = batch->num_cliprects; 495 int nbox = batch->num_cliprects;
500 int i = 0, count; 496 int i = 0, count;
501 RING_LOCALS; 497 RING_LOCALS;
@@ -511,7 +507,7 @@ static int i915_dispatch_batchbuffer(struct drm_device * dev,
511 507
512 for (i = 0; i < count; i++) { 508 for (i = 0; i < count; i++) {
513 if (i < nbox) { 509 if (i < nbox) {
514 int ret = i915_emit_box(dev, boxes, i, 510 int ret = i915_emit_box(dev, cliprects, i,
515 batch->DR1, batch->DR4); 511 batch->DR1, batch->DR4);
516 if (ret) 512 if (ret)
517 return ret; 513 return ret;
@@ -626,6 +622,7 @@ static int i915_batchbuffer(struct drm_device *dev, void *data,
626 master_priv->sarea_priv; 622 master_priv->sarea_priv;
627 drm_i915_batchbuffer_t *batch = data; 623 drm_i915_batchbuffer_t *batch = data;
628 int ret; 624 int ret;
625 struct drm_clip_rect *cliprects = NULL;
629 626
630 if (!dev_priv->allow_batchbuffer) { 627 if (!dev_priv->allow_batchbuffer) {
631 DRM_ERROR("Batchbuffer ioctl disabled\n"); 628 DRM_ERROR("Batchbuffer ioctl disabled\n");
@@ -637,17 +634,35 @@ static int i915_batchbuffer(struct drm_device *dev, void *data,
637 634
638 RING_LOCK_TEST_WITH_RETURN(dev, file_priv); 635 RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
639 636
640 if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects, 637 if (batch->num_cliprects < 0)
641 batch->num_cliprects * 638 return -EINVAL;
642 sizeof(struct drm_clip_rect))) 639
643 return -EFAULT; 640 if (batch->num_cliprects) {
641 cliprects = drm_calloc(batch->num_cliprects,
642 sizeof(struct drm_clip_rect),
643 DRM_MEM_DRIVER);
644 if (cliprects == NULL)
645 return -ENOMEM;
646
647 ret = copy_from_user(cliprects, batch->cliprects,
648 batch->num_cliprects *
649 sizeof(struct drm_clip_rect));
650 if (ret != 0)
651 goto fail_free;
652 }
644 653
645 mutex_lock(&dev->struct_mutex); 654 mutex_lock(&dev->struct_mutex);
646 ret = i915_dispatch_batchbuffer(dev, batch); 655 ret = i915_dispatch_batchbuffer(dev, batch, cliprects);
647 mutex_unlock(&dev->struct_mutex); 656 mutex_unlock(&dev->struct_mutex);
648 657
649 if (sarea_priv) 658 if (sarea_priv)
650 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); 659 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
660
661fail_free:
662 drm_free(cliprects,
663 batch->num_cliprects * sizeof(struct drm_clip_rect),
664 DRM_MEM_DRIVER);
665
651 return ret; 666 return ret;
652} 667}
653 668
@@ -659,6 +674,8 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
659 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) 674 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
660 master_priv->sarea_priv; 675 master_priv->sarea_priv;
661 drm_i915_cmdbuffer_t *cmdbuf = data; 676 drm_i915_cmdbuffer_t *cmdbuf = data;
677 struct drm_clip_rect *cliprects = NULL;
678 void *batch_data;
662 int ret; 679 int ret;
663 680
664 DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n", 681 DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
@@ -666,25 +683,50 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
666 683
667 RING_LOCK_TEST_WITH_RETURN(dev, file_priv); 684 RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
668 685
669 if (cmdbuf->num_cliprects && 686 if (cmdbuf->num_cliprects < 0)
670 DRM_VERIFYAREA_READ(cmdbuf->cliprects, 687 return -EINVAL;
671 cmdbuf->num_cliprects * 688
672 sizeof(struct drm_clip_rect))) { 689 batch_data = drm_alloc(cmdbuf->sz, DRM_MEM_DRIVER);
673 DRM_ERROR("Fault accessing cliprects\n"); 690 if (batch_data == NULL)
674 return -EFAULT; 691 return -ENOMEM;
692
693 ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
694 if (ret != 0)
695 goto fail_batch_free;
696
697 if (cmdbuf->num_cliprects) {
698 cliprects = drm_calloc(cmdbuf->num_cliprects,
699 sizeof(struct drm_clip_rect),
700 DRM_MEM_DRIVER);
701 if (cliprects == NULL)
702 goto fail_batch_free;
703
704 ret = copy_from_user(cliprects, cmdbuf->cliprects,
705 cmdbuf->num_cliprects *
706 sizeof(struct drm_clip_rect));
707 if (ret != 0)
708 goto fail_clip_free;
675 } 709 }
676 710
677 mutex_lock(&dev->struct_mutex); 711 mutex_lock(&dev->struct_mutex);
678 ret = i915_dispatch_cmdbuffer(dev, cmdbuf); 712 ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data);
679 mutex_unlock(&dev->struct_mutex); 713 mutex_unlock(&dev->struct_mutex);
680 if (ret) { 714 if (ret) {
681 DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); 715 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
682 return ret; 716 goto fail_batch_free;
683 } 717 }
684 718
685 if (sarea_priv) 719 if (sarea_priv)
686 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); 720 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
687 return 0; 721
722fail_batch_free:
723 drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
724fail_clip_free:
725 drm_free(cliprects,
726 cmdbuf->num_cliprects * sizeof(struct drm_clip_rect),
727 DRM_MEM_DRIVER);
728
729 return ret;
688} 730}
689 731
690static int i915_flip_bufs(struct drm_device *dev, void *data, 732static int i915_flip_bufs(struct drm_device *dev, void *data,
@@ -880,7 +922,7 @@ static int i915_probe_agp(struct drm_device *dev, unsigned long *aperture_size,
880 * Some of the preallocated space is taken by the GTT 922 * Some of the preallocated space is taken by the GTT
881 * and popup. GTT is 1K per MB of aperture size, and popup is 4K. 923 * and popup. GTT is 1K per MB of aperture size, and popup is 4K.
882 */ 924 */
883 if (IS_G4X(dev)) 925 if (IS_G4X(dev) || IS_IGD(dev))
884 overhead = 4096; 926 overhead = 4096;
885 else 927 else
886 overhead = (*aperture_size / 1024) + 4096; 928 overhead = (*aperture_size / 1024) + 4096;
@@ -988,13 +1030,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
988 if (ret) 1030 if (ret)
989 goto destroy_ringbuffer; 1031 goto destroy_ringbuffer;
990 1032
991 /* FIXME: re-add hotplug support */
992#if 0
993 ret = drm_hotplug_init(dev);
994 if (ret)
995 goto destroy_ringbuffer;
996#endif
997
998 /* Always safe in the mode setting case. */ 1033 /* Always safe in the mode setting case. */
999 /* FIXME: do pre/post-mode set stuff in core KMS code */ 1034 /* FIXME: do pre/post-mode set stuff in core KMS code */
1000 dev->vblank_disable_allowed = 1; 1035 dev->vblank_disable_allowed = 1;
@@ -1007,7 +1042,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
1007 1042
1008 intel_modeset_init(dev); 1043 intel_modeset_init(dev);
1009 1044
1010 drm_helper_initial_config(dev, false); 1045 drm_helper_initial_config(dev);
1011 1046
1012 return 0; 1047 return 0;
1013 1048
@@ -1057,7 +1092,7 @@ void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
1057int i915_driver_load(struct drm_device *dev, unsigned long flags) 1092int i915_driver_load(struct drm_device *dev, unsigned long flags)
1058{ 1093{
1059 struct drm_i915_private *dev_priv = dev->dev_private; 1094 struct drm_i915_private *dev_priv = dev->dev_private;
1060 unsigned long base, size; 1095 resource_size_t base, size;
1061 int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1; 1096 int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
1062 1097
1063 /* i915 has 4 more counters */ 1098 /* i915 has 4 more counters */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 209592fdb7e..6503e2210f6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -42,6 +42,8 @@ module_param_named(modeset, i915_modeset, int, 0400);
42unsigned int i915_fbpercrtc = 0; 42unsigned int i915_fbpercrtc = 0;
43module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); 43module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
44 44
45static struct drm_driver driver;
46
45static struct pci_device_id pciidlist[] = { 47static struct pci_device_id pciidlist[] = {
46 i915_PCI_IDS 48 i915_PCI_IDS
47}; 49};
@@ -117,6 +119,36 @@ static int i915_resume(struct drm_device *dev)
117 return ret; 119 return ret;
118} 120}
119 121
122static int __devinit
123i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
124{
125 return drm_get_dev(pdev, ent, &driver);
126}
127
128static void
129i915_pci_remove(struct pci_dev *pdev)
130{
131 struct drm_device *dev = pci_get_drvdata(pdev);
132
133 drm_put_dev(dev);
134}
135
136static int
137i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
138{
139 struct drm_device *dev = pci_get_drvdata(pdev);
140
141 return i915_suspend(dev, state);
142}
143
144static int
145i915_pci_resume(struct pci_dev *pdev)
146{
147 struct drm_device *dev = pci_get_drvdata(pdev);
148
149 return i915_resume(dev);
150}
151
120static struct vm_operations_struct i915_gem_vm_ops = { 152static struct vm_operations_struct i915_gem_vm_ops = {
121 .fault = i915_gem_fault, 153 .fault = i915_gem_fault,
122 .open = drm_gem_vm_open, 154 .open = drm_gem_vm_open,
@@ -150,8 +182,10 @@ static struct drm_driver driver = {
150 .get_reg_ofs = drm_core_get_reg_ofs, 182 .get_reg_ofs = drm_core_get_reg_ofs,
151 .master_create = i915_master_create, 183 .master_create = i915_master_create,
152 .master_destroy = i915_master_destroy, 184 .master_destroy = i915_master_destroy,
153 .proc_init = i915_gem_proc_init, 185#if defined(CONFIG_DEBUG_FS)
154 .proc_cleanup = i915_gem_proc_cleanup, 186 .debugfs_init = i915_gem_debugfs_init,
187 .debugfs_cleanup = i915_gem_debugfs_cleanup,
188#endif
155 .gem_init_object = i915_gem_init_object, 189 .gem_init_object = i915_gem_init_object,
156 .gem_free_object = i915_gem_free_object, 190 .gem_free_object = i915_gem_free_object,
157 .gem_vm_ops = &i915_gem_vm_ops, 191 .gem_vm_ops = &i915_gem_vm_ops,
@@ -172,6 +206,12 @@ static struct drm_driver driver = {
172 .pci_driver = { 206 .pci_driver = {
173 .name = DRIVER_NAME, 207 .name = DRIVER_NAME,
174 .id_table = pciidlist, 208 .id_table = pciidlist,
209 .probe = i915_pci_probe,
210 .remove = i915_pci_remove,
211#ifdef CONFIG_PM
212 .resume = i915_pci_resume,
213 .suspend = i915_pci_suspend,
214#endif
175 }, 215 },
176 216
177 .name = DRIVER_NAME, 217 .name = DRIVER_NAME,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b9a92c250b9..3750d800304 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -159,6 +159,9 @@ typedef struct drm_i915_private {
159 u32 irq_mask_reg; 159 u32 irq_mask_reg;
160 u32 pipestat[2]; 160 u32 pipestat[2];
161 161
162 u32 hotplug_supported_mask;
163 struct work_struct hotplug_work;
164
162 int tex_lru_log_granularity; 165 int tex_lru_log_granularity;
163 int allow_batchbuffer; 166 int allow_batchbuffer;
164 struct mem_block *agp_heap; 167 struct mem_block *agp_heap;
@@ -297,6 +300,7 @@ typedef struct drm_i915_private {
297 * 300 *
298 * A reference is held on the buffer while on this list. 301 * A reference is held on the buffer while on this list.
299 */ 302 */
303 spinlock_t active_list_lock;
300 struct list_head active_list; 304 struct list_head active_list;
301 305
302 /** 306 /**
@@ -404,7 +408,8 @@ struct drm_i915_gem_object {
404 /** AGP memory structure for our GTT binding. */ 408 /** AGP memory structure for our GTT binding. */
405 DRM_AGP_MEM *agp_mem; 409 DRM_AGP_MEM *agp_mem;
406 410
407 struct page **page_list; 411 struct page **pages;
412 int pages_refcount;
408 413
409 /** 414 /**
410 * Current offset of the object in GTT space. 415 * Current offset of the object in GTT space.
@@ -519,7 +524,7 @@ extern int i915_driver_device_is_agp(struct drm_device * dev);
519extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, 524extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
520 unsigned long arg); 525 unsigned long arg);
521extern int i915_emit_box(struct drm_device *dev, 526extern int i915_emit_box(struct drm_device *dev,
522 struct drm_clip_rect __user *boxes, 527 struct drm_clip_rect *boxes,
523 int i, int DR1, int DR4); 528 int i, int DR1, int DR4);
524 529
525/* i915_irq.c */ 530/* i915_irq.c */
@@ -604,8 +609,6 @@ int i915_gem_get_tiling(struct drm_device *dev, void *data,
604int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data, 609int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
605 struct drm_file *file_priv); 610 struct drm_file *file_priv);
606void i915_gem_load(struct drm_device *dev); 611void i915_gem_load(struct drm_device *dev);
607int i915_gem_proc_init(struct drm_minor *minor);
608void i915_gem_proc_cleanup(struct drm_minor *minor);
609int i915_gem_init_object(struct drm_gem_object *obj); 612int i915_gem_init_object(struct drm_gem_object *obj);
610void i915_gem_free_object(struct drm_gem_object *obj); 613void i915_gem_free_object(struct drm_gem_object *obj);
611int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment); 614int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
@@ -649,6 +652,10 @@ void i915_gem_dump_object(struct drm_gem_object *obj, int len,
649 const char *where, uint32_t mark); 652 const char *where, uint32_t mark);
650void i915_dump_lru(struct drm_device *dev, const char *where); 653void i915_dump_lru(struct drm_device *dev, const char *where);
651 654
655/* i915_debugfs.c */
656int i915_gem_debugfs_init(struct drm_minor *minor);
657void i915_gem_debugfs_cleanup(struct drm_minor *minor);
658
652/* i915_suspend.c */ 659/* i915_suspend.c */
653extern int i915_save_state(struct drm_device *dev); 660extern int i915_save_state(struct drm_device *dev);
654extern int i915_restore_state(struct drm_device *dev); 661extern int i915_restore_state(struct drm_device *dev);
@@ -784,15 +791,21 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
784 (dev)->pci_device == 0x2E22 || \ 791 (dev)->pci_device == 0x2E22 || \
785 IS_GM45(dev)) 792 IS_GM45(dev))
786 793
794#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
795#define IS_IGDGM(dev) ((dev)->pci_device == 0xa011)
796#define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev))
797
787#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \ 798#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
788 (dev)->pci_device == 0x29B2 || \ 799 (dev)->pci_device == 0x29B2 || \
789 (dev)->pci_device == 0x29D2) 800 (dev)->pci_device == 0x29D2 || \
801 (IS_IGD(dev)))
790 802
791#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \ 803#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
792 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev)) 804 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
793 805
794#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \ 806#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
795 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev)) 807 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
808 IS_IGD(dev))
796 809
797#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev)) 810#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
798/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte 811/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
@@ -801,6 +814,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
801#define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \ 814#define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
802 IS_I915GM(dev))) 815 IS_I915GM(dev)))
803#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev)) 816#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev))
817#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
804 818
805#define PRIMARY_RINGBUFFER_SIZE (128*1024) 819#define PRIMARY_RINGBUFFER_SIZE (128*1024)
806 820
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 37427e4016c..1449b452cc6 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -43,8 +43,8 @@ static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
43 uint64_t offset, 43 uint64_t offset,
44 uint64_t size); 44 uint64_t size);
45static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj); 45static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj);
46static int i915_gem_object_get_page_list(struct drm_gem_object *obj); 46static int i915_gem_object_get_pages(struct drm_gem_object *obj);
47static void i915_gem_object_free_page_list(struct drm_gem_object *obj); 47static void i915_gem_object_put_pages(struct drm_gem_object *obj);
48static int i915_gem_object_wait_rendering(struct drm_gem_object *obj); 48static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
49static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, 49static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
50 unsigned alignment); 50 unsigned alignment);
@@ -136,6 +136,224 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
136 return 0; 136 return 0;
137} 137}
138 138
139static inline int
140fast_shmem_read(struct page **pages,
141 loff_t page_base, int page_offset,
142 char __user *data,
143 int length)
144{
145 char __iomem *vaddr;
146 int ret;
147
148 vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
149 if (vaddr == NULL)
150 return -ENOMEM;
151 ret = __copy_to_user_inatomic(data, vaddr + page_offset, length);
152 kunmap_atomic(vaddr, KM_USER0);
153
154 return ret;
155}
156
157static inline int
158slow_shmem_copy(struct page *dst_page,
159 int dst_offset,
160 struct page *src_page,
161 int src_offset,
162 int length)
163{
164 char *dst_vaddr, *src_vaddr;
165
166 dst_vaddr = kmap_atomic(dst_page, KM_USER0);
167 if (dst_vaddr == NULL)
168 return -ENOMEM;
169
170 src_vaddr = kmap_atomic(src_page, KM_USER1);
171 if (src_vaddr == NULL) {
172 kunmap_atomic(dst_vaddr, KM_USER0);
173 return -ENOMEM;
174 }
175
176 memcpy(dst_vaddr + dst_offset, src_vaddr + src_offset, length);
177
178 kunmap_atomic(src_vaddr, KM_USER1);
179 kunmap_atomic(dst_vaddr, KM_USER0);
180
181 return 0;
182}
183
184/**
185 * This is the fast shmem pread path, which attempts to copy_from_user directly
186 * from the backing pages of the object to the user's address space. On a
187 * fault, it fails so we can fall back to i915_gem_shmem_pwrite_slow().
188 */
189static int
190i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj,
191 struct drm_i915_gem_pread *args,
192 struct drm_file *file_priv)
193{
194 struct drm_i915_gem_object *obj_priv = obj->driver_private;
195 ssize_t remain;
196 loff_t offset, page_base;
197 char __user *user_data;
198 int page_offset, page_length;
199 int ret;
200
201 user_data = (char __user *) (uintptr_t) args->data_ptr;
202 remain = args->size;
203
204 mutex_lock(&dev->struct_mutex);
205
206 ret = i915_gem_object_get_pages(obj);
207 if (ret != 0)
208 goto fail_unlock;
209
210 ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
211 args->size);
212 if (ret != 0)
213 goto fail_put_pages;
214
215 obj_priv = obj->driver_private;
216 offset = args->offset;
217
218 while (remain > 0) {
219 /* Operation in this page
220 *
221 * page_base = page offset within aperture
222 * page_offset = offset within page
223 * page_length = bytes to copy for this page
224 */
225 page_base = (offset & ~(PAGE_SIZE-1));
226 page_offset = offset & (PAGE_SIZE-1);
227 page_length = remain;
228 if ((page_offset + remain) > PAGE_SIZE)
229 page_length = PAGE_SIZE - page_offset;
230
231 ret = fast_shmem_read(obj_priv->pages,
232 page_base, page_offset,
233 user_data, page_length);
234 if (ret)
235 goto fail_put_pages;
236
237 remain -= page_length;
238 user_data += page_length;
239 offset += page_length;
240 }
241
242fail_put_pages:
243 i915_gem_object_put_pages(obj);
244fail_unlock:
245 mutex_unlock(&dev->struct_mutex);
246
247 return ret;
248}
249
250/**
251 * This is the fallback shmem pread path, which allocates temporary storage
252 * in kernel space to copy_to_user into outside of the struct_mutex, so we
253 * can copy out of the object's backing pages while holding the struct mutex
254 * and not take page faults.
255 */
256static int
257i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
258 struct drm_i915_gem_pread *args,
259 struct drm_file *file_priv)
260{
261 struct drm_i915_gem_object *obj_priv = obj->driver_private;
262 struct mm_struct *mm = current->mm;
263 struct page **user_pages;
264 ssize_t remain;
265 loff_t offset, pinned_pages, i;
266 loff_t first_data_page, last_data_page, num_pages;
267 int shmem_page_index, shmem_page_offset;
268 int data_page_index, data_page_offset;
269 int page_length;
270 int ret;
271 uint64_t data_ptr = args->data_ptr;
272
273 remain = args->size;
274
275 /* Pin the user pages containing the data. We can't fault while
276 * holding the struct mutex, yet we want to hold it while
277 * dereferencing the user data.
278 */
279 first_data_page = data_ptr / PAGE_SIZE;
280 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
281 num_pages = last_data_page - first_data_page + 1;
282
283 user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL);
284 if (user_pages == NULL)
285 return -ENOMEM;
286
287 down_read(&mm->mmap_sem);
288 pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
289 num_pages, 0, 0, user_pages, NULL);
290 up_read(&mm->mmap_sem);
291 if (pinned_pages < num_pages) {
292 ret = -EFAULT;
293 goto fail_put_user_pages;
294 }
295
296 mutex_lock(&dev->struct_mutex);
297
298 ret = i915_gem_object_get_pages(obj);
299 if (ret != 0)
300 goto fail_unlock;
301
302 ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
303 args->size);
304 if (ret != 0)
305 goto fail_put_pages;
306
307 obj_priv = obj->driver_private;
308 offset = args->offset;
309
310 while (remain > 0) {
311 /* Operation in this page
312 *
313 * shmem_page_index = page number within shmem file
314 * shmem_page_offset = offset within page in shmem file
315 * data_page_index = page number in get_user_pages return
316 * data_page_offset = offset with data_page_index page.
317 * page_length = bytes to copy for this page
318 */
319 shmem_page_index = offset / PAGE_SIZE;
320 shmem_page_offset = offset & ~PAGE_MASK;
321 data_page_index = data_ptr / PAGE_SIZE - first_data_page;
322 data_page_offset = data_ptr & ~PAGE_MASK;
323
324 page_length = remain;
325 if ((shmem_page_offset + page_length) > PAGE_SIZE)
326 page_length = PAGE_SIZE - shmem_page_offset;
327 if ((data_page_offset + page_length) > PAGE_SIZE)
328 page_length = PAGE_SIZE - data_page_offset;
329
330 ret = slow_shmem_copy(user_pages[data_page_index],
331 data_page_offset,
332 obj_priv->pages[shmem_page_index],
333 shmem_page_offset,
334 page_length);
335 if (ret)
336 goto fail_put_pages;
337
338 remain -= page_length;
339 data_ptr += page_length;
340 offset += page_length;
341 }
342
343fail_put_pages:
344 i915_gem_object_put_pages(obj);
345fail_unlock:
346 mutex_unlock(&dev->struct_mutex);
347fail_put_user_pages:
348 for (i = 0; i < pinned_pages; i++) {
349 SetPageDirty(user_pages[i]);
350 page_cache_release(user_pages[i]);
351 }
352 kfree(user_pages);
353
354 return ret;
355}
356
139/** 357/**
140 * Reads data from the object referenced by handle. 358 * Reads data from the object referenced by handle.
141 * 359 *
@@ -148,8 +366,6 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
148 struct drm_i915_gem_pread *args = data; 366 struct drm_i915_gem_pread *args = data;
149 struct drm_gem_object *obj; 367 struct drm_gem_object *obj;
150 struct drm_i915_gem_object *obj_priv; 368 struct drm_i915_gem_object *obj_priv;
151 ssize_t read;
152 loff_t offset;
153 int ret; 369 int ret;
154 370
155 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 371 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
@@ -167,33 +383,13 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
167 return -EINVAL; 383 return -EINVAL;
168 } 384 }
169 385
170 mutex_lock(&dev->struct_mutex); 386 ret = i915_gem_shmem_pread_fast(dev, obj, args, file_priv);
171 387 if (ret != 0)
172 ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset, 388 ret = i915_gem_shmem_pread_slow(dev, obj, args, file_priv);
173 args->size);
174 if (ret != 0) {
175 drm_gem_object_unreference(obj);
176 mutex_unlock(&dev->struct_mutex);
177 return ret;
178 }
179
180 offset = args->offset;
181
182 read = vfs_read(obj->filp, (char __user *)(uintptr_t)args->data_ptr,
183 args->size, &offset);
184 if (read != args->size) {
185 drm_gem_object_unreference(obj);
186 mutex_unlock(&dev->struct_mutex);
187 if (read < 0)
188 return read;
189 else
190 return -EINVAL;
191 }
192 389
193 drm_gem_object_unreference(obj); 390 drm_gem_object_unreference(obj);
194 mutex_unlock(&dev->struct_mutex);
195 391
196 return 0; 392 return ret;
197} 393}
198 394
199/* This is the fast write path which cannot handle 395/* This is the fast write path which cannot handle
@@ -223,29 +419,54 @@ fast_user_write(struct io_mapping *mapping,
223 */ 419 */
224 420
225static inline int 421static inline int
226slow_user_write(struct io_mapping *mapping, 422slow_kernel_write(struct io_mapping *mapping,
227 loff_t page_base, int page_offset, 423 loff_t gtt_base, int gtt_offset,
228 char __user *user_data, 424 struct page *user_page, int user_offset,
229 int length) 425 int length)
426{
427 char *src_vaddr, *dst_vaddr;
428 unsigned long unwritten;
429
430 dst_vaddr = io_mapping_map_atomic_wc(mapping, gtt_base);
431 src_vaddr = kmap_atomic(user_page, KM_USER1);
432 unwritten = __copy_from_user_inatomic_nocache(dst_vaddr + gtt_offset,
433 src_vaddr + user_offset,
434 length);
435 kunmap_atomic(src_vaddr, KM_USER1);
436 io_mapping_unmap_atomic(dst_vaddr);
437 if (unwritten)
438 return -EFAULT;
439 return 0;
440}
441
442static inline int
443fast_shmem_write(struct page **pages,
444 loff_t page_base, int page_offset,
445 char __user *data,
446 int length)
230{ 447{
231 char __iomem *vaddr; 448 char __iomem *vaddr;
232 unsigned long unwritten; 449 unsigned long unwritten;
233 450
234 vaddr = io_mapping_map_wc(mapping, page_base); 451 vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
235 if (vaddr == NULL) 452 if (vaddr == NULL)
236 return -EFAULT; 453 return -ENOMEM;
237 unwritten = __copy_from_user(vaddr + page_offset, 454 unwritten = __copy_from_user_inatomic(vaddr + page_offset, data, length);
238 user_data, length); 455 kunmap_atomic(vaddr, KM_USER0);
239 io_mapping_unmap(vaddr); 456
240 if (unwritten) 457 if (unwritten)
241 return -EFAULT; 458 return -EFAULT;
242 return 0; 459 return 0;
243} 460}
244 461
462/**
463 * This is the fast pwrite path, where we copy the data directly from the
464 * user into the GTT, uncached.
465 */
245static int 466static int
246i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj, 467i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
247 struct drm_i915_gem_pwrite *args, 468 struct drm_i915_gem_pwrite *args,
248 struct drm_file *file_priv) 469 struct drm_file *file_priv)
249{ 470{
250 struct drm_i915_gem_object *obj_priv = obj->driver_private; 471 struct drm_i915_gem_object *obj_priv = obj->driver_private;
251 drm_i915_private_t *dev_priv = dev->dev_private; 472 drm_i915_private_t *dev_priv = dev->dev_private;
@@ -273,7 +494,6 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
273 494
274 obj_priv = obj->driver_private; 495 obj_priv = obj->driver_private;
275 offset = obj_priv->gtt_offset + args->offset; 496 offset = obj_priv->gtt_offset + args->offset;
276 obj_priv->dirty = 1;
277 497
278 while (remain > 0) { 498 while (remain > 0) {
279 /* Operation in this page 499 /* Operation in this page
@@ -292,16 +512,11 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
292 page_offset, user_data, page_length); 512 page_offset, user_data, page_length);
293 513
294 /* If we get a fault while copying data, then (presumably) our 514 /* If we get a fault while copying data, then (presumably) our
295 * source page isn't available. In this case, use the 515 * source page isn't available. Return the error and we'll
296 * non-atomic function 516 * retry in the slow path.
297 */ 517 */
298 if (ret) { 518 if (ret)
299 ret = slow_user_write (dev_priv->mm.gtt_mapping, 519 goto fail;
300 page_base, page_offset,
301 user_data, page_length);
302 if (ret)
303 goto fail;
304 }
305 520
306 remain -= page_length; 521 remain -= page_length;
307 user_data += page_length; 522 user_data += page_length;
@@ -315,39 +530,284 @@ fail:
315 return ret; 530 return ret;
316} 531}
317 532
533/**
534 * This is the fallback GTT pwrite path, which uses get_user_pages to pin
535 * the memory and maps it using kmap_atomic for copying.
536 *
537 * This code resulted in x11perf -rgb10text consuming about 10% more CPU
538 * than using i915_gem_gtt_pwrite_fast on a G45 (32-bit).
539 */
318static int 540static int
319i915_gem_shmem_pwrite(struct drm_device *dev, struct drm_gem_object *obj, 541i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
320 struct drm_i915_gem_pwrite *args, 542 struct drm_i915_gem_pwrite *args,
321 struct drm_file *file_priv) 543 struct drm_file *file_priv)
322{ 544{
545 struct drm_i915_gem_object *obj_priv = obj->driver_private;
546 drm_i915_private_t *dev_priv = dev->dev_private;
547 ssize_t remain;
548 loff_t gtt_page_base, offset;
549 loff_t first_data_page, last_data_page, num_pages;
550 loff_t pinned_pages, i;
551 struct page **user_pages;
552 struct mm_struct *mm = current->mm;
553 int gtt_page_offset, data_page_offset, data_page_index, page_length;
323 int ret; 554 int ret;
324 loff_t offset; 555 uint64_t data_ptr = args->data_ptr;
325 ssize_t written; 556
557 remain = args->size;
558
559 /* Pin the user pages containing the data. We can't fault while
560 * holding the struct mutex, and all of the pwrite implementations
561 * want to hold it while dereferencing the user data.
562 */
563 first_data_page = data_ptr / PAGE_SIZE;
564 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
565 num_pages = last_data_page - first_data_page + 1;
566
567 user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL);
568 if (user_pages == NULL)
569 return -ENOMEM;
570
571 down_read(&mm->mmap_sem);
572 pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
573 num_pages, 0, 0, user_pages, NULL);
574 up_read(&mm->mmap_sem);
575 if (pinned_pages < num_pages) {
576 ret = -EFAULT;
577 goto out_unpin_pages;
578 }
579
580 mutex_lock(&dev->struct_mutex);
581 ret = i915_gem_object_pin(obj, 0);
582 if (ret)
583 goto out_unlock;
584
585 ret = i915_gem_object_set_to_gtt_domain(obj, 1);
586 if (ret)
587 goto out_unpin_object;
588
589 obj_priv = obj->driver_private;
590 offset = obj_priv->gtt_offset + args->offset;
591
592 while (remain > 0) {
593 /* Operation in this page
594 *
595 * gtt_page_base = page offset within aperture
596 * gtt_page_offset = offset within page in aperture
597 * data_page_index = page number in get_user_pages return
598 * data_page_offset = offset with data_page_index page.
599 * page_length = bytes to copy for this page
600 */
601 gtt_page_base = offset & PAGE_MASK;
602 gtt_page_offset = offset & ~PAGE_MASK;
603 data_page_index = data_ptr / PAGE_SIZE - first_data_page;
604 data_page_offset = data_ptr & ~PAGE_MASK;
605
606 page_length = remain;
607 if ((gtt_page_offset + page_length) > PAGE_SIZE)
608 page_length = PAGE_SIZE - gtt_page_offset;
609 if ((data_page_offset + page_length) > PAGE_SIZE)
610 page_length = PAGE_SIZE - data_page_offset;
611
612 ret = slow_kernel_write(dev_priv->mm.gtt_mapping,
613 gtt_page_base, gtt_page_offset,
614 user_pages[data_page_index],
615 data_page_offset,
616 page_length);
617
618 /* If we get a fault while copying data, then (presumably) our
619 * source page isn't available. Return the error and we'll
620 * retry in the slow path.
621 */
622 if (ret)
623 goto out_unpin_object;
624
625 remain -= page_length;
626 offset += page_length;
627 data_ptr += page_length;
628 }
629
630out_unpin_object:
631 i915_gem_object_unpin(obj);
632out_unlock:
633 mutex_unlock(&dev->struct_mutex);
634out_unpin_pages:
635 for (i = 0; i < pinned_pages; i++)
636 page_cache_release(user_pages[i]);
637 kfree(user_pages);
638
639 return ret;
640}
641
642/**
643 * This is the fast shmem pwrite path, which attempts to directly
644 * copy_from_user into the kmapped pages backing the object.
645 */
646static int
647i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
648 struct drm_i915_gem_pwrite *args,
649 struct drm_file *file_priv)
650{
651 struct drm_i915_gem_object *obj_priv = obj->driver_private;
652 ssize_t remain;
653 loff_t offset, page_base;
654 char __user *user_data;
655 int page_offset, page_length;
656 int ret;
657
658 user_data = (char __user *) (uintptr_t) args->data_ptr;
659 remain = args->size;
326 660
327 mutex_lock(&dev->struct_mutex); 661 mutex_lock(&dev->struct_mutex);
328 662
663 ret = i915_gem_object_get_pages(obj);
664 if (ret != 0)
665 goto fail_unlock;
666
329 ret = i915_gem_object_set_to_cpu_domain(obj, 1); 667 ret = i915_gem_object_set_to_cpu_domain(obj, 1);
330 if (ret) { 668 if (ret != 0)
331 mutex_unlock(&dev->struct_mutex); 669 goto fail_put_pages;
332 return ret; 670
671 obj_priv = obj->driver_private;
672 offset = args->offset;
673 obj_priv->dirty = 1;
674
675 while (remain > 0) {
676 /* Operation in this page
677 *
678 * page_base = page offset within aperture
679 * page_offset = offset within page
680 * page_length = bytes to copy for this page
681 */
682 page_base = (offset & ~(PAGE_SIZE-1));
683 page_offset = offset & (PAGE_SIZE-1);
684 page_length = remain;
685 if ((page_offset + remain) > PAGE_SIZE)
686 page_length = PAGE_SIZE - page_offset;
687
688 ret = fast_shmem_write(obj_priv->pages,
689 page_base, page_offset,
690 user_data, page_length);
691 if (ret)
692 goto fail_put_pages;
693
694 remain -= page_length;
695 user_data += page_length;
696 offset += page_length;
697 }
698
699fail_put_pages:
700 i915_gem_object_put_pages(obj);
701fail_unlock:
702 mutex_unlock(&dev->struct_mutex);
703
704 return ret;
705}
706
707/**
708 * This is the fallback shmem pwrite path, which uses get_user_pages to pin
709 * the memory and maps it using kmap_atomic for copying.
710 *
711 * This avoids taking mmap_sem for faulting on the user's address while the
712 * struct_mutex is held.
713 */
714static int
715i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
716 struct drm_i915_gem_pwrite *args,
717 struct drm_file *file_priv)
718{
719 struct drm_i915_gem_object *obj_priv = obj->driver_private;
720 struct mm_struct *mm = current->mm;
721 struct page **user_pages;
722 ssize_t remain;
723 loff_t offset, pinned_pages, i;
724 loff_t first_data_page, last_data_page, num_pages;
725 int shmem_page_index, shmem_page_offset;
726 int data_page_index, data_page_offset;
727 int page_length;
728 int ret;
729 uint64_t data_ptr = args->data_ptr;
730
731 remain = args->size;
732
733 /* Pin the user pages containing the data. We can't fault while
734 * holding the struct mutex, and all of the pwrite implementations
735 * want to hold it while dereferencing the user data.
736 */
737 first_data_page = data_ptr / PAGE_SIZE;
738 last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
739 num_pages = last_data_page - first_data_page + 1;
740
741 user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL);
742 if (user_pages == NULL)
743 return -ENOMEM;
744
745 down_read(&mm->mmap_sem);
746 pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
747 num_pages, 0, 0, user_pages, NULL);
748 up_read(&mm->mmap_sem);
749 if (pinned_pages < num_pages) {
750 ret = -EFAULT;
751 goto fail_put_user_pages;
333 } 752 }
334 753
754 mutex_lock(&dev->struct_mutex);
755
756 ret = i915_gem_object_get_pages(obj);
757 if (ret != 0)
758 goto fail_unlock;
759
760 ret = i915_gem_object_set_to_cpu_domain(obj, 1);
761 if (ret != 0)
762 goto fail_put_pages;
763
764 obj_priv = obj->driver_private;
335 offset = args->offset; 765 offset = args->offset;
766 obj_priv->dirty = 1;
336 767
337 written = vfs_write(obj->filp, 768 while (remain > 0) {
338 (char __user *)(uintptr_t) args->data_ptr, 769 /* Operation in this page
339 args->size, &offset); 770 *
340 if (written != args->size) { 771 * shmem_page_index = page number within shmem file
341 mutex_unlock(&dev->struct_mutex); 772 * shmem_page_offset = offset within page in shmem file
342 if (written < 0) 773 * data_page_index = page number in get_user_pages return
343 return written; 774 * data_page_offset = offset with data_page_index page.
344 else 775 * page_length = bytes to copy for this page
345 return -EINVAL; 776 */
777 shmem_page_index = offset / PAGE_SIZE;
778 shmem_page_offset = offset & ~PAGE_MASK;
779 data_page_index = data_ptr / PAGE_SIZE - first_data_page;
780 data_page_offset = data_ptr & ~PAGE_MASK;
781
782 page_length = remain;
783 if ((shmem_page_offset + page_length) > PAGE_SIZE)
784 page_length = PAGE_SIZE - shmem_page_offset;
785 if ((data_page_offset + page_length) > PAGE_SIZE)
786 page_length = PAGE_SIZE - data_page_offset;
787
788 ret = slow_shmem_copy(obj_priv->pages[shmem_page_index],
789 shmem_page_offset,
790 user_pages[data_page_index],
791 data_page_offset,
792 page_length);
793 if (ret)
794 goto fail_put_pages;
795
796 remain -= page_length;
797 data_ptr += page_length;
798 offset += page_length;
346 } 799 }
347 800
801fail_put_pages:
802 i915_gem_object_put_pages(obj);
803fail_unlock:
348 mutex_unlock(&dev->struct_mutex); 804 mutex_unlock(&dev->struct_mutex);
805fail_put_user_pages:
806 for (i = 0; i < pinned_pages; i++)
807 page_cache_release(user_pages[i]);
808 kfree(user_pages);
349 809
350 return 0; 810 return ret;
351} 811}
352 812
353/** 813/**
@@ -388,10 +848,19 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
388 if (obj_priv->phys_obj) 848 if (obj_priv->phys_obj)
389 ret = i915_gem_phys_pwrite(dev, obj, args, file_priv); 849 ret = i915_gem_phys_pwrite(dev, obj, args, file_priv);
390 else if (obj_priv->tiling_mode == I915_TILING_NONE && 850 else if (obj_priv->tiling_mode == I915_TILING_NONE &&
391 dev->gtt_total != 0) 851 dev->gtt_total != 0) {
392 ret = i915_gem_gtt_pwrite(dev, obj, args, file_priv); 852 ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file_priv);
393 else 853 if (ret == -EFAULT) {
394 ret = i915_gem_shmem_pwrite(dev, obj, args, file_priv); 854 ret = i915_gem_gtt_pwrite_slow(dev, obj, args,
855 file_priv);
856 }
857 } else {
858 ret = i915_gem_shmem_pwrite_fast(dev, obj, args, file_priv);
859 if (ret == -EFAULT) {
860 ret = i915_gem_shmem_pwrite_slow(dev, obj, args,
861 file_priv);
862 }
863 }
395 864
396#if WATCH_PWRITE 865#if WATCH_PWRITE
397 if (ret) 866 if (ret)
@@ -603,6 +1072,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
603 case -EAGAIN: 1072 case -EAGAIN:
604 return VM_FAULT_OOM; 1073 return VM_FAULT_OOM;
605 case -EFAULT: 1074 case -EFAULT:
1075 case -EINVAL:
606 return VM_FAULT_SIGBUS; 1076 return VM_FAULT_SIGBUS;
607 default: 1077 default:
608 return VM_FAULT_NOPAGE; 1078 return VM_FAULT_NOPAGE;
@@ -627,7 +1097,7 @@ i915_gem_create_mmap_offset(struct drm_gem_object *obj)
627 struct drm_gem_mm *mm = dev->mm_private; 1097 struct drm_gem_mm *mm = dev->mm_private;
628 struct drm_i915_gem_object *obj_priv = obj->driver_private; 1098 struct drm_i915_gem_object *obj_priv = obj->driver_private;
629 struct drm_map_list *list; 1099 struct drm_map_list *list;
630 struct drm_map *map; 1100 struct drm_local_map *map;
631 int ret = 0; 1101 int ret = 0;
632 1102
633 /* Set the object up for mmap'ing */ 1103 /* Set the object up for mmap'ing */
@@ -816,29 +1286,30 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
816} 1286}
817 1287
818static void 1288static void
819i915_gem_object_free_page_list(struct drm_gem_object *obj) 1289i915_gem_object_put_pages(struct drm_gem_object *obj)
820{ 1290{
821 struct drm_i915_gem_object *obj_priv = obj->driver_private; 1291 struct drm_i915_gem_object *obj_priv = obj->driver_private;
822 int page_count = obj->size / PAGE_SIZE; 1292 int page_count = obj->size / PAGE_SIZE;
823 int i; 1293 int i;
824 1294
825 if (obj_priv->page_list == NULL) 1295 BUG_ON(obj_priv->pages_refcount == 0);
826 return;
827 1296
1297 if (--obj_priv->pages_refcount != 0)
1298 return;
828 1299
829 for (i = 0; i < page_count; i++) 1300 for (i = 0; i < page_count; i++)
830 if (obj_priv->page_list[i] != NULL) { 1301 if (obj_priv->pages[i] != NULL) {
831 if (obj_priv->dirty) 1302 if (obj_priv->dirty)
832 set_page_dirty(obj_priv->page_list[i]); 1303 set_page_dirty(obj_priv->pages[i]);
833 mark_page_accessed(obj_priv->page_list[i]); 1304 mark_page_accessed(obj_priv->pages[i]);
834 page_cache_release(obj_priv->page_list[i]); 1305 page_cache_release(obj_priv->pages[i]);
835 } 1306 }
836 obj_priv->dirty = 0; 1307 obj_priv->dirty = 0;
837 1308
838 drm_free(obj_priv->page_list, 1309 drm_free(obj_priv->pages,
839 page_count * sizeof(struct page *), 1310 page_count * sizeof(struct page *),
840 DRM_MEM_DRIVER); 1311 DRM_MEM_DRIVER);
841 obj_priv->page_list = NULL; 1312 obj_priv->pages = NULL;
842} 1313}
843 1314
844static void 1315static void
@@ -854,8 +1325,10 @@ i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno)
854 obj_priv->active = 1; 1325 obj_priv->active = 1;
855 } 1326 }
856 /* Move from whatever list we were on to the tail of execution. */ 1327 /* Move from whatever list we were on to the tail of execution. */
1328 spin_lock(&dev_priv->mm.active_list_lock);
857 list_move_tail(&obj_priv->list, 1329 list_move_tail(&obj_priv->list,
858 &dev_priv->mm.active_list); 1330 &dev_priv->mm.active_list);
1331 spin_unlock(&dev_priv->mm.active_list_lock);
859 obj_priv->last_rendering_seqno = seqno; 1332 obj_priv->last_rendering_seqno = seqno;
860} 1333}
861 1334
@@ -997,6 +1470,7 @@ i915_gem_retire_request(struct drm_device *dev,
997 /* Move any buffers on the active list that are no longer referenced 1470 /* Move any buffers on the active list that are no longer referenced
998 * by the ringbuffer to the flushing/inactive lists as appropriate. 1471 * by the ringbuffer to the flushing/inactive lists as appropriate.
999 */ 1472 */
1473 spin_lock(&dev_priv->mm.active_list_lock);
1000 while (!list_empty(&dev_priv->mm.active_list)) { 1474 while (!list_empty(&dev_priv->mm.active_list)) {
1001 struct drm_gem_object *obj; 1475 struct drm_gem_object *obj;
1002 struct drm_i915_gem_object *obj_priv; 1476 struct drm_i915_gem_object *obj_priv;
@@ -1011,7 +1485,7 @@ i915_gem_retire_request(struct drm_device *dev,
1011 * this seqno. 1485 * this seqno.
1012 */ 1486 */
1013 if (obj_priv->last_rendering_seqno != request->seqno) 1487 if (obj_priv->last_rendering_seqno != request->seqno)
1014 return; 1488 goto out;
1015 1489
1016#if WATCH_LRU 1490#if WATCH_LRU
1017 DRM_INFO("%s: retire %d moves to inactive list %p\n", 1491 DRM_INFO("%s: retire %d moves to inactive list %p\n",
@@ -1023,6 +1497,8 @@ i915_gem_retire_request(struct drm_device *dev,
1023 else 1497 else
1024 i915_gem_object_move_to_inactive(obj); 1498 i915_gem_object_move_to_inactive(obj);
1025 } 1499 }
1500out:
1501 spin_unlock(&dev_priv->mm.active_list_lock);
1026} 1502}
1027 1503
1028/** 1504/**
@@ -1290,7 +1766,7 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
1290 if (obj_priv->fence_reg != I915_FENCE_REG_NONE) 1766 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
1291 i915_gem_clear_fence_reg(obj); 1767 i915_gem_clear_fence_reg(obj);
1292 1768
1293 i915_gem_object_free_page_list(obj); 1769 i915_gem_object_put_pages(obj);
1294 1770
1295 if (obj_priv->gtt_space) { 1771 if (obj_priv->gtt_space) {
1296 atomic_dec(&dev->gtt_count); 1772 atomic_dec(&dev->gtt_count);
@@ -1409,7 +1885,7 @@ i915_gem_evict_everything(struct drm_device *dev)
1409} 1885}
1410 1886
1411static int 1887static int
1412i915_gem_object_get_page_list(struct drm_gem_object *obj) 1888i915_gem_object_get_pages(struct drm_gem_object *obj)
1413{ 1889{
1414 struct drm_i915_gem_object *obj_priv = obj->driver_private; 1890 struct drm_i915_gem_object *obj_priv = obj->driver_private;
1415 int page_count, i; 1891 int page_count, i;
@@ -1418,18 +1894,19 @@ i915_gem_object_get_page_list(struct drm_gem_object *obj)
1418 struct page *page; 1894 struct page *page;
1419 int ret; 1895 int ret;
1420 1896
1421 if (obj_priv->page_list) 1897 if (obj_priv->pages_refcount++ != 0)
1422 return 0; 1898 return 0;
1423 1899
1424 /* Get the list of pages out of our struct file. They'll be pinned 1900 /* Get the list of pages out of our struct file. They'll be pinned
1425 * at this point until we release them. 1901 * at this point until we release them.
1426 */ 1902 */
1427 page_count = obj->size / PAGE_SIZE; 1903 page_count = obj->size / PAGE_SIZE;
1428 BUG_ON(obj_priv->page_list != NULL); 1904 BUG_ON(obj_priv->pages != NULL);
1429 obj_priv->page_list = drm_calloc(page_count, sizeof(struct page *), 1905 obj_priv->pages = drm_calloc(page_count, sizeof(struct page *),
1430 DRM_MEM_DRIVER); 1906 DRM_MEM_DRIVER);
1431 if (obj_priv->page_list == NULL) { 1907 if (obj_priv->pages == NULL) {
1432 DRM_ERROR("Faled to allocate page list\n"); 1908 DRM_ERROR("Faled to allocate page list\n");
1909 obj_priv->pages_refcount--;
1433 return -ENOMEM; 1910 return -ENOMEM;
1434 } 1911 }
1435 1912
@@ -1440,10 +1917,10 @@ i915_gem_object_get_page_list(struct drm_gem_object *obj)
1440 if (IS_ERR(page)) { 1917 if (IS_ERR(page)) {
1441 ret = PTR_ERR(page); 1918 ret = PTR_ERR(page);
1442 DRM_ERROR("read_mapping_page failed: %d\n", ret); 1919 DRM_ERROR("read_mapping_page failed: %d\n", ret);
1443 i915_gem_object_free_page_list(obj); 1920 i915_gem_object_put_pages(obj);
1444 return ret; 1921 return ret;
1445 } 1922 }
1446 obj_priv->page_list[i] = page; 1923 obj_priv->pages[i] = page;
1447 } 1924 }
1448 return 0; 1925 return 0;
1449} 1926}
@@ -1519,20 +1996,23 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
1519 int regnum = obj_priv->fence_reg; 1996 int regnum = obj_priv->fence_reg;
1520 uint32_t val; 1997 uint32_t val;
1521 uint32_t pitch_val; 1998 uint32_t pitch_val;
1999 uint32_t fence_size_bits;
1522 2000
1523 if ((obj_priv->gtt_offset & ~I915_FENCE_START_MASK) || 2001 if ((obj_priv->gtt_offset & ~I830_FENCE_START_MASK) ||
1524 (obj_priv->gtt_offset & (obj->size - 1))) { 2002 (obj_priv->gtt_offset & (obj->size - 1))) {
1525 WARN(1, "%s: object 0x%08x not 1M or size aligned\n", 2003 WARN(1, "%s: object 0x%08x not 512K or size aligned\n",
1526 __func__, obj_priv->gtt_offset); 2004 __func__, obj_priv->gtt_offset);
1527 return; 2005 return;
1528 } 2006 }
1529 2007
1530 pitch_val = (obj_priv->stride / 128) - 1; 2008 pitch_val = (obj_priv->stride / 128) - 1;
1531 2009 WARN_ON(pitch_val & ~0x0000000f);
1532 val = obj_priv->gtt_offset; 2010 val = obj_priv->gtt_offset;
1533 if (obj_priv->tiling_mode == I915_TILING_Y) 2011 if (obj_priv->tiling_mode == I915_TILING_Y)
1534 val |= 1 << I830_FENCE_TILING_Y_SHIFT; 2012 val |= 1 << I830_FENCE_TILING_Y_SHIFT;
1535 val |= I830_FENCE_SIZE_BITS(obj->size); 2013 fence_size_bits = I830_FENCE_SIZE_BITS(obj->size);
2014 WARN_ON(fence_size_bits & ~0x00000f00);
2015 val |= fence_size_bits;
1536 val |= pitch_val << I830_FENCE_PITCH_SHIFT; 2016 val |= pitch_val << I830_FENCE_PITCH_SHIFT;
1537 val |= I830_FENCE_REG_VALID; 2017 val |= I830_FENCE_REG_VALID;
1538 2018
@@ -1723,7 +2203,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
1723 return -EBUSY; 2203 return -EBUSY;
1724 if (alignment == 0) 2204 if (alignment == 0)
1725 alignment = i915_gem_get_gtt_alignment(obj); 2205 alignment = i915_gem_get_gtt_alignment(obj);
1726 if (alignment & (PAGE_SIZE - 1)) { 2206 if (alignment & (i915_gem_get_gtt_alignment(obj) - 1)) {
1727 DRM_ERROR("Invalid object alignment requested %u\n", alignment); 2207 DRM_ERROR("Invalid object alignment requested %u\n", alignment);
1728 return -EINVAL; 2208 return -EINVAL;
1729 } 2209 }
@@ -1740,15 +2220,20 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
1740 } 2220 }
1741 } 2221 }
1742 if (obj_priv->gtt_space == NULL) { 2222 if (obj_priv->gtt_space == NULL) {
2223 bool lists_empty;
2224
1743 /* If the gtt is empty and we're still having trouble 2225 /* If the gtt is empty and we're still having trouble
1744 * fitting our object in, we're out of memory. 2226 * fitting our object in, we're out of memory.
1745 */ 2227 */
1746#if WATCH_LRU 2228#if WATCH_LRU
1747 DRM_INFO("%s: GTT full, evicting something\n", __func__); 2229 DRM_INFO("%s: GTT full, evicting something\n", __func__);
1748#endif 2230#endif
1749 if (list_empty(&dev_priv->mm.inactive_list) && 2231 spin_lock(&dev_priv->mm.active_list_lock);
1750 list_empty(&dev_priv->mm.flushing_list) && 2232 lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
1751 list_empty(&dev_priv->mm.active_list)) { 2233 list_empty(&dev_priv->mm.flushing_list) &&
2234 list_empty(&dev_priv->mm.active_list));
2235 spin_unlock(&dev_priv->mm.active_list_lock);
2236 if (lists_empty) {
1752 DRM_ERROR("GTT full, but LRU list empty\n"); 2237 DRM_ERROR("GTT full, but LRU list empty\n");
1753 return -ENOMEM; 2238 return -ENOMEM;
1754 } 2239 }
@@ -1766,7 +2251,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
1766 DRM_INFO("Binding object of size %d at 0x%08x\n", 2251 DRM_INFO("Binding object of size %d at 0x%08x\n",
1767 obj->size, obj_priv->gtt_offset); 2252 obj->size, obj_priv->gtt_offset);
1768#endif 2253#endif
1769 ret = i915_gem_object_get_page_list(obj); 2254 ret = i915_gem_object_get_pages(obj);
1770 if (ret) { 2255 if (ret) {
1771 drm_mm_put_block(obj_priv->gtt_space); 2256 drm_mm_put_block(obj_priv->gtt_space);
1772 obj_priv->gtt_space = NULL; 2257 obj_priv->gtt_space = NULL;
@@ -1778,12 +2263,12 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
1778 * into the GTT. 2263 * into the GTT.
1779 */ 2264 */
1780 obj_priv->agp_mem = drm_agp_bind_pages(dev, 2265 obj_priv->agp_mem = drm_agp_bind_pages(dev,
1781 obj_priv->page_list, 2266 obj_priv->pages,
1782 page_count, 2267 page_count,
1783 obj_priv->gtt_offset, 2268 obj_priv->gtt_offset,
1784 obj_priv->agp_type); 2269 obj_priv->agp_type);
1785 if (obj_priv->agp_mem == NULL) { 2270 if (obj_priv->agp_mem == NULL) {
1786 i915_gem_object_free_page_list(obj); 2271 i915_gem_object_put_pages(obj);
1787 drm_mm_put_block(obj_priv->gtt_space); 2272 drm_mm_put_block(obj_priv->gtt_space);
1788 obj_priv->gtt_space = NULL; 2273 obj_priv->gtt_space = NULL;
1789 return -ENOMEM; 2274 return -ENOMEM;
@@ -1810,10 +2295,10 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
1810 * to GPU, and we can ignore the cache flush because it'll happen 2295 * to GPU, and we can ignore the cache flush because it'll happen
1811 * again at bind time. 2296 * again at bind time.
1812 */ 2297 */
1813 if (obj_priv->page_list == NULL) 2298 if (obj_priv->pages == NULL)
1814 return; 2299 return;
1815 2300
1816 drm_clflush_pages(obj_priv->page_list, obj->size / PAGE_SIZE); 2301 drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE);
1817} 2302}
1818 2303
1819/** Flushes any GPU write domain for the object if it's dirty. */ 2304/** Flushes any GPU write domain for the object if it's dirty. */
@@ -1913,7 +2398,6 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
1913static int 2398static int
1914i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) 2399i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
1915{ 2400{
1916 struct drm_device *dev = obj->dev;
1917 int ret; 2401 int ret;
1918 2402
1919 i915_gem_object_flush_gpu_write_domain(obj); 2403 i915_gem_object_flush_gpu_write_domain(obj);
@@ -1932,7 +2416,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
1932 /* Flush the CPU cache if it's still invalid. */ 2416 /* Flush the CPU cache if it's still invalid. */
1933 if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) { 2417 if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) {
1934 i915_gem_clflush_object(obj); 2418 i915_gem_clflush_object(obj);
1935 drm_agp_chipset_flush(dev);
1936 2419
1937 obj->read_domains |= I915_GEM_DOMAIN_CPU; 2420 obj->read_domains |= I915_GEM_DOMAIN_CPU;
1938 } 2421 }
@@ -2144,7 +2627,6 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj)
2144static void 2627static void
2145i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) 2628i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj)
2146{ 2629{
2147 struct drm_device *dev = obj->dev;
2148 struct drm_i915_gem_object *obj_priv = obj->driver_private; 2630 struct drm_i915_gem_object *obj_priv = obj->driver_private;
2149 2631
2150 if (!obj_priv->page_cpu_valid) 2632 if (!obj_priv->page_cpu_valid)
@@ -2158,9 +2640,8 @@ i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj)
2158 for (i = 0; i <= (obj->size - 1) / PAGE_SIZE; i++) { 2640 for (i = 0; i <= (obj->size - 1) / PAGE_SIZE; i++) {
2159 if (obj_priv->page_cpu_valid[i]) 2641 if (obj_priv->page_cpu_valid[i])
2160 continue; 2642 continue;
2161 drm_clflush_pages(obj_priv->page_list + i, 1); 2643 drm_clflush_pages(obj_priv->pages + i, 1);
2162 } 2644 }
2163 drm_agp_chipset_flush(dev);
2164 } 2645 }
2165 2646
2166 /* Free the page_cpu_valid mappings which are now stale, whether 2647 /* Free the page_cpu_valid mappings which are now stale, whether
@@ -2224,7 +2705,7 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
2224 if (obj_priv->page_cpu_valid[i]) 2705 if (obj_priv->page_cpu_valid[i])
2225 continue; 2706 continue;
2226 2707
2227 drm_clflush_pages(obj_priv->page_list + i, 1); 2708 drm_clflush_pages(obj_priv->pages + i, 1);
2228 2709
2229 obj_priv->page_cpu_valid[i] = 1; 2710 obj_priv->page_cpu_valid[i] = 1;
2230 } 2711 }
@@ -2245,12 +2726,11 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
2245static int 2726static int
2246i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, 2727i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
2247 struct drm_file *file_priv, 2728 struct drm_file *file_priv,
2248 struct drm_i915_gem_exec_object *entry) 2729 struct drm_i915_gem_exec_object *entry,
2730 struct drm_i915_gem_relocation_entry *relocs)
2249{ 2731{
2250 struct drm_device *dev = obj->dev; 2732 struct drm_device *dev = obj->dev;
2251 drm_i915_private_t *dev_priv = dev->dev_private; 2733 drm_i915_private_t *dev_priv = dev->dev_private;
2252 struct drm_i915_gem_relocation_entry reloc;
2253 struct drm_i915_gem_relocation_entry __user *relocs;
2254 struct drm_i915_gem_object *obj_priv = obj->driver_private; 2734 struct drm_i915_gem_object *obj_priv = obj->driver_private;
2255 int i, ret; 2735 int i, ret;
2256 void __iomem *reloc_page; 2736 void __iomem *reloc_page;
@@ -2262,25 +2742,18 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
2262 2742
2263 entry->offset = obj_priv->gtt_offset; 2743 entry->offset = obj_priv->gtt_offset;
2264 2744
2265 relocs = (struct drm_i915_gem_relocation_entry __user *)
2266 (uintptr_t) entry->relocs_ptr;
2267 /* Apply the relocations, using the GTT aperture to avoid cache 2745 /* Apply the relocations, using the GTT aperture to avoid cache
2268 * flushing requirements. 2746 * flushing requirements.
2269 */ 2747 */
2270 for (i = 0; i < entry->relocation_count; i++) { 2748 for (i = 0; i < entry->relocation_count; i++) {
2749 struct drm_i915_gem_relocation_entry *reloc= &relocs[i];
2271 struct drm_gem_object *target_obj; 2750 struct drm_gem_object *target_obj;
2272 struct drm_i915_gem_object *target_obj_priv; 2751 struct drm_i915_gem_object *target_obj_priv;
2273 uint32_t reloc_val, reloc_offset; 2752 uint32_t reloc_val, reloc_offset;
2274 uint32_t __iomem *reloc_entry; 2753 uint32_t __iomem *reloc_entry;
2275 2754
2276 ret = copy_from_user(&reloc, relocs + i, sizeof(reloc));
2277 if (ret != 0) {
2278 i915_gem_object_unpin(obj);
2279 return ret;
2280 }
2281
2282 target_obj = drm_gem_object_lookup(obj->dev, file_priv, 2755 target_obj = drm_gem_object_lookup(obj->dev, file_priv,
2283 reloc.target_handle); 2756 reloc->target_handle);
2284 if (target_obj == NULL) { 2757 if (target_obj == NULL) {
2285 i915_gem_object_unpin(obj); 2758 i915_gem_object_unpin(obj);
2286 return -EBADF; 2759 return -EBADF;
@@ -2292,53 +2765,53 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
2292 */ 2765 */
2293 if (target_obj_priv->gtt_space == NULL) { 2766 if (target_obj_priv->gtt_space == NULL) {
2294 DRM_ERROR("No GTT space found for object %d\n", 2767 DRM_ERROR("No GTT space found for object %d\n",
2295 reloc.target_handle); 2768 reloc->target_handle);
2296 drm_gem_object_unreference(target_obj); 2769 drm_gem_object_unreference(target_obj);
2297 i915_gem_object_unpin(obj); 2770 i915_gem_object_unpin(obj);
2298 return -EINVAL; 2771 return -EINVAL;
2299 } 2772 }
2300 2773
2301 if (reloc.offset > obj->size - 4) { 2774 if (reloc->offset > obj->size - 4) {
2302 DRM_ERROR("Relocation beyond object bounds: " 2775 DRM_ERROR("Relocation beyond object bounds: "
2303 "obj %p target %d offset %d size %d.\n", 2776 "obj %p target %d offset %d size %d.\n",
2304 obj, reloc.target_handle, 2777 obj, reloc->target_handle,
2305 (int) reloc.offset, (int) obj->size); 2778 (int) reloc->offset, (int) obj->size);
2306 drm_gem_object_unreference(target_obj); 2779 drm_gem_object_unreference(target_obj);
2307 i915_gem_object_unpin(obj); 2780 i915_gem_object_unpin(obj);
2308 return -EINVAL; 2781 return -EINVAL;
2309 } 2782 }
2310 if (reloc.offset & 3) { 2783 if (reloc->offset & 3) {
2311 DRM_ERROR("Relocation not 4-byte aligned: " 2784 DRM_ERROR("Relocation not 4-byte aligned: "
2312 "obj %p target %d offset %d.\n", 2785 "obj %p target %d offset %d.\n",
2313 obj, reloc.target_handle, 2786 obj, reloc->target_handle,
2314 (int) reloc.offset); 2787 (int) reloc->offset);
2315 drm_gem_object_unreference(target_obj); 2788 drm_gem_object_unreference(target_obj);
2316 i915_gem_object_unpin(obj); 2789 i915_gem_object_unpin(obj);
2317 return -EINVAL; 2790 return -EINVAL;
2318 } 2791 }
2319 2792
2320 if (reloc.write_domain & I915_GEM_DOMAIN_CPU || 2793 if (reloc->write_domain & I915_GEM_DOMAIN_CPU ||
2321 reloc.read_domains & I915_GEM_DOMAIN_CPU) { 2794 reloc->read_domains & I915_GEM_DOMAIN_CPU) {
2322 DRM_ERROR("reloc with read/write CPU domains: " 2795 DRM_ERROR("reloc with read/write CPU domains: "
2323 "obj %p target %d offset %d " 2796 "obj %p target %d offset %d "
2324 "read %08x write %08x", 2797 "read %08x write %08x",
2325 obj, reloc.target_handle, 2798 obj, reloc->target_handle,
2326 (int) reloc.offset, 2799 (int) reloc->offset,
2327 reloc.read_domains, 2800 reloc->read_domains,
2328 reloc.write_domain); 2801 reloc->write_domain);
2329 drm_gem_object_unreference(target_obj); 2802 drm_gem_object_unreference(target_obj);
2330 i915_gem_object_unpin(obj); 2803 i915_gem_object_unpin(obj);
2331 return -EINVAL; 2804 return -EINVAL;
2332 } 2805 }
2333 2806
2334 if (reloc.write_domain && target_obj->pending_write_domain && 2807 if (reloc->write_domain && target_obj->pending_write_domain &&
2335 reloc.write_domain != target_obj->pending_write_domain) { 2808 reloc->write_domain != target_obj->pending_write_domain) {
2336 DRM_ERROR("Write domain conflict: " 2809 DRM_ERROR("Write domain conflict: "
2337 "obj %p target %d offset %d " 2810 "obj %p target %d offset %d "
2338 "new %08x old %08x\n", 2811 "new %08x old %08x\n",
2339 obj, reloc.target_handle, 2812 obj, reloc->target_handle,
2340 (int) reloc.offset, 2813 (int) reloc->offset,
2341 reloc.write_domain, 2814 reloc->write_domain,
2342 target_obj->pending_write_domain); 2815 target_obj->pending_write_domain);
2343 drm_gem_object_unreference(target_obj); 2816 drm_gem_object_unreference(target_obj);
2344 i915_gem_object_unpin(obj); 2817 i915_gem_object_unpin(obj);
@@ -2351,22 +2824,22 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
2351 "presumed %08x delta %08x\n", 2824 "presumed %08x delta %08x\n",
2352 __func__, 2825 __func__,
2353 obj, 2826 obj,
2354 (int) reloc.offset, 2827 (int) reloc->offset,
2355 (int) reloc.target_handle, 2828 (int) reloc->target_handle,
2356 (int) reloc.read_domains, 2829 (int) reloc->read_domains,
2357 (int) reloc.write_domain, 2830 (int) reloc->write_domain,
2358 (int) target_obj_priv->gtt_offset, 2831 (int) target_obj_priv->gtt_offset,
2359 (int) reloc.presumed_offset, 2832 (int) reloc->presumed_offset,
2360 reloc.delta); 2833 reloc->delta);
2361#endif 2834#endif
2362 2835
2363 target_obj->pending_read_domains |= reloc.read_domains; 2836 target_obj->pending_read_domains |= reloc->read_domains;
2364 target_obj->pending_write_domain |= reloc.write_domain; 2837 target_obj->pending_write_domain |= reloc->write_domain;
2365 2838
2366 /* If the relocation already has the right value in it, no 2839 /* If the relocation already has the right value in it, no
2367 * more work needs to be done. 2840 * more work needs to be done.
2368 */ 2841 */
2369 if (target_obj_priv->gtt_offset == reloc.presumed_offset) { 2842 if (target_obj_priv->gtt_offset == reloc->presumed_offset) {
2370 drm_gem_object_unreference(target_obj); 2843 drm_gem_object_unreference(target_obj);
2371 continue; 2844 continue;
2372 } 2845 }
@@ -2381,32 +2854,26 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
2381 /* Map the page containing the relocation we're going to 2854 /* Map the page containing the relocation we're going to
2382 * perform. 2855 * perform.
2383 */ 2856 */
2384 reloc_offset = obj_priv->gtt_offset + reloc.offset; 2857 reloc_offset = obj_priv->gtt_offset + reloc->offset;
2385 reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, 2858 reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
2386 (reloc_offset & 2859 (reloc_offset &
2387 ~(PAGE_SIZE - 1))); 2860 ~(PAGE_SIZE - 1)));
2388 reloc_entry = (uint32_t __iomem *)(reloc_page + 2861 reloc_entry = (uint32_t __iomem *)(reloc_page +
2389 (reloc_offset & (PAGE_SIZE - 1))); 2862 (reloc_offset & (PAGE_SIZE - 1)));
2390 reloc_val = target_obj_priv->gtt_offset + reloc.delta; 2863 reloc_val = target_obj_priv->gtt_offset + reloc->delta;
2391 2864
2392#if WATCH_BUF 2865#if WATCH_BUF
2393 DRM_INFO("Applied relocation: %p@0x%08x %08x -> %08x\n", 2866 DRM_INFO("Applied relocation: %p@0x%08x %08x -> %08x\n",
2394 obj, (unsigned int) reloc.offset, 2867 obj, (unsigned int) reloc->offset,
2395 readl(reloc_entry), reloc_val); 2868 readl(reloc_entry), reloc_val);
2396#endif 2869#endif
2397 writel(reloc_val, reloc_entry); 2870 writel(reloc_val, reloc_entry);
2398 io_mapping_unmap_atomic(reloc_page); 2871 io_mapping_unmap_atomic(reloc_page);
2399 2872
2400 /* Write the updated presumed offset for this entry back out 2873 /* The updated presumed offset for this entry will be
2401 * to the user. 2874 * copied back out to the user.
2402 */ 2875 */
2403 reloc.presumed_offset = target_obj_priv->gtt_offset; 2876 reloc->presumed_offset = target_obj_priv->gtt_offset;
2404 ret = copy_to_user(relocs + i, &reloc, sizeof(reloc));
2405 if (ret != 0) {
2406 drm_gem_object_unreference(target_obj);
2407 i915_gem_object_unpin(obj);
2408 return ret;
2409 }
2410 2877
2411 drm_gem_object_unreference(target_obj); 2878 drm_gem_object_unreference(target_obj);
2412 } 2879 }
@@ -2423,11 +2890,10 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
2423static int 2890static int
2424i915_dispatch_gem_execbuffer(struct drm_device *dev, 2891i915_dispatch_gem_execbuffer(struct drm_device *dev,
2425 struct drm_i915_gem_execbuffer *exec, 2892 struct drm_i915_gem_execbuffer *exec,
2893 struct drm_clip_rect *cliprects,
2426 uint64_t exec_offset) 2894 uint64_t exec_offset)
2427{ 2895{
2428 drm_i915_private_t *dev_priv = dev->dev_private; 2896 drm_i915_private_t *dev_priv = dev->dev_private;
2429 struct drm_clip_rect __user *boxes = (struct drm_clip_rect __user *)
2430 (uintptr_t) exec->cliprects_ptr;
2431 int nbox = exec->num_cliprects; 2897 int nbox = exec->num_cliprects;
2432 int i = 0, count; 2898 int i = 0, count;
2433 uint32_t exec_start, exec_len; 2899 uint32_t exec_start, exec_len;
@@ -2448,7 +2914,7 @@ i915_dispatch_gem_execbuffer(struct drm_device *dev,
2448 2914
2449 for (i = 0; i < count; i++) { 2915 for (i = 0; i < count; i++) {
2450 if (i < nbox) { 2916 if (i < nbox) {
2451 int ret = i915_emit_box(dev, boxes, i, 2917 int ret = i915_emit_box(dev, cliprects, i,
2452 exec->DR1, exec->DR4); 2918 exec->DR1, exec->DR4);
2453 if (ret) 2919 if (ret)
2454 return ret; 2920 return ret;
@@ -2504,6 +2970,75 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file_priv)
2504 return ret; 2970 return ret;
2505} 2971}
2506 2972
2973static int
2974i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
2975 uint32_t buffer_count,
2976 struct drm_i915_gem_relocation_entry **relocs)
2977{
2978 uint32_t reloc_count = 0, reloc_index = 0, i;
2979 int ret;
2980
2981 *relocs = NULL;
2982 for (i = 0; i < buffer_count; i++) {
2983 if (reloc_count + exec_list[i].relocation_count < reloc_count)
2984 return -EINVAL;
2985 reloc_count += exec_list[i].relocation_count;
2986 }
2987
2988 *relocs = drm_calloc(reloc_count, sizeof(**relocs), DRM_MEM_DRIVER);
2989 if (*relocs == NULL)
2990 return -ENOMEM;
2991
2992 for (i = 0; i < buffer_count; i++) {
2993 struct drm_i915_gem_relocation_entry __user *user_relocs;
2994
2995 user_relocs = (void __user *)(uintptr_t)exec_list[i].relocs_ptr;
2996
2997 ret = copy_from_user(&(*relocs)[reloc_index],
2998 user_relocs,
2999 exec_list[i].relocation_count *
3000 sizeof(**relocs));
3001 if (ret != 0) {
3002 drm_free(*relocs, reloc_count * sizeof(**relocs),
3003 DRM_MEM_DRIVER);
3004 *relocs = NULL;
3005 return ret;
3006 }
3007
3008 reloc_index += exec_list[i].relocation_count;
3009 }
3010
3011 return ret;
3012}
3013
3014static int
3015i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list,
3016 uint32_t buffer_count,
3017 struct drm_i915_gem_relocation_entry *relocs)
3018{
3019 uint32_t reloc_count = 0, i;
3020 int ret;
3021
3022 for (i = 0; i < buffer_count; i++) {
3023 struct drm_i915_gem_relocation_entry __user *user_relocs;
3024
3025 user_relocs = (void __user *)(uintptr_t)exec_list[i].relocs_ptr;
3026
3027 if (ret == 0) {
3028 ret = copy_to_user(user_relocs,
3029 &relocs[reloc_count],
3030 exec_list[i].relocation_count *
3031 sizeof(*relocs));
3032 }
3033
3034 reloc_count += exec_list[i].relocation_count;
3035 }
3036
3037 drm_free(relocs, reloc_count * sizeof(*relocs), DRM_MEM_DRIVER);
3038
3039 return ret;
3040}
3041
2507int 3042int
2508i915_gem_execbuffer(struct drm_device *dev, void *data, 3043i915_gem_execbuffer(struct drm_device *dev, void *data,
2509 struct drm_file *file_priv) 3044 struct drm_file *file_priv)
@@ -2515,9 +3050,11 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
2515 struct drm_gem_object **object_list = NULL; 3050 struct drm_gem_object **object_list = NULL;
2516 struct drm_gem_object *batch_obj; 3051 struct drm_gem_object *batch_obj;
2517 struct drm_i915_gem_object *obj_priv; 3052 struct drm_i915_gem_object *obj_priv;
2518 int ret, i, pinned = 0; 3053 struct drm_clip_rect *cliprects = NULL;
3054 struct drm_i915_gem_relocation_entry *relocs;
3055 int ret, ret2, i, pinned = 0;
2519 uint64_t exec_offset; 3056 uint64_t exec_offset;
2520 uint32_t seqno, flush_domains; 3057 uint32_t seqno, flush_domains, reloc_index;
2521 int pin_tries; 3058 int pin_tries;
2522 3059
2523#if WATCH_EXEC 3060#if WATCH_EXEC
@@ -2551,6 +3088,28 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
2551 goto pre_mutex_err; 3088 goto pre_mutex_err;
2552 } 3089 }
2553 3090
3091 if (args->num_cliprects != 0) {
3092 cliprects = drm_calloc(args->num_cliprects, sizeof(*cliprects),
3093 DRM_MEM_DRIVER);
3094 if (cliprects == NULL)
3095 goto pre_mutex_err;
3096
3097 ret = copy_from_user(cliprects,
3098 (struct drm_clip_rect __user *)
3099 (uintptr_t) args->cliprects_ptr,
3100 sizeof(*cliprects) * args->num_cliprects);
3101 if (ret != 0) {
3102 DRM_ERROR("copy %d cliprects failed: %d\n",
3103 args->num_cliprects, ret);
3104 goto pre_mutex_err;
3105 }
3106 }
3107
3108 ret = i915_gem_get_relocs_from_user(exec_list, args->buffer_count,
3109 &relocs);
3110 if (ret != 0)
3111 goto pre_mutex_err;
3112
2554 mutex_lock(&dev->struct_mutex); 3113 mutex_lock(&dev->struct_mutex);
2555 3114
2556 i915_verify_inactive(dev, __FILE__, __LINE__); 3115 i915_verify_inactive(dev, __FILE__, __LINE__);
@@ -2593,15 +3152,19 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
2593 /* Pin and relocate */ 3152 /* Pin and relocate */
2594 for (pin_tries = 0; ; pin_tries++) { 3153 for (pin_tries = 0; ; pin_tries++) {
2595 ret = 0; 3154 ret = 0;
3155 reloc_index = 0;
3156
2596 for (i = 0; i < args->buffer_count; i++) { 3157 for (i = 0; i < args->buffer_count; i++) {
2597 object_list[i]->pending_read_domains = 0; 3158 object_list[i]->pending_read_domains = 0;
2598 object_list[i]->pending_write_domain = 0; 3159 object_list[i]->pending_write_domain = 0;
2599 ret = i915_gem_object_pin_and_relocate(object_list[i], 3160 ret = i915_gem_object_pin_and_relocate(object_list[i],
2600 file_priv, 3161 file_priv,
2601 &exec_list[i]); 3162 &exec_list[i],
3163 &relocs[reloc_index]);
2602 if (ret) 3164 if (ret)
2603 break; 3165 break;
2604 pinned = i + 1; 3166 pinned = i + 1;
3167 reloc_index += exec_list[i].relocation_count;
2605 } 3168 }
2606 /* success */ 3169 /* success */
2607 if (ret == 0) 3170 if (ret == 0)
@@ -2687,7 +3250,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
2687#endif 3250#endif
2688 3251
2689 /* Exec the batchbuffer */ 3252 /* Exec the batchbuffer */
2690 ret = i915_dispatch_gem_execbuffer(dev, args, exec_offset); 3253 ret = i915_dispatch_gem_execbuffer(dev, args, cliprects, exec_offset);
2691 if (ret) { 3254 if (ret) {
2692 DRM_ERROR("dispatch failed %d\n", ret); 3255 DRM_ERROR("dispatch failed %d\n", ret);
2693 goto err; 3256 goto err;
@@ -2751,11 +3314,27 @@ err:
2751 args->buffer_count, ret); 3314 args->buffer_count, ret);
2752 } 3315 }
2753 3316
3317 /* Copy the updated relocations out regardless of current error
3318 * state. Failure to update the relocs would mean that the next
3319 * time userland calls execbuf, it would do so with presumed offset
3320 * state that didn't match the actual object state.
3321 */
3322 ret2 = i915_gem_put_relocs_to_user(exec_list, args->buffer_count,
3323 relocs);
3324 if (ret2 != 0) {
3325 DRM_ERROR("Failed to copy relocations back out: %d\n", ret2);
3326
3327 if (ret == 0)
3328 ret = ret2;
3329 }
3330
2754pre_mutex_err: 3331pre_mutex_err:
2755 drm_free(object_list, sizeof(*object_list) * args->buffer_count, 3332 drm_free(object_list, sizeof(*object_list) * args->buffer_count,
2756 DRM_MEM_DRIVER); 3333 DRM_MEM_DRIVER);
2757 drm_free(exec_list, sizeof(*exec_list) * args->buffer_count, 3334 drm_free(exec_list, sizeof(*exec_list) * args->buffer_count,
2758 DRM_MEM_DRIVER); 3335 DRM_MEM_DRIVER);
3336 drm_free(cliprects, sizeof(*cliprects) * args->num_cliprects,
3337 DRM_MEM_DRIVER);
2759 3338
2760 return ret; 3339 return ret;
2761} 3340}
@@ -3110,6 +3689,7 @@ i915_gem_idle(struct drm_device *dev)
3110 3689
3111 i915_gem_retire_requests(dev); 3690 i915_gem_retire_requests(dev);
3112 3691
3692 spin_lock(&dev_priv->mm.active_list_lock);
3113 if (!dev_priv->mm.wedged) { 3693 if (!dev_priv->mm.wedged) {
3114 /* Active and flushing should now be empty as we've 3694 /* Active and flushing should now be empty as we've
3115 * waited for a sequence higher than any pending execbuffer 3695 * waited for a sequence higher than any pending execbuffer
@@ -3136,6 +3716,7 @@ i915_gem_idle(struct drm_device *dev)
3136 obj_priv->obj->write_domain &= ~I915_GEM_GPU_DOMAINS; 3716 obj_priv->obj->write_domain &= ~I915_GEM_GPU_DOMAINS;
3137 i915_gem_object_move_to_inactive(obj_priv->obj); 3717 i915_gem_object_move_to_inactive(obj_priv->obj);
3138 } 3718 }
3719 spin_unlock(&dev_priv->mm.active_list_lock);
3139 3720
3140 while (!list_empty(&dev_priv->mm.flushing_list)) { 3721 while (!list_empty(&dev_priv->mm.flushing_list)) {
3141 struct drm_i915_gem_object *obj_priv; 3722 struct drm_i915_gem_object *obj_priv;
@@ -3192,7 +3773,7 @@ i915_gem_init_hws(struct drm_device *dev)
3192 3773
3193 dev_priv->status_gfx_addr = obj_priv->gtt_offset; 3774 dev_priv->status_gfx_addr = obj_priv->gtt_offset;
3194 3775
3195 dev_priv->hw_status_page = kmap(obj_priv->page_list[0]); 3776 dev_priv->hw_status_page = kmap(obj_priv->pages[0]);
3196 if (dev_priv->hw_status_page == NULL) { 3777 if (dev_priv->hw_status_page == NULL) {
3197 DRM_ERROR("Failed to map status page.\n"); 3778 DRM_ERROR("Failed to map status page.\n");
3198 memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map)); 3779 memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
@@ -3222,7 +3803,7 @@ i915_gem_cleanup_hws(struct drm_device *dev)
3222 obj = dev_priv->hws_obj; 3803 obj = dev_priv->hws_obj;
3223 obj_priv = obj->driver_private; 3804 obj_priv = obj->driver_private;
3224 3805
3225 kunmap(obj_priv->page_list[0]); 3806 kunmap(obj_priv->pages[0]);
3226 i915_gem_object_unpin(obj); 3807 i915_gem_object_unpin(obj);
3227 drm_gem_object_unreference(obj); 3808 drm_gem_object_unreference(obj);
3228 dev_priv->hws_obj = NULL; 3809 dev_priv->hws_obj = NULL;
@@ -3384,7 +3965,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
3384 if (ret != 0) 3965 if (ret != 0)
3385 return ret; 3966 return ret;
3386 3967
3968 spin_lock(&dev_priv->mm.active_list_lock);
3387 BUG_ON(!list_empty(&dev_priv->mm.active_list)); 3969 BUG_ON(!list_empty(&dev_priv->mm.active_list));
3970 spin_unlock(&dev_priv->mm.active_list_lock);
3971
3388 BUG_ON(!list_empty(&dev_priv->mm.flushing_list)); 3972 BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
3389 BUG_ON(!list_empty(&dev_priv->mm.inactive_list)); 3973 BUG_ON(!list_empty(&dev_priv->mm.inactive_list));
3390 BUG_ON(!list_empty(&dev_priv->mm.request_list)); 3974 BUG_ON(!list_empty(&dev_priv->mm.request_list));
@@ -3428,6 +4012,7 @@ i915_gem_load(struct drm_device *dev)
3428{ 4012{
3429 drm_i915_private_t *dev_priv = dev->dev_private; 4013 drm_i915_private_t *dev_priv = dev->dev_private;
3430 4014
4015 spin_lock_init(&dev_priv->mm.active_list_lock);
3431 INIT_LIST_HEAD(&dev_priv->mm.active_list); 4016 INIT_LIST_HEAD(&dev_priv->mm.active_list);
3432 INIT_LIST_HEAD(&dev_priv->mm.flushing_list); 4017 INIT_LIST_HEAD(&dev_priv->mm.flushing_list);
3433 INIT_LIST_HEAD(&dev_priv->mm.inactive_list); 4018 INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
@@ -3525,20 +4110,20 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
3525 if (!obj_priv->phys_obj) 4110 if (!obj_priv->phys_obj)
3526 return; 4111 return;
3527 4112
3528 ret = i915_gem_object_get_page_list(obj); 4113 ret = i915_gem_object_get_pages(obj);
3529 if (ret) 4114 if (ret)
3530 goto out; 4115 goto out;
3531 4116
3532 page_count = obj->size / PAGE_SIZE; 4117 page_count = obj->size / PAGE_SIZE;
3533 4118
3534 for (i = 0; i < page_count; i++) { 4119 for (i = 0; i < page_count; i++) {
3535 char *dst = kmap_atomic(obj_priv->page_list[i], KM_USER0); 4120 char *dst = kmap_atomic(obj_priv->pages[i], KM_USER0);
3536 char *src = obj_priv->phys_obj->handle->vaddr + (i * PAGE_SIZE); 4121 char *src = obj_priv->phys_obj->handle->vaddr + (i * PAGE_SIZE);
3537 4122
3538 memcpy(dst, src, PAGE_SIZE); 4123 memcpy(dst, src, PAGE_SIZE);
3539 kunmap_atomic(dst, KM_USER0); 4124 kunmap_atomic(dst, KM_USER0);
3540 } 4125 }
3541 drm_clflush_pages(obj_priv->page_list, page_count); 4126 drm_clflush_pages(obj_priv->pages, page_count);
3542 drm_agp_chipset_flush(dev); 4127 drm_agp_chipset_flush(dev);
3543out: 4128out:
3544 obj_priv->phys_obj->cur_obj = NULL; 4129 obj_priv->phys_obj->cur_obj = NULL;
@@ -3581,7 +4166,7 @@ i915_gem_attach_phys_object(struct drm_device *dev,
3581 obj_priv->phys_obj = dev_priv->mm.phys_objs[id - 1]; 4166 obj_priv->phys_obj = dev_priv->mm.phys_objs[id - 1];
3582 obj_priv->phys_obj->cur_obj = obj; 4167 obj_priv->phys_obj->cur_obj = obj;
3583 4168
3584 ret = i915_gem_object_get_page_list(obj); 4169 ret = i915_gem_object_get_pages(obj);
3585 if (ret) { 4170 if (ret) {
3586 DRM_ERROR("failed to get page list\n"); 4171 DRM_ERROR("failed to get page list\n");
3587 goto out; 4172 goto out;
@@ -3590,7 +4175,7 @@ i915_gem_attach_phys_object(struct drm_device *dev,
3590 page_count = obj->size / PAGE_SIZE; 4175 page_count = obj->size / PAGE_SIZE;
3591 4176
3592 for (i = 0; i < page_count; i++) { 4177 for (i = 0; i < page_count; i++) {
3593 char *src = kmap_atomic(obj_priv->page_list[i], KM_USER0); 4178 char *src = kmap_atomic(obj_priv->pages[i], KM_USER0);
3594 char *dst = obj_priv->phys_obj->handle->vaddr + (i * PAGE_SIZE); 4179 char *dst = obj_priv->phys_obj->handle->vaddr + (i * PAGE_SIZE);
3595 4180
3596 memcpy(dst, src, PAGE_SIZE); 4181 memcpy(dst, src, PAGE_SIZE);
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
index 131c088f8c8..8d0b943e2c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_debug.c
+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
@@ -105,12 +105,14 @@ i915_dump_lru(struct drm_device *dev, const char *where)
105 struct drm_i915_gem_object *obj_priv; 105 struct drm_i915_gem_object *obj_priv;
106 106
107 DRM_INFO("active list %s {\n", where); 107 DRM_INFO("active list %s {\n", where);
108 spin_lock(&dev_priv->mm.active_list_lock);
108 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, 109 list_for_each_entry(obj_priv, &dev_priv->mm.active_list,
109 list) 110 list)
110 { 111 {
111 DRM_INFO(" %p: %08x\n", obj_priv, 112 DRM_INFO(" %p: %08x\n", obj_priv,
112 obj_priv->last_rendering_seqno); 113 obj_priv->last_rendering_seqno);
113 } 114 }
115 spin_unlock(&dev_priv->mm.active_list_lock);
114 DRM_INFO("}\n"); 116 DRM_INFO("}\n");
115 DRM_INFO("flushing list %s {\n", where); 117 DRM_INFO("flushing list %s {\n", where);
116 list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list, 118 list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list,
diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_gem_debugfs.c
new file mode 100644
index 00000000000..a1ac0c5e730
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gem_debugfs.c
@@ -0,0 +1,263 @@
1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
30#include "drmP.h"
31#include "drm.h"
32#include "i915_drm.h"
33#include "i915_drv.h"
34
35#define DRM_I915_RING_DEBUG 1
36
37
38#if defined(CONFIG_DEBUG_FS)
39
40#define ACTIVE_LIST 1
41#define FLUSHING_LIST 2
42#define INACTIVE_LIST 3
43
44static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
45{
46 if (obj_priv->user_pin_count > 0)
47 return "P";
48 else if (obj_priv->pin_count > 0)
49 return "p";
50 else
51 return " ";
52}
53
54static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
55{
56 switch (obj_priv->tiling_mode) {
57 default:
58 case I915_TILING_NONE: return " ";
59 case I915_TILING_X: return "X";
60 case I915_TILING_Y: return "Y";
61 }
62}
63
64static int i915_gem_object_list_info(struct seq_file *m, void *data)
65{
66 struct drm_info_node *node = (struct drm_info_node *) m->private;
67 uintptr_t list = (uintptr_t) node->info_ent->data;
68 struct list_head *head;
69 struct drm_device *dev = node->minor->dev;
70 drm_i915_private_t *dev_priv = dev->dev_private;
71 struct drm_i915_gem_object *obj_priv;
72 spinlock_t *lock = NULL;
73
74 switch (list) {
75 case ACTIVE_LIST:
76 seq_printf(m, "Active:\n");
77 lock = &dev_priv->mm.active_list_lock;
78 spin_lock(lock);
79 head = &dev_priv->mm.active_list;
80 break;
81 case INACTIVE_LIST:
82 seq_printf(m, "Inctive:\n");
83 head = &dev_priv->mm.inactive_list;
84 break;
85 case FLUSHING_LIST:
86 seq_printf(m, "Flushing:\n");
87 head = &dev_priv->mm.flushing_list;
88 break;
89 default:
90 DRM_INFO("Ooops, unexpected list\n");
91 return 0;
92 }
93
94 list_for_each_entry(obj_priv, head, list)
95 {
96 struct drm_gem_object *obj = obj_priv->obj;
97
98 seq_printf(m, " %p: %s %08x %08x %d",
99 obj,
100 get_pin_flag(obj_priv),
101 obj->read_domains, obj->write_domain,
102 obj_priv->last_rendering_seqno);
103
104 if (obj->name)
105 seq_printf(m, " (name: %d)", obj->name);
106 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
107 seq_printf(m, " (fence: %d\n", obj_priv->fence_reg);
108 seq_printf(m, "\n");
109 }
110
111 if (lock)
112 spin_unlock(lock);
113 return 0;
114}
115
116static int i915_gem_request_info(struct seq_file *m, void *data)
117{
118 struct drm_info_node *node = (struct drm_info_node *) m->private;
119 struct drm_device *dev = node->minor->dev;
120 drm_i915_private_t *dev_priv = dev->dev_private;
121 struct drm_i915_gem_request *gem_request;
122
123 seq_printf(m, "Request:\n");
124 list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) {
125 seq_printf(m, " %d @ %d\n",
126 gem_request->seqno,
127 (int) (jiffies - gem_request->emitted_jiffies));
128 }
129 return 0;
130}
131
132static int i915_gem_seqno_info(struct seq_file *m, void *data)
133{
134 struct drm_info_node *node = (struct drm_info_node *) m->private;
135 struct drm_device *dev = node->minor->dev;
136 drm_i915_private_t *dev_priv = dev->dev_private;
137
138 if (dev_priv->hw_status_page != NULL) {
139 seq_printf(m, "Current sequence: %d\n",
140 i915_get_gem_seqno(dev));
141 } else {
142 seq_printf(m, "Current sequence: hws uninitialized\n");
143 }
144 seq_printf(m, "Waiter sequence: %d\n",
145 dev_priv->mm.waiting_gem_seqno);
146 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
147 return 0;
148}
149
150
151static int i915_interrupt_info(struct seq_file *m, void *data)
152{
153 struct drm_info_node *node = (struct drm_info_node *) m->private;
154 struct drm_device *dev = node->minor->dev;
155 drm_i915_private_t *dev_priv = dev->dev_private;
156
157 seq_printf(m, "Interrupt enable: %08x\n",
158 I915_READ(IER));
159 seq_printf(m, "Interrupt identity: %08x\n",
160 I915_READ(IIR));
161 seq_printf(m, "Interrupt mask: %08x\n",
162 I915_READ(IMR));
163 seq_printf(m, "Pipe A stat: %08x\n",
164 I915_READ(PIPEASTAT));
165 seq_printf(m, "Pipe B stat: %08x\n",
166 I915_READ(PIPEBSTAT));
167 seq_printf(m, "Interrupts received: %d\n",
168 atomic_read(&dev_priv->irq_received));
169 if (dev_priv->hw_status_page != NULL) {
170 seq_printf(m, "Current sequence: %d\n",
171 i915_get_gem_seqno(dev));
172 } else {
173 seq_printf(m, "Current sequence: hws uninitialized\n");
174 }
175 seq_printf(m, "Waiter sequence: %d\n",
176 dev_priv->mm.waiting_gem_seqno);
177 seq_printf(m, "IRQ sequence: %d\n",
178 dev_priv->mm.irq_gem_seqno);
179 return 0;
180}
181
182static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
183{
184 struct drm_info_node *node = (struct drm_info_node *) m->private;
185 struct drm_device *dev = node->minor->dev;
186 drm_i915_private_t *dev_priv = dev->dev_private;
187 int i;
188
189 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
190 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
191 for (i = 0; i < dev_priv->num_fence_regs; i++) {
192 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
193
194 if (obj == NULL) {
195 seq_printf(m, "Fenced object[%2d] = unused\n", i);
196 } else {
197 struct drm_i915_gem_object *obj_priv;
198
199 obj_priv = obj->driver_private;
200 seq_printf(m, "Fenced object[%2d] = %p: %s "
201 "%08x %08zx %08x %s %08x %08x %d",
202 i, obj, get_pin_flag(obj_priv),
203 obj_priv->gtt_offset,
204 obj->size, obj_priv->stride,
205 get_tiling_flag(obj_priv),
206 obj->read_domains, obj->write_domain,
207 obj_priv->last_rendering_seqno);
208 if (obj->name)
209 seq_printf(m, " (name: %d)", obj->name);
210 seq_printf(m, "\n");
211 }
212 }
213
214 return 0;
215}
216
217static int i915_hws_info(struct seq_file *m, void *data)
218{
219 struct drm_info_node *node = (struct drm_info_node *) m->private;
220 struct drm_device *dev = node->minor->dev;
221 drm_i915_private_t *dev_priv = dev->dev_private;
222 int i;
223 volatile u32 *hws;
224
225 hws = (volatile u32 *)dev_priv->hw_status_page;
226 if (hws == NULL)
227 return 0;
228
229 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
230 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
231 i * 4,
232 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
233 }
234 return 0;
235}
236
237static struct drm_info_list i915_gem_debugfs_list[] = {
238 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
239 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
240 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
241 {"i915_gem_request", i915_gem_request_info, 0},
242 {"i915_gem_seqno", i915_gem_seqno_info, 0},
243 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
244 {"i915_gem_interrupt", i915_interrupt_info, 0},
245 {"i915_gem_hws", i915_hws_info, 0},
246};
247#define I915_GEM_DEBUGFS_ENTRIES ARRAY_SIZE(i915_gem_debugfs_list)
248
249int i915_gem_debugfs_init(struct drm_minor *minor)
250{
251 return drm_debugfs_create_files(i915_gem_debugfs_list,
252 I915_GEM_DEBUGFS_ENTRIES,
253 minor->debugfs_root, minor);
254}
255
256void i915_gem_debugfs_cleanup(struct drm_minor *minor)
257{
258 drm_debugfs_remove_files(i915_gem_debugfs_list,
259 I915_GEM_DEBUGFS_ENTRIES, minor);
260}
261
262#endif /* CONFIG_DEBUG_FS */
263
diff --git a/drivers/gpu/drm/i915/i915_gem_proc.c b/drivers/gpu/drm/i915/i915_gem_proc.c
deleted file mode 100644
index 4d1b9de0cd8..00000000000
--- a/drivers/gpu/drm/i915/i915_gem_proc.c
+++ /dev/null
@@ -1,334 +0,0 @@
1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include "drmP.h"
30#include "drm.h"
31#include "i915_drm.h"
32#include "i915_drv.h"
33
34static int i915_gem_active_info(char *buf, char **start, off_t offset,
35 int request, int *eof, void *data)
36{
37 struct drm_minor *minor = (struct drm_minor *) data;
38 struct drm_device *dev = minor->dev;
39 drm_i915_private_t *dev_priv = dev->dev_private;
40 struct drm_i915_gem_object *obj_priv;
41 int len = 0;
42
43 if (offset > DRM_PROC_LIMIT) {
44 *eof = 1;
45 return 0;
46 }
47
48 *start = &buf[offset];
49 *eof = 0;
50 DRM_PROC_PRINT("Active:\n");
51 list_for_each_entry(obj_priv, &dev_priv->mm.active_list,
52 list)
53 {
54 struct drm_gem_object *obj = obj_priv->obj;
55 if (obj->name) {
56 DRM_PROC_PRINT(" %p(%d): %08x %08x %d\n",
57 obj, obj->name,
58 obj->read_domains, obj->write_domain,
59 obj_priv->last_rendering_seqno);
60 } else {
61 DRM_PROC_PRINT(" %p: %08x %08x %d\n",
62 obj,
63 obj->read_domains, obj->write_domain,
64 obj_priv->last_rendering_seqno);
65 }
66 }
67 if (len > request + offset)
68 return request;
69 *eof = 1;
70 return len - offset;
71}
72
73static int i915_gem_flushing_info(char *buf, char **start, off_t offset,
74 int request, int *eof, void *data)
75{
76 struct drm_minor *minor = (struct drm_minor *) data;
77 struct drm_device *dev = minor->dev;
78 drm_i915_private_t *dev_priv = dev->dev_private;
79 struct drm_i915_gem_object *obj_priv;
80 int len = 0;
81
82 if (offset > DRM_PROC_LIMIT) {
83 *eof = 1;
84 return 0;
85 }
86
87 *start = &buf[offset];
88 *eof = 0;
89 DRM_PROC_PRINT("Flushing:\n");
90 list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list,
91 list)
92 {
93 struct drm_gem_object *obj = obj_priv->obj;
94 if (obj->name) {
95 DRM_PROC_PRINT(" %p(%d): %08x %08x %d\n",
96 obj, obj->name,
97 obj->read_domains, obj->write_domain,
98 obj_priv->last_rendering_seqno);
99 } else {
100 DRM_PROC_PRINT(" %p: %08x %08x %d\n", obj,
101 obj->read_domains, obj->write_domain,
102 obj_priv->last_rendering_seqno);
103 }
104 }
105 if (len > request + offset)
106 return request;
107 *eof = 1;
108 return len - offset;
109}
110
111static int i915_gem_inactive_info(char *buf, char **start, off_t offset,
112 int request, int *eof, void *data)
113{
114 struct drm_minor *minor = (struct drm_minor *) data;
115 struct drm_device *dev = minor->dev;
116 drm_i915_private_t *dev_priv = dev->dev_private;
117 struct drm_i915_gem_object *obj_priv;
118 int len = 0;
119
120 if (offset > DRM_PROC_LIMIT) {
121 *eof = 1;
122 return 0;
123 }
124
125 *start = &buf[offset];
126 *eof = 0;
127 DRM_PROC_PRINT("Inactive:\n");
128 list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list,
129 list)
130 {
131 struct drm_gem_object *obj = obj_priv->obj;
132 if (obj->name) {
133 DRM_PROC_PRINT(" %p(%d): %08x %08x %d\n",
134 obj, obj->name,
135 obj->read_domains, obj->write_domain,
136 obj_priv->last_rendering_seqno);
137 } else {
138 DRM_PROC_PRINT(" %p: %08x %08x %d\n", obj,
139 obj->read_domains, obj->write_domain,
140 obj_priv->last_rendering_seqno);
141 }
142 }
143 if (len > request + offset)
144 return request;
145 *eof = 1;
146 return len - offset;
147}
148
149static int i915_gem_request_info(char *buf, char **start, off_t offset,
150 int request, int *eof, void *data)
151{
152 struct drm_minor *minor = (struct drm_minor *) data;
153 struct drm_device *dev = minor->dev;
154 drm_i915_private_t *dev_priv = dev->dev_private;
155 struct drm_i915_gem_request *gem_request;
156 int len = 0;
157
158 if (offset > DRM_PROC_LIMIT) {
159 *eof = 1;
160 return 0;
161 }
162
163 *start = &buf[offset];
164 *eof = 0;
165 DRM_PROC_PRINT("Request:\n");
166 list_for_each_entry(gem_request, &dev_priv->mm.request_list,
167 list)
168 {
169 DRM_PROC_PRINT(" %d @ %d\n",
170 gem_request->seqno,
171 (int) (jiffies - gem_request->emitted_jiffies));
172 }
173 if (len > request + offset)
174 return request;
175 *eof = 1;
176 return len - offset;
177}
178
179static int i915_gem_seqno_info(char *buf, char **start, off_t offset,
180 int request, int *eof, void *data)
181{
182 struct drm_minor *minor = (struct drm_minor *) data;
183 struct drm_device *dev = minor->dev;
184 drm_i915_private_t *dev_priv = dev->dev_private;
185 int len = 0;
186
187 if (offset > DRM_PROC_LIMIT) {
188 *eof = 1;
189 return 0;
190 }
191
192 *start = &buf[offset];
193 *eof = 0;
194 if (dev_priv->hw_status_page != NULL) {
195 DRM_PROC_PRINT("Current sequence: %d\n",
196 i915_get_gem_seqno(dev));
197 } else {
198 DRM_PROC_PRINT("Current sequence: hws uninitialized\n");
199 }
200 DRM_PROC_PRINT("Waiter sequence: %d\n",
201 dev_priv->mm.waiting_gem_seqno);
202 DRM_PROC_PRINT("IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
203 if (len > request + offset)
204 return request;
205 *eof = 1;
206 return len - offset;
207}
208
209
210static int i915_interrupt_info(char *buf, char **start, off_t offset,
211 int request, int *eof, void *data)
212{
213 struct drm_minor *minor = (struct drm_minor *) data;
214 struct drm_device *dev = minor->dev;
215 drm_i915_private_t *dev_priv = dev->dev_private;
216 int len = 0;
217
218 if (offset > DRM_PROC_LIMIT) {
219 *eof = 1;
220 return 0;
221 }
222
223 *start = &buf[offset];
224 *eof = 0;
225 DRM_PROC_PRINT("Interrupt enable: %08x\n",
226 I915_READ(IER));
227 DRM_PROC_PRINT("Interrupt identity: %08x\n",
228 I915_READ(IIR));
229 DRM_PROC_PRINT("Interrupt mask: %08x\n",
230 I915_READ(IMR));
231 DRM_PROC_PRINT("Pipe A stat: %08x\n",
232 I915_READ(PIPEASTAT));
233 DRM_PROC_PRINT("Pipe B stat: %08x\n",
234 I915_READ(PIPEBSTAT));
235 DRM_PROC_PRINT("Interrupts received: %d\n",
236 atomic_read(&dev_priv->irq_received));
237 if (dev_priv->hw_status_page != NULL) {
238 DRM_PROC_PRINT("Current sequence: %d\n",
239 i915_get_gem_seqno(dev));
240 } else {
241 DRM_PROC_PRINT("Current sequence: hws uninitialized\n");
242 }
243 DRM_PROC_PRINT("Waiter sequence: %d\n",
244 dev_priv->mm.waiting_gem_seqno);
245 DRM_PROC_PRINT("IRQ sequence: %d\n",
246 dev_priv->mm.irq_gem_seqno);
247 if (len > request + offset)
248 return request;
249 *eof = 1;
250 return len - offset;
251}
252
253static int i915_hws_info(char *buf, char **start, off_t offset,
254 int request, int *eof, void *data)
255{
256 struct drm_minor *minor = (struct drm_minor *) data;
257 struct drm_device *dev = minor->dev;
258 drm_i915_private_t *dev_priv = dev->dev_private;
259 int len = 0, i;
260 volatile u32 *hws;
261
262 if (offset > DRM_PROC_LIMIT) {
263 *eof = 1;
264 return 0;
265 }
266
267 hws = (volatile u32 *)dev_priv->hw_status_page;
268 if (hws == NULL) {
269 *eof = 1;
270 return 0;
271 }
272
273 *start = &buf[offset];
274 *eof = 0;
275 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
276 DRM_PROC_PRINT("0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
277 i * 4,
278 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
279 }
280 if (len > request + offset)
281 return request;
282 *eof = 1;
283 return len - offset;
284}
285
286static struct drm_proc_list {
287 /** file name */
288 const char *name;
289 /** proc callback*/
290 int (*f) (char *, char **, off_t, int, int *, void *);
291} i915_gem_proc_list[] = {
292 {"i915_gem_active", i915_gem_active_info},
293 {"i915_gem_flushing", i915_gem_flushing_info},
294 {"i915_gem_inactive", i915_gem_inactive_info},
295 {"i915_gem_request", i915_gem_request_info},
296 {"i915_gem_seqno", i915_gem_seqno_info},
297 {"i915_gem_interrupt", i915_interrupt_info},
298 {"i915_gem_hws", i915_hws_info},
299};
300
301#define I915_GEM_PROC_ENTRIES ARRAY_SIZE(i915_gem_proc_list)
302
303int i915_gem_proc_init(struct drm_minor *minor)
304{
305 struct proc_dir_entry *ent;
306 int i, j;
307
308 for (i = 0; i < I915_GEM_PROC_ENTRIES; i++) {
309 ent = create_proc_entry(i915_gem_proc_list[i].name,
310 S_IFREG | S_IRUGO, minor->dev_root);
311 if (!ent) {
312 DRM_ERROR("Cannot create /proc/dri/.../%s\n",
313 i915_gem_proc_list[i].name);
314 for (j = 0; j < i; j++)
315 remove_proc_entry(i915_gem_proc_list[i].name,
316 minor->dev_root);
317 return -1;
318 }
319 ent->read_proc = i915_gem_proc_list[i].f;
320 ent->data = minor;
321 }
322 return 0;
323}
324
325void i915_gem_proc_cleanup(struct drm_minor *minor)
326{
327 int i;
328
329 if (!minor->dev_root)
330 return;
331
332 for (i = 0; i < I915_GEM_PROC_ENTRIES; i++)
333 remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root);
334}
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 7fb4191ef93..6be3f927c86 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -96,16 +96,16 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
96 */ 96 */
97 swizzle_x = I915_BIT_6_SWIZZLE_NONE; 97 swizzle_x = I915_BIT_6_SWIZZLE_NONE;
98 swizzle_y = I915_BIT_6_SWIZZLE_NONE; 98 swizzle_y = I915_BIT_6_SWIZZLE_NONE;
99 } else if ((!IS_I965G(dev) && !IS_G33(dev)) || IS_I965GM(dev) || 99 } else if (IS_MOBILE(dev)) {
100 IS_GM45(dev)) {
101 uint32_t dcc; 100 uint32_t dcc;
102 101
103 /* On 915-945 and GM965, channel interleave by the CPU is 102 /* On mobile 9xx chipsets, channel interleave by the CPU is
104 * determined by DCC. The CPU will alternate based on bit 6 103 * determined by DCC. For single-channel, neither the CPU
105 * in interleaved mode, and the GPU will then also alternate 104 * nor the GPU do swizzling. For dual channel interleaved,
106 * on bit 6, 9, and 10 for X, but the CPU may also optionally 105 * the GPU's interleave is bit 9 and 10 for X tiled, and bit
107 * alternate based on bit 17 (XOR not disabled and XOR 106 * 9 for Y tiled. The CPU's interleave is independent, and
108 * bit == 17). 107 * can be based on either bit 11 (haven't seen this yet) or
108 * bit 17 (common).
109 */ 109 */
110 dcc = I915_READ(DCC); 110 dcc = I915_READ(DCC);
111 switch (dcc & DCC_ADDRESSING_MODE_MASK) { 111 switch (dcc & DCC_ADDRESSING_MODE_MASK) {
@@ -115,19 +115,18 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
115 swizzle_y = I915_BIT_6_SWIZZLE_NONE; 115 swizzle_y = I915_BIT_6_SWIZZLE_NONE;
116 break; 116 break;
117 case DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED: 117 case DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED:
118 if (IS_I915G(dev) || IS_I915GM(dev) || 118 if (dcc & DCC_CHANNEL_XOR_DISABLE) {
119 dcc & DCC_CHANNEL_XOR_DISABLE) { 119 /* This is the base swizzling by the GPU for
120 * tiled buffers.
121 */
120 swizzle_x = I915_BIT_6_SWIZZLE_9_10; 122 swizzle_x = I915_BIT_6_SWIZZLE_9_10;
121 swizzle_y = I915_BIT_6_SWIZZLE_9; 123 swizzle_y = I915_BIT_6_SWIZZLE_9;
122 } else if ((IS_I965GM(dev) || IS_GM45(dev)) && 124 } else if ((dcc & DCC_CHANNEL_XOR_BIT_17) == 0) {
123 (dcc & DCC_CHANNEL_XOR_BIT_17) == 0) { 125 /* Bit 11 swizzling by the CPU in addition. */
124 /* GM965/GM45 does either bit 11 or bit 17
125 * swizzling.
126 */
127 swizzle_x = I915_BIT_6_SWIZZLE_9_10_11; 126 swizzle_x = I915_BIT_6_SWIZZLE_9_10_11;
128 swizzle_y = I915_BIT_6_SWIZZLE_9_11; 127 swizzle_y = I915_BIT_6_SWIZZLE_9_11;
129 } else { 128 } else {
130 /* Bit 17 or perhaps other swizzling */ 129 /* Bit 17 swizzling by the CPU in addition. */
131 swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; 130 swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
132 swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; 131 swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
133 } 132 }
@@ -217,6 +216,22 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
217 else 216 else
218 tile_width = 512; 217 tile_width = 512;
219 218
219 /* check maximum stride & object size */
220 if (IS_I965G(dev)) {
221 /* i965 stores the end address of the gtt mapping in the fence
222 * reg, so dont bother to check the size */
223 if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
224 return false;
225 } else if (IS_I9XX(dev)) {
226 if (stride / tile_width > I830_FENCE_MAX_PITCH_VAL ||
227 size > (I830_FENCE_MAX_SIZE_VAL << 20))
228 return false;
229 } else {
230 if (stride / 128 > I830_FENCE_MAX_PITCH_VAL ||
231 size > (I830_FENCE_MAX_SIZE_VAL << 19))
232 return false;
233 }
234
220 /* 965+ just needs multiples of tile width */ 235 /* 965+ just needs multiples of tile width */
221 if (IS_I965G(dev)) { 236 if (IS_I965G(dev)) {
222 if (stride & (tile_width - 1)) 237 if (stride & (tile_width - 1))
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 87b6b603469..ee7ce7b78cf 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -48,10 +48,6 @@
48/** Interrupts that we mask and unmask at runtime. */ 48/** Interrupts that we mask and unmask at runtime. */
49#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT) 49#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT)
50 50
51/** These are all of the interrupts used by the driver */
52#define I915_INTERRUPT_ENABLE_MASK (I915_INTERRUPT_ENABLE_FIX | \
53 I915_INTERRUPT_ENABLE_VAR)
54
55#define I915_PIPE_VBLANK_STATUS (PIPE_START_VBLANK_INTERRUPT_STATUS |\ 51#define I915_PIPE_VBLANK_STATUS (PIPE_START_VBLANK_INTERRUPT_STATUS |\
56 PIPE_VBLANK_INTERRUPT_STATUS) 52 PIPE_VBLANK_INTERRUPT_STATUS)
57 53
@@ -187,6 +183,19 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
187 return I915_READ(reg); 183 return I915_READ(reg);
188} 184}
189 185
186/*
187 * Handle hotplug events outside the interrupt handler proper.
188 */
189static void i915_hotplug_work_func(struct work_struct *work)
190{
191 drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
192 hotplug_work);
193 struct drm_device *dev = dev_priv->dev;
194
195 /* Just fire off a uevent and let userspace tell us what to do */
196 drm_sysfs_hotplug_event(dev);
197}
198
190irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) 199irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
191{ 200{
192 struct drm_device *dev = (struct drm_device *) arg; 201 struct drm_device *dev = (struct drm_device *) arg;
@@ -244,6 +253,20 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
244 253
245 ret = IRQ_HANDLED; 254 ret = IRQ_HANDLED;
246 255
256 /* Consume port. Then clear IIR or we'll miss events */
257 if ((I915_HAS_HOTPLUG(dev)) &&
258 (iir & I915_DISPLAY_PORT_INTERRUPT)) {
259 u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
260
261 DRM_DEBUG("hotplug event received, stat 0x%08x\n",
262 hotplug_status);
263 if (hotplug_status & dev_priv->hotplug_supported_mask)
264 schedule_work(&dev_priv->hotplug_work);
265
266 I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
267 I915_READ(PORT_HOTPLUG_STAT);
268 }
269
247 I915_WRITE(IIR, iir); 270 I915_WRITE(IIR, iir);
248 new_iir = I915_READ(IIR); /* Flush posted writes */ 271 new_iir = I915_READ(IIR); /* Flush posted writes */
249 272
@@ -528,17 +551,24 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
528 551
529 atomic_set(&dev_priv->irq_received, 0); 552 atomic_set(&dev_priv->irq_received, 0);
530 553
554 if (I915_HAS_HOTPLUG(dev)) {
555 I915_WRITE(PORT_HOTPLUG_EN, 0);
556 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
557 }
558
531 I915_WRITE(HWSTAM, 0xeffe); 559 I915_WRITE(HWSTAM, 0xeffe);
532 I915_WRITE(PIPEASTAT, 0); 560 I915_WRITE(PIPEASTAT, 0);
533 I915_WRITE(PIPEBSTAT, 0); 561 I915_WRITE(PIPEBSTAT, 0);
534 I915_WRITE(IMR, 0xffffffff); 562 I915_WRITE(IMR, 0xffffffff);
535 I915_WRITE(IER, 0x0); 563 I915_WRITE(IER, 0x0);
536 (void) I915_READ(IER); 564 (void) I915_READ(IER);
565 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
537} 566}
538 567
539int i915_driver_irq_postinstall(struct drm_device *dev) 568int i915_driver_irq_postinstall(struct drm_device *dev)
540{ 569{
541 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 570 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
571 u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR;
542 572
543 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; 573 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
544 574
@@ -550,13 +580,35 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
550 dev_priv->pipestat[0] = 0; 580 dev_priv->pipestat[0] = 0;
551 dev_priv->pipestat[1] = 0; 581 dev_priv->pipestat[1] = 0;
552 582
583 if (I915_HAS_HOTPLUG(dev)) {
584 u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
585
586 /* Leave other bits alone */
587 hotplug_en |= HOTPLUG_EN_MASK;
588 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
589
590 dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS |
591 TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS |
592 SDVOB_HOTPLUG_INT_STATUS;
593 if (IS_G4X(dev)) {
594 dev_priv->hotplug_supported_mask |=
595 HDMIB_HOTPLUG_INT_STATUS |
596 HDMIC_HOTPLUG_INT_STATUS |
597 HDMID_HOTPLUG_INT_STATUS;
598 }
599 /* Enable in IER... */
600 enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
601 /* and unmask in IMR */
602 i915_enable_irq(dev_priv, I915_DISPLAY_PORT_INTERRUPT);
603 }
604
553 /* Disable pipe interrupt enables, clear pending pipe status */ 605 /* Disable pipe interrupt enables, clear pending pipe status */
554 I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff); 606 I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
555 I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff); 607 I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
556 /* Clear pending interrupt status */ 608 /* Clear pending interrupt status */
557 I915_WRITE(IIR, I915_READ(IIR)); 609 I915_WRITE(IIR, I915_READ(IIR));
558 610
559 I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK); 611 I915_WRITE(IER, enable_mask);
560 I915_WRITE(IMR, dev_priv->irq_mask_reg); 612 I915_WRITE(IMR, dev_priv->irq_mask_reg);
561 (void) I915_READ(IER); 613 (void) I915_READ(IER);
562 614
@@ -575,6 +627,11 @@ void i915_driver_irq_uninstall(struct drm_device * dev)
575 627
576 dev_priv->vblank_pipe = 0; 628 dev_priv->vblank_pipe = 0;
577 629
630 if (I915_HAS_HOTPLUG(dev)) {
631 I915_WRITE(PORT_HOTPLUG_EN, 0);
632 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
633 }
634
578 I915_WRITE(HWSTAM, 0xffffffff); 635 I915_WRITE(HWSTAM, 0xffffffff);
579 I915_WRITE(PIPEASTAT, 0); 636 I915_WRITE(PIPEASTAT, 0);
580 I915_WRITE(PIPEBSTAT, 0); 637 I915_WRITE(PIPEBSTAT, 0);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 90600d89941..e805b590ae7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -190,6 +190,8 @@
190#define I830_FENCE_SIZE_BITS(size) ((ffs((size) >> 19) - 1) << 8) 190#define I830_FENCE_SIZE_BITS(size) ((ffs((size) >> 19) - 1) << 8)
191#define I830_FENCE_PITCH_SHIFT 4 191#define I830_FENCE_PITCH_SHIFT 4
192#define I830_FENCE_REG_VALID (1<<0) 192#define I830_FENCE_REG_VALID (1<<0)
193#define I830_FENCE_MAX_PITCH_VAL 0x10
194#define I830_FENCE_MAX_SIZE_VAL (1<<8)
193 195
194#define I915_FENCE_START_MASK 0x0ff00000 196#define I915_FENCE_START_MASK 0x0ff00000
195#define I915_FENCE_SIZE_BITS(size) ((ffs((size) >> 20) - 1) << 8) 197#define I915_FENCE_SIZE_BITS(size) ((ffs((size) >> 20) - 1) << 8)
@@ -198,6 +200,7 @@
198#define I965_FENCE_PITCH_SHIFT 2 200#define I965_FENCE_PITCH_SHIFT 2
199#define I965_FENCE_TILING_Y_SHIFT 1 201#define I965_FENCE_TILING_Y_SHIFT 1
200#define I965_FENCE_REG_VALID (1<<0) 202#define I965_FENCE_REG_VALID (1<<0)
203#define I965_FENCE_MAX_PITCH_VAL 0x0400
201 204
202/* 205/*
203 * Instruction and interrupt control regs 206 * Instruction and interrupt control regs
@@ -359,6 +362,7 @@
359#define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ 362#define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */
360#define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */ 363#define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */
361#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ 364#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
365#define DPLL_FPA01_P1_POST_DIV_MASK_IGD 0x00ff8000 /* IGD */
362 366
363#define I915_FIFO_UNDERRUN_STATUS (1UL<<31) 367#define I915_FIFO_UNDERRUN_STATUS (1UL<<31)
364#define I915_CRC_ERROR_ENABLE (1UL<<29) 368#define I915_CRC_ERROR_ENABLE (1UL<<29)
@@ -435,6 +439,7 @@
435 */ 439 */
436#define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000 440#define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000
437#define DPLL_FPA01_P1_POST_DIV_SHIFT 16 441#define DPLL_FPA01_P1_POST_DIV_SHIFT 16
442#define DPLL_FPA01_P1_POST_DIV_SHIFT_IGD 15
438/* i830, required in DVO non-gang */ 443/* i830, required in DVO non-gang */
439#define PLL_P2_DIVIDE_BY_4 (1 << 23) 444#define PLL_P2_DIVIDE_BY_4 (1 << 23)
440#define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */ 445#define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */
@@ -501,10 +506,12 @@
501#define FPB0 0x06048 506#define FPB0 0x06048
502#define FPB1 0x0604c 507#define FPB1 0x0604c
503#define FP_N_DIV_MASK 0x003f0000 508#define FP_N_DIV_MASK 0x003f0000
509#define FP_N_IGD_DIV_MASK 0x00ff0000
504#define FP_N_DIV_SHIFT 16 510#define FP_N_DIV_SHIFT 16
505#define FP_M1_DIV_MASK 0x00003f00 511#define FP_M1_DIV_MASK 0x00003f00
506#define FP_M1_DIV_SHIFT 8 512#define FP_M1_DIV_SHIFT 8
507#define FP_M2_DIV_MASK 0x0000003f 513#define FP_M2_DIV_MASK 0x0000003f
514#define FP_M2_IGD_DIV_MASK 0x000000ff
508#define FP_M2_DIV_SHIFT 0 515#define FP_M2_DIV_SHIFT 0
509#define DPLL_TEST 0x606c 516#define DPLL_TEST 0x606c
510#define DPLLB_TEST_SDVO_DIV_1 (0 << 22) 517#define DPLLB_TEST_SDVO_DIV_1 (0 << 22)
@@ -629,6 +636,30 @@
629#define TV_HOTPLUG_INT_EN (1 << 18) 636#define TV_HOTPLUG_INT_EN (1 << 18)
630#define CRT_HOTPLUG_INT_EN (1 << 9) 637#define CRT_HOTPLUG_INT_EN (1 << 9)
631#define CRT_HOTPLUG_FORCE_DETECT (1 << 3) 638#define CRT_HOTPLUG_FORCE_DETECT (1 << 3)
639#define CRT_HOTPLUG_ACTIVATION_PERIOD_32 (0 << 8)
640/* must use period 64 on GM45 according to docs */
641#define CRT_HOTPLUG_ACTIVATION_PERIOD_64 (1 << 8)
642#define CRT_HOTPLUG_DAC_ON_TIME_2M (0 << 7)
643#define CRT_HOTPLUG_DAC_ON_TIME_4M (1 << 7)
644#define CRT_HOTPLUG_VOLTAGE_COMPARE_40 (0 << 5)
645#define CRT_HOTPLUG_VOLTAGE_COMPARE_50 (1 << 5)
646#define CRT_HOTPLUG_VOLTAGE_COMPARE_60 (2 << 5)
647#define CRT_HOTPLUG_VOLTAGE_COMPARE_70 (3 << 5)
648#define CRT_HOTPLUG_VOLTAGE_COMPARE_MASK (3 << 5)
649#define CRT_HOTPLUG_DETECT_DELAY_1G (0 << 4)
650#define CRT_HOTPLUG_DETECT_DELAY_2G (1 << 4)
651#define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2)
652#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
653#define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */
654#define CRT_FORCE_HOTPLUG_MASK 0xfffffe1f
655#define HOTPLUG_EN_MASK (HDMIB_HOTPLUG_INT_EN | \
656 HDMIC_HOTPLUG_INT_EN | \
657 HDMID_HOTPLUG_INT_EN | \
658 SDVOB_HOTPLUG_INT_EN | \
659 SDVOC_HOTPLUG_INT_EN | \
660 TV_HOTPLUG_INT_EN | \
661 CRT_HOTPLUG_INT_EN)
662
632 663
633#define PORT_HOTPLUG_STAT 0x61114 664#define PORT_HOTPLUG_STAT 0x61114
634#define HDMIB_HOTPLUG_INT_STATUS (1 << 29) 665#define HDMIB_HOTPLUG_INT_STATUS (1 << 29)
@@ -856,7 +887,7 @@
856 */ 887 */
857# define TV_ENC_C0_FIX (1 << 10) 888# define TV_ENC_C0_FIX (1 << 10)
858/** Bits that must be preserved by software */ 889/** Bits that must be preserved by software */
859# define TV_CTL_SAVE ((3 << 8) | (3 << 6)) 890# define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf)
860# define TV_FUSE_STATE_MASK (3 << 4) 891# define TV_FUSE_STATE_MASK (3 << 4)
861/** Read-only state that reports all features enabled */ 892/** Read-only state that reports all features enabled */
862# define TV_FUSE_STATE_ENABLED (0 << 4) 893# define TV_FUSE_STATE_ENABLED (0 << 4)
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 5ea715ace3a..de621aad85b 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -162,13 +162,13 @@ struct bdb_lvds_options {
162 u8 panel_type; 162 u8 panel_type;
163 u8 rsvd1; 163 u8 rsvd1;
164 /* LVDS capabilities, stored in a dword */ 164 /* LVDS capabilities, stored in a dword */
165 u8 rsvd2:1;
166 u8 lvds_edid:1;
167 u8 pixel_dither:1;
168 u8 pfit_ratio_auto:1;
169 u8 pfit_gfx_mode_enhanced:1;
170 u8 pfit_text_mode_enhanced:1;
171 u8 pfit_mode:2; 165 u8 pfit_mode:2;
166 u8 pfit_text_mode_enhanced:1;
167 u8 pfit_gfx_mode_enhanced:1;
168 u8 pfit_ratio_auto:1;
169 u8 pixel_dither:1;
170 u8 lvds_edid:1;
171 u8 rsvd2:1;
172 u8 rsvd4; 172 u8 rsvd4;
173} __attribute__((packed)); 173} __attribute__((packed));
174 174
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index dcaed3466e8..9bdd959260a 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -41,7 +41,7 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
41 41
42 temp = I915_READ(ADPA); 42 temp = I915_READ(ADPA);
43 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 43 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
44 temp &= ~ADPA_DAC_ENABLE; 44 temp |= ADPA_DAC_ENABLE;
45 45
46 switch(mode) { 46 switch(mode) {
47 case DRM_MODE_DPMS_ON: 47 case DRM_MODE_DPMS_ON:
@@ -64,11 +64,21 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
64static int intel_crt_mode_valid(struct drm_connector *connector, 64static int intel_crt_mode_valid(struct drm_connector *connector,
65 struct drm_display_mode *mode) 65 struct drm_display_mode *mode)
66{ 66{
67 struct drm_device *dev = connector->dev;
68
69 int max_clock = 0;
67 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 70 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
68 return MODE_NO_DBLESCAN; 71 return MODE_NO_DBLESCAN;
69 72
70 if (mode->clock > 400000 || mode->clock < 25000) 73 if (mode->clock < 25000)
71 return MODE_CLOCK_RANGE; 74 return MODE_CLOCK_LOW;
75
76 if (!IS_I9XX(dev))
77 max_clock = 350000;
78 else
79 max_clock = 400000;
80 if (mode->clock > max_clock)
81 return MODE_CLOCK_HIGH;
72 82
73 return MODE_OK; 83 return MODE_OK;
74} 84}
@@ -113,10 +123,13 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
113 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 123 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
114 adpa |= ADPA_VSYNC_ACTIVE_HIGH; 124 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
115 125
116 if (intel_crtc->pipe == 0) 126 if (intel_crtc->pipe == 0) {
117 adpa |= ADPA_PIPE_A_SELECT; 127 adpa |= ADPA_PIPE_A_SELECT;
118 else 128 I915_WRITE(BCLRPAT_A, 0);
129 } else {
119 adpa |= ADPA_PIPE_B_SELECT; 130 adpa |= ADPA_PIPE_B_SELECT;
131 I915_WRITE(BCLRPAT_B, 0);
132 }
120 133
121 I915_WRITE(ADPA, adpa); 134 I915_WRITE(ADPA, adpa);
122} 135}
@@ -133,20 +146,39 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
133{ 146{
134 struct drm_device *dev = connector->dev; 147 struct drm_device *dev = connector->dev;
135 struct drm_i915_private *dev_priv = dev->dev_private; 148 struct drm_i915_private *dev_priv = dev->dev_private;
136 u32 temp; 149 u32 hotplug_en;
137 150 int i, tries = 0;
138 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 151 /*
139 152 * On 4 series desktop, CRT detect sequence need to be done twice
140 temp = I915_READ(PORT_HOTPLUG_EN); 153 * to get a reliable result.
141 154 */
142 I915_WRITE(PORT_HOTPLUG_EN,
143 temp | CRT_HOTPLUG_FORCE_DETECT | (1 << 5));
144 155
145 do { 156 if (IS_G4X(dev) && !IS_GM45(dev))
146 if (!(I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT)) 157 tries = 2;
147 break; 158 else
148 msleep(1); 159 tries = 1;
149 } while (time_after(timeout, jiffies)); 160 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
161 hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
162 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
163
164 if (IS_GM45(dev))
165 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
166
167 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
168
169 for (i = 0; i < tries ; i++) {
170 unsigned long timeout;
171 /* turn on the FORCE_DETECT */
172 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
173 timeout = jiffies + msecs_to_jiffies(1000);
174 /* wait for FORCE_DETECT to go off */
175 do {
176 if (!(I915_READ(PORT_HOTPLUG_EN) &
177 CRT_HOTPLUG_FORCE_DETECT))
178 break;
179 msleep(1);
180 } while (time_after(timeout, jiffies));
181 }
150 182
151 if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) == 183 if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
152 CRT_HOTPLUG_MONITOR_COLOR) 184 CRT_HOTPLUG_MONITOR_COLOR)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a2834276cb3..64773ce5296 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -56,11 +56,13 @@ typedef struct {
56} intel_p2_t; 56} intel_p2_t;
57 57
58#define INTEL_P2_NUM 2 58#define INTEL_P2_NUM 2
59 59typedef struct intel_limit intel_limit_t;
60typedef struct { 60struct intel_limit {
61 intel_range_t dot, vco, n, m, m1, m2, p, p1; 61 intel_range_t dot, vco, n, m, m1, m2, p, p1;
62 intel_p2_t p2; 62 intel_p2_t p2;
63} intel_limit_t; 63 bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
64 int, int, intel_clock_t *);
65};
64 66
65#define I8XX_DOT_MIN 25000 67#define I8XX_DOT_MIN 25000
66#define I8XX_DOT_MAX 350000 68#define I8XX_DOT_MAX 350000
@@ -90,18 +92,32 @@ typedef struct {
90#define I9XX_DOT_MAX 400000 92#define I9XX_DOT_MAX 400000
91#define I9XX_VCO_MIN 1400000 93#define I9XX_VCO_MIN 1400000
92#define I9XX_VCO_MAX 2800000 94#define I9XX_VCO_MAX 2800000
95#define IGD_VCO_MIN 1700000
96#define IGD_VCO_MAX 3500000
93#define I9XX_N_MIN 1 97#define I9XX_N_MIN 1
94#define I9XX_N_MAX 6 98#define I9XX_N_MAX 6
99/* IGD's Ncounter is a ring counter */
100#define IGD_N_MIN 3
101#define IGD_N_MAX 6
95#define I9XX_M_MIN 70 102#define I9XX_M_MIN 70
96#define I9XX_M_MAX 120 103#define I9XX_M_MAX 120
104#define IGD_M_MIN 2
105#define IGD_M_MAX 256
97#define I9XX_M1_MIN 10 106#define I9XX_M1_MIN 10
98#define I9XX_M1_MAX 22 107#define I9XX_M1_MAX 22
99#define I9XX_M2_MIN 5 108#define I9XX_M2_MIN 5
100#define I9XX_M2_MAX 9 109#define I9XX_M2_MAX 9
110/* IGD M1 is reserved, and must be 0 */
111#define IGD_M1_MIN 0
112#define IGD_M1_MAX 0
113#define IGD_M2_MIN 0
114#define IGD_M2_MAX 254
101#define I9XX_P_SDVO_DAC_MIN 5 115#define I9XX_P_SDVO_DAC_MIN 5
102#define I9XX_P_SDVO_DAC_MAX 80 116#define I9XX_P_SDVO_DAC_MAX 80
103#define I9XX_P_LVDS_MIN 7 117#define I9XX_P_LVDS_MIN 7
104#define I9XX_P_LVDS_MAX 98 118#define I9XX_P_LVDS_MAX 98
119#define IGD_P_LVDS_MIN 7
120#define IGD_P_LVDS_MAX 112
105#define I9XX_P1_MIN 1 121#define I9XX_P1_MIN 1
106#define I9XX_P1_MAX 8 122#define I9XX_P1_MAX 8
107#define I9XX_P2_SDVO_DAC_SLOW 10 123#define I9XX_P2_SDVO_DAC_SLOW 10
@@ -115,6 +131,97 @@ typedef struct {
115#define INTEL_LIMIT_I8XX_LVDS 1 131#define INTEL_LIMIT_I8XX_LVDS 1
116#define INTEL_LIMIT_I9XX_SDVO_DAC 2 132#define INTEL_LIMIT_I9XX_SDVO_DAC 2
117#define INTEL_LIMIT_I9XX_LVDS 3 133#define INTEL_LIMIT_I9XX_LVDS 3
134#define INTEL_LIMIT_G4X_SDVO 4
135#define INTEL_LIMIT_G4X_HDMI_DAC 5
136#define INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS 6
137#define INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS 7
138#define INTEL_LIMIT_IGD_SDVO_DAC 8
139#define INTEL_LIMIT_IGD_LVDS 9
140
141/*The parameter is for SDVO on G4x platform*/
142#define G4X_DOT_SDVO_MIN 25000
143#define G4X_DOT_SDVO_MAX 270000
144#define G4X_VCO_MIN 1750000
145#define G4X_VCO_MAX 3500000
146#define G4X_N_SDVO_MIN 1
147#define G4X_N_SDVO_MAX 4
148#define G4X_M_SDVO_MIN 104
149#define G4X_M_SDVO_MAX 138
150#define G4X_M1_SDVO_MIN 17
151#define G4X_M1_SDVO_MAX 23
152#define G4X_M2_SDVO_MIN 5
153#define G4X_M2_SDVO_MAX 11
154#define G4X_P_SDVO_MIN 10
155#define G4X_P_SDVO_MAX 30
156#define G4X_P1_SDVO_MIN 1
157#define G4X_P1_SDVO_MAX 3
158#define G4X_P2_SDVO_SLOW 10
159#define G4X_P2_SDVO_FAST 10
160#define G4X_P2_SDVO_LIMIT 270000
161
162/*The parameter is for HDMI_DAC on G4x platform*/
163#define G4X_DOT_HDMI_DAC_MIN 22000
164#define G4X_DOT_HDMI_DAC_MAX 400000
165#define G4X_N_HDMI_DAC_MIN 1
166#define G4X_N_HDMI_DAC_MAX 4
167#define G4X_M_HDMI_DAC_MIN 104
168#define G4X_M_HDMI_DAC_MAX 138
169#define G4X_M1_HDMI_DAC_MIN 16
170#define G4X_M1_HDMI_DAC_MAX 23
171#define G4X_M2_HDMI_DAC_MIN 5
172#define G4X_M2_HDMI_DAC_MAX 11
173#define G4X_P_HDMI_DAC_MIN 5
174#define G4X_P_HDMI_DAC_MAX 80
175#define G4X_P1_HDMI_DAC_MIN 1
176#define G4X_P1_HDMI_DAC_MAX 8
177#define G4X_P2_HDMI_DAC_SLOW 10
178#define G4X_P2_HDMI_DAC_FAST 5
179#define G4X_P2_HDMI_DAC_LIMIT 165000
180
181/*The parameter is for SINGLE_CHANNEL_LVDS on G4x platform*/
182#define G4X_DOT_SINGLE_CHANNEL_LVDS_MIN 20000
183#define G4X_DOT_SINGLE_CHANNEL_LVDS_MAX 115000
184#define G4X_N_SINGLE_CHANNEL_LVDS_MIN 1
185#define G4X_N_SINGLE_CHANNEL_LVDS_MAX 3
186#define G4X_M_SINGLE_CHANNEL_LVDS_MIN 104
187#define G4X_M_SINGLE_CHANNEL_LVDS_MAX 138
188#define G4X_M1_SINGLE_CHANNEL_LVDS_MIN 17
189#define G4X_M1_SINGLE_CHANNEL_LVDS_MAX 23
190#define G4X_M2_SINGLE_CHANNEL_LVDS_MIN 5
191#define G4X_M2_SINGLE_CHANNEL_LVDS_MAX 11
192#define G4X_P_SINGLE_CHANNEL_LVDS_MIN 28
193#define G4X_P_SINGLE_CHANNEL_LVDS_MAX 112
194#define G4X_P1_SINGLE_CHANNEL_LVDS_MIN 2
195#define G4X_P1_SINGLE_CHANNEL_LVDS_MAX 8
196#define G4X_P2_SINGLE_CHANNEL_LVDS_SLOW 14
197#define G4X_P2_SINGLE_CHANNEL_LVDS_FAST 14
198#define G4X_P2_SINGLE_CHANNEL_LVDS_LIMIT 0
199
200/*The parameter is for DUAL_CHANNEL_LVDS on G4x platform*/
201#define G4X_DOT_DUAL_CHANNEL_LVDS_MIN 80000
202#define G4X_DOT_DUAL_CHANNEL_LVDS_MAX 224000
203#define G4X_N_DUAL_CHANNEL_LVDS_MIN 1
204#define G4X_N_DUAL_CHANNEL_LVDS_MAX 3
205#define G4X_M_DUAL_CHANNEL_LVDS_MIN 104
206#define G4X_M_DUAL_CHANNEL_LVDS_MAX 138
207#define G4X_M1_DUAL_CHANNEL_LVDS_MIN 17
208#define G4X_M1_DUAL_CHANNEL_LVDS_MAX 23
209#define G4X_M2_DUAL_CHANNEL_LVDS_MIN 5
210#define G4X_M2_DUAL_CHANNEL_LVDS_MAX 11
211#define G4X_P_DUAL_CHANNEL_LVDS_MIN 14
212#define G4X_P_DUAL_CHANNEL_LVDS_MAX 42
213#define G4X_P1_DUAL_CHANNEL_LVDS_MIN 2
214#define G4X_P1_DUAL_CHANNEL_LVDS_MAX 6
215#define G4X_P2_DUAL_CHANNEL_LVDS_SLOW 7
216#define G4X_P2_DUAL_CHANNEL_LVDS_FAST 7
217#define G4X_P2_DUAL_CHANNEL_LVDS_LIMIT 0
218
219static bool
220intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
221 int target, int refclk, intel_clock_t *best_clock);
222static bool
223intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
224 int target, int refclk, intel_clock_t *best_clock);
118 225
119static const intel_limit_t intel_limits[] = { 226static const intel_limit_t intel_limits[] = {
120 { /* INTEL_LIMIT_I8XX_DVO_DAC */ 227 { /* INTEL_LIMIT_I8XX_DVO_DAC */
@@ -128,6 +235,7 @@ static const intel_limit_t intel_limits[] = {
128 .p1 = { .min = I8XX_P1_MIN, .max = I8XX_P1_MAX }, 235 .p1 = { .min = I8XX_P1_MIN, .max = I8XX_P1_MAX },
129 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT, 236 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
130 .p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST }, 237 .p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST },
238 .find_pll = intel_find_best_PLL,
131 }, 239 },
132 { /* INTEL_LIMIT_I8XX_LVDS */ 240 { /* INTEL_LIMIT_I8XX_LVDS */
133 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX }, 241 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
@@ -140,6 +248,7 @@ static const intel_limit_t intel_limits[] = {
140 .p1 = { .min = I8XX_P1_LVDS_MIN, .max = I8XX_P1_LVDS_MAX }, 248 .p1 = { .min = I8XX_P1_LVDS_MIN, .max = I8XX_P1_LVDS_MAX },
141 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT, 249 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
142 .p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST }, 250 .p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST },
251 .find_pll = intel_find_best_PLL,
143 }, 252 },
144 { /* INTEL_LIMIT_I9XX_SDVO_DAC */ 253 { /* INTEL_LIMIT_I9XX_SDVO_DAC */
145 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, 254 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
@@ -152,6 +261,7 @@ static const intel_limit_t intel_limits[] = {
152 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX }, 261 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX },
153 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 262 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
154 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 263 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
264 .find_pll = intel_find_best_PLL,
155 }, 265 },
156 { /* INTEL_LIMIT_I9XX_LVDS */ 266 { /* INTEL_LIMIT_I9XX_LVDS */
157 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, 267 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
@@ -167,19 +277,157 @@ static const intel_limit_t intel_limits[] = {
167 */ 277 */
168 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 278 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
169 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST }, 279 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST },
280 .find_pll = intel_find_best_PLL,
281 },
282 /* below parameter and function is for G4X Chipset Family*/
283 { /* INTEL_LIMIT_G4X_SDVO */
284 .dot = { .min = G4X_DOT_SDVO_MIN, .max = G4X_DOT_SDVO_MAX },
285 .vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX},
286 .n = { .min = G4X_N_SDVO_MIN, .max = G4X_N_SDVO_MAX },
287 .m = { .min = G4X_M_SDVO_MIN, .max = G4X_M_SDVO_MAX },
288 .m1 = { .min = G4X_M1_SDVO_MIN, .max = G4X_M1_SDVO_MAX },
289 .m2 = { .min = G4X_M2_SDVO_MIN, .max = G4X_M2_SDVO_MAX },
290 .p = { .min = G4X_P_SDVO_MIN, .max = G4X_P_SDVO_MAX },
291 .p1 = { .min = G4X_P1_SDVO_MIN, .max = G4X_P1_SDVO_MAX},
292 .p2 = { .dot_limit = G4X_P2_SDVO_LIMIT,
293 .p2_slow = G4X_P2_SDVO_SLOW,
294 .p2_fast = G4X_P2_SDVO_FAST
295 },
296 .find_pll = intel_g4x_find_best_PLL,
297 },
298 { /* INTEL_LIMIT_G4X_HDMI_DAC */
299 .dot = { .min = G4X_DOT_HDMI_DAC_MIN, .max = G4X_DOT_HDMI_DAC_MAX },
300 .vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX},
301 .n = { .min = G4X_N_HDMI_DAC_MIN, .max = G4X_N_HDMI_DAC_MAX },
302 .m = { .min = G4X_M_HDMI_DAC_MIN, .max = G4X_M_HDMI_DAC_MAX },
303 .m1 = { .min = G4X_M1_HDMI_DAC_MIN, .max = G4X_M1_HDMI_DAC_MAX },
304 .m2 = { .min = G4X_M2_HDMI_DAC_MIN, .max = G4X_M2_HDMI_DAC_MAX },
305 .p = { .min = G4X_P_HDMI_DAC_MIN, .max = G4X_P_HDMI_DAC_MAX },
306 .p1 = { .min = G4X_P1_HDMI_DAC_MIN, .max = G4X_P1_HDMI_DAC_MAX},
307 .p2 = { .dot_limit = G4X_P2_HDMI_DAC_LIMIT,
308 .p2_slow = G4X_P2_HDMI_DAC_SLOW,
309 .p2_fast = G4X_P2_HDMI_DAC_FAST
310 },
311 .find_pll = intel_g4x_find_best_PLL,
312 },
313 { /* INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS */
314 .dot = { .min = G4X_DOT_SINGLE_CHANNEL_LVDS_MIN,
315 .max = G4X_DOT_SINGLE_CHANNEL_LVDS_MAX },
316 .vco = { .min = G4X_VCO_MIN,
317 .max = G4X_VCO_MAX },
318 .n = { .min = G4X_N_SINGLE_CHANNEL_LVDS_MIN,
319 .max = G4X_N_SINGLE_CHANNEL_LVDS_MAX },
320 .m = { .min = G4X_M_SINGLE_CHANNEL_LVDS_MIN,
321 .max = G4X_M_SINGLE_CHANNEL_LVDS_MAX },
322 .m1 = { .min = G4X_M1_SINGLE_CHANNEL_LVDS_MIN,
323 .max = G4X_M1_SINGLE_CHANNEL_LVDS_MAX },
324 .m2 = { .min = G4X_M2_SINGLE_CHANNEL_LVDS_MIN,
325 .max = G4X_M2_SINGLE_CHANNEL_LVDS_MAX },
326 .p = { .min = G4X_P_SINGLE_CHANNEL_LVDS_MIN,
327 .max = G4X_P_SINGLE_CHANNEL_LVDS_MAX },
328 .p1 = { .min = G4X_P1_SINGLE_CHANNEL_LVDS_MIN,
329 .max = G4X_P1_SINGLE_CHANNEL_LVDS_MAX },
330 .p2 = { .dot_limit = G4X_P2_SINGLE_CHANNEL_LVDS_LIMIT,
331 .p2_slow = G4X_P2_SINGLE_CHANNEL_LVDS_SLOW,
332 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
333 },
334 .find_pll = intel_g4x_find_best_PLL,
335 },
336 { /* INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS */
337 .dot = { .min = G4X_DOT_DUAL_CHANNEL_LVDS_MIN,
338 .max = G4X_DOT_DUAL_CHANNEL_LVDS_MAX },
339 .vco = { .min = G4X_VCO_MIN,
340 .max = G4X_VCO_MAX },
341 .n = { .min = G4X_N_DUAL_CHANNEL_LVDS_MIN,
342 .max = G4X_N_DUAL_CHANNEL_LVDS_MAX },
343 .m = { .min = G4X_M_DUAL_CHANNEL_LVDS_MIN,
344 .max = G4X_M_DUAL_CHANNEL_LVDS_MAX },
345 .m1 = { .min = G4X_M1_DUAL_CHANNEL_LVDS_MIN,
346 .max = G4X_M1_DUAL_CHANNEL_LVDS_MAX },
347 .m2 = { .min = G4X_M2_DUAL_CHANNEL_LVDS_MIN,
348 .max = G4X_M2_DUAL_CHANNEL_LVDS_MAX },
349 .p = { .min = G4X_P_DUAL_CHANNEL_LVDS_MIN,
350 .max = G4X_P_DUAL_CHANNEL_LVDS_MAX },
351 .p1 = { .min = G4X_P1_DUAL_CHANNEL_LVDS_MIN,
352 .max = G4X_P1_DUAL_CHANNEL_LVDS_MAX },
353 .p2 = { .dot_limit = G4X_P2_DUAL_CHANNEL_LVDS_LIMIT,
354 .p2_slow = G4X_P2_DUAL_CHANNEL_LVDS_SLOW,
355 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
356 },
357 .find_pll = intel_g4x_find_best_PLL,
358 },
359 { /* INTEL_LIMIT_IGD_SDVO */
360 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX},
361 .vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX },
362 .n = { .min = IGD_N_MIN, .max = IGD_N_MAX },
363 .m = { .min = IGD_M_MIN, .max = IGD_M_MAX },
364 .m1 = { .min = IGD_M1_MIN, .max = IGD_M1_MAX },
365 .m2 = { .min = IGD_M2_MIN, .max = IGD_M2_MAX },
366 .p = { .min = I9XX_P_SDVO_DAC_MIN, .max = I9XX_P_SDVO_DAC_MAX },
367 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX },
368 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
369 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
170 }, 370 },
371 { /* INTEL_LIMIT_IGD_LVDS */
372 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
373 .vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX },
374 .n = { .min = IGD_N_MIN, .max = IGD_N_MAX },
375 .m = { .min = IGD_M_MIN, .max = IGD_M_MAX },
376 .m1 = { .min = IGD_M1_MIN, .max = IGD_M1_MAX },
377 .m2 = { .min = IGD_M2_MIN, .max = IGD_M2_MAX },
378 .p = { .min = IGD_P_LVDS_MIN, .max = IGD_P_LVDS_MAX },
379 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX },
380 /* IGD only supports single-channel mode. */
381 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
382 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW },
383 },
384
171}; 385};
172 386
387static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
388{
389 struct drm_device *dev = crtc->dev;
390 struct drm_i915_private *dev_priv = dev->dev_private;
391 const intel_limit_t *limit;
392
393 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
394 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
395 LVDS_CLKB_POWER_UP)
396 /* LVDS with dual channel */
397 limit = &intel_limits
398 [INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS];
399 else
400 /* LVDS with dual channel */
401 limit = &intel_limits
402 [INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS];
403 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
404 intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
405 limit = &intel_limits[INTEL_LIMIT_G4X_HDMI_DAC];
406 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
407 limit = &intel_limits[INTEL_LIMIT_G4X_SDVO];
408 } else /* The option is for other outputs */
409 limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
410
411 return limit;
412}
413
173static const intel_limit_t *intel_limit(struct drm_crtc *crtc) 414static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
174{ 415{
175 struct drm_device *dev = crtc->dev; 416 struct drm_device *dev = crtc->dev;
176 const intel_limit_t *limit; 417 const intel_limit_t *limit;
177 418
178 if (IS_I9XX(dev)) { 419 if (IS_G4X(dev)) {
420 limit = intel_g4x_limit(crtc);
421 } else if (IS_I9XX(dev) && !IS_IGD(dev)) {
179 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 422 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
180 limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS]; 423 limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS];
181 else 424 else
182 limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC]; 425 limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
426 } else if (IS_IGD(dev)) {
427 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
428 limit = &intel_limits[INTEL_LIMIT_IGD_LVDS];
429 else
430 limit = &intel_limits[INTEL_LIMIT_IGD_SDVO_DAC];
183 } else { 431 } else {
184 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 432 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
185 limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS]; 433 limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS];
@@ -189,8 +437,21 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
189 return limit; 437 return limit;
190} 438}
191 439
192static void intel_clock(int refclk, intel_clock_t *clock) 440/* m1 is reserved as 0 in IGD, n is a ring counter */
441static void igd_clock(int refclk, intel_clock_t *clock)
442{
443 clock->m = clock->m2 + 2;
444 clock->p = clock->p1 * clock->p2;
445 clock->vco = refclk * clock->m / clock->n;
446 clock->dot = clock->vco / clock->p;
447}
448
449static void intel_clock(struct drm_device *dev, int refclk, intel_clock_t *clock)
193{ 450{
451 if (IS_IGD(dev)) {
452 igd_clock(refclk, clock);
453 return;
454 }
194 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); 455 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
195 clock->p = clock->p1 * clock->p2; 456 clock->p = clock->p1 * clock->p2;
196 clock->vco = refclk * clock->m / (clock->n + 2); 457 clock->vco = refclk * clock->m / (clock->n + 2);
@@ -226,6 +487,7 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type)
226static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock) 487static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock)
227{ 488{
228 const intel_limit_t *limit = intel_limit (crtc); 489 const intel_limit_t *limit = intel_limit (crtc);
490 struct drm_device *dev = crtc->dev;
229 491
230 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) 492 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)
231 INTELPllInvalid ("p1 out of range\n"); 493 INTELPllInvalid ("p1 out of range\n");
@@ -235,7 +497,7 @@ static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock)
235 INTELPllInvalid ("m2 out of range\n"); 497 INTELPllInvalid ("m2 out of range\n");
236 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) 498 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)
237 INTELPllInvalid ("m1 out of range\n"); 499 INTELPllInvalid ("m1 out of range\n");
238 if (clock->m1 <= clock->m2) 500 if (clock->m1 <= clock->m2 && !IS_IGD(dev))
239 INTELPllInvalid ("m1 <= m2\n"); 501 INTELPllInvalid ("m1 <= m2\n");
240 if (clock->m < limit->m.min || limit->m.max < clock->m) 502 if (clock->m < limit->m.min || limit->m.max < clock->m)
241 INTELPllInvalid ("m out of range\n"); 503 INTELPllInvalid ("m out of range\n");
@@ -252,18 +514,14 @@ static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock)
252 return true; 514 return true;
253} 515}
254 516
255/** 517static bool
256 * Returns a set of divisors for the desired target clock with the given 518intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
257 * refclk, or FALSE. The returned values represent the clock equation: 519 int target, int refclk, intel_clock_t *best_clock)
258 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2. 520
259 */
260static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
261 int refclk, intel_clock_t *best_clock)
262{ 521{
263 struct drm_device *dev = crtc->dev; 522 struct drm_device *dev = crtc->dev;
264 struct drm_i915_private *dev_priv = dev->dev_private; 523 struct drm_i915_private *dev_priv = dev->dev_private;
265 intel_clock_t clock; 524 intel_clock_t clock;
266 const intel_limit_t *limit = intel_limit(crtc);
267 int err = target; 525 int err = target;
268 526
269 if (IS_I9XX(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) && 527 if (IS_I9XX(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
@@ -289,15 +547,17 @@ static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
289 memset (best_clock, 0, sizeof (*best_clock)); 547 memset (best_clock, 0, sizeof (*best_clock));
290 548
291 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { 549 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
292 for (clock.m2 = limit->m2.min; clock.m2 < clock.m1 && 550 for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) {
293 clock.m2 <= limit->m2.max; clock.m2++) { 551 /* m1 is always 0 in IGD */
552 if (clock.m2 >= clock.m1 && !IS_IGD(dev))
553 break;
294 for (clock.n = limit->n.min; clock.n <= limit->n.max; 554 for (clock.n = limit->n.min; clock.n <= limit->n.max;
295 clock.n++) { 555 clock.n++) {
296 for (clock.p1 = limit->p1.min; 556 for (clock.p1 = limit->p1.min;
297 clock.p1 <= limit->p1.max; clock.p1++) { 557 clock.p1 <= limit->p1.max; clock.p1++) {
298 int this_err; 558 int this_err;
299 559
300 intel_clock(refclk, &clock); 560 intel_clock(dev, refclk, &clock);
301 561
302 if (!intel_PLL_is_valid(crtc, &clock)) 562 if (!intel_PLL_is_valid(crtc, &clock))
303 continue; 563 continue;
@@ -315,11 +575,68 @@ static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
315 return (err != target); 575 return (err != target);
316} 576}
317 577
578static bool
579intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
580 int target, int refclk, intel_clock_t *best_clock)
581{
582 struct drm_device *dev = crtc->dev;
583 struct drm_i915_private *dev_priv = dev->dev_private;
584 intel_clock_t clock;
585 int max_n;
586 bool found;
587 /* approximately equals target * 0.00488 */
588 int err_most = (target >> 8) + (target >> 10);
589 found = false;
590
591 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
592 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
593 LVDS_CLKB_POWER_UP)
594 clock.p2 = limit->p2.p2_fast;
595 else
596 clock.p2 = limit->p2.p2_slow;
597 } else {
598 if (target < limit->p2.dot_limit)
599 clock.p2 = limit->p2.p2_slow;
600 else
601 clock.p2 = limit->p2.p2_fast;
602 }
603
604 memset(best_clock, 0, sizeof(*best_clock));
605 max_n = limit->n.max;
606 /* based on hardware requriment prefer smaller n to precision */
607 for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
608 /* based on hardware requirment prefere larger m1,m2, p1 */
609 for (clock.m1 = limit->m1.max;
610 clock.m1 >= limit->m1.min; clock.m1--) {
611 for (clock.m2 = limit->m2.max;
612 clock.m2 >= limit->m2.min; clock.m2--) {
613 for (clock.p1 = limit->p1.max;
614 clock.p1 >= limit->p1.min; clock.p1--) {
615 int this_err;
616
617 intel_clock(dev, refclk, &clock);
618 if (!intel_PLL_is_valid(crtc, &clock))
619 continue;
620 this_err = abs(clock.dot - target) ;
621 if (this_err < err_most) {
622 *best_clock = clock;
623 err_most = this_err;
624 max_n = clock.n;
625 found = true;
626 }
627 }
628 }
629 }
630 }
631
632 return found;
633}
634
318void 635void
319intel_wait_for_vblank(struct drm_device *dev) 636intel_wait_for_vblank(struct drm_device *dev)
320{ 637{
321 /* Wait for 20ms, i.e. one cycle at 50hz. */ 638 /* Wait for 20ms, i.e. one cycle at 50hz. */
322 udelay(20000); 639 mdelay(20);
323} 640}
324 641
325static int 642static int
@@ -634,7 +951,7 @@ static int intel_get_core_clock_speed(struct drm_device *dev)
634 return 400000; 951 return 400000;
635 else if (IS_I915G(dev)) 952 else if (IS_I915G(dev))
636 return 333000; 953 return 333000;
637 else if (IS_I945GM(dev) || IS_845G(dev)) 954 else if (IS_I945GM(dev) || IS_845G(dev) || IS_IGDGM(dev))
638 return 200000; 955 return 200000;
639 else if (IS_I915GM(dev)) { 956 else if (IS_I915GM(dev)) {
640 u16 gcfgc = 0; 957 u16 gcfgc = 0;
@@ -733,6 +1050,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
733 bool is_crt = false, is_lvds = false, is_tv = false; 1050 bool is_crt = false, is_lvds = false, is_tv = false;
734 struct drm_mode_config *mode_config = &dev->mode_config; 1051 struct drm_mode_config *mode_config = &dev->mode_config;
735 struct drm_connector *connector; 1052 struct drm_connector *connector;
1053 const intel_limit_t *limit;
736 int ret; 1054 int ret;
737 1055
738 drm_vblank_pre_modeset(dev, pipe); 1056 drm_vblank_pre_modeset(dev, pipe);
@@ -776,13 +1094,42 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
776 refclk = 48000; 1094 refclk = 48000;
777 } 1095 }
778 1096
779 ok = intel_find_best_PLL(crtc, adjusted_mode->clock, refclk, &clock); 1097 /*
1098 * Returns a set of divisors for the desired target clock with the given
1099 * refclk, or FALSE. The returned values represent the clock equation:
1100 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
1101 */
1102 limit = intel_limit(crtc);
1103 ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock);
780 if (!ok) { 1104 if (!ok) {
781 DRM_ERROR("Couldn't find PLL settings for mode!\n"); 1105 DRM_ERROR("Couldn't find PLL settings for mode!\n");
782 return -EINVAL; 1106 return -EINVAL;
783 } 1107 }
784 1108
785 fp = clock.n << 16 | clock.m1 << 8 | clock.m2; 1109 /* SDVO TV has fixed PLL values depend on its clock range,
1110 this mirrors vbios setting. */
1111 if (is_sdvo && is_tv) {
1112 if (adjusted_mode->clock >= 100000
1113 && adjusted_mode->clock < 140500) {
1114 clock.p1 = 2;
1115 clock.p2 = 10;
1116 clock.n = 3;
1117 clock.m1 = 16;
1118 clock.m2 = 8;
1119 } else if (adjusted_mode->clock >= 140500
1120 && adjusted_mode->clock <= 200000) {
1121 clock.p1 = 1;
1122 clock.p2 = 10;
1123 clock.n = 6;
1124 clock.m1 = 12;
1125 clock.m2 = 8;
1126 }
1127 }
1128
1129 if (IS_IGD(dev))
1130 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
1131 else
1132 fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
786 1133
787 dpll = DPLL_VGA_MODE_DIS; 1134 dpll = DPLL_VGA_MODE_DIS;
788 if (IS_I9XX(dev)) { 1135 if (IS_I9XX(dev)) {
@@ -799,7 +1146,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
799 } 1146 }
800 1147
801 /* compute bitmask from p1 value */ 1148 /* compute bitmask from p1 value */
802 dpll |= (1 << (clock.p1 - 1)) << 16; 1149 if (IS_IGD(dev))
1150 dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_IGD;
1151 else
1152 dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
803 switch (clock.p2) { 1153 switch (clock.p2) {
804 case 5: 1154 case 5:
805 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; 1155 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5;
@@ -1279,10 +1629,20 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1279 fp = I915_READ((pipe == 0) ? FPA1 : FPB1); 1629 fp = I915_READ((pipe == 0) ? FPA1 : FPB1);
1280 1630
1281 clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; 1631 clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
1282 clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; 1632 if (IS_IGD(dev)) {
1283 clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT; 1633 clock.n = ffs((fp & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;
1634 clock.m2 = (fp & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT;
1635 } else {
1636 clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;
1637 clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;
1638 }
1639
1284 if (IS_I9XX(dev)) { 1640 if (IS_I9XX(dev)) {
1285 clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >> 1641 if (IS_IGD(dev))
1642 clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >>
1643 DPLL_FPA01_P1_POST_DIV_SHIFT_IGD);
1644 else
1645 clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
1286 DPLL_FPA01_P1_POST_DIV_SHIFT); 1646 DPLL_FPA01_P1_POST_DIV_SHIFT);
1287 1647
1288 switch (dpll & DPLL_MODE_MASK) { 1648 switch (dpll & DPLL_MODE_MASK) {
@@ -1301,7 +1661,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1301 } 1661 }
1302 1662
1303 /* XXX: Handle the 100Mhz refclk */ 1663 /* XXX: Handle the 100Mhz refclk */
1304 intel_clock(96000, &clock); 1664 intel_clock(dev, 96000, &clock);
1305 } else { 1665 } else {
1306 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN); 1666 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN);
1307 1667
@@ -1313,9 +1673,9 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1313 if ((dpll & PLL_REF_INPUT_MASK) == 1673 if ((dpll & PLL_REF_INPUT_MASK) ==
1314 PLLB_REF_INPUT_SPREADSPECTRUMIN) { 1674 PLLB_REF_INPUT_SPREADSPECTRUMIN) {
1315 /* XXX: might not be 66MHz */ 1675 /* XXX: might not be 66MHz */
1316 intel_clock(66000, &clock); 1676 intel_clock(dev, 66000, &clock);
1317 } else 1677 } else
1318 intel_clock(48000, &clock); 1678 intel_clock(dev, 48000, &clock);
1319 } else { 1679 } else {
1320 if (dpll & PLL_P1_DIVIDE_BY_TWO) 1680 if (dpll & PLL_P1_DIVIDE_BY_TWO)
1321 clock.p1 = 2; 1681 clock.p1 = 2;
@@ -1328,7 +1688,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1328 else 1688 else
1329 clock.p2 = 2; 1689 clock.p2 = 2;
1330 1690
1331 intel_clock(48000, &clock); 1691 intel_clock(dev, 48000, &clock);
1332 } 1692 }
1333 } 1693 }
1334 1694
@@ -1474,13 +1834,21 @@ static void intel_setup_outputs(struct drm_device *dev)
1474 1834
1475 if (IS_I9XX(dev)) { 1835 if (IS_I9XX(dev)) {
1476 int found; 1836 int found;
1837 u32 reg;
1477 1838
1478 if (I915_READ(SDVOB) & SDVO_DETECTED) { 1839 if (I915_READ(SDVOB) & SDVO_DETECTED) {
1479 found = intel_sdvo_init(dev, SDVOB); 1840 found = intel_sdvo_init(dev, SDVOB);
1480 if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) 1841 if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
1481 intel_hdmi_init(dev, SDVOB); 1842 intel_hdmi_init(dev, SDVOB);
1482 } 1843 }
1483 if (!IS_G4X(dev) || (I915_READ(SDVOB) & SDVO_DETECTED)) { 1844
1845 /* Before G4X SDVOC doesn't have its own detect register */
1846 if (IS_G4X(dev))
1847 reg = SDVOC;
1848 else
1849 reg = SDVOB;
1850
1851 if (I915_READ(reg) & SDVO_DETECTED) {
1484 found = intel_sdvo_init(dev, SDVOC); 1852 found = intel_sdvo_init(dev, SDVOC);
1485 if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) 1853 if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
1486 intel_hdmi_init(dev, SDVOC); 1854 intel_hdmi_init(dev, SDVOC);
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 0d211af9885..6619f26e46a 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -265,7 +265,7 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
265 pfit_control = 0; 265 pfit_control = 0;
266 266
267 if (!IS_I965G(dev)) { 267 if (!IS_I965G(dev)) {
268 if (dev_priv->panel_wants_dither) 268 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
269 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 269 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
270 } 270 }
271 else 271 else
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index e42019e5d66..07d7ec97616 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -76,6 +76,7 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
76 drm_mode_connector_update_edid_property(&intel_output->base, 76 drm_mode_connector_update_edid_property(&intel_output->base,
77 edid); 77 edid);
78 ret = drm_add_edid_modes(&intel_output->base, edid); 78 ret = drm_add_edid_modes(&intel_output->base, edid);
79 intel_output->base.display_info.raw_edid = NULL;
79 kfree(edid); 80 kfree(edid);
80 } 81 }
81 82
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index fbe6f3931b1..7b31f55f55c 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -273,20 +273,20 @@ static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd,
273 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; 273 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
274 int i; 274 int i;
275 275
276 DRM_DEBUG("%s: W: %02X ", SDVO_NAME(sdvo_priv), cmd); 276 printk(KERN_DEBUG "%s: W: %02X ", SDVO_NAME(sdvo_priv), cmd);
277 for (i = 0; i < args_len; i++) 277 for (i = 0; i < args_len; i++)
278 printk("%02X ", ((u8 *)args)[i]); 278 printk(KERN_DEBUG "%02X ", ((u8 *)args)[i]);
279 for (; i < 8; i++) 279 for (; i < 8; i++)
280 printk(" "); 280 printk(KERN_DEBUG " ");
281 for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) { 281 for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) {
282 if (cmd == sdvo_cmd_names[i].cmd) { 282 if (cmd == sdvo_cmd_names[i].cmd) {
283 printk("(%s)", sdvo_cmd_names[i].name); 283 printk(KERN_DEBUG "(%s)", sdvo_cmd_names[i].name);
284 break; 284 break;
285 } 285 }
286 } 286 }
287 if (i == sizeof(sdvo_cmd_names)/ sizeof(sdvo_cmd_names[0])) 287 if (i == sizeof(sdvo_cmd_names)/ sizeof(sdvo_cmd_names[0]))
288 printk("(%02X)",cmd); 288 printk(KERN_DEBUG "(%02X)", cmd);
289 printk("\n"); 289 printk(KERN_DEBUG "\n");
290} 290}
291#else 291#else
292#define intel_sdvo_debug_write(o, c, a, l) 292#define intel_sdvo_debug_write(o, c, a, l)
@@ -323,17 +323,18 @@ static void intel_sdvo_debug_response(struct intel_output *intel_output,
323 u8 status) 323 u8 status)
324{ 324{
325 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; 325 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
326 int i;
326 327
327 DRM_DEBUG("%s: R: ", SDVO_NAME(sdvo_priv)); 328 printk(KERN_DEBUG "%s: R: ", SDVO_NAME(sdvo_priv));
328 for (i = 0; i < response_len; i++) 329 for (i = 0; i < response_len; i++)
329 printk("%02X ", ((u8 *)response)[i]); 330 printk(KERN_DEBUG "%02X ", ((u8 *)response)[i]);
330 for (; i < 8; i++) 331 for (; i < 8; i++)
331 printk(" "); 332 printk(KERN_DEBUG " ");
332 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 333 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
333 printk("(%s)", cmd_status_names[status]); 334 printk(KERN_DEBUG "(%s)", cmd_status_names[status]);
334 else 335 else
335 printk("(??? %d)", status); 336 printk(KERN_DEBUG "(??? %d)", status);
336 printk("\n"); 337 printk(KERN_DEBUG "\n");
337} 338}
338#else 339#else
339#define intel_sdvo_debug_response(o, r, l, s) 340#define intel_sdvo_debug_response(o, r, l, s)
@@ -588,9 +589,12 @@ intel_sdvo_create_preferred_input_timing(struct intel_output *output,
588 struct intel_sdvo_preferred_input_timing_args args; 589 struct intel_sdvo_preferred_input_timing_args args;
589 uint8_t status; 590 uint8_t status;
590 591
592 memset(&args, 0, sizeof(args));
591 args.clock = clock; 593 args.clock = clock;
592 args.width = width; 594 args.width = width;
593 args.height = height; 595 args.height = height;
596 args.interlace = 0;
597 args.scaled = 0;
594 intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 598 intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
595 &args, sizeof(args)); 599 &args, sizeof(args));
596 status = intel_sdvo_read_response(output, NULL, 0); 600 status = intel_sdvo_read_response(output, NULL, 0);
@@ -683,7 +687,7 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
683 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 687 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
684 ((v_blank_len >> 8) & 0xf); 688 ((v_blank_len >> 8) & 0xf);
685 689
686 dtd->part2.h_sync_off = h_sync_offset; 690 dtd->part2.h_sync_off = h_sync_offset & 0xff;
687 dtd->part2.h_sync_width = h_sync_len & 0xff; 691 dtd->part2.h_sync_width = h_sync_len & 0xff;
688 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 692 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
689 (v_sync_len & 0xf); 693 (v_sync_len & 0xf);
@@ -705,27 +709,10 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
705static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 709static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
706 struct intel_sdvo_dtd *dtd) 710 struct intel_sdvo_dtd *dtd)
707{ 711{
708 uint16_t width, height;
709 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
710 uint16_t h_sync_offset, v_sync_offset;
711
712 width = mode->crtc_hdisplay;
713 height = mode->crtc_vdisplay;
714
715 /* do some mode translations */
716 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
717 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
718
719 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
720 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
721
722 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
723 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
724
725 mode->hdisplay = dtd->part1.h_active; 712 mode->hdisplay = dtd->part1.h_active;
726 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 713 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
727 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 714 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
728 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xa0) << 2; 715 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
729 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 716 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
730 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 717 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
731 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 718 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
@@ -735,7 +722,7 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
735 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 722 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
736 mode->vsync_start = mode->vdisplay; 723 mode->vsync_start = mode->vdisplay;
737 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 724 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
738 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0a) << 2; 725 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
739 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 726 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
740 mode->vsync_end = mode->vsync_start + 727 mode->vsync_end = mode->vsync_start +
741 (dtd->part2.v_sync_off_width & 0xf); 728 (dtd->part2.v_sync_off_width & 0xf);
@@ -745,7 +732,7 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
745 732
746 mode->clock = dtd->part1.clock * 10; 733 mode->clock = dtd->part1.clock * 10;
747 734
748 mode->flags &= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 735 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
749 if (dtd->part2.dtd_flags & 0x2) 736 if (dtd->part2.dtd_flags & 0x2)
750 mode->flags |= DRM_MODE_FLAG_PHSYNC; 737 mode->flags |= DRM_MODE_FLAG_PHSYNC;
751 if (dtd->part2.dtd_flags & 0x4) 738 if (dtd->part2.dtd_flags & 0x4)
@@ -924,6 +911,27 @@ static void intel_sdvo_set_avi_infoframe(struct intel_output *output,
924 SDVO_HBUF_TX_VSYNC); 911 SDVO_HBUF_TX_VSYNC);
925} 912}
926 913
914static void intel_sdvo_set_tv_format(struct intel_output *output)
915{
916 struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
917 struct intel_sdvo_tv_format *format, unset;
918 u8 status;
919
920 format = &sdvo_priv->tv_format;
921 memset(&unset, 0, sizeof(unset));
922 if (memcmp(format, &unset, sizeof(*format))) {
923 DRM_DEBUG("%s: Choosing default TV format of NTSC-M\n",
924 SDVO_NAME(sdvo_priv));
925 format->ntsc_m = 1;
926 intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, format,
927 sizeof(*format));
928 status = intel_sdvo_read_response(output, NULL, 0);
929 if (status != SDVO_CMD_STATUS_SUCCESS)
930 DRM_DEBUG("%s: Failed to set TV format\n",
931 SDVO_NAME(sdvo_priv));
932 }
933}
934
927static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, 935static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
928 struct drm_display_mode *mode, 936 struct drm_display_mode *mode,
929 struct drm_display_mode *adjusted_mode) 937 struct drm_display_mode *adjusted_mode)
@@ -968,6 +976,12 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
968 &input_dtd); 976 &input_dtd);
969 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 977 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
970 978
979 drm_mode_set_crtcinfo(adjusted_mode, 0);
980
981 mode->clock = adjusted_mode->clock;
982
983 adjusted_mode->clock *=
984 intel_sdvo_get_pixel_multiplier(mode);
971 } else { 985 } else {
972 return false; 986 return false;
973 } 987 }
@@ -1012,7 +1026,12 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1012 sdvox |= SDVO_AUDIO_ENABLE; 1026 sdvox |= SDVO_AUDIO_ENABLE;
1013 } 1027 }
1014 1028
1015 intel_sdvo_get_dtd_from_mode(&input_dtd, mode); 1029 /* We have tried to get input timing in mode_fixup, and filled into
1030 adjusted_mode */
1031 if (sdvo_priv->is_tv)
1032 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1033 else
1034 intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
1016 1035
1017 /* If it's a TV, we already set the output timing in mode_fixup. 1036 /* If it's a TV, we already set the output timing in mode_fixup.
1018 * Otherwise, the output timing is equal to the input timing. 1037 * Otherwise, the output timing is equal to the input timing.
@@ -1027,6 +1046,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1027 /* Set the input timing to the screen. Assume always input 0. */ 1046 /* Set the input timing to the screen. Assume always input 0. */
1028 intel_sdvo_set_target_input(output, true, false); 1047 intel_sdvo_set_target_input(output, true, false);
1029 1048
1049 if (sdvo_priv->is_tv)
1050 intel_sdvo_set_tv_format(output);
1051
1030 /* We would like to use intel_sdvo_create_preferred_input_timing() to 1052 /* We would like to use intel_sdvo_create_preferred_input_timing() to
1031 * provide the device with a timing it can support, if it supports that 1053 * provide the device with a timing it can support, if it supports that
1032 * feature. However, presumably we would need to adjust the CRTC to 1054 * feature. However, presumably we would need to adjust the CRTC to
@@ -1395,7 +1417,7 @@ static void
1395intel_sdvo_check_tv_format(struct intel_output *output) 1417intel_sdvo_check_tv_format(struct intel_output *output)
1396{ 1418{
1397 struct intel_sdvo_priv *dev_priv = output->dev_priv; 1419 struct intel_sdvo_priv *dev_priv = output->dev_priv;
1398 struct intel_sdvo_tv_format format, unset; 1420 struct intel_sdvo_tv_format format;
1399 uint8_t status; 1421 uint8_t status;
1400 1422
1401 intel_sdvo_write_cmd(output, SDVO_CMD_GET_TV_FORMAT, NULL, 0); 1423 intel_sdvo_write_cmd(output, SDVO_CMD_GET_TV_FORMAT, NULL, 0);
@@ -1403,15 +1425,7 @@ intel_sdvo_check_tv_format(struct intel_output *output)
1403 if (status != SDVO_CMD_STATUS_SUCCESS) 1425 if (status != SDVO_CMD_STATUS_SUCCESS)
1404 return; 1426 return;
1405 1427
1406 memset(&unset, 0, sizeof(unset)); 1428 memcpy(&dev_priv->tv_format, &format, sizeof(format));
1407 if (memcmp(&format, &unset, sizeof(format))) {
1408 DRM_DEBUG("%s: Choosing default TV format of NTSC-M\n",
1409 SDVO_NAME(dev_priv));
1410
1411 format.ntsc_m = true;
1412 intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, NULL, 0);
1413 status = intel_sdvo_read_response(output, NULL, 0);
1414 }
1415} 1429}
1416 1430
1417/* 1431/*
@@ -1420,68 +1434,70 @@ intel_sdvo_check_tv_format(struct intel_output *output)
1420 * XXX: all 60Hz refresh? 1434 * XXX: all 60Hz refresh?
1421 */ 1435 */
1422struct drm_display_mode sdvo_tv_modes[] = { 1436struct drm_display_mode sdvo_tv_modes[] = {
1423 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815680, 321, 384, 416, 1437 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1424 200, 0, 232, 201, 233, 4196112, 0, 1438 416, 0, 200, 201, 232, 233, 0,
1425 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1426 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814080, 321, 384, 416, 1440 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1427 240, 0, 272, 241, 273, 4196112, 0, 1441 416, 0, 240, 241, 272, 273, 0,
1428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1429 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910080, 401, 464, 496, 1443 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1430 300, 0, 332, 301, 333, 4196112, 0, 1444 496, 0, 300, 301, 332, 333, 0,
1431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1445 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1432 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913280, 641, 704, 736, 1446 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1433 350, 0, 382, 351, 383, 4196112, 0, 1447 736, 0, 350, 351, 382, 383, 0,
1434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1435 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121280, 641, 704, 736, 1449 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1436 400, 0, 432, 401, 433, 4196112, 0, 1450 736, 0, 400, 401, 432, 433, 0,
1437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1438 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121280, 641, 704, 736, 1452 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1439 400, 0, 432, 401, 433, 4196112, 0, 1453 736, 0, 480, 481, 512, 513, 0,
1440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1441 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624000, 705, 768, 800, 1455 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1442 480, 0, 512, 481, 513, 4196112, 0, 1456 800, 0, 480, 481, 512, 513, 0,
1443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1444 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232000, 705, 768, 800, 1458 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1445 576, 0, 608, 577, 609, 4196112, 0, 1459 800, 0, 576, 577, 608, 609, 0,
1446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1447 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751680, 721, 784, 816, 1461 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1448 350, 0, 382, 351, 383, 4196112, 0, 1462 816, 0, 350, 351, 382, 383, 0,
1449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199680, 721, 784, 816, 1464 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1451 400, 0, 432, 401, 433, 4196112, 0, 1465 816, 0, 400, 401, 432, 433, 0,
1452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1453 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116480, 721, 784, 816, 1467 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1454 480, 0, 512, 481, 513, 4196112, 0, 1468 816, 0, 480, 481, 512, 513, 0,
1455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054080, 721, 784, 816, 1470 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1457 540, 0, 572, 541, 573, 4196112, 0, 1471 816, 0, 540, 541, 572, 573, 0,
1458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1459 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816640, 721, 784, 816, 1473 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1460 576, 0, 608, 577, 609, 4196112, 0, 1474 816, 0, 576, 577, 608, 609, 0,
1461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1462 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570560, 769, 832, 864, 1476 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1463 576, 0, 608, 577, 609, 4196112, 0, 1477 864, 0, 576, 577, 608, 609, 0,
1464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030080, 801, 864, 896, 1479 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1466 600, 0, 632, 601, 633, 4196112, 0, 1480 896, 0, 600, 601, 632, 633, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581760, 833, 896, 928, 1482 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1469 624, 0, 656, 625, 657, 4196112, 0, 1483 928, 0, 624, 625, 656, 657, 0,
1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1471 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707040, 921, 984, 1016, 1485 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1472 766, 0, 798, 767, 799, 4196112, 0, 1486 1016, 0, 766, 767, 798, 799, 0,
1473 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1474 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827200, 1025, 1088, 1120, 1488 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1475 768, 0, 800, 769, 801, 4196112, 0, 1489 1120, 0, 768, 769, 800, 801, 0,
1476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1477 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265920, 1281, 1344, 1376, 1491 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1478 1024, 0, 1056, 1025, 1057, 4196112, 0, 1492 1376, 0, 1024, 1025, 1056, 1057, 0,
1479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480}; 1494};
1481 1495
1482static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1496static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1483{ 1497{
1484 struct intel_output *output = to_intel_output(connector); 1498 struct intel_output *output = to_intel_output(connector);
1499 struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
1500 struct intel_sdvo_sdtv_resolution_request tv_res;
1485 uint32_t reply = 0; 1501 uint32_t reply = 0;
1486 uint8_t status; 1502 uint8_t status;
1487 int i = 0; 1503 int i = 0;
@@ -1491,15 +1507,22 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1491 /* Read the list of supported input resolutions for the selected TV 1507 /* Read the list of supported input resolutions for the selected TV
1492 * format. 1508 * format.
1493 */ 1509 */
1510 memset(&tv_res, 0, sizeof(tv_res));
1511 memcpy(&tv_res, &sdvo_priv->tv_format, sizeof(tv_res));
1494 intel_sdvo_write_cmd(output, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1512 intel_sdvo_write_cmd(output, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1495 NULL, 0); 1513 &tv_res, sizeof(tv_res));
1496 status = intel_sdvo_read_response(output, &reply, 3); 1514 status = intel_sdvo_read_response(output, &reply, 3);
1497 if (status != SDVO_CMD_STATUS_SUCCESS) 1515 if (status != SDVO_CMD_STATUS_SUCCESS)
1498 return; 1516 return;
1499 1517
1500 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1518 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1501 if (reply & (1 << i)) 1519 if (reply & (1 << i)) {
1502 drm_mode_probed_add(connector, &sdvo_tv_modes[i]); 1520 struct drm_display_mode *nmode;
1521 nmode = drm_mode_duplicate(connector->dev,
1522 &sdvo_tv_modes[i]);
1523 if (nmode)
1524 drm_mode_probed_add(connector, nmode);
1525 }
1503} 1526}
1504 1527
1505static int intel_sdvo_get_modes(struct drm_connector *connector) 1528static int intel_sdvo_get_modes(struct drm_connector *connector)
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h
index 1117b9c151a..193938b7d7f 100644
--- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
+++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
@@ -100,6 +100,9 @@ struct intel_sdvo_preferred_input_timing_args {
100 u16 clock; 100 u16 clock;
101 u16 width; 101 u16 width;
102 u16 height; 102 u16 height;
103 u8 interlace:1;
104 u8 scaled:1;
105 u8 pad:6;
103} __attribute__((packed)); 106} __attribute__((packed));
104 107
105/* I2C registers for SDVO */ 108/* I2C registers for SDVO */
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 56485d67369..d2c32983242 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -217,8 +217,8 @@ static const u32 filter_table[] = {
217 */ 217 */
218static const struct color_conversion ntsc_m_csc_composite = { 218static const struct color_conversion ntsc_m_csc_composite = {
219 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104, 219 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104,
220 .ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0f00, 220 .ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0200,
221 .rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0f00, 221 .rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0200,
222}; 222};
223 223
224static const struct video_levels ntsc_m_levels_composite = { 224static const struct video_levels ntsc_m_levels_composite = {
@@ -226,9 +226,9 @@ static const struct video_levels ntsc_m_levels_composite = {
226}; 226};
227 227
228static const struct color_conversion ntsc_m_csc_svideo = { 228static const struct color_conversion ntsc_m_csc_svideo = {
229 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0134, 229 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0133,
230 .ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0f00, 230 .ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0200,
231 .rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0f00, 231 .rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0200,
232}; 232};
233 233
234static const struct video_levels ntsc_m_levels_svideo = { 234static const struct video_levels ntsc_m_levels_svideo = {
@@ -237,8 +237,8 @@ static const struct video_levels ntsc_m_levels_svideo = {
237 237
238static const struct color_conversion ntsc_j_csc_composite = { 238static const struct color_conversion ntsc_j_csc_composite = {
239 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0119, 239 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0119,
240 .ru = 0x074c, .gu = 0x0546, .bu = 0x05ec, .au = 0x0f00, 240 .ru = 0x074c, .gu = 0x0546, .bu = 0x05ec, .au = 0x0200,
241 .rv = 0x035a, .gv = 0x0322, .bv = 0x06e1, .av = 0x0f00, 241 .rv = 0x035a, .gv = 0x0322, .bv = 0x06e1, .av = 0x0200,
242}; 242};
243 243
244static const struct video_levels ntsc_j_levels_composite = { 244static const struct video_levels ntsc_j_levels_composite = {
@@ -247,8 +247,8 @@ static const struct video_levels ntsc_j_levels_composite = {
247 247
248static const struct color_conversion ntsc_j_csc_svideo = { 248static const struct color_conversion ntsc_j_csc_svideo = {
249 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x014c, 249 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x014c,
250 .ru = 0x0788, .gu = 0x0581, .bu = 0x0322, .au = 0x0f00, 250 .ru = 0x0788, .gu = 0x0581, .bu = 0x0322, .au = 0x0200,
251 .rv = 0x0399, .gv = 0x0356, .bv = 0x070a, .av = 0x0f00, 251 .rv = 0x0399, .gv = 0x0356, .bv = 0x070a, .av = 0x0200,
252}; 252};
253 253
254static const struct video_levels ntsc_j_levels_svideo = { 254static const struct video_levels ntsc_j_levels_svideo = {
@@ -257,8 +257,8 @@ static const struct video_levels ntsc_j_levels_svideo = {
257 257
258static const struct color_conversion pal_csc_composite = { 258static const struct color_conversion pal_csc_composite = {
259 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0113, 259 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0113,
260 .ru = 0x0745, .gu = 0x053f, .bu = 0x05e1, .au = 0x0f00, 260 .ru = 0x0745, .gu = 0x053f, .bu = 0x05e1, .au = 0x0200,
261 .rv = 0x0353, .gv = 0x031c, .bv = 0x06dc, .av = 0x0f00, 261 .rv = 0x0353, .gv = 0x031c, .bv = 0x06dc, .av = 0x0200,
262}; 262};
263 263
264static const struct video_levels pal_levels_composite = { 264static const struct video_levels pal_levels_composite = {
@@ -267,8 +267,8 @@ static const struct video_levels pal_levels_composite = {
267 267
268static const struct color_conversion pal_csc_svideo = { 268static const struct color_conversion pal_csc_svideo = {
269 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0145, 269 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0145,
270 .ru = 0x0780, .gu = 0x0579, .bu = 0x031c, .au = 0x0f00, 270 .ru = 0x0780, .gu = 0x0579, .bu = 0x031c, .au = 0x0200,
271 .rv = 0x0390, .gv = 0x034f, .bv = 0x0705, .av = 0x0f00, 271 .rv = 0x0390, .gv = 0x034f, .bv = 0x0705, .av = 0x0200,
272}; 272};
273 273
274static const struct video_levels pal_levels_svideo = { 274static const struct video_levels pal_levels_svideo = {
@@ -277,8 +277,8 @@ static const struct video_levels pal_levels_svideo = {
277 277
278static const struct color_conversion pal_m_csc_composite = { 278static const struct color_conversion pal_m_csc_composite = {
279 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104, 279 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104,
280 .ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0f00, 280 .ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0200,
281 .rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0f00, 281 .rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0200,
282}; 282};
283 283
284static const struct video_levels pal_m_levels_composite = { 284static const struct video_levels pal_m_levels_composite = {
@@ -286,9 +286,9 @@ static const struct video_levels pal_m_levels_composite = {
286}; 286};
287 287
288static const struct color_conversion pal_m_csc_svideo = { 288static const struct color_conversion pal_m_csc_svideo = {
289 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0134, 289 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0133,
290 .ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0f00, 290 .ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0200,
291 .rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0f00, 291 .rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0200,
292}; 292};
293 293
294static const struct video_levels pal_m_levels_svideo = { 294static const struct video_levels pal_m_levels_svideo = {
@@ -297,8 +297,8 @@ static const struct video_levels pal_m_levels_svideo = {
297 297
298static const struct color_conversion pal_n_csc_composite = { 298static const struct color_conversion pal_n_csc_composite = {
299 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104, 299 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104,
300 .ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0f00, 300 .ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0200,
301 .rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0f00, 301 .rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0200,
302}; 302};
303 303
304static const struct video_levels pal_n_levels_composite = { 304static const struct video_levels pal_n_levels_composite = {
@@ -306,9 +306,9 @@ static const struct video_levels pal_n_levels_composite = {
306}; 306};
307 307
308static const struct color_conversion pal_n_csc_svideo = { 308static const struct color_conversion pal_n_csc_svideo = {
309 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0134, 309 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0133,
310 .ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0f00, 310 .ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0200,
311 .rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0f00, 311 .rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0200,
312}; 312};
313 313
314static const struct video_levels pal_n_levels_svideo = { 314static const struct video_levels pal_n_levels_svideo = {
@@ -319,9 +319,9 @@ static const struct video_levels pal_n_levels_svideo = {
319 * Component connections 319 * Component connections
320 */ 320 */
321static const struct color_conversion sdtv_csc_yprpb = { 321static const struct color_conversion sdtv_csc_yprpb = {
322 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0146, 322 .ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0145,
323 .ru = 0x0559, .gu = 0x0353, .bu = 0x0100, .au = 0x0f00, 323 .ru = 0x0559, .gu = 0x0353, .bu = 0x0100, .au = 0x0200,
324 .rv = 0x0100, .gv = 0x03ad, .bv = 0x074d, .av = 0x0f00, 324 .rv = 0x0100, .gv = 0x03ad, .bv = 0x074d, .av = 0x0200,
325}; 325};
326 326
327static const struct color_conversion sdtv_csc_rgb = { 327static const struct color_conversion sdtv_csc_rgb = {
@@ -331,9 +331,9 @@ static const struct color_conversion sdtv_csc_rgb = {
331}; 331};
332 332
333static const struct color_conversion hdtv_csc_yprpb = { 333static const struct color_conversion hdtv_csc_yprpb = {
334 .ry = 0x05b3, .gy = 0x016e, .by = 0x0728, .ay = 0x0146, 334 .ry = 0x05b3, .gy = 0x016e, .by = 0x0728, .ay = 0x0145,
335 .ru = 0x07d5, .gu = 0x038b, .bu = 0x0100, .au = 0x0f00, 335 .ru = 0x07d5, .gu = 0x038b, .bu = 0x0100, .au = 0x0200,
336 .rv = 0x0100, .gv = 0x03d1, .bv = 0x06bc, .av = 0x0f00, 336 .rv = 0x0100, .gv = 0x03d1, .bv = 0x06bc, .av = 0x0200,
337}; 337};
338 338
339static const struct color_conversion hdtv_csc_rgb = { 339static const struct color_conversion hdtv_csc_rgb = {
@@ -414,7 +414,7 @@ struct tv_mode {
414static const struct tv_mode tv_modes[] = { 414static const struct tv_mode tv_modes[] = {
415 { 415 {
416 .name = "NTSC-M", 416 .name = "NTSC-M",
417 .clock = 107520, 417 .clock = 108000,
418 .refresh = 29970, 418 .refresh = 29970,
419 .oversample = TV_OVERSAMPLE_8X, 419 .oversample = TV_OVERSAMPLE_8X,
420 .component_only = 0, 420 .component_only = 0,
@@ -442,8 +442,8 @@ static const struct tv_mode tv_modes[] = {
442 .vburst_start_f4 = 10, .vburst_end_f4 = 240, 442 .vburst_start_f4 = 10, .vburst_end_f4 = 240,
443 443
444 /* desired 3.5800000 actual 3.5800000 clock 107.52 */ 444 /* desired 3.5800000 actual 3.5800000 clock 107.52 */
445 .dda1_inc = 136, 445 .dda1_inc = 135,
446 .dda2_inc = 7624, .dda2_size = 20013, 446 .dda2_inc = 20800, .dda2_size = 27456,
447 .dda3_inc = 0, .dda3_size = 0, 447 .dda3_inc = 0, .dda3_size = 0,
448 .sc_reset = TV_SC_RESET_EVERY_4, 448 .sc_reset = TV_SC_RESET_EVERY_4,
449 .pal_burst = false, 449 .pal_burst = false,
@@ -457,7 +457,7 @@ static const struct tv_mode tv_modes[] = {
457 }, 457 },
458 { 458 {
459 .name = "NTSC-443", 459 .name = "NTSC-443",
460 .clock = 107520, 460 .clock = 108000,
461 .refresh = 29970, 461 .refresh = 29970,
462 .oversample = TV_OVERSAMPLE_8X, 462 .oversample = TV_OVERSAMPLE_8X,
463 .component_only = 0, 463 .component_only = 0,
@@ -485,10 +485,10 @@ static const struct tv_mode tv_modes[] = {
485 485
486 /* desired 4.4336180 actual 4.4336180 clock 107.52 */ 486 /* desired 4.4336180 actual 4.4336180 clock 107.52 */
487 .dda1_inc = 168, 487 .dda1_inc = 168,
488 .dda2_inc = 18557, .dda2_size = 20625, 488 .dda2_inc = 4093, .dda2_size = 27456,
489 .dda3_inc = 0, .dda3_size = 0, 489 .dda3_inc = 310, .dda3_size = 525,
490 .sc_reset = TV_SC_RESET_EVERY_8, 490 .sc_reset = TV_SC_RESET_NEVER,
491 .pal_burst = true, 491 .pal_burst = false,
492 492
493 .composite_levels = &ntsc_m_levels_composite, 493 .composite_levels = &ntsc_m_levels_composite,
494 .composite_color = &ntsc_m_csc_composite, 494 .composite_color = &ntsc_m_csc_composite,
@@ -499,7 +499,7 @@ static const struct tv_mode tv_modes[] = {
499 }, 499 },
500 { 500 {
501 .name = "NTSC-J", 501 .name = "NTSC-J",
502 .clock = 107520, 502 .clock = 108000,
503 .refresh = 29970, 503 .refresh = 29970,
504 .oversample = TV_OVERSAMPLE_8X, 504 .oversample = TV_OVERSAMPLE_8X,
505 .component_only = 0, 505 .component_only = 0,
@@ -527,8 +527,8 @@ static const struct tv_mode tv_modes[] = {
527 .vburst_start_f4 = 10, .vburst_end_f4 = 240, 527 .vburst_start_f4 = 10, .vburst_end_f4 = 240,
528 528
529 /* desired 3.5800000 actual 3.5800000 clock 107.52 */ 529 /* desired 3.5800000 actual 3.5800000 clock 107.52 */
530 .dda1_inc = 136, 530 .dda1_inc = 135,
531 .dda2_inc = 7624, .dda2_size = 20013, 531 .dda2_inc = 20800, .dda2_size = 27456,
532 .dda3_inc = 0, .dda3_size = 0, 532 .dda3_inc = 0, .dda3_size = 0,
533 .sc_reset = TV_SC_RESET_EVERY_4, 533 .sc_reset = TV_SC_RESET_EVERY_4,
534 .pal_burst = false, 534 .pal_burst = false,
@@ -542,7 +542,7 @@ static const struct tv_mode tv_modes[] = {
542 }, 542 },
543 { 543 {
544 .name = "PAL-M", 544 .name = "PAL-M",
545 .clock = 107520, 545 .clock = 108000,
546 .refresh = 29970, 546 .refresh = 29970,
547 .oversample = TV_OVERSAMPLE_8X, 547 .oversample = TV_OVERSAMPLE_8X,
548 .component_only = 0, 548 .component_only = 0,
@@ -570,11 +570,11 @@ static const struct tv_mode tv_modes[] = {
570 .vburst_start_f4 = 10, .vburst_end_f4 = 240, 570 .vburst_start_f4 = 10, .vburst_end_f4 = 240,
571 571
572 /* desired 3.5800000 actual 3.5800000 clock 107.52 */ 572 /* desired 3.5800000 actual 3.5800000 clock 107.52 */
573 .dda1_inc = 136, 573 .dda1_inc = 135,
574 .dda2_inc = 7624, .dda2_size = 20013, 574 .dda2_inc = 16704, .dda2_size = 27456,
575 .dda3_inc = 0, .dda3_size = 0, 575 .dda3_inc = 0, .dda3_size = 0,
576 .sc_reset = TV_SC_RESET_EVERY_4, 576 .sc_reset = TV_SC_RESET_EVERY_8,
577 .pal_burst = false, 577 .pal_burst = true,
578 578
579 .composite_levels = &pal_m_levels_composite, 579 .composite_levels = &pal_m_levels_composite,
580 .composite_color = &pal_m_csc_composite, 580 .composite_color = &pal_m_csc_composite,
@@ -586,7 +586,7 @@ static const struct tv_mode tv_modes[] = {
586 { 586 {
587 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */ 587 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
588 .name = "PAL-N", 588 .name = "PAL-N",
589 .clock = 107520, 589 .clock = 108000,
590 .refresh = 25000, 590 .refresh = 25000,
591 .oversample = TV_OVERSAMPLE_8X, 591 .oversample = TV_OVERSAMPLE_8X,
592 .component_only = 0, 592 .component_only = 0,
@@ -615,9 +615,9 @@ static const struct tv_mode tv_modes[] = {
615 615
616 616
617 /* desired 4.4336180 actual 4.4336180 clock 107.52 */ 617 /* desired 4.4336180 actual 4.4336180 clock 107.52 */
618 .dda1_inc = 168, 618 .dda1_inc = 135,
619 .dda2_inc = 18557, .dda2_size = 20625, 619 .dda2_inc = 23578, .dda2_size = 27648,
620 .dda3_inc = 0, .dda3_size = 0, 620 .dda3_inc = 134, .dda3_size = 625,
621 .sc_reset = TV_SC_RESET_EVERY_8, 621 .sc_reset = TV_SC_RESET_EVERY_8,
622 .pal_burst = true, 622 .pal_burst = true,
623 623
@@ -631,12 +631,12 @@ static const struct tv_mode tv_modes[] = {
631 { 631 {
632 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */ 632 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
633 .name = "PAL", 633 .name = "PAL",
634 .clock = 107520, 634 .clock = 108000,
635 .refresh = 25000, 635 .refresh = 25000,
636 .oversample = TV_OVERSAMPLE_8X, 636 .oversample = TV_OVERSAMPLE_8X,
637 .component_only = 0, 637 .component_only = 0,
638 638
639 .hsync_end = 64, .hblank_end = 128, 639 .hsync_end = 64, .hblank_end = 142,
640 .hblank_start = 844, .htotal = 863, 640 .hblank_start = 844, .htotal = 863,
641 641
642 .progressive = false, .trilevel_sync = false, 642 .progressive = false, .trilevel_sync = false,
@@ -659,8 +659,8 @@ static const struct tv_mode tv_modes[] = {
659 659
660 /* desired 4.4336180 actual 4.4336180 clock 107.52 */ 660 /* desired 4.4336180 actual 4.4336180 clock 107.52 */
661 .dda1_inc = 168, 661 .dda1_inc = 168,
662 .dda2_inc = 18557, .dda2_size = 20625, 662 .dda2_inc = 4122, .dda2_size = 27648,
663 .dda3_inc = 0, .dda3_size = 0, 663 .dda3_inc = 67, .dda3_size = 625,
664 .sc_reset = TV_SC_RESET_EVERY_8, 664 .sc_reset = TV_SC_RESET_EVERY_8,
665 .pal_burst = true, 665 .pal_burst = true,
666 666
@@ -689,7 +689,7 @@ static const struct tv_mode tv_modes[] = {
689 .veq_ena = false, 689 .veq_ena = false,
690 690
691 .vi_end_f1 = 44, .vi_end_f2 = 44, 691 .vi_end_f1 = 44, .vi_end_f2 = 44,
692 .nbr_end = 496, 692 .nbr_end = 479,
693 693
694 .burst_ena = false, 694 .burst_ena = false,
695 695
@@ -713,7 +713,7 @@ static const struct tv_mode tv_modes[] = {
713 .veq_ena = false, 713 .veq_ena = false,
714 714
715 .vi_end_f1 = 44, .vi_end_f2 = 44, 715 .vi_end_f1 = 44, .vi_end_f2 = 44,
716 .nbr_end = 496, 716 .nbr_end = 479,
717 717
718 .burst_ena = false, 718 .burst_ena = false,
719 719
@@ -876,7 +876,7 @@ static const struct tv_mode tv_modes[] = {
876 .component_only = 1, 876 .component_only = 1,
877 877
878 .hsync_end = 88, .hblank_end = 235, 878 .hsync_end = 88, .hblank_end = 235,
879 .hblank_start = 2155, .htotal = 2200, 879 .hblank_start = 2155, .htotal = 2201,
880 880
881 .progressive = false, .trilevel_sync = true, 881 .progressive = false, .trilevel_sync = true,
882 882
@@ -1082,7 +1082,7 @@ intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mo
1082 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); 1082 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
1083 1083
1084 /* Ensure TV refresh is close to desired refresh */ 1084 /* Ensure TV refresh is close to desired refresh */
1085 if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode)) < 1) 1085 if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode)) < 10)
1086 return MODE_OK; 1086 return MODE_OK;
1087 return MODE_CLOCK_RANGE; 1087 return MODE_CLOCK_RANGE;
1088} 1088}
@@ -1135,7 +1135,8 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
1135 if (!tv_mode) 1135 if (!tv_mode)
1136 return; /* can't happen (mode_prepare prevents this) */ 1136 return; /* can't happen (mode_prepare prevents this) */
1137 1137
1138 tv_ctl = 0; 1138 tv_ctl = I915_READ(TV_CTL);
1139 tv_ctl &= TV_CTL_SAVE;
1139 1140
1140 switch (tv_priv->type) { 1141 switch (tv_priv->type) {
1141 default: 1142 default:
@@ -1215,7 +1216,6 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
1215 /* dda1 implies valid video levels */ 1216 /* dda1 implies valid video levels */
1216 if (tv_mode->dda1_inc) { 1217 if (tv_mode->dda1_inc) {
1217 scctl1 |= TV_SC_DDA1_EN; 1218 scctl1 |= TV_SC_DDA1_EN;
1218 scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
1219 } 1219 }
1220 1220
1221 if (tv_mode->dda2_inc) 1221 if (tv_mode->dda2_inc)
@@ -1225,6 +1225,7 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
1225 scctl1 |= TV_SC_DDA3_EN; 1225 scctl1 |= TV_SC_DDA3_EN;
1226 1226
1227 scctl1 |= tv_mode->sc_reset; 1227 scctl1 |= tv_mode->sc_reset;
1228 scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
1228 scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT; 1229 scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
1229 1230
1230 scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT | 1231 scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |
@@ -1266,7 +1267,11 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
1266 color_conversion->av); 1267 color_conversion->av);
1267 } 1268 }
1268 1269
1269 I915_WRITE(TV_CLR_KNOBS, 0x00606000); 1270 if (IS_I965G(dev))
1271 I915_WRITE(TV_CLR_KNOBS, 0x00404000);
1272 else
1273 I915_WRITE(TV_CLR_KNOBS, 0x00606000);
1274
1270 if (video_levels) 1275 if (video_levels)
1271 I915_WRITE(TV_CLR_LEVEL, 1276 I915_WRITE(TV_CLR_LEVEL,
1272 ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | 1277 ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
@@ -1401,6 +1406,7 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
1401 tv_dac = I915_READ(TV_DAC); 1406 tv_dac = I915_READ(TV_DAC);
1402 I915_WRITE(TV_DAC, save_tv_dac); 1407 I915_WRITE(TV_DAC, save_tv_dac);
1403 I915_WRITE(TV_CTL, save_tv_ctl); 1408 I915_WRITE(TV_CTL, save_tv_ctl);
1409 intel_wait_for_vblank(dev);
1404 } 1410 }
1405 /* 1411 /*
1406 * A B C 1412 * A B C
@@ -1451,7 +1457,7 @@ intel_tv_detect(struct drm_connector *connector)
1451 mode = reported_modes[0]; 1457 mode = reported_modes[0];
1452 drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); 1458 drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V);
1453 1459
1454 if (encoder->crtc) { 1460 if (encoder->crtc && encoder->crtc->enabled) {
1455 type = intel_tv_detect_type(encoder->crtc, intel_output); 1461 type = intel_tv_detect_type(encoder->crtc, intel_output);
1456 } else { 1462 } else {
1457 crtc = intel_get_load_detect_pipe(intel_output, &mode, &dpms_mode); 1463 crtc = intel_get_load_detect_pipe(intel_output, &mode, &dpms_mode);
@@ -1462,6 +1468,8 @@ intel_tv_detect(struct drm_connector *connector)
1462 type = -1; 1468 type = -1;
1463 } 1469 }
1464 1470
1471 tv_priv->type = type;
1472
1465 if (type < 0) 1473 if (type < 0)
1466 return connector_status_disconnected; 1474 return connector_status_disconnected;
1467 1475
@@ -1495,7 +1503,8 @@ intel_tv_get_modes(struct drm_connector *connector)
1495 struct drm_display_mode *mode_ptr; 1503 struct drm_display_mode *mode_ptr;
1496 struct intel_output *intel_output = to_intel_output(connector); 1504 struct intel_output *intel_output = to_intel_output(connector);
1497 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); 1505 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
1498 int j; 1506 int j, count = 0;
1507 u64 tmp;
1499 1508
1500 for (j = 0; j < sizeof(input_res_table) / sizeof(input_res_table[0]); 1509 for (j = 0; j < sizeof(input_res_table) / sizeof(input_res_table[0]);
1501 j++) { 1510 j++) {
@@ -1510,8 +1519,9 @@ intel_tv_get_modes(struct drm_connector *connector)
1510 && !tv_mode->component_only)) 1519 && !tv_mode->component_only))
1511 continue; 1520 continue;
1512 1521
1513 mode_ptr = drm_calloc(1, sizeof(struct drm_display_mode), 1522 mode_ptr = drm_mode_create(connector->dev);
1514 DRM_MEM_DRIVER); 1523 if (!mode_ptr)
1524 continue;
1515 strncpy(mode_ptr->name, input->name, DRM_DISPLAY_MODE_LEN); 1525 strncpy(mode_ptr->name, input->name, DRM_DISPLAY_MODE_LEN);
1516 1526
1517 mode_ptr->hdisplay = hactive_s; 1527 mode_ptr->hdisplay = hactive_s;
@@ -1528,15 +1538,17 @@ intel_tv_get_modes(struct drm_connector *connector)
1528 mode_ptr->vsync_end = mode_ptr->vsync_start + 1; 1538 mode_ptr->vsync_end = mode_ptr->vsync_start + 1;
1529 mode_ptr->vtotal = vactive_s + 33; 1539 mode_ptr->vtotal = vactive_s + 33;
1530 1540
1531 mode_ptr->clock = (int) (tv_mode->refresh * 1541 tmp = (u64) tv_mode->refresh * mode_ptr->vtotal;
1532 mode_ptr->vtotal * 1542 tmp *= mode_ptr->htotal;
1533 mode_ptr->htotal / 1000) / 1000; 1543 tmp = div_u64(tmp, 1000000);
1544 mode_ptr->clock = (int) tmp;
1534 1545
1535 mode_ptr->type = DRM_MODE_TYPE_DRIVER; 1546 mode_ptr->type = DRM_MODE_TYPE_DRIVER;
1536 drm_mode_probed_add(connector, mode_ptr); 1547 drm_mode_probed_add(connector, mode_ptr);
1548 count++;
1537 } 1549 }
1538 1550
1539 return 0; 1551 return count;
1540} 1552}
1541 1553
1542static void 1554static void
@@ -1558,33 +1570,49 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop
1558 struct drm_device *dev = connector->dev; 1570 struct drm_device *dev = connector->dev;
1559 struct intel_output *intel_output = to_intel_output(connector); 1571 struct intel_output *intel_output = to_intel_output(connector);
1560 struct intel_tv_priv *tv_priv = intel_output->dev_priv; 1572 struct intel_tv_priv *tv_priv = intel_output->dev_priv;
1573 struct drm_encoder *encoder = &intel_output->enc;
1574 struct drm_crtc *crtc = encoder->crtc;
1561 int ret = 0; 1575 int ret = 0;
1576 bool changed = false;
1562 1577
1563 ret = drm_connector_property_set_value(connector, property, val); 1578 ret = drm_connector_property_set_value(connector, property, val);
1564 if (ret < 0) 1579 if (ret < 0)
1565 goto out; 1580 goto out;
1566 1581
1567 if (property == dev->mode_config.tv_left_margin_property) 1582 if (property == dev->mode_config.tv_left_margin_property &&
1583 tv_priv->margin[TV_MARGIN_LEFT] != val) {
1568 tv_priv->margin[TV_MARGIN_LEFT] = val; 1584 tv_priv->margin[TV_MARGIN_LEFT] = val;
1569 else if (property == dev->mode_config.tv_right_margin_property) 1585 changed = true;
1586 } else if (property == dev->mode_config.tv_right_margin_property &&
1587 tv_priv->margin[TV_MARGIN_RIGHT] != val) {
1570 tv_priv->margin[TV_MARGIN_RIGHT] = val; 1588 tv_priv->margin[TV_MARGIN_RIGHT] = val;
1571 else if (property == dev->mode_config.tv_top_margin_property) 1589 changed = true;
1590 } else if (property == dev->mode_config.tv_top_margin_property &&
1591 tv_priv->margin[TV_MARGIN_TOP] != val) {
1572 tv_priv->margin[TV_MARGIN_TOP] = val; 1592 tv_priv->margin[TV_MARGIN_TOP] = val;
1573 else if (property == dev->mode_config.tv_bottom_margin_property) 1593 changed = true;
1594 } else if (property == dev->mode_config.tv_bottom_margin_property &&
1595 tv_priv->margin[TV_MARGIN_BOTTOM] != val) {
1574 tv_priv->margin[TV_MARGIN_BOTTOM] = val; 1596 tv_priv->margin[TV_MARGIN_BOTTOM] = val;
1575 else if (property == dev->mode_config.tv_mode_property) { 1597 changed = true;
1598 } else if (property == dev->mode_config.tv_mode_property) {
1576 if (val >= NUM_TV_MODES) { 1599 if (val >= NUM_TV_MODES) {
1577 ret = -EINVAL; 1600 ret = -EINVAL;
1578 goto out; 1601 goto out;
1579 } 1602 }
1603 if (!strcmp(tv_priv->tv_format, tv_modes[val].name))
1604 goto out;
1605
1580 tv_priv->tv_format = tv_modes[val].name; 1606 tv_priv->tv_format = tv_modes[val].name;
1581 intel_tv_mode_set(&intel_output->enc, NULL, NULL); 1607 changed = true;
1582 } else { 1608 } else {
1583 ret = -EINVAL; 1609 ret = -EINVAL;
1584 goto out; 1610 goto out;
1585 } 1611 }
1586 1612
1587 intel_tv_mode_set(&intel_output->enc, NULL, NULL); 1613 if (changed && crtc)
1614 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1615 crtc->y, crtc->fb);
1588out: 1616out:
1589 return ret; 1617 return ret;
1590} 1618}
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index b49c5ff2958..7a6bf9ffc5a 100644
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -148,8 +148,8 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
148 primary->space = head - tail; 148 primary->space = head - tail;
149 } 149 }
150 150
151 DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv->primary->offset); 151 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
152 DRM_DEBUG(" tail = 0x%06lx\n", tail - dev_priv->primary->offset); 152 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
153 DRM_DEBUG(" space = 0x%06x\n", primary->space); 153 DRM_DEBUG(" space = 0x%06x\n", primary->space);
154 154
155 mga_flush_write_combine(); 155 mga_flush_write_combine();
@@ -187,7 +187,7 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
187 primary->space = head - dev_priv->primary->offset; 187 primary->space = head - dev_priv->primary->offset;
188 } 188 }
189 189
190 DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv->primary->offset); 190 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
191 DRM_DEBUG(" tail = 0x%06x\n", primary->tail); 191 DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
192 DRM_DEBUG(" wrap = %d\n", primary->last_wrap); 192 DRM_DEBUG(" wrap = %d\n", primary->last_wrap);
193 DRM_DEBUG(" space = 0x%06x\n", primary->space); 193 DRM_DEBUG(" space = 0x%06x\n", primary->space);
@@ -239,7 +239,7 @@ static void mga_freelist_print(struct drm_device * dev)
239 for (entry = dev_priv->head->next; entry; entry = entry->next) { 239 for (entry = dev_priv->head->next; entry; entry = entry->next) {
240 DRM_INFO(" %p idx=%2d age=0x%x 0x%06lx\n", 240 DRM_INFO(" %p idx=%2d age=0x%x 0x%06lx\n",
241 entry, entry->buf->idx, entry->age.head, 241 entry, entry->buf->idx, entry->age.head,
242 entry->age.head - dev_priv->primary->offset); 242 (unsigned long)(entry->age.head - dev_priv->primary->offset));
243 } 243 }
244 DRM_INFO("\n"); 244 DRM_INFO("\n");
245} 245}
@@ -340,10 +340,10 @@ static struct drm_buf *mga_freelist_get(struct drm_device * dev)
340 340
341 DRM_DEBUG(" tail=0x%06lx %d\n", 341 DRM_DEBUG(" tail=0x%06lx %d\n",
342 tail->age.head ? 342 tail->age.head ?
343 tail->age.head - dev_priv->primary->offset : 0, 343 (unsigned long)(tail->age.head - dev_priv->primary->offset) : 0,
344 tail->age.wrap); 344 tail->age.wrap);
345 DRM_DEBUG(" head=0x%06lx %d\n", 345 DRM_DEBUG(" head=0x%06lx %d\n",
346 head - dev_priv->primary->offset, wrap); 346 (unsigned long)(head - dev_priv->primary->offset), wrap);
347 347
348 if (TEST_AGE(&tail->age, head, wrap)) { 348 if (TEST_AGE(&tail->age, head, wrap)) {
349 prev = dev_priv->tail->prev; 349 prev = dev_priv->tail->prev;
@@ -366,8 +366,9 @@ int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
366 drm_mga_freelist_t *head, *entry, *prev; 366 drm_mga_freelist_t *head, *entry, *prev;
367 367
368 DRM_DEBUG("age=0x%06lx wrap=%d\n", 368 DRM_DEBUG("age=0x%06lx wrap=%d\n",
369 buf_priv->list_entry->age.head - 369 (unsigned long)(buf_priv->list_entry->age.head -
370 dev_priv->primary->offset, buf_priv->list_entry->age.wrap); 370 dev_priv->primary->offset),
371 buf_priv->list_entry->age.wrap);
371 372
372 entry = buf_priv->list_entry; 373 entry = buf_priv->list_entry;
373 head = dev_priv->head; 374 head = dev_priv->head;
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index 88257c276eb..3d264f28823 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -113,8 +113,8 @@ typedef struct drm_mga_private {
113 * \sa drm_mga_private_t::mmio 113 * \sa drm_mga_private_t::mmio
114 */ 114 */
115 /*@{ */ 115 /*@{ */
116 u32 mmio_base; /**< Bus address of base of MMIO. */ 116 resource_size_t mmio_base; /**< Bus address of base of MMIO. */
117 u32 mmio_size; /**< Size of the MMIO region. */ 117 resource_size_t mmio_size; /**< Size of the MMIO region. */
118 /*@} */ 118 /*@} */
119 119
120 u32 clear_cmd; 120 u32 clear_cmd;
@@ -317,8 +317,8 @@ do { \
317 DRM_INFO( "\n" ); \ 317 DRM_INFO( "\n" ); \
318 DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ 318 DRM_INFO( " tail=0x%06x head=0x%06lx\n", \
319 dev_priv->prim.tail, \ 319 dev_priv->prim.tail, \
320 MGA_READ( MGA_PRIMADDRESS ) - \ 320 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \
321 dev_priv->primary->offset ); \ 321 dev_priv->primary->offset)); \
322 } \ 322 } \
323 if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 323 if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \
324 if ( dev_priv->prim.space < \ 324 if ( dev_priv->prim.space < \
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index c31afbde62e..32de4cedc36 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -525,11 +525,12 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
525 } else 525 } else
526#endif 526#endif
527 { 527 {
528 dev_priv->cce_ring->handle = (void *)dev_priv->cce_ring->offset; 528 dev_priv->cce_ring->handle =
529 (void *)(unsigned long)dev_priv->cce_ring->offset;
529 dev_priv->ring_rptr->handle = 530 dev_priv->ring_rptr->handle =
530 (void *)dev_priv->ring_rptr->offset; 531 (void *)(unsigned long)dev_priv->ring_rptr->offset;
531 dev->agp_buffer_map->handle = 532 dev->agp_buffer_map->handle =
532 (void *)dev->agp_buffer_map->offset; 533 (void *)(unsigned long)dev->agp_buffer_map->offset;
533 } 534 }
534 535
535#if __OS_HAS_AGP 536#if __OS_HAS_AGP
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index feb521ebc39..52ce439a0f2 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -3,7 +3,7 @@
3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. 3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
4 4
5ccflags-y := -Iinclude/drm 5ccflags-y := -Iinclude/drm
6radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o 6radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o r600_cp.o
7 7
8radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 8radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
9 9
diff --git a/drivers/gpu/drm/radeon/r300_cmdbuf.c b/drivers/gpu/drm/radeon/r300_cmdbuf.c
index cace3964fee..cb2e470f97d 100644
--- a/drivers/gpu/drm/radeon/r300_cmdbuf.c
+++ b/drivers/gpu/drm/radeon/r300_cmdbuf.c
@@ -37,6 +37,8 @@
37#include "radeon_drv.h" 37#include "radeon_drv.h"
38#include "r300_reg.h" 38#include "r300_reg.h"
39 39
40#include <asm/unaligned.h>
41
40#define R300_SIMULTANEOUS_CLIPRECTS 4 42#define R300_SIMULTANEOUS_CLIPRECTS 4
41 43
42/* Values for R300_RE_CLIPRECT_CNTL depending on the number of cliprects 44/* Values for R300_RE_CLIPRECT_CNTL depending on the number of cliprects
@@ -205,6 +207,10 @@ void r300_init_reg_flags(struct drm_device *dev)
205 ADD_RANGE(0x42C0, 2); 207 ADD_RANGE(0x42C0, 2);
206 ADD_RANGE(R300_RS_CNTL_0, 2); 208 ADD_RANGE(R300_RS_CNTL_0, 2);
207 209
210 ADD_RANGE(R300_SU_REG_DEST, 1);
211 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530)
212 ADD_RANGE(RV530_FG_ZBREG_DEST, 1);
213
208 ADD_RANGE(R300_SC_HYPERZ, 2); 214 ADD_RANGE(R300_SC_HYPERZ, 2);
209 ADD_RANGE(0x43E8, 1); 215 ADD_RANGE(0x43E8, 1);
210 216
@@ -230,6 +236,7 @@ void r300_init_reg_flags(struct drm_device *dev)
230 ADD_RANGE(R300_ZB_DEPTHPITCH, 1); 236 ADD_RANGE(R300_ZB_DEPTHPITCH, 1);
231 ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1); 237 ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1);
232 ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13); 238 ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13);
239 ADD_RANGE(R300_ZB_ZPASS_DATA, 2); /* ZB_ZPASS_DATA, ZB_ZPASS_ADDR */
233 240
234 ADD_RANGE(R300_TX_FILTER_0, 16); 241 ADD_RANGE(R300_TX_FILTER_0, 16);
235 ADD_RANGE(R300_TX_FILTER1_0, 16); 242 ADD_RANGE(R300_TX_FILTER1_0, 16);
@@ -917,6 +924,7 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
917{ 924{
918 u32 *ref_age_base; 925 u32 *ref_age_base;
919 u32 i, buf_idx, h_pending; 926 u32 i, buf_idx, h_pending;
927 u64 ptr_addr;
920 RING_LOCALS; 928 RING_LOCALS;
921 929
922 if (cmdbuf->bufsz < 930 if (cmdbuf->bufsz <
@@ -930,7 +938,8 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
930 938
931 dev_priv->scratch_ages[header.scratch.reg]++; 939 dev_priv->scratch_ages[header.scratch.reg]++;
932 940
933 ref_age_base = (u32 *)(unsigned long)*((uint64_t *)cmdbuf->buf); 941 ptr_addr = get_unaligned((u64 *)cmdbuf->buf);
942 ref_age_base = (u32 *)(unsigned long)ptr_addr;
934 943
935 cmdbuf->buf += sizeof(u64); 944 cmdbuf->buf += sizeof(u64);
936 cmdbuf->bufsz -= sizeof(u64); 945 cmdbuf->bufsz -= sizeof(u64);
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
index ee6f811599a..bdbc95fa672 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -1770,4 +1770,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
1770#define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0 1770#define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0
1771#define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8 1771#define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8
1772 1772
1773#define R300_SU_REG_DEST 0x42c8
1774#define RV530_FG_ZBREG_DEST 0x4be8
1775#define R300_ZB_ZPASS_DATA 0x4f58
1776#define R300_ZB_ZPASS_ADDR 0x4f5c
1777
1773#endif /* _R300_REG_H */ 1778#endif /* _R300_REG_H */
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
new file mode 100644
index 00000000000..bc9d09dfa8e
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -0,0 +1,2253 @@
1/*
2 * Copyright 2008-2009 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Dave Airlie <airlied@redhat.com>
26 * Alex Deucher <alexander.deucher@amd.com>
27 */
28
29#include "drmP.h"
30#include "drm.h"
31#include "radeon_drm.h"
32#include "radeon_drv.h"
33
34#include "r600_microcode.h"
35
36# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
37# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
38
39#define R600_PTE_VALID (1 << 0)
40#define R600_PTE_SYSTEM (1 << 1)
41#define R600_PTE_SNOOPED (1 << 2)
42#define R600_PTE_READABLE (1 << 5)
43#define R600_PTE_WRITEABLE (1 << 6)
44
45/* MAX values used for gfx init */
46#define R6XX_MAX_SH_GPRS 256
47#define R6XX_MAX_TEMP_GPRS 16
48#define R6XX_MAX_SH_THREADS 256
49#define R6XX_MAX_SH_STACK_ENTRIES 4096
50#define R6XX_MAX_BACKENDS 8
51#define R6XX_MAX_BACKENDS_MASK 0xff
52#define R6XX_MAX_SIMDS 8
53#define R6XX_MAX_SIMDS_MASK 0xff
54#define R6XX_MAX_PIPES 8
55#define R6XX_MAX_PIPES_MASK 0xff
56
57#define R7XX_MAX_SH_GPRS 256
58#define R7XX_MAX_TEMP_GPRS 16
59#define R7XX_MAX_SH_THREADS 256
60#define R7XX_MAX_SH_STACK_ENTRIES 4096
61#define R7XX_MAX_BACKENDS 8
62#define R7XX_MAX_BACKENDS_MASK 0xff
63#define R7XX_MAX_SIMDS 16
64#define R7XX_MAX_SIMDS_MASK 0xffff
65#define R7XX_MAX_PIPES 8
66#define R7XX_MAX_PIPES_MASK 0xff
67
68static int r600_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries)
69{
70 int i;
71
72 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
73
74 for (i = 0; i < dev_priv->usec_timeout; i++) {
75 int slots;
76 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
77 slots = (RADEON_READ(R600_GRBM_STATUS)
78 & R700_CMDFIFO_AVAIL_MASK);
79 else
80 slots = (RADEON_READ(R600_GRBM_STATUS)
81 & R600_CMDFIFO_AVAIL_MASK);
82 if (slots >= entries)
83 return 0;
84 DRM_UDELAY(1);
85 }
86 DRM_INFO("wait for fifo failed status : 0x%08X 0x%08X\n",
87 RADEON_READ(R600_GRBM_STATUS),
88 RADEON_READ(R600_GRBM_STATUS2));
89
90 return -EBUSY;
91}
92
93static int r600_do_wait_for_idle(drm_radeon_private_t *dev_priv)
94{
95 int i, ret;
96
97 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
98
99 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
100 ret = r600_do_wait_for_fifo(dev_priv, 8);
101 else
102 ret = r600_do_wait_for_fifo(dev_priv, 16);
103 if (ret)
104 return ret;
105 for (i = 0; i < dev_priv->usec_timeout; i++) {
106 if (!(RADEON_READ(R600_GRBM_STATUS) & R600_GUI_ACTIVE))
107 return 0;
108 DRM_UDELAY(1);
109 }
110 DRM_INFO("wait idle failed status : 0x%08X 0x%08X\n",
111 RADEON_READ(R600_GRBM_STATUS),
112 RADEON_READ(R600_GRBM_STATUS2));
113
114 return -EBUSY;
115}
116
117void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
118{
119 struct drm_sg_mem *entry = dev->sg;
120 int max_pages;
121 int pages;
122 int i;
123
124 if (!entry)
125 return;
126
127 if (gart_info->bus_addr) {
128 max_pages = (gart_info->table_size / sizeof(u64));
129 pages = (entry->pages <= max_pages)
130 ? entry->pages : max_pages;
131
132 for (i = 0; i < pages; i++) {
133 if (!entry->busaddr[i])
134 break;
135 pci_unmap_page(dev->pdev, entry->busaddr[i],
136 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
137 }
138 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
139 gart_info->bus_addr = 0;
140 }
141}
142
143/* R600 has page table setup */
144int r600_page_table_init(struct drm_device *dev)
145{
146 drm_radeon_private_t *dev_priv = dev->dev_private;
147 struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
148 struct drm_local_map *map = &gart_info->mapping;
149 struct drm_sg_mem *entry = dev->sg;
150 int ret = 0;
151 int i, j;
152 int pages;
153 u64 page_base;
154 dma_addr_t entry_addr;
155 int max_ati_pages, max_real_pages, gart_idx;
156
157 /* okay page table is available - lets rock */
158 max_ati_pages = (gart_info->table_size / sizeof(u64));
159 max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
160
161 pages = (entry->pages <= max_real_pages) ?
162 entry->pages : max_real_pages;
163
164 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u64));
165
166 gart_idx = 0;
167 for (i = 0; i < pages; i++) {
168 entry->busaddr[i] = pci_map_page(dev->pdev,
169 entry->pagelist[i], 0,
170 PAGE_SIZE,
171 PCI_DMA_BIDIRECTIONAL);
172 if (entry->busaddr[i] == 0) {
173 DRM_ERROR("unable to map PCIGART pages!\n");
174 r600_page_table_cleanup(dev, gart_info);
175 goto done;
176 }
177 entry_addr = entry->busaddr[i];
178 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
179 page_base = (u64) entry_addr & ATI_PCIGART_PAGE_MASK;
180 page_base |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED;
181 page_base |= R600_PTE_READABLE | R600_PTE_WRITEABLE;
182
183 DRM_WRITE64(map, gart_idx * sizeof(u64), page_base);
184
185 gart_idx++;
186
187 if ((i % 128) == 0)
188 DRM_DEBUG("page entry %d: 0x%016llx\n",
189 i, (unsigned long long)page_base);
190 entry_addr += ATI_PCIGART_PAGE_SIZE;
191 }
192 }
193 ret = 1;
194done:
195 return ret;
196}
197
198static void r600_vm_flush_gart_range(struct drm_device *dev)
199{
200 drm_radeon_private_t *dev_priv = dev->dev_private;
201 u32 resp, countdown = 1000;
202 RADEON_WRITE(R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR, dev_priv->gart_vm_start >> 12);
203 RADEON_WRITE(R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
204 RADEON_WRITE(R600_VM_CONTEXT0_REQUEST_RESPONSE, 2);
205
206 do {
207 resp = RADEON_READ(R600_VM_CONTEXT0_REQUEST_RESPONSE);
208 countdown--;
209 DRM_UDELAY(1);
210 } while (((resp & 0xf0) == 0) && countdown);
211}
212
213static void r600_vm_init(struct drm_device *dev)
214{
215 drm_radeon_private_t *dev_priv = dev->dev_private;
216 /* initialise the VM to use the page table we constructed up there */
217 u32 vm_c0, i;
218 u32 mc_rd_a;
219 u32 vm_l2_cntl, vm_l2_cntl3;
220 /* okay set up the PCIE aperture type thingo */
221 RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR, dev_priv->gart_vm_start >> 12);
222 RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
223 RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
224
225 /* setup MC RD a */
226 mc_rd_a = R600_MCD_L1_TLB | R600_MCD_L1_FRAG_PROC | R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS |
227 R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU | R600_MCD_EFFECTIVE_L1_TLB_SIZE(5) |
228 R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(5) | R600_MCD_WAIT_L2_QUERY;
229
230 RADEON_WRITE(R600_MCD_RD_A_CNTL, mc_rd_a);
231 RADEON_WRITE(R600_MCD_RD_B_CNTL, mc_rd_a);
232
233 RADEON_WRITE(R600_MCD_WR_A_CNTL, mc_rd_a);
234 RADEON_WRITE(R600_MCD_WR_B_CNTL, mc_rd_a);
235
236 RADEON_WRITE(R600_MCD_RD_GFX_CNTL, mc_rd_a);
237 RADEON_WRITE(R600_MCD_WR_GFX_CNTL, mc_rd_a);
238
239 RADEON_WRITE(R600_MCD_RD_SYS_CNTL, mc_rd_a);
240 RADEON_WRITE(R600_MCD_WR_SYS_CNTL, mc_rd_a);
241
242 RADEON_WRITE(R600_MCD_RD_HDP_CNTL, mc_rd_a | R600_MCD_L1_STRICT_ORDERING);
243 RADEON_WRITE(R600_MCD_WR_HDP_CNTL, mc_rd_a /*| R600_MCD_L1_STRICT_ORDERING*/);
244
245 RADEON_WRITE(R600_MCD_RD_PDMA_CNTL, mc_rd_a);
246 RADEON_WRITE(R600_MCD_WR_PDMA_CNTL, mc_rd_a);
247
248 RADEON_WRITE(R600_MCD_RD_SEM_CNTL, mc_rd_a | R600_MCD_SEMAPHORE_MODE);
249 RADEON_WRITE(R600_MCD_WR_SEM_CNTL, mc_rd_a);
250
251 vm_l2_cntl = R600_VM_L2_CACHE_EN | R600_VM_L2_FRAG_PROC | R600_VM_ENABLE_PTE_CACHE_LRU_W;
252 vm_l2_cntl |= R600_VM_L2_CNTL_QUEUE_SIZE(7);
253 RADEON_WRITE(R600_VM_L2_CNTL, vm_l2_cntl);
254
255 RADEON_WRITE(R600_VM_L2_CNTL2, 0);
256 vm_l2_cntl3 = (R600_VM_L2_CNTL3_BANK_SELECT_0(0) |
257 R600_VM_L2_CNTL3_BANK_SELECT_1(1) |
258 R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(2));
259 RADEON_WRITE(R600_VM_L2_CNTL3, vm_l2_cntl3);
260
261 vm_c0 = R600_VM_ENABLE_CONTEXT | R600_VM_PAGE_TABLE_DEPTH_FLAT;
262
263 RADEON_WRITE(R600_VM_CONTEXT0_CNTL, vm_c0);
264
265 vm_c0 &= ~R600_VM_ENABLE_CONTEXT;
266
267 /* disable all other contexts */
268 for (i = 1; i < 8; i++)
269 RADEON_WRITE(R600_VM_CONTEXT0_CNTL + (i * 4), vm_c0);
270
271 RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
272 RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR, dev_priv->gart_vm_start >> 12);
273 RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
274
275 r600_vm_flush_gart_range(dev);
276}
277
278/* load r600 microcode */
279static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
280{
281 int i;
282
283 r600_do_cp_stop(dev_priv);
284
285 RADEON_WRITE(R600_CP_RB_CNTL,
286 R600_RB_NO_UPDATE |
287 R600_RB_BLKSZ(15) |
288 R600_RB_BUFSZ(3));
289
290 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
291 RADEON_READ(R600_GRBM_SOFT_RESET);
292 DRM_UDELAY(15000);
293 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
294
295 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
296
297 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600)) {
298 DRM_INFO("Loading R600 CP Microcode\n");
299 for (i = 0; i < PM4_UCODE_SIZE; i++) {
300 RADEON_WRITE(R600_CP_ME_RAM_DATA,
301 R600_cp_microcode[i][0]);
302 RADEON_WRITE(R600_CP_ME_RAM_DATA,
303 R600_cp_microcode[i][1]);
304 RADEON_WRITE(R600_CP_ME_RAM_DATA,
305 R600_cp_microcode[i][2]);
306 }
307
308 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
309 DRM_INFO("Loading R600 PFP Microcode\n");
310 for (i = 0; i < PFP_UCODE_SIZE; i++)
311 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, R600_pfp_microcode[i]);
312 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610)) {
313 DRM_INFO("Loading RV610 CP Microcode\n");
314 for (i = 0; i < PM4_UCODE_SIZE; i++) {
315 RADEON_WRITE(R600_CP_ME_RAM_DATA,
316 RV610_cp_microcode[i][0]);
317 RADEON_WRITE(R600_CP_ME_RAM_DATA,
318 RV610_cp_microcode[i][1]);
319 RADEON_WRITE(R600_CP_ME_RAM_DATA,
320 RV610_cp_microcode[i][2]);
321 }
322
323 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
324 DRM_INFO("Loading RV610 PFP Microcode\n");
325 for (i = 0; i < PFP_UCODE_SIZE; i++)
326 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV610_pfp_microcode[i]);
327 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) {
328 DRM_INFO("Loading RV630 CP Microcode\n");
329 for (i = 0; i < PM4_UCODE_SIZE; i++) {
330 RADEON_WRITE(R600_CP_ME_RAM_DATA,
331 RV630_cp_microcode[i][0]);
332 RADEON_WRITE(R600_CP_ME_RAM_DATA,
333 RV630_cp_microcode[i][1]);
334 RADEON_WRITE(R600_CP_ME_RAM_DATA,
335 RV630_cp_microcode[i][2]);
336 }
337
338 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
339 DRM_INFO("Loading RV630 PFP Microcode\n");
340 for (i = 0; i < PFP_UCODE_SIZE; i++)
341 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV630_pfp_microcode[i]);
342 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620)) {
343 DRM_INFO("Loading RV620 CP Microcode\n");
344 for (i = 0; i < PM4_UCODE_SIZE; i++) {
345 RADEON_WRITE(R600_CP_ME_RAM_DATA,
346 RV620_cp_microcode[i][0]);
347 RADEON_WRITE(R600_CP_ME_RAM_DATA,
348 RV620_cp_microcode[i][1]);
349 RADEON_WRITE(R600_CP_ME_RAM_DATA,
350 RV620_cp_microcode[i][2]);
351 }
352
353 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
354 DRM_INFO("Loading RV620 PFP Microcode\n");
355 for (i = 0; i < PFP_UCODE_SIZE; i++)
356 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV620_pfp_microcode[i]);
357 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) {
358 DRM_INFO("Loading RV635 CP Microcode\n");
359 for (i = 0; i < PM4_UCODE_SIZE; i++) {
360 RADEON_WRITE(R600_CP_ME_RAM_DATA,
361 RV635_cp_microcode[i][0]);
362 RADEON_WRITE(R600_CP_ME_RAM_DATA,
363 RV635_cp_microcode[i][1]);
364 RADEON_WRITE(R600_CP_ME_RAM_DATA,
365 RV635_cp_microcode[i][2]);
366 }
367
368 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
369 DRM_INFO("Loading RV635 PFP Microcode\n");
370 for (i = 0; i < PFP_UCODE_SIZE; i++)
371 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV635_pfp_microcode[i]);
372 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)) {
373 DRM_INFO("Loading RV670 CP Microcode\n");
374 for (i = 0; i < PM4_UCODE_SIZE; i++) {
375 RADEON_WRITE(R600_CP_ME_RAM_DATA,
376 RV670_cp_microcode[i][0]);
377 RADEON_WRITE(R600_CP_ME_RAM_DATA,
378 RV670_cp_microcode[i][1]);
379 RADEON_WRITE(R600_CP_ME_RAM_DATA,
380 RV670_cp_microcode[i][2]);
381 }
382
383 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
384 DRM_INFO("Loading RV670 PFP Microcode\n");
385 for (i = 0; i < PFP_UCODE_SIZE; i++)
386 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
387 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
388 DRM_INFO("Loading RS780 CP Microcode\n");
389 for (i = 0; i < PM4_UCODE_SIZE; i++) {
390 RADEON_WRITE(R600_CP_ME_RAM_DATA,
391 RS780_cp_microcode[i][0]);
392 RADEON_WRITE(R600_CP_ME_RAM_DATA,
393 RS780_cp_microcode[i][1]);
394 RADEON_WRITE(R600_CP_ME_RAM_DATA,
395 RS780_cp_microcode[i][2]);
396 }
397
398 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
399 DRM_INFO("Loading RS780 PFP Microcode\n");
400 for (i = 0; i < PFP_UCODE_SIZE; i++)
401 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
402 }
403 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
404 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
405 RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
406
407}
408
409static void r700_vm_init(struct drm_device *dev)
410{
411 drm_radeon_private_t *dev_priv = dev->dev_private;
412 /* initialise the VM to use the page table we constructed up there */
413 u32 vm_c0, i;
414 u32 mc_vm_md_l1;
415 u32 vm_l2_cntl, vm_l2_cntl3;
416 /* okay set up the PCIE aperture type thingo */
417 RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR, dev_priv->gart_vm_start >> 12);
418 RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
419 RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
420
421 mc_vm_md_l1 = R700_ENABLE_L1_TLB |
422 R700_ENABLE_L1_FRAGMENT_PROCESSING |
423 R700_SYSTEM_ACCESS_MODE_IN_SYS |
424 R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU |
425 R700_EFFECTIVE_L1_TLB_SIZE(5) |
426 R700_EFFECTIVE_L1_QUEUE_SIZE(5);
427
428 RADEON_WRITE(R700_MC_VM_MD_L1_TLB0_CNTL, mc_vm_md_l1);
429 RADEON_WRITE(R700_MC_VM_MD_L1_TLB1_CNTL, mc_vm_md_l1);
430 RADEON_WRITE(R700_MC_VM_MD_L1_TLB2_CNTL, mc_vm_md_l1);
431 RADEON_WRITE(R700_MC_VM_MB_L1_TLB0_CNTL, mc_vm_md_l1);
432 RADEON_WRITE(R700_MC_VM_MB_L1_TLB1_CNTL, mc_vm_md_l1);
433 RADEON_WRITE(R700_MC_VM_MB_L1_TLB2_CNTL, mc_vm_md_l1);
434 RADEON_WRITE(R700_MC_VM_MB_L1_TLB3_CNTL, mc_vm_md_l1);
435
436 vm_l2_cntl = R600_VM_L2_CACHE_EN | R600_VM_L2_FRAG_PROC | R600_VM_ENABLE_PTE_CACHE_LRU_W;
437 vm_l2_cntl |= R700_VM_L2_CNTL_QUEUE_SIZE(7);
438 RADEON_WRITE(R600_VM_L2_CNTL, vm_l2_cntl);
439
440 RADEON_WRITE(R600_VM_L2_CNTL2, 0);
441 vm_l2_cntl3 = R700_VM_L2_CNTL3_BANK_SELECT(0) | R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(2);
442 RADEON_WRITE(R600_VM_L2_CNTL3, vm_l2_cntl3);
443
444 vm_c0 = R600_VM_ENABLE_CONTEXT | R600_VM_PAGE_TABLE_DEPTH_FLAT;
445
446 RADEON_WRITE(R600_VM_CONTEXT0_CNTL, vm_c0);
447
448 vm_c0 &= ~R600_VM_ENABLE_CONTEXT;
449
450 /* disable all other contexts */
451 for (i = 1; i < 8; i++)
452 RADEON_WRITE(R600_VM_CONTEXT0_CNTL + (i * 4), vm_c0);
453
454 RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
455 RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR, dev_priv->gart_vm_start >> 12);
456 RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
457
458 r600_vm_flush_gart_range(dev);
459}
460
461/* load r600 microcode */
462static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
463{
464 int i;
465
466 r600_do_cp_stop(dev_priv);
467
468 RADEON_WRITE(R600_CP_RB_CNTL,
469 R600_RB_NO_UPDATE |
470 (15 << 8) |
471 (3 << 0));
472
473 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
474 RADEON_READ(R600_GRBM_SOFT_RESET);
475 DRM_UDELAY(15000);
476 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
477
478
479 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)) {
480 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
481 DRM_INFO("Loading RV770 PFP Microcode\n");
482 for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
483 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV770_pfp_microcode[i]);
484 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
485
486 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
487 DRM_INFO("Loading RV770 CP Microcode\n");
488 for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
489 RADEON_WRITE(R600_CP_ME_RAM_DATA, RV770_cp_microcode[i]);
490 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
491
492 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV730)) {
493 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
494 DRM_INFO("Loading RV730 PFP Microcode\n");
495 for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
496 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV730_pfp_microcode[i]);
497 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
498
499 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
500 DRM_INFO("Loading RV730 CP Microcode\n");
501 for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
502 RADEON_WRITE(R600_CP_ME_RAM_DATA, RV730_cp_microcode[i]);
503 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
504
505 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) {
506 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
507 DRM_INFO("Loading RV710 PFP Microcode\n");
508 for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
509 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV710_pfp_microcode[i]);
510 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
511
512 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
513 DRM_INFO("Loading RV710 CP Microcode\n");
514 for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
515 RADEON_WRITE(R600_CP_ME_RAM_DATA, RV710_cp_microcode[i]);
516 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
517
518 }
519 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
520 RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
521 RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
522
523}
524
525static void r600_test_writeback(drm_radeon_private_t *dev_priv)
526{
527 u32 tmp;
528
529 /* Start with assuming that writeback doesn't work */
530 dev_priv->writeback_works = 0;
531
532 /* Writeback doesn't seem to work everywhere, test it here and possibly
533 * enable it if it appears to work
534 */
535 radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(1), 0);
536
537 RADEON_WRITE(R600_SCRATCH_REG1, 0xdeadbeef);
538
539 for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
540 u32 val;
541
542 val = radeon_read_ring_rptr(dev_priv, R600_SCRATCHOFF(1));
543 if (val == 0xdeadbeef)
544 break;
545 DRM_UDELAY(1);
546 }
547
548 if (tmp < dev_priv->usec_timeout) {
549 dev_priv->writeback_works = 1;
550 DRM_INFO("writeback test succeeded in %d usecs\n", tmp);
551 } else {
552 dev_priv->writeback_works = 0;
553 DRM_INFO("writeback test failed\n");
554 }
555 if (radeon_no_wb == 1) {
556 dev_priv->writeback_works = 0;
557 DRM_INFO("writeback forced off\n");
558 }
559
560 if (!dev_priv->writeback_works) {
561 /* Disable writeback to avoid unnecessary bus master transfer */
562 RADEON_WRITE(R600_CP_RB_CNTL, RADEON_READ(R600_CP_RB_CNTL) |
563 RADEON_RB_NO_UPDATE);
564 RADEON_WRITE(R600_SCRATCH_UMSK, 0);
565 }
566}
567
568int r600_do_engine_reset(struct drm_device *dev)
569{
570 drm_radeon_private_t *dev_priv = dev->dev_private;
571 u32 cp_ptr, cp_me_cntl, cp_rb_cntl;
572
573 DRM_INFO("Resetting GPU\n");
574
575 cp_ptr = RADEON_READ(R600_CP_RB_WPTR);
576 cp_me_cntl = RADEON_READ(R600_CP_ME_CNTL);
577 RADEON_WRITE(R600_CP_ME_CNTL, R600_CP_ME_HALT);
578
579 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0x7fff);
580 RADEON_READ(R600_GRBM_SOFT_RESET);
581 DRM_UDELAY(50);
582 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
583 RADEON_READ(R600_GRBM_SOFT_RESET);
584
585 RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0);
586 cp_rb_cntl = RADEON_READ(R600_CP_RB_CNTL);
587 RADEON_WRITE(R600_CP_RB_CNTL, R600_RB_RPTR_WR_ENA);
588
589 RADEON_WRITE(R600_CP_RB_RPTR_WR, cp_ptr);
590 RADEON_WRITE(R600_CP_RB_WPTR, cp_ptr);
591 RADEON_WRITE(R600_CP_RB_CNTL, cp_rb_cntl);
592 RADEON_WRITE(R600_CP_ME_CNTL, cp_me_cntl);
593
594 /* Reset the CP ring */
595 r600_do_cp_reset(dev_priv);
596
597 /* The CP is no longer running after an engine reset */
598 dev_priv->cp_running = 0;
599
600 /* Reset any pending vertex, indirect buffers */
601 radeon_freelist_reset(dev);
602
603 return 0;
604
605}
606
607static u32 r600_get_tile_pipe_to_backend_map(u32 num_tile_pipes,
608 u32 num_backends,
609 u32 backend_disable_mask)
610{
611 u32 backend_map = 0;
612 u32 enabled_backends_mask;
613 u32 enabled_backends_count;
614 u32 cur_pipe;
615 u32 swizzle_pipe[R6XX_MAX_PIPES];
616 u32 cur_backend;
617 u32 i;
618
619 if (num_tile_pipes > R6XX_MAX_PIPES)
620 num_tile_pipes = R6XX_MAX_PIPES;
621 if (num_tile_pipes < 1)
622 num_tile_pipes = 1;
623 if (num_backends > R6XX_MAX_BACKENDS)
624 num_backends = R6XX_MAX_BACKENDS;
625 if (num_backends < 1)
626 num_backends = 1;
627
628 enabled_backends_mask = 0;
629 enabled_backends_count = 0;
630 for (i = 0; i < R6XX_MAX_BACKENDS; ++i) {
631 if (((backend_disable_mask >> i) & 1) == 0) {
632 enabled_backends_mask |= (1 << i);
633 ++enabled_backends_count;
634 }
635 if (enabled_backends_count == num_backends)
636 break;
637 }
638
639 if (enabled_backends_count == 0) {
640 enabled_backends_mask = 1;
641 enabled_backends_count = 1;
642 }
643
644 if (enabled_backends_count != num_backends)
645 num_backends = enabled_backends_count;
646
647 memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R6XX_MAX_PIPES);
648 switch (num_tile_pipes) {
649 case 1:
650 swizzle_pipe[0] = 0;
651 break;
652 case 2:
653 swizzle_pipe[0] = 0;
654 swizzle_pipe[1] = 1;
655 break;
656 case 3:
657 swizzle_pipe[0] = 0;
658 swizzle_pipe[1] = 1;
659 swizzle_pipe[2] = 2;
660 break;
661 case 4:
662 swizzle_pipe[0] = 0;
663 swizzle_pipe[1] = 1;
664 swizzle_pipe[2] = 2;
665 swizzle_pipe[3] = 3;
666 break;
667 case 5:
668 swizzle_pipe[0] = 0;
669 swizzle_pipe[1] = 1;
670 swizzle_pipe[2] = 2;
671 swizzle_pipe[3] = 3;
672 swizzle_pipe[4] = 4;
673 break;
674 case 6:
675 swizzle_pipe[0] = 0;
676 swizzle_pipe[1] = 2;
677 swizzle_pipe[2] = 4;
678 swizzle_pipe[3] = 5;
679 swizzle_pipe[4] = 1;
680 swizzle_pipe[5] = 3;
681 break;
682 case 7:
683 swizzle_pipe[0] = 0;
684 swizzle_pipe[1] = 2;
685 swizzle_pipe[2] = 4;
686 swizzle_pipe[3] = 6;
687 swizzle_pipe[4] = 1;
688 swizzle_pipe[5] = 3;
689 swizzle_pipe[6] = 5;
690 break;
691 case 8:
692 swizzle_pipe[0] = 0;
693 swizzle_pipe[1] = 2;
694 swizzle_pipe[2] = 4;
695 swizzle_pipe[3] = 6;
696 swizzle_pipe[4] = 1;
697 swizzle_pipe[5] = 3;
698 swizzle_pipe[6] = 5;
699 swizzle_pipe[7] = 7;
700 break;
701 }
702
703 cur_backend = 0;
704 for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) {
705 while (((1 << cur_backend) & enabled_backends_mask) == 0)
706 cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;
707
708 backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2)));
709
710 cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;
711 }
712
713 return backend_map;
714}
715
716static int r600_count_pipe_bits(uint32_t val)
717{
718 int i, ret = 0;
719 for (i = 0; i < 32; i++) {
720 ret += val & 1;
721 val >>= 1;
722 }
723 return ret;
724}
725
726static void r600_gfx_init(struct drm_device *dev,
727 drm_radeon_private_t *dev_priv)
728{
729 int i, j, num_qd_pipes;
730 u32 sx_debug_1;
731 u32 tc_cntl;
732 u32 arb_pop;
733 u32 num_gs_verts_per_thread;
734 u32 vgt_gs_per_es;
735 u32 gs_prim_buffer_depth = 0;
736 u32 sq_ms_fifo_sizes;
737 u32 sq_config;
738 u32 sq_gpr_resource_mgmt_1 = 0;
739 u32 sq_gpr_resource_mgmt_2 = 0;
740 u32 sq_thread_resource_mgmt = 0;
741 u32 sq_stack_resource_mgmt_1 = 0;
742 u32 sq_stack_resource_mgmt_2 = 0;
743 u32 hdp_host_path_cntl;
744 u32 backend_map;
745 u32 gb_tiling_config = 0;
746 u32 cc_rb_backend_disable = 0;
747 u32 cc_gc_shader_pipe_config = 0;
748 u32 ramcfg;
749
750 /* setup chip specs */
751 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
752 case CHIP_R600:
753 dev_priv->r600_max_pipes = 4;
754 dev_priv->r600_max_tile_pipes = 8;
755 dev_priv->r600_max_simds = 4;
756 dev_priv->r600_max_backends = 4;
757 dev_priv->r600_max_gprs = 256;
758 dev_priv->r600_max_threads = 192;
759 dev_priv->r600_max_stack_entries = 256;
760 dev_priv->r600_max_hw_contexts = 8;
761 dev_priv->r600_max_gs_threads = 16;
762 dev_priv->r600_sx_max_export_size = 128;
763 dev_priv->r600_sx_max_export_pos_size = 16;
764 dev_priv->r600_sx_max_export_smx_size = 128;
765 dev_priv->r600_sq_num_cf_insts = 2;
766 break;
767 case CHIP_RV630:
768 case CHIP_RV635:
769 dev_priv->r600_max_pipes = 2;
770 dev_priv->r600_max_tile_pipes = 2;
771 dev_priv->r600_max_simds = 3;
772 dev_priv->r600_max_backends = 1;
773 dev_priv->r600_max_gprs = 128;
774 dev_priv->r600_max_threads = 192;
775 dev_priv->r600_max_stack_entries = 128;
776 dev_priv->r600_max_hw_contexts = 8;
777 dev_priv->r600_max_gs_threads = 4;
778 dev_priv->r600_sx_max_export_size = 128;
779 dev_priv->r600_sx_max_export_pos_size = 16;
780 dev_priv->r600_sx_max_export_smx_size = 128;
781 dev_priv->r600_sq_num_cf_insts = 2;
782 break;
783 case CHIP_RV610:
784 case CHIP_RS780:
785 case CHIP_RV620:
786 dev_priv->r600_max_pipes = 1;
787 dev_priv->r600_max_tile_pipes = 1;
788 dev_priv->r600_max_simds = 2;
789 dev_priv->r600_max_backends = 1;
790 dev_priv->r600_max_gprs = 128;
791 dev_priv->r600_max_threads = 192;
792 dev_priv->r600_max_stack_entries = 128;
793 dev_priv->r600_max_hw_contexts = 4;
794 dev_priv->r600_max_gs_threads = 4;
795 dev_priv->r600_sx_max_export_size = 128;
796 dev_priv->r600_sx_max_export_pos_size = 16;
797 dev_priv->r600_sx_max_export_smx_size = 128;
798 dev_priv->r600_sq_num_cf_insts = 1;
799 break;
800 case CHIP_RV670:
801 dev_priv->r600_max_pipes = 4;
802 dev_priv->r600_max_tile_pipes = 4;
803 dev_priv->r600_max_simds = 4;
804 dev_priv->r600_max_backends = 4;
805 dev_priv->r600_max_gprs = 192;
806 dev_priv->r600_max_threads = 192;
807 dev_priv->r600_max_stack_entries = 256;
808 dev_priv->r600_max_hw_contexts = 8;
809 dev_priv->r600_max_gs_threads = 16;
810 dev_priv->r600_sx_max_export_size = 128;
811 dev_priv->r600_sx_max_export_pos_size = 16;
812 dev_priv->r600_sx_max_export_smx_size = 128;
813 dev_priv->r600_sq_num_cf_insts = 2;
814 break;
815 default:
816 break;
817 }
818
819 /* Initialize HDP */
820 j = 0;
821 for (i = 0; i < 32; i++) {
822 RADEON_WRITE((0x2c14 + j), 0x00000000);
823 RADEON_WRITE((0x2c18 + j), 0x00000000);
824 RADEON_WRITE((0x2c1c + j), 0x00000000);
825 RADEON_WRITE((0x2c20 + j), 0x00000000);
826 RADEON_WRITE((0x2c24 + j), 0x00000000);
827 j += 0x18;
828 }
829
830 RADEON_WRITE(R600_GRBM_CNTL, R600_GRBM_READ_TIMEOUT(0xff));
831
832 /* setup tiling, simd, pipe config */
833 ramcfg = RADEON_READ(R600_RAMCFG);
834
835 switch (dev_priv->r600_max_tile_pipes) {
836 case 1:
837 gb_tiling_config |= R600_PIPE_TILING(0);
838 break;
839 case 2:
840 gb_tiling_config |= R600_PIPE_TILING(1);
841 break;
842 case 4:
843 gb_tiling_config |= R600_PIPE_TILING(2);
844 break;
845 case 8:
846 gb_tiling_config |= R600_PIPE_TILING(3);
847 break;
848 default:
849 break;
850 }
851
852 gb_tiling_config |= R600_BANK_TILING((ramcfg >> R600_NOOFBANK_SHIFT) & R600_NOOFBANK_MASK);
853
854 gb_tiling_config |= R600_GROUP_SIZE(0);
855
856 if (((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK) > 3) {
857 gb_tiling_config |= R600_ROW_TILING(3);
858 gb_tiling_config |= R600_SAMPLE_SPLIT(3);
859 } else {
860 gb_tiling_config |=
861 R600_ROW_TILING(((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK));
862 gb_tiling_config |=
863 R600_SAMPLE_SPLIT(((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK));
864 }
865
866 gb_tiling_config |= R600_BANK_SWAPS(1);
867
868 backend_map = r600_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
869 dev_priv->r600_max_backends,
870 (0xff << dev_priv->r600_max_backends) & 0xff);
871 gb_tiling_config |= R600_BACKEND_MAP(backend_map);
872
873 cc_gc_shader_pipe_config =
874 R600_INACTIVE_QD_PIPES((R6XX_MAX_PIPES_MASK << dev_priv->r600_max_pipes) & R6XX_MAX_PIPES_MASK);
875 cc_gc_shader_pipe_config |=
876 R600_INACTIVE_SIMDS((R6XX_MAX_SIMDS_MASK << dev_priv->r600_max_simds) & R6XX_MAX_SIMDS_MASK);
877
878 cc_rb_backend_disable =
879 R600_BACKEND_DISABLE((R6XX_MAX_BACKENDS_MASK << dev_priv->r600_max_backends) & R6XX_MAX_BACKENDS_MASK);
880
881 RADEON_WRITE(R600_GB_TILING_CONFIG, gb_tiling_config);
882 RADEON_WRITE(R600_DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));
883 RADEON_WRITE(R600_HDP_TILING_CONFIG, (gb_tiling_config & 0xffff));
884
885 RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE, cc_rb_backend_disable);
886 RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
887 RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
888
889 num_qd_pipes =
890 R6XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK);
891 RADEON_WRITE(R600_VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & R600_DEALLOC_DIST_MASK);
892 RADEON_WRITE(R600_VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & R600_VTX_REUSE_DEPTH_MASK);
893
894 /* set HW defaults for 3D engine */
895 RADEON_WRITE(R600_CP_QUEUE_THRESHOLDS, (R600_ROQ_IB1_START(0x16) |
896 R600_ROQ_IB2_START(0x2b)));
897
898 RADEON_WRITE(R600_CP_MEQ_THRESHOLDS, (R600_MEQ_END(0x40) |
899 R600_ROQ_END(0x40)));
900
901 RADEON_WRITE(R600_TA_CNTL_AUX, (R600_DISABLE_CUBE_ANISO |
902 R600_SYNC_GRADIENT |
903 R600_SYNC_WALKER |
904 R600_SYNC_ALIGNER));
905
906 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)
907 RADEON_WRITE(R600_ARB_GDEC_RD_CNTL, 0x00000021);
908
909 sx_debug_1 = RADEON_READ(R600_SX_DEBUG_1);
910 sx_debug_1 |= R600_SMX_EVENT_RELEASE;
911 if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600))
912 sx_debug_1 |= R600_ENABLE_NEW_SMX_ADDRESS;
913 RADEON_WRITE(R600_SX_DEBUG_1, sx_debug_1);
914
915 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) ||
916 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) ||
917 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
918 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
919 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780))
920 RADEON_WRITE(R600_DB_DEBUG, R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE);
921 else
922 RADEON_WRITE(R600_DB_DEBUG, 0);
923
924 RADEON_WRITE(R600_DB_WATERMARKS, (R600_DEPTH_FREE(4) |
925 R600_DEPTH_FLUSH(16) |
926 R600_DEPTH_PENDING_FREE(4) |
927 R600_DEPTH_CACHELINE_FREE(16)));
928 RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
929 RADEON_WRITE(R600_VGT_NUM_INSTANCES, 0);
930
931 RADEON_WRITE(R600_SPI_CONFIG_CNTL, R600_GPR_WRITE_PRIORITY(0));
932 RADEON_WRITE(R600_SPI_CONFIG_CNTL_1, R600_VTX_DONE_DELAY(0));
933
934 sq_ms_fifo_sizes = RADEON_READ(R600_SQ_MS_FIFO_SIZES);
935 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
936 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
937 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
938 sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(0xa) |
939 R600_FETCH_FIFO_HIWATER(0xa) |
940 R600_DONE_FIFO_HIWATER(0xe0) |
941 R600_ALU_UPDATE_FIFO_HIWATER(0x8));
942 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) ||
943 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) {
944 sq_ms_fifo_sizes &= ~R600_DONE_FIFO_HIWATER(0xff);
945 sq_ms_fifo_sizes |= R600_DONE_FIFO_HIWATER(0x4);
946 }
947 RADEON_WRITE(R600_SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes);
948
949 /* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT
950 * should be adjusted as needed by the 2D/3D drivers. This just sets default values
951 */
952 sq_config = RADEON_READ(R600_SQ_CONFIG);
953 sq_config &= ~(R600_PS_PRIO(3) |
954 R600_VS_PRIO(3) |
955 R600_GS_PRIO(3) |
956 R600_ES_PRIO(3));
957 sq_config |= (R600_DX9_CONSTS |
958 R600_VC_ENABLE |
959 R600_PS_PRIO(0) |
960 R600_VS_PRIO(1) |
961 R600_GS_PRIO(2) |
962 R600_ES_PRIO(3));
963
964 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) {
965 sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(124) |
966 R600_NUM_VS_GPRS(124) |
967 R600_NUM_CLAUSE_TEMP_GPRS(4));
968 sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(0) |
969 R600_NUM_ES_GPRS(0));
970 sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(136) |
971 R600_NUM_VS_THREADS(48) |
972 R600_NUM_GS_THREADS(4) |
973 R600_NUM_ES_THREADS(4));
974 sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(128) |
975 R600_NUM_VS_STACK_ENTRIES(128));
976 sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(0) |
977 R600_NUM_ES_STACK_ENTRIES(0));
978 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
979 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
980 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
981 /* no vertex cache */
982 sq_config &= ~R600_VC_ENABLE;
983
984 sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) |
985 R600_NUM_VS_GPRS(44) |
986 R600_NUM_CLAUSE_TEMP_GPRS(2));
987 sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(17) |
988 R600_NUM_ES_GPRS(17));
989 sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) |
990 R600_NUM_VS_THREADS(78) |
991 R600_NUM_GS_THREADS(4) |
992 R600_NUM_ES_THREADS(31));
993 sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(40) |
994 R600_NUM_VS_STACK_ENTRIES(40));
995 sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(32) |
996 R600_NUM_ES_STACK_ENTRIES(16));
997 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) ||
998 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) {
999 sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) |
1000 R600_NUM_VS_GPRS(44) |
1001 R600_NUM_CLAUSE_TEMP_GPRS(2));
1002 sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(18) |
1003 R600_NUM_ES_GPRS(18));
1004 sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) |
1005 R600_NUM_VS_THREADS(78) |
1006 R600_NUM_GS_THREADS(4) |
1007 R600_NUM_ES_THREADS(31));
1008 sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(40) |
1009 R600_NUM_VS_STACK_ENTRIES(40));
1010 sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(32) |
1011 R600_NUM_ES_STACK_ENTRIES(16));
1012 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670) {
1013 sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) |
1014 R600_NUM_VS_GPRS(44) |
1015 R600_NUM_CLAUSE_TEMP_GPRS(2));
1016 sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(17) |
1017 R600_NUM_ES_GPRS(17));
1018 sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) |
1019 R600_NUM_VS_THREADS(78) |
1020 R600_NUM_GS_THREADS(4) |
1021 R600_NUM_ES_THREADS(31));
1022 sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(64) |
1023 R600_NUM_VS_STACK_ENTRIES(64));
1024 sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(64) |
1025 R600_NUM_ES_STACK_ENTRIES(64));
1026 }
1027
1028 RADEON_WRITE(R600_SQ_CONFIG, sq_config);
1029 RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1, sq_gpr_resource_mgmt_1);
1030 RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2, sq_gpr_resource_mgmt_2);
1031 RADEON_WRITE(R600_SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);
1032 RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_1, sq_stack_resource_mgmt_1);
1033 RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_2, sq_stack_resource_mgmt_2);
1034
1035 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
1036 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
1037 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780))
1038 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_TC_ONLY));
1039 else
1040 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_VC_AND_TC));
1041
1042 RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_2S, (R600_S0_X(0xc) |
1043 R600_S0_Y(0x4) |
1044 R600_S1_X(0x4) |
1045 R600_S1_Y(0xc)));
1046 RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_4S, (R600_S0_X(0xe) |
1047 R600_S0_Y(0xe) |
1048 R600_S1_X(0x2) |
1049 R600_S1_Y(0x2) |
1050 R600_S2_X(0xa) |
1051 R600_S2_Y(0x6) |
1052 R600_S3_X(0x6) |
1053 R600_S3_Y(0xa)));
1054 RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0, (R600_S0_X(0xe) |
1055 R600_S0_Y(0xb) |
1056 R600_S1_X(0x4) |
1057 R600_S1_Y(0xc) |
1058 R600_S2_X(0x1) |
1059 R600_S2_Y(0x6) |
1060 R600_S3_X(0xa) |
1061 R600_S3_Y(0xe)));
1062 RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1, (R600_S4_X(0x6) |
1063 R600_S4_Y(0x1) |
1064 R600_S5_X(0x0) |
1065 R600_S5_Y(0x0) |
1066 R600_S6_X(0xb) |
1067 R600_S6_Y(0x4) |
1068 R600_S7_X(0x7) |
1069 R600_S7_Y(0x8)));
1070
1071
1072 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
1073 case CHIP_R600:
1074 case CHIP_RV630:
1075 case CHIP_RV635:
1076 gs_prim_buffer_depth = 0;
1077 break;
1078 case CHIP_RV610:
1079 case CHIP_RS780:
1080 case CHIP_RV620:
1081 gs_prim_buffer_depth = 32;
1082 break;
1083 case CHIP_RV670:
1084 gs_prim_buffer_depth = 128;
1085 break;
1086 default:
1087 break;
1088 }
1089
1090 num_gs_verts_per_thread = dev_priv->r600_max_pipes * 16;
1091 vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread;
1092 /* Max value for this is 256 */
1093 if (vgt_gs_per_es > 256)
1094 vgt_gs_per_es = 256;
1095
1096 RADEON_WRITE(R600_VGT_ES_PER_GS, 128);
1097 RADEON_WRITE(R600_VGT_GS_PER_ES, vgt_gs_per_es);
1098 RADEON_WRITE(R600_VGT_GS_PER_VS, 2);
1099 RADEON_WRITE(R600_VGT_GS_VERTEX_REUSE, 16);
1100
1101 /* more default values. 2D/3D driver should adjust as needed */
1102 RADEON_WRITE(R600_PA_SC_LINE_STIPPLE_STATE, 0);
1103 RADEON_WRITE(R600_VGT_STRMOUT_EN, 0);
1104 RADEON_WRITE(R600_SX_MISC, 0);
1105 RADEON_WRITE(R600_PA_SC_MODE_CNTL, 0);
1106 RADEON_WRITE(R600_PA_SC_AA_CONFIG, 0);
1107 RADEON_WRITE(R600_PA_SC_LINE_STIPPLE, 0);
1108 RADEON_WRITE(R600_SPI_INPUT_Z, 0);
1109 RADEON_WRITE(R600_SPI_PS_IN_CONTROL_0, R600_NUM_INTERP(2));
1110 RADEON_WRITE(R600_CB_COLOR7_FRAG, 0);
1111
1112 /* clear render buffer base addresses */
1113 RADEON_WRITE(R600_CB_COLOR0_BASE, 0);
1114 RADEON_WRITE(R600_CB_COLOR1_BASE, 0);
1115 RADEON_WRITE(R600_CB_COLOR2_BASE, 0);
1116 RADEON_WRITE(R600_CB_COLOR3_BASE, 0);
1117 RADEON_WRITE(R600_CB_COLOR4_BASE, 0);
1118 RADEON_WRITE(R600_CB_COLOR5_BASE, 0);
1119 RADEON_WRITE(R600_CB_COLOR6_BASE, 0);
1120 RADEON_WRITE(R600_CB_COLOR7_BASE, 0);
1121
1122 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
1123 case CHIP_RV610:
1124 case CHIP_RS780:
1125 case CHIP_RV620:
1126 tc_cntl = R600_TC_L2_SIZE(8);
1127 break;
1128 case CHIP_RV630:
1129 case CHIP_RV635:
1130 tc_cntl = R600_TC_L2_SIZE(4);
1131 break;
1132 case CHIP_R600:
1133 tc_cntl = R600_TC_L2_SIZE(0) | R600_L2_DISABLE_LATE_HIT;
1134 break;
1135 default:
1136 tc_cntl = R600_TC_L2_SIZE(0);
1137 break;
1138 }
1139
1140 RADEON_WRITE(R600_TC_CNTL, tc_cntl);
1141
1142 hdp_host_path_cntl = RADEON_READ(R600_HDP_HOST_PATH_CNTL);
1143 RADEON_WRITE(R600_HDP_HOST_PATH_CNTL, hdp_host_path_cntl);
1144
1145 arb_pop = RADEON_READ(R600_ARB_POP);
1146 arb_pop |= R600_ENABLE_TC128;
1147 RADEON_WRITE(R600_ARB_POP, arb_pop);
1148
1149 RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
1150 RADEON_WRITE(R600_PA_CL_ENHANCE, (R600_CLIP_VTX_REORDER_ENA |
1151 R600_NUM_CLIP_SEQ(3)));
1152 RADEON_WRITE(R600_PA_SC_ENHANCE, R600_FORCE_EOV_MAX_CLK_CNT(4095));
1153
1154}
1155
1156static u32 r700_get_tile_pipe_to_backend_map(u32 num_tile_pipes,
1157 u32 num_backends,
1158 u32 backend_disable_mask)
1159{
1160 u32 backend_map = 0;
1161 u32 enabled_backends_mask;
1162 u32 enabled_backends_count;
1163 u32 cur_pipe;
1164 u32 swizzle_pipe[R7XX_MAX_PIPES];
1165 u32 cur_backend;
1166 u32 i;
1167
1168 if (num_tile_pipes > R7XX_MAX_PIPES)
1169 num_tile_pipes = R7XX_MAX_PIPES;
1170 if (num_tile_pipes < 1)
1171 num_tile_pipes = 1;
1172 if (num_backends > R7XX_MAX_BACKENDS)
1173 num_backends = R7XX_MAX_BACKENDS;
1174 if (num_backends < 1)
1175 num_backends = 1;
1176
1177 enabled_backends_mask = 0;
1178 enabled_backends_count = 0;
1179 for (i = 0; i < R7XX_MAX_BACKENDS; ++i) {
1180 if (((backend_disable_mask >> i) & 1) == 0) {
1181 enabled_backends_mask |= (1 << i);
1182 ++enabled_backends_count;
1183 }
1184 if (enabled_backends_count == num_backends)
1185 break;
1186 }
1187
1188 if (enabled_backends_count == 0) {
1189 enabled_backends_mask = 1;
1190 enabled_backends_count = 1;
1191 }
1192
1193 if (enabled_backends_count != num_backends)
1194 num_backends = enabled_backends_count;
1195
1196 memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R7XX_MAX_PIPES);
1197 switch (num_tile_pipes) {
1198 case 1:
1199 swizzle_pipe[0] = 0;
1200 break;
1201 case 2:
1202 swizzle_pipe[0] = 0;
1203 swizzle_pipe[1] = 1;
1204 break;
1205 case 3:
1206 swizzle_pipe[0] = 0;
1207 swizzle_pipe[1] = 2;
1208 swizzle_pipe[2] = 1;
1209 break;
1210 case 4:
1211 swizzle_pipe[0] = 0;
1212 swizzle_pipe[1] = 2;
1213 swizzle_pipe[2] = 3;
1214 swizzle_pipe[3] = 1;
1215 break;
1216 case 5:
1217 swizzle_pipe[0] = 0;
1218 swizzle_pipe[1] = 2;
1219 swizzle_pipe[2] = 4;
1220 swizzle_pipe[3] = 1;
1221 swizzle_pipe[4] = 3;
1222 break;
1223 case 6:
1224 swizzle_pipe[0] = 0;
1225 swizzle_pipe[1] = 2;
1226 swizzle_pipe[2] = 4;
1227 swizzle_pipe[3] = 5;
1228 swizzle_pipe[4] = 3;
1229 swizzle_pipe[5] = 1;
1230 break;
1231 case 7:
1232 swizzle_pipe[0] = 0;
1233 swizzle_pipe[1] = 2;
1234 swizzle_pipe[2] = 4;
1235 swizzle_pipe[3] = 6;
1236 swizzle_pipe[4] = 3;
1237 swizzle_pipe[5] = 1;
1238 swizzle_pipe[6] = 5;
1239 break;
1240 case 8:
1241 swizzle_pipe[0] = 0;
1242 swizzle_pipe[1] = 2;
1243 swizzle_pipe[2] = 4;
1244 swizzle_pipe[3] = 6;
1245 swizzle_pipe[4] = 3;
1246 swizzle_pipe[5] = 1;
1247 swizzle_pipe[6] = 7;
1248 swizzle_pipe[7] = 5;
1249 break;
1250 }
1251
1252 cur_backend = 0;
1253 for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) {
1254 while (((1 << cur_backend) & enabled_backends_mask) == 0)
1255 cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;
1256
1257 backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2)));
1258
1259 cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;
1260 }
1261
1262 return backend_map;
1263}
1264
1265static void r700_gfx_init(struct drm_device *dev,
1266 drm_radeon_private_t *dev_priv)
1267{
1268 int i, j, num_qd_pipes;
1269 u32 sx_debug_1;
1270 u32 smx_dc_ctl0;
1271 u32 num_gs_verts_per_thread;
1272 u32 vgt_gs_per_es;
1273 u32 gs_prim_buffer_depth = 0;
1274 u32 sq_ms_fifo_sizes;
1275 u32 sq_config;
1276 u32 sq_thread_resource_mgmt;
1277 u32 hdp_host_path_cntl;
1278 u32 sq_dyn_gpr_size_simd_ab_0;
1279 u32 backend_map;
1280 u32 gb_tiling_config = 0;
1281 u32 cc_rb_backend_disable = 0;
1282 u32 cc_gc_shader_pipe_config = 0;
1283 u32 mc_arb_ramcfg;
1284 u32 db_debug4;
1285
1286 /* setup chip specs */
1287 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
1288 case CHIP_RV770:
1289 dev_priv->r600_max_pipes = 4;
1290 dev_priv->r600_max_tile_pipes = 8;
1291 dev_priv->r600_max_simds = 10;
1292 dev_priv->r600_max_backends = 4;
1293 dev_priv->r600_max_gprs = 256;
1294 dev_priv->r600_max_threads = 248;
1295 dev_priv->r600_max_stack_entries = 512;
1296 dev_priv->r600_max_hw_contexts = 8;
1297 dev_priv->r600_max_gs_threads = 16 * 2;
1298 dev_priv->r600_sx_max_export_size = 128;
1299 dev_priv->r600_sx_max_export_pos_size = 16;
1300 dev_priv->r600_sx_max_export_smx_size = 112;
1301 dev_priv->r600_sq_num_cf_insts = 2;
1302
1303 dev_priv->r700_sx_num_of_sets = 7;
1304 dev_priv->r700_sc_prim_fifo_size = 0xF9;
1305 dev_priv->r700_sc_hiz_tile_fifo_size = 0x30;
1306 dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130;
1307 break;
1308 case CHIP_RV730:
1309 dev_priv->r600_max_pipes = 2;
1310 dev_priv->r600_max_tile_pipes = 4;
1311 dev_priv->r600_max_simds = 8;
1312 dev_priv->r600_max_backends = 2;
1313 dev_priv->r600_max_gprs = 128;
1314 dev_priv->r600_max_threads = 248;
1315 dev_priv->r600_max_stack_entries = 256;
1316 dev_priv->r600_max_hw_contexts = 8;
1317 dev_priv->r600_max_gs_threads = 16 * 2;
1318 dev_priv->r600_sx_max_export_size = 256;
1319 dev_priv->r600_sx_max_export_pos_size = 32;
1320 dev_priv->r600_sx_max_export_smx_size = 224;
1321 dev_priv->r600_sq_num_cf_insts = 2;
1322
1323 dev_priv->r700_sx_num_of_sets = 7;
1324 dev_priv->r700_sc_prim_fifo_size = 0xf9;
1325 dev_priv->r700_sc_hiz_tile_fifo_size = 0x30;
1326 dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130;
1327 break;
1328 case CHIP_RV710:
1329 dev_priv->r600_max_pipes = 2;
1330 dev_priv->r600_max_tile_pipes = 2;
1331 dev_priv->r600_max_simds = 2;
1332 dev_priv->r600_max_backends = 1;
1333 dev_priv->r600_max_gprs = 256;
1334 dev_priv->r600_max_threads = 192;
1335 dev_priv->r600_max_stack_entries = 256;
1336 dev_priv->r600_max_hw_contexts = 4;
1337 dev_priv->r600_max_gs_threads = 8 * 2;
1338 dev_priv->r600_sx_max_export_size = 128;
1339 dev_priv->r600_sx_max_export_pos_size = 16;
1340 dev_priv->r600_sx_max_export_smx_size = 112;
1341 dev_priv->r600_sq_num_cf_insts = 1;
1342
1343 dev_priv->r700_sx_num_of_sets = 7;
1344 dev_priv->r700_sc_prim_fifo_size = 0x40;
1345 dev_priv->r700_sc_hiz_tile_fifo_size = 0x30;
1346 dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130;
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 /* Initialize HDP */
1353 j = 0;
1354 for (i = 0; i < 32; i++) {
1355 RADEON_WRITE((0x2c14 + j), 0x00000000);
1356 RADEON_WRITE((0x2c18 + j), 0x00000000);
1357 RADEON_WRITE((0x2c1c + j), 0x00000000);
1358 RADEON_WRITE((0x2c20 + j), 0x00000000);
1359 RADEON_WRITE((0x2c24 + j), 0x00000000);
1360 j += 0x18;
1361 }
1362
1363 RADEON_WRITE(R600_GRBM_CNTL, R600_GRBM_READ_TIMEOUT(0xff));
1364
1365 /* setup tiling, simd, pipe config */
1366 mc_arb_ramcfg = RADEON_READ(R700_MC_ARB_RAMCFG);
1367
1368 switch (dev_priv->r600_max_tile_pipes) {
1369 case 1:
1370 gb_tiling_config |= R600_PIPE_TILING(0);
1371 break;
1372 case 2:
1373 gb_tiling_config |= R600_PIPE_TILING(1);
1374 break;
1375 case 4:
1376 gb_tiling_config |= R600_PIPE_TILING(2);
1377 break;
1378 case 8:
1379 gb_tiling_config |= R600_PIPE_TILING(3);
1380 break;
1381 default:
1382 break;
1383 }
1384
1385 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)
1386 gb_tiling_config |= R600_BANK_TILING(1);
1387 else
1388 gb_tiling_config |= R600_BANK_TILING((mc_arb_ramcfg >> R700_NOOFBANK_SHIFT) & R700_NOOFBANK_MASK);
1389
1390 gb_tiling_config |= R600_GROUP_SIZE(0);
1391
1392 if (((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK) > 3) {
1393 gb_tiling_config |= R600_ROW_TILING(3);
1394 gb_tiling_config |= R600_SAMPLE_SPLIT(3);
1395 } else {
1396 gb_tiling_config |=
1397 R600_ROW_TILING(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK));
1398 gb_tiling_config |=
1399 R600_SAMPLE_SPLIT(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK));
1400 }
1401
1402 gb_tiling_config |= R600_BANK_SWAPS(1);
1403
1404 backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
1405 dev_priv->r600_max_backends,
1406 (0xff << dev_priv->r600_max_backends) & 0xff);
1407 gb_tiling_config |= R600_BACKEND_MAP(backend_map);
1408
1409 cc_gc_shader_pipe_config =
1410 R600_INACTIVE_QD_PIPES((R7XX_MAX_PIPES_MASK << dev_priv->r600_max_pipes) & R7XX_MAX_PIPES_MASK);
1411 cc_gc_shader_pipe_config |=
1412 R600_INACTIVE_SIMDS((R7XX_MAX_SIMDS_MASK << dev_priv->r600_max_simds) & R7XX_MAX_SIMDS_MASK);
1413
1414 cc_rb_backend_disable =
1415 R600_BACKEND_DISABLE((R7XX_MAX_BACKENDS_MASK << dev_priv->r600_max_backends) & R7XX_MAX_BACKENDS_MASK);
1416
1417 RADEON_WRITE(R600_GB_TILING_CONFIG, gb_tiling_config);
1418 RADEON_WRITE(R600_DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));
1419 RADEON_WRITE(R600_HDP_TILING_CONFIG, (gb_tiling_config & 0xffff));
1420
1421 RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE, cc_rb_backend_disable);
1422 RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
1423 RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
1424
1425 RADEON_WRITE(R700_CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);
1426 RADEON_WRITE(R700_CGTS_SYS_TCC_DISABLE, 0);
1427 RADEON_WRITE(R700_CGTS_TCC_DISABLE, 0);
1428 RADEON_WRITE(R700_CGTS_USER_SYS_TCC_DISABLE, 0);
1429 RADEON_WRITE(R700_CGTS_USER_TCC_DISABLE, 0);
1430
1431 num_qd_pipes =
1432 R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK);
1433 RADEON_WRITE(R600_VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & R600_DEALLOC_DIST_MASK);
1434 RADEON_WRITE(R600_VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & R600_VTX_REUSE_DEPTH_MASK);
1435
1436 /* set HW defaults for 3D engine */
1437 RADEON_WRITE(R600_CP_QUEUE_THRESHOLDS, (R600_ROQ_IB1_START(0x16) |
1438 R600_ROQ_IB2_START(0x2b)));
1439
1440 RADEON_WRITE(R600_CP_MEQ_THRESHOLDS, R700_STQ_SPLIT(0x30));
1441
1442 RADEON_WRITE(R600_TA_CNTL_AUX, (R600_DISABLE_CUBE_ANISO |
1443 R600_SYNC_GRADIENT |
1444 R600_SYNC_WALKER |
1445 R600_SYNC_ALIGNER));
1446
1447 sx_debug_1 = RADEON_READ(R700_SX_DEBUG_1);
1448 sx_debug_1 |= R700_ENABLE_NEW_SMX_ADDRESS;
1449 RADEON_WRITE(R700_SX_DEBUG_1, sx_debug_1);
1450
1451 smx_dc_ctl0 = RADEON_READ(R600_SMX_DC_CTL0);
1452 smx_dc_ctl0 &= ~R700_CACHE_DEPTH(0x1ff);
1453 smx_dc_ctl0 |= R700_CACHE_DEPTH((dev_priv->r700_sx_num_of_sets * 64) - 1);
1454 RADEON_WRITE(R600_SMX_DC_CTL0, smx_dc_ctl0);
1455
1456 RADEON_WRITE(R700_SMX_EVENT_CTL, (R700_ES_FLUSH_CTL(4) |
1457 R700_GS_FLUSH_CTL(4) |
1458 R700_ACK_FLUSH_CTL(3) |
1459 R700_SYNC_FLUSH_CTL));
1460
1461 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)
1462 RADEON_WRITE(R700_DB_DEBUG3, R700_DB_CLK_OFF_DELAY(0x1f));
1463 else {
1464 db_debug4 = RADEON_READ(RV700_DB_DEBUG4);
1465 db_debug4 |= RV700_DISABLE_TILE_COVERED_FOR_PS_ITER;
1466 RADEON_WRITE(RV700_DB_DEBUG4, db_debug4);
1467 }
1468
1469 RADEON_WRITE(R600_SX_EXPORT_BUFFER_SIZES, (R600_COLOR_BUFFER_SIZE((dev_priv->r600_sx_max_export_size / 4) - 1) |
1470 R600_POSITION_BUFFER_SIZE((dev_priv->r600_sx_max_export_pos_size / 4) - 1) |
1471 R600_SMX_BUFFER_SIZE((dev_priv->r600_sx_max_export_smx_size / 4) - 1)));
1472
1473 RADEON_WRITE(R700_PA_SC_FIFO_SIZE_R7XX, (R700_SC_PRIM_FIFO_SIZE(dev_priv->r700_sc_prim_fifo_size) |
1474 R700_SC_HIZ_TILE_FIFO_SIZE(dev_priv->r700_sc_hiz_tile_fifo_size) |
1475 R700_SC_EARLYZ_TILE_FIFO_SIZE(dev_priv->r700_sc_earlyz_tile_fifo_fize)));
1476
1477 RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
1478
1479 RADEON_WRITE(R600_VGT_NUM_INSTANCES, 1);
1480
1481 RADEON_WRITE(R600_SPI_CONFIG_CNTL, R600_GPR_WRITE_PRIORITY(0));
1482
1483 RADEON_WRITE(R600_SPI_CONFIG_CNTL_1, R600_VTX_DONE_DELAY(4));
1484
1485 RADEON_WRITE(R600_CP_PERFMON_CNTL, 0);
1486
1487 sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(16 * dev_priv->r600_sq_num_cf_insts) |
1488 R600_DONE_FIFO_HIWATER(0xe0) |
1489 R600_ALU_UPDATE_FIFO_HIWATER(0x8));
1490 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
1491 case CHIP_RV770:
1492 sq_ms_fifo_sizes |= R600_FETCH_FIFO_HIWATER(0x1);
1493 break;
1494 case CHIP_RV730:
1495 case CHIP_RV710:
1496 default:
1497 sq_ms_fifo_sizes |= R600_FETCH_FIFO_HIWATER(0x4);
1498 break;
1499 }
1500 RADEON_WRITE(R600_SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes);
1501
1502 /* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT
1503 * should be adjusted as needed by the 2D/3D drivers. This just sets default values
1504 */
1505 sq_config = RADEON_READ(R600_SQ_CONFIG);
1506 sq_config &= ~(R600_PS_PRIO(3) |
1507 R600_VS_PRIO(3) |
1508 R600_GS_PRIO(3) |
1509 R600_ES_PRIO(3));
1510 sq_config |= (R600_DX9_CONSTS |
1511 R600_VC_ENABLE |
1512 R600_EXPORT_SRC_C |
1513 R600_PS_PRIO(0) |
1514 R600_VS_PRIO(1) |
1515 R600_GS_PRIO(2) |
1516 R600_ES_PRIO(3));
1517 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)
1518 /* no vertex cache */
1519 sq_config &= ~R600_VC_ENABLE;
1520
1521 RADEON_WRITE(R600_SQ_CONFIG, sq_config);
1522
1523 RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1, (R600_NUM_PS_GPRS((dev_priv->r600_max_gprs * 24)/64) |
1524 R600_NUM_VS_GPRS((dev_priv->r600_max_gprs * 24)/64) |
1525 R600_NUM_CLAUSE_TEMP_GPRS(((dev_priv->r600_max_gprs * 24)/64)/2)));
1526
1527 RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2, (R600_NUM_GS_GPRS((dev_priv->r600_max_gprs * 7)/64) |
1528 R600_NUM_ES_GPRS((dev_priv->r600_max_gprs * 7)/64)));
1529
1530 sq_thread_resource_mgmt = (R600_NUM_PS_THREADS((dev_priv->r600_max_threads * 4)/8) |
1531 R600_NUM_VS_THREADS((dev_priv->r600_max_threads * 2)/8) |
1532 R600_NUM_ES_THREADS((dev_priv->r600_max_threads * 1)/8));
1533 if (((dev_priv->r600_max_threads * 1) / 8) > dev_priv->r600_max_gs_threads)
1534 sq_thread_resource_mgmt |= R600_NUM_GS_THREADS(dev_priv->r600_max_gs_threads);
1535 else
1536 sq_thread_resource_mgmt |= R600_NUM_GS_THREADS((dev_priv->r600_max_gs_threads * 1)/8);
1537 RADEON_WRITE(R600_SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);
1538
1539 RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_1, (R600_NUM_PS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4) |
1540 R600_NUM_VS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4)));
1541
1542 RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_2, (R600_NUM_GS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4) |
1543 R600_NUM_ES_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4)));
1544
1545 sq_dyn_gpr_size_simd_ab_0 = (R700_SIMDA_RING0((dev_priv->r600_max_gprs * 38)/64) |
1546 R700_SIMDA_RING1((dev_priv->r600_max_gprs * 38)/64) |
1547 R700_SIMDB_RING0((dev_priv->r600_max_gprs * 38)/64) |
1548 R700_SIMDB_RING1((dev_priv->r600_max_gprs * 38)/64));
1549
1550 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_0, sq_dyn_gpr_size_simd_ab_0);
1551 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_1, sq_dyn_gpr_size_simd_ab_0);
1552 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_2, sq_dyn_gpr_size_simd_ab_0);
1553 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_3, sq_dyn_gpr_size_simd_ab_0);
1554 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_4, sq_dyn_gpr_size_simd_ab_0);
1555 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_5, sq_dyn_gpr_size_simd_ab_0);
1556 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_6, sq_dyn_gpr_size_simd_ab_0);
1557 RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0);
1558
1559 RADEON_WRITE(R700_PA_SC_FORCE_EOV_MAX_CNTS, (R700_FORCE_EOV_MAX_CLK_CNT(4095) |
1560 R700_FORCE_EOV_MAX_REZ_CNT(255)));
1561
1562 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)
1563 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, (R600_CACHE_INVALIDATION(R600_TC_ONLY) |
1564 R700_AUTO_INVLD_EN(R700_ES_AND_GS_AUTO)));
1565 else
1566 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, (R600_CACHE_INVALIDATION(R600_VC_AND_TC) |
1567 R700_AUTO_INVLD_EN(R700_ES_AND_GS_AUTO)));
1568
1569 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
1570 case CHIP_RV770:
1571 case CHIP_RV730:
1572 gs_prim_buffer_depth = 384;
1573 break;
1574 case CHIP_RV710:
1575 gs_prim_buffer_depth = 128;
1576 break;
1577 default:
1578 break;
1579 }
1580
1581 num_gs_verts_per_thread = dev_priv->r600_max_pipes * 16;
1582 vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread;
1583 /* Max value for this is 256 */
1584 if (vgt_gs_per_es > 256)
1585 vgt_gs_per_es = 256;
1586
1587 RADEON_WRITE(R600_VGT_ES_PER_GS, 128);
1588 RADEON_WRITE(R600_VGT_GS_PER_ES, vgt_gs_per_es);
1589 RADEON_WRITE(R600_VGT_GS_PER_VS, 2);
1590
1591 /* more default values. 2D/3D driver should adjust as needed */
1592 RADEON_WRITE(R600_VGT_GS_VERTEX_REUSE, 16);
1593 RADEON_WRITE(R600_PA_SC_LINE_STIPPLE_STATE, 0);
1594 RADEON_WRITE(R600_VGT_STRMOUT_EN, 0);
1595 RADEON_WRITE(R600_SX_MISC, 0);
1596 RADEON_WRITE(R600_PA_SC_MODE_CNTL, 0);
1597 RADEON_WRITE(R700_PA_SC_EDGERULE, 0xaaaaaaaa);
1598 RADEON_WRITE(R600_PA_SC_AA_CONFIG, 0);
1599 RADEON_WRITE(R600_PA_SC_CLIPRECT_RULE, 0xffff);
1600 RADEON_WRITE(R600_PA_SC_LINE_STIPPLE, 0);
1601 RADEON_WRITE(R600_SPI_INPUT_Z, 0);
1602 RADEON_WRITE(R600_SPI_PS_IN_CONTROL_0, R600_NUM_INTERP(2));
1603 RADEON_WRITE(R600_CB_COLOR7_FRAG, 0);
1604
1605 /* clear render buffer base addresses */
1606 RADEON_WRITE(R600_CB_COLOR0_BASE, 0);
1607 RADEON_WRITE(R600_CB_COLOR1_BASE, 0);
1608 RADEON_WRITE(R600_CB_COLOR2_BASE, 0);
1609 RADEON_WRITE(R600_CB_COLOR3_BASE, 0);
1610 RADEON_WRITE(R600_CB_COLOR4_BASE, 0);
1611 RADEON_WRITE(R600_CB_COLOR5_BASE, 0);
1612 RADEON_WRITE(R600_CB_COLOR6_BASE, 0);
1613 RADEON_WRITE(R600_CB_COLOR7_BASE, 0);
1614
1615 RADEON_WRITE(R700_TCP_CNTL, 0);
1616
1617 hdp_host_path_cntl = RADEON_READ(R600_HDP_HOST_PATH_CNTL);
1618 RADEON_WRITE(R600_HDP_HOST_PATH_CNTL, hdp_host_path_cntl);
1619
1620 RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
1621
1622 RADEON_WRITE(R600_PA_CL_ENHANCE, (R600_CLIP_VTX_REORDER_ENA |
1623 R600_NUM_CLIP_SEQ(3)));
1624
1625}
1626
1627static void r600_cp_init_ring_buffer(struct drm_device *dev,
1628 drm_radeon_private_t *dev_priv,
1629 struct drm_file *file_priv)
1630{
1631 struct drm_radeon_master_private *master_priv;
1632 u32 ring_start;
1633 u64 rptr_addr;
1634
1635 if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
1636 r700_gfx_init(dev, dev_priv);
1637 else
1638 r600_gfx_init(dev, dev_priv);
1639
1640 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
1641 RADEON_READ(R600_GRBM_SOFT_RESET);
1642 DRM_UDELAY(15000);
1643 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
1644
1645
1646 /* Set ring buffer size */
1647#ifdef __BIG_ENDIAN
1648 RADEON_WRITE(R600_CP_RB_CNTL,
1649 RADEON_BUF_SWAP_32BIT |
1650 RADEON_RB_NO_UPDATE |
1651 (dev_priv->ring.rptr_update_l2qw << 8) |
1652 dev_priv->ring.size_l2qw);
1653#else
1654 RADEON_WRITE(R600_CP_RB_CNTL,
1655 RADEON_RB_NO_UPDATE |
1656 (dev_priv->ring.rptr_update_l2qw << 8) |
1657 dev_priv->ring.size_l2qw);
1658#endif
1659
1660 RADEON_WRITE(R600_CP_SEM_WAIT_TIMER, 0x4);
1661
1662 /* Set the write pointer delay */
1663 RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0);
1664
1665#ifdef __BIG_ENDIAN
1666 RADEON_WRITE(R600_CP_RB_CNTL,
1667 RADEON_BUF_SWAP_32BIT |
1668 RADEON_RB_NO_UPDATE |
1669 RADEON_RB_RPTR_WR_ENA |
1670 (dev_priv->ring.rptr_update_l2qw << 8) |
1671 dev_priv->ring.size_l2qw);
1672#else
1673 RADEON_WRITE(R600_CP_RB_CNTL,
1674 RADEON_RB_NO_UPDATE |
1675 RADEON_RB_RPTR_WR_ENA |
1676 (dev_priv->ring.rptr_update_l2qw << 8) |
1677 dev_priv->ring.size_l2qw);
1678#endif
1679
1680 /* Initialize the ring buffer's read and write pointers */
1681 RADEON_WRITE(R600_CP_RB_RPTR_WR, 0);
1682 RADEON_WRITE(R600_CP_RB_WPTR, 0);
1683 SET_RING_HEAD(dev_priv, 0);
1684 dev_priv->ring.tail = 0;
1685
1686#if __OS_HAS_AGP
1687 if (dev_priv->flags & RADEON_IS_AGP) {
1688 rptr_addr = dev_priv->ring_rptr->offset
1689 - dev->agp->base +
1690 dev_priv->gart_vm_start;
1691 } else
1692#endif
1693 {
1694 rptr_addr = dev_priv->ring_rptr->offset
1695 - ((unsigned long) dev->sg->virtual)
1696 + dev_priv->gart_vm_start;
1697 }
1698 RADEON_WRITE(R600_CP_RB_RPTR_ADDR,
1699 rptr_addr & 0xffffffff);
1700 RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI,
1701 upper_32_bits(rptr_addr));
1702
1703#ifdef __BIG_ENDIAN
1704 RADEON_WRITE(R600_CP_RB_CNTL,
1705 RADEON_BUF_SWAP_32BIT |
1706 (dev_priv->ring.rptr_update_l2qw << 8) |
1707 dev_priv->ring.size_l2qw);
1708#else
1709 RADEON_WRITE(R600_CP_RB_CNTL,
1710 (dev_priv->ring.rptr_update_l2qw << 8) |
1711 dev_priv->ring.size_l2qw);
1712#endif
1713
1714#if __OS_HAS_AGP
1715 if (dev_priv->flags & RADEON_IS_AGP) {
1716 /* XXX */
1717 radeon_write_agp_base(dev_priv, dev->agp->base);
1718
1719 /* XXX */
1720 radeon_write_agp_location(dev_priv,
1721 (((dev_priv->gart_vm_start - 1 +
1722 dev_priv->gart_size) & 0xffff0000) |
1723 (dev_priv->gart_vm_start >> 16)));
1724
1725 ring_start = (dev_priv->cp_ring->offset
1726 - dev->agp->base
1727 + dev_priv->gart_vm_start);
1728 } else
1729#endif
1730 ring_start = (dev_priv->cp_ring->offset
1731 - (unsigned long)dev->sg->virtual
1732 + dev_priv->gart_vm_start);
1733
1734 RADEON_WRITE(R600_CP_RB_BASE, ring_start >> 8);
1735
1736 RADEON_WRITE(R600_CP_ME_CNTL, 0xff);
1737
1738 RADEON_WRITE(R600_CP_DEBUG, (1 << 27) | (1 << 28));
1739
1740 /* Initialize the scratch register pointer. This will cause
1741 * the scratch register values to be written out to memory
1742 * whenever they are updated.
1743 *
1744 * We simply put this behind the ring read pointer, this works
1745 * with PCI GART as well as (whatever kind of) AGP GART
1746 */
1747 {
1748 u64 scratch_addr;
1749
1750 scratch_addr = RADEON_READ(R600_CP_RB_RPTR_ADDR);
1751 scratch_addr |= ((u64)RADEON_READ(R600_CP_RB_RPTR_ADDR_HI)) << 32;
1752 scratch_addr += R600_SCRATCH_REG_OFFSET;
1753 scratch_addr >>= 8;
1754 scratch_addr &= 0xffffffff;
1755
1756 RADEON_WRITE(R600_SCRATCH_ADDR, (uint32_t)scratch_addr);
1757 }
1758
1759 RADEON_WRITE(R600_SCRATCH_UMSK, 0x7);
1760
1761 /* Turn on bus mastering */
1762 radeon_enable_bm(dev_priv);
1763
1764 radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(0), 0);
1765 RADEON_WRITE(R600_LAST_FRAME_REG, 0);
1766
1767 radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(1), 0);
1768 RADEON_WRITE(R600_LAST_DISPATCH_REG, 0);
1769
1770 radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(2), 0);
1771 RADEON_WRITE(R600_LAST_CLEAR_REG, 0);
1772
1773 /* reset sarea copies of these */
1774 master_priv = file_priv->master->driver_priv;
1775 if (master_priv->sarea_priv) {
1776 master_priv->sarea_priv->last_frame = 0;
1777 master_priv->sarea_priv->last_dispatch = 0;
1778 master_priv->sarea_priv->last_clear = 0;
1779 }
1780
1781 r600_do_wait_for_idle(dev_priv);
1782
1783}
1784
1785int r600_do_cleanup_cp(struct drm_device *dev)
1786{
1787 drm_radeon_private_t *dev_priv = dev->dev_private;
1788 DRM_DEBUG("\n");
1789
1790 /* Make sure interrupts are disabled here because the uninstall ioctl
1791 * may not have been called from userspace and after dev_private
1792 * is freed, it's too late.
1793 */
1794 if (dev->irq_enabled)
1795 drm_irq_uninstall(dev);
1796
1797#if __OS_HAS_AGP
1798 if (dev_priv->flags & RADEON_IS_AGP) {
1799 if (dev_priv->cp_ring != NULL) {
1800 drm_core_ioremapfree(dev_priv->cp_ring, dev);
1801 dev_priv->cp_ring = NULL;
1802 }
1803 if (dev_priv->ring_rptr != NULL) {
1804 drm_core_ioremapfree(dev_priv->ring_rptr, dev);
1805 dev_priv->ring_rptr = NULL;
1806 }
1807 if (dev->agp_buffer_map != NULL) {
1808 drm_core_ioremapfree(dev->agp_buffer_map, dev);
1809 dev->agp_buffer_map = NULL;
1810 }
1811 } else
1812#endif
1813 {
1814
1815 if (dev_priv->gart_info.bus_addr)
1816 r600_page_table_cleanup(dev, &dev_priv->gart_info);
1817
1818 if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB) {
1819 drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
1820 dev_priv->gart_info.addr = NULL;
1821 }
1822 }
1823 /* only clear to the start of flags */
1824 memset(dev_priv, 0, offsetof(drm_radeon_private_t, flags));
1825
1826 return 0;
1827}
1828
1829int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
1830 struct drm_file *file_priv)
1831{
1832 drm_radeon_private_t *dev_priv = dev->dev_private;
1833 struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv;
1834
1835 DRM_DEBUG("\n");
1836
1837 /* if we require new memory map but we don't have it fail */
1838 if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) {
1839 DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n");
1840 r600_do_cleanup_cp(dev);
1841 return -EINVAL;
1842 }
1843
1844 if (init->is_pci && (dev_priv->flags & RADEON_IS_AGP)) {
1845 DRM_DEBUG("Forcing AGP card to PCI mode\n");
1846 dev_priv->flags &= ~RADEON_IS_AGP;
1847 /* The writeback test succeeds, but when writeback is enabled,
1848 * the ring buffer read ptr update fails after first 128 bytes.
1849 */
1850 radeon_no_wb = 1;
1851 } else if (!(dev_priv->flags & (RADEON_IS_AGP | RADEON_IS_PCI | RADEON_IS_PCIE))
1852 && !init->is_pci) {
1853 DRM_DEBUG("Restoring AGP flag\n");
1854 dev_priv->flags |= RADEON_IS_AGP;
1855 }
1856
1857 dev_priv->usec_timeout = init->usec_timeout;
1858 if (dev_priv->usec_timeout < 1 ||
1859 dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT) {
1860 DRM_DEBUG("TIMEOUT problem!\n");
1861 r600_do_cleanup_cp(dev);
1862 return -EINVAL;
1863 }
1864
1865 /* Enable vblank on CRTC1 for older X servers
1866 */
1867 dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1;
1868
1869 dev_priv->cp_mode = init->cp_mode;
1870
1871 /* We don't support anything other than bus-mastering ring mode,
1872 * but the ring can be in either AGP or PCI space for the ring
1873 * read pointer.
1874 */
1875 if ((init->cp_mode != RADEON_CSQ_PRIBM_INDDIS) &&
1876 (init->cp_mode != RADEON_CSQ_PRIBM_INDBM)) {
1877 DRM_DEBUG("BAD cp_mode (%x)!\n", init->cp_mode);
1878 r600_do_cleanup_cp(dev);
1879 return -EINVAL;
1880 }
1881
1882 switch (init->fb_bpp) {
1883 case 16:
1884 dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565;
1885 break;
1886 case 32:
1887 default:
1888 dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888;
1889 break;
1890 }
1891 dev_priv->front_offset = init->front_offset;
1892 dev_priv->front_pitch = init->front_pitch;
1893 dev_priv->back_offset = init->back_offset;
1894 dev_priv->back_pitch = init->back_pitch;
1895
1896 dev_priv->ring_offset = init->ring_offset;
1897 dev_priv->ring_rptr_offset = init->ring_rptr_offset;
1898 dev_priv->buffers_offset = init->buffers_offset;
1899 dev_priv->gart_textures_offset = init->gart_textures_offset;
1900
1901 master_priv->sarea = drm_getsarea(dev);
1902 if (!master_priv->sarea) {
1903 DRM_ERROR("could not find sarea!\n");
1904 r600_do_cleanup_cp(dev);
1905 return -EINVAL;
1906 }
1907
1908 dev_priv->cp_ring = drm_core_findmap(dev, init->ring_offset);
1909 if (!dev_priv->cp_ring) {
1910 DRM_ERROR("could not find cp ring region!\n");
1911 r600_do_cleanup_cp(dev);
1912 return -EINVAL;
1913 }
1914 dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
1915 if (!dev_priv->ring_rptr) {
1916 DRM_ERROR("could not find ring read pointer!\n");
1917 r600_do_cleanup_cp(dev);
1918 return -EINVAL;
1919 }
1920 dev->agp_buffer_token = init->buffers_offset;
1921 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
1922 if (!dev->agp_buffer_map) {
1923 DRM_ERROR("could not find dma buffer region!\n");
1924 r600_do_cleanup_cp(dev);
1925 return -EINVAL;
1926 }
1927
1928 if (init->gart_textures_offset) {
1929 dev_priv->gart_textures =
1930 drm_core_findmap(dev, init->gart_textures_offset);
1931 if (!dev_priv->gart_textures) {
1932 DRM_ERROR("could not find GART texture region!\n");
1933 r600_do_cleanup_cp(dev);
1934 return -EINVAL;
1935 }
1936 }
1937
1938#if __OS_HAS_AGP
1939 /* XXX */
1940 if (dev_priv->flags & RADEON_IS_AGP) {
1941 drm_core_ioremap_wc(dev_priv->cp_ring, dev);
1942 drm_core_ioremap_wc(dev_priv->ring_rptr, dev);
1943 drm_core_ioremap_wc(dev->agp_buffer_map, dev);
1944 if (!dev_priv->cp_ring->handle ||
1945 !dev_priv->ring_rptr->handle ||
1946 !dev->agp_buffer_map->handle) {
1947 DRM_ERROR("could not find ioremap agp regions!\n");
1948 r600_do_cleanup_cp(dev);
1949 return -EINVAL;
1950 }
1951 } else
1952#endif
1953 {
1954 dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset;
1955 dev_priv->ring_rptr->handle =
1956 (void *)dev_priv->ring_rptr->offset;
1957 dev->agp_buffer_map->handle =
1958 (void *)dev->agp_buffer_map->offset;
1959
1960 DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
1961 dev_priv->cp_ring->handle);
1962 DRM_DEBUG("dev_priv->ring_rptr->handle %p\n",
1963 dev_priv->ring_rptr->handle);
1964 DRM_DEBUG("dev->agp_buffer_map->handle %p\n",
1965 dev->agp_buffer_map->handle);
1966 }
1967
1968 dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << 24;
1969 dev_priv->fb_size =
1970 (((radeon_read_fb_location(dev_priv) & 0xffff0000u) << 8) + 0x1000000)
1971 - dev_priv->fb_location;
1972
1973 dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
1974 ((dev_priv->front_offset
1975 + dev_priv->fb_location) >> 10));
1976
1977 dev_priv->back_pitch_offset = (((dev_priv->back_pitch / 64) << 22) |
1978 ((dev_priv->back_offset
1979 + dev_priv->fb_location) >> 10));
1980
1981 dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch / 64) << 22) |
1982 ((dev_priv->depth_offset
1983 + dev_priv->fb_location) >> 10));
1984
1985 dev_priv->gart_size = init->gart_size;
1986
1987 /* New let's set the memory map ... */
1988 if (dev_priv->new_memmap) {
1989 u32 base = 0;
1990
1991 DRM_INFO("Setting GART location based on new memory map\n");
1992
1993 /* If using AGP, try to locate the AGP aperture at the same
1994 * location in the card and on the bus, though we have to
1995 * align it down.
1996 */
1997#if __OS_HAS_AGP
1998 /* XXX */
1999 if (dev_priv->flags & RADEON_IS_AGP) {
2000 base = dev->agp->base;
2001 /* Check if valid */
2002 if ((base + dev_priv->gart_size - 1) >= dev_priv->fb_location &&
2003 base < (dev_priv->fb_location + dev_priv->fb_size - 1)) {
2004 DRM_INFO("Can't use AGP base @0x%08lx, won't fit\n",
2005 dev->agp->base);
2006 base = 0;
2007 }
2008 }
2009#endif
2010 /* If not or if AGP is at 0 (Macs), try to put it elsewhere */
2011 if (base == 0) {
2012 base = dev_priv->fb_location + dev_priv->fb_size;
2013 if (base < dev_priv->fb_location ||
2014 ((base + dev_priv->gart_size) & 0xfffffffful) < base)
2015 base = dev_priv->fb_location
2016 - dev_priv->gart_size;
2017 }
2018 dev_priv->gart_vm_start = base & 0xffc00000u;
2019 if (dev_priv->gart_vm_start != base)
2020 DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n",
2021 base, dev_priv->gart_vm_start);
2022 }
2023
2024#if __OS_HAS_AGP
2025 /* XXX */
2026 if (dev_priv->flags & RADEON_IS_AGP)
2027 dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
2028 - dev->agp->base
2029 + dev_priv->gart_vm_start);
2030 else
2031#endif
2032 dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
2033 - (unsigned long)dev->sg->virtual
2034 + dev_priv->gart_vm_start);
2035
2036 DRM_DEBUG("fb 0x%08x size %d\n",
2037 (unsigned int) dev_priv->fb_location,
2038 (unsigned int) dev_priv->fb_size);
2039 DRM_DEBUG("dev_priv->gart_size %d\n", dev_priv->gart_size);
2040 DRM_DEBUG("dev_priv->gart_vm_start 0x%08x\n",
2041 (unsigned int) dev_priv->gart_vm_start);
2042 DRM_DEBUG("dev_priv->gart_buffers_offset 0x%08lx\n",
2043 dev_priv->gart_buffers_offset);
2044
2045 dev_priv->ring.start = (u32 *) dev_priv->cp_ring->handle;
2046 dev_priv->ring.end = ((u32 *) dev_priv->cp_ring->handle
2047 + init->ring_size / sizeof(u32));
2048 dev_priv->ring.size = init->ring_size;
2049 dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
2050
2051 dev_priv->ring.rptr_update = /* init->rptr_update */ 4096;
2052 dev_priv->ring.rptr_update_l2qw = drm_order(/* init->rptr_update */ 4096 / 8);
2053
2054 dev_priv->ring.fetch_size = /* init->fetch_size */ 32;
2055 dev_priv->ring.fetch_size_l2ow = drm_order(/* init->fetch_size */ 32 / 16);
2056
2057 dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
2058
2059 dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
2060
2061#if __OS_HAS_AGP
2062 if (dev_priv->flags & RADEON_IS_AGP) {
2063 /* XXX turn off pcie gart */
2064 } else
2065#endif
2066 {
2067 dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
2068 /* if we have an offset set from userspace */
2069 if (!dev_priv->pcigart_offset_set) {
2070 DRM_ERROR("Need gart offset from userspace\n");
2071 r600_do_cleanup_cp(dev);
2072 return -EINVAL;
2073 }
2074
2075 DRM_DEBUG("Using gart offset 0x%08lx\n", dev_priv->pcigart_offset);
2076
2077 dev_priv->gart_info.bus_addr =
2078 dev_priv->pcigart_offset + dev_priv->fb_location;
2079 dev_priv->gart_info.mapping.offset =
2080 dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
2081 dev_priv->gart_info.mapping.size =
2082 dev_priv->gart_info.table_size;
2083
2084 drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
2085 if (!dev_priv->gart_info.mapping.handle) {
2086 DRM_ERROR("ioremap failed.\n");
2087 r600_do_cleanup_cp(dev);
2088 return -EINVAL;
2089 }
2090
2091 dev_priv->gart_info.addr =
2092 dev_priv->gart_info.mapping.handle;
2093
2094 DRM_DEBUG("Setting phys_pci_gart to %p %08lX\n",
2095 dev_priv->gart_info.addr,
2096 dev_priv->pcigart_offset);
2097
2098 if (!r600_page_table_init(dev)) {
2099 DRM_ERROR("Failed to init GART table\n");
2100 r600_do_cleanup_cp(dev);
2101 return -EINVAL;
2102 }
2103
2104 if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
2105 r700_vm_init(dev);
2106 else
2107 r600_vm_init(dev);
2108 }
2109
2110 if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
2111 r700_cp_load_microcode(dev_priv);
2112 else
2113 r600_cp_load_microcode(dev_priv);
2114
2115 r600_cp_init_ring_buffer(dev, dev_priv, file_priv);
2116
2117 dev_priv->last_buf = 0;
2118
2119 r600_do_engine_reset(dev);
2120 r600_test_writeback(dev_priv);
2121
2122 return 0;
2123}
2124
2125int r600_do_resume_cp(struct drm_device *dev, struct drm_file *file_priv)
2126{
2127 drm_radeon_private_t *dev_priv = dev->dev_private;
2128
2129 DRM_DEBUG("\n");
2130 if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)) {
2131 r700_vm_init(dev);
2132 r700_cp_load_microcode(dev_priv);
2133 } else {
2134 r600_vm_init(dev);
2135 r600_cp_load_microcode(dev_priv);
2136 }
2137 r600_cp_init_ring_buffer(dev, dev_priv, file_priv);
2138 r600_do_engine_reset(dev);
2139
2140 return 0;
2141}
2142
2143/* Wait for the CP to go idle.
2144 */
2145int r600_do_cp_idle(drm_radeon_private_t *dev_priv)
2146{
2147 RING_LOCALS;
2148 DRM_DEBUG("\n");
2149
2150 BEGIN_RING(5);
2151 OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
2152 OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
2153 /* wait for 3D idle clean */
2154 OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));
2155 OUT_RING((R600_WAIT_UNTIL - R600_SET_CONFIG_REG_OFFSET) >> 2);
2156 OUT_RING(RADEON_WAIT_3D_IDLE | RADEON_WAIT_3D_IDLECLEAN);
2157
2158 ADVANCE_RING();
2159 COMMIT_RING();
2160
2161 return r600_do_wait_for_idle(dev_priv);
2162}
2163
2164/* Start the Command Processor.
2165 */
2166void r600_do_cp_start(drm_radeon_private_t *dev_priv)
2167{
2168 u32 cp_me;
2169 RING_LOCALS;
2170 DRM_DEBUG("\n");
2171
2172 BEGIN_RING(7);
2173 OUT_RING(CP_PACKET3(R600_IT_ME_INITIALIZE, 5));
2174 OUT_RING(0x00000001);
2175 if (((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770))
2176 OUT_RING(0x00000003);
2177 else
2178 OUT_RING(0x00000000);
2179 OUT_RING((dev_priv->r600_max_hw_contexts - 1));
2180 OUT_RING(R600_ME_INITIALIZE_DEVICE_ID(1));
2181 OUT_RING(0x00000000);
2182 OUT_RING(0x00000000);
2183 ADVANCE_RING();
2184 COMMIT_RING();
2185
2186 /* set the mux and reset the halt bit */
2187 cp_me = 0xff;
2188 RADEON_WRITE(R600_CP_ME_CNTL, cp_me);
2189
2190 dev_priv->cp_running = 1;
2191
2192}
2193
2194void r600_do_cp_reset(drm_radeon_private_t *dev_priv)
2195{
2196 u32 cur_read_ptr;
2197 DRM_DEBUG("\n");
2198
2199 cur_read_ptr = RADEON_READ(R600_CP_RB_RPTR);
2200 RADEON_WRITE(R600_CP_RB_WPTR, cur_read_ptr);
2201 SET_RING_HEAD(dev_priv, cur_read_ptr);
2202 dev_priv->ring.tail = cur_read_ptr;
2203}
2204
2205void r600_do_cp_stop(drm_radeon_private_t *dev_priv)
2206{
2207 uint32_t cp_me;
2208
2209 DRM_DEBUG("\n");
2210
2211 cp_me = 0xff | R600_CP_ME_HALT;
2212
2213 RADEON_WRITE(R600_CP_ME_CNTL, cp_me);
2214
2215 dev_priv->cp_running = 0;
2216}
2217
2218int r600_cp_dispatch_indirect(struct drm_device *dev,
2219 struct drm_buf *buf, int start, int end)
2220{
2221 drm_radeon_private_t *dev_priv = dev->dev_private;
2222 RING_LOCALS;
2223
2224 if (start != end) {
2225 unsigned long offset = (dev_priv->gart_buffers_offset
2226 + buf->offset + start);
2227 int dwords = (end - start + 3) / sizeof(u32);
2228
2229 DRM_DEBUG("dwords:%d\n", dwords);
2230 DRM_DEBUG("offset 0x%lx\n", offset);
2231
2232
2233 /* Indirect buffer data must be a multiple of 16 dwords.
2234 * pad the data with a Type-2 CP packet.
2235 */
2236 while (dwords & 0xf) {
2237 u32 *data = (u32 *)
2238 ((char *)dev->agp_buffer_map->handle
2239 + buf->offset + start);
2240 data[dwords++] = RADEON_CP_PACKET2;
2241 }
2242
2243 /* Fire off the indirect buffer */
2244 BEGIN_RING(4);
2245 OUT_RING(CP_PACKET3(R600_IT_INDIRECT_BUFFER, 2));
2246 OUT_RING((offset & 0xfffffffc));
2247 OUT_RING((upper_32_bits(offset) & 0xff));
2248 OUT_RING(dwords);
2249 ADVANCE_RING();
2250 }
2251
2252 return 0;
2253}
diff --git a/drivers/gpu/drm/radeon/r600_microcode.h b/drivers/gpu/drm/radeon/r600_microcode.h
new file mode 100644
index 00000000000..778c8b4b2fd
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_microcode.h
@@ -0,0 +1,23297 @@
1/*
2 * Copyright 2008-2009 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26#ifndef R600_MICROCODE_H
27#define R600_MICROCODE_H
28
29static const int ME_JUMP_TABLE_START = 1764;
30static const int ME_JUMP_TABLE_END = 1792;
31
32#define PFP_UCODE_SIZE 576
33#define PM4_UCODE_SIZE 1792
34#define R700_PFP_UCODE_SIZE 848
35#define R700_PM4_UCODE_SIZE 1360
36
37static const u32 R600_cp_microcode[][3] = {
38 { 0x00000000, 0xc0200400, 0x000 },
39 { 0x00000000, 0x00a0000a, 0x000 },
40 { 0x0000ffff, 0x00284621, 0x000 },
41 { 0x00000000, 0xd9004800, 0x000 },
42 { 0x00000000, 0xc0200400, 0x000 },
43 { 0x00000000, 0x00a0000a, 0x000 },
44 { 0x00000000, 0x00e00000, 0x000 },
45 { 0x00010000, 0xc0294620, 0x000 },
46 { 0x00000000, 0xd9004800, 0x000 },
47 { 0x00000000, 0xc0200400, 0x000 },
48 { 0x00000000, 0x00a0000a, 0x000 },
49 { 0x81000000, 0x00204411, 0x000 },
50 { 0x00000001, 0x00204811, 0x000 },
51 { 0x00042004, 0x00604411, 0x614 },
52 { 0x00000000, 0x00600000, 0x5b2 },
53 { 0x00000000, 0x00600000, 0x5c5 },
54 { 0x00000000, 0xc0200800, 0x000 },
55 { 0x00000f00, 0x00281622, 0x000 },
56 { 0x00000008, 0x00211625, 0x000 },
57 { 0x00000020, 0x00203625, 0x000 },
58 { 0x8d000000, 0x00204411, 0x000 },
59 { 0x00000004, 0x002f0225, 0x000 },
60 { 0x00000000, 0x0ce00000, 0x018 },
61 { 0x00412000, 0x00404811, 0x019 },
62 { 0x00422000, 0x00204811, 0x000 },
63 { 0x8e000000, 0x00204411, 0x000 },
64 { 0x00000031, 0x00204a2d, 0x000 },
65 { 0x90000000, 0x00204411, 0x000 },
66 { 0x00000000, 0x00204805, 0x000 },
67 { 0x0000000c, 0x00211622, 0x000 },
68 { 0x00000003, 0x00281625, 0x000 },
69 { 0x00000019, 0x00211a22, 0x000 },
70 { 0x00000004, 0x00281a26, 0x000 },
71 { 0x00000000, 0x002914c5, 0x000 },
72 { 0x00000021, 0x00203625, 0x000 },
73 { 0x00000000, 0x003a1402, 0x000 },
74 { 0x00000016, 0x00211625, 0x000 },
75 { 0x00000003, 0x00281625, 0x000 },
76 { 0x0000001d, 0x00200e2d, 0x000 },
77 { 0xfffffffc, 0x00280e23, 0x000 },
78 { 0x00000000, 0x002914a3, 0x000 },
79 { 0x0000001d, 0x00203625, 0x000 },
80 { 0x00008000, 0x00280e22, 0x000 },
81 { 0x00000007, 0x00220e23, 0x000 },
82 { 0x00000000, 0x0029386e, 0x000 },
83 { 0x20000000, 0x00280e22, 0x000 },
84 { 0x00000006, 0x00210e23, 0x000 },
85 { 0x00000000, 0x0029386e, 0x000 },
86 { 0x00000000, 0x00220222, 0x000 },
87 { 0x00000000, 0x14e00000, 0x038 },
88 { 0x00000000, 0x2ee00000, 0x035 },
89 { 0x00000000, 0x2ce00000, 0x037 },
90 { 0x00000000, 0x00400e2d, 0x039 },
91 { 0x00000008, 0x00200e2d, 0x000 },
92 { 0x00000009, 0x0040122d, 0x046 },
93 { 0x00000001, 0x00400e2d, 0x039 },
94 { 0x00000000, 0xc0200c00, 0x000 },
95 { 0x003ffffc, 0x00281223, 0x000 },
96 { 0x00000002, 0x00221224, 0x000 },
97 { 0x0000001f, 0x00211e23, 0x000 },
98 { 0x00000000, 0x14e00000, 0x03e },
99 { 0x00000008, 0x00401c11, 0x041 },
100 { 0x0000000d, 0x00201e2d, 0x000 },
101 { 0x0000000f, 0x00281e27, 0x000 },
102 { 0x00000003, 0x00221e27, 0x000 },
103 { 0x7fc00000, 0x00281a23, 0x000 },
104 { 0x00000014, 0x00211a26, 0x000 },
105 { 0x00000001, 0x00331a26, 0x000 },
106 { 0x00000008, 0x00221a26, 0x000 },
107 { 0x00000000, 0x00290cc7, 0x000 },
108 { 0x00000030, 0x00203624, 0x000 },
109 { 0x00007f00, 0x00281221, 0x000 },
110 { 0x00001400, 0x002f0224, 0x000 },
111 { 0x00000000, 0x0ce00000, 0x04b },
112 { 0x00000001, 0x00290e23, 0x000 },
113 { 0x00000010, 0x00203623, 0x000 },
114 { 0x0000e000, 0x00204411, 0x000 },
115 { 0xfff80000, 0x00294a23, 0x000 },
116 { 0x00000000, 0x003a2c02, 0x000 },
117 { 0x00000002, 0x00220e2b, 0x000 },
118 { 0xfc000000, 0x00280e23, 0x000 },
119 { 0x00000011, 0x00203623, 0x000 },
120 { 0x00001fff, 0x00294a23, 0x000 },
121 { 0x00000030, 0x00204a2d, 0x000 },
122 { 0x00000000, 0x00204811, 0x000 },
123 { 0x00000032, 0x00200e2d, 0x000 },
124 { 0x060a0200, 0x00294a23, 0x000 },
125 { 0x00000000, 0x00204811, 0x000 },
126 { 0x00000000, 0x00204811, 0x000 },
127 { 0x00000001, 0x00210222, 0x000 },
128 { 0x00000000, 0x14e00000, 0x061 },
129 { 0x00000000, 0x2ee00000, 0x05f },
130 { 0x00000000, 0x2ce00000, 0x05e },
131 { 0x00000000, 0x00400e2d, 0x062 },
132 { 0x00000001, 0x00400e2d, 0x062 },
133 { 0x0000000a, 0x00200e2d, 0x000 },
134 { 0x0000000b, 0x0040122d, 0x06a },
135 { 0x00000000, 0xc0200c00, 0x000 },
136 { 0x003ffffc, 0x00281223, 0x000 },
137 { 0x00000002, 0x00221224, 0x000 },
138 { 0x7fc00000, 0x00281623, 0x000 },
139 { 0x00000014, 0x00211625, 0x000 },
140 { 0x00000001, 0x00331625, 0x000 },
141 { 0x80000000, 0x00280e23, 0x000 },
142 { 0x00000000, 0x00290ca3, 0x000 },
143 { 0x3ffffc00, 0x00290e23, 0x000 },
144 { 0x0000001f, 0x00211e23, 0x000 },
145 { 0x00000000, 0x14e00000, 0x06d },
146 { 0x00000100, 0x00401c11, 0x070 },
147 { 0x0000000d, 0x00201e2d, 0x000 },
148 { 0x000000f0, 0x00281e27, 0x000 },
149 { 0x00000004, 0x00221e27, 0x000 },
150 { 0x81000000, 0x00204411, 0x000 },
151 { 0x0000000d, 0x00204811, 0x000 },
152 { 0xfffff0ff, 0x00281a30, 0x000 },
153 { 0x0000a028, 0x00204411, 0x000 },
154 { 0x00000000, 0x002948e6, 0x000 },
155 { 0x0000a018, 0x00204411, 0x000 },
156 { 0x3fffffff, 0x00284a23, 0x000 },
157 { 0x0000a010, 0x00204411, 0x000 },
158 { 0x00000000, 0x00204804, 0x000 },
159 { 0x0000002d, 0x0020162d, 0x000 },
160 { 0x00000000, 0x002f00a3, 0x000 },
161 { 0x00000000, 0x0cc00000, 0x080 },
162 { 0x0000002e, 0x0020162d, 0x000 },
163 { 0x00000000, 0x002f00a4, 0x000 },
164 { 0x00000000, 0x0cc00000, 0x081 },
165 { 0x00000000, 0x00400000, 0x087 },
166 { 0x0000002d, 0x00203623, 0x000 },
167 { 0x0000002e, 0x00203624, 0x000 },
168 { 0x0000001d, 0x00201e2d, 0x000 },
169 { 0x00000002, 0x00210227, 0x000 },
170 { 0x00000000, 0x14e00000, 0x087 },
171 { 0x00000000, 0x00600000, 0x5ed },
172 { 0x00000000, 0x00600000, 0x5e1 },
173 { 0x00000002, 0x00210e22, 0x000 },
174 { 0x00000000, 0x14c00000, 0x08a },
175 { 0x00000018, 0xc0403620, 0x090 },
176 { 0x00000000, 0x2ee00000, 0x08e },
177 { 0x00000000, 0x2ce00000, 0x08d },
178 { 0x00000002, 0x00400e2d, 0x08f },
179 { 0x00000003, 0x00400e2d, 0x08f },
180 { 0x0000000c, 0x00200e2d, 0x000 },
181 { 0x00000018, 0x00203623, 0x000 },
182 { 0x00000003, 0x00210e22, 0x000 },
183 { 0x00000000, 0x14c00000, 0x095 },
184 { 0x0000a00c, 0x00204411, 0x000 },
185 { 0x00000000, 0xc0204800, 0x000 },
186 { 0x00000000, 0xc0404800, 0x09d },
187 { 0x0000a00c, 0x00204411, 0x000 },
188 { 0x00000000, 0x00204811, 0x000 },
189 { 0x00000000, 0x2ee00000, 0x09b },
190 { 0x00000000, 0x2ce00000, 0x09a },
191 { 0x00000002, 0x00400e2d, 0x09c },
192 { 0x00000003, 0x00400e2d, 0x09c },
193 { 0x0000000c, 0x00200e2d, 0x000 },
194 { 0x00000000, 0x00204803, 0x000 },
195 { 0x00000000, 0x003a0c02, 0x000 },
196 { 0x003f0000, 0x00280e23, 0x000 },
197 { 0x00000010, 0x00210e23, 0x000 },
198 { 0x00000013, 0x00203623, 0x000 },
199 { 0x0000001e, 0x0021022b, 0x000 },
200 { 0x00000000, 0x14c00000, 0x0a4 },
201 { 0x0000001c, 0xc0203620, 0x000 },
202 { 0x0000001f, 0x0021022b, 0x000 },
203 { 0x00000000, 0x14c00000, 0x0a7 },
204 { 0x0000001b, 0xc0203620, 0x000 },
205 { 0x00000008, 0x00210e2b, 0x000 },
206 { 0x0000007f, 0x00280e23, 0x000 },
207 { 0x00000000, 0x002f0223, 0x000 },
208 { 0x00000000, 0x0ce00000, 0x0db },
209 { 0x00000000, 0x27000000, 0x000 },
210 { 0x00000000, 0x00600000, 0x28c },
211 { 0x81000000, 0x00204411, 0x000 },
212 { 0x00000006, 0x00204811, 0x000 },
213 { 0x0000000c, 0x00221e30, 0x000 },
214 { 0x99800000, 0x00204411, 0x000 },
215 { 0x00000004, 0x0020122d, 0x000 },
216 { 0x00000008, 0x00221224, 0x000 },
217 { 0x00000010, 0x00201811, 0x000 },
218 { 0x00000000, 0x00291ce4, 0x000 },
219 { 0x00000000, 0x00604807, 0x128 },
220 { 0x9b000000, 0x00204411, 0x000 },
221 { 0x00000000, 0x00204802, 0x000 },
222 { 0x9c000000, 0x00204411, 0x000 },
223 { 0x00000000, 0x0033146f, 0x000 },
224 { 0x00000001, 0x00333e23, 0x000 },
225 { 0x00000000, 0xd9004800, 0x000 },
226 { 0x00000000, 0x00203c05, 0x000 },
227 { 0x81000000, 0x00204411, 0x000 },
228 { 0x0000000e, 0x00204811, 0x000 },
229 { 0x00000000, 0x00201010, 0x000 },
230 { 0x0000e007, 0x00204411, 0x000 },
231 { 0x0000000f, 0x0021022b, 0x000 },
232 { 0x00000000, 0x14c00000, 0x0c5 },
233 { 0x00f8ff08, 0x00204811, 0x000 },
234 { 0x98000000, 0x00404811, 0x0d6 },
235 { 0x000000f0, 0x00280e22, 0x000 },
236 { 0x000000a0, 0x002f0223, 0x000 },
237 { 0x00000000, 0x0cc00000, 0x0d4 },
238 { 0x00000013, 0x00200e2d, 0x000 },
239 { 0x00000001, 0x002f0223, 0x000 },
240 { 0x00000000, 0x0ce00000, 0x0cf },
241 { 0x00000002, 0x002f0223, 0x000 },
242 { 0x00000000, 0x0ce00000, 0x0ce },
243 { 0x00003f00, 0x00400c11, 0x0d0 },
244 { 0x00001f00, 0x00400c11, 0x0d0 },
245 { 0x00000f00, 0x00200c11, 0x000 },
246 { 0x00380009, 0x00294a23, 0x000 },
247 { 0x3f000000, 0x00280e2b, 0x000 },
248 { 0x00000002, 0x00220e23, 0x000 },
249 { 0x00000007, 0x00494a23, 0x0d6 },
250 { 0x00380f09, 0x00204811, 0x000 },
251 { 0x68000007, 0x00204811, 0x000 },
252 { 0x00000008, 0x00214a27, 0x000 },
253 { 0x00000000, 0x00204811, 0x000 },
254 { 0x060a0200, 0x00294a24, 0x000 },
255 { 0x00000000, 0x00204811, 0x000 },
256 { 0x00000000, 0x00204811, 0x000 },
257 { 0x0000a202, 0x00204411, 0x000 },
258 { 0x00ff0000, 0x00284a22, 0x000 },
259 { 0x00000030, 0x00200e2d, 0x000 },
260 { 0x0000002e, 0x0020122d, 0x000 },
261 { 0x00000000, 0x002f0083, 0x000 },
262 { 0x00000000, 0x0ce00000, 0x0e3 },
263 { 0x00000000, 0x00600000, 0x5e7 },
264 { 0x00000000, 0x00400000, 0x0e4 },
265 { 0x00000000, 0x00600000, 0x5ea },
266 { 0x00000007, 0x0020222d, 0x000 },
267 { 0x00000005, 0x00220e22, 0x000 },
268 { 0x00100000, 0x00280e23, 0x000 },
269 { 0x00000000, 0x00292068, 0x000 },
270 { 0x00000000, 0x003a0c02, 0x000 },
271 { 0x000000ef, 0x00280e23, 0x000 },
272 { 0x00000000, 0x00292068, 0x000 },
273 { 0x0000001d, 0x00200e2d, 0x000 },
274 { 0x00000003, 0x00210223, 0x000 },
275 { 0x00000000, 0x14e00000, 0x0f1 },
276 { 0x0000000b, 0x00210228, 0x000 },
277 { 0x00000000, 0x14c00000, 0x0f1 },
278 { 0x00000400, 0x00292228, 0x000 },
279 { 0x0000001a, 0x00203628, 0x000 },
280 { 0x0000001c, 0x00210e22, 0x000 },
281 { 0x00000000, 0x14c00000, 0x0f6 },
282 { 0x0000a30c, 0x00204411, 0x000 },
283 { 0x00000000, 0x00204811, 0x000 },
284 { 0x0000001e, 0x00210e22, 0x000 },
285 { 0x00000000, 0x14c00000, 0x104 },
286 { 0x0000a30f, 0x00204411, 0x000 },
287 { 0x00000013, 0x00200e2d, 0x000 },
288 { 0x00000001, 0x002f0223, 0x000 },
289 { 0x00000000, 0x0cc00000, 0x0fd },
290 { 0xffffffff, 0x00404811, 0x104 },
291 { 0x00000002, 0x002f0223, 0x000 },
292 { 0x00000000, 0x0cc00000, 0x100 },
293 { 0x0000ffff, 0x00404811, 0x104 },
294 { 0x00000004, 0x002f0223, 0x000 },
295 { 0x00000000, 0x0cc00000, 0x103 },
296 { 0x000000ff, 0x00404811, 0x104 },
297 { 0x00000001, 0x00204811, 0x000 },
298 { 0x0002c400, 0x00204411, 0x000 },
299 { 0x0000001f, 0x00210e22, 0x000 },
300 { 0x00000000, 0x14c00000, 0x10b },
301 { 0x00000010, 0x40210e20, 0x000 },
302 { 0x00000019, 0x00203623, 0x000 },
303 { 0x00000018, 0x40224a20, 0x000 },
304 { 0x00000010, 0xc0424a20, 0x10d },
305 { 0x00000000, 0x00200c11, 0x000 },
306 { 0x00000019, 0x00203623, 0x000 },
307 { 0x00000000, 0x00204811, 0x000 },
308 { 0x00000000, 0x00204811, 0x000 },
309 { 0x0000000a, 0x00201011, 0x000 },
310 { 0x00000000, 0x002f0224, 0x000 },
311 { 0x00000000, 0x0ce00000, 0x114 },
312 { 0x00000000, 0x00204811, 0x000 },
313 { 0x00000001, 0x00531224, 0x110 },
314 { 0xffbfffff, 0x00283a2e, 0x000 },
315 { 0x0000001b, 0x00210222, 0x000 },
316 { 0x00000000, 0x14c00000, 0x127 },
317 { 0x81000000, 0x00204411, 0x000 },
318 { 0x0000000d, 0x00204811, 0x000 },
319 { 0x00000018, 0x00220e30, 0x000 },
320 { 0xfc000000, 0x00280e23, 0x000 },
321 { 0x81000000, 0x00204411, 0x000 },
322 { 0x0000000e, 0x00204811, 0x000 },
323 { 0x00000000, 0x00201010, 0x000 },
324 { 0x0000e00e, 0x00204411, 0x000 },
325 { 0x07f8ff08, 0x00204811, 0x000 },
326 { 0x00000000, 0x00294a23, 0x000 },
327 { 0x00000024, 0x00201e2d, 0x000 },
328 { 0x00000008, 0x00214a27, 0x000 },
329 { 0x00000000, 0x00204811, 0x000 },
330 { 0x060a0200, 0x00294a24, 0x000 },
331 { 0x00000000, 0x00204811, 0x000 },
332 { 0x00000000, 0x00204811, 0x000 },
333 { 0x00000000, 0x00800000, 0x000 },
334 { 0x81000000, 0x00204411, 0x000 },
335 { 0x00000001, 0x00204811, 0x000 },
336 { 0x0000217c, 0x00204411, 0x000 },
337 { 0x00800000, 0x00204811, 0x000 },
338 { 0x00000000, 0x00204806, 0x000 },
339 { 0x00000008, 0x00214a27, 0x000 },
340 { 0x00000000, 0x17000000, 0x000 },
341 { 0x0004217f, 0x00604411, 0x614 },
342 { 0x0000001f, 0x00210230, 0x000 },
343 { 0x00000000, 0x14c00000, 0x613 },
344 { 0x00000004, 0x00404c11, 0x12e },
345 { 0x00000000, 0x00600000, 0x00b },
346 { 0x00000000, 0x00600411, 0x2fe },
347 { 0x00000000, 0x00200411, 0x000 },
348 { 0x00000000, 0x00600811, 0x19f },
349 { 0x00000000, 0x00600000, 0x151 },
350 { 0x0000ffff, 0x40280e20, 0x000 },
351 { 0x00000010, 0xc0211220, 0x000 },
352 { 0x0000ffff, 0x40280620, 0x000 },
353 { 0x00000010, 0xc0210a20, 0x000 },
354 { 0x00000000, 0x00341461, 0x000 },
355 { 0x00000000, 0x00741882, 0x2a4 },
356 { 0x0001a1fd, 0x00604411, 0x2c9 },
357 { 0x00003fff, 0x002f022f, 0x000 },
358 { 0x00000000, 0x0cc00000, 0x138 },
359 { 0x00000000, 0xc0400400, 0x001 },
360 { 0x00000000, 0x00600000, 0x00b },
361 { 0x00000000, 0x00600411, 0x2fe },
362 { 0x00000000, 0x00200411, 0x000 },
363 { 0x00000000, 0x00600811, 0x19f },
364 { 0x00003fff, 0x002f022f, 0x000 },
365 { 0x00000000, 0x0ce00000, 0x000 },
366 { 0x00000000, 0x00600000, 0x151 },
367 { 0x00000010, 0x40210e20, 0x000 },
368 { 0x0000ffff, 0xc0281220, 0x000 },
369 { 0x00000010, 0x40211620, 0x000 },
370 { 0x0000ffff, 0xc0681a20, 0x2a4 },
371 { 0x0001a1fd, 0x00604411, 0x2c9 },
372 { 0x00003fff, 0x002f022f, 0x000 },
373 { 0x00000000, 0x0cc00000, 0x149 },
374 { 0x00000000, 0xc0400400, 0x001 },
375 { 0x0000225c, 0x00204411, 0x000 },
376 { 0x00000001, 0x00300a2f, 0x000 },
377 { 0x00000001, 0x00210a22, 0x000 },
378 { 0x00000003, 0x00384a22, 0x000 },
379 { 0x00002256, 0x00204411, 0x000 },
380 { 0x0000001a, 0x00204811, 0x000 },
381 { 0x0000a1fc, 0x00204411, 0x000 },
382 { 0x00000001, 0x00804811, 0x000 },
383 { 0x00000000, 0x00600000, 0x00b },
384 { 0x00000000, 0x00600000, 0x17c },
385 { 0x00000000, 0x00600000, 0x18d },
386 { 0x00003fff, 0x002f022f, 0x000 },
387 { 0x00000000, 0x0ce00000, 0x000 },
388 { 0x00000000, 0x00202c08, 0x000 },
389 { 0x00000000, 0x00202411, 0x000 },
390 { 0x00000000, 0x00202811, 0x000 },
391 { 0x00002256, 0x00204411, 0x000 },
392 { 0x00000016, 0x00204811, 0x000 },
393 { 0x0000225c, 0x00204411, 0x000 },
394 { 0x00000003, 0x00204811, 0x000 },
395 { 0x93800000, 0x00204411, 0x000 },
396 { 0x00000002, 0x00221e29, 0x000 },
397 { 0x00000000, 0x007048eb, 0x189 },
398 { 0x00000000, 0x00600000, 0x2a4 },
399 { 0x00000001, 0x40330620, 0x000 },
400 { 0x00000000, 0xc0302409, 0x000 },
401 { 0x00003fff, 0x002f022f, 0x000 },
402 { 0x00000000, 0x0ce00000, 0x000 },
403 { 0x00000000, 0x00600000, 0x28c },
404 { 0x95000000, 0x00204411, 0x000 },
405 { 0x00000000, 0x002f0221, 0x000 },
406 { 0x00000000, 0x0ce00000, 0x173 },
407 { 0x00000000, 0xc0204800, 0x000 },
408 { 0x00000001, 0x00530621, 0x16f },
409 { 0x92000000, 0x00204411, 0x000 },
410 { 0x00000000, 0xc0604800, 0x184 },
411 { 0x0001a1fd, 0x00204411, 0x000 },
412 { 0x00000013, 0x0020062d, 0x000 },
413 { 0x00000000, 0x0078042a, 0x2e4 },
414 { 0x00000000, 0x00202809, 0x000 },
415 { 0x00003fff, 0x002f022f, 0x000 },
416 { 0x00000000, 0x0cc00000, 0x165 },
417 { 0x00000000, 0xc0400400, 0x001 },
418 { 0x00000210, 0x00600411, 0x2fe },
419 { 0x00003fff, 0x002f022f, 0x000 },
420 { 0x00000000, 0x0ce00000, 0x181 },
421 { 0x0000001b, 0xc0203620, 0x000 },
422 { 0x0000001c, 0xc0203620, 0x000 },
423 { 0x3f800000, 0x00200411, 0x000 },
424 { 0x46000000, 0x00600811, 0x19f },
425 { 0x00000000, 0x00800000, 0x000 },
426 { 0x0000a1fc, 0x00204411, 0x000 },
427 { 0x00003fff, 0x002f022f, 0x000 },
428 { 0x00000000, 0x0cc00000, 0x188 },
429 { 0x00000001, 0x00804811, 0x000 },
430 { 0x00000021, 0x00804811, 0x000 },
431 { 0x0000ffff, 0x40280e20, 0x000 },
432 { 0x00000010, 0xc0211220, 0x000 },
433 { 0x0000ffff, 0x40281620, 0x000 },
434 { 0x00000010, 0xc0811a20, 0x000 },
435 { 0x81000000, 0x00204411, 0x000 },
436 { 0x00000006, 0x00204811, 0x000 },
437 { 0x00000008, 0x00221e30, 0x000 },
438 { 0x00000032, 0x00201a2d, 0x000 },
439 { 0x0000e000, 0x00204411, 0x000 },
440 { 0xfffbff09, 0x00204811, 0x000 },
441 { 0x00000011, 0x0020222d, 0x000 },
442 { 0x00001fff, 0x00294a28, 0x000 },
443 { 0x00000006, 0x0020222d, 0x000 },
444 { 0x00000000, 0x002920e8, 0x000 },
445 { 0x00000000, 0x00204808, 0x000 },
446 { 0x00000000, 0x00204811, 0x000 },
447 { 0x060a0200, 0x00294a26, 0x000 },
448 { 0x00000000, 0x00204811, 0x000 },
449 { 0x00000000, 0x00204811, 0x000 },
450 { 0x00000100, 0x00201811, 0x000 },
451 { 0x00000008, 0x00621e28, 0x128 },
452 { 0x00000008, 0x00822228, 0x000 },
453 { 0x0002c000, 0x00204411, 0x000 },
454 { 0x0000001b, 0x00600e2d, 0x1aa },
455 { 0x0000001c, 0x00600e2d, 0x1aa },
456 { 0x0000c008, 0x00204411, 0x000 },
457 { 0x0000001d, 0x00200e2d, 0x000 },
458 { 0x00000000, 0x14c00000, 0x1a6 },
459 { 0x00000000, 0x00200411, 0x000 },
460 { 0x00000000, 0x00204801, 0x000 },
461 { 0x39000000, 0x00204811, 0x000 },
462 { 0x00000000, 0x00204811, 0x000 },
463 { 0x00000000, 0x00804802, 0x000 },
464 { 0x00000020, 0x00202e2d, 0x000 },
465 { 0x00000000, 0x003b0d63, 0x000 },
466 { 0x00000008, 0x00224a23, 0x000 },
467 { 0x00000010, 0x00224a23, 0x000 },
468 { 0x00000018, 0x00224a23, 0x000 },
469 { 0x00000000, 0x00804803, 0x000 },
470 { 0x00000000, 0x00600000, 0x00b },
471 { 0x00001000, 0x00600411, 0x2fe },
472 { 0x00000000, 0x00200411, 0x000 },
473 { 0x00000000, 0x00600811, 0x19f },
474 { 0x00000007, 0x0021062f, 0x000 },
475 { 0x00000019, 0x00200a2d, 0x000 },
476 { 0x00000001, 0x00202c11, 0x000 },
477 { 0x0000ffff, 0x40282220, 0x000 },
478 { 0x0000000f, 0x00262228, 0x000 },
479 { 0x00000010, 0x40212620, 0x000 },
480 { 0x0000000f, 0x00262629, 0x000 },
481 { 0x00000000, 0x00202802, 0x000 },
482 { 0x00002256, 0x00204411, 0x000 },
483 { 0x0000001b, 0x00204811, 0x000 },
484 { 0x00000000, 0x002f0221, 0x000 },
485 { 0x00000000, 0x0ce00000, 0x1cd },
486 { 0x0000225c, 0x00204411, 0x000 },
487 { 0x00000081, 0x00204811, 0x000 },
488 { 0x0000a1fc, 0x00204411, 0x000 },
489 { 0x00000001, 0x00204811, 0x000 },
490 { 0x00000080, 0x00201c11, 0x000 },
491 { 0x00000000, 0x002f0227, 0x000 },
492 { 0x00000000, 0x0ce00000, 0x1c9 },
493 { 0x00000000, 0x00600000, 0x1d6 },
494 { 0x00000001, 0x00531e27, 0x1c5 },
495 { 0x00000001, 0x00202c11, 0x000 },
496 { 0x0000001f, 0x00280a22, 0x000 },
497 { 0x0000001f, 0x00282a2a, 0x000 },
498 { 0x00000001, 0x00530621, 0x1be },
499 { 0x0000225c, 0x00204411, 0x000 },
500 { 0x00000002, 0x00304a2f, 0x000 },
501 { 0x0000a1fc, 0x00204411, 0x000 },
502 { 0x00000001, 0x00204811, 0x000 },
503 { 0x00000001, 0x00301e2f, 0x000 },
504 { 0x00000000, 0x002f0227, 0x000 },
505 { 0x00000000, 0x0ce00000, 0x000 },
506 { 0x00000000, 0x00600000, 0x1d6 },
507 { 0x00000001, 0x00531e27, 0x1d2 },
508 { 0x0000ffff, 0x40280e20, 0x000 },
509 { 0x0000000f, 0x00260e23, 0x000 },
510 { 0x00000010, 0xc0211220, 0x000 },
511 { 0x0000000f, 0x00261224, 0x000 },
512 { 0x00000000, 0x00201411, 0x000 },
513 { 0x00000000, 0x00601811, 0x2a4 },
514 { 0x0001a1fd, 0x00204411, 0x000 },
515 { 0x00000000, 0x002f022b, 0x000 },
516 { 0x00000000, 0x0ce00000, 0x1e5 },
517 { 0x00000010, 0x00221628, 0x000 },
518 { 0xffff0000, 0x00281625, 0x000 },
519 { 0x0000ffff, 0x00281a29, 0x000 },
520 { 0x00000000, 0x002948c5, 0x000 },
521 { 0x00000000, 0x0020480a, 0x000 },
522 { 0x00000000, 0x00202c11, 0x000 },
523 { 0x00000010, 0x00221623, 0x000 },
524 { 0xffff0000, 0x00281625, 0x000 },
525 { 0x0000ffff, 0x00281a24, 0x000 },
526 { 0x00000000, 0x002948c5, 0x000 },
527 { 0x00000000, 0x00731503, 0x1f2 },
528 { 0x00000000, 0x00201805, 0x000 },
529 { 0x00000000, 0x00731524, 0x1f2 },
530 { 0x00000000, 0x002d14c5, 0x000 },
531 { 0x00000000, 0x003008a2, 0x000 },
532 { 0x00000000, 0x00204802, 0x000 },
533 { 0x00000000, 0x00202802, 0x000 },
534 { 0x00000000, 0x00202003, 0x000 },
535 { 0x00000000, 0x00802404, 0x000 },
536 { 0x0000000f, 0x00210225, 0x000 },
537 { 0x00000000, 0x14c00000, 0x613 },
538 { 0x00000000, 0x002b1405, 0x000 },
539 { 0x00000001, 0x00901625, 0x000 },
540 { 0x00000000, 0x00600000, 0x00b },
541 { 0x00000000, 0x00600411, 0x2fe },
542 { 0x00000000, 0x00200411, 0x000 },
543 { 0x00000000, 0x00600811, 0x19f },
544 { 0x00002256, 0x00204411, 0x000 },
545 { 0x0000001a, 0x00294a22, 0x000 },
546 { 0x00000000, 0xc0200000, 0x000 },
547 { 0x00003fff, 0x002f022f, 0x000 },
548 { 0x00000000, 0x0ce00000, 0x000 },
549 { 0x00000000, 0xc0200400, 0x000 },
550 { 0x0000225c, 0x00204411, 0x000 },
551 { 0x00000003, 0x00384a21, 0x000 },
552 { 0x0000a1fc, 0x00204411, 0x000 },
553 { 0x00000001, 0x00204811, 0x000 },
554 { 0x0000ffff, 0x40281220, 0x000 },
555 { 0x00000010, 0xc0211a20, 0x000 },
556 { 0x0000ffff, 0x40280e20, 0x000 },
557 { 0x00000010, 0xc0211620, 0x000 },
558 { 0x00000000, 0x00741465, 0x2a4 },
559 { 0x0001a1fd, 0x00604411, 0x2c9 },
560 { 0x00000001, 0x00330621, 0x000 },
561 { 0x00000000, 0x002f0221, 0x000 },
562 { 0x00000000, 0x0cc00000, 0x206 },
563 { 0x00003fff, 0x002f022f, 0x000 },
564 { 0x00000000, 0x0cc00000, 0x1ff },
565 { 0x00000000, 0xc0400400, 0x001 },
566 { 0x00000000, 0x00600000, 0x5c5 },
567 { 0x00000000, 0x0040040f, 0x200 },
568 { 0x00000000, 0x00600000, 0x5b2 },
569 { 0x00000000, 0x00600000, 0x5c5 },
570 { 0x00000210, 0x00600411, 0x2fe },
571 { 0x00000000, 0x00600000, 0x18d },
572 { 0x00000000, 0x00600000, 0x189 },
573 { 0x00000000, 0x00600000, 0x2a4 },
574 { 0x00000000, 0x00600000, 0x28c },
575 { 0x93800000, 0x00204411, 0x000 },
576 { 0x00000000, 0x00204808, 0x000 },
577 { 0x95000000, 0x00204411, 0x000 },
578 { 0x00000000, 0x002f022f, 0x000 },
579 { 0x00000000, 0x0ce00000, 0x21f },
580 { 0x00000000, 0xc0404800, 0x21c },
581 { 0x92000000, 0x00204411, 0x000 },
582 { 0x00000000, 0xc0204800, 0x000 },
583 { 0x00002256, 0x00204411, 0x000 },
584 { 0x00000016, 0x00204811, 0x000 },
585 { 0x0000225c, 0x00204411, 0x000 },
586 { 0x00000003, 0x00204811, 0x000 },
587 { 0x0000a1fc, 0x00204411, 0x000 },
588 { 0x00000001, 0x00204811, 0x000 },
589 { 0x0001a1fd, 0x00204411, 0x000 },
590 { 0x00000000, 0x00600411, 0x2e4 },
591 { 0x00000000, 0xc0400400, 0x001 },
592 { 0x00000000, 0x00600000, 0x5b2 },
593 { 0x0000a00c, 0x00204411, 0x000 },
594 { 0x00000000, 0xc0204800, 0x000 },
595 { 0x00000000, 0xc0404800, 0x000 },
596 { 0x00000000, 0x00600000, 0x00b },
597 { 0x00000018, 0x40210a20, 0x000 },
598 { 0x00000003, 0x002f0222, 0x000 },
599 { 0x00000000, 0x0ae00000, 0x235 },
600 { 0x0000001a, 0x0020222d, 0x000 },
601 { 0x00080101, 0x00292228, 0x000 },
602 { 0x0000001a, 0x00203628, 0x000 },
603 { 0x0000a30c, 0x00204411, 0x000 },
604 { 0x00000000, 0xc0204800, 0x000 },
605 { 0x00000000, 0xc0204800, 0x000 },
606 { 0x00000000, 0xc0404800, 0x23a },
607 { 0x00000000, 0x00600000, 0x00b },
608 { 0x00000010, 0x00600411, 0x2fe },
609 { 0x3f800000, 0x00200411, 0x000 },
610 { 0x00000000, 0x00600811, 0x19f },
611 { 0x0000225c, 0x00204411, 0x000 },
612 { 0x00000003, 0x00204811, 0x000 },
613 { 0x00000000, 0x00600000, 0x265 },
614 { 0x0000001d, 0x00201e2d, 0x000 },
615 { 0x00000001, 0x00211e27, 0x000 },
616 { 0x00000000, 0x14e00000, 0x253 },
617 { 0x00000018, 0x00201e2d, 0x000 },
618 { 0x0000ffff, 0x00281e27, 0x000 },
619 { 0x00000000, 0x00341c27, 0x000 },
620 { 0x00000000, 0x12c00000, 0x248 },
621 { 0x00000000, 0x00201c11, 0x000 },
622 { 0x00000000, 0x002f00e5, 0x000 },
623 { 0x00000000, 0x08c00000, 0x24b },
624 { 0x00000000, 0x00201407, 0x000 },
625 { 0x00000018, 0x00201e2d, 0x000 },
626 { 0x00000010, 0x00211e27, 0x000 },
627 { 0x00000000, 0x00341c47, 0x000 },
628 { 0x00000000, 0x12c00000, 0x250 },
629 { 0x00000000, 0x00201c11, 0x000 },
630 { 0x00000000, 0x002f00e6, 0x000 },
631 { 0x00000000, 0x08c00000, 0x253 },
632 { 0x00000000, 0x00201807, 0x000 },
633 { 0x00000000, 0x00600000, 0x2aa },
634 { 0x00002256, 0x00204411, 0x000 },
635 { 0x00000000, 0x00342023, 0x000 },
636 { 0x00000000, 0x12c00000, 0x25b },
637 { 0x00000000, 0x00342044, 0x000 },
638 { 0x00000000, 0x12c00000, 0x25a },
639 { 0x00000016, 0x00404811, 0x25f },
640 { 0x00000018, 0x00404811, 0x25f },
641 { 0x00000000, 0x00342044, 0x000 },
642 { 0x00000000, 0x12c00000, 0x25e },
643 { 0x00000017, 0x00404811, 0x25f },
644 { 0x00000019, 0x00204811, 0x000 },
645 { 0x0000a1fc, 0x00204411, 0x000 },
646 { 0x00000001, 0x00204811, 0x000 },
647 { 0x0001a1fd, 0x00604411, 0x2d2 },
648 { 0x00003fff, 0x002f022f, 0x000 },
649 { 0x00000000, 0x0cc00000, 0x23f },
650 { 0x00000000, 0xc0400400, 0x001 },
651 { 0x00000010, 0x40210620, 0x000 },
652 { 0x0000ffff, 0xc0280a20, 0x000 },
653 { 0x00000010, 0x40210e20, 0x000 },
654 { 0x0000ffff, 0xc0281220, 0x000 },
655 { 0x00000010, 0x40211620, 0x000 },
656 { 0x0000ffff, 0xc0881a20, 0x000 },
657 { 0x81000000, 0x00204411, 0x000 },
658 { 0x00000001, 0x00204811, 0x000 },
659 { 0x00042004, 0x00604411, 0x614 },
660 { 0x00000000, 0x00600000, 0x5b2 },
661 { 0x00000000, 0xc0600000, 0x28c },
662 { 0x00000005, 0x00200a2d, 0x000 },
663 { 0x00000008, 0x00220a22, 0x000 },
664 { 0x00000034, 0x00201a2d, 0x000 },
665 { 0x00000024, 0x00201e2d, 0x000 },
666 { 0x00007000, 0x00281e27, 0x000 },
667 { 0x00000000, 0x00311ce6, 0x000 },
668 { 0x00000033, 0x00201a2d, 0x000 },
669 { 0x0000000c, 0x00221a26, 0x000 },
670 { 0x00000000, 0x002f00e6, 0x000 },
671 { 0x00000000, 0x06e00000, 0x27b },
672 { 0x00000000, 0x00201c11, 0x000 },
673 { 0x00000000, 0x00200c11, 0x000 },
674 { 0x00000034, 0x00203623, 0x000 },
675 { 0x00000010, 0x00201811, 0x000 },
676 { 0x00000000, 0x00691ce2, 0x128 },
677 { 0x93800000, 0x00204411, 0x000 },
678 { 0x00000000, 0x00204807, 0x000 },
679 { 0x95000000, 0x00204411, 0x000 },
680 { 0x00000000, 0x002f022f, 0x000 },
681 { 0x00000000, 0x0ce00000, 0x286 },
682 { 0x00000001, 0x00333e2f, 0x000 },
683 { 0x00000000, 0xd9004800, 0x000 },
684 { 0x92000000, 0x00204411, 0x000 },
685 { 0x00000000, 0xc0204800, 0x000 },
686 { 0x00000024, 0x00403627, 0x000 },
687 { 0x0000000c, 0xc0220a20, 0x000 },
688 { 0x00000032, 0x00203622, 0x000 },
689 { 0x00000031, 0xc0403620, 0x000 },
690 { 0x0000a2a4, 0x00204411, 0x000 },
691 { 0x00000009, 0x00204811, 0x000 },
692 { 0xa1000000, 0x00204411, 0x000 },
693 { 0x00000001, 0x00804811, 0x000 },
694 { 0x00000029, 0x00201e2d, 0x000 },
695 { 0x00000000, 0x002c1ce3, 0x000 },
696 { 0x00000029, 0x00203627, 0x000 },
697 { 0x0000002a, 0x00201e2d, 0x000 },
698 { 0x00000000, 0x002c1ce4, 0x000 },
699 { 0x0000002a, 0x00203627, 0x000 },
700 { 0x0000002b, 0x00201e2d, 0x000 },
701 { 0x00000000, 0x003120a3, 0x000 },
702 { 0x00000000, 0x002d1d07, 0x000 },
703 { 0x0000002b, 0x00203627, 0x000 },
704 { 0x0000002c, 0x00201e2d, 0x000 },
705 { 0x00000000, 0x003120c4, 0x000 },
706 { 0x00000000, 0x002d1d07, 0x000 },
707 { 0x0000002c, 0x00803627, 0x000 },
708 { 0x00000029, 0x00203623, 0x000 },
709 { 0x0000002a, 0x00203624, 0x000 },
710 { 0x00000000, 0x00311ca3, 0x000 },
711 { 0x0000002b, 0x00203627, 0x000 },
712 { 0x00000000, 0x00311cc4, 0x000 },
713 { 0x0000002c, 0x00803627, 0x000 },
714 { 0x00000022, 0x00203627, 0x000 },
715 { 0x00000023, 0x00203628, 0x000 },
716 { 0x0000001d, 0x00201e2d, 0x000 },
717 { 0x00000002, 0x00210227, 0x000 },
718 { 0x00000000, 0x14c00000, 0x2c5 },
719 { 0x00000000, 0x00400000, 0x2c2 },
720 { 0x00000022, 0x00203627, 0x000 },
721 { 0x00000023, 0x00203628, 0x000 },
722 { 0x0000001d, 0x00201e2d, 0x000 },
723 { 0x00000002, 0x00210227, 0x000 },
724 { 0x00000000, 0x14e00000, 0x2c2 },
725 { 0x00000003, 0x00210227, 0x000 },
726 { 0x00000000, 0x14e00000, 0x2c5 },
727 { 0x0000002b, 0x00201e2d, 0x000 },
728 { 0x00000000, 0x002e00e1, 0x000 },
729 { 0x00000000, 0x02c00000, 0x2c5 },
730 { 0x00000029, 0x00201e2d, 0x000 },
731 { 0x00000000, 0x003120a1, 0x000 },
732 { 0x00000000, 0x002e00e8, 0x000 },
733 { 0x00000000, 0x06c00000, 0x2c5 },
734 { 0x0000002c, 0x00201e2d, 0x000 },
735 { 0x00000000, 0x002e00e2, 0x000 },
736 { 0x00000000, 0x02c00000, 0x2c5 },
737 { 0x0000002a, 0x00201e2d, 0x000 },
738 { 0x00000000, 0x003120c2, 0x000 },
739 { 0x00000000, 0x002e00e8, 0x000 },
740 { 0x00000000, 0x06c00000, 0x2c5 },
741 { 0x00000000, 0x00600000, 0x5ed },
742 { 0x00000000, 0x00600000, 0x29e },
743 { 0x00000000, 0x00400000, 0x2c7 },
744 { 0x00000000, 0x00600000, 0x29e },
745 { 0x00000000, 0x00600000, 0x5e4 },
746 { 0x00000000, 0x00400000, 0x2c7 },
747 { 0x00000000, 0x00600000, 0x290 },
748 { 0x00000000, 0x00400000, 0x2c7 },
749 { 0x00000022, 0x00201e2d, 0x000 },
750 { 0x00000023, 0x0080222d, 0x000 },
751 { 0x00000010, 0x00221e23, 0x000 },
752 { 0x00000000, 0x00294887, 0x000 },
753 { 0x00000000, 0x00311ca3, 0x000 },
754 { 0x00000010, 0x00221e27, 0x000 },
755 { 0x00000000, 0x00294887, 0x000 },
756 { 0x00000010, 0x00221e23, 0x000 },
757 { 0x00000000, 0x003120c4, 0x000 },
758 { 0x0000ffff, 0x00282228, 0x000 },
759 { 0x00000000, 0x00894907, 0x000 },
760 { 0x00000010, 0x00221e23, 0x000 },
761 { 0x00000000, 0x00294887, 0x000 },
762 { 0x00000010, 0x00221e21, 0x000 },
763 { 0x00000000, 0x00294847, 0x000 },
764 { 0x00000000, 0x00311ca3, 0x000 },
765 { 0x00000010, 0x00221e27, 0x000 },
766 { 0x00000000, 0x00294887, 0x000 },
767 { 0x00000000, 0x00311ca1, 0x000 },
768 { 0x00000010, 0x00221e27, 0x000 },
769 { 0x00000000, 0x00294847, 0x000 },
770 { 0x00000010, 0x00221e23, 0x000 },
771 { 0x00000000, 0x003120c4, 0x000 },
772 { 0x0000ffff, 0x00282228, 0x000 },
773 { 0x00000000, 0x00294907, 0x000 },
774 { 0x00000010, 0x00221e21, 0x000 },
775 { 0x00000000, 0x003120c2, 0x000 },
776 { 0x0000ffff, 0x00282228, 0x000 },
777 { 0x00000000, 0x00894907, 0x000 },
778 { 0x00000010, 0x00221e23, 0x000 },
779 { 0x00000000, 0x00294887, 0x000 },
780 { 0x00000001, 0x00220a21, 0x000 },
781 { 0x00000000, 0x003308a2, 0x000 },
782 { 0x00000010, 0x00221e22, 0x000 },
783 { 0x00000010, 0x00212222, 0x000 },
784 { 0x00000000, 0x00294907, 0x000 },
785 { 0x00000000, 0x00311ca3, 0x000 },
786 { 0x00000010, 0x00221e27, 0x000 },
787 { 0x00000000, 0x00294887, 0x000 },
788 { 0x00000001, 0x00220a21, 0x000 },
789 { 0x00000000, 0x003008a2, 0x000 },
790 { 0x00000010, 0x00221e22, 0x000 },
791 { 0x00000010, 0x00212222, 0x000 },
792 { 0x00000000, 0x00294907, 0x000 },
793 { 0x00000010, 0x00221e23, 0x000 },
794 { 0x00000000, 0x003120c4, 0x000 },
795 { 0x0000ffff, 0x00282228, 0x000 },
796 { 0x00000000, 0x00294907, 0x000 },
797 { 0x00000000, 0x003808c5, 0x000 },
798 { 0x00000000, 0x00300841, 0x000 },
799 { 0x00000001, 0x00220a22, 0x000 },
800 { 0x00000000, 0x003308a2, 0x000 },
801 { 0x00000010, 0x00221e22, 0x000 },
802 { 0x00000010, 0x00212222, 0x000 },
803 { 0x00000000, 0x00894907, 0x000 },
804 { 0x0000001d, 0x0020222d, 0x000 },
805 { 0x00000000, 0x14c00000, 0x301 },
806 { 0xffffffef, 0x00280621, 0x000 },
807 { 0x0000001a, 0x0020222d, 0x000 },
808 { 0x0000f8e0, 0x00204411, 0x000 },
809 { 0x00000000, 0x00294901, 0x000 },
810 { 0x00000000, 0x00894901, 0x000 },
811 { 0x00000000, 0x00204811, 0x000 },
812 { 0x00000000, 0x00204811, 0x000 },
813 { 0x060a0200, 0x00804811, 0x000 },
814 { 0x00000000, 0xc0200000, 0x000 },
815 { 0x97000000, 0xc0204411, 0x000 },
816 { 0x00000000, 0xc0204811, 0x000 },
817 { 0x8a000000, 0x00204411, 0x000 },
818 { 0x00000000, 0x00204811, 0x000 },
819 { 0x0000225c, 0x00204411, 0x000 },
820 { 0x00000000, 0xc0204800, 0x000 },
821 { 0x0000a1fc, 0x00204411, 0x000 },
822 { 0x00000000, 0xc0204800, 0x000 },
823 { 0x00000000, 0xc0200400, 0x000 },
824 { 0x00000000, 0x00a0000a, 0x000 },
825 { 0x97000000, 0x00204411, 0x000 },
826 { 0x00000000, 0x00204811, 0x000 },
827 { 0x8a000000, 0x00204411, 0x000 },
828 { 0x00000000, 0x00204811, 0x000 },
829 { 0x0000225c, 0x00204411, 0x000 },
830 { 0x00000000, 0xc0204800, 0x000 },
831 { 0x0000a1fc, 0x00204411, 0x000 },
832 { 0x00000000, 0xc0204800, 0x000 },
833 { 0x00000000, 0xc0200400, 0x000 },
834 { 0x00000000, 0x00a0000a, 0x000 },
835 { 0x97000000, 0x00204411, 0x000 },
836 { 0x00000000, 0x00204811, 0x000 },
837 { 0x8a000000, 0x00204411, 0x000 },
838 { 0x00000000, 0x00204811, 0x000 },
839 { 0x0000225c, 0x00204411, 0x000 },
840 { 0x00000000, 0xc0204800, 0x000 },
841 { 0x0000a1fc, 0x00204411, 0x000 },
842 { 0x00000000, 0xc0204800, 0x000 },
843 { 0x0001a1fd, 0x00204411, 0x000 },
844 { 0x00000000, 0xd9004800, 0x000 },
845 { 0x00000000, 0xc0200400, 0x000 },
846 { 0x00000000, 0x00a0000a, 0x000 },
847 { 0x00002257, 0x00204411, 0x000 },
848 { 0x00000003, 0xc0484a20, 0x000 },
849 { 0x0000225d, 0x00204411, 0x000 },
850 { 0x00000000, 0xc0404800, 0x000 },
851 { 0x00000000, 0x00600000, 0x5c5 },
852 { 0x00000000, 0xc0200800, 0x000 },
853 { 0x0000225c, 0x00204411, 0x000 },
854 { 0x00000003, 0x00384a22, 0x000 },
855 { 0x0000a1fc, 0x00204411, 0x000 },
856 { 0x00000000, 0xc0204800, 0x000 },
857 { 0x0001a1fd, 0x00204411, 0x000 },
858 { 0x00000000, 0x002f0222, 0x000 },
859 { 0x00000000, 0x0ce00000, 0x000 },
860 { 0x00000000, 0x40204800, 0x000 },
861 { 0x00000001, 0x40304a20, 0x000 },
862 { 0x00000002, 0xc0304a20, 0x000 },
863 { 0x00000001, 0x00530a22, 0x334 },
864 { 0x0000003f, 0xc0280a20, 0x000 },
865 { 0x81000000, 0x00204411, 0x000 },
866 { 0x00000001, 0x00204811, 0x000 },
867 { 0x000021f8, 0x00204411, 0x000 },
868 { 0x00000017, 0x00204811, 0x000 },
869 { 0x000421f9, 0x00604411, 0x614 },
870 { 0x00000011, 0x00210230, 0x000 },
871 { 0x00000000, 0x14e00000, 0x33d },
872 { 0x00000014, 0x002f0222, 0x000 },
873 { 0x00000000, 0x0cc00000, 0x351 },
874 { 0x00002010, 0x00204411, 0x000 },
875 { 0x00008000, 0x00204811, 0x000 },
876 { 0x0001a2a4, 0x00204411, 0x000 },
877 { 0x00000000, 0x00204811, 0x000 },
878 { 0x00000016, 0x00604811, 0x35e },
879 { 0x00002100, 0x00204411, 0x000 },
880 { 0x00000000, 0xc0204800, 0x000 },
881 { 0x00000000, 0xc0204800, 0x000 },
882 { 0x00000000, 0xc0204800, 0x000 },
883 { 0x00000000, 0xc0204800, 0x000 },
884 { 0x0001a2a4, 0x00204411, 0x000 },
885 { 0x00000000, 0x00204811, 0x000 },
886 { 0x00000000, 0x00404802, 0x000 },
887 { 0x00000004, 0x002f0222, 0x000 },
888 { 0x00000000, 0x0cc00000, 0x355 },
889 { 0x00002010, 0x00204411, 0x000 },
890 { 0x00008000, 0x00404811, 0x349 },
891 { 0x00000028, 0x002f0222, 0x000 },
892 { 0x00000000, 0x0ce00000, 0x349 },
893 { 0x00002104, 0x00204411, 0x000 },
894 { 0x00000000, 0xc0204800, 0x000 },
895 { 0x00000000, 0xc0204800, 0x000 },
896 { 0x00000000, 0xc0204800, 0x000 },
897 { 0x00000000, 0xc0204800, 0x000 },
898 { 0x0000a2a4, 0x00204411, 0x000 },
899 { 0x00000000, 0x00404802, 0x000 },
900 { 0x00000035, 0x00203626, 0x000 },
901 { 0x00000049, 0x00201811, 0x000 },
902 { 0x00000000, 0x00204811, 0x000 },
903 { 0x00000001, 0x00331a26, 0x000 },
904 { 0x00000000, 0x002f0226, 0x000 },
905 { 0x00000000, 0x0cc00000, 0x360 },
906 { 0x00000035, 0x00801a2d, 0x000 },
907 { 0x0000003f, 0xc0280a20, 0x000 },
908 { 0x00000015, 0x002f0222, 0x000 },
909 { 0x00000000, 0x0ce00000, 0x376 },
910 { 0x0000001e, 0x002f0222, 0x000 },
911 { 0x00000000, 0x0ce00000, 0x380 },
912 { 0x00000020, 0x002f0222, 0x000 },
913 { 0x00000000, 0x0ce00000, 0x38c },
914 { 0x0000000f, 0x002f0222, 0x000 },
915 { 0x00000000, 0x0ce00000, 0x398 },
916 { 0x00000010, 0x002f0222, 0x000 },
917 { 0x00000000, 0x0ce00000, 0x398 },
918 { 0x00000006, 0x002f0222, 0x000 },
919 { 0x00000000, 0x0ce00000, 0x39a },
920 { 0x00000016, 0x002f0222, 0x000 },
921 { 0x00000000, 0x0ce00000, 0x39f },
922 { 0x0000a2a4, 0x00204411, 0x000 },
923 { 0x00000000, 0x00404802, 0x000 },
924 { 0x08000000, 0x00290a22, 0x000 },
925 { 0x00000003, 0x40210e20, 0x000 },
926 { 0x0000000c, 0xc0211220, 0x000 },
927 { 0x00080000, 0x00281224, 0x000 },
928 { 0x00000014, 0xc0221620, 0x000 },
929 { 0x00000000, 0x002914a4, 0x000 },
930 { 0x0000a2a4, 0x00204411, 0x000 },
931 { 0x00000000, 0x002948a2, 0x000 },
932 { 0x0000a1fe, 0x00204411, 0x000 },
933 { 0x00000000, 0x00404803, 0x000 },
934 { 0x81000000, 0x00204411, 0x000 },
935 { 0x00000001, 0x00204811, 0x000 },
936 { 0x000021f8, 0x00204411, 0x000 },
937 { 0x00000015, 0x00204811, 0x000 },
938 { 0x000421f9, 0x00604411, 0x614 },
939 { 0x00000015, 0x00210230, 0x000 },
940 { 0x00000000, 0x14e00000, 0x382 },
941 { 0x0000210e, 0x00204411, 0x000 },
942 { 0x00000000, 0xc0204800, 0x000 },
943 { 0x00000000, 0xc0204800, 0x000 },
944 { 0x0000a2a4, 0x00204411, 0x000 },
945 { 0x00000000, 0x00404802, 0x000 },
946 { 0x81000000, 0x00204411, 0x000 },
947 { 0x00000001, 0x00204811, 0x000 },
948 { 0x000021f8, 0x00204411, 0x000 },
949 { 0x00000016, 0x00204811, 0x000 },
950 { 0x000421f9, 0x00604411, 0x614 },
951 { 0x00000003, 0x00210230, 0x000 },
952 { 0x00000000, 0x14e00000, 0x38e },
953 { 0x00002108, 0x00204411, 0x000 },
954 { 0x00000000, 0xc0204800, 0x000 },
955 { 0x00000000, 0xc0204800, 0x000 },
956 { 0x0000a2a4, 0x00204411, 0x000 },
957 { 0x00000000, 0x00404802, 0x000 },
958 { 0x00002010, 0x00204411, 0x000 },
959 { 0x00008000, 0x00404811, 0x000 },
960 { 0x00002010, 0x00204411, 0x000 },
961 { 0x00008000, 0x00204811, 0x000 },
962 { 0x0001a2a4, 0x00204411, 0x000 },
963 { 0x00000000, 0x00204811, 0x000 },
964 { 0x00000006, 0x00404811, 0x000 },
965 { 0x00002010, 0x00204411, 0x000 },
966 { 0x00008000, 0x00204811, 0x000 },
967 { 0x0001a2a4, 0x00204411, 0x000 },
968 { 0x00000000, 0x00204811, 0x000 },
969 { 0x00000016, 0x00604811, 0x35e },
970 { 0x00000016, 0x00404811, 0x000 },
971 { 0x00000000, 0xc0200800, 0x000 },
972 { 0x00000000, 0xc0200c00, 0x000 },
973 { 0x0000001d, 0x00210223, 0x000 },
974 { 0x00000000, 0x14e00000, 0x3b9 },
975 { 0x81000000, 0x00204411, 0x000 },
976 { 0x00000001, 0x00204811, 0x000 },
977 { 0x000021f8, 0x00204411, 0x000 },
978 { 0x00000017, 0x00204811, 0x000 },
979 { 0x000421f9, 0x00604411, 0x614 },
980 { 0x00000011, 0x00210230, 0x000 },
981 { 0x00000000, 0x14e00000, 0x3ab },
982 { 0x00002100, 0x00204411, 0x000 },
983 { 0x00000000, 0x00204802, 0x000 },
984 { 0x00000000, 0x00204803, 0x000 },
985 { 0xbabecafe, 0x00204811, 0x000 },
986 { 0xcafebabe, 0x00204811, 0x000 },
987 { 0x00002010, 0x00204411, 0x000 },
988 { 0x00008000, 0x00204811, 0x000 },
989 { 0x0000a2a4, 0x00204411, 0x000 },
990 { 0x00000004, 0x00404811, 0x000 },
991 { 0x00002170, 0x00204411, 0x000 },
992 { 0x00000000, 0x00204802, 0x000 },
993 { 0x00000000, 0x00204803, 0x000 },
994 { 0x81000000, 0x00204411, 0x000 },
995 { 0x0000000a, 0x00204811, 0x000 },
996 { 0x00000000, 0x00200010, 0x000 },
997 { 0x00000000, 0x14c00000, 0x3be },
998 { 0x8c000000, 0x00204411, 0x000 },
999 { 0xcafebabe, 0x00404811, 0x000 },
1000 { 0x81000000, 0x00204411, 0x000 },
1001 { 0x00000001, 0x00204811, 0x000 },
1002 { 0x00003fff, 0x40280a20, 0x000 },
1003 { 0x80000000, 0x40280e20, 0x000 },
1004 { 0x40000000, 0xc0281220, 0x000 },
1005 { 0x00040000, 0x00694622, 0x614 },
1006 { 0x00000000, 0x00201410, 0x000 },
1007 { 0x00000000, 0x002f0223, 0x000 },
1008 { 0x00000000, 0x0cc00000, 0x3cc },
1009 { 0x00000000, 0xc0401800, 0x3cf },
1010 { 0x00003fff, 0xc0281a20, 0x000 },
1011 { 0x00040000, 0x00694626, 0x614 },
1012 { 0x00000000, 0x00201810, 0x000 },
1013 { 0x00000000, 0x002f0224, 0x000 },
1014 { 0x00000000, 0x0cc00000, 0x3d2 },
1015 { 0x00000000, 0xc0401c00, 0x3d5 },
1016 { 0x00003fff, 0xc0281e20, 0x000 },
1017 { 0x00040000, 0x00694627, 0x614 },
1018 { 0x00000000, 0x00201c10, 0x000 },
1019 { 0x00000000, 0x00204402, 0x000 },
1020 { 0x00000000, 0x002820c5, 0x000 },
1021 { 0x00000000, 0x004948e8, 0x000 },
1022 { 0xa5800000, 0x00200811, 0x000 },
1023 { 0x00002000, 0x00200c11, 0x000 },
1024 { 0x83000000, 0x00604411, 0x3fd },
1025 { 0x00000000, 0x00204402, 0x000 },
1026 { 0x00000000, 0xc0204800, 0x000 },
1027 { 0x00000000, 0x40204800, 0x000 },
1028 { 0x0000001f, 0xc0210220, 0x000 },
1029 { 0x00000000, 0x14c00000, 0x3e2 },
1030 { 0x00002010, 0x00204411, 0x000 },
1031 { 0x00008000, 0x00204811, 0x000 },
1032 { 0x0000ffff, 0xc0481220, 0x3ea },
1033 { 0xa7800000, 0x00200811, 0x000 },
1034 { 0x0000a000, 0x00200c11, 0x000 },
1035 { 0x83000000, 0x00604411, 0x3fd },
1036 { 0x00000000, 0x00204402, 0x000 },
1037 { 0x00000000, 0xc0204800, 0x000 },
1038 { 0x00000000, 0xc0204800, 0x000 },
1039 { 0x0000ffff, 0xc0281220, 0x000 },
1040 { 0x83000000, 0x00204411, 0x000 },
1041 { 0x00000000, 0x00304883, 0x000 },
1042 { 0x84000000, 0x00204411, 0x000 },
1043 { 0x00000000, 0xc0204800, 0x000 },
1044 { 0x00000000, 0x1d000000, 0x000 },
1045 { 0x83000000, 0x00604411, 0x3fd },
1046 { 0x00000000, 0xc0400400, 0x001 },
1047 { 0xa9800000, 0x00200811, 0x000 },
1048 { 0x0000c000, 0x00400c11, 0x3e5 },
1049 { 0xab800000, 0x00200811, 0x000 },
1050 { 0x0000f8e0, 0x00400c11, 0x3e5 },
1051 { 0xad800000, 0x00200811, 0x000 },
1052 { 0x0000f880, 0x00400c11, 0x3e5 },
1053 { 0xb3800000, 0x00200811, 0x000 },
1054 { 0x0000f3fc, 0x00400c11, 0x3e5 },
1055 { 0xaf800000, 0x00200811, 0x000 },
1056 { 0x0000e000, 0x00400c11, 0x3e5 },
1057 { 0xb1800000, 0x00200811, 0x000 },
1058 { 0x0000f000, 0x00400c11, 0x3e5 },
1059 { 0x83000000, 0x00204411, 0x000 },
1060 { 0x00002148, 0x00204811, 0x000 },
1061 { 0x84000000, 0x00204411, 0x000 },
1062 { 0x00000000, 0xc0204800, 0x000 },
1063 { 0x00000000, 0x1d000000, 0x000 },
1064 { 0x00000000, 0x00800000, 0x000 },
1065 { 0x00182000, 0xc0304620, 0x000 },
1066 { 0x00000000, 0xd9004800, 0x000 },
1067 { 0x00000000, 0xc0200400, 0x000 },
1068 { 0x00000000, 0x00a0000a, 0x000 },
1069 { 0x0018a000, 0xc0304620, 0x000 },
1070 { 0x00000000, 0xd9004800, 0x000 },
1071 { 0x00000000, 0xc0200400, 0x000 },
1072 { 0x00000000, 0x00a0000a, 0x000 },
1073 { 0x0018c000, 0xc0304620, 0x000 },
1074 { 0x00000000, 0xd9004800, 0x000 },
1075 { 0x00000000, 0xc0200400, 0x000 },
1076 { 0x00000000, 0x00a0000a, 0x000 },
1077 { 0x0018f8e0, 0xc0304620, 0x000 },
1078 { 0x00000000, 0xd9004800, 0x000 },
1079 { 0x00000000, 0xc0200400, 0x000 },
1080 { 0x00000000, 0x00a0000a, 0x000 },
1081 { 0x0018f880, 0xc0304620, 0x000 },
1082 { 0x00000000, 0xd9004800, 0x000 },
1083 { 0x00000000, 0xc0200400, 0x000 },
1084 { 0x00000000, 0x00a0000a, 0x000 },
1085 { 0x0018e000, 0xc0304620, 0x000 },
1086 { 0x00000000, 0xd9004800, 0x000 },
1087 { 0x00000000, 0xc0200400, 0x000 },
1088 { 0x00000000, 0x00a0000a, 0x000 },
1089 { 0x0018f000, 0xc0304620, 0x000 },
1090 { 0x00000000, 0xd9004800, 0x000 },
1091 { 0x00000000, 0xc0200400, 0x000 },
1092 { 0x00000000, 0x00a0000a, 0x000 },
1093 { 0x0018f3fc, 0xc0304620, 0x000 },
1094 { 0x00000000, 0xd9004800, 0x000 },
1095 { 0x00000000, 0xc0200400, 0x000 },
1096 { 0x00000000, 0x00a0000a, 0x000 },
1097 { 0x86000000, 0x00204411, 0x000 },
1098 { 0x00000000, 0x00404801, 0x000 },
1099 { 0x85000000, 0x00204411, 0x000 },
1100 { 0x00000000, 0x00404801, 0x000 },
1101 { 0x0000217c, 0x00204411, 0x000 },
1102 { 0x00000000, 0xc0204800, 0x000 },
1103 { 0x00000000, 0xc0204800, 0x000 },
1104 { 0x00000000, 0xc0204800, 0x000 },
1105 { 0x81000000, 0x00204411, 0x000 },
1106 { 0x00000001, 0x00204811, 0x000 },
1107 { 0x00000000, 0xc0200800, 0x000 },
1108 { 0x00000000, 0x17000000, 0x000 },
1109 { 0x0004217f, 0x00604411, 0x614 },
1110 { 0x0000001f, 0x00210230, 0x000 },
1111 { 0x00000000, 0x14c00000, 0x000 },
1112 { 0x00000000, 0x00404c02, 0x42e },
1113 { 0x00000000, 0xc0200c00, 0x000 },
1114 { 0x00000000, 0xc0201000, 0x000 },
1115 { 0x00000000, 0xc0201400, 0x000 },
1116 { 0x00000000, 0xc0201800, 0x000 },
1117 { 0x00000000, 0xc0201c00, 0x000 },
1118 { 0x00007f00, 0x00280a21, 0x000 },
1119 { 0x00004500, 0x002f0222, 0x000 },
1120 { 0x00000000, 0x0ce00000, 0x43c },
1121 { 0x00000000, 0xc0202000, 0x000 },
1122 { 0x00000000, 0x17000000, 0x000 },
1123 { 0x00000010, 0x00280a23, 0x000 },
1124 { 0x00000010, 0x002f0222, 0x000 },
1125 { 0x00000000, 0x0ce00000, 0x444 },
1126 { 0x81000000, 0x00204411, 0x000 },
1127 { 0x00000001, 0x00204811, 0x000 },
1128 { 0x00040000, 0x00694624, 0x614 },
1129 { 0x00000000, 0x00400000, 0x44d },
1130 { 0x81000000, 0x00204411, 0x000 },
1131 { 0x00000000, 0x00204811, 0x000 },
1132 { 0x0000216d, 0x00204411, 0x000 },
1133 { 0x00000000, 0x00204804, 0x000 },
1134 { 0x00000000, 0x00204805, 0x000 },
1135 { 0x00000000, 0x1ac00000, 0x449 },
1136 { 0x9e000000, 0x00204411, 0x000 },
1137 { 0xcafebabe, 0x00204811, 0x000 },
1138 { 0x00000000, 0x1ae00000, 0x44c },
1139 { 0x00000000, 0x002824f0, 0x000 },
1140 { 0x00000007, 0x00280a23, 0x000 },
1141 { 0x00000001, 0x002f0222, 0x000 },
1142 { 0x00000000, 0x0ae00000, 0x454 },
1143 { 0x00000000, 0x002f00c9, 0x000 },
1144 { 0x00000000, 0x04e00000, 0x46d },
1145 { 0x00000000, 0x00400000, 0x47a },
1146 { 0x00000002, 0x002f0222, 0x000 },
1147 { 0x00000000, 0x0ae00000, 0x459 },
1148 { 0x00000000, 0x002f00c9, 0x000 },
1149 { 0x00000000, 0x02e00000, 0x46d },
1150 { 0x00000000, 0x00400000, 0x47a },
1151 { 0x00000003, 0x002f0222, 0x000 },
1152 { 0x00000000, 0x0ae00000, 0x45e },
1153 { 0x00000000, 0x002f00c9, 0x000 },
1154 { 0x00000000, 0x0ce00000, 0x46d },
1155 { 0x00000000, 0x00400000, 0x47a },
1156 { 0x00000004, 0x002f0222, 0x000 },
1157 { 0x00000000, 0x0ae00000, 0x463 },
1158 { 0x00000000, 0x002f00c9, 0x000 },
1159 { 0x00000000, 0x0ae00000, 0x46d },
1160 { 0x00000000, 0x00400000, 0x47a },
1161 { 0x00000005, 0x002f0222, 0x000 },
1162 { 0x00000000, 0x0ae00000, 0x468 },
1163 { 0x00000000, 0x002f00c9, 0x000 },
1164 { 0x00000000, 0x06e00000, 0x46d },
1165 { 0x00000000, 0x00400000, 0x47a },
1166 { 0x00000006, 0x002f0222, 0x000 },
1167 { 0x00000000, 0x0ae00000, 0x46d },
1168 { 0x00000000, 0x002f00c9, 0x000 },
1169 { 0x00000000, 0x08e00000, 0x46d },
1170 { 0x00000000, 0x00400000, 0x47a },
1171 { 0x00007f00, 0x00280a21, 0x000 },
1172 { 0x00004500, 0x002f0222, 0x000 },
1173 { 0x00000000, 0x0ae00000, 0x000 },
1174 { 0x00000008, 0x00210a23, 0x000 },
1175 { 0x00000000, 0x14c00000, 0x477 },
1176 { 0x00002169, 0x00204411, 0x000 },
1177 { 0x00000000, 0xc0204800, 0x000 },
1178 { 0x00000000, 0xc0204800, 0x000 },
1179 { 0x00000000, 0xc0204800, 0x000 },
1180 { 0xcafebabe, 0x00404811, 0x000 },
1181 { 0x00000000, 0xc0204400, 0x000 },
1182 { 0x00000000, 0xc0200000, 0x000 },
1183 { 0x00000000, 0xc0404800, 0x000 },
1184 { 0x00007f00, 0x00280a21, 0x000 },
1185 { 0x00004500, 0x002f0222, 0x000 },
1186 { 0x00000000, 0x0ae00000, 0x480 },
1187 { 0x00000000, 0xc0200000, 0x000 },
1188 { 0x00000000, 0xc0200000, 0x000 },
1189 { 0x00000000, 0xc0400000, 0x000 },
1190 { 0x00000000, 0x00404c08, 0x43c },
1191 { 0x00000000, 0xc0200800, 0x000 },
1192 { 0x00000010, 0x40210e20, 0x000 },
1193 { 0x00000011, 0x40211220, 0x000 },
1194 { 0x00000012, 0x40211620, 0x000 },
1195 { 0x00002169, 0x00204411, 0x000 },
1196 { 0x00000000, 0x00204802, 0x000 },
1197 { 0x00000000, 0x00210225, 0x000 },
1198 { 0x00000000, 0x14e00000, 0x48a },
1199 { 0x00040000, 0xc0494a20, 0x48b },
1200 { 0xfffbffff, 0xc0284a20, 0x000 },
1201 { 0x00000000, 0x00210223, 0x000 },
1202 { 0x00000000, 0x14e00000, 0x497 },
1203 { 0x00000000, 0xc0204800, 0x000 },
1204 { 0x00000000, 0xc0204800, 0x000 },
1205 { 0x00000000, 0x00210224, 0x000 },
1206 { 0x00000000, 0x14c00000, 0x000 },
1207 { 0x81000000, 0x00204411, 0x000 },
1208 { 0x0000000c, 0x00204811, 0x000 },
1209 { 0x00000000, 0x00200010, 0x000 },
1210 { 0x00000000, 0x14c00000, 0x493 },
1211 { 0xa0000000, 0x00204411, 0x000 },
1212 { 0xcafebabe, 0x00404811, 0x000 },
1213 { 0x81000000, 0x00204411, 0x000 },
1214 { 0x00000004, 0x00204811, 0x000 },
1215 { 0x0000216b, 0x00204411, 0x000 },
1216 { 0x00000000, 0xc0204810, 0x000 },
1217 { 0x81000000, 0x00204411, 0x000 },
1218 { 0x00000005, 0x00204811, 0x000 },
1219 { 0x0000216c, 0x00204411, 0x000 },
1220 { 0x00000000, 0xc0204810, 0x000 },
1221 { 0x00000000, 0x002f0224, 0x000 },
1222 { 0x00000000, 0x0ce00000, 0x000 },
1223 { 0x00000000, 0x00400000, 0x491 },
1224 { 0x00000000, 0xc0210a20, 0x000 },
1225 { 0x00000000, 0x14c00000, 0x4ae },
1226 { 0x81000000, 0x00204411, 0x000 },
1227 { 0x00000000, 0x00204811, 0x000 },
1228 { 0x0000216d, 0x00204411, 0x000 },
1229 { 0x00000000, 0xc0204800, 0x000 },
1230 { 0x00000000, 0xc0204800, 0x000 },
1231 { 0x00000000, 0x1ac00000, 0x4a9 },
1232 { 0x9e000000, 0x00204411, 0x000 },
1233 { 0xcafebabe, 0x00204811, 0x000 },
1234 { 0x00000000, 0x1ae00000, 0x4ac },
1235 { 0x00000000, 0x00400000, 0x4b2 },
1236 { 0x81000000, 0x00204411, 0x000 },
1237 { 0x00000001, 0x00204811, 0x000 },
1238 { 0x00040000, 0xc0294620, 0x000 },
1239 { 0x00000000, 0xc0600000, 0x614 },
1240 { 0x00000001, 0x00210222, 0x000 },
1241 { 0x00000000, 0x14c00000, 0x4b9 },
1242 { 0x00002169, 0x00204411, 0x000 },
1243 { 0x00000000, 0xc0204800, 0x000 },
1244 { 0x00000000, 0xc0204800, 0x000 },
1245 { 0x00000000, 0x00204810, 0x000 },
1246 { 0xcafebabe, 0x00404811, 0x000 },
1247 { 0x00000000, 0xc0204400, 0x000 },
1248 { 0x00000000, 0xc0404810, 0x000 },
1249 { 0x81000000, 0x00204411, 0x000 },
1250 { 0x00000001, 0x00204811, 0x000 },
1251 { 0x000021f8, 0x00204411, 0x000 },
1252 { 0x0000000d, 0x00204811, 0x000 },
1253 { 0x000421f9, 0x00604411, 0x614 },
1254 { 0x00000000, 0x00210230, 0x000 },
1255 { 0x00000000, 0x14c00000, 0x4bb },
1256 { 0x00002180, 0x00204411, 0x000 },
1257 { 0x00000000, 0xc0204800, 0x000 },
1258 { 0x00000000, 0xc0200000, 0x000 },
1259 { 0x00000000, 0xc0204800, 0x000 },
1260 { 0x00000000, 0xc0200000, 0x000 },
1261 { 0x00000000, 0xc0404800, 0x000 },
1262 { 0x00000003, 0x00333e2f, 0x000 },
1263 { 0x00000001, 0x00210221, 0x000 },
1264 { 0x00000000, 0x14e00000, 0x4eb },
1265 { 0x00000035, 0x00200a2d, 0x000 },
1266 { 0x00040000, 0x18e00c11, 0x4da },
1267 { 0x00000001, 0x00333e2f, 0x000 },
1268 { 0x00002169, 0x00204411, 0x000 },
1269 { 0x00000000, 0x00204802, 0x000 },
1270 { 0x00000000, 0x00204803, 0x000 },
1271 { 0x00000008, 0x00300a22, 0x000 },
1272 { 0x00000000, 0xc0204800, 0x000 },
1273 { 0x00000000, 0xc0204800, 0x000 },
1274 { 0x00002169, 0x00204411, 0x000 },
1275 { 0x00000000, 0x00204802, 0x000 },
1276 { 0x00000000, 0x00204803, 0x000 },
1277 { 0x00000008, 0x00300a22, 0x000 },
1278 { 0x00000000, 0xc0204800, 0x000 },
1279 { 0x00000000, 0xd8c04800, 0x4ce },
1280 { 0x00002169, 0x00204411, 0x000 },
1281 { 0x00000000, 0x00204802, 0x000 },
1282 { 0x00000000, 0x00204803, 0x000 },
1283 { 0x00000008, 0x00300a22, 0x000 },
1284 { 0x00000000, 0xc0204800, 0x000 },
1285 { 0x00000000, 0xc0204800, 0x000 },
1286 { 0x00000036, 0x0020122d, 0x000 },
1287 { 0x00000000, 0x00290c83, 0x000 },
1288 { 0x00002169, 0x00204411, 0x000 },
1289 { 0x00000000, 0x00204802, 0x000 },
1290 { 0x00000000, 0x00204803, 0x000 },
1291 { 0x00000008, 0x00300a22, 0x000 },
1292 { 0x00000000, 0xc0204800, 0x000 },
1293 { 0x00000000, 0xc0204800, 0x000 },
1294 { 0x00000011, 0x00210224, 0x000 },
1295 { 0x00000000, 0x14c00000, 0x000 },
1296 { 0x00000000, 0x00400000, 0x491 },
1297 { 0x00000035, 0xc0203620, 0x000 },
1298 { 0x00000036, 0xc0403620, 0x000 },
1299 { 0x0000304a, 0x00204411, 0x000 },
1300 { 0xe0000000, 0xc0484a20, 0x000 },
1301 { 0x0000000f, 0x00210221, 0x000 },
1302 { 0x00000000, 0x14c00000, 0x4f2 },
1303 { 0x00000000, 0x00600000, 0x00b },
1304 { 0x00000000, 0xd9000000, 0x000 },
1305 { 0x00000000, 0xc0400400, 0x001 },
1306 { 0x81000000, 0x00204411, 0x000 },
1307 { 0x00000002, 0x00204811, 0x000 },
1308 { 0x000000ff, 0x00280e30, 0x000 },
1309 { 0x00000000, 0x002f0223, 0x000 },
1310 { 0x00000000, 0x0cc00000, 0x4f6 },
1311 { 0x00000000, 0xc0200800, 0x000 },
1312 { 0x00000000, 0x14c00000, 0x50b },
1313 { 0x00000000, 0x00200c11, 0x000 },
1314 { 0x00000024, 0x00203623, 0x000 },
1315 { 0x00000034, 0x00203623, 0x000 },
1316 { 0x00000032, 0x00203623, 0x000 },
1317 { 0x00000031, 0x00203623, 0x000 },
1318 { 0x0000001d, 0x00203623, 0x000 },
1319 { 0x0000002d, 0x00203623, 0x000 },
1320 { 0x0000002e, 0x00203623, 0x000 },
1321 { 0x0000001b, 0x00203623, 0x000 },
1322 { 0x0000001c, 0x00203623, 0x000 },
1323 { 0xffffe000, 0x00200c11, 0x000 },
1324 { 0x00000029, 0x00203623, 0x000 },
1325 { 0x0000002a, 0x00203623, 0x000 },
1326 { 0x00001fff, 0x00200c11, 0x000 },
1327 { 0x0000002b, 0x00203623, 0x000 },
1328 { 0x0000002c, 0x00203623, 0x000 },
1329 { 0xf1ffffff, 0x00283a2e, 0x000 },
1330 { 0x0000001a, 0xc0220e20, 0x000 },
1331 { 0x00000000, 0x0029386e, 0x000 },
1332 { 0x81000000, 0x00204411, 0x000 },
1333 { 0x00000006, 0x00204811, 0x000 },
1334 { 0x00000033, 0x40203620, 0x000 },
1335 { 0x87000000, 0x00204411, 0x000 },
1336 { 0x00000000, 0xc0204800, 0x000 },
1337 { 0x0000a1f4, 0x00204411, 0x000 },
1338 { 0x00000000, 0x00204810, 0x000 },
1339 { 0x9d000000, 0x00204411, 0x000 },
1340 { 0x0000001f, 0x40214a20, 0x000 },
1341 { 0x96000000, 0x00204411, 0x000 },
1342 { 0x00000000, 0xc0204800, 0x000 },
1343 { 0x00000000, 0xc0200c00, 0x000 },
1344 { 0x00000000, 0xc0201000, 0x000 },
1345 { 0x0000001f, 0x00211624, 0x000 },
1346 { 0x00000000, 0x14c00000, 0x000 },
1347 { 0x00000025, 0x00203623, 0x000 },
1348 { 0x00000003, 0x00281e23, 0x000 },
1349 { 0x00000008, 0x00222223, 0x000 },
1350 { 0xfffff000, 0x00282228, 0x000 },
1351 { 0x00000000, 0x002920e8, 0x000 },
1352 { 0x00000027, 0x00203628, 0x000 },
1353 { 0x00000018, 0x00211e23, 0x000 },
1354 { 0x00000028, 0x00203627, 0x000 },
1355 { 0x00000002, 0x00221624, 0x000 },
1356 { 0x00000000, 0x003014a8, 0x000 },
1357 { 0x00000026, 0x00203625, 0x000 },
1358 { 0x00000003, 0x00211a24, 0x000 },
1359 { 0x10000000, 0x00281a26, 0x000 },
1360 { 0xefffffff, 0x00283a2e, 0x000 },
1361 { 0x00000000, 0x004938ce, 0x602 },
1362 { 0x00000001, 0x40280a20, 0x000 },
1363 { 0x00000006, 0x40280e20, 0x000 },
1364 { 0x00000300, 0xc0281220, 0x000 },
1365 { 0x00000008, 0x00211224, 0x000 },
1366 { 0x00000000, 0xc0201620, 0x000 },
1367 { 0x00000000, 0xc0201a20, 0x000 },
1368 { 0x00000000, 0x00210222, 0x000 },
1369 { 0x00000000, 0x14c00000, 0x541 },
1370 { 0x81000000, 0x00204411, 0x000 },
1371 { 0x00000001, 0x00204811, 0x000 },
1372 { 0x00002258, 0x00300a24, 0x000 },
1373 { 0x00040000, 0x00694622, 0x614 },
1374 { 0x00002169, 0x00204411, 0x000 },
1375 { 0x00000000, 0x00204805, 0x000 },
1376 { 0x00020000, 0x00294a26, 0x000 },
1377 { 0x00000000, 0x00204810, 0x000 },
1378 { 0xcafebabe, 0x00204811, 0x000 },
1379 { 0x00000002, 0x002f0223, 0x000 },
1380 { 0x00000000, 0x0cc00000, 0x549 },
1381 { 0x00000000, 0xc0201c10, 0x000 },
1382 { 0x00000000, 0xc0400000, 0x55b },
1383 { 0x00000002, 0x002f0223, 0x000 },
1384 { 0x00000000, 0x0cc00000, 0x549 },
1385 { 0x81000000, 0x00204411, 0x000 },
1386 { 0x00000001, 0x00204811, 0x000 },
1387 { 0x00002258, 0x00300a24, 0x000 },
1388 { 0x00040000, 0x00694622, 0x614 },
1389 { 0x00000000, 0xc0201c10, 0x000 },
1390 { 0x00000000, 0xc0400000, 0x55b },
1391 { 0x00000000, 0x002f0223, 0x000 },
1392 { 0x00000000, 0x0cc00000, 0x54d },
1393 { 0x00000000, 0xc0201c00, 0x000 },
1394 { 0x00000000, 0xc0400000, 0x55b },
1395 { 0x00000004, 0x002f0223, 0x000 },
1396 { 0x00000000, 0x0cc00000, 0x559 },
1397 { 0x81000000, 0x00204411, 0x000 },
1398 { 0x00000000, 0x00204811, 0x000 },
1399 { 0x0000216d, 0x00204411, 0x000 },
1400 { 0x00000000, 0xc0204800, 0x000 },
1401 { 0x00000000, 0xc0204800, 0x000 },
1402 { 0x00000000, 0x1ac00000, 0x554 },
1403 { 0x9e000000, 0x00204411, 0x000 },
1404 { 0xcafebabe, 0x00204811, 0x000 },
1405 { 0x00000000, 0x1ae00000, 0x557 },
1406 { 0x00000000, 0x00401c10, 0x55b },
1407 { 0x00000000, 0xc0200000, 0x000 },
1408 { 0x00000000, 0xc0400000, 0x000 },
1409 { 0x00000000, 0x0ee00000, 0x55d },
1410 { 0x00000000, 0x00600000, 0x5a4 },
1411 { 0x00000000, 0x002f0224, 0x000 },
1412 { 0x00000000, 0x0cc00000, 0x56d },
1413 { 0x0000a2b7, 0x00204411, 0x000 },
1414 { 0x00000000, 0x00204807, 0x000 },
1415 { 0x81000000, 0x00204411, 0x000 },
1416 { 0x00000001, 0x00204811, 0x000 },
1417 { 0x0004a2b6, 0x00604411, 0x614 },
1418 { 0x0000001a, 0x00212230, 0x000 },
1419 { 0x00000006, 0x00222630, 0x000 },
1420 { 0x0000a2c4, 0x00204411, 0x000 },
1421 { 0x00000000, 0x003048e9, 0x000 },
1422 { 0x00000000, 0x00e00000, 0x56b },
1423 { 0x0000a2d1, 0x00204411, 0x000 },
1424 { 0x00000000, 0x00404808, 0x000 },
1425 { 0x0000a2d1, 0x00204411, 0x000 },
1426 { 0x00000001, 0x00504a28, 0x000 },
1427 { 0x00000001, 0x002f0224, 0x000 },
1428 { 0x00000000, 0x0cc00000, 0x57d },
1429 { 0x0000a2bb, 0x00204411, 0x000 },
1430 { 0x00000000, 0x00204807, 0x000 },
1431 { 0x81000000, 0x00204411, 0x000 },
1432 { 0x00000001, 0x00204811, 0x000 },
1433 { 0x0004a2ba, 0x00604411, 0x614 },
1434 { 0x0000001a, 0x00212230, 0x000 },
1435 { 0x00000006, 0x00222630, 0x000 },
1436 { 0x0000a2c5, 0x00204411, 0x000 },
1437 { 0x00000000, 0x003048e9, 0x000 },
1438 { 0x00000000, 0x00e00000, 0x57b },
1439 { 0x0000a2d2, 0x00204411, 0x000 },
1440 { 0x00000000, 0x00404808, 0x000 },
1441 { 0x0000a2d2, 0x00204411, 0x000 },
1442 { 0x00000001, 0x00504a28, 0x000 },
1443 { 0x00000002, 0x002f0224, 0x000 },
1444 { 0x00000000, 0x0cc00000, 0x58d },
1445 { 0x0000a2bf, 0x00204411, 0x000 },
1446 { 0x00000000, 0x00204807, 0x000 },
1447 { 0x81000000, 0x00204411, 0x000 },
1448 { 0x00000001, 0x00204811, 0x000 },
1449 { 0x0004a2be, 0x00604411, 0x614 },
1450 { 0x0000001a, 0x00212230, 0x000 },
1451 { 0x00000006, 0x00222630, 0x000 },
1452 { 0x0000a2c6, 0x00204411, 0x000 },
1453 { 0x00000000, 0x003048e9, 0x000 },
1454 { 0x00000000, 0x00e00000, 0x58b },
1455 { 0x0000a2d3, 0x00204411, 0x000 },
1456 { 0x00000000, 0x00404808, 0x000 },
1457 { 0x0000a2d3, 0x00204411, 0x000 },
1458 { 0x00000001, 0x00504a28, 0x000 },
1459 { 0x0000a2c3, 0x00204411, 0x000 },
1460 { 0x00000000, 0x00204807, 0x000 },
1461 { 0x81000000, 0x00204411, 0x000 },
1462 { 0x00000001, 0x00204811, 0x000 },
1463 { 0x0004a2c2, 0x00604411, 0x614 },
1464 { 0x0000001a, 0x00212230, 0x000 },
1465 { 0x00000006, 0x00222630, 0x000 },
1466 { 0x0000a2c7, 0x00204411, 0x000 },
1467 { 0x00000000, 0x003048e9, 0x000 },
1468 { 0x00000000, 0x00e00000, 0x599 },
1469 { 0x0000a2d4, 0x00204411, 0x000 },
1470 { 0x00000000, 0x00404808, 0x000 },
1471 { 0x0000a2d4, 0x00204411, 0x000 },
1472 { 0x00000001, 0x00504a28, 0x000 },
1473 { 0x85000000, 0x00204411, 0x000 },
1474 { 0x00000000, 0x00204801, 0x000 },
1475 { 0x0000304a, 0x00204411, 0x000 },
1476 { 0x01000000, 0x00204811, 0x000 },
1477 { 0x00000000, 0x00400000, 0x59f },
1478 { 0xa4000000, 0xc0204411, 0x000 },
1479 { 0x00000000, 0xc0404800, 0x000 },
1480 { 0x00000000, 0xc0600000, 0x5a4 },
1481 { 0x00000000, 0xc0400400, 0x001 },
1482 { 0x0001a2a4, 0x00204411, 0x000 },
1483 { 0x00000000, 0x00204811, 0x000 },
1484 { 0x00000000, 0x00204811, 0x000 },
1485 { 0x00000000, 0x00204811, 0x000 },
1486 { 0x00000000, 0x00204811, 0x000 },
1487 { 0x00000005, 0x00204811, 0x000 },
1488 { 0x0000a1f4, 0x00204411, 0x000 },
1489 { 0x00000000, 0x00204811, 0x000 },
1490 { 0x88000000, 0x00204411, 0x000 },
1491 { 0x00000001, 0x00204811, 0x000 },
1492 { 0xff000000, 0x00204411, 0x000 },
1493 { 0x00000000, 0x00204811, 0x000 },
1494 { 0x00000001, 0x00204811, 0x000 },
1495 { 0x00000002, 0x00804811, 0x000 },
1496 { 0x00000000, 0x0ee00000, 0x5b7 },
1497 { 0x00001000, 0x00200811, 0x000 },
1498 { 0x00000034, 0x00203622, 0x000 },
1499 { 0x00000000, 0x00600000, 0x5bb },
1500 { 0x00000000, 0x00600000, 0x5a4 },
1501 { 0x98000000, 0x00204411, 0x000 },
1502 { 0x00000000, 0x00804811, 0x000 },
1503 { 0x00000000, 0xc0600000, 0x5bb },
1504 { 0x00000000, 0xc0400400, 0x001 },
1505 { 0x0000a2a4, 0x00204411, 0x000 },
1506 { 0x00000022, 0x00204811, 0x000 },
1507 { 0x89000000, 0x00204411, 0x000 },
1508 { 0x00000001, 0x00204811, 0x000 },
1509 { 0xff000000, 0x00204411, 0x000 },
1510 { 0x00000000, 0x00204811, 0x000 },
1511 { 0x00000001, 0x00204811, 0x000 },
1512 { 0x00000002, 0x00804811, 0x000 },
1513 { 0x0000217a, 0xc0204411, 0x000 },
1514 { 0x00000000, 0x00404811, 0x000 },
1515 { 0x97000000, 0x00204411, 0x000 },
1516 { 0x00000000, 0x00204811, 0x000 },
1517 { 0x8a000000, 0x00204411, 0x000 },
1518 { 0x00000000, 0x00204811, 0x000 },
1519 { 0xff000000, 0x00204411, 0x000 },
1520 { 0x00000000, 0x00204811, 0x000 },
1521 { 0x00000001, 0x00204811, 0x000 },
1522 { 0x00000002, 0x00804811, 0x000 },
1523 { 0x00000000, 0x00600000, 0x5e1 },
1524 { 0x00002010, 0x00204411, 0x000 },
1525 { 0x00008000, 0x00204811, 0x000 },
1526 { 0x0001a2a4, 0xc0204411, 0x000 },
1527 { 0x00000000, 0x00204811, 0x000 },
1528 { 0x00000016, 0x00604811, 0x35e },
1529 { 0x00000016, 0x00204811, 0x000 },
1530 { 0x00002010, 0x00204411, 0x000 },
1531 { 0x00010000, 0x00204811, 0x000 },
1532 { 0x81000000, 0x00204411, 0x000 },
1533 { 0x00000001, 0x00204811, 0x000 },
1534 { 0x0000217c, 0x00204411, 0x000 },
1535 { 0x09800000, 0x00204811, 0x000 },
1536 { 0xffffffff, 0x00204811, 0x000 },
1537 { 0x00000000, 0x00204811, 0x000 },
1538 { 0x00000000, 0x17000000, 0x000 },
1539 { 0x0004217f, 0x00604411, 0x614 },
1540 { 0x0000001f, 0x00210230, 0x000 },
1541 { 0x00000000, 0x14c00000, 0x000 },
1542 { 0x00000004, 0x00404c11, 0x5dc },
1543 { 0x0000001d, 0x00201e2d, 0x000 },
1544 { 0x00000004, 0x00291e27, 0x000 },
1545 { 0x0000001d, 0x00803627, 0x000 },
1546 { 0x0000001d, 0x00201e2d, 0x000 },
1547 { 0xfffffffb, 0x00281e27, 0x000 },
1548 { 0x0000001d, 0x00803627, 0x000 },
1549 { 0x0000001d, 0x00201e2d, 0x000 },
1550 { 0x00000008, 0x00291e27, 0x000 },
1551 { 0x0000001d, 0x00803627, 0x000 },
1552 { 0x0000001d, 0x00201e2d, 0x000 },
1553 { 0xfffffff7, 0x00281e27, 0x000 },
1554 { 0x0000001d, 0x00803627, 0x000 },
1555 { 0x00002010, 0x00204411, 0x000 },
1556 { 0x00008000, 0x00204811, 0x000 },
1557 { 0x0001a2a4, 0x00204411, 0x000 },
1558 { 0x00000000, 0x00204811, 0x000 },
1559 { 0x00000016, 0x00604811, 0x35e },
1560 { 0x00000016, 0x00204811, 0x000 },
1561 { 0x00002010, 0x00204411, 0x000 },
1562 { 0x00010000, 0x00204811, 0x000 },
1563 { 0x0000217c, 0x00204411, 0x000 },
1564 { 0x01800000, 0x00204811, 0x000 },
1565 { 0x00ffffff, 0x00204811, 0x000 },
1566 { 0x00000000, 0x00204811, 0x000 },
1567 { 0x00000000, 0x17000000, 0x000 },
1568 { 0x81000000, 0x00204411, 0x000 },
1569 { 0x00000001, 0x00204811, 0x000 },
1570 { 0x0004217f, 0x00604411, 0x614 },
1571 { 0x00000000, 0x00200010, 0x000 },
1572 { 0x00000000, 0x14c00000, 0x613 },
1573 { 0x00000010, 0x00404c11, 0x5f9 },
1574 { 0x00000000, 0xc0200400, 0x000 },
1575 { 0x00000000, 0x38c00000, 0x000 },
1576 { 0x00000025, 0x00200a2d, 0x000 },
1577 { 0x00000026, 0x00200e2d, 0x000 },
1578 { 0x00000027, 0x0020122d, 0x000 },
1579 { 0x00000028, 0x0020162d, 0x000 },
1580 { 0x00002169, 0x00204411, 0x000 },
1581 { 0x00000000, 0x00204804, 0x000 },
1582 { 0x00000000, 0x00204805, 0x000 },
1583 { 0x00000000, 0x00204801, 0x000 },
1584 { 0xcafebabe, 0x00204811, 0x000 },
1585 { 0x00000004, 0x00301224, 0x000 },
1586 { 0x00000000, 0x002f0064, 0x000 },
1587 { 0x00000000, 0x0cc00000, 0x612 },
1588 { 0x00000003, 0x00281a22, 0x000 },
1589 { 0x00000008, 0x00221222, 0x000 },
1590 { 0xfffff000, 0x00281224, 0x000 },
1591 { 0x00000000, 0x002910c4, 0x000 },
1592 { 0x00000027, 0x00403624, 0x000 },
1593 { 0x00000000, 0x00800000, 0x000 },
1594 { 0x00000000, 0x1ac00000, 0x614 },
1595 { 0x9f000000, 0x00204411, 0x000 },
1596 { 0xcafebabe, 0x00204811, 0x000 },
1597 { 0x00000000, 0x1ae00000, 0x617 },
1598 { 0x00000000, 0x00800000, 0x000 },
1599 { 0x00000000, 0x00600000, 0x00b },
1600 { 0x00001000, 0x00600411, 0x2fe },
1601 { 0x00000000, 0x00200411, 0x000 },
1602 { 0x00000000, 0x00600811, 0x19f },
1603 { 0x0000225c, 0x00204411, 0x000 },
1604 { 0x00000003, 0x00204811, 0x000 },
1605 { 0x00002256, 0x00204411, 0x000 },
1606 { 0x0000001b, 0x00204811, 0x000 },
1607 { 0x0000a1fc, 0x00204411, 0x000 },
1608 { 0x00000001, 0x00204811, 0x000 },
1609 { 0x0001a1fd, 0xc0204411, 0x000 },
1610 { 0x00000029, 0x00201e2d, 0x000 },
1611 { 0x00000010, 0x00221e27, 0x000 },
1612 { 0x0000002c, 0x0020222d, 0x000 },
1613 { 0x0000ffff, 0x00282228, 0x000 },
1614 { 0x00000000, 0x00294907, 0x000 },
1615 { 0x00000000, 0x00204811, 0x000 },
1616 { 0x0000002a, 0x0020222d, 0x000 },
1617 { 0x0000ffff, 0x00282228, 0x000 },
1618 { 0x00000000, 0x00294907, 0x000 },
1619 { 0x00000000, 0x00204811, 0x000 },
1620 { 0x0000002b, 0x00201e2d, 0x000 },
1621 { 0x00000010, 0x00221e27, 0x000 },
1622 { 0x00000000, 0x00294907, 0x000 },
1623 { 0x00000000, 0x00404811, 0x000 },
1624 { 0x00000000, 0x00000000, 0x000 },
1625 { 0x00000000, 0x00000000, 0x000 },
1626 { 0x00000000, 0x00000000, 0x000 },
1627 { 0x00000000, 0x00000000, 0x000 },
1628 { 0x00000000, 0x00000000, 0x000 },
1629 { 0x00000000, 0x00000000, 0x000 },
1630 { 0x00000000, 0x00000000, 0x000 },
1631 { 0x00000000, 0x00000000, 0x000 },
1632 { 0x00000000, 0x00000000, 0x000 },
1633 { 0x00000000, 0x00000000, 0x000 },
1634 { 0x00000000, 0x00000000, 0x000 },
1635 { 0x00000000, 0x00000000, 0x000 },
1636 { 0x00000000, 0x00000000, 0x000 },
1637 { 0x00000000, 0x00000000, 0x000 },
1638 { 0x00000000, 0x00000000, 0x000 },
1639 { 0x00000000, 0x00000000, 0x000 },
1640 { 0x00000000, 0x00000000, 0x000 },
1641 { 0x00000000, 0x00000000, 0x000 },
1642 { 0x00000000, 0x00000000, 0x000 },
1643 { 0x00000000, 0x00000000, 0x000 },
1644 { 0x00000000, 0x00000000, 0x000 },
1645 { 0x00000000, 0x00000000, 0x000 },
1646 { 0x00000000, 0x00000000, 0x000 },
1647 { 0x00000000, 0x00000000, 0x000 },
1648 { 0x00000000, 0x00000000, 0x000 },
1649 { 0x00000000, 0x00000000, 0x000 },
1650 { 0x00000000, 0x00000000, 0x000 },
1651 { 0x00000000, 0x00000000, 0x000 },
1652 { 0x00000000, 0x00000000, 0x000 },
1653 { 0x00000000, 0x00000000, 0x000 },
1654 { 0x00000000, 0x00000000, 0x000 },
1655 { 0x00000000, 0x00000000, 0x000 },
1656 { 0x00000000, 0x00000000, 0x000 },
1657 { 0x00000000, 0x00000000, 0x000 },
1658 { 0x00000000, 0x00000000, 0x000 },
1659 { 0x00000000, 0x00000000, 0x000 },
1660 { 0x00000000, 0x00000000, 0x000 },
1661 { 0x00000000, 0x00000000, 0x000 },
1662 { 0x00000000, 0x00000000, 0x000 },
1663 { 0x00000000, 0x00000000, 0x000 },
1664 { 0x00000000, 0x00000000, 0x000 },
1665 { 0x00000000, 0x00000000, 0x000 },
1666 { 0x00000000, 0x00000000, 0x000 },
1667 { 0x00000000, 0x00000000, 0x000 },
1668 { 0x00000000, 0x00000000, 0x000 },
1669 { 0x00000000, 0x00000000, 0x000 },
1670 { 0x00000000, 0x00000000, 0x000 },
1671 { 0x00000000, 0x00000000, 0x000 },
1672 { 0x00000000, 0x00000000, 0x000 },
1673 { 0x00000000, 0x00000000, 0x000 },
1674 { 0x00000000, 0x00000000, 0x000 },
1675 { 0x00000000, 0x00000000, 0x000 },
1676 { 0x00000000, 0x00000000, 0x000 },
1677 { 0x00000000, 0x00000000, 0x000 },
1678 { 0x00000000, 0x00000000, 0x000 },
1679 { 0x00000000, 0x00000000, 0x000 },
1680 { 0x00000000, 0x00000000, 0x000 },
1681 { 0x00000000, 0x00000000, 0x000 },
1682 { 0x00000000, 0x00000000, 0x000 },
1683 { 0x00000000, 0x00000000, 0x000 },
1684 { 0x00000000, 0x00000000, 0x000 },
1685 { 0x00000000, 0x00000000, 0x000 },
1686 { 0x00000000, 0x00000000, 0x000 },
1687 { 0x00000000, 0x00000000, 0x000 },
1688 { 0x00000000, 0x00000000, 0x000 },
1689 { 0x00000000, 0x00000000, 0x000 },
1690 { 0x00000000, 0x00000000, 0x000 },
1691 { 0x00000000, 0x00000000, 0x000 },
1692 { 0x00000000, 0x00000000, 0x000 },
1693 { 0x00000000, 0x00000000, 0x000 },
1694 { 0x00000000, 0x00000000, 0x000 },
1695 { 0x00000000, 0x00000000, 0x000 },
1696 { 0x00000000, 0x00000000, 0x000 },
1697 { 0x00000000, 0x00000000, 0x000 },
1698 { 0x00000000, 0x00000000, 0x000 },
1699 { 0x00000000, 0x00000000, 0x000 },
1700 { 0x00000000, 0x00000000, 0x000 },
1701 { 0x00000000, 0x00000000, 0x000 },
1702 { 0x00000000, 0x00000000, 0x000 },
1703 { 0x00000000, 0x00000000, 0x000 },
1704 { 0x00000000, 0x00000000, 0x000 },
1705 { 0x00000000, 0x00000000, 0x000 },
1706 { 0x00000000, 0x00000000, 0x000 },
1707 { 0x00000000, 0x00000000, 0x000 },
1708 { 0x00000000, 0x00000000, 0x000 },
1709 { 0x00000000, 0x00000000, 0x000 },
1710 { 0x00000000, 0x00000000, 0x000 },
1711 { 0x00000000, 0x00000000, 0x000 },
1712 { 0x00000000, 0x00000000, 0x000 },
1713 { 0x00000000, 0x00000000, 0x000 },
1714 { 0x00000000, 0x00000000, 0x000 },
1715 { 0x00000000, 0x00000000, 0x000 },
1716 { 0x00000000, 0x00000000, 0x000 },
1717 { 0x00000000, 0x00000000, 0x000 },
1718 { 0x00000000, 0x00000000, 0x000 },
1719 { 0x00000000, 0x00000000, 0x000 },
1720 { 0x00000000, 0x00000000, 0x000 },
1721 { 0x00000000, 0x00000000, 0x000 },
1722 { 0x00000000, 0x00000000, 0x000 },
1723 { 0x00000000, 0x00000000, 0x000 },
1724 { 0x00000000, 0x00000000, 0x000 },
1725 { 0x00000000, 0x00000000, 0x000 },
1726 { 0x00000000, 0x00000000, 0x000 },
1727 { 0x00000000, 0x00000000, 0x000 },
1728 { 0x00000000, 0x00000000, 0x000 },
1729 { 0x00000000, 0x00000000, 0x000 },
1730 { 0x00000000, 0x00000000, 0x000 },
1731 { 0x00000000, 0x00000000, 0x000 },
1732 { 0x00000000, 0x00000000, 0x000 },
1733 { 0x00000000, 0x00000000, 0x000 },
1734 { 0x00000000, 0x00000000, 0x000 },
1735 { 0x00000000, 0x00000000, 0x000 },
1736 { 0x00000000, 0x00000000, 0x000 },
1737 { 0x00000000, 0x00000000, 0x000 },
1738 { 0x00000000, 0x00000000, 0x000 },
1739 { 0x00000000, 0x00000000, 0x000 },
1740 { 0x00000000, 0x00000000, 0x000 },
1741 { 0x00000000, 0x00000000, 0x000 },
1742 { 0x00000000, 0x00000000, 0x000 },
1743 { 0x00000000, 0x00000000, 0x000 },
1744 { 0x00000000, 0x00000000, 0x000 },
1745 { 0x00000000, 0x00000000, 0x000 },
1746 { 0x00000000, 0x00000000, 0x000 },
1747 { 0x00000000, 0x00000000, 0x000 },
1748 { 0x00000000, 0x00000000, 0x000 },
1749 { 0x00000000, 0x00000000, 0x000 },
1750 { 0x00000000, 0x00000000, 0x000 },
1751 { 0x00000000, 0x00000000, 0x000 },
1752 { 0x00000000, 0x00000000, 0x000 },
1753 { 0x00000000, 0x00000000, 0x000 },
1754 { 0x00000000, 0x00000000, 0x000 },
1755 { 0x00000000, 0x00000000, 0x000 },
1756 { 0x00000000, 0x00000000, 0x000 },
1757 { 0x00000000, 0x00000000, 0x000 },
1758 { 0x00000000, 0x00000000, 0x000 },
1759 { 0x00000000, 0x00000000, 0x000 },
1760 { 0x00000000, 0x00000000, 0x000 },
1761 { 0x00000000, 0x00000000, 0x000 },
1762 { 0x00000000, 0x00000000, 0x000 },
1763 { 0x00000000, 0x00000000, 0x000 },
1764 { 0x00000000, 0x00000000, 0x000 },
1765 { 0x00000000, 0x00000000, 0x000 },
1766 { 0x00000000, 0x00000000, 0x000 },
1767 { 0x00000000, 0x00000000, 0x000 },
1768 { 0x00000000, 0x00000000, 0x000 },
1769 { 0x00000000, 0x00000000, 0x000 },
1770 { 0x00000000, 0x00000000, 0x000 },
1771 { 0x00000000, 0x00000000, 0x000 },
1772 { 0x00000000, 0x00000000, 0x000 },
1773 { 0x00000000, 0x00000000, 0x000 },
1774 { 0x00000000, 0x00000000, 0x000 },
1775 { 0x00000000, 0x00000000, 0x000 },
1776 { 0x00000000, 0x00000000, 0x000 },
1777 { 0x00000000, 0x00000000, 0x000 },
1778 { 0x00000000, 0x00000000, 0x000 },
1779 { 0x00000000, 0x00000000, 0x000 },
1780 { 0x00000000, 0x00000000, 0x000 },
1781 { 0x00000000, 0x00000000, 0x000 },
1782 { 0x00000000, 0x00000000, 0x000 },
1783 { 0x00000000, 0x00000000, 0x000 },
1784 { 0x00000000, 0x00000000, 0x000 },
1785 { 0x00000000, 0x00000000, 0x000 },
1786 { 0x00000000, 0x00000000, 0x000 },
1787 { 0x00000000, 0x00000000, 0x000 },
1788 { 0x00000000, 0x00000000, 0x000 },
1789 { 0x00000000, 0x00000000, 0x000 },
1790 { 0x00000000, 0x00000000, 0x000 },
1791 { 0x00000000, 0x00000000, 0x000 },
1792 { 0x00000000, 0x00000000, 0x000 },
1793 { 0x00000000, 0x00000000, 0x000 },
1794 { 0x00000000, 0x00000000, 0x000 },
1795 { 0x00000000, 0x00000000, 0x000 },
1796 { 0x00000000, 0x00000000, 0x000 },
1797 { 0x00000000, 0x00000000, 0x000 },
1798 { 0x00000000, 0x00000000, 0x000 },
1799 { 0x00000000, 0x00000000, 0x000 },
1800 { 0x00000000, 0x00000000, 0x000 },
1801 { 0x00000000, 0x00000000, 0x000 },
1802 { 0x013304ef, 0x059b0239, 0x000 },
1803 { 0x01b00159, 0x0425059b, 0x000 },
1804 { 0x021201f6, 0x02390142, 0x000 },
1805 { 0x0210022e, 0x0289022a, 0x000 },
1806 { 0x03c2059b, 0x059b059b, 0x000 },
1807 { 0x05cd05ce, 0x0308059b, 0x000 },
1808 { 0x059b05a0, 0x03090329, 0x000 },
1809 { 0x0313026b, 0x032b031d, 0x000 },
1810 { 0x059b059b, 0x059b059b, 0x000 },
1811 { 0x059b052c, 0x059b059b, 0x000 },
1812 { 0x03a5059b, 0x04a2032d, 0x000 },
1813 { 0x04810433, 0x0423059b, 0x000 },
1814 { 0x04bb04ed, 0x042704c8, 0x000 },
1815 { 0x043304f4, 0x033a0365, 0x000 },
1816 { 0x059b059b, 0x059b059b, 0x000 },
1817 { 0x059b059b, 0x059b059b, 0x000 },
1818 { 0x059b059b, 0x05b905a2, 0x000 },
1819 { 0x059b059b, 0x0007059b, 0x000 },
1820 { 0x059b059b, 0x059b059b, 0x000 },
1821 { 0x059b059b, 0x059b059b, 0x000 },
1822 { 0x03e303d8, 0x03f303f1, 0x000 },
1823 { 0x03f903f5, 0x03f703fb, 0x000 },
1824 { 0x04070403, 0x040f040b, 0x000 },
1825 { 0x04170413, 0x041f041b, 0x000 },
1826 { 0x059b059b, 0x059b059b, 0x000 },
1827 { 0x059b059b, 0x059b059b, 0x000 },
1828 { 0x059b059b, 0x059b059b, 0x000 },
1829 { 0x00020600, 0x06190006, 0x000 },
1830};
1831
1832static const u32 R600_pfp_microcode[] = {
18330xd40071,
18340xd40072,
18350xca0400,
18360xa00000,
18370x7e828b,
18380x800003,
18390xca0400,
18400xd4401e,
18410xee001e,
18420xca0400,
18430xa00000,
18440x7e828b,
18450xc41838,
18460xca2400,
18470xca2800,
18480x9581a8,
18490xc41c3a,
18500xc3c000,
18510xca0800,
18520xca0c00,
18530x7c744b,
18540xc20005,
18550x99c000,
18560xc41c3a,
18570x7c744c,
18580xc0fff0,
18590x042c04,
18600x309002,
18610x7d2500,
18620x351402,
18630x7d350b,
18640x255403,
18650x7cd580,
18660x259c03,
18670x95c004,
18680xd5001b,
18690x7eddc1,
18700x7d9d80,
18710xd6801b,
18720xd5801b,
18730xd4401e,
18740xd5401e,
18750xd6401e,
18760xd6801e,
18770xd4801e,
18780xd4c01e,
18790x9783d4,
18800xd5c01e,
18810xca0800,
18820x80001b,
18830xca0c00,
18840xe4011e,
18850xd4001e,
18860x80000d,
18870xc41838,
18880xe4013e,
18890xd4001e,
18900x80000d,
18910xc41838,
18920xd4401e,
18930xee001e,
18940xca0400,
18950xa00000,
18960x7e828b,
18970xe4011e,
18980xd4001e,
18990xd4401e,
19000xee001e,
19010xca0400,
19020xa00000,
19030x7e828b,
19040xe4013e,
19050xd4001e,
19060xd4401e,
19070xee001e,
19080xca0400,
19090xa00000,
19100x7e828b,
19110xca1800,
19120xd4401e,
19130xd5801e,
19140x800054,
19150xd40073,
19160xd4401e,
19170xca0800,
19180xca0c00,
19190xca1000,
19200xd48019,
19210xd4c018,
19220xd50017,
19230xd4801e,
19240xd4c01e,
19250xd5001e,
19260xe2001e,
19270xca0400,
19280xa00000,
19290x7e828b,
19300xca0800,
19310xd48060,
19320xd4401e,
19330x800002,
19340xd4801e,
19350xca0800,
19360xd48061,
19370xd4401e,
19380x800002,
19390xd4801e,
19400xca0800,
19410xca0c00,
19420xd4401e,
19430xd48016,
19440xd4c016,
19450xd4801e,
19460x8001b9,
19470xd4c01e,
19480xc6083e,
19490xca0c00,
19500xca1000,
19510x948004,
19520xca1400,
19530xe420f3,
19540xd42013,
19550xd56065,
19560xd4e01c,
19570xd5201c,
19580xd5601c,
19590x800002,
19600x062001,
19610xc6083e,
19620xca0c00,
19630xca1000,
19640x9483f7,
19650xca1400,
19660xe420f3,
19670x80007a,
19680xd42013,
19690xc6083e,
19700xca0c00,
19710xca1000,
19720x9883ef,
19730xca1400,
19740xd40064,
19750x80008e,
19760x000000,
19770xc41432,
19780xc6183e,
19790xc4082f,
19800x954005,
19810xc40c30,
19820xd4401e,
19830x800002,
19840xee001e,
19850x9583f5,
19860xc41031,
19870xd44033,
19880xd52065,
19890xd4a01c,
19900xd4e01c,
19910xd5201c,
19920xd40073,
19930xe4015e,
19940xd4001e,
19950x8001b9,
19960x062001,
19970x0a2001,
19980xd60074,
19990xc40836,
20000xc61040,
20010x988007,
20020xcc3835,
20030x95010f,
20040xd4001f,
20050xd46062,
20060x800002,
20070xd42062,
20080xcc1433,
20090x8401bc,
20100xd40070,
20110xd5401e,
20120x800002,
20130xee001e,
20140xca0c00,
20150xca1000,
20160xd4c01a,
20170x8401bc,
20180xd5001a,
20190xcc0443,
20200x35101f,
20210x2c9401,
20220x7d098b,
20230x984005,
20240x7d15cb,
20250xd4001a,
20260x8001b9,
20270xd4006d,
20280x344401,
20290xcc0c44,
20300x98403a,
20310xcc2c46,
20320x958004,
20330xcc0445,
20340x8001b9,
20350xd4001a,
20360xd4c01a,
20370x282801,
20380x8400f3,
20390xcc1003,
20400x98801b,
20410x04380c,
20420x8400f3,
20430xcc1003,
20440x988017,
20450x043808,
20460x8400f3,
20470xcc1003,
20480x988013,
20490x043804,
20500x8400f3,
20510xcc1003,
20520x988014,
20530xcc1047,
20540x9a8009,
20550xcc1448,
20560x9840da,
20570xd4006d,
20580xcc1844,
20590xd5001a,
20600xd5401a,
20610x8000cc,
20620xd5801a,
20630x96c0d3,
20640xd4006d,
20650x8001b9,
20660xd4006e,
20670x9ac003,
20680xd4006d,
20690xd4006e,
20700x800002,
20710xec007f,
20720x9ac0ca,
20730xd4006d,
20740x8001b9,
20750xd4006e,
20760xcc1403,
20770xcc1803,
20780xcc1c03,
20790x7d9103,
20800x7dd583,
20810x7d190c,
20820x35cc1f,
20830x35701f,
20840x7cf0cb,
20850x7cd08b,
20860x880000,
20870x7e8e8b,
20880x95c004,
20890xd4006e,
20900x8001b9,
20910xd4001a,
20920xd4c01a,
20930xcc0803,
20940xcc0c03,
20950xcc1003,
20960xcc1403,
20970xcc1803,
20980xcc1c03,
20990xcc2403,
21000xcc2803,
21010x35c41f,
21020x36b01f,
21030x7c704b,
21040x34f01f,
21050x7c704b,
21060x35701f,
21070x7c704b,
21080x7d8881,
21090x7dccc1,
21100x7e5101,
21110x7e9541,
21120x7c9082,
21130x7cd4c2,
21140x7c848b,
21150x9ac003,
21160x7c8c8b,
21170x2c8801,
21180x98809c,
21190xd4006d,
21200x98409a,
21210xd4006e,
21220xcc0847,
21230xcc0c48,
21240xcc1044,
21250xd4801a,
21260xd4c01a,
21270x800104,
21280xd5001a,
21290xcc0832,
21300xd40032,
21310x9482d8,
21320xca0c00,
21330xd4401e,
21340x800002,
21350xd4001e,
21360xe4011e,
21370xd4001e,
21380xca0800,
21390xca0c00,
21400xca1000,
21410xd4401e,
21420xca1400,
21430xd4801e,
21440xd4c01e,
21450xd5001e,
21460xd5401e,
21470xd54034,
21480x800002,
21490xee001e,
21500x280404,
21510xe2001a,
21520xe2001a,
21530xd4401a,
21540xca3800,
21550xcc0803,
21560xcc0c03,
21570xcc0c03,
21580xcc0c03,
21590x9882bc,
21600x000000,
21610x8401bc,
21620xd7806f,
21630x800002,
21640xee001f,
21650xca0400,
21660xc2ff00,
21670xcc0834,
21680xc13fff,
21690x7c74cb,
21700x7cc90b,
21710x7d010f,
21720x9902af,
21730x7c738b,
21740x8401bc,
21750xd7806f,
21760x800002,
21770xee001f,
21780xca0800,
21790x281900,
21800x7d898b,
21810x958014,
21820x281404,
21830xca0c00,
21840xca1000,
21850xca1c00,
21860xca2400,
21870xe2001f,
21880xd4c01a,
21890xd5001a,
21900xd5401a,
21910xcc1803,
21920xcc2c03,
21930xcc2c03,
21940xcc2c03,
21950x7da58b,
21960x7d9c47,
21970x984296,
21980x000000,
21990x800164,
22000xd4c01a,
22010xd4401e,
22020xd4801e,
22030x800002,
22040xee001e,
22050xe4011e,
22060xd4001e,
22070xd4401e,
22080xee001e,
22090xca0400,
22100xa00000,
22110x7e828b,
22120xe4013e,
22130xd4001e,
22140xd4401e,
22150xee001e,
22160xca0400,
22170xa00000,
22180x7e828b,
22190xca0800,
22200x248c06,
22210x0ccc06,
22220x98c006,
22230xcc1049,
22240x990004,
22250xd40071,
22260xe4011e,
22270xd4001e,
22280xd4401e,
22290xd4801e,
22300x800002,
22310xee001e,
22320xca0800,
22330xca0c00,
22340x34d018,
22350x251001,
22360x95001f,
22370xc17fff,
22380xca1000,
22390xca1400,
22400xca1800,
22410xd4801d,
22420xd4c01d,
22430x7db18b,
22440xc14202,
22450xc2c001,
22460xd5801d,
22470x34dc0e,
22480x7d5d4c,
22490x7f734c,
22500xd7401e,
22510xd5001e,
22520xd5401e,
22530xc14200,
22540xc2c000,
22550x099c01,
22560x31dc10,
22570x7f5f4c,
22580x7f734c,
22590x7d8380,
22600xd5806f,
22610xd58066,
22620xd7401e,
22630xec005e,
22640xc82402,
22650x8001b9,
22660xd60074,
22670xd4401e,
22680xd4801e,
22690xd4c01e,
22700x800002,
22710xee001e,
22720x800002,
22730xee001f,
22740xd4001f,
22750x800002,
22760xd4001f,
22770xd4001f,
22780x880000,
22790xd4001f,
22800x000000,
22810x000000,
22820x000000,
22830x000000,
22840x000000,
22850x000000,
22860x000000,
22870x000000,
22880x000000,
22890x000000,
22900x000000,
22910x000000,
22920x000000,
22930x000000,
22940x000000,
22950x000000,
22960x000000,
22970x000000,
22980x000000,
22990x000000,
23000x000000,
23010x000000,
23020x000000,
23030x000000,
23040x000000,
23050x000000,
23060x000000,
23070x000000,
23080x000000,
23090x000000,
23100x000000,
23110x000000,
23120x000000,
23130x000000,
23140x000000,
23150x000000,
23160x000000,
23170x000000,
23180x000000,
23190x000000,
23200x000000,
23210x000000,
23220x000000,
23230x000000,
23240x000000,
23250x000000,
23260x000000,
23270x000000,
23280x000000,
23290x000000,
23300x000000,
23310x000000,
23320x000000,
23330x000000,
23340x000000,
23350x000000,
23360x000000,
23370x000000,
23380x000000,
23390x000000,
23400x000000,
23410x000000,
23420x000000,
23430x000000,
23440x000000,
23450x010174,
23460x02017b,
23470x030090,
23480x040080,
23490x050005,
23500x060040,
23510x070033,
23520x08012f,
23530x090047,
23540x0a0037,
23550x1001b7,
23560x1700a4,
23570x22013d,
23580x23014c,
23590x2000b5,
23600x240128,
23610x27004e,
23620x28006b,
23630x2a0061,
23640x2b0053,
23650x2f0066,
23660x320088,
23670x340182,
23680x3c0159,
23690x3f0073,
23700x41018f,
23710x440131,
23720x550176,
23730x56017d,
23740x60000c,
23750x610035,
23760x620039,
23770x630039,
23780x640039,
23790x650039,
23800x660039,
23810x670039,
23820x68003b,
23830x690042,
23840x6a0049,
23850x6b0049,
23860x6c0049,
23870x6d0049,
23880x6e0049,
23890x6f0049,
23900x7301b7,
23910x000007,
23920x000007,
23930x000007,
23940x000007,
23950x000007,
23960x000007,
23970x000007,
23980x000007,
23990x000007,
24000x000007,
24010x000007,
24020x000007,
24030x000007,
24040x000007,
24050x000007,
24060x000007,
24070x000007,
24080x000007,
2409};
2410
2411static const u32 RV610_cp_microcode[][3] = {
2412 { 0x00000000, 0xc0200400, 0x000 },
2413 { 0x00000000, 0x00a0000a, 0x000 },
2414 { 0x0000ffff, 0x00284621, 0x000 },
2415 { 0x00000000, 0xd9004800, 0x000 },
2416 { 0x00000000, 0xc0200400, 0x000 },
2417 { 0x00000000, 0x00a0000a, 0x000 },
2418 { 0x00000000, 0x00e00000, 0x000 },
2419 { 0x00010000, 0xc0294620, 0x000 },
2420 { 0x00000000, 0xd9004800, 0x000 },
2421 { 0x00000000, 0xc0200400, 0x000 },
2422 { 0x00000000, 0x00a0000a, 0x000 },
2423 { 0x81000000, 0x00204411, 0x000 },
2424 { 0x00000001, 0x00204811, 0x000 },
2425 { 0x00042004, 0x00604411, 0x68d },
2426 { 0x00000000, 0x00600000, 0x631 },
2427 { 0x00000000, 0x00600000, 0x645 },
2428 { 0x00000000, 0xc0200800, 0x000 },
2429 { 0x00000f00, 0x00281622, 0x000 },
2430 { 0x00000008, 0x00211625, 0x000 },
2431 { 0x00000018, 0x00203625, 0x000 },
2432 { 0x8d000000, 0x00204411, 0x000 },
2433 { 0x00000004, 0x002f0225, 0x000 },
2434 { 0x00000000, 0x0ce00000, 0x018 },
2435 { 0x00412000, 0x00404811, 0x019 },
2436 { 0x00422000, 0x00204811, 0x000 },
2437 { 0x8e000000, 0x00204411, 0x000 },
2438 { 0x00000028, 0x00204a2d, 0x000 },
2439 { 0x90000000, 0x00204411, 0x000 },
2440 { 0x00000000, 0x00204805, 0x000 },
2441 { 0x0000000c, 0x00211622, 0x000 },
2442 { 0x00000003, 0x00281625, 0x000 },
2443 { 0x00000019, 0x00211a22, 0x000 },
2444 { 0x00000004, 0x00281a26, 0x000 },
2445 { 0x00000000, 0x002914c5, 0x000 },
2446 { 0x00000019, 0x00203625, 0x000 },
2447 { 0x00000000, 0x003a1402, 0x000 },
2448 { 0x00000016, 0x00211625, 0x000 },
2449 { 0x00000003, 0x00281625, 0x000 },
2450 { 0x00000017, 0x00200e2d, 0x000 },
2451 { 0xfffffffc, 0x00280e23, 0x000 },
2452 { 0x00000000, 0x002914a3, 0x000 },
2453 { 0x00000017, 0x00203625, 0x000 },
2454 { 0x00008000, 0x00280e22, 0x000 },
2455 { 0x00000007, 0x00220e23, 0x000 },
2456 { 0x00000000, 0x0029386e, 0x000 },
2457 { 0x20000000, 0x00280e22, 0x000 },
2458 { 0x00000006, 0x00210e23, 0x000 },
2459 { 0x00000000, 0x0029386e, 0x000 },
2460 { 0x00000000, 0x00220222, 0x000 },
2461 { 0x00000000, 0x14e00000, 0x038 },
2462 { 0x00000000, 0x2ee00000, 0x035 },
2463 { 0x00000000, 0x2ce00000, 0x037 },
2464 { 0x00000000, 0x00400e2d, 0x039 },
2465 { 0x00000008, 0x00200e2d, 0x000 },
2466 { 0x00000009, 0x0040122d, 0x046 },
2467 { 0x00000001, 0x00400e2d, 0x039 },
2468 { 0x00000000, 0xc0200c00, 0x000 },
2469 { 0x003ffffc, 0x00281223, 0x000 },
2470 { 0x00000002, 0x00221224, 0x000 },
2471 { 0x0000001f, 0x00211e23, 0x000 },
2472 { 0x00000000, 0x14e00000, 0x03e },
2473 { 0x00000008, 0x00401c11, 0x041 },
2474 { 0x0000000d, 0x00201e2d, 0x000 },
2475 { 0x0000000f, 0x00281e27, 0x000 },
2476 { 0x00000003, 0x00221e27, 0x000 },
2477 { 0x7fc00000, 0x00281a23, 0x000 },
2478 { 0x00000014, 0x00211a26, 0x000 },
2479 { 0x00000001, 0x00331a26, 0x000 },
2480 { 0x00000008, 0x00221a26, 0x000 },
2481 { 0x00000000, 0x00290cc7, 0x000 },
2482 { 0x00000027, 0x00203624, 0x000 },
2483 { 0x00007f00, 0x00281221, 0x000 },
2484 { 0x00001400, 0x002f0224, 0x000 },
2485 { 0x00000000, 0x0ce00000, 0x04b },
2486 { 0x00000001, 0x00290e23, 0x000 },
2487 { 0x0000000e, 0x00203623, 0x000 },
2488 { 0x0000e000, 0x00204411, 0x000 },
2489 { 0xfff80000, 0x00294a23, 0x000 },
2490 { 0x00000000, 0x003a2c02, 0x000 },
2491 { 0x00000002, 0x00220e2b, 0x000 },
2492 { 0xfc000000, 0x00280e23, 0x000 },
2493 { 0x0000000f, 0x00203623, 0x000 },
2494 { 0x00001fff, 0x00294a23, 0x000 },
2495 { 0x00000027, 0x00204a2d, 0x000 },
2496 { 0x00000000, 0x00204811, 0x000 },
2497 { 0x00000029, 0x00200e2d, 0x000 },
2498 { 0x060a0200, 0x00294a23, 0x000 },
2499 { 0x00000000, 0x00204811, 0x000 },
2500 { 0x00000000, 0x00204811, 0x000 },
2501 { 0x00000001, 0x00210222, 0x000 },
2502 { 0x00000000, 0x14e00000, 0x061 },
2503 { 0x00000000, 0x2ee00000, 0x05f },
2504 { 0x00000000, 0x2ce00000, 0x05e },
2505 { 0x00000000, 0x00400e2d, 0x062 },
2506 { 0x00000001, 0x00400e2d, 0x062 },
2507 { 0x0000000a, 0x00200e2d, 0x000 },
2508 { 0x0000000b, 0x0040122d, 0x06a },
2509 { 0x00000000, 0xc0200c00, 0x000 },
2510 { 0x003ffffc, 0x00281223, 0x000 },
2511 { 0x00000002, 0x00221224, 0x000 },
2512 { 0x7fc00000, 0x00281623, 0x000 },
2513 { 0x00000014, 0x00211625, 0x000 },
2514 { 0x00000001, 0x00331625, 0x000 },
2515 { 0x80000000, 0x00280e23, 0x000 },
2516 { 0x00000000, 0x00290ca3, 0x000 },
2517 { 0x3ffffc00, 0x00290e23, 0x000 },
2518 { 0x0000001f, 0x00211e23, 0x000 },
2519 { 0x00000000, 0x14e00000, 0x06d },
2520 { 0x00000100, 0x00401c11, 0x070 },
2521 { 0x0000000d, 0x00201e2d, 0x000 },
2522 { 0x000000f0, 0x00281e27, 0x000 },
2523 { 0x00000004, 0x00221e27, 0x000 },
2524 { 0x81000000, 0x00204411, 0x000 },
2525 { 0x0000000d, 0x00204811, 0x000 },
2526 { 0xfffff0ff, 0x00281a30, 0x000 },
2527 { 0x0000a028, 0x00204411, 0x000 },
2528 { 0x00000000, 0x002948e6, 0x000 },
2529 { 0x0000a018, 0x00204411, 0x000 },
2530 { 0x3fffffff, 0x00284a23, 0x000 },
2531 { 0x0000a010, 0x00204411, 0x000 },
2532 { 0x00000000, 0x00204804, 0x000 },
2533 { 0x00000030, 0x0020162d, 0x000 },
2534 { 0x00000002, 0x00291625, 0x000 },
2535 { 0x00000030, 0x00203625, 0x000 },
2536 { 0x00000025, 0x0020162d, 0x000 },
2537 { 0x00000000, 0x002f00a3, 0x000 },
2538 { 0x00000000, 0x0cc00000, 0x083 },
2539 { 0x00000026, 0x0020162d, 0x000 },
2540 { 0x00000000, 0x002f00a4, 0x000 },
2541 { 0x00000000, 0x0cc00000, 0x084 },
2542 { 0x00000000, 0x00400000, 0x08a },
2543 { 0x00000025, 0x00203623, 0x000 },
2544 { 0x00000026, 0x00203624, 0x000 },
2545 { 0x00000017, 0x00201e2d, 0x000 },
2546 { 0x00000002, 0x00210227, 0x000 },
2547 { 0x00000000, 0x14e00000, 0x08a },
2548 { 0x00000000, 0x00600000, 0x668 },
2549 { 0x00000000, 0x00600000, 0x65c },
2550 { 0x00000002, 0x00210e22, 0x000 },
2551 { 0x00000000, 0x14c00000, 0x08d },
2552 { 0x00000012, 0xc0403620, 0x093 },
2553 { 0x00000000, 0x2ee00000, 0x091 },
2554 { 0x00000000, 0x2ce00000, 0x090 },
2555 { 0x00000002, 0x00400e2d, 0x092 },
2556 { 0x00000003, 0x00400e2d, 0x092 },
2557 { 0x0000000c, 0x00200e2d, 0x000 },
2558 { 0x00000012, 0x00203623, 0x000 },
2559 { 0x00000003, 0x00210e22, 0x000 },
2560 { 0x00000000, 0x14c00000, 0x098 },
2561 { 0x0000a00c, 0x00204411, 0x000 },
2562 { 0x00000000, 0xc0204800, 0x000 },
2563 { 0x00000000, 0xc0404800, 0x0a0 },
2564 { 0x0000a00c, 0x00204411, 0x000 },
2565 { 0x00000000, 0x00204811, 0x000 },
2566 { 0x00000000, 0x2ee00000, 0x09e },
2567 { 0x00000000, 0x2ce00000, 0x09d },
2568 { 0x00000002, 0x00400e2d, 0x09f },
2569 { 0x00000003, 0x00400e2d, 0x09f },
2570 { 0x0000000c, 0x00200e2d, 0x000 },
2571 { 0x00000000, 0x00204803, 0x000 },
2572 { 0x00000000, 0x003a0c02, 0x000 },
2573 { 0x003f0000, 0x00280e23, 0x000 },
2574 { 0x00000010, 0x00210e23, 0x000 },
2575 { 0x00000011, 0x00203623, 0x000 },
2576 { 0x0000001e, 0x0021022b, 0x000 },
2577 { 0x00000000, 0x14c00000, 0x0a7 },
2578 { 0x00000016, 0xc0203620, 0x000 },
2579 { 0x0000001f, 0x0021022b, 0x000 },
2580 { 0x00000000, 0x14c00000, 0x0aa },
2581 { 0x00000015, 0xc0203620, 0x000 },
2582 { 0x00000008, 0x00210e2b, 0x000 },
2583 { 0x0000007f, 0x00280e23, 0x000 },
2584 { 0x00000000, 0x002f0223, 0x000 },
2585 { 0x00000000, 0x0ce00000, 0x0e1 },
2586 { 0x00000000, 0x27000000, 0x000 },
2587 { 0x00000000, 0x00600000, 0x2a3 },
2588 { 0x00000001, 0x002f0223, 0x000 },
2589 { 0x00000000, 0x0ae00000, 0x0b3 },
2590 { 0x00000000, 0x00600000, 0x13a },
2591 { 0x81000000, 0x00204411, 0x000 },
2592 { 0x00000006, 0x00204811, 0x000 },
2593 { 0x0000000c, 0x00221e30, 0x000 },
2594 { 0x99800000, 0x00204411, 0x000 },
2595 { 0x00000004, 0x0020122d, 0x000 },
2596 { 0x00000008, 0x00221224, 0x000 },
2597 { 0x00000010, 0x00201811, 0x000 },
2598 { 0x00000000, 0x00291ce4, 0x000 },
2599 { 0x00000000, 0x00604807, 0x12f },
2600 { 0x9b000000, 0x00204411, 0x000 },
2601 { 0x00000000, 0x00204802, 0x000 },
2602 { 0x9c000000, 0x00204411, 0x000 },
2603 { 0x00000000, 0x0033146f, 0x000 },
2604 { 0x00000001, 0x00333e23, 0x000 },
2605 { 0x00000000, 0xd9004800, 0x000 },
2606 { 0x00000000, 0x00203c05, 0x000 },
2607 { 0x81000000, 0x00204411, 0x000 },
2608 { 0x0000000e, 0x00204811, 0x000 },
2609 { 0x00000000, 0x00201010, 0x000 },
2610 { 0x0000e007, 0x00204411, 0x000 },
2611 { 0x0000000f, 0x0021022b, 0x000 },
2612 { 0x00000000, 0x14c00000, 0x0cb },
2613 { 0x00f8ff08, 0x00204811, 0x000 },
2614 { 0x98000000, 0x00404811, 0x0dc },
2615 { 0x000000f0, 0x00280e22, 0x000 },
2616 { 0x000000a0, 0x002f0223, 0x000 },
2617 { 0x00000000, 0x0cc00000, 0x0da },
2618 { 0x00000011, 0x00200e2d, 0x000 },
2619 { 0x00000001, 0x002f0223, 0x000 },
2620 { 0x00000000, 0x0ce00000, 0x0d5 },
2621 { 0x00000002, 0x002f0223, 0x000 },
2622 { 0x00000000, 0x0ce00000, 0x0d4 },
2623 { 0x00003f00, 0x00400c11, 0x0d6 },
2624 { 0x00001f00, 0x00400c11, 0x0d6 },
2625 { 0x00000f00, 0x00200c11, 0x000 },
2626 { 0x00380009, 0x00294a23, 0x000 },
2627 { 0x3f000000, 0x00280e2b, 0x000 },
2628 { 0x00000002, 0x00220e23, 0x000 },
2629 { 0x00000007, 0x00494a23, 0x0dc },
2630 { 0x00380f09, 0x00204811, 0x000 },
2631 { 0x68000007, 0x00204811, 0x000 },
2632 { 0x00000008, 0x00214a27, 0x000 },
2633 { 0x00000000, 0x00204811, 0x000 },
2634 { 0x060a0200, 0x00294a24, 0x000 },
2635 { 0x00000000, 0x00204811, 0x000 },
2636 { 0x00000000, 0x00204811, 0x000 },
2637 { 0x0000a202, 0x00204411, 0x000 },
2638 { 0x00ff0000, 0x00280e22, 0x000 },
2639 { 0x00000080, 0x00294a23, 0x000 },
2640 { 0x00000027, 0x00200e2d, 0x000 },
2641 { 0x00000026, 0x0020122d, 0x000 },
2642 { 0x00000000, 0x002f0083, 0x000 },
2643 { 0x00000000, 0x0ce00000, 0x0ea },
2644 { 0x00000000, 0x00600000, 0x662 },
2645 { 0x00000000, 0x00400000, 0x0eb },
2646 { 0x00000000, 0x00600000, 0x665 },
2647 { 0x00000007, 0x0020222d, 0x000 },
2648 { 0x00000005, 0x00220e22, 0x000 },
2649 { 0x00100000, 0x00280e23, 0x000 },
2650 { 0x00000000, 0x00292068, 0x000 },
2651 { 0x00000000, 0x003a0c02, 0x000 },
2652 { 0x000000ef, 0x00280e23, 0x000 },
2653 { 0x00000000, 0x00292068, 0x000 },
2654 { 0x00000017, 0x00200e2d, 0x000 },
2655 { 0x00000003, 0x00210223, 0x000 },
2656 { 0x00000000, 0x14e00000, 0x0f8 },
2657 { 0x0000000b, 0x00210228, 0x000 },
2658 { 0x00000000, 0x14c00000, 0x0f8 },
2659 { 0x00000400, 0x00292228, 0x000 },
2660 { 0x00000014, 0x00203628, 0x000 },
2661 { 0x0000001c, 0x00210e22, 0x000 },
2662 { 0x00000000, 0x14c00000, 0x0fd },
2663 { 0x0000a30c, 0x00204411, 0x000 },
2664 { 0x00000000, 0x00204811, 0x000 },
2665 { 0x0000001e, 0x00210e22, 0x000 },
2666 { 0x00000000, 0x14c00000, 0x10b },
2667 { 0x0000a30f, 0x00204411, 0x000 },
2668 { 0x00000011, 0x00200e2d, 0x000 },
2669 { 0x00000001, 0x002f0223, 0x000 },
2670 { 0x00000000, 0x0cc00000, 0x104 },
2671 { 0xffffffff, 0x00404811, 0x10b },
2672 { 0x00000002, 0x002f0223, 0x000 },
2673 { 0x00000000, 0x0cc00000, 0x107 },
2674 { 0x0000ffff, 0x00404811, 0x10b },
2675 { 0x00000004, 0x002f0223, 0x000 },
2676 { 0x00000000, 0x0cc00000, 0x10a },
2677 { 0x000000ff, 0x00404811, 0x10b },
2678 { 0x00000001, 0x00204811, 0x000 },
2679 { 0x0002c400, 0x00204411, 0x000 },
2680 { 0x0000001f, 0x00210e22, 0x000 },
2681 { 0x00000000, 0x14c00000, 0x112 },
2682 { 0x00000010, 0x40210e20, 0x000 },
2683 { 0x00000013, 0x00203623, 0x000 },
2684 { 0x00000018, 0x40224a20, 0x000 },
2685 { 0x00000010, 0xc0424a20, 0x114 },
2686 { 0x00000000, 0x00200c11, 0x000 },
2687 { 0x00000013, 0x00203623, 0x000 },
2688 { 0x00000000, 0x00204811, 0x000 },
2689 { 0x00000000, 0x00204811, 0x000 },
2690 { 0x0000000a, 0x00201011, 0x000 },
2691 { 0x00000000, 0x002f0224, 0x000 },
2692 { 0x00000000, 0x0ce00000, 0x11b },
2693 { 0x00000000, 0x00204811, 0x000 },
2694 { 0x00000001, 0x00531224, 0x117 },
2695 { 0xffbfffff, 0x00283a2e, 0x000 },
2696 { 0x0000001b, 0x00210222, 0x000 },
2697 { 0x00000000, 0x14c00000, 0x12e },
2698 { 0x81000000, 0x00204411, 0x000 },
2699 { 0x0000000d, 0x00204811, 0x000 },
2700 { 0x00000018, 0x00220e30, 0x000 },
2701 { 0xfc000000, 0x00280e23, 0x000 },
2702 { 0x81000000, 0x00204411, 0x000 },
2703 { 0x0000000e, 0x00204811, 0x000 },
2704 { 0x00000000, 0x00201010, 0x000 },
2705 { 0x0000e00e, 0x00204411, 0x000 },
2706 { 0x07f8ff08, 0x00204811, 0x000 },
2707 { 0x00000000, 0x00294a23, 0x000 },
2708 { 0x0000001c, 0x00201e2d, 0x000 },
2709 { 0x00000008, 0x00214a27, 0x000 },
2710 { 0x00000000, 0x00204811, 0x000 },
2711 { 0x060a0200, 0x00294a24, 0x000 },
2712 { 0x00000000, 0x00204811, 0x000 },
2713 { 0x00000000, 0x00204811, 0x000 },
2714 { 0x00000000, 0x00800000, 0x000 },
2715 { 0x81000000, 0x00204411, 0x000 },
2716 { 0x00000001, 0x00204811, 0x000 },
2717 { 0x0000217c, 0x00204411, 0x000 },
2718 { 0x00800000, 0x00204811, 0x000 },
2719 { 0x00000000, 0x00204806, 0x000 },
2720 { 0x00000008, 0x00214a27, 0x000 },
2721 { 0x00000000, 0x17000000, 0x000 },
2722 { 0x0004217f, 0x00604411, 0x68d },
2723 { 0x0000001f, 0x00210230, 0x000 },
2724 { 0x00000000, 0x14c00000, 0x68c },
2725 { 0x00000004, 0x00404c11, 0x135 },
2726 { 0x81000000, 0x00204411, 0x000 },
2727 { 0x00000001, 0x00204811, 0x000 },
2728 { 0x000021f8, 0x00204411, 0x000 },
2729 { 0x0000001c, 0x00204811, 0x000 },
2730 { 0x000421f9, 0x00604411, 0x68d },
2731 { 0x00000011, 0x00210230, 0x000 },
2732 { 0x00000000, 0x14e00000, 0x13c },
2733 { 0x00000000, 0x00800000, 0x000 },
2734 { 0x00000000, 0x00600000, 0x00b },
2735 { 0x00000000, 0x00600411, 0x315 },
2736 { 0x00000000, 0x00200411, 0x000 },
2737 { 0x00000000, 0x00600811, 0x1b2 },
2738 { 0x00000000, 0x00600000, 0x160 },
2739 { 0x0000ffff, 0x40280e20, 0x000 },
2740 { 0x00000010, 0xc0211220, 0x000 },
2741 { 0x0000ffff, 0x40280620, 0x000 },
2742 { 0x00000010, 0xc0210a20, 0x000 },
2743 { 0x00000000, 0x00341461, 0x000 },
2744 { 0x00000000, 0x00741882, 0x2bb },
2745 { 0x0001a1fd, 0x00604411, 0x2e0 },
2746 { 0x00003fff, 0x002f022f, 0x000 },
2747 { 0x00000000, 0x0cc00000, 0x147 },
2748 { 0x00000000, 0xc0400400, 0x001 },
2749 { 0x00000000, 0x00600000, 0x00b },
2750 { 0x00000000, 0x00600411, 0x315 },
2751 { 0x00000000, 0x00200411, 0x000 },
2752 { 0x00000000, 0x00600811, 0x1b2 },
2753 { 0x00003fff, 0x002f022f, 0x000 },
2754 { 0x00000000, 0x0ce00000, 0x000 },
2755 { 0x00000000, 0x00600000, 0x160 },
2756 { 0x00000010, 0x40210e20, 0x000 },
2757 { 0x0000ffff, 0xc0281220, 0x000 },
2758 { 0x00000010, 0x40211620, 0x000 },
2759 { 0x0000ffff, 0xc0681a20, 0x2bb },
2760 { 0x0001a1fd, 0x00604411, 0x2e0 },
2761 { 0x00003fff, 0x002f022f, 0x000 },
2762 { 0x00000000, 0x0cc00000, 0x158 },
2763 { 0x00000000, 0xc0400400, 0x001 },
2764 { 0x0000225c, 0x00204411, 0x000 },
2765 { 0x00000001, 0x00300a2f, 0x000 },
2766 { 0x00000001, 0x00210a22, 0x000 },
2767 { 0x00000003, 0x00384a22, 0x000 },
2768 { 0x00002256, 0x00204411, 0x000 },
2769 { 0x0000001a, 0x00204811, 0x000 },
2770 { 0x0000a1fc, 0x00204411, 0x000 },
2771 { 0x00000001, 0x00804811, 0x000 },
2772 { 0x00000000, 0x00600000, 0x00b },
2773 { 0x00000000, 0x00600000, 0x18f },
2774 { 0x00000000, 0x00600000, 0x1a0 },
2775 { 0x00003fff, 0x002f022f, 0x000 },
2776 { 0x00000000, 0x0ce00000, 0x000 },
2777 { 0x00000000, 0x00202c08, 0x000 },
2778 { 0x00000000, 0x00202411, 0x000 },
2779 { 0x00000000, 0x00202811, 0x000 },
2780 { 0x00002256, 0x00204411, 0x000 },
2781 { 0x00000016, 0x00204811, 0x000 },
2782 { 0x0000225c, 0x00204411, 0x000 },
2783 { 0x00000003, 0x00204811, 0x000 },
2784 { 0x93800000, 0x00204411, 0x000 },
2785 { 0x00000002, 0x00221e29, 0x000 },
2786 { 0x00000000, 0x007048eb, 0x19c },
2787 { 0x00000000, 0x00600000, 0x2bb },
2788 { 0x00000001, 0x40330620, 0x000 },
2789 { 0x00000000, 0xc0302409, 0x000 },
2790 { 0x00003fff, 0x002f022f, 0x000 },
2791 { 0x00000000, 0x0ce00000, 0x000 },
2792 { 0x00000000, 0x00600000, 0x2a3 },
2793 { 0x00000000, 0x002f0221, 0x000 },
2794 { 0x00000000, 0x0ae00000, 0x181 },
2795 { 0x00000000, 0x00600000, 0x13a },
2796 { 0x00000000, 0x00400000, 0x186 },
2797 { 0x95000000, 0x00204411, 0x000 },
2798 { 0x00000000, 0x002f0221, 0x000 },
2799 { 0x00000000, 0x0ce00000, 0x186 },
2800 { 0x00000000, 0xc0204800, 0x000 },
2801 { 0x00000001, 0x00530621, 0x182 },
2802 { 0x92000000, 0x00204411, 0x000 },
2803 { 0x00000000, 0xc0604800, 0x197 },
2804 { 0x0001a1fd, 0x00204411, 0x000 },
2805 { 0x00000011, 0x0020062d, 0x000 },
2806 { 0x00000000, 0x0078042a, 0x2fb },
2807 { 0x00000000, 0x00202809, 0x000 },
2808 { 0x00003fff, 0x002f022f, 0x000 },
2809 { 0x00000000, 0x0cc00000, 0x174 },
2810 { 0x00000000, 0xc0400400, 0x001 },
2811 { 0x00000210, 0x00600411, 0x315 },
2812 { 0x00003fff, 0x002f022f, 0x000 },
2813 { 0x00000000, 0x0ce00000, 0x194 },
2814 { 0x00000015, 0xc0203620, 0x000 },
2815 { 0x00000016, 0xc0203620, 0x000 },
2816 { 0x3f800000, 0x00200411, 0x000 },
2817 { 0x46000000, 0x00600811, 0x1b2 },
2818 { 0x00000000, 0x00800000, 0x000 },
2819 { 0x0000a1fc, 0x00204411, 0x000 },
2820 { 0x00003fff, 0x002f022f, 0x000 },
2821 { 0x00000000, 0x0cc00000, 0x19b },
2822 { 0x00000001, 0x00804811, 0x000 },
2823 { 0x00000021, 0x00804811, 0x000 },
2824 { 0x0000ffff, 0x40280e20, 0x000 },
2825 { 0x00000010, 0xc0211220, 0x000 },
2826 { 0x0000ffff, 0x40281620, 0x000 },
2827 { 0x00000010, 0xc0811a20, 0x000 },
2828 { 0x81000000, 0x00204411, 0x000 },
2829 { 0x00000006, 0x00204811, 0x000 },
2830 { 0x00000008, 0x00221e30, 0x000 },
2831 { 0x00000029, 0x00201a2d, 0x000 },
2832 { 0x0000e000, 0x00204411, 0x000 },
2833 { 0xfffbff09, 0x00204811, 0x000 },
2834 { 0x0000000f, 0x0020222d, 0x000 },
2835 { 0x00001fff, 0x00294a28, 0x000 },
2836 { 0x00000006, 0x0020222d, 0x000 },
2837 { 0x00000000, 0x002920e8, 0x000 },
2838 { 0x00000000, 0x00204808, 0x000 },
2839 { 0x00000000, 0x00204811, 0x000 },
2840 { 0x060a0200, 0x00294a26, 0x000 },
2841 { 0x00000000, 0x00204811, 0x000 },
2842 { 0x00000000, 0x00204811, 0x000 },
2843 { 0x00000100, 0x00201811, 0x000 },
2844 { 0x00000008, 0x00621e28, 0x12f },
2845 { 0x00000008, 0x00822228, 0x000 },
2846 { 0x0002c000, 0x00204411, 0x000 },
2847 { 0x00000015, 0x00600e2d, 0x1bd },
2848 { 0x00000016, 0x00600e2d, 0x1bd },
2849 { 0x0000c008, 0x00204411, 0x000 },
2850 { 0x00000017, 0x00200e2d, 0x000 },
2851 { 0x00000000, 0x14c00000, 0x1b9 },
2852 { 0x00000000, 0x00200411, 0x000 },
2853 { 0x00000000, 0x00204801, 0x000 },
2854 { 0x39000000, 0x00204811, 0x000 },
2855 { 0x00000000, 0x00204811, 0x000 },
2856 { 0x00000000, 0x00804802, 0x000 },
2857 { 0x00000018, 0x00202e2d, 0x000 },
2858 { 0x00000000, 0x003b0d63, 0x000 },
2859 { 0x00000008, 0x00224a23, 0x000 },
2860 { 0x00000010, 0x00224a23, 0x000 },
2861 { 0x00000018, 0x00224a23, 0x000 },
2862 { 0x00000000, 0x00804803, 0x000 },
2863 { 0x00000000, 0x00600000, 0x00b },
2864 { 0x00001000, 0x00600411, 0x315 },
2865 { 0x00000000, 0x00200411, 0x000 },
2866 { 0x00000000, 0x00600811, 0x1b2 },
2867 { 0x00000007, 0x0021062f, 0x000 },
2868 { 0x00000013, 0x00200a2d, 0x000 },
2869 { 0x00000001, 0x00202c11, 0x000 },
2870 { 0x0000ffff, 0x40282220, 0x000 },
2871 { 0x0000000f, 0x00262228, 0x000 },
2872 { 0x00000010, 0x40212620, 0x000 },
2873 { 0x0000000f, 0x00262629, 0x000 },
2874 { 0x00000000, 0x00202802, 0x000 },
2875 { 0x00002256, 0x00204411, 0x000 },
2876 { 0x0000001b, 0x00204811, 0x000 },
2877 { 0x00000000, 0x002f0221, 0x000 },
2878 { 0x00000000, 0x0ce00000, 0x1e0 },
2879 { 0x0000225c, 0x00204411, 0x000 },
2880 { 0x00000081, 0x00204811, 0x000 },
2881 { 0x0000a1fc, 0x00204411, 0x000 },
2882 { 0x00000001, 0x00204811, 0x000 },
2883 { 0x00000080, 0x00201c11, 0x000 },
2884 { 0x00000000, 0x002f0227, 0x000 },
2885 { 0x00000000, 0x0ce00000, 0x1dc },
2886 { 0x00000000, 0x00600000, 0x1e9 },
2887 { 0x00000001, 0x00531e27, 0x1d8 },
2888 { 0x00000001, 0x00202c11, 0x000 },
2889 { 0x0000001f, 0x00280a22, 0x000 },
2890 { 0x0000001f, 0x00282a2a, 0x000 },
2891 { 0x00000001, 0x00530621, 0x1d1 },
2892 { 0x0000225c, 0x00204411, 0x000 },
2893 { 0x00000002, 0x00304a2f, 0x000 },
2894 { 0x0000a1fc, 0x00204411, 0x000 },
2895 { 0x00000001, 0x00204811, 0x000 },
2896 { 0x00000001, 0x00301e2f, 0x000 },
2897 { 0x00000000, 0x002f0227, 0x000 },
2898 { 0x00000000, 0x0ce00000, 0x000 },
2899 { 0x00000000, 0x00600000, 0x1e9 },
2900 { 0x00000001, 0x00531e27, 0x1e5 },
2901 { 0x0000ffff, 0x40280e20, 0x000 },
2902 { 0x0000000f, 0x00260e23, 0x000 },
2903 { 0x00000010, 0xc0211220, 0x000 },
2904 { 0x0000000f, 0x00261224, 0x000 },
2905 { 0x00000000, 0x00201411, 0x000 },
2906 { 0x00000000, 0x00601811, 0x2bb },
2907 { 0x0001a1fd, 0x00204411, 0x000 },
2908 { 0x00000000, 0x002f022b, 0x000 },
2909 { 0x00000000, 0x0ce00000, 0x1f8 },
2910 { 0x00000010, 0x00221628, 0x000 },
2911 { 0xffff0000, 0x00281625, 0x000 },
2912 { 0x0000ffff, 0x00281a29, 0x000 },
2913 { 0x00000000, 0x002948c5, 0x000 },
2914 { 0x00000000, 0x0020480a, 0x000 },
2915 { 0x00000000, 0x00202c11, 0x000 },
2916 { 0x00000010, 0x00221623, 0x000 },
2917 { 0xffff0000, 0x00281625, 0x000 },
2918 { 0x0000ffff, 0x00281a24, 0x000 },
2919 { 0x00000000, 0x002948c5, 0x000 },
2920 { 0x00000000, 0x00731503, 0x205 },
2921 { 0x00000000, 0x00201805, 0x000 },
2922 { 0x00000000, 0x00731524, 0x205 },
2923 { 0x00000000, 0x002d14c5, 0x000 },
2924 { 0x00000000, 0x003008a2, 0x000 },
2925 { 0x00000000, 0x00204802, 0x000 },
2926 { 0x00000000, 0x00202802, 0x000 },
2927 { 0x00000000, 0x00202003, 0x000 },
2928 { 0x00000000, 0x00802404, 0x000 },
2929 { 0x0000000f, 0x00210225, 0x000 },
2930 { 0x00000000, 0x14c00000, 0x68c },
2931 { 0x00000000, 0x002b1405, 0x000 },
2932 { 0x00000001, 0x00901625, 0x000 },
2933 { 0x00000000, 0x00600000, 0x00b },
2934 { 0x00000000, 0x00600411, 0x315 },
2935 { 0x00000000, 0x00200411, 0x000 },
2936 { 0x00000000, 0x00600811, 0x1b2 },
2937 { 0x00002256, 0x00204411, 0x000 },
2938 { 0x0000001a, 0x00294a22, 0x000 },
2939 { 0x00000000, 0xc0200000, 0x000 },
2940 { 0x00003fff, 0x002f022f, 0x000 },
2941 { 0x00000000, 0x0ce00000, 0x000 },
2942 { 0x00000000, 0xc0200400, 0x000 },
2943 { 0x0000225c, 0x00204411, 0x000 },
2944 { 0x00000003, 0x00384a21, 0x000 },
2945 { 0x0000a1fc, 0x00204411, 0x000 },
2946 { 0x00000001, 0x00204811, 0x000 },
2947 { 0x0000ffff, 0x40281220, 0x000 },
2948 { 0x00000010, 0xc0211a20, 0x000 },
2949 { 0x0000ffff, 0x40280e20, 0x000 },
2950 { 0x00000010, 0xc0211620, 0x000 },
2951 { 0x00000000, 0x00741465, 0x2bb },
2952 { 0x0001a1fd, 0x00604411, 0x2e0 },
2953 { 0x00000001, 0x00330621, 0x000 },
2954 { 0x00000000, 0x002f0221, 0x000 },
2955 { 0x00000000, 0x0cc00000, 0x219 },
2956 { 0x00003fff, 0x002f022f, 0x000 },
2957 { 0x00000000, 0x0cc00000, 0x212 },
2958 { 0x00000000, 0xc0400400, 0x001 },
2959 { 0x00000000, 0x00600000, 0x645 },
2960 { 0x00000000, 0x0040040f, 0x213 },
2961 { 0x00000000, 0x00600000, 0x631 },
2962 { 0x00000000, 0x00600000, 0x645 },
2963 { 0x00000210, 0x00600411, 0x315 },
2964 { 0x00000000, 0x00600000, 0x1a0 },
2965 { 0x00000000, 0x00600000, 0x19c },
2966 { 0x00000000, 0x00600000, 0x2bb },
2967 { 0x00000000, 0x00600000, 0x2a3 },
2968 { 0x93800000, 0x00204411, 0x000 },
2969 { 0x00000000, 0x00204808, 0x000 },
2970 { 0x00000000, 0x002f022f, 0x000 },
2971 { 0x00000000, 0x0ae00000, 0x232 },
2972 { 0x00000000, 0x00600000, 0x13a },
2973 { 0x00000000, 0x00400000, 0x236 },
2974 { 0x95000000, 0x00204411, 0x000 },
2975 { 0x00000000, 0x002f022f, 0x000 },
2976 { 0x00000000, 0x0ce00000, 0x236 },
2977 { 0x00000000, 0xc0404800, 0x233 },
2978 { 0x92000000, 0x00204411, 0x000 },
2979 { 0x00000000, 0xc0204800, 0x000 },
2980 { 0x00002256, 0x00204411, 0x000 },
2981 { 0x00000016, 0x00204811, 0x000 },
2982 { 0x0000225c, 0x00204411, 0x000 },
2983 { 0x00000003, 0x00204811, 0x000 },
2984 { 0x0000a1fc, 0x00204411, 0x000 },
2985 { 0x00000001, 0x00204811, 0x000 },
2986 { 0x0001a1fd, 0x00204411, 0x000 },
2987 { 0x00000000, 0x00600411, 0x2fb },
2988 { 0x00000000, 0xc0400400, 0x001 },
2989 { 0x00000000, 0x00600000, 0x631 },
2990 { 0x0000a00c, 0x00204411, 0x000 },
2991 { 0x00000000, 0xc0204800, 0x000 },
2992 { 0x00000000, 0xc0404800, 0x000 },
2993 { 0x00000000, 0x00600000, 0x00b },
2994 { 0x00000018, 0x40210a20, 0x000 },
2995 { 0x00000003, 0x002f0222, 0x000 },
2996 { 0x00000000, 0x0ae00000, 0x24c },
2997 { 0x00000014, 0x0020222d, 0x000 },
2998 { 0x00080101, 0x00292228, 0x000 },
2999 { 0x00000014, 0x00203628, 0x000 },
3000 { 0x0000a30c, 0x00204411, 0x000 },
3001 { 0x00000000, 0xc0204800, 0x000 },
3002 { 0x00000000, 0xc0204800, 0x000 },
3003 { 0x00000000, 0xc0404800, 0x251 },
3004 { 0x00000000, 0x00600000, 0x00b },
3005 { 0x00000010, 0x00600411, 0x315 },
3006 { 0x3f800000, 0x00200411, 0x000 },
3007 { 0x00000000, 0x00600811, 0x1b2 },
3008 { 0x0000225c, 0x00204411, 0x000 },
3009 { 0x00000003, 0x00204811, 0x000 },
3010 { 0x00000000, 0x00600000, 0x27c },
3011 { 0x00000017, 0x00201e2d, 0x000 },
3012 { 0x00000001, 0x00211e27, 0x000 },
3013 { 0x00000000, 0x14e00000, 0x26a },
3014 { 0x00000012, 0x00201e2d, 0x000 },
3015 { 0x0000ffff, 0x00281e27, 0x000 },
3016 { 0x00000000, 0x00341c27, 0x000 },
3017 { 0x00000000, 0x12c00000, 0x25f },
3018 { 0x00000000, 0x00201c11, 0x000 },
3019 { 0x00000000, 0x002f00e5, 0x000 },
3020 { 0x00000000, 0x08c00000, 0x262 },
3021 { 0x00000000, 0x00201407, 0x000 },
3022 { 0x00000012, 0x00201e2d, 0x000 },
3023 { 0x00000010, 0x00211e27, 0x000 },
3024 { 0x00000000, 0x00341c47, 0x000 },
3025 { 0x00000000, 0x12c00000, 0x267 },
3026 { 0x00000000, 0x00201c11, 0x000 },
3027 { 0x00000000, 0x002f00e6, 0x000 },
3028 { 0x00000000, 0x08c00000, 0x26a },
3029 { 0x00000000, 0x00201807, 0x000 },
3030 { 0x00000000, 0x00600000, 0x2c1 },
3031 { 0x00002256, 0x00204411, 0x000 },
3032 { 0x00000000, 0x00342023, 0x000 },
3033 { 0x00000000, 0x12c00000, 0x272 },
3034 { 0x00000000, 0x00342044, 0x000 },
3035 { 0x00000000, 0x12c00000, 0x271 },
3036 { 0x00000016, 0x00404811, 0x276 },
3037 { 0x00000018, 0x00404811, 0x276 },
3038 { 0x00000000, 0x00342044, 0x000 },
3039 { 0x00000000, 0x12c00000, 0x275 },
3040 { 0x00000017, 0x00404811, 0x276 },
3041 { 0x00000019, 0x00204811, 0x000 },
3042 { 0x0000a1fc, 0x00204411, 0x000 },
3043 { 0x00000001, 0x00204811, 0x000 },
3044 { 0x0001a1fd, 0x00604411, 0x2e9 },
3045 { 0x00003fff, 0x002f022f, 0x000 },
3046 { 0x00000000, 0x0cc00000, 0x256 },
3047 { 0x00000000, 0xc0400400, 0x001 },
3048 { 0x00000010, 0x40210620, 0x000 },
3049 { 0x0000ffff, 0xc0280a20, 0x000 },
3050 { 0x00000010, 0x40210e20, 0x000 },
3051 { 0x0000ffff, 0xc0281220, 0x000 },
3052 { 0x00000010, 0x40211620, 0x000 },
3053 { 0x0000ffff, 0xc0881a20, 0x000 },
3054 { 0x81000000, 0x00204411, 0x000 },
3055 { 0x00000001, 0x00204811, 0x000 },
3056 { 0x00042004, 0x00604411, 0x68d },
3057 { 0x00000000, 0x00600000, 0x631 },
3058 { 0x00000000, 0xc0600000, 0x2a3 },
3059 { 0x00000005, 0x00200a2d, 0x000 },
3060 { 0x00000008, 0x00220a22, 0x000 },
3061 { 0x0000002b, 0x00201a2d, 0x000 },
3062 { 0x0000001c, 0x00201e2d, 0x000 },
3063 { 0x00007000, 0x00281e27, 0x000 },
3064 { 0x00000000, 0x00311ce6, 0x000 },
3065 { 0x0000002a, 0x00201a2d, 0x000 },
3066 { 0x0000000c, 0x00221a26, 0x000 },
3067 { 0x00000000, 0x002f00e6, 0x000 },
3068 { 0x00000000, 0x06e00000, 0x292 },
3069 { 0x00000000, 0x00201c11, 0x000 },
3070 { 0x00000000, 0x00200c11, 0x000 },
3071 { 0x0000002b, 0x00203623, 0x000 },
3072 { 0x00000010, 0x00201811, 0x000 },
3073 { 0x00000000, 0x00691ce2, 0x12f },
3074 { 0x93800000, 0x00204411, 0x000 },
3075 { 0x00000000, 0x00204807, 0x000 },
3076 { 0x95000000, 0x00204411, 0x000 },
3077 { 0x00000000, 0x002f022f, 0x000 },
3078 { 0x00000000, 0x0ce00000, 0x29d },
3079 { 0x00000001, 0x00333e2f, 0x000 },
3080 { 0x00000000, 0xd9004800, 0x000 },
3081 { 0x92000000, 0x00204411, 0x000 },
3082 { 0x00000000, 0xc0204800, 0x000 },
3083 { 0x0000001c, 0x00403627, 0x000 },
3084 { 0x0000000c, 0xc0220a20, 0x000 },
3085 { 0x00000029, 0x00203622, 0x000 },
3086 { 0x00000028, 0xc0403620, 0x000 },
3087 { 0x0000a2a4, 0x00204411, 0x000 },
3088 { 0x00000009, 0x00204811, 0x000 },
3089 { 0xa1000000, 0x00204411, 0x000 },
3090 { 0x00000001, 0x00804811, 0x000 },
3091 { 0x00000021, 0x00201e2d, 0x000 },
3092 { 0x00000000, 0x002c1ce3, 0x000 },
3093 { 0x00000021, 0x00203627, 0x000 },
3094 { 0x00000022, 0x00201e2d, 0x000 },
3095 { 0x00000000, 0x002c1ce4, 0x000 },
3096 { 0x00000022, 0x00203627, 0x000 },
3097 { 0x00000023, 0x00201e2d, 0x000 },
3098 { 0x00000000, 0x003120a3, 0x000 },
3099 { 0x00000000, 0x002d1d07, 0x000 },
3100 { 0x00000023, 0x00203627, 0x000 },
3101 { 0x00000024, 0x00201e2d, 0x000 },
3102 { 0x00000000, 0x003120c4, 0x000 },
3103 { 0x00000000, 0x002d1d07, 0x000 },
3104 { 0x00000024, 0x00803627, 0x000 },
3105 { 0x00000021, 0x00203623, 0x000 },
3106 { 0x00000022, 0x00203624, 0x000 },
3107 { 0x00000000, 0x00311ca3, 0x000 },
3108 { 0x00000023, 0x00203627, 0x000 },
3109 { 0x00000000, 0x00311cc4, 0x000 },
3110 { 0x00000024, 0x00803627, 0x000 },
3111 { 0x0000001a, 0x00203627, 0x000 },
3112 { 0x0000001b, 0x00203628, 0x000 },
3113 { 0x00000017, 0x00201e2d, 0x000 },
3114 { 0x00000002, 0x00210227, 0x000 },
3115 { 0x00000000, 0x14c00000, 0x2dc },
3116 { 0x00000000, 0x00400000, 0x2d9 },
3117 { 0x0000001a, 0x00203627, 0x000 },
3118 { 0x0000001b, 0x00203628, 0x000 },
3119 { 0x00000017, 0x00201e2d, 0x000 },
3120 { 0x00000002, 0x00210227, 0x000 },
3121 { 0x00000000, 0x14e00000, 0x2d9 },
3122 { 0x00000003, 0x00210227, 0x000 },
3123 { 0x00000000, 0x14e00000, 0x2dc },
3124 { 0x00000023, 0x00201e2d, 0x000 },
3125 { 0x00000000, 0x002e00e1, 0x000 },
3126 { 0x00000000, 0x02c00000, 0x2dc },
3127 { 0x00000021, 0x00201e2d, 0x000 },
3128 { 0x00000000, 0x003120a1, 0x000 },
3129 { 0x00000000, 0x002e00e8, 0x000 },
3130 { 0x00000000, 0x06c00000, 0x2dc },
3131 { 0x00000024, 0x00201e2d, 0x000 },
3132 { 0x00000000, 0x002e00e2, 0x000 },
3133 { 0x00000000, 0x02c00000, 0x2dc },
3134 { 0x00000022, 0x00201e2d, 0x000 },
3135 { 0x00000000, 0x003120c2, 0x000 },
3136 { 0x00000000, 0x002e00e8, 0x000 },
3137 { 0x00000000, 0x06c00000, 0x2dc },
3138 { 0x00000000, 0x00600000, 0x668 },
3139 { 0x00000000, 0x00600000, 0x2b5 },
3140 { 0x00000000, 0x00400000, 0x2de },
3141 { 0x00000000, 0x00600000, 0x2b5 },
3142 { 0x00000000, 0x00600000, 0x65f },
3143 { 0x00000000, 0x00400000, 0x2de },
3144 { 0x00000000, 0x00600000, 0x2a7 },
3145 { 0x00000000, 0x00400000, 0x2de },
3146 { 0x0000001a, 0x00201e2d, 0x000 },
3147 { 0x0000001b, 0x0080222d, 0x000 },
3148 { 0x00000010, 0x00221e23, 0x000 },
3149 { 0x00000000, 0x00294887, 0x000 },
3150 { 0x00000000, 0x00311ca3, 0x000 },
3151 { 0x00000010, 0x00221e27, 0x000 },
3152 { 0x00000000, 0x00294887, 0x000 },
3153 { 0x00000010, 0x00221e23, 0x000 },
3154 { 0x00000000, 0x003120c4, 0x000 },
3155 { 0x0000ffff, 0x00282228, 0x000 },
3156 { 0x00000000, 0x00894907, 0x000 },
3157 { 0x00000010, 0x00221e23, 0x000 },
3158 { 0x00000000, 0x00294887, 0x000 },
3159 { 0x00000010, 0x00221e21, 0x000 },
3160 { 0x00000000, 0x00294847, 0x000 },
3161 { 0x00000000, 0x00311ca3, 0x000 },
3162 { 0x00000010, 0x00221e27, 0x000 },
3163 { 0x00000000, 0x00294887, 0x000 },
3164 { 0x00000000, 0x00311ca1, 0x000 },
3165 { 0x00000010, 0x00221e27, 0x000 },
3166 { 0x00000000, 0x00294847, 0x000 },
3167 { 0x00000010, 0x00221e23, 0x000 },
3168 { 0x00000000, 0x003120c4, 0x000 },
3169 { 0x0000ffff, 0x00282228, 0x000 },
3170 { 0x00000000, 0x00294907, 0x000 },
3171 { 0x00000010, 0x00221e21, 0x000 },
3172 { 0x00000000, 0x003120c2, 0x000 },
3173 { 0x0000ffff, 0x00282228, 0x000 },
3174 { 0x00000000, 0x00894907, 0x000 },
3175 { 0x00000010, 0x00221e23, 0x000 },
3176 { 0x00000000, 0x00294887, 0x000 },
3177 { 0x00000001, 0x00220a21, 0x000 },
3178 { 0x00000000, 0x003308a2, 0x000 },
3179 { 0x00000010, 0x00221e22, 0x000 },
3180 { 0x00000010, 0x00212222, 0x000 },
3181 { 0x00000000, 0x00294907, 0x000 },
3182 { 0x00000000, 0x00311ca3, 0x000 },
3183 { 0x00000010, 0x00221e27, 0x000 },
3184 { 0x00000000, 0x00294887, 0x000 },
3185 { 0x00000001, 0x00220a21, 0x000 },
3186 { 0x00000000, 0x003008a2, 0x000 },
3187 { 0x00000010, 0x00221e22, 0x000 },
3188 { 0x00000010, 0x00212222, 0x000 },
3189 { 0x00000000, 0x00294907, 0x000 },
3190 { 0x00000010, 0x00221e23, 0x000 },
3191 { 0x00000000, 0x003120c4, 0x000 },
3192 { 0x0000ffff, 0x00282228, 0x000 },
3193 { 0x00000000, 0x00294907, 0x000 },
3194 { 0x00000000, 0x003808c5, 0x000 },
3195 { 0x00000000, 0x00300841, 0x000 },
3196 { 0x00000001, 0x00220a22, 0x000 },
3197 { 0x00000000, 0x003308a2, 0x000 },
3198 { 0x00000010, 0x00221e22, 0x000 },
3199 { 0x00000010, 0x00212222, 0x000 },
3200 { 0x00000000, 0x00894907, 0x000 },
3201 { 0x00000017, 0x0020222d, 0x000 },
3202 { 0x00000000, 0x14c00000, 0x318 },
3203 { 0xffffffef, 0x00280621, 0x000 },
3204 { 0x00000014, 0x0020222d, 0x000 },
3205 { 0x0000f8e0, 0x00204411, 0x000 },
3206 { 0x00000000, 0x00294901, 0x000 },
3207 { 0x00000000, 0x00894901, 0x000 },
3208 { 0x00000000, 0x00204811, 0x000 },
3209 { 0x00000000, 0x00204811, 0x000 },
3210 { 0x060a0200, 0x00804811, 0x000 },
3211 { 0x00000000, 0xc0200000, 0x000 },
3212 { 0x97000000, 0xc0204411, 0x000 },
3213 { 0x00000000, 0xc0204811, 0x000 },
3214 { 0x8a000000, 0x00204411, 0x000 },
3215 { 0x00000000, 0x00204811, 0x000 },
3216 { 0x0000225c, 0x00204411, 0x000 },
3217 { 0x00000000, 0xc0204800, 0x000 },
3218 { 0x0000a1fc, 0x00204411, 0x000 },
3219 { 0x00000000, 0xc0204800, 0x000 },
3220 { 0x00000000, 0xc0200400, 0x000 },
3221 { 0x00000000, 0x00a0000a, 0x000 },
3222 { 0x97000000, 0x00204411, 0x000 },
3223 { 0x00000000, 0x00204811, 0x000 },
3224 { 0x8a000000, 0x00204411, 0x000 },
3225 { 0x00000000, 0x00204811, 0x000 },
3226 { 0x0000225c, 0x00204411, 0x000 },
3227 { 0x00000000, 0xc0204800, 0x000 },
3228 { 0x0000a1fc, 0x00204411, 0x000 },
3229 { 0x00000000, 0xc0204800, 0x000 },
3230 { 0x00000000, 0xc0200400, 0x000 },
3231 { 0x00000000, 0x00a0000a, 0x000 },
3232 { 0x97000000, 0x00204411, 0x000 },
3233 { 0x00000000, 0x00204811, 0x000 },
3234 { 0x8a000000, 0x00204411, 0x000 },
3235 { 0x00000000, 0x00204811, 0x000 },
3236 { 0x0000225c, 0x00204411, 0x000 },
3237 { 0x00000000, 0xc0204800, 0x000 },
3238 { 0x0000a1fc, 0x00204411, 0x000 },
3239 { 0x00000000, 0xc0204800, 0x000 },
3240 { 0x0001a1fd, 0x00204411, 0x000 },
3241 { 0x00000000, 0xd9004800, 0x000 },
3242 { 0x00000000, 0xc0200400, 0x000 },
3243 { 0x00000000, 0x00a0000a, 0x000 },
3244 { 0x00002257, 0x00204411, 0x000 },
3245 { 0x00000003, 0xc0484a20, 0x000 },
3246 { 0x0000225d, 0x00204411, 0x000 },
3247 { 0x00000000, 0xc0404800, 0x000 },
3248 { 0x00000000, 0x00600000, 0x645 },
3249 { 0x00000000, 0xc0200800, 0x000 },
3250 { 0x0000225c, 0x00204411, 0x000 },
3251 { 0x00000003, 0x00384a22, 0x000 },
3252 { 0x0000a1fc, 0x00204411, 0x000 },
3253 { 0x00000000, 0xc0204800, 0x000 },
3254 { 0x0001a1fd, 0x00204411, 0x000 },
3255 { 0x00000000, 0x002f0222, 0x000 },
3256 { 0x00000000, 0x0ce00000, 0x000 },
3257 { 0x00000000, 0x40204800, 0x000 },
3258 { 0x00000001, 0x40304a20, 0x000 },
3259 { 0x00000002, 0xc0304a20, 0x000 },
3260 { 0x00000001, 0x00530a22, 0x34b },
3261 { 0x0000003f, 0xc0280a20, 0x000 },
3262 { 0x81000000, 0x00204411, 0x000 },
3263 { 0x00000001, 0x00204811, 0x000 },
3264 { 0x000021f8, 0x00204411, 0x000 },
3265 { 0x00000018, 0x00204811, 0x000 },
3266 { 0x000421f9, 0x00604411, 0x68d },
3267 { 0x00000011, 0x00210230, 0x000 },
3268 { 0x00000000, 0x14e00000, 0x354 },
3269 { 0x00000014, 0x002f0222, 0x000 },
3270 { 0x00000000, 0x0cc00000, 0x364 },
3271 { 0x00002010, 0x00204411, 0x000 },
3272 { 0x00008000, 0x00204811, 0x000 },
3273 { 0x0001a2a4, 0x00204411, 0x000 },
3274 { 0x00000000, 0x00604802, 0x36e },
3275 { 0x00002100, 0x00204411, 0x000 },
3276 { 0x00000000, 0xc0204800, 0x000 },
3277 { 0x00000000, 0xc0204800, 0x000 },
3278 { 0x00000000, 0xc0204800, 0x000 },
3279 { 0x00000000, 0xc0404800, 0x000 },
3280 { 0x00000004, 0x002f0222, 0x000 },
3281 { 0x00000000, 0x0cc00000, 0x36a },
3282 { 0x00002010, 0x00204411, 0x000 },
3283 { 0x00008000, 0x00204811, 0x000 },
3284 { 0x0001a2a4, 0x00204411, 0x000 },
3285 { 0x00000000, 0x00404802, 0x35f },
3286 { 0x00000028, 0x002f0222, 0x000 },
3287 { 0x00000000, 0x0cc00000, 0x5c0 },
3288 { 0x0001a2a4, 0x00204411, 0x000 },
3289 { 0x00000000, 0x00404802, 0x35f },
3290 { 0x0000002c, 0x00203626, 0x000 },
3291 { 0x00000049, 0x00201811, 0x000 },
3292 { 0x0000003f, 0x00204811, 0x000 },
3293 { 0x00000001, 0x00331a26, 0x000 },
3294 { 0x00000000, 0x002f0226, 0x000 },
3295 { 0x00000000, 0x0cc00000, 0x370 },
3296 { 0x0000002c, 0x00801a2d, 0x000 },
3297 { 0x0000003f, 0xc0280a20, 0x000 },
3298 { 0x00000015, 0x002f0222, 0x000 },
3299 { 0x00000000, 0x0ce00000, 0x386 },
3300 { 0x00000006, 0x002f0222, 0x000 },
3301 { 0x00000000, 0x0ce00000, 0x3b1 },
3302 { 0x00000016, 0x002f0222, 0x000 },
3303 { 0x00000000, 0x0ce00000, 0x3b5 },
3304 { 0x00000020, 0x002f0222, 0x000 },
3305 { 0x00000000, 0x0ce00000, 0x39c },
3306 { 0x0000000f, 0x002f0222, 0x000 },
3307 { 0x00000000, 0x0ce00000, 0x3a8 },
3308 { 0x00000010, 0x002f0222, 0x000 },
3309 { 0x00000000, 0x0ce00000, 0x3a8 },
3310 { 0x0000001e, 0x002f0222, 0x000 },
3311 { 0x00000000, 0x0ce00000, 0x390 },
3312 { 0x0000a2a4, 0x00204411, 0x000 },
3313 { 0x00000000, 0x00404802, 0x000 },
3314 { 0x08000000, 0x00290a22, 0x000 },
3315 { 0x00000003, 0x40210e20, 0x000 },
3316 { 0x0000000c, 0xc0211220, 0x000 },
3317 { 0x00080000, 0x00281224, 0x000 },
3318 { 0x00000014, 0xc0221620, 0x000 },
3319 { 0x00000000, 0x002914a4, 0x000 },
3320 { 0x0000a2a4, 0x00204411, 0x000 },
3321 { 0x00000000, 0x002948a2, 0x000 },
3322 { 0x0000a1fe, 0x00204411, 0x000 },
3323 { 0x00000000, 0x00404803, 0x000 },
3324 { 0x81000000, 0x00204411, 0x000 },
3325 { 0x00000001, 0x00204811, 0x000 },
3326 { 0x000021f8, 0x00204411, 0x000 },
3327 { 0x00000016, 0x00204811, 0x000 },
3328 { 0x000421f9, 0x00604411, 0x68d },
3329 { 0x00000015, 0x00210230, 0x000 },
3330 { 0x00000000, 0x14e00000, 0x392 },
3331 { 0x0000210e, 0x00204411, 0x000 },
3332 { 0x00000000, 0xc0204800, 0x000 },
3333 { 0x00000000, 0xc0204800, 0x000 },
3334 { 0x0000a2a4, 0x00204411, 0x000 },
3335 { 0x00000000, 0x00404802, 0x000 },
3336 { 0x81000000, 0x00204411, 0x000 },
3337 { 0x00000001, 0x00204811, 0x000 },
3338 { 0x000021f8, 0x00204411, 0x000 },
3339 { 0x00000017, 0x00204811, 0x000 },
3340 { 0x000421f9, 0x00604411, 0x68d },
3341 { 0x00000003, 0x00210230, 0x000 },
3342 { 0x00000000, 0x14e00000, 0x39e },
3343 { 0x00002108, 0x00204411, 0x000 },
3344 { 0x00000000, 0xc0204800, 0x000 },
3345 { 0x00000000, 0xc0204800, 0x000 },
3346 { 0x0000a2a4, 0x00204411, 0x000 },
3347 { 0x00000000, 0x00404802, 0x000 },
3348 { 0x0000a2a4, 0x00204411, 0x000 },
3349 { 0x00000000, 0x00204802, 0x000 },
3350 { 0x80000000, 0x00204411, 0x000 },
3351 { 0x00000000, 0x00204811, 0x000 },
3352 { 0x81000000, 0x00204411, 0x000 },
3353 { 0x00000010, 0x00204811, 0x000 },
3354 { 0x00000000, 0x00200010, 0x000 },
3355 { 0x00000000, 0x14c00000, 0x3ae },
3356 { 0x00000000, 0x00400000, 0x000 },
3357 { 0x00002010, 0x00204411, 0x000 },
3358 { 0x00008000, 0x00204811, 0x000 },
3359 { 0x0001a2a4, 0x00204411, 0x000 },
3360 { 0x00000006, 0x00404811, 0x000 },
3361 { 0x00002010, 0x00204411, 0x000 },
3362 { 0x00008000, 0x00204811, 0x000 },
3363 { 0x0001a2a4, 0x00204411, 0x000 },
3364 { 0x00000016, 0x00604811, 0x36e },
3365 { 0x00000000, 0x00400000, 0x000 },
3366 { 0x00000000, 0xc0200800, 0x000 },
3367 { 0x00000000, 0xc0200c00, 0x000 },
3368 { 0x0000001d, 0x00210223, 0x000 },
3369 { 0x00000000, 0x14e00000, 0x3ce },
3370 { 0x81000000, 0x00204411, 0x000 },
3371 { 0x00000001, 0x00204811, 0x000 },
3372 { 0x000021f8, 0x00204411, 0x000 },
3373 { 0x00000018, 0x00204811, 0x000 },
3374 { 0x000421f9, 0x00604411, 0x68d },
3375 { 0x00000011, 0x00210230, 0x000 },
3376 { 0x00000000, 0x14e00000, 0x3c0 },
3377 { 0x00002100, 0x00204411, 0x000 },
3378 { 0x00000000, 0x00204802, 0x000 },
3379 { 0x00000000, 0x00204803, 0x000 },
3380 { 0xbabecafe, 0x00204811, 0x000 },
3381 { 0xcafebabe, 0x00204811, 0x000 },
3382 { 0x00002010, 0x00204411, 0x000 },
3383 { 0x00008000, 0x00204811, 0x000 },
3384 { 0x0000a2a4, 0x00204411, 0x000 },
3385 { 0x00000004, 0x00404811, 0x000 },
3386 { 0x00002170, 0x00204411, 0x000 },
3387 { 0x00000000, 0x00204802, 0x000 },
3388 { 0x00000000, 0x00204803, 0x000 },
3389 { 0x81000000, 0x00204411, 0x000 },
3390 { 0x0000000a, 0x00204811, 0x000 },
3391 { 0x00000000, 0x00200010, 0x000 },
3392 { 0x00000000, 0x14c00000, 0x3d3 },
3393 { 0x8c000000, 0x00204411, 0x000 },
3394 { 0xcafebabe, 0x00404811, 0x000 },
3395 { 0x81000000, 0x00204411, 0x000 },
3396 { 0x00000001, 0x00204811, 0x000 },
3397 { 0x00003fff, 0x40280a20, 0x000 },
3398 { 0x80000000, 0x40280e20, 0x000 },
3399 { 0x40000000, 0xc0281220, 0x000 },
3400 { 0x00040000, 0x00694622, 0x68d },
3401 { 0x00000000, 0x00201410, 0x000 },
3402 { 0x00000000, 0x002f0223, 0x000 },
3403 { 0x00000000, 0x0cc00000, 0x3e1 },
3404 { 0x00000000, 0xc0401800, 0x3e4 },
3405 { 0x00003fff, 0xc0281a20, 0x000 },
3406 { 0x00040000, 0x00694626, 0x68d },
3407 { 0x00000000, 0x00201810, 0x000 },
3408 { 0x00000000, 0x002f0224, 0x000 },
3409 { 0x00000000, 0x0cc00000, 0x3e7 },
3410 { 0x00000000, 0xc0401c00, 0x3ea },
3411 { 0x00003fff, 0xc0281e20, 0x000 },
3412 { 0x00040000, 0x00694627, 0x68d },
3413 { 0x00000000, 0x00201c10, 0x000 },
3414 { 0x00000000, 0x00204402, 0x000 },
3415 { 0x00000000, 0x002820c5, 0x000 },
3416 { 0x00000000, 0x004948e8, 0x000 },
3417 { 0xa5800000, 0x00200811, 0x000 },
3418 { 0x00002000, 0x00200c11, 0x000 },
3419 { 0x83000000, 0x00604411, 0x412 },
3420 { 0x00000000, 0x00204402, 0x000 },
3421 { 0x00000000, 0xc0204800, 0x000 },
3422 { 0x00000000, 0x40204800, 0x000 },
3423 { 0x0000001f, 0xc0210220, 0x000 },
3424 { 0x00000000, 0x14c00000, 0x3f7 },
3425 { 0x00002010, 0x00204411, 0x000 },
3426 { 0x00008000, 0x00204811, 0x000 },
3427 { 0x0000ffff, 0xc0481220, 0x3ff },
3428 { 0xa7800000, 0x00200811, 0x000 },
3429 { 0x0000a000, 0x00200c11, 0x000 },
3430 { 0x83000000, 0x00604411, 0x412 },
3431 { 0x00000000, 0x00204402, 0x000 },
3432 { 0x00000000, 0xc0204800, 0x000 },
3433 { 0x00000000, 0xc0204800, 0x000 },
3434 { 0x0000ffff, 0xc0281220, 0x000 },
3435 { 0x83000000, 0x00204411, 0x000 },
3436 { 0x00000000, 0x00304883, 0x000 },
3437 { 0x84000000, 0x00204411, 0x000 },
3438 { 0x00000000, 0xc0204800, 0x000 },
3439 { 0x00000000, 0x1d000000, 0x000 },
3440 { 0x83000000, 0x00604411, 0x412 },
3441 { 0x00000000, 0xc0400400, 0x001 },
3442 { 0xa9800000, 0x00200811, 0x000 },
3443 { 0x0000c000, 0x00400c11, 0x3fa },
3444 { 0xab800000, 0x00200811, 0x000 },
3445 { 0x0000f8e0, 0x00400c11, 0x3fa },
3446 { 0xad800000, 0x00200811, 0x000 },
3447 { 0x0000f880, 0x00400c11, 0x3fa },
3448 { 0xb3800000, 0x00200811, 0x000 },
3449 { 0x0000f3fc, 0x00400c11, 0x3fa },
3450 { 0xaf800000, 0x00200811, 0x000 },
3451 { 0x0000e000, 0x00400c11, 0x3fa },
3452 { 0xb1800000, 0x00200811, 0x000 },
3453 { 0x0000f000, 0x00400c11, 0x3fa },
3454 { 0x83000000, 0x00204411, 0x000 },
3455 { 0x00002148, 0x00204811, 0x000 },
3456 { 0x84000000, 0x00204411, 0x000 },
3457 { 0x00000000, 0xc0204800, 0x000 },
3458 { 0x00000000, 0x1d000000, 0x000 },
3459 { 0x00000000, 0x00800000, 0x000 },
3460 { 0x01182000, 0xc0304620, 0x000 },
3461 { 0x00000000, 0xd9004800, 0x000 },
3462 { 0x00000000, 0xc0200400, 0x000 },
3463 { 0x00000000, 0x00a0000a, 0x000 },
3464 { 0x0218a000, 0xc0304620, 0x000 },
3465 { 0x00000000, 0xd9004800, 0x000 },
3466 { 0x00000000, 0xc0200400, 0x000 },
3467 { 0x00000000, 0x00a0000a, 0x000 },
3468 { 0x0318c000, 0xc0304620, 0x000 },
3469 { 0x00000000, 0xd9004800, 0x000 },
3470 { 0x00000000, 0xc0200400, 0x000 },
3471 { 0x00000000, 0x00a0000a, 0x000 },
3472 { 0x0418f8e0, 0xc0304620, 0x000 },
3473 { 0x00000000, 0xd9004800, 0x000 },
3474 { 0x00000000, 0xc0200400, 0x000 },
3475 { 0x00000000, 0x00a0000a, 0x000 },
3476 { 0x0518f880, 0xc0304620, 0x000 },
3477 { 0x00000000, 0xd9004800, 0x000 },
3478 { 0x00000000, 0xc0200400, 0x000 },
3479 { 0x00000000, 0x00a0000a, 0x000 },
3480 { 0x0618e000, 0xc0304620, 0x000 },
3481 { 0x00000000, 0xd9004800, 0x000 },
3482 { 0x00000000, 0xc0200400, 0x000 },
3483 { 0x00000000, 0x00a0000a, 0x000 },
3484 { 0x0718f000, 0xc0304620, 0x000 },
3485 { 0x00000000, 0xd9004800, 0x000 },
3486 { 0x00000000, 0xc0200400, 0x000 },
3487 { 0x00000000, 0x00a0000a, 0x000 },
3488 { 0x0818f3fc, 0xc0304620, 0x000 },
3489 { 0x00000000, 0xd9004800, 0x000 },
3490 { 0x00000000, 0xc0200400, 0x000 },
3491 { 0x00000000, 0x00a0000a, 0x000 },
3492 { 0x00000030, 0x00200a2d, 0x000 },
3493 { 0x00000000, 0xc0290c40, 0x000 },
3494 { 0x00000030, 0x00203623, 0x000 },
3495 { 0x00000000, 0xc0200400, 0x000 },
3496 { 0x00000000, 0x00a0000a, 0x000 },
3497 { 0x86000000, 0x00204411, 0x000 },
3498 { 0x00000000, 0x00404801, 0x000 },
3499 { 0x85000000, 0xc0204411, 0x000 },
3500 { 0x00000000, 0x00404801, 0x000 },
3501 { 0x0000217c, 0x00204411, 0x000 },
3502 { 0x00000018, 0x40210220, 0x000 },
3503 { 0x00000000, 0x14c00000, 0x445 },
3504 { 0x00800000, 0xc0494a20, 0x446 },
3505 { 0x00000000, 0xc0204800, 0x000 },
3506 { 0x00000000, 0xc0204800, 0x000 },
3507 { 0x00000000, 0xc0204800, 0x000 },
3508 { 0x81000000, 0x00204411, 0x000 },
3509 { 0x00000001, 0x00204811, 0x000 },
3510 { 0x00000000, 0xc0200800, 0x000 },
3511 { 0x00000000, 0x17000000, 0x000 },
3512 { 0x0004217f, 0x00604411, 0x68d },
3513 { 0x0000001f, 0x00210230, 0x000 },
3514 { 0x00000000, 0x14c00000, 0x000 },
3515 { 0x00000000, 0x00404c02, 0x44b },
3516 { 0x00000000, 0xc0200c00, 0x000 },
3517 { 0x00000000, 0xc0201000, 0x000 },
3518 { 0x00000000, 0xc0201400, 0x000 },
3519 { 0x00000000, 0xc0201800, 0x000 },
3520 { 0x00000000, 0xc0201c00, 0x000 },
3521 { 0x00007f00, 0x00280a21, 0x000 },
3522 { 0x00004500, 0x002f0222, 0x000 },
3523 { 0x00000000, 0x0ce00000, 0x459 },
3524 { 0x00000000, 0xc0202000, 0x000 },
3525 { 0x00000000, 0x17000000, 0x000 },
3526 { 0x00000010, 0x00280a23, 0x000 },
3527 { 0x00000010, 0x002f0222, 0x000 },
3528 { 0x00000000, 0x0ce00000, 0x461 },
3529 { 0x81000000, 0x00204411, 0x000 },
3530 { 0x00000001, 0x00204811, 0x000 },
3531 { 0x00040000, 0x00694624, 0x68d },
3532 { 0x00000000, 0x00400000, 0x466 },
3533 { 0x81000000, 0x00204411, 0x000 },
3534 { 0x00000000, 0x00204811, 0x000 },
3535 { 0x0000216d, 0x00204411, 0x000 },
3536 { 0x00000000, 0x00204804, 0x000 },
3537 { 0x00000000, 0x00604805, 0x692 },
3538 { 0x00000000, 0x002824f0, 0x000 },
3539 { 0x00000007, 0x00280a23, 0x000 },
3540 { 0x00000001, 0x002f0222, 0x000 },
3541 { 0x00000000, 0x0ae00000, 0x46d },
3542 { 0x00000000, 0x002f00c9, 0x000 },
3543 { 0x00000000, 0x04e00000, 0x486 },
3544 { 0x00000000, 0x00400000, 0x493 },
3545 { 0x00000002, 0x002f0222, 0x000 },
3546 { 0x00000000, 0x0ae00000, 0x472 },
3547 { 0x00000000, 0x002f00c9, 0x000 },
3548 { 0x00000000, 0x02e00000, 0x486 },
3549 { 0x00000000, 0x00400000, 0x493 },
3550 { 0x00000003, 0x002f0222, 0x000 },
3551 { 0x00000000, 0x0ae00000, 0x477 },
3552 { 0x00000000, 0x002f00c9, 0x000 },
3553 { 0x00000000, 0x0ce00000, 0x486 },
3554 { 0x00000000, 0x00400000, 0x493 },
3555 { 0x00000004, 0x002f0222, 0x000 },
3556 { 0x00000000, 0x0ae00000, 0x47c },
3557 { 0x00000000, 0x002f00c9, 0x000 },
3558 { 0x00000000, 0x0ae00000, 0x486 },
3559 { 0x00000000, 0x00400000, 0x493 },
3560 { 0x00000005, 0x002f0222, 0x000 },
3561 { 0x00000000, 0x0ae00000, 0x481 },
3562 { 0x00000000, 0x002f00c9, 0x000 },
3563 { 0x00000000, 0x06e00000, 0x486 },
3564 { 0x00000000, 0x00400000, 0x493 },
3565 { 0x00000006, 0x002f0222, 0x000 },
3566 { 0x00000000, 0x0ae00000, 0x486 },
3567 { 0x00000000, 0x002f00c9, 0x000 },
3568 { 0x00000000, 0x08e00000, 0x486 },
3569 { 0x00000000, 0x00400000, 0x493 },
3570 { 0x00007f00, 0x00280a21, 0x000 },
3571 { 0x00004500, 0x002f0222, 0x000 },
3572 { 0x00000000, 0x0ae00000, 0x000 },
3573 { 0x00000008, 0x00210a23, 0x000 },
3574 { 0x00000000, 0x14c00000, 0x490 },
3575 { 0x00002169, 0x00204411, 0x000 },
3576 { 0x00000000, 0xc0204800, 0x000 },
3577 { 0x00000000, 0xc0204800, 0x000 },
3578 { 0x00000000, 0xc0204800, 0x000 },
3579 { 0xcafebabe, 0x00404811, 0x000 },
3580 { 0x00000000, 0xc0204400, 0x000 },
3581 { 0x00000000, 0xc0200000, 0x000 },
3582 { 0x00000000, 0xc0404800, 0x000 },
3583 { 0x00007f00, 0x00280a21, 0x000 },
3584 { 0x00004500, 0x002f0222, 0x000 },
3585 { 0x00000000, 0x0ae00000, 0x499 },
3586 { 0x00000000, 0xc0200000, 0x000 },
3587 { 0x00000000, 0xc0200000, 0x000 },
3588 { 0x00000000, 0xc0400000, 0x000 },
3589 { 0x00000000, 0x00404c08, 0x459 },
3590 { 0x00000000, 0xc0200800, 0x000 },
3591 { 0x00000010, 0x40210e20, 0x000 },
3592 { 0x00000011, 0x40211220, 0x000 },
3593 { 0x00000012, 0x40211620, 0x000 },
3594 { 0x00002169, 0x00204411, 0x000 },
3595 { 0x00000000, 0x00204802, 0x000 },
3596 { 0x00000000, 0x00210225, 0x000 },
3597 { 0x00000000, 0x14e00000, 0x4a3 },
3598 { 0x00040000, 0xc0494a20, 0x4a4 },
3599 { 0xfffbffff, 0xc0284a20, 0x000 },
3600 { 0x00000000, 0x00210223, 0x000 },
3601 { 0x00000000, 0x14e00000, 0x4b0 },
3602 { 0x00000000, 0xc0204800, 0x000 },
3603 { 0x00000000, 0xc0204800, 0x000 },
3604 { 0x00000000, 0x00210224, 0x000 },
3605 { 0x00000000, 0x14c00000, 0x000 },
3606 { 0x81000000, 0x00204411, 0x000 },
3607 { 0x0000000c, 0x00204811, 0x000 },
3608 { 0x00000000, 0x00200010, 0x000 },
3609 { 0x00000000, 0x14c00000, 0x4ac },
3610 { 0xa0000000, 0x00204411, 0x000 },
3611 { 0xcafebabe, 0x00404811, 0x000 },
3612 { 0x81000000, 0x00204411, 0x000 },
3613 { 0x00000004, 0x00204811, 0x000 },
3614 { 0x0000216b, 0x00204411, 0x000 },
3615 { 0x00000000, 0xc0204810, 0x000 },
3616 { 0x81000000, 0x00204411, 0x000 },
3617 { 0x00000005, 0x00204811, 0x000 },
3618 { 0x0000216c, 0x00204411, 0x000 },
3619 { 0x00000000, 0xc0204810, 0x000 },
3620 { 0x00000000, 0x002f0224, 0x000 },
3621 { 0x00000000, 0x0ce00000, 0x000 },
3622 { 0x00000000, 0x00400000, 0x4aa },
3623 { 0x00000000, 0xc0210a20, 0x000 },
3624 { 0x00000000, 0x14c00000, 0x4c3 },
3625 { 0x81000000, 0x00204411, 0x000 },
3626 { 0x00000000, 0x00204811, 0x000 },
3627 { 0x0000216d, 0x00204411, 0x000 },
3628 { 0x00000000, 0xc0204800, 0x000 },
3629 { 0x00000000, 0xc0604800, 0x692 },
3630 { 0x00000000, 0x00400000, 0x4c7 },
3631 { 0x81000000, 0x00204411, 0x000 },
3632 { 0x00000001, 0x00204811, 0x000 },
3633 { 0x00040000, 0xc0294620, 0x000 },
3634 { 0x00000000, 0xc0600000, 0x68d },
3635 { 0x00000001, 0x00210222, 0x000 },
3636 { 0x00000000, 0x14c00000, 0x4ce },
3637 { 0x00002169, 0x00204411, 0x000 },
3638 { 0x00000000, 0xc0204800, 0x000 },
3639 { 0x00000000, 0xc0204800, 0x000 },
3640 { 0x00000000, 0x00204810, 0x000 },
3641 { 0xcafebabe, 0x00404811, 0x000 },
3642 { 0x00000000, 0xc0204400, 0x000 },
3643 { 0x00000000, 0xc0404810, 0x000 },
3644 { 0x81000000, 0x00204411, 0x000 },
3645 { 0x00000001, 0x00204811, 0x000 },
3646 { 0x000021f8, 0x00204411, 0x000 },
3647 { 0x0000000e, 0x00204811, 0x000 },
3648 { 0x000421f9, 0x00604411, 0x68d },
3649 { 0x00000000, 0x00210230, 0x000 },
3650 { 0x00000000, 0x14c00000, 0x4d0 },
3651 { 0x00002180, 0x00204411, 0x000 },
3652 { 0x00000000, 0xc0204800, 0x000 },
3653 { 0x00000000, 0xc0200000, 0x000 },
3654 { 0x00000000, 0xc0204800, 0x000 },
3655 { 0x00000000, 0xc0200000, 0x000 },
3656 { 0x00000000, 0xc0404800, 0x000 },
3657 { 0x00000003, 0x00333e2f, 0x000 },
3658 { 0x00000001, 0x00210221, 0x000 },
3659 { 0x00000000, 0x14e00000, 0x500 },
3660 { 0x0000002c, 0x00200a2d, 0x000 },
3661 { 0x00040000, 0x18e00c11, 0x4ef },
3662 { 0x00000001, 0x00333e2f, 0x000 },
3663 { 0x00002169, 0x00204411, 0x000 },
3664 { 0x00000000, 0x00204802, 0x000 },
3665 { 0x00000000, 0x00204803, 0x000 },
3666 { 0x00000008, 0x00300a22, 0x000 },
3667 { 0x00000000, 0xc0204800, 0x000 },
3668 { 0x00000000, 0xc0204800, 0x000 },
3669 { 0x00002169, 0x00204411, 0x000 },
3670 { 0x00000000, 0x00204802, 0x000 },
3671 { 0x00000000, 0x00204803, 0x000 },
3672 { 0x00000008, 0x00300a22, 0x000 },
3673 { 0x00000000, 0xc0204800, 0x000 },
3674 { 0x00000000, 0xd8c04800, 0x4e3 },
3675 { 0x00002169, 0x00204411, 0x000 },
3676 { 0x00000000, 0x00204802, 0x000 },
3677 { 0x00000000, 0x00204803, 0x000 },
3678 { 0x00000008, 0x00300a22, 0x000 },
3679 { 0x00000000, 0xc0204800, 0x000 },
3680 { 0x00000000, 0xc0204800, 0x000 },
3681 { 0x0000002d, 0x0020122d, 0x000 },
3682 { 0x00000000, 0x00290c83, 0x000 },
3683 { 0x00002169, 0x00204411, 0x000 },
3684 { 0x00000000, 0x00204802, 0x000 },
3685 { 0x00000000, 0x00204803, 0x000 },
3686 { 0x00000008, 0x00300a22, 0x000 },
3687 { 0x00000000, 0xc0204800, 0x000 },
3688 { 0x00000000, 0xc0204800, 0x000 },
3689 { 0x00000011, 0x00210224, 0x000 },
3690 { 0x00000000, 0x14c00000, 0x000 },
3691 { 0x00000000, 0x00400000, 0x4aa },
3692 { 0x0000002c, 0xc0203620, 0x000 },
3693 { 0x0000002d, 0xc0403620, 0x000 },
3694 { 0x0000000f, 0x00210221, 0x000 },
3695 { 0x00000000, 0x14c00000, 0x505 },
3696 { 0x00000000, 0x00600000, 0x00b },
3697 { 0x00000000, 0xd9000000, 0x000 },
3698 { 0x00000000, 0xc0400400, 0x001 },
3699 { 0xb5000000, 0x00204411, 0x000 },
3700 { 0x00002000, 0x00204811, 0x000 },
3701 { 0xb6000000, 0x00204411, 0x000 },
3702 { 0x0000a000, 0x00204811, 0x000 },
3703 { 0xb7000000, 0x00204411, 0x000 },
3704 { 0x0000c000, 0x00204811, 0x000 },
3705 { 0xb8000000, 0x00204411, 0x000 },
3706 { 0x0000f8e0, 0x00204811, 0x000 },
3707 { 0xb9000000, 0x00204411, 0x000 },
3708 { 0x0000f880, 0x00204811, 0x000 },
3709 { 0xba000000, 0x00204411, 0x000 },
3710 { 0x0000e000, 0x00204811, 0x000 },
3711 { 0xbb000000, 0x00204411, 0x000 },
3712 { 0x0000f000, 0x00204811, 0x000 },
3713 { 0xbc000000, 0x00204411, 0x000 },
3714 { 0x0000f3fc, 0x00204811, 0x000 },
3715 { 0x81000000, 0x00204411, 0x000 },
3716 { 0x00000002, 0x00204811, 0x000 },
3717 { 0x000000ff, 0x00280e30, 0x000 },
3718 { 0x00000000, 0x002f0223, 0x000 },
3719 { 0x00000000, 0x0cc00000, 0x519 },
3720 { 0x00000000, 0xc0200800, 0x000 },
3721 { 0x00000000, 0x14c00000, 0x52e },
3722 { 0x00000000, 0x00200c11, 0x000 },
3723 { 0x0000001c, 0x00203623, 0x000 },
3724 { 0x0000002b, 0x00203623, 0x000 },
3725 { 0x00000029, 0x00203623, 0x000 },
3726 { 0x00000028, 0x00203623, 0x000 },
3727 { 0x00000017, 0x00203623, 0x000 },
3728 { 0x00000025, 0x00203623, 0x000 },
3729 { 0x00000026, 0x00203623, 0x000 },
3730 { 0x00000015, 0x00203623, 0x000 },
3731 { 0x00000016, 0x00203623, 0x000 },
3732 { 0xffffe000, 0x00200c11, 0x000 },
3733 { 0x00000021, 0x00203623, 0x000 },
3734 { 0x00000022, 0x00203623, 0x000 },
3735 { 0x00001fff, 0x00200c11, 0x000 },
3736 { 0x00000023, 0x00203623, 0x000 },
3737 { 0x00000024, 0x00203623, 0x000 },
3738 { 0xf1ffffff, 0x00283a2e, 0x000 },
3739 { 0x0000001a, 0xc0220e20, 0x000 },
3740 { 0x00000000, 0x0029386e, 0x000 },
3741 { 0x81000000, 0x00204411, 0x000 },
3742 { 0x00000006, 0x00204811, 0x000 },
3743 { 0x0000002a, 0x40203620, 0x000 },
3744 { 0x87000000, 0x00204411, 0x000 },
3745 { 0x00000000, 0xc0204800, 0x000 },
3746 { 0x0000a1f4, 0x00204411, 0x000 },
3747 { 0x00000000, 0x00204810, 0x000 },
3748 { 0x00000000, 0x00200c11, 0x000 },
3749 { 0x00000030, 0x00203623, 0x000 },
3750 { 0x9d000000, 0x00204411, 0x000 },
3751 { 0x0000001f, 0x40214a20, 0x000 },
3752 { 0x96000000, 0x00204411, 0x000 },
3753 { 0x00000000, 0xc0204800, 0x000 },
3754 { 0x00000000, 0xc0200c00, 0x000 },
3755 { 0x00000000, 0xc0201000, 0x000 },
3756 { 0x0000001f, 0x00211624, 0x000 },
3757 { 0x00000000, 0x14c00000, 0x000 },
3758 { 0x0000001d, 0x00203623, 0x000 },
3759 { 0x00000003, 0x00281e23, 0x000 },
3760 { 0x00000008, 0x00222223, 0x000 },
3761 { 0xfffff000, 0x00282228, 0x000 },
3762 { 0x00000000, 0x002920e8, 0x000 },
3763 { 0x0000001f, 0x00203628, 0x000 },
3764 { 0x00000018, 0x00211e23, 0x000 },
3765 { 0x00000020, 0x00203627, 0x000 },
3766 { 0x00000002, 0x00221624, 0x000 },
3767 { 0x00000000, 0x003014a8, 0x000 },
3768 { 0x0000001e, 0x00203625, 0x000 },
3769 { 0x00000003, 0x00211a24, 0x000 },
3770 { 0x10000000, 0x00281a26, 0x000 },
3771 { 0xefffffff, 0x00283a2e, 0x000 },
3772 { 0x00000000, 0x004938ce, 0x67b },
3773 { 0x00000001, 0x40280a20, 0x000 },
3774 { 0x00000006, 0x40280e20, 0x000 },
3775 { 0x00000300, 0xc0281220, 0x000 },
3776 { 0x00000008, 0x00211224, 0x000 },
3777 { 0x00000000, 0xc0201620, 0x000 },
3778 { 0x00000000, 0xc0201a20, 0x000 },
3779 { 0x00000000, 0x00210222, 0x000 },
3780 { 0x00000000, 0x14c00000, 0x566 },
3781 { 0x81000000, 0x00204411, 0x000 },
3782 { 0x00000001, 0x00204811, 0x000 },
3783 { 0x00002258, 0x00300a24, 0x000 },
3784 { 0x00040000, 0x00694622, 0x68d },
3785 { 0x00002169, 0x00204411, 0x000 },
3786 { 0x00000000, 0x00204805, 0x000 },
3787 { 0x00020000, 0x00294a26, 0x000 },
3788 { 0x00000000, 0x00204810, 0x000 },
3789 { 0xcafebabe, 0x00204811, 0x000 },
3790 { 0x00000002, 0x002f0223, 0x000 },
3791 { 0x00000000, 0x0cc00000, 0x56e },
3792 { 0x00000000, 0xc0201c10, 0x000 },
3793 { 0x00000000, 0xc0400000, 0x57c },
3794 { 0x00000002, 0x002f0223, 0x000 },
3795 { 0x00000000, 0x0cc00000, 0x56e },
3796 { 0x81000000, 0x00204411, 0x000 },
3797 { 0x00000001, 0x00204811, 0x000 },
3798 { 0x00002258, 0x00300a24, 0x000 },
3799 { 0x00040000, 0x00694622, 0x68d },
3800 { 0x00000000, 0xc0201c10, 0x000 },
3801 { 0x00000000, 0xc0400000, 0x57c },
3802 { 0x00000000, 0x002f0223, 0x000 },
3803 { 0x00000000, 0x0cc00000, 0x572 },
3804 { 0x00000000, 0xc0201c00, 0x000 },
3805 { 0x00000000, 0xc0400000, 0x57c },
3806 { 0x00000004, 0x002f0223, 0x000 },
3807 { 0x00000000, 0x0cc00000, 0x57a },
3808 { 0x81000000, 0x00204411, 0x000 },
3809 { 0x00000000, 0x00204811, 0x000 },
3810 { 0x0000216d, 0x00204411, 0x000 },
3811 { 0x00000000, 0xc0204800, 0x000 },
3812 { 0x00000000, 0xc0604800, 0x692 },
3813 { 0x00000000, 0x00401c10, 0x57c },
3814 { 0x00000000, 0xc0200000, 0x000 },
3815 { 0x00000000, 0xc0400000, 0x000 },
3816 { 0x00000000, 0x0ee00000, 0x57e },
3817 { 0x00000000, 0x00600000, 0x5c9 },
3818 { 0x00000000, 0x002f0224, 0x000 },
3819 { 0x00000000, 0x0cc00000, 0x58f },
3820 { 0x0000a2b7, 0x00204411, 0x000 },
3821 { 0x00000000, 0x00204807, 0x000 },
3822 { 0x81000000, 0x00204411, 0x000 },
3823 { 0x00000001, 0x00204811, 0x000 },
3824 { 0x0004a2b6, 0x00604411, 0x68d },
3825 { 0x0000001a, 0x00212230, 0x000 },
3826 { 0x00000006, 0x00222630, 0x000 },
3827 { 0x00042004, 0x00604411, 0x68d },
3828 { 0x0000a2c4, 0x00204411, 0x000 },
3829 { 0x00000000, 0x003048e9, 0x000 },
3830 { 0x00000000, 0x00e00000, 0x58d },
3831 { 0x0000a2d1, 0x00204411, 0x000 },
3832 { 0x00000000, 0x00404808, 0x000 },
3833 { 0x0000a2d1, 0x00204411, 0x000 },
3834 { 0x00000001, 0x00504a28, 0x000 },
3835 { 0x00000001, 0x002f0224, 0x000 },
3836 { 0x00000000, 0x0cc00000, 0x5a0 },
3837 { 0x0000a2bb, 0x00204411, 0x000 },
3838 { 0x00000000, 0x00204807, 0x000 },
3839 { 0x81000000, 0x00204411, 0x000 },
3840 { 0x00000001, 0x00204811, 0x000 },
3841 { 0x0004a2ba, 0x00604411, 0x68d },
3842 { 0x0000001a, 0x00212230, 0x000 },
3843 { 0x00000006, 0x00222630, 0x000 },
3844 { 0x00042004, 0x00604411, 0x68d },
3845 { 0x0000a2c5, 0x00204411, 0x000 },
3846 { 0x00000000, 0x003048e9, 0x000 },
3847 { 0x00000000, 0x00e00000, 0x59e },
3848 { 0x0000a2d2, 0x00204411, 0x000 },
3849 { 0x00000000, 0x00404808, 0x000 },
3850 { 0x0000a2d2, 0x00204411, 0x000 },
3851 { 0x00000001, 0x00504a28, 0x000 },
3852 { 0x00000002, 0x002f0224, 0x000 },
3853 { 0x00000000, 0x0cc00000, 0x5b1 },
3854 { 0x0000a2bf, 0x00204411, 0x000 },
3855 { 0x00000000, 0x00204807, 0x000 },
3856 { 0x81000000, 0x00204411, 0x000 },
3857 { 0x00000001, 0x00204811, 0x000 },
3858 { 0x0004a2be, 0x00604411, 0x68d },
3859 { 0x0000001a, 0x00212230, 0x000 },
3860 { 0x00000006, 0x00222630, 0x000 },
3861 { 0x00042004, 0x00604411, 0x68d },
3862 { 0x0000a2c6, 0x00204411, 0x000 },
3863 { 0x00000000, 0x003048e9, 0x000 },
3864 { 0x00000000, 0x00e00000, 0x5af },
3865 { 0x0000a2d3, 0x00204411, 0x000 },
3866 { 0x00000000, 0x00404808, 0x000 },
3867 { 0x0000a2d3, 0x00204411, 0x000 },
3868 { 0x00000001, 0x00504a28, 0x000 },
3869 { 0x0000a2c3, 0x00204411, 0x000 },
3870 { 0x00000000, 0x00204807, 0x000 },
3871 { 0x81000000, 0x00204411, 0x000 },
3872 { 0x00000001, 0x00204811, 0x000 },
3873 { 0x0004a2c2, 0x00604411, 0x68d },
3874 { 0x0000001a, 0x00212230, 0x000 },
3875 { 0x00000006, 0x00222630, 0x000 },
3876 { 0x00042004, 0x00604411, 0x68d },
3877 { 0x0000a2c7, 0x00204411, 0x000 },
3878 { 0x00000000, 0x003048e9, 0x000 },
3879 { 0x00000000, 0x00e00000, 0x5be },
3880 { 0x0000a2d4, 0x00204411, 0x000 },
3881 { 0x00000000, 0x00404808, 0x000 },
3882 { 0x0000a2d4, 0x00204411, 0x000 },
3883 { 0x00000001, 0x00504a28, 0x000 },
3884 { 0x85000000, 0x00204411, 0x000 },
3885 { 0x00000000, 0x00204801, 0x000 },
3886 { 0x0000304a, 0x00204411, 0x000 },
3887 { 0x01000000, 0x00204811, 0x000 },
3888 { 0x00000000, 0x00400000, 0x5c4 },
3889 { 0xa4000000, 0xc0204411, 0x000 },
3890 { 0x00000000, 0xc0404800, 0x000 },
3891 { 0x00000000, 0xc0600000, 0x5c9 },
3892 { 0x00000000, 0xc0400400, 0x001 },
3893 { 0x0000002c, 0x00203621, 0x000 },
3894 { 0x81000000, 0x00204411, 0x000 },
3895 { 0x00000006, 0x00204811, 0x000 },
3896 { 0x00000000, 0x002f0230, 0x000 },
3897 { 0x00000000, 0x0cc00000, 0x5d0 },
3898 { 0x00000000, 0x00200411, 0x000 },
3899 { 0x00000030, 0x00403621, 0x5e3 },
3900 { 0x00000030, 0x0020062d, 0x000 },
3901 { 0x00007e00, 0x00280621, 0x000 },
3902 { 0x00000000, 0x002f0221, 0x000 },
3903 { 0x00000000, 0x0ce00000, 0x5e3 },
3904 { 0x81000000, 0x00204411, 0x000 },
3905 { 0x00000001, 0x00204811, 0x000 },
3906 { 0x0004a092, 0x00604411, 0x68d },
3907 { 0x00000031, 0x00203630, 0x000 },
3908 { 0x0004a093, 0x00604411, 0x68d },
3909 { 0x00000032, 0x00203630, 0x000 },
3910 { 0x0004a2b6, 0x00604411, 0x68d },
3911 { 0x00000033, 0x00203630, 0x000 },
3912 { 0x0004a2ba, 0x00604411, 0x68d },
3913 { 0x00000034, 0x00203630, 0x000 },
3914 { 0x0004a2be, 0x00604411, 0x68d },
3915 { 0x00000035, 0x00203630, 0x000 },
3916 { 0x0004a2c2, 0x00604411, 0x68d },
3917 { 0x00000036, 0x00203630, 0x000 },
3918 { 0x00042004, 0x00604411, 0x68d },
3919 { 0x0001a2a4, 0x00204411, 0x000 },
3920 { 0x0000003f, 0x00204811, 0x000 },
3921 { 0x0000003f, 0x00204811, 0x000 },
3922 { 0x0000003f, 0x00204811, 0x000 },
3923 { 0x0000003f, 0x00204811, 0x000 },
3924 { 0x00000005, 0x00204811, 0x000 },
3925 { 0x0000a1f4, 0x00204411, 0x000 },
3926 { 0x00000000, 0x00204811, 0x000 },
3927 { 0x88000000, 0x00204411, 0x000 },
3928 { 0x00000001, 0x00204811, 0x000 },
3929 { 0x81000000, 0x00204411, 0x000 },
3930 { 0x00000006, 0x00204811, 0x000 },
3931 { 0x00000001, 0x002f0230, 0x000 },
3932 { 0x00000000, 0x0ce00000, 0x62c },
3933 { 0x00000030, 0x0020062d, 0x000 },
3934 { 0x00000000, 0x002f0221, 0x000 },
3935 { 0x00000000, 0x0ce00000, 0x62c },
3936 { 0x81000000, 0x00204411, 0x000 },
3937 { 0x00000001, 0x00204811, 0x000 },
3938 { 0x00007e00, 0x00280621, 0x000 },
3939 { 0x00000000, 0x002f0221, 0x000 },
3940 { 0x00000000, 0x0ce00000, 0x605 },
3941 { 0x0000a092, 0x00204411, 0x000 },
3942 { 0x00000031, 0x00204a2d, 0x000 },
3943 { 0x0000a093, 0x00204411, 0x000 },
3944 { 0x00000032, 0x00204a2d, 0x000 },
3945 { 0x0000a2b6, 0x00204411, 0x000 },
3946 { 0x00000033, 0x00204a2d, 0x000 },
3947 { 0x0000a2ba, 0x00204411, 0x000 },
3948 { 0x00000034, 0x00204a2d, 0x000 },
3949 { 0x0000a2be, 0x00204411, 0x000 },
3950 { 0x00000035, 0x00204a2d, 0x000 },
3951 { 0x0000a2c2, 0x00204411, 0x000 },
3952 { 0x00000036, 0x00204a2d, 0x000 },
3953 { 0x00000030, 0x0020062d, 0x000 },
3954 { 0x000001ff, 0x00280621, 0x000 },
3955 { 0x00000000, 0x002f0221, 0x000 },
3956 { 0x00000000, 0x0ce00000, 0x62b },
3957 { 0x00000000, 0x00210221, 0x000 },
3958 { 0x00000000, 0x14c00000, 0x60e },
3959 { 0x0004a003, 0x00604411, 0x68d },
3960 { 0x0000a003, 0x00204411, 0x000 },
3961 { 0x00000000, 0x00204810, 0x000 },
3962 { 0x00000001, 0x00210621, 0x000 },
3963 { 0x00000000, 0x14c00000, 0x613 },
3964 { 0x0004a010, 0x00604411, 0x68d },
3965 { 0x0000a010, 0x00204411, 0x000 },
3966 { 0x00000000, 0x00204810, 0x000 },
3967 { 0x00000001, 0x00210621, 0x000 },
3968 { 0x00000000, 0x002f0221, 0x000 },
3969 { 0x00000000, 0x0ce00000, 0x62b },
3970 { 0x0004a011, 0x00604411, 0x68d },
3971 { 0x0000a011, 0x00204411, 0x000 },
3972 { 0x00000000, 0x00204810, 0x000 },
3973 { 0x0004a012, 0x00604411, 0x68d },
3974 { 0x0000a012, 0x00204411, 0x000 },
3975 { 0x00000000, 0x00204810, 0x000 },
3976 { 0x0004a013, 0x00604411, 0x68d },
3977 { 0x0000a013, 0x00204411, 0x000 },
3978 { 0x00000000, 0x00204810, 0x000 },
3979 { 0x0004a014, 0x00604411, 0x68d },
3980 { 0x0000a014, 0x00204411, 0x000 },
3981 { 0x00000000, 0x00204810, 0x000 },
3982 { 0x0004a015, 0x00604411, 0x68d },
3983 { 0x0000a015, 0x00204411, 0x000 },
3984 { 0x00000000, 0x00204810, 0x000 },
3985 { 0x0004a016, 0x00604411, 0x68d },
3986 { 0x0000a016, 0x00204411, 0x000 },
3987 { 0x00000000, 0x00204810, 0x000 },
3988 { 0x0004a017, 0x00604411, 0x68d },
3989 { 0x0000a017, 0x00204411, 0x000 },
3990 { 0x00000000, 0x00204810, 0x000 },
3991 { 0x00042004, 0x00604411, 0x68d },
3992 { 0x0000002c, 0x0080062d, 0x000 },
3993 { 0xff000000, 0x00204411, 0x000 },
3994 { 0x00000000, 0x00204811, 0x000 },
3995 { 0x00000001, 0x00204811, 0x000 },
3996 { 0x00000002, 0x00804811, 0x000 },
3997 { 0x00000000, 0x0ee00000, 0x63d },
3998 { 0x00000030, 0x0020062d, 0x000 },
3999 { 0x00000002, 0x00280621, 0x000 },
4000 { 0x00000000, 0x002f0221, 0x000 },
4001 { 0x00000000, 0x0ce00000, 0x63b },
4002 { 0x81000000, 0x00204411, 0x000 },
4003 { 0x00000001, 0x00204811, 0x000 },
4004 { 0x00042004, 0x00604411, 0x68d },
4005 { 0x00001000, 0x00200811, 0x000 },
4006 { 0x0000002b, 0x00203622, 0x000 },
4007 { 0x00000000, 0x00600000, 0x641 },
4008 { 0x00000000, 0x00600000, 0x5c9 },
4009 { 0x98000000, 0x00204411, 0x000 },
4010 { 0x00000000, 0x00804811, 0x000 },
4011 { 0x00000000, 0xc0600000, 0x641 },
4012 { 0x00000000, 0xc0400400, 0x001 },
4013 { 0x0000a2a4, 0x00204411, 0x000 },
4014 { 0x00000022, 0x00204811, 0x000 },
4015 { 0x89000000, 0x00204411, 0x000 },
4016 { 0x00000001, 0x00404811, 0x62d },
4017 { 0x97000000, 0x00204411, 0x000 },
4018 { 0x00000000, 0x00204811, 0x000 },
4019 { 0x8a000000, 0x00204411, 0x000 },
4020 { 0x00000000, 0x00404811, 0x62d },
4021 { 0x00000000, 0x00600000, 0x65c },
4022 { 0x00002010, 0x00204411, 0x000 },
4023 { 0x00008000, 0x00204811, 0x000 },
4024 { 0x0001a2a4, 0xc0204411, 0x000 },
4025 { 0x00000016, 0x00604811, 0x36e },
4026 { 0x00002010, 0x00204411, 0x000 },
4027 { 0x00010000, 0x00204811, 0x000 },
4028 { 0x81000000, 0x00204411, 0x000 },
4029 { 0x00000001, 0x00204811, 0x000 },
4030 { 0x0000217c, 0x00204411, 0x000 },
4031 { 0x09800000, 0x00204811, 0x000 },
4032 { 0xffffffff, 0x00204811, 0x000 },
4033 { 0x00000000, 0x00204811, 0x000 },
4034 { 0x00000000, 0x17000000, 0x000 },
4035 { 0x0004217f, 0x00604411, 0x68d },
4036 { 0x0000001f, 0x00210230, 0x000 },
4037 { 0x00000000, 0x14c00000, 0x000 },
4038 { 0x00000004, 0x00404c11, 0x656 },
4039 { 0x00000000, 0x00400000, 0x000 },
4040 { 0x00000017, 0x00201e2d, 0x000 },
4041 { 0x00000004, 0x00291e27, 0x000 },
4042 { 0x00000017, 0x00803627, 0x000 },
4043 { 0x00000017, 0x00201e2d, 0x000 },
4044 { 0xfffffffb, 0x00281e27, 0x000 },
4045 { 0x00000017, 0x00803627, 0x000 },
4046 { 0x00000017, 0x00201e2d, 0x000 },
4047 { 0x00000008, 0x00291e27, 0x000 },
4048 { 0x00000017, 0x00803627, 0x000 },
4049 { 0x00000017, 0x00201e2d, 0x000 },
4050 { 0xfffffff7, 0x00281e27, 0x000 },
4051 { 0x00000017, 0x00803627, 0x000 },
4052 { 0x00002010, 0x00204411, 0x000 },
4053 { 0x00008000, 0x00204811, 0x000 },
4054 { 0x0001a2a4, 0x00204411, 0x000 },
4055 { 0x00000016, 0x00604811, 0x36e },
4056 { 0x00002010, 0x00204411, 0x000 },
4057 { 0x00010000, 0x00204811, 0x000 },
4058 { 0x0000217c, 0x00204411, 0x000 },
4059 { 0x01800000, 0x00204811, 0x000 },
4060 { 0xffffffff, 0x00204811, 0x000 },
4061 { 0x00000000, 0x00204811, 0x000 },
4062 { 0x00000000, 0x17000000, 0x000 },
4063 { 0x81000000, 0x00204411, 0x000 },
4064 { 0x00000001, 0x00204811, 0x000 },
4065 { 0x0004217f, 0x00604411, 0x68d },
4066 { 0x0000001f, 0x00210230, 0x000 },
4067 { 0x00000000, 0x14c00000, 0x68c },
4068 { 0x00000010, 0x00404c11, 0x672 },
4069 { 0x00000000, 0xc0200400, 0x000 },
4070 { 0x00000000, 0x38c00000, 0x000 },
4071 { 0x0000001d, 0x00200a2d, 0x000 },
4072 { 0x0000001e, 0x00200e2d, 0x000 },
4073 { 0x0000001f, 0x0020122d, 0x000 },
4074 { 0x00000020, 0x0020162d, 0x000 },
4075 { 0x00002169, 0x00204411, 0x000 },
4076 { 0x00000000, 0x00204804, 0x000 },
4077 { 0x00000000, 0x00204805, 0x000 },
4078 { 0x00000000, 0x00204801, 0x000 },
4079 { 0xcafebabe, 0x00204811, 0x000 },
4080 { 0x00000004, 0x00301224, 0x000 },
4081 { 0x00000000, 0x002f0064, 0x000 },
4082 { 0x00000000, 0x0cc00000, 0x68b },
4083 { 0x00000003, 0x00281a22, 0x000 },
4084 { 0x00000008, 0x00221222, 0x000 },
4085 { 0xfffff000, 0x00281224, 0x000 },
4086 { 0x00000000, 0x002910c4, 0x000 },
4087 { 0x0000001f, 0x00403624, 0x000 },
4088 { 0x00000000, 0x00800000, 0x000 },
4089 { 0x00000000, 0x1ac00000, 0x68d },
4090 { 0x9f000000, 0x00204411, 0x000 },
4091 { 0xcafebabe, 0x00204811, 0x000 },
4092 { 0x00000000, 0x1ae00000, 0x690 },
4093 { 0x00000000, 0x00800000, 0x000 },
4094 { 0x00000000, 0x1ac00000, 0x692 },
4095 { 0x9e000000, 0x00204411, 0x000 },
4096 { 0xcafebabe, 0x00204811, 0x000 },
4097 { 0x00000000, 0x1ae00000, 0x695 },
4098 { 0x00000000, 0x00800000, 0x000 },
4099 { 0x00000000, 0x00600000, 0x00b },
4100 { 0x00001000, 0x00600411, 0x315 },
4101 { 0x00000000, 0x00200411, 0x000 },
4102 { 0x00000000, 0x00600811, 0x1b2 },
4103 { 0x0000225c, 0x00204411, 0x000 },
4104 { 0x00000003, 0x00204811, 0x000 },
4105 { 0x00002256, 0x00204411, 0x000 },
4106 { 0x0000001b, 0x00204811, 0x000 },
4107 { 0x0000a1fc, 0x00204411, 0x000 },
4108 { 0x00000001, 0x00204811, 0x000 },
4109 { 0x0001a1fd, 0xc0204411, 0x000 },
4110 { 0x00000021, 0x00201e2d, 0x000 },
4111 { 0x00000010, 0x00221e27, 0x000 },
4112 { 0x00000024, 0x0020222d, 0x000 },
4113 { 0x0000ffff, 0x00282228, 0x000 },
4114 { 0x00000000, 0x00294907, 0x000 },
4115 { 0x00000000, 0x00204811, 0x000 },
4116 { 0x00000022, 0x0020222d, 0x000 },
4117 { 0x0000ffff, 0x00282228, 0x000 },
4118 { 0x00000000, 0x00294907, 0x000 },
4119 { 0x00000000, 0x00204811, 0x000 },
4120 { 0x00000023, 0x00201e2d, 0x000 },
4121 { 0x00000010, 0x00221e27, 0x000 },
4122 { 0x00000000, 0x00294907, 0x000 },
4123 { 0x00000000, 0x00404811, 0x000 },
4124 { 0x00000000, 0x00000000, 0x000 },
4125 { 0x00000000, 0x00000000, 0x000 },
4126 { 0x00000000, 0x00000000, 0x000 },
4127 { 0x00000000, 0x00000000, 0x000 },
4128 { 0x00000000, 0x00000000, 0x000 },
4129 { 0x00000000, 0x00000000, 0x000 },
4130 { 0x00000000, 0x00000000, 0x000 },
4131 { 0x00000000, 0x00000000, 0x000 },
4132 { 0x00000000, 0x00000000, 0x000 },
4133 { 0x00000000, 0x00000000, 0x000 },
4134 { 0x00000000, 0x00000000, 0x000 },
4135 { 0x00000000, 0x00000000, 0x000 },
4136 { 0x00000000, 0x00000000, 0x000 },
4137 { 0x00000000, 0x00000000, 0x000 },
4138 { 0x00000000, 0x00000000, 0x000 },
4139 { 0x00000000, 0x00000000, 0x000 },
4140 { 0x00000000, 0x00000000, 0x000 },
4141 { 0x00000000, 0x00000000, 0x000 },
4142 { 0x00000000, 0x00000000, 0x000 },
4143 { 0x00000000, 0x00000000, 0x000 },
4144 { 0x00000000, 0x00000000, 0x000 },
4145 { 0x00000000, 0x00000000, 0x000 },
4146 { 0x00000000, 0x00000000, 0x000 },
4147 { 0x00000000, 0x00000000, 0x000 },
4148 { 0x00000000, 0x00000000, 0x000 },
4149 { 0x00000000, 0x00000000, 0x000 },
4150 { 0x00000000, 0x00000000, 0x000 },
4151 { 0x00000000, 0x00000000, 0x000 },
4152 { 0x00000000, 0x00000000, 0x000 },
4153 { 0x00000000, 0x00000000, 0x000 },
4154 { 0x00000000, 0x00000000, 0x000 },
4155 { 0x00000000, 0x00000000, 0x000 },
4156 { 0x00000000, 0x00000000, 0x000 },
4157 { 0x00000000, 0x00000000, 0x000 },
4158 { 0x00000000, 0x00000000, 0x000 },
4159 { 0x00000000, 0x00000000, 0x000 },
4160 { 0x00000000, 0x00000000, 0x000 },
4161 { 0x00000000, 0x00000000, 0x000 },
4162 { 0x00000000, 0x00000000, 0x000 },
4163 { 0x00000000, 0x00000000, 0x000 },
4164 { 0x00000000, 0x00000000, 0x000 },
4165 { 0x00000000, 0x00000000, 0x000 },
4166 { 0x00000000, 0x00000000, 0x000 },
4167 { 0x00000000, 0x00000000, 0x000 },
4168 { 0x00000000, 0x00000000, 0x000 },
4169 { 0x00000000, 0x00000000, 0x000 },
4170 { 0x00000000, 0x00000000, 0x000 },
4171 { 0x00000000, 0x00000000, 0x000 },
4172 { 0x00000000, 0x00000000, 0x000 },
4173 { 0x00000000, 0x00000000, 0x000 },
4174 { 0x00000000, 0x00000000, 0x000 },
4175 { 0x00000000, 0x00000000, 0x000 },
4176 { 0x01420502, 0x05c00250, 0x000 },
4177 { 0x01c30168, 0x043f05c0, 0x000 },
4178 { 0x02250209, 0x02500151, 0x000 },
4179 { 0x02230245, 0x02a00241, 0x000 },
4180 { 0x03d705c0, 0x05c005c0, 0x000 },
4181 { 0x0649064a, 0x031f05c0, 0x000 },
4182 { 0x05c005c5, 0x03200340, 0x000 },
4183 { 0x032a0282, 0x03420334, 0x000 },
4184 { 0x05c005c0, 0x05c005c0, 0x000 },
4185 { 0x05c00551, 0x05c005c0, 0x000 },
4186 { 0x03ba05c0, 0x04bb0344, 0x000 },
4187 { 0x049a0450, 0x043d05c0, 0x000 },
4188 { 0x04d005c0, 0x044104dd, 0x000 },
4189 { 0x04500507, 0x03510375, 0x000 },
4190 { 0x05c005c0, 0x05c005c0, 0x000 },
4191 { 0x05c005c0, 0x05c005c0, 0x000 },
4192 { 0x05c005c0, 0x063f05c7, 0x000 },
4193 { 0x05c005c0, 0x000705c0, 0x000 },
4194 { 0x05c005c0, 0x05c005c0, 0x000 },
4195 { 0x05c005c0, 0x05c005c0, 0x000 },
4196 { 0x03f803ed, 0x04080406, 0x000 },
4197 { 0x040e040a, 0x040c0410, 0x000 },
4198 { 0x041c0418, 0x04240420, 0x000 },
4199 { 0x042c0428, 0x04340430, 0x000 },
4200 { 0x05c005c0, 0x043805c0, 0x000 },
4201 { 0x05c005c0, 0x05c005c0, 0x000 },
4202 { 0x05c005c0, 0x05c005c0, 0x000 },
4203 { 0x00020679, 0x06970006, 0x000 },
4204};
4205
4206static const u32 RV610_pfp_microcode[] = {
42070xca0400,
42080xa00000,
42090x7e828b,
42100x7c038b,
42110x8001b8,
42120x7c038b,
42130xd4401e,
42140xee001e,
42150xca0400,
42160xa00000,
42170x7e828b,
42180xc41838,
42190xca2400,
42200xca2800,
42210x9581a8,
42220xc41c3a,
42230xc3c000,
42240xca0800,
42250xca0c00,
42260x7c744b,
42270xc20005,
42280x99c000,
42290xc41c3a,
42300x7c744c,
42310xc0fff0,
42320x042c04,
42330x309002,
42340x7d2500,
42350x351402,
42360x7d350b,
42370x255403,
42380x7cd580,
42390x259c03,
42400x95c004,
42410xd5001b,
42420x7eddc1,
42430x7d9d80,
42440xd6801b,
42450xd5801b,
42460xd4401e,
42470xd5401e,
42480xd6401e,
42490xd6801e,
42500xd4801e,
42510xd4c01e,
42520x9783d3,
42530xd5c01e,
42540xca0800,
42550x80001a,
42560xca0c00,
42570xe4011e,
42580xd4001e,
42590x80000c,
42600xc41838,
42610xe4013e,
42620xd4001e,
42630x80000c,
42640xc41838,
42650xd4401e,
42660xee001e,
42670xca0400,
42680xa00000,
42690x7e828b,
42700xe4011e,
42710xd4001e,
42720xd4401e,
42730xee001e,
42740xca0400,
42750xa00000,
42760x7e828b,
42770xe4013e,
42780xd4001e,
42790xd4401e,
42800xee001e,
42810xca0400,
42820xa00000,
42830x7e828b,
42840xca1800,
42850xd4401e,
42860xd5801e,
42870x800053,
42880xd40075,
42890xd4401e,
42900xca0800,
42910xca0c00,
42920xca1000,
42930xd48019,
42940xd4c018,
42950xd50017,
42960xd4801e,
42970xd4c01e,
42980xd5001e,
42990xe2001e,
43000xca0400,
43010xa00000,
43020x7e828b,
43030xca0800,
43040xd48060,
43050xd4401e,
43060x800000,
43070xd4801e,
43080xca0800,
43090xd48061,
43100xd4401e,
43110x800000,
43120xd4801e,
43130xca0800,
43140xca0c00,
43150xd4401e,
43160xd48016,
43170xd4c016,
43180xd4801e,
43190x8001b8,
43200xd4c01e,
43210xc60843,
43220xca0c00,
43230xca1000,
43240x948004,
43250xca1400,
43260xe420f3,
43270xd42013,
43280xd56065,
43290xd4e01c,
43300xd5201c,
43310xd5601c,
43320x800000,
43330x062001,
43340xc60843,
43350xca0c00,
43360xca1000,
43370x9483f7,
43380xca1400,
43390xe420f3,
43400x800079,
43410xd42013,
43420xc60843,
43430xca0c00,
43440xca1000,
43450x9883ef,
43460xca1400,
43470xd40064,
43480x80008d,
43490x000000,
43500xc41432,
43510xc61843,
43520xc4082f,
43530x954005,
43540xc40c30,
43550xd4401e,
43560x800000,
43570xee001e,
43580x9583f5,
43590xc41031,
43600xd44033,
43610xd52065,
43620xd4a01c,
43630xd4e01c,
43640xd5201c,
43650xe4015e,
43660xd4001e,
43670x800000,
43680x062001,
43690xca1800,
43700x0a2001,
43710xd60076,
43720xc40836,
43730x988007,
43740xc61045,
43750x950110,
43760xd4001f,
43770xd46062,
43780x800000,
43790xd42062,
43800xcc3835,
43810xcc1433,
43820x8401bb,
43830xd40072,
43840xd5401e,
43850x800000,
43860xee001e,
43870xe2001a,
43880x8401bb,
43890xe2001a,
43900xcc104b,
43910xcc0447,
43920x2c9401,
43930x7d098b,
43940x984005,
43950x7d15cb,
43960xd4001a,
43970x8001b8,
43980xd4006d,
43990x344401,
44000xcc0c48,
44010x98403a,
44020xcc2c4a,
44030x958004,
44040xcc0449,
44050x8001b8,
44060xd4001a,
44070xd4c01a,
44080x282801,
44090x8400f0,
44100xcc1003,
44110x98801b,
44120x04380c,
44130x8400f0,
44140xcc1003,
44150x988017,
44160x043808,
44170x8400f0,
44180xcc1003,
44190x988013,
44200x043804,
44210x8400f0,
44220xcc1003,
44230x988014,
44240xcc104c,
44250x9a8009,
44260xcc144d,
44270x9840dc,
44280xd4006d,
44290xcc1848,
44300xd5001a,
44310xd5401a,
44320x8000c9,
44330xd5801a,
44340x96c0d5,
44350xd4006d,
44360x8001b8,
44370xd4006e,
44380x9ac003,
44390xd4006d,
44400xd4006e,
44410x800000,
44420xec007f,
44430x9ac0cc,
44440xd4006d,
44450x8001b8,
44460xd4006e,
44470xcc1403,
44480xcc1803,
44490xcc1c03,
44500x7d9103,
44510x7dd583,
44520x7d190c,
44530x35cc1f,
44540x35701f,
44550x7cf0cb,
44560x7cd08b,
44570x880000,
44580x7e8e8b,
44590x95c004,
44600xd4006e,
44610x8001b8,
44620xd4001a,
44630xd4c01a,
44640xcc0803,
44650xcc0c03,
44660xcc1003,
44670xcc1403,
44680xcc1803,
44690xcc1c03,
44700xcc2403,
44710xcc2803,
44720x35c41f,
44730x36b01f,
44740x7c704b,
44750x34f01f,
44760x7c704b,
44770x35701f,
44780x7c704b,
44790x7d8881,
44800x7dccc1,
44810x7e5101,
44820x7e9541,
44830x7c9082,
44840x7cd4c2,
44850x7c848b,
44860x9ac003,
44870x7c8c8b,
44880x2c8801,
44890x98809e,
44900xd4006d,
44910x98409c,
44920xd4006e,
44930xcc084c,
44940xcc0c4d,
44950xcc1048,
44960xd4801a,
44970xd4c01a,
44980x800101,
44990xd5001a,
45000xcc0832,
45010xd40032,
45020x9482d9,
45030xca0c00,
45040xd4401e,
45050x800000,
45060xd4001e,
45070xe4011e,
45080xd4001e,
45090xca0800,
45100xca0c00,
45110xca1000,
45120xd4401e,
45130xca1400,
45140xd4801e,
45150xd4c01e,
45160xd5001e,
45170xd5401e,
45180xd54034,
45190x800000,
45200xee001e,
45210x280404,
45220xe2001a,
45230xe2001a,
45240xd4401a,
45250xca3800,
45260xcc0803,
45270xcc0c03,
45280xcc0c03,
45290xcc0c03,
45300x9882bd,
45310x000000,
45320x8401bb,
45330xd7a06f,
45340x800000,
45350xee001f,
45360xca0400,
45370xc2ff00,
45380xcc0834,
45390xc13fff,
45400x7c74cb,
45410x7cc90b,
45420x7d010f,
45430x9902b0,
45440x7c738b,
45450x8401bb,
45460xd7a06f,
45470x800000,
45480xee001f,
45490xca0800,
45500x281900,
45510x7d898b,
45520x958014,
45530x281404,
45540xca0c00,
45550xca1000,
45560xca1c00,
45570xca2400,
45580xe2001f,
45590xd4c01a,
45600xd5001a,
45610xd5401a,
45620xcc1803,
45630xcc2c03,
45640xcc2c03,
45650xcc2c03,
45660x7da58b,
45670x7d9c47,
45680x984297,
45690x000000,
45700x800161,
45710xd4c01a,
45720xd4401e,
45730xd4801e,
45740x800000,
45750xee001e,
45760xe4011e,
45770xd4001e,
45780xd4401e,
45790xee001e,
45800xca0400,
45810xa00000,
45820x7e828b,
45830xe4013e,
45840xd4001e,
45850xd4401e,
45860xee001e,
45870xca0400,
45880xa00000,
45890x7e828b,
45900xca0800,
45910x248c06,
45920x0ccc06,
45930x98c006,
45940xcc104e,
45950x990004,
45960xd40073,
45970xe4011e,
45980xd4001e,
45990xd4401e,
46000xd4801e,
46010x800000,
46020xee001e,
46030xca0800,
46040xca0c00,
46050x34d018,
46060x251001,
46070x950021,
46080xc17fff,
46090xca1000,
46100xca1400,
46110xca1800,
46120xd4801d,
46130xd4c01d,
46140x7db18b,
46150xc14202,
46160xc2c001,
46170xd5801d,
46180x34dc0e,
46190x7d5d4c,
46200x7f734c,
46210xd7401e,
46220xd5001e,
46230xd5401e,
46240xc14200,
46250xc2c000,
46260x099c01,
46270x31dc10,
46280x7f5f4c,
46290x7f734c,
46300x042802,
46310x7d8380,
46320xd5a86f,
46330xd58066,
46340xd7401e,
46350xec005e,
46360xc82402,
46370xc82402,
46380x8001b8,
46390xd60076,
46400xd4401e,
46410xd4801e,
46420xd4c01e,
46430x800000,
46440xee001e,
46450x800000,
46460xee001f,
46470xd4001f,
46480x800000,
46490xd4001f,
46500xd4001f,
46510x880000,
46520xd4001f,
46530x000000,
46540x000000,
46550x000000,
46560x000000,
46570x000000,
46580x000000,
46590x000000,
46600x000000,
46610x000000,
46620x000000,
46630x000000,
46640x000000,
46650x000000,
46660x000000,
46670x000000,
46680x000000,
46690x000000,
46700x000000,
46710x000000,
46720x000000,
46730x000000,
46740x000000,
46750x000000,
46760x000000,
46770x000000,
46780x000000,
46790x000000,
46800x000000,
46810x000000,
46820x000000,
46830x000000,
46840x000000,
46850x000000,
46860x000000,
46870x000000,
46880x000000,
46890x000000,
46900x000000,
46910x000000,
46920x000000,
46930x000000,
46940x000000,
46950x000000,
46960x000000,
46970x000000,
46980x000000,
46990x000000,
47000x000000,
47010x000000,
47020x000000,
47030x000000,
47040x000000,
47050x000000,
47060x000000,
47070x000000,
47080x000000,
47090x000000,
47100x000000,
47110x000000,
47120x000000,
47130x000000,
47140x000000,
47150x000000,
47160x000000,
47170x000000,
47180x000000,
47190x010171,
47200x020178,
47210x03008f,
47220x04007f,
47230x050003,
47240x06003f,
47250x070032,
47260x08012c,
47270x090046,
47280x0a0036,
47290x1001b6,
47300x1700a2,
47310x22013a,
47320x230149,
47330x2000b4,
47340x240125,
47350x27004d,
47360x28006a,
47370x2a0060,
47380x2b0052,
47390x2f0065,
47400x320087,
47410x34017f,
47420x3c0156,
47430x3f0072,
47440x41018c,
47450x44012e,
47460x550173,
47470x56017a,
47480x60000b,
47490x610034,
47500x620038,
47510x630038,
47520x640038,
47530x650038,
47540x660038,
47550x670038,
47560x68003a,
47570x690041,
47580x6a0048,
47590x6b0048,
47600x6c0048,
47610x6d0048,
47620x6e0048,
47630x6f0048,
47640x000006,
47650x000006,
47660x000006,
47670x000006,
47680x000006,
47690x000006,
47700x000006,
47710x000006,
47720x000006,
47730x000006,
47740x000006,
47750x000006,
47760x000006,
47770x000006,
47780x000006,
47790x000006,
47800x000006,
47810x000006,
47820x000006,
4783};
4784
4785static const u32 RV620_cp_microcode[][3] = {
4786 { 0x00000000, 0xc0200400, 0x000 },
4787 { 0x00000000, 0x00a0000a, 0x000 },
4788 { 0x0000ffff, 0x00284621, 0x000 },
4789 { 0x00000000, 0xd9004800, 0x000 },
4790 { 0x00000000, 0xc0200400, 0x000 },
4791 { 0x00000000, 0x00a0000a, 0x000 },
4792 { 0x00000000, 0x00e00000, 0x000 },
4793 { 0x00010000, 0xc0294620, 0x000 },
4794 { 0x00000000, 0xd9004800, 0x000 },
4795 { 0x00000000, 0xc0200400, 0x000 },
4796 { 0x00000000, 0x00a0000a, 0x000 },
4797 { 0x81000000, 0x00204411, 0x000 },
4798 { 0x00000001, 0x00204811, 0x000 },
4799 { 0x00042004, 0x00604411, 0x68d },
4800 { 0x00000000, 0x00600000, 0x631 },
4801 { 0x00000000, 0x00600000, 0x645 },
4802 { 0x00000000, 0xc0200800, 0x000 },
4803 { 0x00000f00, 0x00281622, 0x000 },
4804 { 0x00000008, 0x00211625, 0x000 },
4805 { 0x00000018, 0x00203625, 0x000 },
4806 { 0x8d000000, 0x00204411, 0x000 },
4807 { 0x00000004, 0x002f0225, 0x000 },
4808 { 0x00000000, 0x0ce00000, 0x018 },
4809 { 0x00412000, 0x00404811, 0x019 },
4810 { 0x00422000, 0x00204811, 0x000 },
4811 { 0x8e000000, 0x00204411, 0x000 },
4812 { 0x00000028, 0x00204a2d, 0x000 },
4813 { 0x90000000, 0x00204411, 0x000 },
4814 { 0x00000000, 0x00204805, 0x000 },
4815 { 0x0000000c, 0x00211622, 0x000 },
4816 { 0x00000003, 0x00281625, 0x000 },
4817 { 0x00000019, 0x00211a22, 0x000 },
4818 { 0x00000004, 0x00281a26, 0x000 },
4819 { 0x00000000, 0x002914c5, 0x000 },
4820 { 0x00000019, 0x00203625, 0x000 },
4821 { 0x00000000, 0x003a1402, 0x000 },
4822 { 0x00000016, 0x00211625, 0x000 },
4823 { 0x00000003, 0x00281625, 0x000 },
4824 { 0x00000017, 0x00200e2d, 0x000 },
4825 { 0xfffffffc, 0x00280e23, 0x000 },
4826 { 0x00000000, 0x002914a3, 0x000 },
4827 { 0x00000017, 0x00203625, 0x000 },
4828 { 0x00008000, 0x00280e22, 0x000 },
4829 { 0x00000007, 0x00220e23, 0x000 },
4830 { 0x00000000, 0x0029386e, 0x000 },
4831 { 0x20000000, 0x00280e22, 0x000 },
4832 { 0x00000006, 0x00210e23, 0x000 },
4833 { 0x00000000, 0x0029386e, 0x000 },
4834 { 0x00000000, 0x00220222, 0x000 },
4835 { 0x00000000, 0x14e00000, 0x038 },
4836 { 0x00000000, 0x2ee00000, 0x035 },
4837 { 0x00000000, 0x2ce00000, 0x037 },
4838 { 0x00000000, 0x00400e2d, 0x039 },
4839 { 0x00000008, 0x00200e2d, 0x000 },
4840 { 0x00000009, 0x0040122d, 0x046 },
4841 { 0x00000001, 0x00400e2d, 0x039 },
4842 { 0x00000000, 0xc0200c00, 0x000 },
4843 { 0x003ffffc, 0x00281223, 0x000 },
4844 { 0x00000002, 0x00221224, 0x000 },
4845 { 0x0000001f, 0x00211e23, 0x000 },
4846 { 0x00000000, 0x14e00000, 0x03e },
4847 { 0x00000008, 0x00401c11, 0x041 },
4848 { 0x0000000d, 0x00201e2d, 0x000 },
4849 { 0x0000000f, 0x00281e27, 0x000 },
4850 { 0x00000003, 0x00221e27, 0x000 },
4851 { 0x7fc00000, 0x00281a23, 0x000 },
4852 { 0x00000014, 0x00211a26, 0x000 },
4853 { 0x00000001, 0x00331a26, 0x000 },
4854 { 0x00000008, 0x00221a26, 0x000 },
4855 { 0x00000000, 0x00290cc7, 0x000 },
4856 { 0x00000027, 0x00203624, 0x000 },
4857 { 0x00007f00, 0x00281221, 0x000 },
4858 { 0x00001400, 0x002f0224, 0x000 },
4859 { 0x00000000, 0x0ce00000, 0x04b },
4860 { 0x00000001, 0x00290e23, 0x000 },
4861 { 0x0000000e, 0x00203623, 0x000 },
4862 { 0x0000e000, 0x00204411, 0x000 },
4863 { 0xfff80000, 0x00294a23, 0x000 },
4864 { 0x00000000, 0x003a2c02, 0x000 },
4865 { 0x00000002, 0x00220e2b, 0x000 },
4866 { 0xfc000000, 0x00280e23, 0x000 },
4867 { 0x0000000f, 0x00203623, 0x000 },
4868 { 0x00001fff, 0x00294a23, 0x000 },
4869 { 0x00000027, 0x00204a2d, 0x000 },
4870 { 0x00000000, 0x00204811, 0x000 },
4871 { 0x00000029, 0x00200e2d, 0x000 },
4872 { 0x060a0200, 0x00294a23, 0x000 },
4873 { 0x00000000, 0x00204811, 0x000 },
4874 { 0x00000000, 0x00204811, 0x000 },
4875 { 0x00000001, 0x00210222, 0x000 },
4876 { 0x00000000, 0x14e00000, 0x061 },
4877 { 0x00000000, 0x2ee00000, 0x05f },
4878 { 0x00000000, 0x2ce00000, 0x05e },
4879 { 0x00000000, 0x00400e2d, 0x062 },
4880 { 0x00000001, 0x00400e2d, 0x062 },
4881 { 0x0000000a, 0x00200e2d, 0x000 },
4882 { 0x0000000b, 0x0040122d, 0x06a },
4883 { 0x00000000, 0xc0200c00, 0x000 },
4884 { 0x003ffffc, 0x00281223, 0x000 },
4885 { 0x00000002, 0x00221224, 0x000 },
4886 { 0x7fc00000, 0x00281623, 0x000 },
4887 { 0x00000014, 0x00211625, 0x000 },
4888 { 0x00000001, 0x00331625, 0x000 },
4889 { 0x80000000, 0x00280e23, 0x000 },
4890 { 0x00000000, 0x00290ca3, 0x000 },
4891 { 0x3ffffc00, 0x00290e23, 0x000 },
4892 { 0x0000001f, 0x00211e23, 0x000 },
4893 { 0x00000000, 0x14e00000, 0x06d },
4894 { 0x00000100, 0x00401c11, 0x070 },
4895 { 0x0000000d, 0x00201e2d, 0x000 },
4896 { 0x000000f0, 0x00281e27, 0x000 },
4897 { 0x00000004, 0x00221e27, 0x000 },
4898 { 0x81000000, 0x00204411, 0x000 },
4899 { 0x0000000d, 0x00204811, 0x000 },
4900 { 0xfffff0ff, 0x00281a30, 0x000 },
4901 { 0x0000a028, 0x00204411, 0x000 },
4902 { 0x00000000, 0x002948e6, 0x000 },
4903 { 0x0000a018, 0x00204411, 0x000 },
4904 { 0x3fffffff, 0x00284a23, 0x000 },
4905 { 0x0000a010, 0x00204411, 0x000 },
4906 { 0x00000000, 0x00204804, 0x000 },
4907 { 0x00000030, 0x0020162d, 0x000 },
4908 { 0x00000002, 0x00291625, 0x000 },
4909 { 0x00000030, 0x00203625, 0x000 },
4910 { 0x00000025, 0x0020162d, 0x000 },
4911 { 0x00000000, 0x002f00a3, 0x000 },
4912 { 0x00000000, 0x0cc00000, 0x083 },
4913 { 0x00000026, 0x0020162d, 0x000 },
4914 { 0x00000000, 0x002f00a4, 0x000 },
4915 { 0x00000000, 0x0cc00000, 0x084 },
4916 { 0x00000000, 0x00400000, 0x08a },
4917 { 0x00000025, 0x00203623, 0x000 },
4918 { 0x00000026, 0x00203624, 0x000 },
4919 { 0x00000017, 0x00201e2d, 0x000 },
4920 { 0x00000002, 0x00210227, 0x000 },
4921 { 0x00000000, 0x14e00000, 0x08a },
4922 { 0x00000000, 0x00600000, 0x668 },
4923 { 0x00000000, 0x00600000, 0x65c },
4924 { 0x00000002, 0x00210e22, 0x000 },
4925 { 0x00000000, 0x14c00000, 0x08d },
4926 { 0x00000012, 0xc0403620, 0x093 },
4927 { 0x00000000, 0x2ee00000, 0x091 },
4928 { 0x00000000, 0x2ce00000, 0x090 },
4929 { 0x00000002, 0x00400e2d, 0x092 },
4930 { 0x00000003, 0x00400e2d, 0x092 },
4931 { 0x0000000c, 0x00200e2d, 0x000 },
4932 { 0x00000012, 0x00203623, 0x000 },
4933 { 0x00000003, 0x00210e22, 0x000 },
4934 { 0x00000000, 0x14c00000, 0x098 },
4935 { 0x0000a00c, 0x00204411, 0x000 },
4936 { 0x00000000, 0xc0204800, 0x000 },
4937 { 0x00000000, 0xc0404800, 0x0a0 },
4938 { 0x0000a00c, 0x00204411, 0x000 },
4939 { 0x00000000, 0x00204811, 0x000 },
4940 { 0x00000000, 0x2ee00000, 0x09e },
4941 { 0x00000000, 0x2ce00000, 0x09d },
4942 { 0x00000002, 0x00400e2d, 0x09f },
4943 { 0x00000003, 0x00400e2d, 0x09f },
4944 { 0x0000000c, 0x00200e2d, 0x000 },
4945 { 0x00000000, 0x00204803, 0x000 },
4946 { 0x00000000, 0x003a0c02, 0x000 },
4947 { 0x003f0000, 0x00280e23, 0x000 },
4948 { 0x00000010, 0x00210e23, 0x000 },
4949 { 0x00000011, 0x00203623, 0x000 },
4950 { 0x0000001e, 0x0021022b, 0x000 },
4951 { 0x00000000, 0x14c00000, 0x0a7 },
4952 { 0x00000016, 0xc0203620, 0x000 },
4953 { 0x0000001f, 0x0021022b, 0x000 },
4954 { 0x00000000, 0x14c00000, 0x0aa },
4955 { 0x00000015, 0xc0203620, 0x000 },
4956 { 0x00000008, 0x00210e2b, 0x000 },
4957 { 0x0000007f, 0x00280e23, 0x000 },
4958 { 0x00000000, 0x002f0223, 0x000 },
4959 { 0x00000000, 0x0ce00000, 0x0e1 },
4960 { 0x00000000, 0x27000000, 0x000 },
4961 { 0x00000000, 0x00600000, 0x2a3 },
4962 { 0x00000001, 0x002f0223, 0x000 },
4963 { 0x00000000, 0x0ae00000, 0x0b3 },
4964 { 0x00000000, 0x00600000, 0x13a },
4965 { 0x81000000, 0x00204411, 0x000 },
4966 { 0x00000006, 0x00204811, 0x000 },
4967 { 0x0000000c, 0x00221e30, 0x000 },
4968 { 0x99800000, 0x00204411, 0x000 },
4969 { 0x00000004, 0x0020122d, 0x000 },
4970 { 0x00000008, 0x00221224, 0x000 },
4971 { 0x00000010, 0x00201811, 0x000 },
4972 { 0x00000000, 0x00291ce4, 0x000 },
4973 { 0x00000000, 0x00604807, 0x12f },
4974 { 0x9b000000, 0x00204411, 0x000 },
4975 { 0x00000000, 0x00204802, 0x000 },
4976 { 0x9c000000, 0x00204411, 0x000 },
4977 { 0x00000000, 0x0033146f, 0x000 },
4978 { 0x00000001, 0x00333e23, 0x000 },
4979 { 0x00000000, 0xd9004800, 0x000 },
4980 { 0x00000000, 0x00203c05, 0x000 },
4981 { 0x81000000, 0x00204411, 0x000 },
4982 { 0x0000000e, 0x00204811, 0x000 },
4983 { 0x00000000, 0x00201010, 0x000 },
4984 { 0x0000e007, 0x00204411, 0x000 },
4985 { 0x0000000f, 0x0021022b, 0x000 },
4986 { 0x00000000, 0x14c00000, 0x0cb },
4987 { 0x00f8ff08, 0x00204811, 0x000 },
4988 { 0x98000000, 0x00404811, 0x0dc },
4989 { 0x000000f0, 0x00280e22, 0x000 },
4990 { 0x000000a0, 0x002f0223, 0x000 },
4991 { 0x00000000, 0x0cc00000, 0x0da },
4992 { 0x00000011, 0x00200e2d, 0x000 },
4993 { 0x00000001, 0x002f0223, 0x000 },
4994 { 0x00000000, 0x0ce00000, 0x0d5 },
4995 { 0x00000002, 0x002f0223, 0x000 },
4996 { 0x00000000, 0x0ce00000, 0x0d4 },
4997 { 0x00003f00, 0x00400c11, 0x0d6 },
4998 { 0x00001f00, 0x00400c11, 0x0d6 },
4999 { 0x00000f00, 0x00200c11, 0x000 },
5000 { 0x00380009, 0x00294a23, 0x000 },
5001 { 0x3f000000, 0x00280e2b, 0x000 },
5002 { 0x00000002, 0x00220e23, 0x000 },
5003 { 0x00000007, 0x00494a23, 0x0dc },
5004 { 0x00380f09, 0x00204811, 0x000 },
5005 { 0x68000007, 0x00204811, 0x000 },
5006 { 0x00000008, 0x00214a27, 0x000 },
5007 { 0x00000000, 0x00204811, 0x000 },
5008 { 0x060a0200, 0x00294a24, 0x000 },
5009 { 0x00000000, 0x00204811, 0x000 },
5010 { 0x00000000, 0x00204811, 0x000 },
5011 { 0x0000a202, 0x00204411, 0x000 },
5012 { 0x00ff0000, 0x00280e22, 0x000 },
5013 { 0x00000080, 0x00294a23, 0x000 },
5014 { 0x00000027, 0x00200e2d, 0x000 },
5015 { 0x00000026, 0x0020122d, 0x000 },
5016 { 0x00000000, 0x002f0083, 0x000 },
5017 { 0x00000000, 0x0ce00000, 0x0ea },
5018 { 0x00000000, 0x00600000, 0x662 },
5019 { 0x00000000, 0x00400000, 0x0eb },
5020 { 0x00000000, 0x00600000, 0x665 },
5021 { 0x00000007, 0x0020222d, 0x000 },
5022 { 0x00000005, 0x00220e22, 0x000 },
5023 { 0x00100000, 0x00280e23, 0x000 },
5024 { 0x00000000, 0x00292068, 0x000 },
5025 { 0x00000000, 0x003a0c02, 0x000 },
5026 { 0x000000ef, 0x00280e23, 0x000 },
5027 { 0x00000000, 0x00292068, 0x000 },
5028 { 0x00000017, 0x00200e2d, 0x000 },
5029 { 0x00000003, 0x00210223, 0x000 },
5030 { 0x00000000, 0x14e00000, 0x0f8 },
5031 { 0x0000000b, 0x00210228, 0x000 },
5032 { 0x00000000, 0x14c00000, 0x0f8 },
5033 { 0x00000400, 0x00292228, 0x000 },
5034 { 0x00000014, 0x00203628, 0x000 },
5035 { 0x0000001c, 0x00210e22, 0x000 },
5036 { 0x00000000, 0x14c00000, 0x0fd },
5037 { 0x0000a30c, 0x00204411, 0x000 },
5038 { 0x00000000, 0x00204811, 0x000 },
5039 { 0x0000001e, 0x00210e22, 0x000 },
5040 { 0x00000000, 0x14c00000, 0x10b },
5041 { 0x0000a30f, 0x00204411, 0x000 },
5042 { 0x00000011, 0x00200e2d, 0x000 },
5043 { 0x00000001, 0x002f0223, 0x000 },
5044 { 0x00000000, 0x0cc00000, 0x104 },
5045 { 0xffffffff, 0x00404811, 0x10b },
5046 { 0x00000002, 0x002f0223, 0x000 },
5047 { 0x00000000, 0x0cc00000, 0x107 },
5048 { 0x0000ffff, 0x00404811, 0x10b },
5049 { 0x00000004, 0x002f0223, 0x000 },
5050 { 0x00000000, 0x0cc00000, 0x10a },
5051 { 0x000000ff, 0x00404811, 0x10b },
5052 { 0x00000001, 0x00204811, 0x000 },
5053 { 0x0002c400, 0x00204411, 0x000 },
5054 { 0x0000001f, 0x00210e22, 0x000 },
5055 { 0x00000000, 0x14c00000, 0x112 },
5056 { 0x00000010, 0x40210e20, 0x000 },
5057 { 0x00000013, 0x00203623, 0x000 },
5058 { 0x00000018, 0x40224a20, 0x000 },
5059 { 0x00000010, 0xc0424a20, 0x114 },
5060 { 0x00000000, 0x00200c11, 0x000 },
5061 { 0x00000013, 0x00203623, 0x000 },
5062 { 0x00000000, 0x00204811, 0x000 },
5063 { 0x00000000, 0x00204811, 0x000 },
5064 { 0x0000000a, 0x00201011, 0x000 },
5065 { 0x00000000, 0x002f0224, 0x000 },
5066 { 0x00000000, 0x0ce00000, 0x11b },
5067 { 0x00000000, 0x00204811, 0x000 },
5068 { 0x00000001, 0x00531224, 0x117 },
5069 { 0xffbfffff, 0x00283a2e, 0x000 },
5070 { 0x0000001b, 0x00210222, 0x000 },
5071 { 0x00000000, 0x14c00000, 0x12e },
5072 { 0x81000000, 0x00204411, 0x000 },
5073 { 0x0000000d, 0x00204811, 0x000 },
5074 { 0x00000018, 0x00220e30, 0x000 },
5075 { 0xfc000000, 0x00280e23, 0x000 },
5076 { 0x81000000, 0x00204411, 0x000 },
5077 { 0x0000000e, 0x00204811, 0x000 },
5078 { 0x00000000, 0x00201010, 0x000 },
5079 { 0x0000e00e, 0x00204411, 0x000 },
5080 { 0x07f8ff08, 0x00204811, 0x000 },
5081 { 0x00000000, 0x00294a23, 0x000 },
5082 { 0x0000001c, 0x00201e2d, 0x000 },
5083 { 0x00000008, 0x00214a27, 0x000 },
5084 { 0x00000000, 0x00204811, 0x000 },
5085 { 0x060a0200, 0x00294a24, 0x000 },
5086 { 0x00000000, 0x00204811, 0x000 },
5087 { 0x00000000, 0x00204811, 0x000 },
5088 { 0x00000000, 0x00800000, 0x000 },
5089 { 0x81000000, 0x00204411, 0x000 },
5090 { 0x00000001, 0x00204811, 0x000 },
5091 { 0x0000217c, 0x00204411, 0x000 },
5092 { 0x00800000, 0x00204811, 0x000 },
5093 { 0x00000000, 0x00204806, 0x000 },
5094 { 0x00000008, 0x00214a27, 0x000 },
5095 { 0x00000000, 0x17000000, 0x000 },
5096 { 0x0004217f, 0x00604411, 0x68d },
5097 { 0x0000001f, 0x00210230, 0x000 },
5098 { 0x00000000, 0x14c00000, 0x68c },
5099 { 0x00000004, 0x00404c11, 0x135 },
5100 { 0x81000000, 0x00204411, 0x000 },
5101 { 0x00000001, 0x00204811, 0x000 },
5102 { 0x000021f8, 0x00204411, 0x000 },
5103 { 0x0000001c, 0x00204811, 0x000 },
5104 { 0x000421f9, 0x00604411, 0x68d },
5105 { 0x00000011, 0x00210230, 0x000 },
5106 { 0x00000000, 0x14e00000, 0x13c },
5107 { 0x00000000, 0x00800000, 0x000 },
5108 { 0x00000000, 0x00600000, 0x00b },
5109 { 0x00000000, 0x00600411, 0x315 },
5110 { 0x00000000, 0x00200411, 0x000 },
5111 { 0x00000000, 0x00600811, 0x1b2 },
5112 { 0x00000000, 0x00600000, 0x160 },
5113 { 0x0000ffff, 0x40280e20, 0x000 },
5114 { 0x00000010, 0xc0211220, 0x000 },
5115 { 0x0000ffff, 0x40280620, 0x000 },
5116 { 0x00000010, 0xc0210a20, 0x000 },
5117 { 0x00000000, 0x00341461, 0x000 },
5118 { 0x00000000, 0x00741882, 0x2bb },
5119 { 0x0001a1fd, 0x00604411, 0x2e0 },
5120 { 0x00003fff, 0x002f022f, 0x000 },
5121 { 0x00000000, 0x0cc00000, 0x147 },
5122 { 0x00000000, 0xc0400400, 0x001 },
5123 { 0x00000000, 0x00600000, 0x00b },
5124 { 0x00000000, 0x00600411, 0x315 },
5125 { 0x00000000, 0x00200411, 0x000 },
5126 { 0x00000000, 0x00600811, 0x1b2 },
5127 { 0x00003fff, 0x002f022f, 0x000 },
5128 { 0x00000000, 0x0ce00000, 0x000 },
5129 { 0x00000000, 0x00600000, 0x160 },
5130 { 0x00000010, 0x40210e20, 0x000 },
5131 { 0x0000ffff, 0xc0281220, 0x000 },
5132 { 0x00000010, 0x40211620, 0x000 },
5133 { 0x0000ffff, 0xc0681a20, 0x2bb },
5134 { 0x0001a1fd, 0x00604411, 0x2e0 },
5135 { 0x00003fff, 0x002f022f, 0x000 },
5136 { 0x00000000, 0x0cc00000, 0x158 },
5137 { 0x00000000, 0xc0400400, 0x001 },
5138 { 0x0000225c, 0x00204411, 0x000 },
5139 { 0x00000001, 0x00300a2f, 0x000 },
5140 { 0x00000001, 0x00210a22, 0x000 },
5141 { 0x00000003, 0x00384a22, 0x000 },
5142 { 0x00002256, 0x00204411, 0x000 },
5143 { 0x0000001a, 0x00204811, 0x000 },
5144 { 0x0000a1fc, 0x00204411, 0x000 },
5145 { 0x00000001, 0x00804811, 0x000 },
5146 { 0x00000000, 0x00600000, 0x00b },
5147 { 0x00000000, 0x00600000, 0x18f },
5148 { 0x00000000, 0x00600000, 0x1a0 },
5149 { 0x00003fff, 0x002f022f, 0x000 },
5150 { 0x00000000, 0x0ce00000, 0x000 },
5151 { 0x00000000, 0x00202c08, 0x000 },
5152 { 0x00000000, 0x00202411, 0x000 },
5153 { 0x00000000, 0x00202811, 0x000 },
5154 { 0x00002256, 0x00204411, 0x000 },
5155 { 0x00000016, 0x00204811, 0x000 },
5156 { 0x0000225c, 0x00204411, 0x000 },
5157 { 0x00000003, 0x00204811, 0x000 },
5158 { 0x93800000, 0x00204411, 0x000 },
5159 { 0x00000002, 0x00221e29, 0x000 },
5160 { 0x00000000, 0x007048eb, 0x19c },
5161 { 0x00000000, 0x00600000, 0x2bb },
5162 { 0x00000001, 0x40330620, 0x000 },
5163 { 0x00000000, 0xc0302409, 0x000 },
5164 { 0x00003fff, 0x002f022f, 0x000 },
5165 { 0x00000000, 0x0ce00000, 0x000 },
5166 { 0x00000000, 0x00600000, 0x2a3 },
5167 { 0x00000000, 0x002f0221, 0x000 },
5168 { 0x00000000, 0x0ae00000, 0x181 },
5169 { 0x00000000, 0x00600000, 0x13a },
5170 { 0x00000000, 0x00400000, 0x186 },
5171 { 0x95000000, 0x00204411, 0x000 },
5172 { 0x00000000, 0x002f0221, 0x000 },
5173 { 0x00000000, 0x0ce00000, 0x186 },
5174 { 0x00000000, 0xc0204800, 0x000 },
5175 { 0x00000001, 0x00530621, 0x182 },
5176 { 0x92000000, 0x00204411, 0x000 },
5177 { 0x00000000, 0xc0604800, 0x197 },
5178 { 0x0001a1fd, 0x00204411, 0x000 },
5179 { 0x00000011, 0x0020062d, 0x000 },
5180 { 0x00000000, 0x0078042a, 0x2fb },
5181 { 0x00000000, 0x00202809, 0x000 },
5182 { 0x00003fff, 0x002f022f, 0x000 },
5183 { 0x00000000, 0x0cc00000, 0x174 },
5184 { 0x00000000, 0xc0400400, 0x001 },
5185 { 0x00000210, 0x00600411, 0x315 },
5186 { 0x00003fff, 0x002f022f, 0x000 },
5187 { 0x00000000, 0x0ce00000, 0x194 },
5188 { 0x00000015, 0xc0203620, 0x000 },
5189 { 0x00000016, 0xc0203620, 0x000 },
5190 { 0x3f800000, 0x00200411, 0x000 },
5191 { 0x46000000, 0x00600811, 0x1b2 },
5192 { 0x00000000, 0x00800000, 0x000 },
5193 { 0x0000a1fc, 0x00204411, 0x000 },
5194 { 0x00003fff, 0x002f022f, 0x000 },
5195 { 0x00000000, 0x0cc00000, 0x19b },
5196 { 0x00000001, 0x00804811, 0x000 },
5197 { 0x00000021, 0x00804811, 0x000 },
5198 { 0x0000ffff, 0x40280e20, 0x000 },
5199 { 0x00000010, 0xc0211220, 0x000 },
5200 { 0x0000ffff, 0x40281620, 0x000 },
5201 { 0x00000010, 0xc0811a20, 0x000 },
5202 { 0x81000000, 0x00204411, 0x000 },
5203 { 0x00000006, 0x00204811, 0x000 },
5204 { 0x00000008, 0x00221e30, 0x000 },
5205 { 0x00000029, 0x00201a2d, 0x000 },
5206 { 0x0000e000, 0x00204411, 0x000 },
5207 { 0xfffbff09, 0x00204811, 0x000 },
5208 { 0x0000000f, 0x0020222d, 0x000 },
5209 { 0x00001fff, 0x00294a28, 0x000 },
5210 { 0x00000006, 0x0020222d, 0x000 },
5211 { 0x00000000, 0x002920e8, 0x000 },
5212 { 0x00000000, 0x00204808, 0x000 },
5213 { 0x00000000, 0x00204811, 0x000 },
5214 { 0x060a0200, 0x00294a26, 0x000 },
5215 { 0x00000000, 0x00204811, 0x000 },
5216 { 0x00000000, 0x00204811, 0x000 },
5217 { 0x00000100, 0x00201811, 0x000 },
5218 { 0x00000008, 0x00621e28, 0x12f },
5219 { 0x00000008, 0x00822228, 0x000 },
5220 { 0x0002c000, 0x00204411, 0x000 },
5221 { 0x00000015, 0x00600e2d, 0x1bd },
5222 { 0x00000016, 0x00600e2d, 0x1bd },
5223 { 0x0000c008, 0x00204411, 0x000 },
5224 { 0x00000017, 0x00200e2d, 0x000 },
5225 { 0x00000000, 0x14c00000, 0x1b9 },
5226 { 0x00000000, 0x00200411, 0x000 },
5227 { 0x00000000, 0x00204801, 0x000 },
5228 { 0x39000000, 0x00204811, 0x000 },
5229 { 0x00000000, 0x00204811, 0x000 },
5230 { 0x00000000, 0x00804802, 0x000 },
5231 { 0x00000018, 0x00202e2d, 0x000 },
5232 { 0x00000000, 0x003b0d63, 0x000 },
5233 { 0x00000008, 0x00224a23, 0x000 },
5234 { 0x00000010, 0x00224a23, 0x000 },
5235 { 0x00000018, 0x00224a23, 0x000 },
5236 { 0x00000000, 0x00804803, 0x000 },
5237 { 0x00000000, 0x00600000, 0x00b },
5238 { 0x00001000, 0x00600411, 0x315 },
5239 { 0x00000000, 0x00200411, 0x000 },
5240 { 0x00000000, 0x00600811, 0x1b2 },
5241 { 0x00000007, 0x0021062f, 0x000 },
5242 { 0x00000013, 0x00200a2d, 0x000 },
5243 { 0x00000001, 0x00202c11, 0x000 },
5244 { 0x0000ffff, 0x40282220, 0x000 },
5245 { 0x0000000f, 0x00262228, 0x000 },
5246 { 0x00000010, 0x40212620, 0x000 },
5247 { 0x0000000f, 0x00262629, 0x000 },
5248 { 0x00000000, 0x00202802, 0x000 },
5249 { 0x00002256, 0x00204411, 0x000 },
5250 { 0x0000001b, 0x00204811, 0x000 },
5251 { 0x00000000, 0x002f0221, 0x000 },
5252 { 0x00000000, 0x0ce00000, 0x1e0 },
5253 { 0x0000225c, 0x00204411, 0x000 },
5254 { 0x00000081, 0x00204811, 0x000 },
5255 { 0x0000a1fc, 0x00204411, 0x000 },
5256 { 0x00000001, 0x00204811, 0x000 },
5257 { 0x00000080, 0x00201c11, 0x000 },
5258 { 0x00000000, 0x002f0227, 0x000 },
5259 { 0x00000000, 0x0ce00000, 0x1dc },
5260 { 0x00000000, 0x00600000, 0x1e9 },
5261 { 0x00000001, 0x00531e27, 0x1d8 },
5262 { 0x00000001, 0x00202c11, 0x000 },
5263 { 0x0000001f, 0x00280a22, 0x000 },
5264 { 0x0000001f, 0x00282a2a, 0x000 },
5265 { 0x00000001, 0x00530621, 0x1d1 },
5266 { 0x0000225c, 0x00204411, 0x000 },
5267 { 0x00000002, 0x00304a2f, 0x000 },
5268 { 0x0000a1fc, 0x00204411, 0x000 },
5269 { 0x00000001, 0x00204811, 0x000 },
5270 { 0x00000001, 0x00301e2f, 0x000 },
5271 { 0x00000000, 0x002f0227, 0x000 },
5272 { 0x00000000, 0x0ce00000, 0x000 },
5273 { 0x00000000, 0x00600000, 0x1e9 },
5274 { 0x00000001, 0x00531e27, 0x1e5 },
5275 { 0x0000ffff, 0x40280e20, 0x000 },
5276 { 0x0000000f, 0x00260e23, 0x000 },
5277 { 0x00000010, 0xc0211220, 0x000 },
5278 { 0x0000000f, 0x00261224, 0x000 },
5279 { 0x00000000, 0x00201411, 0x000 },
5280 { 0x00000000, 0x00601811, 0x2bb },
5281 { 0x0001a1fd, 0x00204411, 0x000 },
5282 { 0x00000000, 0x002f022b, 0x000 },
5283 { 0x00000000, 0x0ce00000, 0x1f8 },
5284 { 0x00000010, 0x00221628, 0x000 },
5285 { 0xffff0000, 0x00281625, 0x000 },
5286 { 0x0000ffff, 0x00281a29, 0x000 },
5287 { 0x00000000, 0x002948c5, 0x000 },
5288 { 0x00000000, 0x0020480a, 0x000 },
5289 { 0x00000000, 0x00202c11, 0x000 },
5290 { 0x00000010, 0x00221623, 0x000 },
5291 { 0xffff0000, 0x00281625, 0x000 },
5292 { 0x0000ffff, 0x00281a24, 0x000 },
5293 { 0x00000000, 0x002948c5, 0x000 },
5294 { 0x00000000, 0x00731503, 0x205 },
5295 { 0x00000000, 0x00201805, 0x000 },
5296 { 0x00000000, 0x00731524, 0x205 },
5297 { 0x00000000, 0x002d14c5, 0x000 },
5298 { 0x00000000, 0x003008a2, 0x000 },
5299 { 0x00000000, 0x00204802, 0x000 },
5300 { 0x00000000, 0x00202802, 0x000 },
5301 { 0x00000000, 0x00202003, 0x000 },
5302 { 0x00000000, 0x00802404, 0x000 },
5303 { 0x0000000f, 0x00210225, 0x000 },
5304 { 0x00000000, 0x14c00000, 0x68c },
5305 { 0x00000000, 0x002b1405, 0x000 },
5306 { 0x00000001, 0x00901625, 0x000 },
5307 { 0x00000000, 0x00600000, 0x00b },
5308 { 0x00000000, 0x00600411, 0x315 },
5309 { 0x00000000, 0x00200411, 0x000 },
5310 { 0x00000000, 0x00600811, 0x1b2 },
5311 { 0x00002256, 0x00204411, 0x000 },
5312 { 0x0000001a, 0x00294a22, 0x000 },
5313 { 0x00000000, 0xc0200000, 0x000 },
5314 { 0x00003fff, 0x002f022f, 0x000 },
5315 { 0x00000000, 0x0ce00000, 0x000 },
5316 { 0x00000000, 0xc0200400, 0x000 },
5317 { 0x0000225c, 0x00204411, 0x000 },
5318 { 0x00000003, 0x00384a21, 0x000 },
5319 { 0x0000a1fc, 0x00204411, 0x000 },
5320 { 0x00000001, 0x00204811, 0x000 },
5321 { 0x0000ffff, 0x40281220, 0x000 },
5322 { 0x00000010, 0xc0211a20, 0x000 },
5323 { 0x0000ffff, 0x40280e20, 0x000 },
5324 { 0x00000010, 0xc0211620, 0x000 },
5325 { 0x00000000, 0x00741465, 0x2bb },
5326 { 0x0001a1fd, 0x00604411, 0x2e0 },
5327 { 0x00000001, 0x00330621, 0x000 },
5328 { 0x00000000, 0x002f0221, 0x000 },
5329 { 0x00000000, 0x0cc00000, 0x219 },
5330 { 0x00003fff, 0x002f022f, 0x000 },
5331 { 0x00000000, 0x0cc00000, 0x212 },
5332 { 0x00000000, 0xc0400400, 0x001 },
5333 { 0x00000000, 0x00600000, 0x645 },
5334 { 0x00000000, 0x0040040f, 0x213 },
5335 { 0x00000000, 0x00600000, 0x631 },
5336 { 0x00000000, 0x00600000, 0x645 },
5337 { 0x00000210, 0x00600411, 0x315 },
5338 { 0x00000000, 0x00600000, 0x1a0 },
5339 { 0x00000000, 0x00600000, 0x19c },
5340 { 0x00000000, 0x00600000, 0x2bb },
5341 { 0x00000000, 0x00600000, 0x2a3 },
5342 { 0x93800000, 0x00204411, 0x000 },
5343 { 0x00000000, 0x00204808, 0x000 },
5344 { 0x00000000, 0x002f022f, 0x000 },
5345 { 0x00000000, 0x0ae00000, 0x232 },
5346 { 0x00000000, 0x00600000, 0x13a },
5347 { 0x00000000, 0x00400000, 0x236 },
5348 { 0x95000000, 0x00204411, 0x000 },
5349 { 0x00000000, 0x002f022f, 0x000 },
5350 { 0x00000000, 0x0ce00000, 0x236 },
5351 { 0x00000000, 0xc0404800, 0x233 },
5352 { 0x92000000, 0x00204411, 0x000 },
5353 { 0x00000000, 0xc0204800, 0x000 },
5354 { 0x00002256, 0x00204411, 0x000 },
5355 { 0x00000016, 0x00204811, 0x000 },
5356 { 0x0000225c, 0x00204411, 0x000 },
5357 { 0x00000003, 0x00204811, 0x000 },
5358 { 0x0000a1fc, 0x00204411, 0x000 },
5359 { 0x00000001, 0x00204811, 0x000 },
5360 { 0x0001a1fd, 0x00204411, 0x000 },
5361 { 0x00000000, 0x00600411, 0x2fb },
5362 { 0x00000000, 0xc0400400, 0x001 },
5363 { 0x00000000, 0x00600000, 0x631 },
5364 { 0x0000a00c, 0x00204411, 0x000 },
5365 { 0x00000000, 0xc0204800, 0x000 },
5366 { 0x00000000, 0xc0404800, 0x000 },
5367 { 0x00000000, 0x00600000, 0x00b },
5368 { 0x00000018, 0x40210a20, 0x000 },
5369 { 0x00000003, 0x002f0222, 0x000 },
5370 { 0x00000000, 0x0ae00000, 0x24c },
5371 { 0x00000014, 0x0020222d, 0x000 },
5372 { 0x00080101, 0x00292228, 0x000 },
5373 { 0x00000014, 0x00203628, 0x000 },
5374 { 0x0000a30c, 0x00204411, 0x000 },
5375 { 0x00000000, 0xc0204800, 0x000 },
5376 { 0x00000000, 0xc0204800, 0x000 },
5377 { 0x00000000, 0xc0404800, 0x251 },
5378 { 0x00000000, 0x00600000, 0x00b },
5379 { 0x00000010, 0x00600411, 0x315 },
5380 { 0x3f800000, 0x00200411, 0x000 },
5381 { 0x00000000, 0x00600811, 0x1b2 },
5382 { 0x0000225c, 0x00204411, 0x000 },
5383 { 0x00000003, 0x00204811, 0x000 },
5384 { 0x00000000, 0x00600000, 0x27c },
5385 { 0x00000017, 0x00201e2d, 0x000 },
5386 { 0x00000001, 0x00211e27, 0x000 },
5387 { 0x00000000, 0x14e00000, 0x26a },
5388 { 0x00000012, 0x00201e2d, 0x000 },
5389 { 0x0000ffff, 0x00281e27, 0x000 },
5390 { 0x00000000, 0x00341c27, 0x000 },
5391 { 0x00000000, 0x12c00000, 0x25f },
5392 { 0x00000000, 0x00201c11, 0x000 },
5393 { 0x00000000, 0x002f00e5, 0x000 },
5394 { 0x00000000, 0x08c00000, 0x262 },
5395 { 0x00000000, 0x00201407, 0x000 },
5396 { 0x00000012, 0x00201e2d, 0x000 },
5397 { 0x00000010, 0x00211e27, 0x000 },
5398 { 0x00000000, 0x00341c47, 0x000 },
5399 { 0x00000000, 0x12c00000, 0x267 },
5400 { 0x00000000, 0x00201c11, 0x000 },
5401 { 0x00000000, 0x002f00e6, 0x000 },
5402 { 0x00000000, 0x08c00000, 0x26a },
5403 { 0x00000000, 0x00201807, 0x000 },
5404 { 0x00000000, 0x00600000, 0x2c1 },
5405 { 0x00002256, 0x00204411, 0x000 },
5406 { 0x00000000, 0x00342023, 0x000 },
5407 { 0x00000000, 0x12c00000, 0x272 },
5408 { 0x00000000, 0x00342044, 0x000 },
5409 { 0x00000000, 0x12c00000, 0x271 },
5410 { 0x00000016, 0x00404811, 0x276 },
5411 { 0x00000018, 0x00404811, 0x276 },
5412 { 0x00000000, 0x00342044, 0x000 },
5413 { 0x00000000, 0x12c00000, 0x275 },
5414 { 0x00000017, 0x00404811, 0x276 },
5415 { 0x00000019, 0x00204811, 0x000 },
5416 { 0x0000a1fc, 0x00204411, 0x000 },
5417 { 0x00000001, 0x00204811, 0x000 },
5418 { 0x0001a1fd, 0x00604411, 0x2e9 },
5419 { 0x00003fff, 0x002f022f, 0x000 },
5420 { 0x00000000, 0x0cc00000, 0x256 },
5421 { 0x00000000, 0xc0400400, 0x001 },
5422 { 0x00000010, 0x40210620, 0x000 },
5423 { 0x0000ffff, 0xc0280a20, 0x000 },
5424 { 0x00000010, 0x40210e20, 0x000 },
5425 { 0x0000ffff, 0xc0281220, 0x000 },
5426 { 0x00000010, 0x40211620, 0x000 },
5427 { 0x0000ffff, 0xc0881a20, 0x000 },
5428 { 0x81000000, 0x00204411, 0x000 },
5429 { 0x00000001, 0x00204811, 0x000 },
5430 { 0x00042004, 0x00604411, 0x68d },
5431 { 0x00000000, 0x00600000, 0x631 },
5432 { 0x00000000, 0xc0600000, 0x2a3 },
5433 { 0x00000005, 0x00200a2d, 0x000 },
5434 { 0x00000008, 0x00220a22, 0x000 },
5435 { 0x0000002b, 0x00201a2d, 0x000 },
5436 { 0x0000001c, 0x00201e2d, 0x000 },
5437 { 0x00007000, 0x00281e27, 0x000 },
5438 { 0x00000000, 0x00311ce6, 0x000 },
5439 { 0x0000002a, 0x00201a2d, 0x000 },
5440 { 0x0000000c, 0x00221a26, 0x000 },
5441 { 0x00000000, 0x002f00e6, 0x000 },
5442 { 0x00000000, 0x06e00000, 0x292 },
5443 { 0x00000000, 0x00201c11, 0x000 },
5444 { 0x00000000, 0x00200c11, 0x000 },
5445 { 0x0000002b, 0x00203623, 0x000 },
5446 { 0x00000010, 0x00201811, 0x000 },
5447 { 0x00000000, 0x00691ce2, 0x12f },
5448 { 0x93800000, 0x00204411, 0x000 },
5449 { 0x00000000, 0x00204807, 0x000 },
5450 { 0x95000000, 0x00204411, 0x000 },
5451 { 0x00000000, 0x002f022f, 0x000 },
5452 { 0x00000000, 0x0ce00000, 0x29d },
5453 { 0x00000001, 0x00333e2f, 0x000 },
5454 { 0x00000000, 0xd9004800, 0x000 },
5455 { 0x92000000, 0x00204411, 0x000 },
5456 { 0x00000000, 0xc0204800, 0x000 },
5457 { 0x0000001c, 0x00403627, 0x000 },
5458 { 0x0000000c, 0xc0220a20, 0x000 },
5459 { 0x00000029, 0x00203622, 0x000 },
5460 { 0x00000028, 0xc0403620, 0x000 },
5461 { 0x0000a2a4, 0x00204411, 0x000 },
5462 { 0x00000009, 0x00204811, 0x000 },
5463 { 0xa1000000, 0x00204411, 0x000 },
5464 { 0x00000001, 0x00804811, 0x000 },
5465 { 0x00000021, 0x00201e2d, 0x000 },
5466 { 0x00000000, 0x002c1ce3, 0x000 },
5467 { 0x00000021, 0x00203627, 0x000 },
5468 { 0x00000022, 0x00201e2d, 0x000 },
5469 { 0x00000000, 0x002c1ce4, 0x000 },
5470 { 0x00000022, 0x00203627, 0x000 },
5471 { 0x00000023, 0x00201e2d, 0x000 },
5472 { 0x00000000, 0x003120a3, 0x000 },
5473 { 0x00000000, 0x002d1d07, 0x000 },
5474 { 0x00000023, 0x00203627, 0x000 },
5475 { 0x00000024, 0x00201e2d, 0x000 },
5476 { 0x00000000, 0x003120c4, 0x000 },
5477 { 0x00000000, 0x002d1d07, 0x000 },
5478 { 0x00000024, 0x00803627, 0x000 },
5479 { 0x00000021, 0x00203623, 0x000 },
5480 { 0x00000022, 0x00203624, 0x000 },
5481 { 0x00000000, 0x00311ca3, 0x000 },
5482 { 0x00000023, 0x00203627, 0x000 },
5483 { 0x00000000, 0x00311cc4, 0x000 },
5484 { 0x00000024, 0x00803627, 0x000 },
5485 { 0x0000001a, 0x00203627, 0x000 },
5486 { 0x0000001b, 0x00203628, 0x000 },
5487 { 0x00000017, 0x00201e2d, 0x000 },
5488 { 0x00000002, 0x00210227, 0x000 },
5489 { 0x00000000, 0x14c00000, 0x2dc },
5490 { 0x00000000, 0x00400000, 0x2d9 },
5491 { 0x0000001a, 0x00203627, 0x000 },
5492 { 0x0000001b, 0x00203628, 0x000 },
5493 { 0x00000017, 0x00201e2d, 0x000 },
5494 { 0x00000002, 0x00210227, 0x000 },
5495 { 0x00000000, 0x14e00000, 0x2d9 },
5496 { 0x00000003, 0x00210227, 0x000 },
5497 { 0x00000000, 0x14e00000, 0x2dc },
5498 { 0x00000023, 0x00201e2d, 0x000 },
5499 { 0x00000000, 0x002e00e1, 0x000 },
5500 { 0x00000000, 0x02c00000, 0x2dc },
5501 { 0x00000021, 0x00201e2d, 0x000 },
5502 { 0x00000000, 0x003120a1, 0x000 },
5503 { 0x00000000, 0x002e00e8, 0x000 },
5504 { 0x00000000, 0x06c00000, 0x2dc },
5505 { 0x00000024, 0x00201e2d, 0x000 },
5506 { 0x00000000, 0x002e00e2, 0x000 },
5507 { 0x00000000, 0x02c00000, 0x2dc },
5508 { 0x00000022, 0x00201e2d, 0x000 },
5509 { 0x00000000, 0x003120c2, 0x000 },
5510 { 0x00000000, 0x002e00e8, 0x000 },
5511 { 0x00000000, 0x06c00000, 0x2dc },
5512 { 0x00000000, 0x00600000, 0x668 },
5513 { 0x00000000, 0x00600000, 0x2b5 },
5514 { 0x00000000, 0x00400000, 0x2de },
5515 { 0x00000000, 0x00600000, 0x2b5 },
5516 { 0x00000000, 0x00600000, 0x65f },
5517 { 0x00000000, 0x00400000, 0x2de },
5518 { 0x00000000, 0x00600000, 0x2a7 },
5519 { 0x00000000, 0x00400000, 0x2de },
5520 { 0x0000001a, 0x00201e2d, 0x000 },
5521 { 0x0000001b, 0x0080222d, 0x000 },
5522 { 0x00000010, 0x00221e23, 0x000 },
5523 { 0x00000000, 0x00294887, 0x000 },
5524 { 0x00000000, 0x00311ca3, 0x000 },
5525 { 0x00000010, 0x00221e27, 0x000 },
5526 { 0x00000000, 0x00294887, 0x000 },
5527 { 0x00000010, 0x00221e23, 0x000 },
5528 { 0x00000000, 0x003120c4, 0x000 },
5529 { 0x0000ffff, 0x00282228, 0x000 },
5530 { 0x00000000, 0x00894907, 0x000 },
5531 { 0x00000010, 0x00221e23, 0x000 },
5532 { 0x00000000, 0x00294887, 0x000 },
5533 { 0x00000010, 0x00221e21, 0x000 },
5534 { 0x00000000, 0x00294847, 0x000 },
5535 { 0x00000000, 0x00311ca3, 0x000 },
5536 { 0x00000010, 0x00221e27, 0x000 },
5537 { 0x00000000, 0x00294887, 0x000 },
5538 { 0x00000000, 0x00311ca1, 0x000 },
5539 { 0x00000010, 0x00221e27, 0x000 },
5540 { 0x00000000, 0x00294847, 0x000 },
5541 { 0x00000010, 0x00221e23, 0x000 },
5542 { 0x00000000, 0x003120c4, 0x000 },
5543 { 0x0000ffff, 0x00282228, 0x000 },
5544 { 0x00000000, 0x00294907, 0x000 },
5545 { 0x00000010, 0x00221e21, 0x000 },
5546 { 0x00000000, 0x003120c2, 0x000 },
5547 { 0x0000ffff, 0x00282228, 0x000 },
5548 { 0x00000000, 0x00894907, 0x000 },
5549 { 0x00000010, 0x00221e23, 0x000 },
5550 { 0x00000000, 0x00294887, 0x000 },
5551 { 0x00000001, 0x00220a21, 0x000 },
5552 { 0x00000000, 0x003308a2, 0x000 },
5553 { 0x00000010, 0x00221e22, 0x000 },
5554 { 0x00000010, 0x00212222, 0x000 },
5555 { 0x00000000, 0x00294907, 0x000 },
5556 { 0x00000000, 0x00311ca3, 0x000 },
5557 { 0x00000010, 0x00221e27, 0x000 },
5558 { 0x00000000, 0x00294887, 0x000 },
5559 { 0x00000001, 0x00220a21, 0x000 },
5560 { 0x00000000, 0x003008a2, 0x000 },
5561 { 0x00000010, 0x00221e22, 0x000 },
5562 { 0x00000010, 0x00212222, 0x000 },
5563 { 0x00000000, 0x00294907, 0x000 },
5564 { 0x00000010, 0x00221e23, 0x000 },
5565 { 0x00000000, 0x003120c4, 0x000 },
5566 { 0x0000ffff, 0x00282228, 0x000 },
5567 { 0x00000000, 0x00294907, 0x000 },
5568 { 0x00000000, 0x003808c5, 0x000 },
5569 { 0x00000000, 0x00300841, 0x000 },
5570 { 0x00000001, 0x00220a22, 0x000 },
5571 { 0x00000000, 0x003308a2, 0x000 },
5572 { 0x00000010, 0x00221e22, 0x000 },
5573 { 0x00000010, 0x00212222, 0x000 },
5574 { 0x00000000, 0x00894907, 0x000 },
5575 { 0x00000017, 0x0020222d, 0x000 },
5576 { 0x00000000, 0x14c00000, 0x318 },
5577 { 0xffffffef, 0x00280621, 0x000 },
5578 { 0x00000014, 0x0020222d, 0x000 },
5579 { 0x0000f8e0, 0x00204411, 0x000 },
5580 { 0x00000000, 0x00294901, 0x000 },
5581 { 0x00000000, 0x00894901, 0x000 },
5582 { 0x00000000, 0x00204811, 0x000 },
5583 { 0x00000000, 0x00204811, 0x000 },
5584 { 0x060a0200, 0x00804811, 0x000 },
5585 { 0x00000000, 0xc0200000, 0x000 },
5586 { 0x97000000, 0xc0204411, 0x000 },
5587 { 0x00000000, 0xc0204811, 0x000 },
5588 { 0x8a000000, 0x00204411, 0x000 },
5589 { 0x00000000, 0x00204811, 0x000 },
5590 { 0x0000225c, 0x00204411, 0x000 },
5591 { 0x00000000, 0xc0204800, 0x000 },
5592 { 0x0000a1fc, 0x00204411, 0x000 },
5593 { 0x00000000, 0xc0204800, 0x000 },
5594 { 0x00000000, 0xc0200400, 0x000 },
5595 { 0x00000000, 0x00a0000a, 0x000 },
5596 { 0x97000000, 0x00204411, 0x000 },
5597 { 0x00000000, 0x00204811, 0x000 },
5598 { 0x8a000000, 0x00204411, 0x000 },
5599 { 0x00000000, 0x00204811, 0x000 },
5600 { 0x0000225c, 0x00204411, 0x000 },
5601 { 0x00000000, 0xc0204800, 0x000 },
5602 { 0x0000a1fc, 0x00204411, 0x000 },
5603 { 0x00000000, 0xc0204800, 0x000 },
5604 { 0x00000000, 0xc0200400, 0x000 },
5605 { 0x00000000, 0x00a0000a, 0x000 },
5606 { 0x97000000, 0x00204411, 0x000 },
5607 { 0x00000000, 0x00204811, 0x000 },
5608 { 0x8a000000, 0x00204411, 0x000 },
5609 { 0x00000000, 0x00204811, 0x000 },
5610 { 0x0000225c, 0x00204411, 0x000 },
5611 { 0x00000000, 0xc0204800, 0x000 },
5612 { 0x0000a1fc, 0x00204411, 0x000 },
5613 { 0x00000000, 0xc0204800, 0x000 },
5614 { 0x0001a1fd, 0x00204411, 0x000 },
5615 { 0x00000000, 0xd9004800, 0x000 },
5616 { 0x00000000, 0xc0200400, 0x000 },
5617 { 0x00000000, 0x00a0000a, 0x000 },
5618 { 0x00002257, 0x00204411, 0x000 },
5619 { 0x00000003, 0xc0484a20, 0x000 },
5620 { 0x0000225d, 0x00204411, 0x000 },
5621 { 0x00000000, 0xc0404800, 0x000 },
5622 { 0x00000000, 0x00600000, 0x645 },
5623 { 0x00000000, 0xc0200800, 0x000 },
5624 { 0x0000225c, 0x00204411, 0x000 },
5625 { 0x00000003, 0x00384a22, 0x000 },
5626 { 0x0000a1fc, 0x00204411, 0x000 },
5627 { 0x00000000, 0xc0204800, 0x000 },
5628 { 0x0001a1fd, 0x00204411, 0x000 },
5629 { 0x00000000, 0x002f0222, 0x000 },
5630 { 0x00000000, 0x0ce00000, 0x000 },
5631 { 0x00000000, 0x40204800, 0x000 },
5632 { 0x00000001, 0x40304a20, 0x000 },
5633 { 0x00000002, 0xc0304a20, 0x000 },
5634 { 0x00000001, 0x00530a22, 0x34b },
5635 { 0x0000003f, 0xc0280a20, 0x000 },
5636 { 0x81000000, 0x00204411, 0x000 },
5637 { 0x00000001, 0x00204811, 0x000 },
5638 { 0x000021f8, 0x00204411, 0x000 },
5639 { 0x00000018, 0x00204811, 0x000 },
5640 { 0x000421f9, 0x00604411, 0x68d },
5641 { 0x00000011, 0x00210230, 0x000 },
5642 { 0x00000000, 0x14e00000, 0x354 },
5643 { 0x00000014, 0x002f0222, 0x000 },
5644 { 0x00000000, 0x0cc00000, 0x364 },
5645 { 0x00002010, 0x00204411, 0x000 },
5646 { 0x00008000, 0x00204811, 0x000 },
5647 { 0x0001a2a4, 0x00204411, 0x000 },
5648 { 0x00000000, 0x00604802, 0x36e },
5649 { 0x00002100, 0x00204411, 0x000 },
5650 { 0x00000000, 0xc0204800, 0x000 },
5651 { 0x00000000, 0xc0204800, 0x000 },
5652 { 0x00000000, 0xc0204800, 0x000 },
5653 { 0x00000000, 0xc0404800, 0x000 },
5654 { 0x00000004, 0x002f0222, 0x000 },
5655 { 0x00000000, 0x0cc00000, 0x36a },
5656 { 0x00002010, 0x00204411, 0x000 },
5657 { 0x00008000, 0x00204811, 0x000 },
5658 { 0x0001a2a4, 0x00204411, 0x000 },
5659 { 0x00000000, 0x00404802, 0x35f },
5660 { 0x00000028, 0x002f0222, 0x000 },
5661 { 0x00000000, 0x0cc00000, 0x5c0 },
5662 { 0x0001a2a4, 0x00204411, 0x000 },
5663 { 0x00000000, 0x00404802, 0x35f },
5664 { 0x0000002c, 0x00203626, 0x000 },
5665 { 0x00000049, 0x00201811, 0x000 },
5666 { 0x0000003f, 0x00204811, 0x000 },
5667 { 0x00000001, 0x00331a26, 0x000 },
5668 { 0x00000000, 0x002f0226, 0x000 },
5669 { 0x00000000, 0x0cc00000, 0x370 },
5670 { 0x0000002c, 0x00801a2d, 0x000 },
5671 { 0x0000003f, 0xc0280a20, 0x000 },
5672 { 0x00000015, 0x002f0222, 0x000 },
5673 { 0x00000000, 0x0ce00000, 0x386 },
5674 { 0x00000006, 0x002f0222, 0x000 },
5675 { 0x00000000, 0x0ce00000, 0x3b1 },
5676 { 0x00000016, 0x002f0222, 0x000 },
5677 { 0x00000000, 0x0ce00000, 0x3b5 },
5678 { 0x00000020, 0x002f0222, 0x000 },
5679 { 0x00000000, 0x0ce00000, 0x39c },
5680 { 0x0000000f, 0x002f0222, 0x000 },
5681 { 0x00000000, 0x0ce00000, 0x3a8 },
5682 { 0x00000010, 0x002f0222, 0x000 },
5683 { 0x00000000, 0x0ce00000, 0x3a8 },
5684 { 0x0000001e, 0x002f0222, 0x000 },
5685 { 0x00000000, 0x0ce00000, 0x390 },
5686 { 0x0000a2a4, 0x00204411, 0x000 },
5687 { 0x00000000, 0x00404802, 0x000 },
5688 { 0x08000000, 0x00290a22, 0x000 },
5689 { 0x00000003, 0x40210e20, 0x000 },
5690 { 0x0000000c, 0xc0211220, 0x000 },
5691 { 0x00080000, 0x00281224, 0x000 },
5692 { 0x00000014, 0xc0221620, 0x000 },
5693 { 0x00000000, 0x002914a4, 0x000 },
5694 { 0x0000a2a4, 0x00204411, 0x000 },
5695 { 0x00000000, 0x002948a2, 0x000 },
5696 { 0x0000a1fe, 0x00204411, 0x000 },
5697 { 0x00000000, 0x00404803, 0x000 },
5698 { 0x81000000, 0x00204411, 0x000 },
5699 { 0x00000001, 0x00204811, 0x000 },
5700 { 0x000021f8, 0x00204411, 0x000 },
5701 { 0x00000016, 0x00204811, 0x000 },
5702 { 0x000421f9, 0x00604411, 0x68d },
5703 { 0x00000015, 0x00210230, 0x000 },
5704 { 0x00000000, 0x14e00000, 0x392 },
5705 { 0x0000210e, 0x00204411, 0x000 },
5706 { 0x00000000, 0xc0204800, 0x000 },
5707 { 0x00000000, 0xc0204800, 0x000 },
5708 { 0x0000a2a4, 0x00204411, 0x000 },
5709 { 0x00000000, 0x00404802, 0x000 },
5710 { 0x81000000, 0x00204411, 0x000 },
5711 { 0x00000001, 0x00204811, 0x000 },
5712 { 0x000021f8, 0x00204411, 0x000 },
5713 { 0x00000017, 0x00204811, 0x000 },
5714 { 0x000421f9, 0x00604411, 0x68d },
5715 { 0x00000003, 0x00210230, 0x000 },
5716 { 0x00000000, 0x14e00000, 0x39e },
5717 { 0x00002108, 0x00204411, 0x000 },
5718 { 0x00000000, 0xc0204800, 0x000 },
5719 { 0x00000000, 0xc0204800, 0x000 },
5720 { 0x0000a2a4, 0x00204411, 0x000 },
5721 { 0x00000000, 0x00404802, 0x000 },
5722 { 0x0000a2a4, 0x00204411, 0x000 },
5723 { 0x00000000, 0x00204802, 0x000 },
5724 { 0x80000000, 0x00204411, 0x000 },
5725 { 0x00000000, 0x00204811, 0x000 },
5726 { 0x81000000, 0x00204411, 0x000 },
5727 { 0x00000010, 0x00204811, 0x000 },
5728 { 0x00000000, 0x00200010, 0x000 },
5729 { 0x00000000, 0x14c00000, 0x3ae },
5730 { 0x00000000, 0x00400000, 0x000 },
5731 { 0x00002010, 0x00204411, 0x000 },
5732 { 0x00008000, 0x00204811, 0x000 },
5733 { 0x0001a2a4, 0x00204411, 0x000 },
5734 { 0x00000006, 0x00404811, 0x000 },
5735 { 0x00002010, 0x00204411, 0x000 },
5736 { 0x00008000, 0x00204811, 0x000 },
5737 { 0x0001a2a4, 0x00204411, 0x000 },
5738 { 0x00000016, 0x00604811, 0x36e },
5739 { 0x00000000, 0x00400000, 0x000 },
5740 { 0x00000000, 0xc0200800, 0x000 },
5741 { 0x00000000, 0xc0200c00, 0x000 },
5742 { 0x0000001d, 0x00210223, 0x000 },
5743 { 0x00000000, 0x14e00000, 0x3ce },
5744 { 0x81000000, 0x00204411, 0x000 },
5745 { 0x00000001, 0x00204811, 0x000 },
5746 { 0x000021f8, 0x00204411, 0x000 },
5747 { 0x00000018, 0x00204811, 0x000 },
5748 { 0x000421f9, 0x00604411, 0x68d },
5749 { 0x00000011, 0x00210230, 0x000 },
5750 { 0x00000000, 0x14e00000, 0x3c0 },
5751 { 0x00002100, 0x00204411, 0x000 },
5752 { 0x00000000, 0x00204802, 0x000 },
5753 { 0x00000000, 0x00204803, 0x000 },
5754 { 0xbabecafe, 0x00204811, 0x000 },
5755 { 0xcafebabe, 0x00204811, 0x000 },
5756 { 0x00002010, 0x00204411, 0x000 },
5757 { 0x00008000, 0x00204811, 0x000 },
5758 { 0x0000a2a4, 0x00204411, 0x000 },
5759 { 0x00000004, 0x00404811, 0x000 },
5760 { 0x00002170, 0x00204411, 0x000 },
5761 { 0x00000000, 0x00204802, 0x000 },
5762 { 0x00000000, 0x00204803, 0x000 },
5763 { 0x81000000, 0x00204411, 0x000 },
5764 { 0x0000000a, 0x00204811, 0x000 },
5765 { 0x00000000, 0x00200010, 0x000 },
5766 { 0x00000000, 0x14c00000, 0x3d3 },
5767 { 0x8c000000, 0x00204411, 0x000 },
5768 { 0xcafebabe, 0x00404811, 0x000 },
5769 { 0x81000000, 0x00204411, 0x000 },
5770 { 0x00000001, 0x00204811, 0x000 },
5771 { 0x00003fff, 0x40280a20, 0x000 },
5772 { 0x80000000, 0x40280e20, 0x000 },
5773 { 0x40000000, 0xc0281220, 0x000 },
5774 { 0x00040000, 0x00694622, 0x68d },
5775 { 0x00000000, 0x00201410, 0x000 },
5776 { 0x00000000, 0x002f0223, 0x000 },
5777 { 0x00000000, 0x0cc00000, 0x3e1 },
5778 { 0x00000000, 0xc0401800, 0x3e4 },
5779 { 0x00003fff, 0xc0281a20, 0x000 },
5780 { 0x00040000, 0x00694626, 0x68d },
5781 { 0x00000000, 0x00201810, 0x000 },
5782 { 0x00000000, 0x002f0224, 0x000 },
5783 { 0x00000000, 0x0cc00000, 0x3e7 },
5784 { 0x00000000, 0xc0401c00, 0x3ea },
5785 { 0x00003fff, 0xc0281e20, 0x000 },
5786 { 0x00040000, 0x00694627, 0x68d },
5787 { 0x00000000, 0x00201c10, 0x000 },
5788 { 0x00000000, 0x00204402, 0x000 },
5789 { 0x00000000, 0x002820c5, 0x000 },
5790 { 0x00000000, 0x004948e8, 0x000 },
5791 { 0xa5800000, 0x00200811, 0x000 },
5792 { 0x00002000, 0x00200c11, 0x000 },
5793 { 0x83000000, 0x00604411, 0x412 },
5794 { 0x00000000, 0x00204402, 0x000 },
5795 { 0x00000000, 0xc0204800, 0x000 },
5796 { 0x00000000, 0x40204800, 0x000 },
5797 { 0x0000001f, 0xc0210220, 0x000 },
5798 { 0x00000000, 0x14c00000, 0x3f7 },
5799 { 0x00002010, 0x00204411, 0x000 },
5800 { 0x00008000, 0x00204811, 0x000 },
5801 { 0x0000ffff, 0xc0481220, 0x3ff },
5802 { 0xa7800000, 0x00200811, 0x000 },
5803 { 0x0000a000, 0x00200c11, 0x000 },
5804 { 0x83000000, 0x00604411, 0x412 },
5805 { 0x00000000, 0x00204402, 0x000 },
5806 { 0x00000000, 0xc0204800, 0x000 },
5807 { 0x00000000, 0xc0204800, 0x000 },
5808 { 0x0000ffff, 0xc0281220, 0x000 },
5809 { 0x83000000, 0x00204411, 0x000 },
5810 { 0x00000000, 0x00304883, 0x000 },
5811 { 0x84000000, 0x00204411, 0x000 },
5812 { 0x00000000, 0xc0204800, 0x000 },
5813 { 0x00000000, 0x1d000000, 0x000 },
5814 { 0x83000000, 0x00604411, 0x412 },
5815 { 0x00000000, 0xc0400400, 0x001 },
5816 { 0xa9800000, 0x00200811, 0x000 },
5817 { 0x0000c000, 0x00400c11, 0x3fa },
5818 { 0xab800000, 0x00200811, 0x000 },
5819 { 0x0000f8e0, 0x00400c11, 0x3fa },
5820 { 0xad800000, 0x00200811, 0x000 },
5821 { 0x0000f880, 0x00400c11, 0x3fa },
5822 { 0xb3800000, 0x00200811, 0x000 },
5823 { 0x0000f3fc, 0x00400c11, 0x3fa },
5824 { 0xaf800000, 0x00200811, 0x000 },
5825 { 0x0000e000, 0x00400c11, 0x3fa },
5826 { 0xb1800000, 0x00200811, 0x000 },
5827 { 0x0000f000, 0x00400c11, 0x3fa },
5828 { 0x83000000, 0x00204411, 0x000 },
5829 { 0x00002148, 0x00204811, 0x000 },
5830 { 0x84000000, 0x00204411, 0x000 },
5831 { 0x00000000, 0xc0204800, 0x000 },
5832 { 0x00000000, 0x1d000000, 0x000 },
5833 { 0x00000000, 0x00800000, 0x000 },
5834 { 0x01182000, 0xc0304620, 0x000 },
5835 { 0x00000000, 0xd9004800, 0x000 },
5836 { 0x00000000, 0xc0200400, 0x000 },
5837 { 0x00000000, 0x00a0000a, 0x000 },
5838 { 0x0218a000, 0xc0304620, 0x000 },
5839 { 0x00000000, 0xd9004800, 0x000 },
5840 { 0x00000000, 0xc0200400, 0x000 },
5841 { 0x00000000, 0x00a0000a, 0x000 },
5842 { 0x0318c000, 0xc0304620, 0x000 },
5843 { 0x00000000, 0xd9004800, 0x000 },
5844 { 0x00000000, 0xc0200400, 0x000 },
5845 { 0x00000000, 0x00a0000a, 0x000 },
5846 { 0x0418f8e0, 0xc0304620, 0x000 },
5847 { 0x00000000, 0xd9004800, 0x000 },
5848 { 0x00000000, 0xc0200400, 0x000 },
5849 { 0x00000000, 0x00a0000a, 0x000 },
5850 { 0x0518f880, 0xc0304620, 0x000 },
5851 { 0x00000000, 0xd9004800, 0x000 },
5852 { 0x00000000, 0xc0200400, 0x000 },
5853 { 0x00000000, 0x00a0000a, 0x000 },
5854 { 0x0618e000, 0xc0304620, 0x000 },
5855 { 0x00000000, 0xd9004800, 0x000 },
5856 { 0x00000000, 0xc0200400, 0x000 },
5857 { 0x00000000, 0x00a0000a, 0x000 },
5858 { 0x0718f000, 0xc0304620, 0x000 },
5859 { 0x00000000, 0xd9004800, 0x000 },
5860 { 0x00000000, 0xc0200400, 0x000 },
5861 { 0x00000000, 0x00a0000a, 0x000 },
5862 { 0x0818f3fc, 0xc0304620, 0x000 },
5863 { 0x00000000, 0xd9004800, 0x000 },
5864 { 0x00000000, 0xc0200400, 0x000 },
5865 { 0x00000000, 0x00a0000a, 0x000 },
5866 { 0x00000030, 0x00200a2d, 0x000 },
5867 { 0x00000000, 0xc0290c40, 0x000 },
5868 { 0x00000030, 0x00203623, 0x000 },
5869 { 0x00000000, 0xc0200400, 0x000 },
5870 { 0x00000000, 0x00a0000a, 0x000 },
5871 { 0x86000000, 0x00204411, 0x000 },
5872 { 0x00000000, 0x00404801, 0x000 },
5873 { 0x85000000, 0xc0204411, 0x000 },
5874 { 0x00000000, 0x00404801, 0x000 },
5875 { 0x0000217c, 0x00204411, 0x000 },
5876 { 0x00000018, 0x40210220, 0x000 },
5877 { 0x00000000, 0x14c00000, 0x445 },
5878 { 0x00800000, 0xc0494a20, 0x446 },
5879 { 0x00000000, 0xc0204800, 0x000 },
5880 { 0x00000000, 0xc0204800, 0x000 },
5881 { 0x00000000, 0xc0204800, 0x000 },
5882 { 0x81000000, 0x00204411, 0x000 },
5883 { 0x00000001, 0x00204811, 0x000 },
5884 { 0x00000000, 0xc0200800, 0x000 },
5885 { 0x00000000, 0x17000000, 0x000 },
5886 { 0x0004217f, 0x00604411, 0x68d },
5887 { 0x0000001f, 0x00210230, 0x000 },
5888 { 0x00000000, 0x14c00000, 0x000 },
5889 { 0x00000000, 0x00404c02, 0x44b },
5890 { 0x00000000, 0xc0200c00, 0x000 },
5891 { 0x00000000, 0xc0201000, 0x000 },
5892 { 0x00000000, 0xc0201400, 0x000 },
5893 { 0x00000000, 0xc0201800, 0x000 },
5894 { 0x00000000, 0xc0201c00, 0x000 },
5895 { 0x00007f00, 0x00280a21, 0x000 },
5896 { 0x00004500, 0x002f0222, 0x000 },
5897 { 0x00000000, 0x0ce00000, 0x459 },
5898 { 0x00000000, 0xc0202000, 0x000 },
5899 { 0x00000000, 0x17000000, 0x000 },
5900 { 0x00000010, 0x00280a23, 0x000 },
5901 { 0x00000010, 0x002f0222, 0x000 },
5902 { 0x00000000, 0x0ce00000, 0x461 },
5903 { 0x81000000, 0x00204411, 0x000 },
5904 { 0x00000001, 0x00204811, 0x000 },
5905 { 0x00040000, 0x00694624, 0x68d },
5906 { 0x00000000, 0x00400000, 0x466 },
5907 { 0x81000000, 0x00204411, 0x000 },
5908 { 0x00000000, 0x00204811, 0x000 },
5909 { 0x0000216d, 0x00204411, 0x000 },
5910 { 0x00000000, 0x00204804, 0x000 },
5911 { 0x00000000, 0x00604805, 0x692 },
5912 { 0x00000000, 0x002824f0, 0x000 },
5913 { 0x00000007, 0x00280a23, 0x000 },
5914 { 0x00000001, 0x002f0222, 0x000 },
5915 { 0x00000000, 0x0ae00000, 0x46d },
5916 { 0x00000000, 0x002f00c9, 0x000 },
5917 { 0x00000000, 0x04e00000, 0x486 },
5918 { 0x00000000, 0x00400000, 0x493 },
5919 { 0x00000002, 0x002f0222, 0x000 },
5920 { 0x00000000, 0x0ae00000, 0x472 },
5921 { 0x00000000, 0x002f00c9, 0x000 },
5922 { 0x00000000, 0x02e00000, 0x486 },
5923 { 0x00000000, 0x00400000, 0x493 },
5924 { 0x00000003, 0x002f0222, 0x000 },
5925 { 0x00000000, 0x0ae00000, 0x477 },
5926 { 0x00000000, 0x002f00c9, 0x000 },
5927 { 0x00000000, 0x0ce00000, 0x486 },
5928 { 0x00000000, 0x00400000, 0x493 },
5929 { 0x00000004, 0x002f0222, 0x000 },
5930 { 0x00000000, 0x0ae00000, 0x47c },
5931 { 0x00000000, 0x002f00c9, 0x000 },
5932 { 0x00000000, 0x0ae00000, 0x486 },
5933 { 0x00000000, 0x00400000, 0x493 },
5934 { 0x00000005, 0x002f0222, 0x000 },
5935 { 0x00000000, 0x0ae00000, 0x481 },
5936 { 0x00000000, 0x002f00c9, 0x000 },
5937 { 0x00000000, 0x06e00000, 0x486 },
5938 { 0x00000000, 0x00400000, 0x493 },
5939 { 0x00000006, 0x002f0222, 0x000 },
5940 { 0x00000000, 0x0ae00000, 0x486 },
5941 { 0x00000000, 0x002f00c9, 0x000 },
5942 { 0x00000000, 0x08e00000, 0x486 },
5943 { 0x00000000, 0x00400000, 0x493 },
5944 { 0x00007f00, 0x00280a21, 0x000 },
5945 { 0x00004500, 0x002f0222, 0x000 },
5946 { 0x00000000, 0x0ae00000, 0x000 },
5947 { 0x00000008, 0x00210a23, 0x000 },
5948 { 0x00000000, 0x14c00000, 0x490 },
5949 { 0x00002169, 0x00204411, 0x000 },
5950 { 0x00000000, 0xc0204800, 0x000 },
5951 { 0x00000000, 0xc0204800, 0x000 },
5952 { 0x00000000, 0xc0204800, 0x000 },
5953 { 0xcafebabe, 0x00404811, 0x000 },
5954 { 0x00000000, 0xc0204400, 0x000 },
5955 { 0x00000000, 0xc0200000, 0x000 },
5956 { 0x00000000, 0xc0404800, 0x000 },
5957 { 0x00007f00, 0x00280a21, 0x000 },
5958 { 0x00004500, 0x002f0222, 0x000 },
5959 { 0x00000000, 0x0ae00000, 0x499 },
5960 { 0x00000000, 0xc0200000, 0x000 },
5961 { 0x00000000, 0xc0200000, 0x000 },
5962 { 0x00000000, 0xc0400000, 0x000 },
5963 { 0x00000000, 0x00404c08, 0x459 },
5964 { 0x00000000, 0xc0200800, 0x000 },
5965 { 0x00000010, 0x40210e20, 0x000 },
5966 { 0x00000011, 0x40211220, 0x000 },
5967 { 0x00000012, 0x40211620, 0x000 },
5968 { 0x00002169, 0x00204411, 0x000 },
5969 { 0x00000000, 0x00204802, 0x000 },
5970 { 0x00000000, 0x00210225, 0x000 },
5971 { 0x00000000, 0x14e00000, 0x4a3 },
5972 { 0x00040000, 0xc0494a20, 0x4a4 },
5973 { 0xfffbffff, 0xc0284a20, 0x000 },
5974 { 0x00000000, 0x00210223, 0x000 },
5975 { 0x00000000, 0x14e00000, 0x4b0 },
5976 { 0x00000000, 0xc0204800, 0x000 },
5977 { 0x00000000, 0xc0204800, 0x000 },
5978 { 0x00000000, 0x00210224, 0x000 },
5979 { 0x00000000, 0x14c00000, 0x000 },
5980 { 0x81000000, 0x00204411, 0x000 },
5981 { 0x0000000c, 0x00204811, 0x000 },
5982 { 0x00000000, 0x00200010, 0x000 },
5983 { 0x00000000, 0x14c00000, 0x4ac },
5984 { 0xa0000000, 0x00204411, 0x000 },
5985 { 0xcafebabe, 0x00404811, 0x000 },
5986 { 0x81000000, 0x00204411, 0x000 },
5987 { 0x00000004, 0x00204811, 0x000 },
5988 { 0x0000216b, 0x00204411, 0x000 },
5989 { 0x00000000, 0xc0204810, 0x000 },
5990 { 0x81000000, 0x00204411, 0x000 },
5991 { 0x00000005, 0x00204811, 0x000 },
5992 { 0x0000216c, 0x00204411, 0x000 },
5993 { 0x00000000, 0xc0204810, 0x000 },
5994 { 0x00000000, 0x002f0224, 0x000 },
5995 { 0x00000000, 0x0ce00000, 0x000 },
5996 { 0x00000000, 0x00400000, 0x4aa },
5997 { 0x00000000, 0xc0210a20, 0x000 },
5998 { 0x00000000, 0x14c00000, 0x4c3 },
5999 { 0x81000000, 0x00204411, 0x000 },
6000 { 0x00000000, 0x00204811, 0x000 },
6001 { 0x0000216d, 0x00204411, 0x000 },
6002 { 0x00000000, 0xc0204800, 0x000 },
6003 { 0x00000000, 0xc0604800, 0x692 },
6004 { 0x00000000, 0x00400000, 0x4c7 },
6005 { 0x81000000, 0x00204411, 0x000 },
6006 { 0x00000001, 0x00204811, 0x000 },
6007 { 0x00040000, 0xc0294620, 0x000 },
6008 { 0x00000000, 0xc0600000, 0x68d },
6009 { 0x00000001, 0x00210222, 0x000 },
6010 { 0x00000000, 0x14c00000, 0x4ce },
6011 { 0x00002169, 0x00204411, 0x000 },
6012 { 0x00000000, 0xc0204800, 0x000 },
6013 { 0x00000000, 0xc0204800, 0x000 },
6014 { 0x00000000, 0x00204810, 0x000 },
6015 { 0xcafebabe, 0x00404811, 0x000 },
6016 { 0x00000000, 0xc0204400, 0x000 },
6017 { 0x00000000, 0xc0404810, 0x000 },
6018 { 0x81000000, 0x00204411, 0x000 },
6019 { 0x00000001, 0x00204811, 0x000 },
6020 { 0x000021f8, 0x00204411, 0x000 },
6021 { 0x0000000e, 0x00204811, 0x000 },
6022 { 0x000421f9, 0x00604411, 0x68d },
6023 { 0x00000000, 0x00210230, 0x000 },
6024 { 0x00000000, 0x14c00000, 0x4d0 },
6025 { 0x00002180, 0x00204411, 0x000 },
6026 { 0x00000000, 0xc0204800, 0x000 },
6027 { 0x00000000, 0xc0200000, 0x000 },
6028 { 0x00000000, 0xc0204800, 0x000 },
6029 { 0x00000000, 0xc0200000, 0x000 },
6030 { 0x00000000, 0xc0404800, 0x000 },
6031 { 0x00000003, 0x00333e2f, 0x000 },
6032 { 0x00000001, 0x00210221, 0x000 },
6033 { 0x00000000, 0x14e00000, 0x500 },
6034 { 0x0000002c, 0x00200a2d, 0x000 },
6035 { 0x00040000, 0x18e00c11, 0x4ef },
6036 { 0x00000001, 0x00333e2f, 0x000 },
6037 { 0x00002169, 0x00204411, 0x000 },
6038 { 0x00000000, 0x00204802, 0x000 },
6039 { 0x00000000, 0x00204803, 0x000 },
6040 { 0x00000008, 0x00300a22, 0x000 },
6041 { 0x00000000, 0xc0204800, 0x000 },
6042 { 0x00000000, 0xc0204800, 0x000 },
6043 { 0x00002169, 0x00204411, 0x000 },
6044 { 0x00000000, 0x00204802, 0x000 },
6045 { 0x00000000, 0x00204803, 0x000 },
6046 { 0x00000008, 0x00300a22, 0x000 },
6047 { 0x00000000, 0xc0204800, 0x000 },
6048 { 0x00000000, 0xd8c04800, 0x4e3 },
6049 { 0x00002169, 0x00204411, 0x000 },
6050 { 0x00000000, 0x00204802, 0x000 },
6051 { 0x00000000, 0x00204803, 0x000 },
6052 { 0x00000008, 0x00300a22, 0x000 },
6053 { 0x00000000, 0xc0204800, 0x000 },
6054 { 0x00000000, 0xc0204800, 0x000 },
6055 { 0x0000002d, 0x0020122d, 0x000 },
6056 { 0x00000000, 0x00290c83, 0x000 },
6057 { 0x00002169, 0x00204411, 0x000 },
6058 { 0x00000000, 0x00204802, 0x000 },
6059 { 0x00000000, 0x00204803, 0x000 },
6060 { 0x00000008, 0x00300a22, 0x000 },
6061 { 0x00000000, 0xc0204800, 0x000 },
6062 { 0x00000000, 0xc0204800, 0x000 },
6063 { 0x00000011, 0x00210224, 0x000 },
6064 { 0x00000000, 0x14c00000, 0x000 },
6065 { 0x00000000, 0x00400000, 0x4aa },
6066 { 0x0000002c, 0xc0203620, 0x000 },
6067 { 0x0000002d, 0xc0403620, 0x000 },
6068 { 0x0000000f, 0x00210221, 0x000 },
6069 { 0x00000000, 0x14c00000, 0x505 },
6070 { 0x00000000, 0x00600000, 0x00b },
6071 { 0x00000000, 0xd9000000, 0x000 },
6072 { 0x00000000, 0xc0400400, 0x001 },
6073 { 0xb5000000, 0x00204411, 0x000 },
6074 { 0x00002000, 0x00204811, 0x000 },
6075 { 0xb6000000, 0x00204411, 0x000 },
6076 { 0x0000a000, 0x00204811, 0x000 },
6077 { 0xb7000000, 0x00204411, 0x000 },
6078 { 0x0000c000, 0x00204811, 0x000 },
6079 { 0xb8000000, 0x00204411, 0x000 },
6080 { 0x0000f8e0, 0x00204811, 0x000 },
6081 { 0xb9000000, 0x00204411, 0x000 },
6082 { 0x0000f880, 0x00204811, 0x000 },
6083 { 0xba000000, 0x00204411, 0x000 },
6084 { 0x0000e000, 0x00204811, 0x000 },
6085 { 0xbb000000, 0x00204411, 0x000 },
6086 { 0x0000f000, 0x00204811, 0x000 },
6087 { 0xbc000000, 0x00204411, 0x000 },
6088 { 0x0000f3fc, 0x00204811, 0x000 },
6089 { 0x81000000, 0x00204411, 0x000 },
6090 { 0x00000002, 0x00204811, 0x000 },
6091 { 0x000000ff, 0x00280e30, 0x000 },
6092 { 0x00000000, 0x002f0223, 0x000 },
6093 { 0x00000000, 0x0cc00000, 0x519 },
6094 { 0x00000000, 0xc0200800, 0x000 },
6095 { 0x00000000, 0x14c00000, 0x52e },
6096 { 0x00000000, 0x00200c11, 0x000 },
6097 { 0x0000001c, 0x00203623, 0x000 },
6098 { 0x0000002b, 0x00203623, 0x000 },
6099 { 0x00000029, 0x00203623, 0x000 },
6100 { 0x00000028, 0x00203623, 0x000 },
6101 { 0x00000017, 0x00203623, 0x000 },
6102 { 0x00000025, 0x00203623, 0x000 },
6103 { 0x00000026, 0x00203623, 0x000 },
6104 { 0x00000015, 0x00203623, 0x000 },
6105 { 0x00000016, 0x00203623, 0x000 },
6106 { 0xffffe000, 0x00200c11, 0x000 },
6107 { 0x00000021, 0x00203623, 0x000 },
6108 { 0x00000022, 0x00203623, 0x000 },
6109 { 0x00001fff, 0x00200c11, 0x000 },
6110 { 0x00000023, 0x00203623, 0x000 },
6111 { 0x00000024, 0x00203623, 0x000 },
6112 { 0xf1ffffff, 0x00283a2e, 0x000 },
6113 { 0x0000001a, 0xc0220e20, 0x000 },
6114 { 0x00000000, 0x0029386e, 0x000 },
6115 { 0x81000000, 0x00204411, 0x000 },
6116 { 0x00000006, 0x00204811, 0x000 },
6117 { 0x0000002a, 0x40203620, 0x000 },
6118 { 0x87000000, 0x00204411, 0x000 },
6119 { 0x00000000, 0xc0204800, 0x000 },
6120 { 0x0000a1f4, 0x00204411, 0x000 },
6121 { 0x00000000, 0x00204810, 0x000 },
6122 { 0x00000000, 0x00200c11, 0x000 },
6123 { 0x00000030, 0x00203623, 0x000 },
6124 { 0x9d000000, 0x00204411, 0x000 },
6125 { 0x0000001f, 0x40214a20, 0x000 },
6126 { 0x96000000, 0x00204411, 0x000 },
6127 { 0x00000000, 0xc0204800, 0x000 },
6128 { 0x00000000, 0xc0200c00, 0x000 },
6129 { 0x00000000, 0xc0201000, 0x000 },
6130 { 0x0000001f, 0x00211624, 0x000 },
6131 { 0x00000000, 0x14c00000, 0x000 },
6132 { 0x0000001d, 0x00203623, 0x000 },
6133 { 0x00000003, 0x00281e23, 0x000 },
6134 { 0x00000008, 0x00222223, 0x000 },
6135 { 0xfffff000, 0x00282228, 0x000 },
6136 { 0x00000000, 0x002920e8, 0x000 },
6137 { 0x0000001f, 0x00203628, 0x000 },
6138 { 0x00000018, 0x00211e23, 0x000 },
6139 { 0x00000020, 0x00203627, 0x000 },
6140 { 0x00000002, 0x00221624, 0x000 },
6141 { 0x00000000, 0x003014a8, 0x000 },
6142 { 0x0000001e, 0x00203625, 0x000 },
6143 { 0x00000003, 0x00211a24, 0x000 },
6144 { 0x10000000, 0x00281a26, 0x000 },
6145 { 0xefffffff, 0x00283a2e, 0x000 },
6146 { 0x00000000, 0x004938ce, 0x67b },
6147 { 0x00000001, 0x40280a20, 0x000 },
6148 { 0x00000006, 0x40280e20, 0x000 },
6149 { 0x00000300, 0xc0281220, 0x000 },
6150 { 0x00000008, 0x00211224, 0x000 },
6151 { 0x00000000, 0xc0201620, 0x000 },
6152 { 0x00000000, 0xc0201a20, 0x000 },
6153 { 0x00000000, 0x00210222, 0x000 },
6154 { 0x00000000, 0x14c00000, 0x566 },
6155 { 0x81000000, 0x00204411, 0x000 },
6156 { 0x00000001, 0x00204811, 0x000 },
6157 { 0x00002258, 0x00300a24, 0x000 },
6158 { 0x00040000, 0x00694622, 0x68d },
6159 { 0x00002169, 0x00204411, 0x000 },
6160 { 0x00000000, 0x00204805, 0x000 },
6161 { 0x00020000, 0x00294a26, 0x000 },
6162 { 0x00000000, 0x00204810, 0x000 },
6163 { 0xcafebabe, 0x00204811, 0x000 },
6164 { 0x00000002, 0x002f0223, 0x000 },
6165 { 0x00000000, 0x0cc00000, 0x56e },
6166 { 0x00000000, 0xc0201c10, 0x000 },
6167 { 0x00000000, 0xc0400000, 0x57c },
6168 { 0x00000002, 0x002f0223, 0x000 },
6169 { 0x00000000, 0x0cc00000, 0x56e },
6170 { 0x81000000, 0x00204411, 0x000 },
6171 { 0x00000001, 0x00204811, 0x000 },
6172 { 0x00002258, 0x00300a24, 0x000 },
6173 { 0x00040000, 0x00694622, 0x68d },
6174 { 0x00000000, 0xc0201c10, 0x000 },
6175 { 0x00000000, 0xc0400000, 0x57c },
6176 { 0x00000000, 0x002f0223, 0x000 },
6177 { 0x00000000, 0x0cc00000, 0x572 },
6178 { 0x00000000, 0xc0201c00, 0x000 },
6179 { 0x00000000, 0xc0400000, 0x57c },
6180 { 0x00000004, 0x002f0223, 0x000 },
6181 { 0x00000000, 0x0cc00000, 0x57a },
6182 { 0x81000000, 0x00204411, 0x000 },
6183 { 0x00000000, 0x00204811, 0x000 },
6184 { 0x0000216d, 0x00204411, 0x000 },
6185 { 0x00000000, 0xc0204800, 0x000 },
6186 { 0x00000000, 0xc0604800, 0x692 },
6187 { 0x00000000, 0x00401c10, 0x57c },
6188 { 0x00000000, 0xc0200000, 0x000 },
6189 { 0x00000000, 0xc0400000, 0x000 },
6190 { 0x00000000, 0x0ee00000, 0x57e },
6191 { 0x00000000, 0x00600000, 0x5c9 },
6192 { 0x00000000, 0x002f0224, 0x000 },
6193 { 0x00000000, 0x0cc00000, 0x58f },
6194 { 0x0000a2b7, 0x00204411, 0x000 },
6195 { 0x00000000, 0x00204807, 0x000 },
6196 { 0x81000000, 0x00204411, 0x000 },
6197 { 0x00000001, 0x00204811, 0x000 },
6198 { 0x0004a2b6, 0x00604411, 0x68d },
6199 { 0x0000001a, 0x00212230, 0x000 },
6200 { 0x00000006, 0x00222630, 0x000 },
6201 { 0x00042004, 0x00604411, 0x68d },
6202 { 0x0000a2c4, 0x00204411, 0x000 },
6203 { 0x00000000, 0x003048e9, 0x000 },
6204 { 0x00000000, 0x00e00000, 0x58d },
6205 { 0x0000a2d1, 0x00204411, 0x000 },
6206 { 0x00000000, 0x00404808, 0x000 },
6207 { 0x0000a2d1, 0x00204411, 0x000 },
6208 { 0x00000001, 0x00504a28, 0x000 },
6209 { 0x00000001, 0x002f0224, 0x000 },
6210 { 0x00000000, 0x0cc00000, 0x5a0 },
6211 { 0x0000a2bb, 0x00204411, 0x000 },
6212 { 0x00000000, 0x00204807, 0x000 },
6213 { 0x81000000, 0x00204411, 0x000 },
6214 { 0x00000001, 0x00204811, 0x000 },
6215 { 0x0004a2ba, 0x00604411, 0x68d },
6216 { 0x0000001a, 0x00212230, 0x000 },
6217 { 0x00000006, 0x00222630, 0x000 },
6218 { 0x00042004, 0x00604411, 0x68d },
6219 { 0x0000a2c5, 0x00204411, 0x000 },
6220 { 0x00000000, 0x003048e9, 0x000 },
6221 { 0x00000000, 0x00e00000, 0x59e },
6222 { 0x0000a2d2, 0x00204411, 0x000 },
6223 { 0x00000000, 0x00404808, 0x000 },
6224 { 0x0000a2d2, 0x00204411, 0x000 },
6225 { 0x00000001, 0x00504a28, 0x000 },
6226 { 0x00000002, 0x002f0224, 0x000 },
6227 { 0x00000000, 0x0cc00000, 0x5b1 },
6228 { 0x0000a2bf, 0x00204411, 0x000 },
6229 { 0x00000000, 0x00204807, 0x000 },
6230 { 0x81000000, 0x00204411, 0x000 },
6231 { 0x00000001, 0x00204811, 0x000 },
6232 { 0x0004a2be, 0x00604411, 0x68d },
6233 { 0x0000001a, 0x00212230, 0x000 },
6234 { 0x00000006, 0x00222630, 0x000 },
6235 { 0x00042004, 0x00604411, 0x68d },
6236 { 0x0000a2c6, 0x00204411, 0x000 },
6237 { 0x00000000, 0x003048e9, 0x000 },
6238 { 0x00000000, 0x00e00000, 0x5af },
6239 { 0x0000a2d3, 0x00204411, 0x000 },
6240 { 0x00000000, 0x00404808, 0x000 },
6241 { 0x0000a2d3, 0x00204411, 0x000 },
6242 { 0x00000001, 0x00504a28, 0x000 },
6243 { 0x0000a2c3, 0x00204411, 0x000 },
6244 { 0x00000000, 0x00204807, 0x000 },
6245 { 0x81000000, 0x00204411, 0x000 },
6246 { 0x00000001, 0x00204811, 0x000 },
6247 { 0x0004a2c2, 0x00604411, 0x68d },
6248 { 0x0000001a, 0x00212230, 0x000 },
6249 { 0x00000006, 0x00222630, 0x000 },
6250 { 0x00042004, 0x00604411, 0x68d },
6251 { 0x0000a2c7, 0x00204411, 0x000 },
6252 { 0x00000000, 0x003048e9, 0x000 },
6253 { 0x00000000, 0x00e00000, 0x5be },
6254 { 0x0000a2d4, 0x00204411, 0x000 },
6255 { 0x00000000, 0x00404808, 0x000 },
6256 { 0x0000a2d4, 0x00204411, 0x000 },
6257 { 0x00000001, 0x00504a28, 0x000 },
6258 { 0x85000000, 0x00204411, 0x000 },
6259 { 0x00000000, 0x00204801, 0x000 },
6260 { 0x0000304a, 0x00204411, 0x000 },
6261 { 0x01000000, 0x00204811, 0x000 },
6262 { 0x00000000, 0x00400000, 0x5c4 },
6263 { 0xa4000000, 0xc0204411, 0x000 },
6264 { 0x00000000, 0xc0404800, 0x000 },
6265 { 0x00000000, 0xc0600000, 0x5c9 },
6266 { 0x00000000, 0xc0400400, 0x001 },
6267 { 0x0000002c, 0x00203621, 0x000 },
6268 { 0x81000000, 0x00204411, 0x000 },
6269 { 0x00000006, 0x00204811, 0x000 },
6270 { 0x00000000, 0x002f0230, 0x000 },
6271 { 0x00000000, 0x0cc00000, 0x5d0 },
6272 { 0x00000000, 0x00200411, 0x000 },
6273 { 0x00000030, 0x00403621, 0x5e3 },
6274 { 0x00000030, 0x0020062d, 0x000 },
6275 { 0x00007e00, 0x00280621, 0x000 },
6276 { 0x00000000, 0x002f0221, 0x000 },
6277 { 0x00000000, 0x0ce00000, 0x5e3 },
6278 { 0x81000000, 0x00204411, 0x000 },
6279 { 0x00000001, 0x00204811, 0x000 },
6280 { 0x0004a092, 0x00604411, 0x68d },
6281 { 0x00000031, 0x00203630, 0x000 },
6282 { 0x0004a093, 0x00604411, 0x68d },
6283 { 0x00000032, 0x00203630, 0x000 },
6284 { 0x0004a2b6, 0x00604411, 0x68d },
6285 { 0x00000033, 0x00203630, 0x000 },
6286 { 0x0004a2ba, 0x00604411, 0x68d },
6287 { 0x00000034, 0x00203630, 0x000 },
6288 { 0x0004a2be, 0x00604411, 0x68d },
6289 { 0x00000035, 0x00203630, 0x000 },
6290 { 0x0004a2c2, 0x00604411, 0x68d },
6291 { 0x00000036, 0x00203630, 0x000 },
6292 { 0x00042004, 0x00604411, 0x68d },
6293 { 0x0001a2a4, 0x00204411, 0x000 },
6294 { 0x0000003f, 0x00204811, 0x000 },
6295 { 0x0000003f, 0x00204811, 0x000 },
6296 { 0x0000003f, 0x00204811, 0x000 },
6297 { 0x0000003f, 0x00204811, 0x000 },
6298 { 0x00000005, 0x00204811, 0x000 },
6299 { 0x0000a1f4, 0x00204411, 0x000 },
6300 { 0x00000000, 0x00204811, 0x000 },
6301 { 0x88000000, 0x00204411, 0x000 },
6302 { 0x00000001, 0x00204811, 0x000 },
6303 { 0x81000000, 0x00204411, 0x000 },
6304 { 0x00000006, 0x00204811, 0x000 },
6305 { 0x00000001, 0x002f0230, 0x000 },
6306 { 0x00000000, 0x0ce00000, 0x62c },
6307 { 0x00000030, 0x0020062d, 0x000 },
6308 { 0x00000000, 0x002f0221, 0x000 },
6309 { 0x00000000, 0x0ce00000, 0x62c },
6310 { 0x81000000, 0x00204411, 0x000 },
6311 { 0x00000001, 0x00204811, 0x000 },
6312 { 0x00007e00, 0x00280621, 0x000 },
6313 { 0x00000000, 0x002f0221, 0x000 },
6314 { 0x00000000, 0x0ce00000, 0x605 },
6315 { 0x0000a092, 0x00204411, 0x000 },
6316 { 0x00000031, 0x00204a2d, 0x000 },
6317 { 0x0000a093, 0x00204411, 0x000 },
6318 { 0x00000032, 0x00204a2d, 0x000 },
6319 { 0x0000a2b6, 0x00204411, 0x000 },
6320 { 0x00000033, 0x00204a2d, 0x000 },
6321 { 0x0000a2ba, 0x00204411, 0x000 },
6322 { 0x00000034, 0x00204a2d, 0x000 },
6323 { 0x0000a2be, 0x00204411, 0x000 },
6324 { 0x00000035, 0x00204a2d, 0x000 },
6325 { 0x0000a2c2, 0x00204411, 0x000 },
6326 { 0x00000036, 0x00204a2d, 0x000 },
6327 { 0x00000030, 0x0020062d, 0x000 },
6328 { 0x000001ff, 0x00280621, 0x000 },
6329 { 0x00000000, 0x002f0221, 0x000 },
6330 { 0x00000000, 0x0ce00000, 0x62b },
6331 { 0x00000000, 0x00210221, 0x000 },
6332 { 0x00000000, 0x14c00000, 0x60e },
6333 { 0x0004a003, 0x00604411, 0x68d },
6334 { 0x0000a003, 0x00204411, 0x000 },
6335 { 0x00000000, 0x00204810, 0x000 },
6336 { 0x00000001, 0x00210621, 0x000 },
6337 { 0x00000000, 0x14c00000, 0x613 },
6338 { 0x0004a010, 0x00604411, 0x68d },
6339 { 0x0000a010, 0x00204411, 0x000 },
6340 { 0x00000000, 0x00204810, 0x000 },
6341 { 0x00000001, 0x00210621, 0x000 },
6342 { 0x00000000, 0x002f0221, 0x000 },
6343 { 0x00000000, 0x0ce00000, 0x62b },
6344 { 0x0004a011, 0x00604411, 0x68d },
6345 { 0x0000a011, 0x00204411, 0x000 },
6346 { 0x00000000, 0x00204810, 0x000 },
6347 { 0x0004a012, 0x00604411, 0x68d },
6348 { 0x0000a012, 0x00204411, 0x000 },
6349 { 0x00000000, 0x00204810, 0x000 },
6350 { 0x0004a013, 0x00604411, 0x68d },
6351 { 0x0000a013, 0x00204411, 0x000 },
6352 { 0x00000000, 0x00204810, 0x000 },
6353 { 0x0004a014, 0x00604411, 0x68d },
6354 { 0x0000a014, 0x00204411, 0x000 },
6355 { 0x00000000, 0x00204810, 0x000 },
6356 { 0x0004a015, 0x00604411, 0x68d },
6357 { 0x0000a015, 0x00204411, 0x000 },
6358 { 0x00000000, 0x00204810, 0x000 },
6359 { 0x0004a016, 0x00604411, 0x68d },
6360 { 0x0000a016, 0x00204411, 0x000 },
6361 { 0x00000000, 0x00204810, 0x000 },
6362 { 0x0004a017, 0x00604411, 0x68d },
6363 { 0x0000a017, 0x00204411, 0x000 },
6364 { 0x00000000, 0x00204810, 0x000 },
6365 { 0x00042004, 0x00604411, 0x68d },
6366 { 0x0000002c, 0x0080062d, 0x000 },
6367 { 0xff000000, 0x00204411, 0x000 },
6368 { 0x00000000, 0x00204811, 0x000 },
6369 { 0x00000001, 0x00204811, 0x000 },
6370 { 0x00000002, 0x00804811, 0x000 },
6371 { 0x00000000, 0x0ee00000, 0x63d },
6372 { 0x00000030, 0x0020062d, 0x000 },
6373 { 0x00000002, 0x00280621, 0x000 },
6374 { 0x00000000, 0x002f0221, 0x000 },
6375 { 0x00000000, 0x0ce00000, 0x63b },
6376 { 0x81000000, 0x00204411, 0x000 },
6377 { 0x00000001, 0x00204811, 0x000 },
6378 { 0x00042004, 0x00604411, 0x68d },
6379 { 0x00001000, 0x00200811, 0x000 },
6380 { 0x0000002b, 0x00203622, 0x000 },
6381 { 0x00000000, 0x00600000, 0x641 },
6382 { 0x00000000, 0x00600000, 0x5c9 },
6383 { 0x98000000, 0x00204411, 0x000 },
6384 { 0x00000000, 0x00804811, 0x000 },
6385 { 0x00000000, 0xc0600000, 0x641 },
6386 { 0x00000000, 0xc0400400, 0x001 },
6387 { 0x0000a2a4, 0x00204411, 0x000 },
6388 { 0x00000022, 0x00204811, 0x000 },
6389 { 0x89000000, 0x00204411, 0x000 },
6390 { 0x00000001, 0x00404811, 0x62d },
6391 { 0x97000000, 0x00204411, 0x000 },
6392 { 0x00000000, 0x00204811, 0x000 },
6393 { 0x8a000000, 0x00204411, 0x000 },
6394 { 0x00000000, 0x00404811, 0x62d },
6395 { 0x00000000, 0x00600000, 0x65c },
6396 { 0x00002010, 0x00204411, 0x000 },
6397 { 0x00008000, 0x00204811, 0x000 },
6398 { 0x0001a2a4, 0xc0204411, 0x000 },
6399 { 0x00000016, 0x00604811, 0x36e },
6400 { 0x00002010, 0x00204411, 0x000 },
6401 { 0x00010000, 0x00204811, 0x000 },
6402 { 0x81000000, 0x00204411, 0x000 },
6403 { 0x00000001, 0x00204811, 0x000 },
6404 { 0x0000217c, 0x00204411, 0x000 },
6405 { 0x09800000, 0x00204811, 0x000 },
6406 { 0xffffffff, 0x00204811, 0x000 },
6407 { 0x00000000, 0x00204811, 0x000 },
6408 { 0x00000000, 0x17000000, 0x000 },
6409 { 0x0004217f, 0x00604411, 0x68d },
6410 { 0x0000001f, 0x00210230, 0x000 },
6411 { 0x00000000, 0x14c00000, 0x000 },
6412 { 0x00000004, 0x00404c11, 0x656 },
6413 { 0x00000000, 0x00400000, 0x000 },
6414 { 0x00000017, 0x00201e2d, 0x000 },
6415 { 0x00000004, 0x00291e27, 0x000 },
6416 { 0x00000017, 0x00803627, 0x000 },
6417 { 0x00000017, 0x00201e2d, 0x000 },
6418 { 0xfffffffb, 0x00281e27, 0x000 },
6419 { 0x00000017, 0x00803627, 0x000 },
6420 { 0x00000017, 0x00201e2d, 0x000 },
6421 { 0x00000008, 0x00291e27, 0x000 },
6422 { 0x00000017, 0x00803627, 0x000 },
6423 { 0x00000017, 0x00201e2d, 0x000 },
6424 { 0xfffffff7, 0x00281e27, 0x000 },
6425 { 0x00000017, 0x00803627, 0x000 },
6426 { 0x00002010, 0x00204411, 0x000 },
6427 { 0x00008000, 0x00204811, 0x000 },
6428 { 0x0001a2a4, 0x00204411, 0x000 },
6429 { 0x00000016, 0x00604811, 0x36e },
6430 { 0x00002010, 0x00204411, 0x000 },
6431 { 0x00010000, 0x00204811, 0x000 },
6432 { 0x0000217c, 0x00204411, 0x000 },
6433 { 0x01800000, 0x00204811, 0x000 },
6434 { 0xffffffff, 0x00204811, 0x000 },
6435 { 0x00000000, 0x00204811, 0x000 },
6436 { 0x00000000, 0x17000000, 0x000 },
6437 { 0x81000000, 0x00204411, 0x000 },
6438 { 0x00000001, 0x00204811, 0x000 },
6439 { 0x0004217f, 0x00604411, 0x68d },
6440 { 0x0000001f, 0x00210230, 0x000 },
6441 { 0x00000000, 0x14c00000, 0x68c },
6442 { 0x00000010, 0x00404c11, 0x672 },
6443 { 0x00000000, 0xc0200400, 0x000 },
6444 { 0x00000000, 0x38c00000, 0x000 },
6445 { 0x0000001d, 0x00200a2d, 0x000 },
6446 { 0x0000001e, 0x00200e2d, 0x000 },
6447 { 0x0000001f, 0x0020122d, 0x000 },
6448 { 0x00000020, 0x0020162d, 0x000 },
6449 { 0x00002169, 0x00204411, 0x000 },
6450 { 0x00000000, 0x00204804, 0x000 },
6451 { 0x00000000, 0x00204805, 0x000 },
6452 { 0x00000000, 0x00204801, 0x000 },
6453 { 0xcafebabe, 0x00204811, 0x000 },
6454 { 0x00000004, 0x00301224, 0x000 },
6455 { 0x00000000, 0x002f0064, 0x000 },
6456 { 0x00000000, 0x0cc00000, 0x68b },
6457 { 0x00000003, 0x00281a22, 0x000 },
6458 { 0x00000008, 0x00221222, 0x000 },
6459 { 0xfffff000, 0x00281224, 0x000 },
6460 { 0x00000000, 0x002910c4, 0x000 },
6461 { 0x0000001f, 0x00403624, 0x000 },
6462 { 0x00000000, 0x00800000, 0x000 },
6463 { 0x00000000, 0x1ac00000, 0x68d },
6464 { 0x9f000000, 0x00204411, 0x000 },
6465 { 0xcafebabe, 0x00204811, 0x000 },
6466 { 0x00000000, 0x1ae00000, 0x690 },
6467 { 0x00000000, 0x00800000, 0x000 },
6468 { 0x00000000, 0x1ac00000, 0x692 },
6469 { 0x9e000000, 0x00204411, 0x000 },
6470 { 0xcafebabe, 0x00204811, 0x000 },
6471 { 0x00000000, 0x1ae00000, 0x695 },
6472 { 0x00000000, 0x00800000, 0x000 },
6473 { 0x00000000, 0x00600000, 0x00b },
6474 { 0x00001000, 0x00600411, 0x315 },
6475 { 0x00000000, 0x00200411, 0x000 },
6476 { 0x00000000, 0x00600811, 0x1b2 },
6477 { 0x0000225c, 0x00204411, 0x000 },
6478 { 0x00000003, 0x00204811, 0x000 },
6479 { 0x00002256, 0x00204411, 0x000 },
6480 { 0x0000001b, 0x00204811, 0x000 },
6481 { 0x0000a1fc, 0x00204411, 0x000 },
6482 { 0x00000001, 0x00204811, 0x000 },
6483 { 0x0001a1fd, 0xc0204411, 0x000 },
6484 { 0x00000021, 0x00201e2d, 0x000 },
6485 { 0x00000010, 0x00221e27, 0x000 },
6486 { 0x00000024, 0x0020222d, 0x000 },
6487 { 0x0000ffff, 0x00282228, 0x000 },
6488 { 0x00000000, 0x00294907, 0x000 },
6489 { 0x00000000, 0x00204811, 0x000 },
6490 { 0x00000022, 0x0020222d, 0x000 },
6491 { 0x0000ffff, 0x00282228, 0x000 },
6492 { 0x00000000, 0x00294907, 0x000 },
6493 { 0x00000000, 0x00204811, 0x000 },
6494 { 0x00000023, 0x00201e2d, 0x000 },
6495 { 0x00000010, 0x00221e27, 0x000 },
6496 { 0x00000000, 0x00294907, 0x000 },
6497 { 0x00000000, 0x00404811, 0x000 },
6498 { 0x00000000, 0x00000000, 0x000 },
6499 { 0x00000000, 0x00000000, 0x000 },
6500 { 0x00000000, 0x00000000, 0x000 },
6501 { 0x00000000, 0x00000000, 0x000 },
6502 { 0x00000000, 0x00000000, 0x000 },
6503 { 0x00000000, 0x00000000, 0x000 },
6504 { 0x00000000, 0x00000000, 0x000 },
6505 { 0x00000000, 0x00000000, 0x000 },
6506 { 0x00000000, 0x00000000, 0x000 },
6507 { 0x00000000, 0x00000000, 0x000 },
6508 { 0x00000000, 0x00000000, 0x000 },
6509 { 0x00000000, 0x00000000, 0x000 },
6510 { 0x00000000, 0x00000000, 0x000 },
6511 { 0x00000000, 0x00000000, 0x000 },
6512 { 0x00000000, 0x00000000, 0x000 },
6513 { 0x00000000, 0x00000000, 0x000 },
6514 { 0x00000000, 0x00000000, 0x000 },
6515 { 0x00000000, 0x00000000, 0x000 },
6516 { 0x00000000, 0x00000000, 0x000 },
6517 { 0x00000000, 0x00000000, 0x000 },
6518 { 0x00000000, 0x00000000, 0x000 },
6519 { 0x00000000, 0x00000000, 0x000 },
6520 { 0x00000000, 0x00000000, 0x000 },
6521 { 0x00000000, 0x00000000, 0x000 },
6522 { 0x00000000, 0x00000000, 0x000 },
6523 { 0x00000000, 0x00000000, 0x000 },
6524 { 0x00000000, 0x00000000, 0x000 },
6525 { 0x00000000, 0x00000000, 0x000 },
6526 { 0x00000000, 0x00000000, 0x000 },
6527 { 0x00000000, 0x00000000, 0x000 },
6528 { 0x00000000, 0x00000000, 0x000 },
6529 { 0x00000000, 0x00000000, 0x000 },
6530 { 0x00000000, 0x00000000, 0x000 },
6531 { 0x00000000, 0x00000000, 0x000 },
6532 { 0x00000000, 0x00000000, 0x000 },
6533 { 0x00000000, 0x00000000, 0x000 },
6534 { 0x00000000, 0x00000000, 0x000 },
6535 { 0x00000000, 0x00000000, 0x000 },
6536 { 0x00000000, 0x00000000, 0x000 },
6537 { 0x00000000, 0x00000000, 0x000 },
6538 { 0x00000000, 0x00000000, 0x000 },
6539 { 0x00000000, 0x00000000, 0x000 },
6540 { 0x00000000, 0x00000000, 0x000 },
6541 { 0x00000000, 0x00000000, 0x000 },
6542 { 0x00000000, 0x00000000, 0x000 },
6543 { 0x00000000, 0x00000000, 0x000 },
6544 { 0x00000000, 0x00000000, 0x000 },
6545 { 0x00000000, 0x00000000, 0x000 },
6546 { 0x00000000, 0x00000000, 0x000 },
6547 { 0x00000000, 0x00000000, 0x000 },
6548 { 0x00000000, 0x00000000, 0x000 },
6549 { 0x00000000, 0x00000000, 0x000 },
6550 { 0x01420502, 0x05c00250, 0x000 },
6551 { 0x01c30168, 0x043f05c0, 0x000 },
6552 { 0x02250209, 0x02500151, 0x000 },
6553 { 0x02230245, 0x02a00241, 0x000 },
6554 { 0x03d705c0, 0x05c005c0, 0x000 },
6555 { 0x0649064a, 0x031f05c0, 0x000 },
6556 { 0x05c005c5, 0x03200340, 0x000 },
6557 { 0x032a0282, 0x03420334, 0x000 },
6558 { 0x05c005c0, 0x05c005c0, 0x000 },
6559 { 0x05c00551, 0x05c005c0, 0x000 },
6560 { 0x03ba05c0, 0x04bb0344, 0x000 },
6561 { 0x049a0450, 0x043d05c0, 0x000 },
6562 { 0x04d005c0, 0x044104dd, 0x000 },
6563 { 0x04500507, 0x03510375, 0x000 },
6564 { 0x05c005c0, 0x05c005c0, 0x000 },
6565 { 0x05c005c0, 0x05c005c0, 0x000 },
6566 { 0x05c005c0, 0x063f05c7, 0x000 },
6567 { 0x05c005c0, 0x000705c0, 0x000 },
6568 { 0x05c005c0, 0x05c005c0, 0x000 },
6569 { 0x05c005c0, 0x05c005c0, 0x000 },
6570 { 0x03f803ed, 0x04080406, 0x000 },
6571 { 0x040e040a, 0x040c0410, 0x000 },
6572 { 0x041c0418, 0x04240420, 0x000 },
6573 { 0x042c0428, 0x04340430, 0x000 },
6574 { 0x05c005c0, 0x043805c0, 0x000 },
6575 { 0x05c005c0, 0x05c005c0, 0x000 },
6576 { 0x05c005c0, 0x05c005c0, 0x000 },
6577 { 0x00020679, 0x06970006, 0x000 },
6578};
6579
6580static const u32 RV620_pfp_microcode[] = {
65810xca0400,
65820xa00000,
65830x7e828b,
65840x7c038b,
65850x8001b8,
65860x7c038b,
65870xd4401e,
65880xee001e,
65890xca0400,
65900xa00000,
65910x7e828b,
65920xc41838,
65930xca2400,
65940xca2800,
65950x9581a8,
65960xc41c3a,
65970xc3c000,
65980xca0800,
65990xca0c00,
66000x7c744b,
66010xc20005,
66020x99c000,
66030xc41c3a,
66040x7c744c,
66050xc0fff0,
66060x042c04,
66070x309002,
66080x7d2500,
66090x351402,
66100x7d350b,
66110x255403,
66120x7cd580,
66130x259c03,
66140x95c004,
66150xd5001b,
66160x7eddc1,
66170x7d9d80,
66180xd6801b,
66190xd5801b,
66200xd4401e,
66210xd5401e,
66220xd6401e,
66230xd6801e,
66240xd4801e,
66250xd4c01e,
66260x9783d3,
66270xd5c01e,
66280xca0800,
66290x80001a,
66300xca0c00,
66310xe4011e,
66320xd4001e,
66330x80000c,
66340xc41838,
66350xe4013e,
66360xd4001e,
66370x80000c,
66380xc41838,
66390xd4401e,
66400xee001e,
66410xca0400,
66420xa00000,
66430x7e828b,
66440xe4011e,
66450xd4001e,
66460xd4401e,
66470xee001e,
66480xca0400,
66490xa00000,
66500x7e828b,
66510xe4013e,
66520xd4001e,
66530xd4401e,
66540xee001e,
66550xca0400,
66560xa00000,
66570x7e828b,
66580xca1800,
66590xd4401e,
66600xd5801e,
66610x800053,
66620xd40075,
66630xd4401e,
66640xca0800,
66650xca0c00,
66660xca1000,
66670xd48019,
66680xd4c018,
66690xd50017,
66700xd4801e,
66710xd4c01e,
66720xd5001e,
66730xe2001e,
66740xca0400,
66750xa00000,
66760x7e828b,
66770xca0800,
66780xd48060,
66790xd4401e,
66800x800000,
66810xd4801e,
66820xca0800,
66830xd48061,
66840xd4401e,
66850x800000,
66860xd4801e,
66870xca0800,
66880xca0c00,
66890xd4401e,
66900xd48016,
66910xd4c016,
66920xd4801e,
66930x8001b8,
66940xd4c01e,
66950xc60843,
66960xca0c00,
66970xca1000,
66980x948004,
66990xca1400,
67000xe420f3,
67010xd42013,
67020xd56065,
67030xd4e01c,
67040xd5201c,
67050xd5601c,
67060x800000,
67070x062001,
67080xc60843,
67090xca0c00,
67100xca1000,
67110x9483f7,
67120xca1400,
67130xe420f3,
67140x800079,
67150xd42013,
67160xc60843,
67170xca0c00,
67180xca1000,
67190x9883ef,
67200xca1400,
67210xd40064,
67220x80008d,
67230x000000,
67240xc41432,
67250xc61843,
67260xc4082f,
67270x954005,
67280xc40c30,
67290xd4401e,
67300x800000,
67310xee001e,
67320x9583f5,
67330xc41031,
67340xd44033,
67350xd52065,
67360xd4a01c,
67370xd4e01c,
67380xd5201c,
67390xe4015e,
67400xd4001e,
67410x800000,
67420x062001,
67430xca1800,
67440x0a2001,
67450xd60076,
67460xc40836,
67470x988007,
67480xc61045,
67490x950110,
67500xd4001f,
67510xd46062,
67520x800000,
67530xd42062,
67540xcc3835,
67550xcc1433,
67560x8401bb,
67570xd40072,
67580xd5401e,
67590x800000,
67600xee001e,
67610xe2001a,
67620x8401bb,
67630xe2001a,
67640xcc104b,
67650xcc0447,
67660x2c9401,
67670x7d098b,
67680x984005,
67690x7d15cb,
67700xd4001a,
67710x8001b8,
67720xd4006d,
67730x344401,
67740xcc0c48,
67750x98403a,
67760xcc2c4a,
67770x958004,
67780xcc0449,
67790x8001b8,
67800xd4001a,
67810xd4c01a,
67820x282801,
67830x8400f0,
67840xcc1003,
67850x98801b,
67860x04380c,
67870x8400f0,
67880xcc1003,
67890x988017,
67900x043808,
67910x8400f0,
67920xcc1003,
67930x988013,
67940x043804,
67950x8400f0,
67960xcc1003,
67970x988014,
67980xcc104c,
67990x9a8009,
68000xcc144d,
68010x9840dc,
68020xd4006d,
68030xcc1848,
68040xd5001a,
68050xd5401a,
68060x8000c9,
68070xd5801a,
68080x96c0d5,
68090xd4006d,
68100x8001b8,
68110xd4006e,
68120x9ac003,
68130xd4006d,
68140xd4006e,
68150x800000,
68160xec007f,
68170x9ac0cc,
68180xd4006d,
68190x8001b8,
68200xd4006e,
68210xcc1403,
68220xcc1803,
68230xcc1c03,
68240x7d9103,
68250x7dd583,
68260x7d190c,
68270x35cc1f,
68280x35701f,
68290x7cf0cb,
68300x7cd08b,
68310x880000,
68320x7e8e8b,
68330x95c004,
68340xd4006e,
68350x8001b8,
68360xd4001a,
68370xd4c01a,
68380xcc0803,
68390xcc0c03,
68400xcc1003,
68410xcc1403,
68420xcc1803,
68430xcc1c03,
68440xcc2403,
68450xcc2803,
68460x35c41f,
68470x36b01f,
68480x7c704b,
68490x34f01f,
68500x7c704b,
68510x35701f,
68520x7c704b,
68530x7d8881,
68540x7dccc1,
68550x7e5101,
68560x7e9541,
68570x7c9082,
68580x7cd4c2,
68590x7c848b,
68600x9ac003,
68610x7c8c8b,
68620x2c8801,
68630x98809e,
68640xd4006d,
68650x98409c,
68660xd4006e,
68670xcc084c,
68680xcc0c4d,
68690xcc1048,
68700xd4801a,
68710xd4c01a,
68720x800101,
68730xd5001a,
68740xcc0832,
68750xd40032,
68760x9482d9,
68770xca0c00,
68780xd4401e,
68790x800000,
68800xd4001e,
68810xe4011e,
68820xd4001e,
68830xca0800,
68840xca0c00,
68850xca1000,
68860xd4401e,
68870xca1400,
68880xd4801e,
68890xd4c01e,
68900xd5001e,
68910xd5401e,
68920xd54034,
68930x800000,
68940xee001e,
68950x280404,
68960xe2001a,
68970xe2001a,
68980xd4401a,
68990xca3800,
69000xcc0803,
69010xcc0c03,
69020xcc0c03,
69030xcc0c03,
69040x9882bd,
69050x000000,
69060x8401bb,
69070xd7a06f,
69080x800000,
69090xee001f,
69100xca0400,
69110xc2ff00,
69120xcc0834,
69130xc13fff,
69140x7c74cb,
69150x7cc90b,
69160x7d010f,
69170x9902b0,
69180x7c738b,
69190x8401bb,
69200xd7a06f,
69210x800000,
69220xee001f,
69230xca0800,
69240x281900,
69250x7d898b,
69260x958014,
69270x281404,
69280xca0c00,
69290xca1000,
69300xca1c00,
69310xca2400,
69320xe2001f,
69330xd4c01a,
69340xd5001a,
69350xd5401a,
69360xcc1803,
69370xcc2c03,
69380xcc2c03,
69390xcc2c03,
69400x7da58b,
69410x7d9c47,
69420x984297,
69430x000000,
69440x800161,
69450xd4c01a,
69460xd4401e,
69470xd4801e,
69480x800000,
69490xee001e,
69500xe4011e,
69510xd4001e,
69520xd4401e,
69530xee001e,
69540xca0400,
69550xa00000,
69560x7e828b,
69570xe4013e,
69580xd4001e,
69590xd4401e,
69600xee001e,
69610xca0400,
69620xa00000,
69630x7e828b,
69640xca0800,
69650x248c06,
69660x0ccc06,
69670x98c006,
69680xcc104e,
69690x990004,
69700xd40073,
69710xe4011e,
69720xd4001e,
69730xd4401e,
69740xd4801e,
69750x800000,
69760xee001e,
69770xca0800,
69780xca0c00,
69790x34d018,
69800x251001,
69810x950021,
69820xc17fff,
69830xca1000,
69840xca1400,
69850xca1800,
69860xd4801d,
69870xd4c01d,
69880x7db18b,
69890xc14202,
69900xc2c001,
69910xd5801d,
69920x34dc0e,
69930x7d5d4c,
69940x7f734c,
69950xd7401e,
69960xd5001e,
69970xd5401e,
69980xc14200,
69990xc2c000,
70000x099c01,
70010x31dc10,
70020x7f5f4c,
70030x7f734c,
70040x042802,
70050x7d8380,
70060xd5a86f,
70070xd58066,
70080xd7401e,
70090xec005e,
70100xc82402,
70110xc82402,
70120x8001b8,
70130xd60076,
70140xd4401e,
70150xd4801e,
70160xd4c01e,
70170x800000,
70180xee001e,
70190x800000,
70200xee001f,
70210xd4001f,
70220x800000,
70230xd4001f,
70240xd4001f,
70250x880000,
70260xd4001f,
70270x000000,
70280x000000,
70290x000000,
70300x000000,
70310x000000,
70320x000000,
70330x000000,
70340x000000,
70350x000000,
70360x000000,
70370x000000,
70380x000000,
70390x000000,
70400x000000,
70410x000000,
70420x000000,
70430x000000,
70440x000000,
70450x000000,
70460x000000,
70470x000000,
70480x000000,
70490x000000,
70500x000000,
70510x000000,
70520x000000,
70530x000000,
70540x000000,
70550x000000,
70560x000000,
70570x000000,
70580x000000,
70590x000000,
70600x000000,
70610x000000,
70620x000000,
70630x000000,
70640x000000,
70650x000000,
70660x000000,
70670x000000,
70680x000000,
70690x000000,
70700x000000,
70710x000000,
70720x000000,
70730x000000,
70740x000000,
70750x000000,
70760x000000,
70770x000000,
70780x000000,
70790x000000,
70800x000000,
70810x000000,
70820x000000,
70830x000000,
70840x000000,
70850x000000,
70860x000000,
70870x000000,
70880x000000,
70890x000000,
70900x000000,
70910x000000,
70920x000000,
70930x010171,
70940x020178,
70950x03008f,
70960x04007f,
70970x050003,
70980x06003f,
70990x070032,
71000x08012c,
71010x090046,
71020x0a0036,
71030x1001b6,
71040x1700a2,
71050x22013a,
71060x230149,
71070x2000b4,
71080x240125,
71090x27004d,
71100x28006a,
71110x2a0060,
71120x2b0052,
71130x2f0065,
71140x320087,
71150x34017f,
71160x3c0156,
71170x3f0072,
71180x41018c,
71190x44012e,
71200x550173,
71210x56017a,
71220x60000b,
71230x610034,
71240x620038,
71250x630038,
71260x640038,
71270x650038,
71280x660038,
71290x670038,
71300x68003a,
71310x690041,
71320x6a0048,
71330x6b0048,
71340x6c0048,
71350x6d0048,
71360x6e0048,
71370x6f0048,
71380x000006,
71390x000006,
71400x000006,
71410x000006,
71420x000006,
71430x000006,
71440x000006,
71450x000006,
71460x000006,
71470x000006,
71480x000006,
71490x000006,
71500x000006,
71510x000006,
71520x000006,
71530x000006,
71540x000006,
71550x000006,
71560x000006,
7157};
7158
7159static const u32 RV630_cp_microcode[][3] = {
7160 { 0x00000000, 0xc0200400, 0x000 },
7161 { 0x00000000, 0x00a0000a, 0x000 },
7162 { 0x0000ffff, 0x00284621, 0x000 },
7163 { 0x00000000, 0xd9004800, 0x000 },
7164 { 0x00000000, 0xc0200400, 0x000 },
7165 { 0x00000000, 0x00a0000a, 0x000 },
7166 { 0x00000000, 0x00e00000, 0x000 },
7167 { 0x00010000, 0xc0294620, 0x000 },
7168 { 0x00000000, 0xd9004800, 0x000 },
7169 { 0x00000000, 0xc0200400, 0x000 },
7170 { 0x00000000, 0x00a0000a, 0x000 },
7171 { 0x81000000, 0x00204411, 0x000 },
7172 { 0x00000001, 0x00204811, 0x000 },
7173 { 0x00042004, 0x00604411, 0x68a },
7174 { 0x00000000, 0x00600000, 0x62e },
7175 { 0x00000000, 0x00600000, 0x642 },
7176 { 0x00000000, 0xc0200800, 0x000 },
7177 { 0x00000f00, 0x00281622, 0x000 },
7178 { 0x00000008, 0x00211625, 0x000 },
7179 { 0x00000018, 0x00203625, 0x000 },
7180 { 0x8d000000, 0x00204411, 0x000 },
7181 { 0x00000004, 0x002f0225, 0x000 },
7182 { 0x00000000, 0x0ce00000, 0x018 },
7183 { 0x00412000, 0x00404811, 0x019 },
7184 { 0x00422000, 0x00204811, 0x000 },
7185 { 0x8e000000, 0x00204411, 0x000 },
7186 { 0x00000028, 0x00204a2d, 0x000 },
7187 { 0x90000000, 0x00204411, 0x000 },
7188 { 0x00000000, 0x00204805, 0x000 },
7189 { 0x0000000c, 0x00211622, 0x000 },
7190 { 0x00000003, 0x00281625, 0x000 },
7191 { 0x00000019, 0x00211a22, 0x000 },
7192 { 0x00000004, 0x00281a26, 0x000 },
7193 { 0x00000000, 0x002914c5, 0x000 },
7194 { 0x00000019, 0x00203625, 0x000 },
7195 { 0x00000000, 0x003a1402, 0x000 },
7196 { 0x00000016, 0x00211625, 0x000 },
7197 { 0x00000003, 0x00281625, 0x000 },
7198 { 0x00000017, 0x00200e2d, 0x000 },
7199 { 0xfffffffc, 0x00280e23, 0x000 },
7200 { 0x00000000, 0x002914a3, 0x000 },
7201 { 0x00000017, 0x00203625, 0x000 },
7202 { 0x00008000, 0x00280e22, 0x000 },
7203 { 0x00000007, 0x00220e23, 0x000 },
7204 { 0x00000000, 0x0029386e, 0x000 },
7205 { 0x20000000, 0x00280e22, 0x000 },
7206 { 0x00000006, 0x00210e23, 0x000 },
7207 { 0x00000000, 0x0029386e, 0x000 },
7208 { 0x00000000, 0x00220222, 0x000 },
7209 { 0x00000000, 0x14e00000, 0x038 },
7210 { 0x00000000, 0x2ee00000, 0x035 },
7211 { 0x00000000, 0x2ce00000, 0x037 },
7212 { 0x00000000, 0x00400e2d, 0x039 },
7213 { 0x00000008, 0x00200e2d, 0x000 },
7214 { 0x00000009, 0x0040122d, 0x046 },
7215 { 0x00000001, 0x00400e2d, 0x039 },
7216 { 0x00000000, 0xc0200c00, 0x000 },
7217 { 0x003ffffc, 0x00281223, 0x000 },
7218 { 0x00000002, 0x00221224, 0x000 },
7219 { 0x0000001f, 0x00211e23, 0x000 },
7220 { 0x00000000, 0x14e00000, 0x03e },
7221 { 0x00000008, 0x00401c11, 0x041 },
7222 { 0x0000000d, 0x00201e2d, 0x000 },
7223 { 0x0000000f, 0x00281e27, 0x000 },
7224 { 0x00000003, 0x00221e27, 0x000 },
7225 { 0x7fc00000, 0x00281a23, 0x000 },
7226 { 0x00000014, 0x00211a26, 0x000 },
7227 { 0x00000001, 0x00331a26, 0x000 },
7228 { 0x00000008, 0x00221a26, 0x000 },
7229 { 0x00000000, 0x00290cc7, 0x000 },
7230 { 0x00000027, 0x00203624, 0x000 },
7231 { 0x00007f00, 0x00281221, 0x000 },
7232 { 0x00001400, 0x002f0224, 0x000 },
7233 { 0x00000000, 0x0ce00000, 0x04b },
7234 { 0x00000001, 0x00290e23, 0x000 },
7235 { 0x0000000e, 0x00203623, 0x000 },
7236 { 0x0000e000, 0x00204411, 0x000 },
7237 { 0xfff80000, 0x00294a23, 0x000 },
7238 { 0x00000000, 0x003a2c02, 0x000 },
7239 { 0x00000002, 0x00220e2b, 0x000 },
7240 { 0xfc000000, 0x00280e23, 0x000 },
7241 { 0x0000000f, 0x00203623, 0x000 },
7242 { 0x00001fff, 0x00294a23, 0x000 },
7243 { 0x00000027, 0x00204a2d, 0x000 },
7244 { 0x00000000, 0x00204811, 0x000 },
7245 { 0x00000029, 0x00200e2d, 0x000 },
7246 { 0x060a0200, 0x00294a23, 0x000 },
7247 { 0x00000000, 0x00204811, 0x000 },
7248 { 0x00000000, 0x00204811, 0x000 },
7249 { 0x00000001, 0x00210222, 0x000 },
7250 { 0x00000000, 0x14e00000, 0x061 },
7251 { 0x00000000, 0x2ee00000, 0x05f },
7252 { 0x00000000, 0x2ce00000, 0x05e },
7253 { 0x00000000, 0x00400e2d, 0x062 },
7254 { 0x00000001, 0x00400e2d, 0x062 },
7255 { 0x0000000a, 0x00200e2d, 0x000 },
7256 { 0x0000000b, 0x0040122d, 0x06a },
7257 { 0x00000000, 0xc0200c00, 0x000 },
7258 { 0x003ffffc, 0x00281223, 0x000 },
7259 { 0x00000002, 0x00221224, 0x000 },
7260 { 0x7fc00000, 0x00281623, 0x000 },
7261 { 0x00000014, 0x00211625, 0x000 },
7262 { 0x00000001, 0x00331625, 0x000 },
7263 { 0x80000000, 0x00280e23, 0x000 },
7264 { 0x00000000, 0x00290ca3, 0x000 },
7265 { 0x3ffffc00, 0x00290e23, 0x000 },
7266 { 0x0000001f, 0x00211e23, 0x000 },
7267 { 0x00000000, 0x14e00000, 0x06d },
7268 { 0x00000100, 0x00401c11, 0x070 },
7269 { 0x0000000d, 0x00201e2d, 0x000 },
7270 { 0x000000f0, 0x00281e27, 0x000 },
7271 { 0x00000004, 0x00221e27, 0x000 },
7272 { 0x81000000, 0x00204411, 0x000 },
7273 { 0x0000000d, 0x00204811, 0x000 },
7274 { 0xfffff0ff, 0x00281a30, 0x000 },
7275 { 0x0000a028, 0x00204411, 0x000 },
7276 { 0x00000000, 0x002948e6, 0x000 },
7277 { 0x0000a018, 0x00204411, 0x000 },
7278 { 0x3fffffff, 0x00284a23, 0x000 },
7279 { 0x0000a010, 0x00204411, 0x000 },
7280 { 0x00000000, 0x00204804, 0x000 },
7281 { 0x00000030, 0x0020162d, 0x000 },
7282 { 0x00000002, 0x00291625, 0x000 },
7283 { 0x00000030, 0x00203625, 0x000 },
7284 { 0x00000025, 0x0020162d, 0x000 },
7285 { 0x00000000, 0x002f00a3, 0x000 },
7286 { 0x00000000, 0x0cc00000, 0x083 },
7287 { 0x00000026, 0x0020162d, 0x000 },
7288 { 0x00000000, 0x002f00a4, 0x000 },
7289 { 0x00000000, 0x0cc00000, 0x084 },
7290 { 0x00000000, 0x00400000, 0x08a },
7291 { 0x00000025, 0x00203623, 0x000 },
7292 { 0x00000026, 0x00203624, 0x000 },
7293 { 0x00000017, 0x00201e2d, 0x000 },
7294 { 0x00000002, 0x00210227, 0x000 },
7295 { 0x00000000, 0x14e00000, 0x08a },
7296 { 0x00000000, 0x00600000, 0x665 },
7297 { 0x00000000, 0x00600000, 0x659 },
7298 { 0x00000002, 0x00210e22, 0x000 },
7299 { 0x00000000, 0x14c00000, 0x08d },
7300 { 0x00000012, 0xc0403620, 0x093 },
7301 { 0x00000000, 0x2ee00000, 0x091 },
7302 { 0x00000000, 0x2ce00000, 0x090 },
7303 { 0x00000002, 0x00400e2d, 0x092 },
7304 { 0x00000003, 0x00400e2d, 0x092 },
7305 { 0x0000000c, 0x00200e2d, 0x000 },
7306 { 0x00000012, 0x00203623, 0x000 },
7307 { 0x00000003, 0x00210e22, 0x000 },
7308 { 0x00000000, 0x14c00000, 0x098 },
7309 { 0x0000a00c, 0x00204411, 0x000 },
7310 { 0x00000000, 0xc0204800, 0x000 },
7311 { 0x00000000, 0xc0404800, 0x0a0 },
7312 { 0x0000a00c, 0x00204411, 0x000 },
7313 { 0x00000000, 0x00204811, 0x000 },
7314 { 0x00000000, 0x2ee00000, 0x09e },
7315 { 0x00000000, 0x2ce00000, 0x09d },
7316 { 0x00000002, 0x00400e2d, 0x09f },
7317 { 0x00000003, 0x00400e2d, 0x09f },
7318 { 0x0000000c, 0x00200e2d, 0x000 },
7319 { 0x00000000, 0x00204803, 0x000 },
7320 { 0x00000000, 0x003a0c02, 0x000 },
7321 { 0x003f0000, 0x00280e23, 0x000 },
7322 { 0x00000010, 0x00210e23, 0x000 },
7323 { 0x00000011, 0x00203623, 0x000 },
7324 { 0x0000001e, 0x0021022b, 0x000 },
7325 { 0x00000000, 0x14c00000, 0x0a7 },
7326 { 0x00000016, 0xc0203620, 0x000 },
7327 { 0x0000001f, 0x0021022b, 0x000 },
7328 { 0x00000000, 0x14c00000, 0x0aa },
7329 { 0x00000015, 0xc0203620, 0x000 },
7330 { 0x00000008, 0x00210e2b, 0x000 },
7331 { 0x0000007f, 0x00280e23, 0x000 },
7332 { 0x00000000, 0x002f0223, 0x000 },
7333 { 0x00000000, 0x0ce00000, 0x0e1 },
7334 { 0x00000000, 0x27000000, 0x000 },
7335 { 0x00000000, 0x00600000, 0x2a3 },
7336 { 0x00000001, 0x002f0223, 0x000 },
7337 { 0x00000000, 0x0ae00000, 0x0b3 },
7338 { 0x00000000, 0x00600000, 0x13a },
7339 { 0x81000000, 0x00204411, 0x000 },
7340 { 0x00000006, 0x00204811, 0x000 },
7341 { 0x0000000c, 0x00221e30, 0x000 },
7342 { 0x99800000, 0x00204411, 0x000 },
7343 { 0x00000004, 0x0020122d, 0x000 },
7344 { 0x00000008, 0x00221224, 0x000 },
7345 { 0x00000010, 0x00201811, 0x000 },
7346 { 0x00000000, 0x00291ce4, 0x000 },
7347 { 0x00000000, 0x00604807, 0x12f },
7348 { 0x9b000000, 0x00204411, 0x000 },
7349 { 0x00000000, 0x00204802, 0x000 },
7350 { 0x9c000000, 0x00204411, 0x000 },
7351 { 0x00000000, 0x0033146f, 0x000 },
7352 { 0x00000001, 0x00333e23, 0x000 },
7353 { 0x00000000, 0xd9004800, 0x000 },
7354 { 0x00000000, 0x00203c05, 0x000 },
7355 { 0x81000000, 0x00204411, 0x000 },
7356 { 0x0000000e, 0x00204811, 0x000 },
7357 { 0x00000000, 0x00201010, 0x000 },
7358 { 0x0000e007, 0x00204411, 0x000 },
7359 { 0x0000000f, 0x0021022b, 0x000 },
7360 { 0x00000000, 0x14c00000, 0x0cb },
7361 { 0x00f8ff08, 0x00204811, 0x000 },
7362 { 0x98000000, 0x00404811, 0x0dc },
7363 { 0x000000f0, 0x00280e22, 0x000 },
7364 { 0x000000a0, 0x002f0223, 0x000 },
7365 { 0x00000000, 0x0cc00000, 0x0da },
7366 { 0x00000011, 0x00200e2d, 0x000 },
7367 { 0x00000001, 0x002f0223, 0x000 },
7368 { 0x00000000, 0x0ce00000, 0x0d5 },
7369 { 0x00000002, 0x002f0223, 0x000 },
7370 { 0x00000000, 0x0ce00000, 0x0d4 },
7371 { 0x00003f00, 0x00400c11, 0x0d6 },
7372 { 0x00001f00, 0x00400c11, 0x0d6 },
7373 { 0x00000f00, 0x00200c11, 0x000 },
7374 { 0x00380009, 0x00294a23, 0x000 },
7375 { 0x3f000000, 0x00280e2b, 0x000 },
7376 { 0x00000002, 0x00220e23, 0x000 },
7377 { 0x00000007, 0x00494a23, 0x0dc },
7378 { 0x00380f09, 0x00204811, 0x000 },
7379 { 0x68000007, 0x00204811, 0x000 },
7380 { 0x00000008, 0x00214a27, 0x000 },
7381 { 0x00000000, 0x00204811, 0x000 },
7382 { 0x060a0200, 0x00294a24, 0x000 },
7383 { 0x00000000, 0x00204811, 0x000 },
7384 { 0x00000000, 0x00204811, 0x000 },
7385 { 0x0000a202, 0x00204411, 0x000 },
7386 { 0x00ff0000, 0x00280e22, 0x000 },
7387 { 0x00000080, 0x00294a23, 0x000 },
7388 { 0x00000027, 0x00200e2d, 0x000 },
7389 { 0x00000026, 0x0020122d, 0x000 },
7390 { 0x00000000, 0x002f0083, 0x000 },
7391 { 0x00000000, 0x0ce00000, 0x0ea },
7392 { 0x00000000, 0x00600000, 0x65f },
7393 { 0x00000000, 0x00400000, 0x0eb },
7394 { 0x00000000, 0x00600000, 0x662 },
7395 { 0x00000007, 0x0020222d, 0x000 },
7396 { 0x00000005, 0x00220e22, 0x000 },
7397 { 0x00100000, 0x00280e23, 0x000 },
7398 { 0x00000000, 0x00292068, 0x000 },
7399 { 0x00000000, 0x003a0c02, 0x000 },
7400 { 0x000000ef, 0x00280e23, 0x000 },
7401 { 0x00000000, 0x00292068, 0x000 },
7402 { 0x00000017, 0x00200e2d, 0x000 },
7403 { 0x00000003, 0x00210223, 0x000 },
7404 { 0x00000000, 0x14e00000, 0x0f8 },
7405 { 0x0000000b, 0x00210228, 0x000 },
7406 { 0x00000000, 0x14c00000, 0x0f8 },
7407 { 0x00000400, 0x00292228, 0x000 },
7408 { 0x00000014, 0x00203628, 0x000 },
7409 { 0x0000001c, 0x00210e22, 0x000 },
7410 { 0x00000000, 0x14c00000, 0x0fd },
7411 { 0x0000a30c, 0x00204411, 0x000 },
7412 { 0x00000000, 0x00204811, 0x000 },
7413 { 0x0000001e, 0x00210e22, 0x000 },
7414 { 0x00000000, 0x14c00000, 0x10b },
7415 { 0x0000a30f, 0x00204411, 0x000 },
7416 { 0x00000011, 0x00200e2d, 0x000 },
7417 { 0x00000001, 0x002f0223, 0x000 },
7418 { 0x00000000, 0x0cc00000, 0x104 },
7419 { 0xffffffff, 0x00404811, 0x10b },
7420 { 0x00000002, 0x002f0223, 0x000 },
7421 { 0x00000000, 0x0cc00000, 0x107 },
7422 { 0x0000ffff, 0x00404811, 0x10b },
7423 { 0x00000004, 0x002f0223, 0x000 },
7424 { 0x00000000, 0x0cc00000, 0x10a },
7425 { 0x000000ff, 0x00404811, 0x10b },
7426 { 0x00000001, 0x00204811, 0x000 },
7427 { 0x0002c400, 0x00204411, 0x000 },
7428 { 0x0000001f, 0x00210e22, 0x000 },
7429 { 0x00000000, 0x14c00000, 0x112 },
7430 { 0x00000010, 0x40210e20, 0x000 },
7431 { 0x00000013, 0x00203623, 0x000 },
7432 { 0x00000018, 0x40224a20, 0x000 },
7433 { 0x00000010, 0xc0424a20, 0x114 },
7434 { 0x00000000, 0x00200c11, 0x000 },
7435 { 0x00000013, 0x00203623, 0x000 },
7436 { 0x00000000, 0x00204811, 0x000 },
7437 { 0x00000000, 0x00204811, 0x000 },
7438 { 0x0000000a, 0x00201011, 0x000 },
7439 { 0x00000000, 0x002f0224, 0x000 },
7440 { 0x00000000, 0x0ce00000, 0x11b },
7441 { 0x00000000, 0x00204811, 0x000 },
7442 { 0x00000001, 0x00531224, 0x117 },
7443 { 0xffbfffff, 0x00283a2e, 0x000 },
7444 { 0x0000001b, 0x00210222, 0x000 },
7445 { 0x00000000, 0x14c00000, 0x12e },
7446 { 0x81000000, 0x00204411, 0x000 },
7447 { 0x0000000d, 0x00204811, 0x000 },
7448 { 0x00000018, 0x00220e30, 0x000 },
7449 { 0xfc000000, 0x00280e23, 0x000 },
7450 { 0x81000000, 0x00204411, 0x000 },
7451 { 0x0000000e, 0x00204811, 0x000 },
7452 { 0x00000000, 0x00201010, 0x000 },
7453 { 0x0000e00e, 0x00204411, 0x000 },
7454 { 0x07f8ff08, 0x00204811, 0x000 },
7455 { 0x00000000, 0x00294a23, 0x000 },
7456 { 0x0000001c, 0x00201e2d, 0x000 },
7457 { 0x00000008, 0x00214a27, 0x000 },
7458 { 0x00000000, 0x00204811, 0x000 },
7459 { 0x060a0200, 0x00294a24, 0x000 },
7460 { 0x00000000, 0x00204811, 0x000 },
7461 { 0x00000000, 0x00204811, 0x000 },
7462 { 0x00000000, 0x00800000, 0x000 },
7463 { 0x81000000, 0x00204411, 0x000 },
7464 { 0x00000001, 0x00204811, 0x000 },
7465 { 0x0000217c, 0x00204411, 0x000 },
7466 { 0x00800000, 0x00204811, 0x000 },
7467 { 0x00000000, 0x00204806, 0x000 },
7468 { 0x00000008, 0x00214a27, 0x000 },
7469 { 0x00000000, 0x17000000, 0x000 },
7470 { 0x0004217f, 0x00604411, 0x68a },
7471 { 0x0000001f, 0x00210230, 0x000 },
7472 { 0x00000000, 0x14c00000, 0x689 },
7473 { 0x00000004, 0x00404c11, 0x135 },
7474 { 0x81000000, 0x00204411, 0x000 },
7475 { 0x00000001, 0x00204811, 0x000 },
7476 { 0x000021f8, 0x00204411, 0x000 },
7477 { 0x0000001c, 0x00204811, 0x000 },
7478 { 0x000421f9, 0x00604411, 0x68a },
7479 { 0x00000011, 0x00210230, 0x000 },
7480 { 0x00000000, 0x14e00000, 0x13c },
7481 { 0x00000000, 0x00800000, 0x000 },
7482 { 0x00000000, 0x00600000, 0x00b },
7483 { 0x00000000, 0x00600411, 0x315 },
7484 { 0x00000000, 0x00200411, 0x000 },
7485 { 0x00000000, 0x00600811, 0x1b2 },
7486 { 0x00000000, 0x00600000, 0x160 },
7487 { 0x0000ffff, 0x40280e20, 0x000 },
7488 { 0x00000010, 0xc0211220, 0x000 },
7489 { 0x0000ffff, 0x40280620, 0x000 },
7490 { 0x00000010, 0xc0210a20, 0x000 },
7491 { 0x00000000, 0x00341461, 0x000 },
7492 { 0x00000000, 0x00741882, 0x2bb },
7493 { 0x0001a1fd, 0x00604411, 0x2e0 },
7494 { 0x00003fff, 0x002f022f, 0x000 },
7495 { 0x00000000, 0x0cc00000, 0x147 },
7496 { 0x00000000, 0xc0400400, 0x001 },
7497 { 0x00000000, 0x00600000, 0x00b },
7498 { 0x00000000, 0x00600411, 0x315 },
7499 { 0x00000000, 0x00200411, 0x000 },
7500 { 0x00000000, 0x00600811, 0x1b2 },
7501 { 0x00003fff, 0x002f022f, 0x000 },
7502 { 0x00000000, 0x0ce00000, 0x000 },
7503 { 0x00000000, 0x00600000, 0x160 },
7504 { 0x00000010, 0x40210e20, 0x000 },
7505 { 0x0000ffff, 0xc0281220, 0x000 },
7506 { 0x00000010, 0x40211620, 0x000 },
7507 { 0x0000ffff, 0xc0681a20, 0x2bb },
7508 { 0x0001a1fd, 0x00604411, 0x2e0 },
7509 { 0x00003fff, 0x002f022f, 0x000 },
7510 { 0x00000000, 0x0cc00000, 0x158 },
7511 { 0x00000000, 0xc0400400, 0x001 },
7512 { 0x0000225c, 0x00204411, 0x000 },
7513 { 0x00000001, 0x00300a2f, 0x000 },
7514 { 0x00000001, 0x00210a22, 0x000 },
7515 { 0x00000003, 0x00384a22, 0x000 },
7516 { 0x00002256, 0x00204411, 0x000 },
7517 { 0x0000001a, 0x00204811, 0x000 },
7518 { 0x0000a1fc, 0x00204411, 0x000 },
7519 { 0x00000001, 0x00804811, 0x000 },
7520 { 0x00000000, 0x00600000, 0x00b },
7521 { 0x00000000, 0x00600000, 0x18f },
7522 { 0x00000000, 0x00600000, 0x1a0 },
7523 { 0x00003fff, 0x002f022f, 0x000 },
7524 { 0x00000000, 0x0ce00000, 0x000 },
7525 { 0x00000000, 0x00202c08, 0x000 },
7526 { 0x00000000, 0x00202411, 0x000 },
7527 { 0x00000000, 0x00202811, 0x000 },
7528 { 0x00002256, 0x00204411, 0x000 },
7529 { 0x00000016, 0x00204811, 0x000 },
7530 { 0x0000225c, 0x00204411, 0x000 },
7531 { 0x00000003, 0x00204811, 0x000 },
7532 { 0x93800000, 0x00204411, 0x000 },
7533 { 0x00000002, 0x00221e29, 0x000 },
7534 { 0x00000000, 0x007048eb, 0x19c },
7535 { 0x00000000, 0x00600000, 0x2bb },
7536 { 0x00000001, 0x40330620, 0x000 },
7537 { 0x00000000, 0xc0302409, 0x000 },
7538 { 0x00003fff, 0x002f022f, 0x000 },
7539 { 0x00000000, 0x0ce00000, 0x000 },
7540 { 0x00000000, 0x00600000, 0x2a3 },
7541 { 0x00000000, 0x002f0221, 0x000 },
7542 { 0x00000000, 0x0ae00000, 0x181 },
7543 { 0x00000000, 0x00600000, 0x13a },
7544 { 0x00000000, 0x00400000, 0x186 },
7545 { 0x95000000, 0x00204411, 0x000 },
7546 { 0x00000000, 0x002f0221, 0x000 },
7547 { 0x00000000, 0x0ce00000, 0x186 },
7548 { 0x00000000, 0xc0204800, 0x000 },
7549 { 0x00000001, 0x00530621, 0x182 },
7550 { 0x92000000, 0x00204411, 0x000 },
7551 { 0x00000000, 0xc0604800, 0x197 },
7552 { 0x0001a1fd, 0x00204411, 0x000 },
7553 { 0x00000011, 0x0020062d, 0x000 },
7554 { 0x00000000, 0x0078042a, 0x2fb },
7555 { 0x00000000, 0x00202809, 0x000 },
7556 { 0x00003fff, 0x002f022f, 0x000 },
7557 { 0x00000000, 0x0cc00000, 0x174 },
7558 { 0x00000000, 0xc0400400, 0x001 },
7559 { 0x00000210, 0x00600411, 0x315 },
7560 { 0x00003fff, 0x002f022f, 0x000 },
7561 { 0x00000000, 0x0ce00000, 0x194 },
7562 { 0x00000015, 0xc0203620, 0x000 },
7563 { 0x00000016, 0xc0203620, 0x000 },
7564 { 0x3f800000, 0x00200411, 0x000 },
7565 { 0x46000000, 0x00600811, 0x1b2 },
7566 { 0x00000000, 0x00800000, 0x000 },
7567 { 0x0000a1fc, 0x00204411, 0x000 },
7568 { 0x00003fff, 0x002f022f, 0x000 },
7569 { 0x00000000, 0x0cc00000, 0x19b },
7570 { 0x00000001, 0x00804811, 0x000 },
7571 { 0x00000021, 0x00804811, 0x000 },
7572 { 0x0000ffff, 0x40280e20, 0x000 },
7573 { 0x00000010, 0xc0211220, 0x000 },
7574 { 0x0000ffff, 0x40281620, 0x000 },
7575 { 0x00000010, 0xc0811a20, 0x000 },
7576 { 0x81000000, 0x00204411, 0x000 },
7577 { 0x00000006, 0x00204811, 0x000 },
7578 { 0x00000008, 0x00221e30, 0x000 },
7579 { 0x00000029, 0x00201a2d, 0x000 },
7580 { 0x0000e000, 0x00204411, 0x000 },
7581 { 0xfffbff09, 0x00204811, 0x000 },
7582 { 0x0000000f, 0x0020222d, 0x000 },
7583 { 0x00001fff, 0x00294a28, 0x000 },
7584 { 0x00000006, 0x0020222d, 0x000 },
7585 { 0x00000000, 0x002920e8, 0x000 },
7586 { 0x00000000, 0x00204808, 0x000 },
7587 { 0x00000000, 0x00204811, 0x000 },
7588 { 0x060a0200, 0x00294a26, 0x000 },
7589 { 0x00000000, 0x00204811, 0x000 },
7590 { 0x00000000, 0x00204811, 0x000 },
7591 { 0x00000100, 0x00201811, 0x000 },
7592 { 0x00000008, 0x00621e28, 0x12f },
7593 { 0x00000008, 0x00822228, 0x000 },
7594 { 0x0002c000, 0x00204411, 0x000 },
7595 { 0x00000015, 0x00600e2d, 0x1bd },
7596 { 0x00000016, 0x00600e2d, 0x1bd },
7597 { 0x0000c008, 0x00204411, 0x000 },
7598 { 0x00000017, 0x00200e2d, 0x000 },
7599 { 0x00000000, 0x14c00000, 0x1b9 },
7600 { 0x00000000, 0x00200411, 0x000 },
7601 { 0x00000000, 0x00204801, 0x000 },
7602 { 0x39000000, 0x00204811, 0x000 },
7603 { 0x00000000, 0x00204811, 0x000 },
7604 { 0x00000000, 0x00804802, 0x000 },
7605 { 0x00000018, 0x00202e2d, 0x000 },
7606 { 0x00000000, 0x003b0d63, 0x000 },
7607 { 0x00000008, 0x00224a23, 0x000 },
7608 { 0x00000010, 0x00224a23, 0x000 },
7609 { 0x00000018, 0x00224a23, 0x000 },
7610 { 0x00000000, 0x00804803, 0x000 },
7611 { 0x00000000, 0x00600000, 0x00b },
7612 { 0x00001000, 0x00600411, 0x315 },
7613 { 0x00000000, 0x00200411, 0x000 },
7614 { 0x00000000, 0x00600811, 0x1b2 },
7615 { 0x00000007, 0x0021062f, 0x000 },
7616 { 0x00000013, 0x00200a2d, 0x000 },
7617 { 0x00000001, 0x00202c11, 0x000 },
7618 { 0x0000ffff, 0x40282220, 0x000 },
7619 { 0x0000000f, 0x00262228, 0x000 },
7620 { 0x00000010, 0x40212620, 0x000 },
7621 { 0x0000000f, 0x00262629, 0x000 },
7622 { 0x00000000, 0x00202802, 0x000 },
7623 { 0x00002256, 0x00204411, 0x000 },
7624 { 0x0000001b, 0x00204811, 0x000 },
7625 { 0x00000000, 0x002f0221, 0x000 },
7626 { 0x00000000, 0x0ce00000, 0x1e0 },
7627 { 0x0000225c, 0x00204411, 0x000 },
7628 { 0x00000081, 0x00204811, 0x000 },
7629 { 0x0000a1fc, 0x00204411, 0x000 },
7630 { 0x00000001, 0x00204811, 0x000 },
7631 { 0x00000080, 0x00201c11, 0x000 },
7632 { 0x00000000, 0x002f0227, 0x000 },
7633 { 0x00000000, 0x0ce00000, 0x1dc },
7634 { 0x00000000, 0x00600000, 0x1e9 },
7635 { 0x00000001, 0x00531e27, 0x1d8 },
7636 { 0x00000001, 0x00202c11, 0x000 },
7637 { 0x0000001f, 0x00280a22, 0x000 },
7638 { 0x0000001f, 0x00282a2a, 0x000 },
7639 { 0x00000001, 0x00530621, 0x1d1 },
7640 { 0x0000225c, 0x00204411, 0x000 },
7641 { 0x00000002, 0x00304a2f, 0x000 },
7642 { 0x0000a1fc, 0x00204411, 0x000 },
7643 { 0x00000001, 0x00204811, 0x000 },
7644 { 0x00000001, 0x00301e2f, 0x000 },
7645 { 0x00000000, 0x002f0227, 0x000 },
7646 { 0x00000000, 0x0ce00000, 0x000 },
7647 { 0x00000000, 0x00600000, 0x1e9 },
7648 { 0x00000001, 0x00531e27, 0x1e5 },
7649 { 0x0000ffff, 0x40280e20, 0x000 },
7650 { 0x0000000f, 0x00260e23, 0x000 },
7651 { 0x00000010, 0xc0211220, 0x000 },
7652 { 0x0000000f, 0x00261224, 0x000 },
7653 { 0x00000000, 0x00201411, 0x000 },
7654 { 0x00000000, 0x00601811, 0x2bb },
7655 { 0x0001a1fd, 0x00204411, 0x000 },
7656 { 0x00000000, 0x002f022b, 0x000 },
7657 { 0x00000000, 0x0ce00000, 0x1f8 },
7658 { 0x00000010, 0x00221628, 0x000 },
7659 { 0xffff0000, 0x00281625, 0x000 },
7660 { 0x0000ffff, 0x00281a29, 0x000 },
7661 { 0x00000000, 0x002948c5, 0x000 },
7662 { 0x00000000, 0x0020480a, 0x000 },
7663 { 0x00000000, 0x00202c11, 0x000 },
7664 { 0x00000010, 0x00221623, 0x000 },
7665 { 0xffff0000, 0x00281625, 0x000 },
7666 { 0x0000ffff, 0x00281a24, 0x000 },
7667 { 0x00000000, 0x002948c5, 0x000 },
7668 { 0x00000000, 0x00731503, 0x205 },
7669 { 0x00000000, 0x00201805, 0x000 },
7670 { 0x00000000, 0x00731524, 0x205 },
7671 { 0x00000000, 0x002d14c5, 0x000 },
7672 { 0x00000000, 0x003008a2, 0x000 },
7673 { 0x00000000, 0x00204802, 0x000 },
7674 { 0x00000000, 0x00202802, 0x000 },
7675 { 0x00000000, 0x00202003, 0x000 },
7676 { 0x00000000, 0x00802404, 0x000 },
7677 { 0x0000000f, 0x00210225, 0x000 },
7678 { 0x00000000, 0x14c00000, 0x689 },
7679 { 0x00000000, 0x002b1405, 0x000 },
7680 { 0x00000001, 0x00901625, 0x000 },
7681 { 0x00000000, 0x00600000, 0x00b },
7682 { 0x00000000, 0x00600411, 0x315 },
7683 { 0x00000000, 0x00200411, 0x000 },
7684 { 0x00000000, 0x00600811, 0x1b2 },
7685 { 0x00002256, 0x00204411, 0x000 },
7686 { 0x0000001a, 0x00294a22, 0x000 },
7687 { 0x00000000, 0xc0200000, 0x000 },
7688 { 0x00003fff, 0x002f022f, 0x000 },
7689 { 0x00000000, 0x0ce00000, 0x000 },
7690 { 0x00000000, 0xc0200400, 0x000 },
7691 { 0x0000225c, 0x00204411, 0x000 },
7692 { 0x00000003, 0x00384a21, 0x000 },
7693 { 0x0000a1fc, 0x00204411, 0x000 },
7694 { 0x00000001, 0x00204811, 0x000 },
7695 { 0x0000ffff, 0x40281220, 0x000 },
7696 { 0x00000010, 0xc0211a20, 0x000 },
7697 { 0x0000ffff, 0x40280e20, 0x000 },
7698 { 0x00000010, 0xc0211620, 0x000 },
7699 { 0x00000000, 0x00741465, 0x2bb },
7700 { 0x0001a1fd, 0x00604411, 0x2e0 },
7701 { 0x00000001, 0x00330621, 0x000 },
7702 { 0x00000000, 0x002f0221, 0x000 },
7703 { 0x00000000, 0x0cc00000, 0x219 },
7704 { 0x00003fff, 0x002f022f, 0x000 },
7705 { 0x00000000, 0x0cc00000, 0x212 },
7706 { 0x00000000, 0xc0400400, 0x001 },
7707 { 0x00000000, 0x00600000, 0x642 },
7708 { 0x00000000, 0x0040040f, 0x213 },
7709 { 0x00000000, 0x00600000, 0x62e },
7710 { 0x00000000, 0x00600000, 0x642 },
7711 { 0x00000210, 0x00600411, 0x315 },
7712 { 0x00000000, 0x00600000, 0x1a0 },
7713 { 0x00000000, 0x00600000, 0x19c },
7714 { 0x00000000, 0x00600000, 0x2bb },
7715 { 0x00000000, 0x00600000, 0x2a3 },
7716 { 0x93800000, 0x00204411, 0x000 },
7717 { 0x00000000, 0x00204808, 0x000 },
7718 { 0x00000000, 0x002f022f, 0x000 },
7719 { 0x00000000, 0x0ae00000, 0x232 },
7720 { 0x00000000, 0x00600000, 0x13a },
7721 { 0x00000000, 0x00400000, 0x236 },
7722 { 0x95000000, 0x00204411, 0x000 },
7723 { 0x00000000, 0x002f022f, 0x000 },
7724 { 0x00000000, 0x0ce00000, 0x236 },
7725 { 0x00000000, 0xc0404800, 0x233 },
7726 { 0x92000000, 0x00204411, 0x000 },
7727 { 0x00000000, 0xc0204800, 0x000 },
7728 { 0x00002256, 0x00204411, 0x000 },
7729 { 0x00000016, 0x00204811, 0x000 },
7730 { 0x0000225c, 0x00204411, 0x000 },
7731 { 0x00000003, 0x00204811, 0x000 },
7732 { 0x0000a1fc, 0x00204411, 0x000 },
7733 { 0x00000001, 0x00204811, 0x000 },
7734 { 0x0001a1fd, 0x00204411, 0x000 },
7735 { 0x00000000, 0x00600411, 0x2fb },
7736 { 0x00000000, 0xc0400400, 0x001 },
7737 { 0x00000000, 0x00600000, 0x62e },
7738 { 0x0000a00c, 0x00204411, 0x000 },
7739 { 0x00000000, 0xc0204800, 0x000 },
7740 { 0x00000000, 0xc0404800, 0x000 },
7741 { 0x00000000, 0x00600000, 0x00b },
7742 { 0x00000018, 0x40210a20, 0x000 },
7743 { 0x00000003, 0x002f0222, 0x000 },
7744 { 0x00000000, 0x0ae00000, 0x24c },
7745 { 0x00000014, 0x0020222d, 0x000 },
7746 { 0x00080101, 0x00292228, 0x000 },
7747 { 0x00000014, 0x00203628, 0x000 },
7748 { 0x0000a30c, 0x00204411, 0x000 },
7749 { 0x00000000, 0xc0204800, 0x000 },
7750 { 0x00000000, 0xc0204800, 0x000 },
7751 { 0x00000000, 0xc0404800, 0x251 },
7752 { 0x00000000, 0x00600000, 0x00b },
7753 { 0x00000010, 0x00600411, 0x315 },
7754 { 0x3f800000, 0x00200411, 0x000 },
7755 { 0x00000000, 0x00600811, 0x1b2 },
7756 { 0x0000225c, 0x00204411, 0x000 },
7757 { 0x00000003, 0x00204811, 0x000 },
7758 { 0x00000000, 0x00600000, 0x27c },
7759 { 0x00000017, 0x00201e2d, 0x000 },
7760 { 0x00000001, 0x00211e27, 0x000 },
7761 { 0x00000000, 0x14e00000, 0x26a },
7762 { 0x00000012, 0x00201e2d, 0x000 },
7763 { 0x0000ffff, 0x00281e27, 0x000 },
7764 { 0x00000000, 0x00341c27, 0x000 },
7765 { 0x00000000, 0x12c00000, 0x25f },
7766 { 0x00000000, 0x00201c11, 0x000 },
7767 { 0x00000000, 0x002f00e5, 0x000 },
7768 { 0x00000000, 0x08c00000, 0x262 },
7769 { 0x00000000, 0x00201407, 0x000 },
7770 { 0x00000012, 0x00201e2d, 0x000 },
7771 { 0x00000010, 0x00211e27, 0x000 },
7772 { 0x00000000, 0x00341c47, 0x000 },
7773 { 0x00000000, 0x12c00000, 0x267 },
7774 { 0x00000000, 0x00201c11, 0x000 },
7775 { 0x00000000, 0x002f00e6, 0x000 },
7776 { 0x00000000, 0x08c00000, 0x26a },
7777 { 0x00000000, 0x00201807, 0x000 },
7778 { 0x00000000, 0x00600000, 0x2c1 },
7779 { 0x00002256, 0x00204411, 0x000 },
7780 { 0x00000000, 0x00342023, 0x000 },
7781 { 0x00000000, 0x12c00000, 0x272 },
7782 { 0x00000000, 0x00342044, 0x000 },
7783 { 0x00000000, 0x12c00000, 0x271 },
7784 { 0x00000016, 0x00404811, 0x276 },
7785 { 0x00000018, 0x00404811, 0x276 },
7786 { 0x00000000, 0x00342044, 0x000 },
7787 { 0x00000000, 0x12c00000, 0x275 },
7788 { 0x00000017, 0x00404811, 0x276 },
7789 { 0x00000019, 0x00204811, 0x000 },
7790 { 0x0000a1fc, 0x00204411, 0x000 },
7791 { 0x00000001, 0x00204811, 0x000 },
7792 { 0x0001a1fd, 0x00604411, 0x2e9 },
7793 { 0x00003fff, 0x002f022f, 0x000 },
7794 { 0x00000000, 0x0cc00000, 0x256 },
7795 { 0x00000000, 0xc0400400, 0x001 },
7796 { 0x00000010, 0x40210620, 0x000 },
7797 { 0x0000ffff, 0xc0280a20, 0x000 },
7798 { 0x00000010, 0x40210e20, 0x000 },
7799 { 0x0000ffff, 0xc0281220, 0x000 },
7800 { 0x00000010, 0x40211620, 0x000 },
7801 { 0x0000ffff, 0xc0881a20, 0x000 },
7802 { 0x81000000, 0x00204411, 0x000 },
7803 { 0x00000001, 0x00204811, 0x000 },
7804 { 0x00042004, 0x00604411, 0x68a },
7805 { 0x00000000, 0x00600000, 0x62e },
7806 { 0x00000000, 0xc0600000, 0x2a3 },
7807 { 0x00000005, 0x00200a2d, 0x000 },
7808 { 0x00000008, 0x00220a22, 0x000 },
7809 { 0x0000002b, 0x00201a2d, 0x000 },
7810 { 0x0000001c, 0x00201e2d, 0x000 },
7811 { 0x00007000, 0x00281e27, 0x000 },
7812 { 0x00000000, 0x00311ce6, 0x000 },
7813 { 0x0000002a, 0x00201a2d, 0x000 },
7814 { 0x0000000c, 0x00221a26, 0x000 },
7815 { 0x00000000, 0x002f00e6, 0x000 },
7816 { 0x00000000, 0x06e00000, 0x292 },
7817 { 0x00000000, 0x00201c11, 0x000 },
7818 { 0x00000000, 0x00200c11, 0x000 },
7819 { 0x0000002b, 0x00203623, 0x000 },
7820 { 0x00000010, 0x00201811, 0x000 },
7821 { 0x00000000, 0x00691ce2, 0x12f },
7822 { 0x93800000, 0x00204411, 0x000 },
7823 { 0x00000000, 0x00204807, 0x000 },
7824 { 0x95000000, 0x00204411, 0x000 },
7825 { 0x00000000, 0x002f022f, 0x000 },
7826 { 0x00000000, 0x0ce00000, 0x29d },
7827 { 0x00000001, 0x00333e2f, 0x000 },
7828 { 0x00000000, 0xd9004800, 0x000 },
7829 { 0x92000000, 0x00204411, 0x000 },
7830 { 0x00000000, 0xc0204800, 0x000 },
7831 { 0x0000001c, 0x00403627, 0x000 },
7832 { 0x0000000c, 0xc0220a20, 0x000 },
7833 { 0x00000029, 0x00203622, 0x000 },
7834 { 0x00000028, 0xc0403620, 0x000 },
7835 { 0x0000a2a4, 0x00204411, 0x000 },
7836 { 0x00000009, 0x00204811, 0x000 },
7837 { 0xa1000000, 0x00204411, 0x000 },
7838 { 0x00000001, 0x00804811, 0x000 },
7839 { 0x00000021, 0x00201e2d, 0x000 },
7840 { 0x00000000, 0x002c1ce3, 0x000 },
7841 { 0x00000021, 0x00203627, 0x000 },
7842 { 0x00000022, 0x00201e2d, 0x000 },
7843 { 0x00000000, 0x002c1ce4, 0x000 },
7844 { 0x00000022, 0x00203627, 0x000 },
7845 { 0x00000023, 0x00201e2d, 0x000 },
7846 { 0x00000000, 0x003120a3, 0x000 },
7847 { 0x00000000, 0x002d1d07, 0x000 },
7848 { 0x00000023, 0x00203627, 0x000 },
7849 { 0x00000024, 0x00201e2d, 0x000 },
7850 { 0x00000000, 0x003120c4, 0x000 },
7851 { 0x00000000, 0x002d1d07, 0x000 },
7852 { 0x00000024, 0x00803627, 0x000 },
7853 { 0x00000021, 0x00203623, 0x000 },
7854 { 0x00000022, 0x00203624, 0x000 },
7855 { 0x00000000, 0x00311ca3, 0x000 },
7856 { 0x00000023, 0x00203627, 0x000 },
7857 { 0x00000000, 0x00311cc4, 0x000 },
7858 { 0x00000024, 0x00803627, 0x000 },
7859 { 0x0000001a, 0x00203627, 0x000 },
7860 { 0x0000001b, 0x00203628, 0x000 },
7861 { 0x00000017, 0x00201e2d, 0x000 },
7862 { 0x00000002, 0x00210227, 0x000 },
7863 { 0x00000000, 0x14c00000, 0x2dc },
7864 { 0x00000000, 0x00400000, 0x2d9 },
7865 { 0x0000001a, 0x00203627, 0x000 },
7866 { 0x0000001b, 0x00203628, 0x000 },
7867 { 0x00000017, 0x00201e2d, 0x000 },
7868 { 0x00000002, 0x00210227, 0x000 },
7869 { 0x00000000, 0x14e00000, 0x2d9 },
7870 { 0x00000003, 0x00210227, 0x000 },
7871 { 0x00000000, 0x14e00000, 0x2dc },
7872 { 0x00000023, 0x00201e2d, 0x000 },
7873 { 0x00000000, 0x002e00e1, 0x000 },
7874 { 0x00000000, 0x02c00000, 0x2dc },
7875 { 0x00000021, 0x00201e2d, 0x000 },
7876 { 0x00000000, 0x003120a1, 0x000 },
7877 { 0x00000000, 0x002e00e8, 0x000 },
7878 { 0x00000000, 0x06c00000, 0x2dc },
7879 { 0x00000024, 0x00201e2d, 0x000 },
7880 { 0x00000000, 0x002e00e2, 0x000 },
7881 { 0x00000000, 0x02c00000, 0x2dc },
7882 { 0x00000022, 0x00201e2d, 0x000 },
7883 { 0x00000000, 0x003120c2, 0x000 },
7884 { 0x00000000, 0x002e00e8, 0x000 },
7885 { 0x00000000, 0x06c00000, 0x2dc },
7886 { 0x00000000, 0x00600000, 0x665 },
7887 { 0x00000000, 0x00600000, 0x2b5 },
7888 { 0x00000000, 0x00400000, 0x2de },
7889 { 0x00000000, 0x00600000, 0x2b5 },
7890 { 0x00000000, 0x00600000, 0x65c },
7891 { 0x00000000, 0x00400000, 0x2de },
7892 { 0x00000000, 0x00600000, 0x2a7 },
7893 { 0x00000000, 0x00400000, 0x2de },
7894 { 0x0000001a, 0x00201e2d, 0x000 },
7895 { 0x0000001b, 0x0080222d, 0x000 },
7896 { 0x00000010, 0x00221e23, 0x000 },
7897 { 0x00000000, 0x00294887, 0x000 },
7898 { 0x00000000, 0x00311ca3, 0x000 },
7899 { 0x00000010, 0x00221e27, 0x000 },
7900 { 0x00000000, 0x00294887, 0x000 },
7901 { 0x00000010, 0x00221e23, 0x000 },
7902 { 0x00000000, 0x003120c4, 0x000 },
7903 { 0x0000ffff, 0x00282228, 0x000 },
7904 { 0x00000000, 0x00894907, 0x000 },
7905 { 0x00000010, 0x00221e23, 0x000 },
7906 { 0x00000000, 0x00294887, 0x000 },
7907 { 0x00000010, 0x00221e21, 0x000 },
7908 { 0x00000000, 0x00294847, 0x000 },
7909 { 0x00000000, 0x00311ca3, 0x000 },
7910 { 0x00000010, 0x00221e27, 0x000 },
7911 { 0x00000000, 0x00294887, 0x000 },
7912 { 0x00000000, 0x00311ca1, 0x000 },
7913 { 0x00000010, 0x00221e27, 0x000 },
7914 { 0x00000000, 0x00294847, 0x000 },
7915 { 0x00000010, 0x00221e23, 0x000 },
7916 { 0x00000000, 0x003120c4, 0x000 },
7917 { 0x0000ffff, 0x00282228, 0x000 },
7918 { 0x00000000, 0x00294907, 0x000 },
7919 { 0x00000010, 0x00221e21, 0x000 },
7920 { 0x00000000, 0x003120c2, 0x000 },
7921 { 0x0000ffff, 0x00282228, 0x000 },
7922 { 0x00000000, 0x00894907, 0x000 },
7923 { 0x00000010, 0x00221e23, 0x000 },
7924 { 0x00000000, 0x00294887, 0x000 },
7925 { 0x00000001, 0x00220a21, 0x000 },
7926 { 0x00000000, 0x003308a2, 0x000 },
7927 { 0x00000010, 0x00221e22, 0x000 },
7928 { 0x00000010, 0x00212222, 0x000 },
7929 { 0x00000000, 0x00294907, 0x000 },
7930 { 0x00000000, 0x00311ca3, 0x000 },
7931 { 0x00000010, 0x00221e27, 0x000 },
7932 { 0x00000000, 0x00294887, 0x000 },
7933 { 0x00000001, 0x00220a21, 0x000 },
7934 { 0x00000000, 0x003008a2, 0x000 },
7935 { 0x00000010, 0x00221e22, 0x000 },
7936 { 0x00000010, 0x00212222, 0x000 },
7937 { 0x00000000, 0x00294907, 0x000 },
7938 { 0x00000010, 0x00221e23, 0x000 },
7939 { 0x00000000, 0x003120c4, 0x000 },
7940 { 0x0000ffff, 0x00282228, 0x000 },
7941 { 0x00000000, 0x00294907, 0x000 },
7942 { 0x00000000, 0x003808c5, 0x000 },
7943 { 0x00000000, 0x00300841, 0x000 },
7944 { 0x00000001, 0x00220a22, 0x000 },
7945 { 0x00000000, 0x003308a2, 0x000 },
7946 { 0x00000010, 0x00221e22, 0x000 },
7947 { 0x00000010, 0x00212222, 0x000 },
7948 { 0x00000000, 0x00894907, 0x000 },
7949 { 0x00000017, 0x0020222d, 0x000 },
7950 { 0x00000000, 0x14c00000, 0x318 },
7951 { 0xffffffef, 0x00280621, 0x000 },
7952 { 0x00000014, 0x0020222d, 0x000 },
7953 { 0x0000f8e0, 0x00204411, 0x000 },
7954 { 0x00000000, 0x00294901, 0x000 },
7955 { 0x00000000, 0x00894901, 0x000 },
7956 { 0x00000000, 0x00204811, 0x000 },
7957 { 0x00000000, 0x00204811, 0x000 },
7958 { 0x060a0200, 0x00804811, 0x000 },
7959 { 0x00000000, 0xc0200000, 0x000 },
7960 { 0x97000000, 0xc0204411, 0x000 },
7961 { 0x00000000, 0xc0204811, 0x000 },
7962 { 0x8a000000, 0x00204411, 0x000 },
7963 { 0x00000000, 0x00204811, 0x000 },
7964 { 0x0000225c, 0x00204411, 0x000 },
7965 { 0x00000000, 0xc0204800, 0x000 },
7966 { 0x0000a1fc, 0x00204411, 0x000 },
7967 { 0x00000000, 0xc0204800, 0x000 },
7968 { 0x00000000, 0xc0200400, 0x000 },
7969 { 0x00000000, 0x00a0000a, 0x000 },
7970 { 0x97000000, 0x00204411, 0x000 },
7971 { 0x00000000, 0x00204811, 0x000 },
7972 { 0x8a000000, 0x00204411, 0x000 },
7973 { 0x00000000, 0x00204811, 0x000 },
7974 { 0x0000225c, 0x00204411, 0x000 },
7975 { 0x00000000, 0xc0204800, 0x000 },
7976 { 0x0000a1fc, 0x00204411, 0x000 },
7977 { 0x00000000, 0xc0204800, 0x000 },
7978 { 0x00000000, 0xc0200400, 0x000 },
7979 { 0x00000000, 0x00a0000a, 0x000 },
7980 { 0x97000000, 0x00204411, 0x000 },
7981 { 0x00000000, 0x00204811, 0x000 },
7982 { 0x8a000000, 0x00204411, 0x000 },
7983 { 0x00000000, 0x00204811, 0x000 },
7984 { 0x0000225c, 0x00204411, 0x000 },
7985 { 0x00000000, 0xc0204800, 0x000 },
7986 { 0x0000a1fc, 0x00204411, 0x000 },
7987 { 0x00000000, 0xc0204800, 0x000 },
7988 { 0x0001a1fd, 0x00204411, 0x000 },
7989 { 0x00000000, 0xd9004800, 0x000 },
7990 { 0x00000000, 0xc0200400, 0x000 },
7991 { 0x00000000, 0x00a0000a, 0x000 },
7992 { 0x00002257, 0x00204411, 0x000 },
7993 { 0x00000003, 0xc0484a20, 0x000 },
7994 { 0x0000225d, 0x00204411, 0x000 },
7995 { 0x00000000, 0xc0404800, 0x000 },
7996 { 0x00000000, 0x00600000, 0x642 },
7997 { 0x00000000, 0xc0200800, 0x000 },
7998 { 0x0000225c, 0x00204411, 0x000 },
7999 { 0x00000003, 0x00384a22, 0x000 },
8000 { 0x0000a1fc, 0x00204411, 0x000 },
8001 { 0x00000000, 0xc0204800, 0x000 },
8002 { 0x0001a1fd, 0x00204411, 0x000 },
8003 { 0x00000000, 0x002f0222, 0x000 },
8004 { 0x00000000, 0x0ce00000, 0x000 },
8005 { 0x00000000, 0x40204800, 0x000 },
8006 { 0x00000001, 0x40304a20, 0x000 },
8007 { 0x00000002, 0xc0304a20, 0x000 },
8008 { 0x00000001, 0x00530a22, 0x34b },
8009 { 0x0000003f, 0xc0280a20, 0x000 },
8010 { 0x81000000, 0x00204411, 0x000 },
8011 { 0x00000001, 0x00204811, 0x000 },
8012 { 0x000021f8, 0x00204411, 0x000 },
8013 { 0x00000018, 0x00204811, 0x000 },
8014 { 0x000421f9, 0x00604411, 0x68a },
8015 { 0x00000011, 0x00210230, 0x000 },
8016 { 0x00000000, 0x14e00000, 0x354 },
8017 { 0x00000014, 0x002f0222, 0x000 },
8018 { 0x00000000, 0x0cc00000, 0x364 },
8019 { 0x00002010, 0x00204411, 0x000 },
8020 { 0x00008000, 0x00204811, 0x000 },
8021 { 0x0001a2a4, 0x00204411, 0x000 },
8022 { 0x00000000, 0x00604802, 0x36e },
8023 { 0x00002100, 0x00204411, 0x000 },
8024 { 0x00000000, 0xc0204800, 0x000 },
8025 { 0x00000000, 0xc0204800, 0x000 },
8026 { 0x00000000, 0xc0204800, 0x000 },
8027 { 0x00000000, 0xc0404800, 0x000 },
8028 { 0x00000004, 0x002f0222, 0x000 },
8029 { 0x00000000, 0x0cc00000, 0x36a },
8030 { 0x00002010, 0x00204411, 0x000 },
8031 { 0x00008000, 0x00204811, 0x000 },
8032 { 0x0001a2a4, 0x00204411, 0x000 },
8033 { 0x00000000, 0x00404802, 0x35f },
8034 { 0x00000028, 0x002f0222, 0x000 },
8035 { 0x00000000, 0x0cc00000, 0x5bd },
8036 { 0x0001a2a4, 0x00204411, 0x000 },
8037 { 0x00000000, 0x00404802, 0x35f },
8038 { 0x0000002c, 0x00203626, 0x000 },
8039 { 0x00000049, 0x00201811, 0x000 },
8040 { 0x0000003f, 0x00204811, 0x000 },
8041 { 0x00000001, 0x00331a26, 0x000 },
8042 { 0x00000000, 0x002f0226, 0x000 },
8043 { 0x00000000, 0x0cc00000, 0x370 },
8044 { 0x0000002c, 0x00801a2d, 0x000 },
8045 { 0x0000003f, 0xc0280a20, 0x000 },
8046 { 0x00000015, 0x002f0222, 0x000 },
8047 { 0x00000000, 0x0ce00000, 0x386 },
8048 { 0x00000006, 0x002f0222, 0x000 },
8049 { 0x00000000, 0x0ce00000, 0x3b1 },
8050 { 0x00000016, 0x002f0222, 0x000 },
8051 { 0x00000000, 0x0ce00000, 0x3b5 },
8052 { 0x00000020, 0x002f0222, 0x000 },
8053 { 0x00000000, 0x0ce00000, 0x39c },
8054 { 0x0000000f, 0x002f0222, 0x000 },
8055 { 0x00000000, 0x0ce00000, 0x3a8 },
8056 { 0x00000010, 0x002f0222, 0x000 },
8057 { 0x00000000, 0x0ce00000, 0x3a8 },
8058 { 0x0000001e, 0x002f0222, 0x000 },
8059 { 0x00000000, 0x0ce00000, 0x390 },
8060 { 0x0000a2a4, 0x00204411, 0x000 },
8061 { 0x00000000, 0x00404802, 0x000 },
8062 { 0x08000000, 0x00290a22, 0x000 },
8063 { 0x00000003, 0x40210e20, 0x000 },
8064 { 0x0000000c, 0xc0211220, 0x000 },
8065 { 0x00080000, 0x00281224, 0x000 },
8066 { 0x00000014, 0xc0221620, 0x000 },
8067 { 0x00000000, 0x002914a4, 0x000 },
8068 { 0x0000a2a4, 0x00204411, 0x000 },
8069 { 0x00000000, 0x002948a2, 0x000 },
8070 { 0x0000a1fe, 0x00204411, 0x000 },
8071 { 0x00000000, 0x00404803, 0x000 },
8072 { 0x81000000, 0x00204411, 0x000 },
8073 { 0x00000001, 0x00204811, 0x000 },
8074 { 0x000021f8, 0x00204411, 0x000 },
8075 { 0x00000016, 0x00204811, 0x000 },
8076 { 0x000421f9, 0x00604411, 0x68a },
8077 { 0x00000015, 0x00210230, 0x000 },
8078 { 0x00000000, 0x14e00000, 0x392 },
8079 { 0x0000210e, 0x00204411, 0x000 },
8080 { 0x00000000, 0xc0204800, 0x000 },
8081 { 0x00000000, 0xc0204800, 0x000 },
8082 { 0x0000a2a4, 0x00204411, 0x000 },
8083 { 0x00000000, 0x00404802, 0x000 },
8084 { 0x81000000, 0x00204411, 0x000 },
8085 { 0x00000001, 0x00204811, 0x000 },
8086 { 0x000021f8, 0x00204411, 0x000 },
8087 { 0x00000017, 0x00204811, 0x000 },
8088 { 0x000421f9, 0x00604411, 0x68a },
8089 { 0x00000003, 0x00210230, 0x000 },
8090 { 0x00000000, 0x14e00000, 0x39e },
8091 { 0x00002108, 0x00204411, 0x000 },
8092 { 0x00000000, 0xc0204800, 0x000 },
8093 { 0x00000000, 0xc0204800, 0x000 },
8094 { 0x0000a2a4, 0x00204411, 0x000 },
8095 { 0x00000000, 0x00404802, 0x000 },
8096 { 0x0000a2a4, 0x00204411, 0x000 },
8097 { 0x00000000, 0x00204802, 0x000 },
8098 { 0x80000000, 0x00204411, 0x000 },
8099 { 0x00000000, 0x00204811, 0x000 },
8100 { 0x81000000, 0x00204411, 0x000 },
8101 { 0x00000010, 0x00204811, 0x000 },
8102 { 0x00000000, 0x00200010, 0x000 },
8103 { 0x00000000, 0x14c00000, 0x3ae },
8104 { 0x00000000, 0x00400000, 0x000 },
8105 { 0x00002010, 0x00204411, 0x000 },
8106 { 0x00008000, 0x00204811, 0x000 },
8107 { 0x0001a2a4, 0x00204411, 0x000 },
8108 { 0x00000006, 0x00404811, 0x000 },
8109 { 0x00002010, 0x00204411, 0x000 },
8110 { 0x00008000, 0x00204811, 0x000 },
8111 { 0x0001a2a4, 0x00204411, 0x000 },
8112 { 0x00000016, 0x00604811, 0x36e },
8113 { 0x00000000, 0x00400000, 0x000 },
8114 { 0x00000000, 0xc0200800, 0x000 },
8115 { 0x00000000, 0xc0200c00, 0x000 },
8116 { 0x0000001d, 0x00210223, 0x000 },
8117 { 0x00000000, 0x14e00000, 0x3ce },
8118 { 0x81000000, 0x00204411, 0x000 },
8119 { 0x00000001, 0x00204811, 0x000 },
8120 { 0x000021f8, 0x00204411, 0x000 },
8121 { 0x00000018, 0x00204811, 0x000 },
8122 { 0x000421f9, 0x00604411, 0x68a },
8123 { 0x00000011, 0x00210230, 0x000 },
8124 { 0x00000000, 0x14e00000, 0x3c0 },
8125 { 0x00002100, 0x00204411, 0x000 },
8126 { 0x00000000, 0x00204802, 0x000 },
8127 { 0x00000000, 0x00204803, 0x000 },
8128 { 0xbabecafe, 0x00204811, 0x000 },
8129 { 0xcafebabe, 0x00204811, 0x000 },
8130 { 0x00002010, 0x00204411, 0x000 },
8131 { 0x00008000, 0x00204811, 0x000 },
8132 { 0x0000a2a4, 0x00204411, 0x000 },
8133 { 0x00000004, 0x00404811, 0x000 },
8134 { 0x00002170, 0x00204411, 0x000 },
8135 { 0x00000000, 0x00204802, 0x000 },
8136 { 0x00000000, 0x00204803, 0x000 },
8137 { 0x81000000, 0x00204411, 0x000 },
8138 { 0x0000000a, 0x00204811, 0x000 },
8139 { 0x00000000, 0x00200010, 0x000 },
8140 { 0x00000000, 0x14c00000, 0x3d3 },
8141 { 0x8c000000, 0x00204411, 0x000 },
8142 { 0xcafebabe, 0x00404811, 0x000 },
8143 { 0x81000000, 0x00204411, 0x000 },
8144 { 0x00000001, 0x00204811, 0x000 },
8145 { 0x00003fff, 0x40280a20, 0x000 },
8146 { 0x80000000, 0x40280e20, 0x000 },
8147 { 0x40000000, 0xc0281220, 0x000 },
8148 { 0x00040000, 0x00694622, 0x68a },
8149 { 0x00000000, 0x00201410, 0x000 },
8150 { 0x00000000, 0x002f0223, 0x000 },
8151 { 0x00000000, 0x0cc00000, 0x3e1 },
8152 { 0x00000000, 0xc0401800, 0x3e4 },
8153 { 0x00003fff, 0xc0281a20, 0x000 },
8154 { 0x00040000, 0x00694626, 0x68a },
8155 { 0x00000000, 0x00201810, 0x000 },
8156 { 0x00000000, 0x002f0224, 0x000 },
8157 { 0x00000000, 0x0cc00000, 0x3e7 },
8158 { 0x00000000, 0xc0401c00, 0x3ea },
8159 { 0x00003fff, 0xc0281e20, 0x000 },
8160 { 0x00040000, 0x00694627, 0x68a },
8161 { 0x00000000, 0x00201c10, 0x000 },
8162 { 0x00000000, 0x00204402, 0x000 },
8163 { 0x00000000, 0x002820c5, 0x000 },
8164 { 0x00000000, 0x004948e8, 0x000 },
8165 { 0xa5800000, 0x00200811, 0x000 },
8166 { 0x00002000, 0x00200c11, 0x000 },
8167 { 0x83000000, 0x00604411, 0x412 },
8168 { 0x00000000, 0x00204402, 0x000 },
8169 { 0x00000000, 0xc0204800, 0x000 },
8170 { 0x00000000, 0x40204800, 0x000 },
8171 { 0x0000001f, 0xc0210220, 0x000 },
8172 { 0x00000000, 0x14c00000, 0x3f7 },
8173 { 0x00002010, 0x00204411, 0x000 },
8174 { 0x00008000, 0x00204811, 0x000 },
8175 { 0x0000ffff, 0xc0481220, 0x3ff },
8176 { 0xa7800000, 0x00200811, 0x000 },
8177 { 0x0000a000, 0x00200c11, 0x000 },
8178 { 0x83000000, 0x00604411, 0x412 },
8179 { 0x00000000, 0x00204402, 0x000 },
8180 { 0x00000000, 0xc0204800, 0x000 },
8181 { 0x00000000, 0xc0204800, 0x000 },
8182 { 0x0000ffff, 0xc0281220, 0x000 },
8183 { 0x83000000, 0x00204411, 0x000 },
8184 { 0x00000000, 0x00304883, 0x000 },
8185 { 0x84000000, 0x00204411, 0x000 },
8186 { 0x00000000, 0xc0204800, 0x000 },
8187 { 0x00000000, 0x1d000000, 0x000 },
8188 { 0x83000000, 0x00604411, 0x412 },
8189 { 0x00000000, 0xc0400400, 0x001 },
8190 { 0xa9800000, 0x00200811, 0x000 },
8191 { 0x0000c000, 0x00400c11, 0x3fa },
8192 { 0xab800000, 0x00200811, 0x000 },
8193 { 0x0000f8e0, 0x00400c11, 0x3fa },
8194 { 0xad800000, 0x00200811, 0x000 },
8195 { 0x0000f880, 0x00400c11, 0x3fa },
8196 { 0xb3800000, 0x00200811, 0x000 },
8197 { 0x0000f3fc, 0x00400c11, 0x3fa },
8198 { 0xaf800000, 0x00200811, 0x000 },
8199 { 0x0000e000, 0x00400c11, 0x3fa },
8200 { 0xb1800000, 0x00200811, 0x000 },
8201 { 0x0000f000, 0x00400c11, 0x3fa },
8202 { 0x83000000, 0x00204411, 0x000 },
8203 { 0x00002148, 0x00204811, 0x000 },
8204 { 0x84000000, 0x00204411, 0x000 },
8205 { 0x00000000, 0xc0204800, 0x000 },
8206 { 0x00000000, 0x1d000000, 0x000 },
8207 { 0x00000000, 0x00800000, 0x000 },
8208 { 0x01182000, 0xc0304620, 0x000 },
8209 { 0x00000000, 0xd9004800, 0x000 },
8210 { 0x00000000, 0xc0200400, 0x000 },
8211 { 0x00000000, 0x00a0000a, 0x000 },
8212 { 0x0218a000, 0xc0304620, 0x000 },
8213 { 0x00000000, 0xd9004800, 0x000 },
8214 { 0x00000000, 0xc0200400, 0x000 },
8215 { 0x00000000, 0x00a0000a, 0x000 },
8216 { 0x0318c000, 0xc0304620, 0x000 },
8217 { 0x00000000, 0xd9004800, 0x000 },
8218 { 0x00000000, 0xc0200400, 0x000 },
8219 { 0x00000000, 0x00a0000a, 0x000 },
8220 { 0x0418f8e0, 0xc0304620, 0x000 },
8221 { 0x00000000, 0xd9004800, 0x000 },
8222 { 0x00000000, 0xc0200400, 0x000 },
8223 { 0x00000000, 0x00a0000a, 0x000 },
8224 { 0x0518f880, 0xc0304620, 0x000 },
8225 { 0x00000000, 0xd9004800, 0x000 },
8226 { 0x00000000, 0xc0200400, 0x000 },
8227 { 0x00000000, 0x00a0000a, 0x000 },
8228 { 0x0618e000, 0xc0304620, 0x000 },
8229 { 0x00000000, 0xd9004800, 0x000 },
8230 { 0x00000000, 0xc0200400, 0x000 },
8231 { 0x00000000, 0x00a0000a, 0x000 },
8232 { 0x0718f000, 0xc0304620, 0x000 },
8233 { 0x00000000, 0xd9004800, 0x000 },
8234 { 0x00000000, 0xc0200400, 0x000 },
8235 { 0x00000000, 0x00a0000a, 0x000 },
8236 { 0x0818f3fc, 0xc0304620, 0x000 },
8237 { 0x00000000, 0xd9004800, 0x000 },
8238 { 0x00000000, 0xc0200400, 0x000 },
8239 { 0x00000000, 0x00a0000a, 0x000 },
8240 { 0x00000030, 0x00200a2d, 0x000 },
8241 { 0x00000000, 0xc0290c40, 0x000 },
8242 { 0x00000030, 0x00203623, 0x000 },
8243 { 0x00000000, 0xc0200400, 0x000 },
8244 { 0x00000000, 0x00a0000a, 0x000 },
8245 { 0x86000000, 0x00204411, 0x000 },
8246 { 0x00000000, 0x00404801, 0x000 },
8247 { 0x85000000, 0xc0204411, 0x000 },
8248 { 0x00000000, 0x00404801, 0x000 },
8249 { 0x0000217c, 0x00204411, 0x000 },
8250 { 0x00000000, 0xc0204800, 0x000 },
8251 { 0x00000000, 0xc0204800, 0x000 },
8252 { 0x00000000, 0xc0204800, 0x000 },
8253 { 0x81000000, 0x00204411, 0x000 },
8254 { 0x00000001, 0x00204811, 0x000 },
8255 { 0x00000000, 0xc0200800, 0x000 },
8256 { 0x00000000, 0x17000000, 0x000 },
8257 { 0x0004217f, 0x00604411, 0x68a },
8258 { 0x0000001f, 0x00210230, 0x000 },
8259 { 0x00000000, 0x14c00000, 0x000 },
8260 { 0x00000000, 0x00404c02, 0x448 },
8261 { 0x00000000, 0xc0200c00, 0x000 },
8262 { 0x00000000, 0xc0201000, 0x000 },
8263 { 0x00000000, 0xc0201400, 0x000 },
8264 { 0x00000000, 0xc0201800, 0x000 },
8265 { 0x00000000, 0xc0201c00, 0x000 },
8266 { 0x00007f00, 0x00280a21, 0x000 },
8267 { 0x00004500, 0x002f0222, 0x000 },
8268 { 0x00000000, 0x0ce00000, 0x456 },
8269 { 0x00000000, 0xc0202000, 0x000 },
8270 { 0x00000000, 0x17000000, 0x000 },
8271 { 0x00000010, 0x00280a23, 0x000 },
8272 { 0x00000010, 0x002f0222, 0x000 },
8273 { 0x00000000, 0x0ce00000, 0x45e },
8274 { 0x81000000, 0x00204411, 0x000 },
8275 { 0x00000001, 0x00204811, 0x000 },
8276 { 0x00040000, 0x00694624, 0x68a },
8277 { 0x00000000, 0x00400000, 0x463 },
8278 { 0x81000000, 0x00204411, 0x000 },
8279 { 0x00000000, 0x00204811, 0x000 },
8280 { 0x0000216d, 0x00204411, 0x000 },
8281 { 0x00000000, 0x00204804, 0x000 },
8282 { 0x00000000, 0x00604805, 0x68f },
8283 { 0x00000000, 0x002824f0, 0x000 },
8284 { 0x00000007, 0x00280a23, 0x000 },
8285 { 0x00000001, 0x002f0222, 0x000 },
8286 { 0x00000000, 0x0ae00000, 0x46a },
8287 { 0x00000000, 0x002f00c9, 0x000 },
8288 { 0x00000000, 0x04e00000, 0x483 },
8289 { 0x00000000, 0x00400000, 0x490 },
8290 { 0x00000002, 0x002f0222, 0x000 },
8291 { 0x00000000, 0x0ae00000, 0x46f },
8292 { 0x00000000, 0x002f00c9, 0x000 },
8293 { 0x00000000, 0x02e00000, 0x483 },
8294 { 0x00000000, 0x00400000, 0x490 },
8295 { 0x00000003, 0x002f0222, 0x000 },
8296 { 0x00000000, 0x0ae00000, 0x474 },
8297 { 0x00000000, 0x002f00c9, 0x000 },
8298 { 0x00000000, 0x0ce00000, 0x483 },
8299 { 0x00000000, 0x00400000, 0x490 },
8300 { 0x00000004, 0x002f0222, 0x000 },
8301 { 0x00000000, 0x0ae00000, 0x479 },
8302 { 0x00000000, 0x002f00c9, 0x000 },
8303 { 0x00000000, 0x0ae00000, 0x483 },
8304 { 0x00000000, 0x00400000, 0x490 },
8305 { 0x00000005, 0x002f0222, 0x000 },
8306 { 0x00000000, 0x0ae00000, 0x47e },
8307 { 0x00000000, 0x002f00c9, 0x000 },
8308 { 0x00000000, 0x06e00000, 0x483 },
8309 { 0x00000000, 0x00400000, 0x490 },
8310 { 0x00000006, 0x002f0222, 0x000 },
8311 { 0x00000000, 0x0ae00000, 0x483 },
8312 { 0x00000000, 0x002f00c9, 0x000 },
8313 { 0x00000000, 0x08e00000, 0x483 },
8314 { 0x00000000, 0x00400000, 0x490 },
8315 { 0x00007f00, 0x00280a21, 0x000 },
8316 { 0x00004500, 0x002f0222, 0x000 },
8317 { 0x00000000, 0x0ae00000, 0x000 },
8318 { 0x00000008, 0x00210a23, 0x000 },
8319 { 0x00000000, 0x14c00000, 0x48d },
8320 { 0x00002169, 0x00204411, 0x000 },
8321 { 0x00000000, 0xc0204800, 0x000 },
8322 { 0x00000000, 0xc0204800, 0x000 },
8323 { 0x00000000, 0xc0204800, 0x000 },
8324 { 0xcafebabe, 0x00404811, 0x000 },
8325 { 0x00000000, 0xc0204400, 0x000 },
8326 { 0x00000000, 0xc0200000, 0x000 },
8327 { 0x00000000, 0xc0404800, 0x000 },
8328 { 0x00007f00, 0x00280a21, 0x000 },
8329 { 0x00004500, 0x002f0222, 0x000 },
8330 { 0x00000000, 0x0ae00000, 0x496 },
8331 { 0x00000000, 0xc0200000, 0x000 },
8332 { 0x00000000, 0xc0200000, 0x000 },
8333 { 0x00000000, 0xc0400000, 0x000 },
8334 { 0x00000000, 0x00404c08, 0x456 },
8335 { 0x00000000, 0xc0200800, 0x000 },
8336 { 0x00000010, 0x40210e20, 0x000 },
8337 { 0x00000011, 0x40211220, 0x000 },
8338 { 0x00000012, 0x40211620, 0x000 },
8339 { 0x00002169, 0x00204411, 0x000 },
8340 { 0x00000000, 0x00204802, 0x000 },
8341 { 0x00000000, 0x00210225, 0x000 },
8342 { 0x00000000, 0x14e00000, 0x4a0 },
8343 { 0x00040000, 0xc0494a20, 0x4a1 },
8344 { 0xfffbffff, 0xc0284a20, 0x000 },
8345 { 0x00000000, 0x00210223, 0x000 },
8346 { 0x00000000, 0x14e00000, 0x4ad },
8347 { 0x00000000, 0xc0204800, 0x000 },
8348 { 0x00000000, 0xc0204800, 0x000 },
8349 { 0x00000000, 0x00210224, 0x000 },
8350 { 0x00000000, 0x14c00000, 0x000 },
8351 { 0x81000000, 0x00204411, 0x000 },
8352 { 0x0000000c, 0x00204811, 0x000 },
8353 { 0x00000000, 0x00200010, 0x000 },
8354 { 0x00000000, 0x14c00000, 0x4a9 },
8355 { 0xa0000000, 0x00204411, 0x000 },
8356 { 0xcafebabe, 0x00404811, 0x000 },
8357 { 0x81000000, 0x00204411, 0x000 },
8358 { 0x00000004, 0x00204811, 0x000 },
8359 { 0x0000216b, 0x00204411, 0x000 },
8360 { 0x00000000, 0xc0204810, 0x000 },
8361 { 0x81000000, 0x00204411, 0x000 },
8362 { 0x00000005, 0x00204811, 0x000 },
8363 { 0x0000216c, 0x00204411, 0x000 },
8364 { 0x00000000, 0xc0204810, 0x000 },
8365 { 0x00000000, 0x002f0224, 0x000 },
8366 { 0x00000000, 0x0ce00000, 0x000 },
8367 { 0x00000000, 0x00400000, 0x4a7 },
8368 { 0x00000000, 0xc0210a20, 0x000 },
8369 { 0x00000000, 0x14c00000, 0x4c0 },
8370 { 0x81000000, 0x00204411, 0x000 },
8371 { 0x00000000, 0x00204811, 0x000 },
8372 { 0x0000216d, 0x00204411, 0x000 },
8373 { 0x00000000, 0xc0204800, 0x000 },
8374 { 0x00000000, 0xc0604800, 0x68f },
8375 { 0x00000000, 0x00400000, 0x4c4 },
8376 { 0x81000000, 0x00204411, 0x000 },
8377 { 0x00000001, 0x00204811, 0x000 },
8378 { 0x00040000, 0xc0294620, 0x000 },
8379 { 0x00000000, 0xc0600000, 0x68a },
8380 { 0x00000001, 0x00210222, 0x000 },
8381 { 0x00000000, 0x14c00000, 0x4cb },
8382 { 0x00002169, 0x00204411, 0x000 },
8383 { 0x00000000, 0xc0204800, 0x000 },
8384 { 0x00000000, 0xc0204800, 0x000 },
8385 { 0x00000000, 0x00204810, 0x000 },
8386 { 0xcafebabe, 0x00404811, 0x000 },
8387 { 0x00000000, 0xc0204400, 0x000 },
8388 { 0x00000000, 0xc0404810, 0x000 },
8389 { 0x81000000, 0x00204411, 0x000 },
8390 { 0x00000001, 0x00204811, 0x000 },
8391 { 0x000021f8, 0x00204411, 0x000 },
8392 { 0x0000000e, 0x00204811, 0x000 },
8393 { 0x000421f9, 0x00604411, 0x68a },
8394 { 0x00000000, 0x00210230, 0x000 },
8395 { 0x00000000, 0x14c00000, 0x4cd },
8396 { 0x00002180, 0x00204411, 0x000 },
8397 { 0x00000000, 0xc0204800, 0x000 },
8398 { 0x00000000, 0xc0200000, 0x000 },
8399 { 0x00000000, 0xc0204800, 0x000 },
8400 { 0x00000000, 0xc0200000, 0x000 },
8401 { 0x00000000, 0xc0404800, 0x000 },
8402 { 0x00000003, 0x00333e2f, 0x000 },
8403 { 0x00000001, 0x00210221, 0x000 },
8404 { 0x00000000, 0x14e00000, 0x4fd },
8405 { 0x0000002c, 0x00200a2d, 0x000 },
8406 { 0x00040000, 0x18e00c11, 0x4ec },
8407 { 0x00000001, 0x00333e2f, 0x000 },
8408 { 0x00002169, 0x00204411, 0x000 },
8409 { 0x00000000, 0x00204802, 0x000 },
8410 { 0x00000000, 0x00204803, 0x000 },
8411 { 0x00000008, 0x00300a22, 0x000 },
8412 { 0x00000000, 0xc0204800, 0x000 },
8413 { 0x00000000, 0xc0204800, 0x000 },
8414 { 0x00002169, 0x00204411, 0x000 },
8415 { 0x00000000, 0x00204802, 0x000 },
8416 { 0x00000000, 0x00204803, 0x000 },
8417 { 0x00000008, 0x00300a22, 0x000 },
8418 { 0x00000000, 0xc0204800, 0x000 },
8419 { 0x00000000, 0xd8c04800, 0x4e0 },
8420 { 0x00002169, 0x00204411, 0x000 },
8421 { 0x00000000, 0x00204802, 0x000 },
8422 { 0x00000000, 0x00204803, 0x000 },
8423 { 0x00000008, 0x00300a22, 0x000 },
8424 { 0x00000000, 0xc0204800, 0x000 },
8425 { 0x00000000, 0xc0204800, 0x000 },
8426 { 0x0000002d, 0x0020122d, 0x000 },
8427 { 0x00000000, 0x00290c83, 0x000 },
8428 { 0x00002169, 0x00204411, 0x000 },
8429 { 0x00000000, 0x00204802, 0x000 },
8430 { 0x00000000, 0x00204803, 0x000 },
8431 { 0x00000008, 0x00300a22, 0x000 },
8432 { 0x00000000, 0xc0204800, 0x000 },
8433 { 0x00000000, 0xc0204800, 0x000 },
8434 { 0x00000011, 0x00210224, 0x000 },
8435 { 0x00000000, 0x14c00000, 0x000 },
8436 { 0x00000000, 0x00400000, 0x4a7 },
8437 { 0x0000002c, 0xc0203620, 0x000 },
8438 { 0x0000002d, 0xc0403620, 0x000 },
8439 { 0x0000000f, 0x00210221, 0x000 },
8440 { 0x00000000, 0x14c00000, 0x502 },
8441 { 0x00000000, 0x00600000, 0x00b },
8442 { 0x00000000, 0xd9000000, 0x000 },
8443 { 0x00000000, 0xc0400400, 0x001 },
8444 { 0xb5000000, 0x00204411, 0x000 },
8445 { 0x00002000, 0x00204811, 0x000 },
8446 { 0xb6000000, 0x00204411, 0x000 },
8447 { 0x0000a000, 0x00204811, 0x000 },
8448 { 0xb7000000, 0x00204411, 0x000 },
8449 { 0x0000c000, 0x00204811, 0x000 },
8450 { 0xb8000000, 0x00204411, 0x000 },
8451 { 0x0000f8e0, 0x00204811, 0x000 },
8452 { 0xb9000000, 0x00204411, 0x000 },
8453 { 0x0000f880, 0x00204811, 0x000 },
8454 { 0xba000000, 0x00204411, 0x000 },
8455 { 0x0000e000, 0x00204811, 0x000 },
8456 { 0xbb000000, 0x00204411, 0x000 },
8457 { 0x0000f000, 0x00204811, 0x000 },
8458 { 0xbc000000, 0x00204411, 0x000 },
8459 { 0x0000f3fc, 0x00204811, 0x000 },
8460 { 0x81000000, 0x00204411, 0x000 },
8461 { 0x00000002, 0x00204811, 0x000 },
8462 { 0x000000ff, 0x00280e30, 0x000 },
8463 { 0x00000000, 0x002f0223, 0x000 },
8464 { 0x00000000, 0x0cc00000, 0x516 },
8465 { 0x00000000, 0xc0200800, 0x000 },
8466 { 0x00000000, 0x14c00000, 0x52b },
8467 { 0x00000000, 0x00200c11, 0x000 },
8468 { 0x0000001c, 0x00203623, 0x000 },
8469 { 0x0000002b, 0x00203623, 0x000 },
8470 { 0x00000029, 0x00203623, 0x000 },
8471 { 0x00000028, 0x00203623, 0x000 },
8472 { 0x00000017, 0x00203623, 0x000 },
8473 { 0x00000025, 0x00203623, 0x000 },
8474 { 0x00000026, 0x00203623, 0x000 },
8475 { 0x00000015, 0x00203623, 0x000 },
8476 { 0x00000016, 0x00203623, 0x000 },
8477 { 0xffffe000, 0x00200c11, 0x000 },
8478 { 0x00000021, 0x00203623, 0x000 },
8479 { 0x00000022, 0x00203623, 0x000 },
8480 { 0x00001fff, 0x00200c11, 0x000 },
8481 { 0x00000023, 0x00203623, 0x000 },
8482 { 0x00000024, 0x00203623, 0x000 },
8483 { 0xf1ffffff, 0x00283a2e, 0x000 },
8484 { 0x0000001a, 0xc0220e20, 0x000 },
8485 { 0x00000000, 0x0029386e, 0x000 },
8486 { 0x81000000, 0x00204411, 0x000 },
8487 { 0x00000006, 0x00204811, 0x000 },
8488 { 0x0000002a, 0x40203620, 0x000 },
8489 { 0x87000000, 0x00204411, 0x000 },
8490 { 0x00000000, 0xc0204800, 0x000 },
8491 { 0x0000a1f4, 0x00204411, 0x000 },
8492 { 0x00000000, 0x00204810, 0x000 },
8493 { 0x00000000, 0x00200c11, 0x000 },
8494 { 0x00000030, 0x00203623, 0x000 },
8495 { 0x9d000000, 0x00204411, 0x000 },
8496 { 0x0000001f, 0x40214a20, 0x000 },
8497 { 0x96000000, 0x00204411, 0x000 },
8498 { 0x00000000, 0xc0204800, 0x000 },
8499 { 0x00000000, 0xc0200c00, 0x000 },
8500 { 0x00000000, 0xc0201000, 0x000 },
8501 { 0x0000001f, 0x00211624, 0x000 },
8502 { 0x00000000, 0x14c00000, 0x000 },
8503 { 0x0000001d, 0x00203623, 0x000 },
8504 { 0x00000003, 0x00281e23, 0x000 },
8505 { 0x00000008, 0x00222223, 0x000 },
8506 { 0xfffff000, 0x00282228, 0x000 },
8507 { 0x00000000, 0x002920e8, 0x000 },
8508 { 0x0000001f, 0x00203628, 0x000 },
8509 { 0x00000018, 0x00211e23, 0x000 },
8510 { 0x00000020, 0x00203627, 0x000 },
8511 { 0x00000002, 0x00221624, 0x000 },
8512 { 0x00000000, 0x003014a8, 0x000 },
8513 { 0x0000001e, 0x00203625, 0x000 },
8514 { 0x00000003, 0x00211a24, 0x000 },
8515 { 0x10000000, 0x00281a26, 0x000 },
8516 { 0xefffffff, 0x00283a2e, 0x000 },
8517 { 0x00000000, 0x004938ce, 0x678 },
8518 { 0x00000001, 0x40280a20, 0x000 },
8519 { 0x00000006, 0x40280e20, 0x000 },
8520 { 0x00000300, 0xc0281220, 0x000 },
8521 { 0x00000008, 0x00211224, 0x000 },
8522 { 0x00000000, 0xc0201620, 0x000 },
8523 { 0x00000000, 0xc0201a20, 0x000 },
8524 { 0x00000000, 0x00210222, 0x000 },
8525 { 0x00000000, 0x14c00000, 0x563 },
8526 { 0x81000000, 0x00204411, 0x000 },
8527 { 0x00000001, 0x00204811, 0x000 },
8528 { 0x00002258, 0x00300a24, 0x000 },
8529 { 0x00040000, 0x00694622, 0x68a },
8530 { 0x00002169, 0x00204411, 0x000 },
8531 { 0x00000000, 0x00204805, 0x000 },
8532 { 0x00020000, 0x00294a26, 0x000 },
8533 { 0x00000000, 0x00204810, 0x000 },
8534 { 0xcafebabe, 0x00204811, 0x000 },
8535 { 0x00000002, 0x002f0223, 0x000 },
8536 { 0x00000000, 0x0cc00000, 0x56b },
8537 { 0x00000000, 0xc0201c10, 0x000 },
8538 { 0x00000000, 0xc0400000, 0x579 },
8539 { 0x00000002, 0x002f0223, 0x000 },
8540 { 0x00000000, 0x0cc00000, 0x56b },
8541 { 0x81000000, 0x00204411, 0x000 },
8542 { 0x00000001, 0x00204811, 0x000 },
8543 { 0x00002258, 0x00300a24, 0x000 },
8544 { 0x00040000, 0x00694622, 0x68a },
8545 { 0x00000000, 0xc0201c10, 0x000 },
8546 { 0x00000000, 0xc0400000, 0x579 },
8547 { 0x00000000, 0x002f0223, 0x000 },
8548 { 0x00000000, 0x0cc00000, 0x56f },
8549 { 0x00000000, 0xc0201c00, 0x000 },
8550 { 0x00000000, 0xc0400000, 0x579 },
8551 { 0x00000004, 0x002f0223, 0x000 },
8552 { 0x00000000, 0x0cc00000, 0x577 },
8553 { 0x81000000, 0x00204411, 0x000 },
8554 { 0x00000000, 0x00204811, 0x000 },
8555 { 0x0000216d, 0x00204411, 0x000 },
8556 { 0x00000000, 0xc0204800, 0x000 },
8557 { 0x00000000, 0xc0604800, 0x68f },
8558 { 0x00000000, 0x00401c10, 0x579 },
8559 { 0x00000000, 0xc0200000, 0x000 },
8560 { 0x00000000, 0xc0400000, 0x000 },
8561 { 0x00000000, 0x0ee00000, 0x57b },
8562 { 0x00000000, 0x00600000, 0x5c6 },
8563 { 0x00000000, 0x002f0224, 0x000 },
8564 { 0x00000000, 0x0cc00000, 0x58c },
8565 { 0x0000a2b7, 0x00204411, 0x000 },
8566 { 0x00000000, 0x00204807, 0x000 },
8567 { 0x81000000, 0x00204411, 0x000 },
8568 { 0x00000001, 0x00204811, 0x000 },
8569 { 0x0004a2b6, 0x00604411, 0x68a },
8570 { 0x0000001a, 0x00212230, 0x000 },
8571 { 0x00000006, 0x00222630, 0x000 },
8572 { 0x00042004, 0x00604411, 0x68a },
8573 { 0x0000a2c4, 0x00204411, 0x000 },
8574 { 0x00000000, 0x003048e9, 0x000 },
8575 { 0x00000000, 0x00e00000, 0x58a },
8576 { 0x0000a2d1, 0x00204411, 0x000 },
8577 { 0x00000000, 0x00404808, 0x000 },
8578 { 0x0000a2d1, 0x00204411, 0x000 },
8579 { 0x00000001, 0x00504a28, 0x000 },
8580 { 0x00000001, 0x002f0224, 0x000 },
8581 { 0x00000000, 0x0cc00000, 0x59d },
8582 { 0x0000a2bb, 0x00204411, 0x000 },
8583 { 0x00000000, 0x00204807, 0x000 },
8584 { 0x81000000, 0x00204411, 0x000 },
8585 { 0x00000001, 0x00204811, 0x000 },
8586 { 0x0004a2ba, 0x00604411, 0x68a },
8587 { 0x0000001a, 0x00212230, 0x000 },
8588 { 0x00000006, 0x00222630, 0x000 },
8589 { 0x00042004, 0x00604411, 0x68a },
8590 { 0x0000a2c5, 0x00204411, 0x000 },
8591 { 0x00000000, 0x003048e9, 0x000 },
8592 { 0x00000000, 0x00e00000, 0x59b },
8593 { 0x0000a2d2, 0x00204411, 0x000 },
8594 { 0x00000000, 0x00404808, 0x000 },
8595 { 0x0000a2d2, 0x00204411, 0x000 },
8596 { 0x00000001, 0x00504a28, 0x000 },
8597 { 0x00000002, 0x002f0224, 0x000 },
8598 { 0x00000000, 0x0cc00000, 0x5ae },
8599 { 0x0000a2bf, 0x00204411, 0x000 },
8600 { 0x00000000, 0x00204807, 0x000 },
8601 { 0x81000000, 0x00204411, 0x000 },
8602 { 0x00000001, 0x00204811, 0x000 },
8603 { 0x0004a2be, 0x00604411, 0x68a },
8604 { 0x0000001a, 0x00212230, 0x000 },
8605 { 0x00000006, 0x00222630, 0x000 },
8606 { 0x00042004, 0x00604411, 0x68a },
8607 { 0x0000a2c6, 0x00204411, 0x000 },
8608 { 0x00000000, 0x003048e9, 0x000 },
8609 { 0x00000000, 0x00e00000, 0x5ac },
8610 { 0x0000a2d3, 0x00204411, 0x000 },
8611 { 0x00000000, 0x00404808, 0x000 },
8612 { 0x0000a2d3, 0x00204411, 0x000 },
8613 { 0x00000001, 0x00504a28, 0x000 },
8614 { 0x0000a2c3, 0x00204411, 0x000 },
8615 { 0x00000000, 0x00204807, 0x000 },
8616 { 0x81000000, 0x00204411, 0x000 },
8617 { 0x00000001, 0x00204811, 0x000 },
8618 { 0x0004a2c2, 0x00604411, 0x68a },
8619 { 0x0000001a, 0x00212230, 0x000 },
8620 { 0x00000006, 0x00222630, 0x000 },
8621 { 0x00042004, 0x00604411, 0x68a },
8622 { 0x0000a2c7, 0x00204411, 0x000 },
8623 { 0x00000000, 0x003048e9, 0x000 },
8624 { 0x00000000, 0x00e00000, 0x5bb },
8625 { 0x0000a2d4, 0x00204411, 0x000 },
8626 { 0x00000000, 0x00404808, 0x000 },
8627 { 0x0000a2d4, 0x00204411, 0x000 },
8628 { 0x00000001, 0x00504a28, 0x000 },
8629 { 0x85000000, 0x00204411, 0x000 },
8630 { 0x00000000, 0x00204801, 0x000 },
8631 { 0x0000304a, 0x00204411, 0x000 },
8632 { 0x01000000, 0x00204811, 0x000 },
8633 { 0x00000000, 0x00400000, 0x5c1 },
8634 { 0xa4000000, 0xc0204411, 0x000 },
8635 { 0x00000000, 0xc0404800, 0x000 },
8636 { 0x00000000, 0xc0600000, 0x5c6 },
8637 { 0x00000000, 0xc0400400, 0x001 },
8638 { 0x0000002c, 0x00203621, 0x000 },
8639 { 0x81000000, 0x00204411, 0x000 },
8640 { 0x00000006, 0x00204811, 0x000 },
8641 { 0x00000000, 0x002f0230, 0x000 },
8642 { 0x00000000, 0x0cc00000, 0x5cd },
8643 { 0x00000000, 0x00200411, 0x000 },
8644 { 0x00000030, 0x00403621, 0x5e0 },
8645 { 0x00000030, 0x0020062d, 0x000 },
8646 { 0x00007e00, 0x00280621, 0x000 },
8647 { 0x00000000, 0x002f0221, 0x000 },
8648 { 0x00000000, 0x0ce00000, 0x5e0 },
8649 { 0x81000000, 0x00204411, 0x000 },
8650 { 0x00000001, 0x00204811, 0x000 },
8651 { 0x0004a092, 0x00604411, 0x68a },
8652 { 0x00000031, 0x00203630, 0x000 },
8653 { 0x0004a093, 0x00604411, 0x68a },
8654 { 0x00000032, 0x00203630, 0x000 },
8655 { 0x0004a2b6, 0x00604411, 0x68a },
8656 { 0x00000033, 0x00203630, 0x000 },
8657 { 0x0004a2ba, 0x00604411, 0x68a },
8658 { 0x00000034, 0x00203630, 0x000 },
8659 { 0x0004a2be, 0x00604411, 0x68a },
8660 { 0x00000035, 0x00203630, 0x000 },
8661 { 0x0004a2c2, 0x00604411, 0x68a },
8662 { 0x00000036, 0x00203630, 0x000 },
8663 { 0x00042004, 0x00604411, 0x68a },
8664 { 0x0001a2a4, 0x00204411, 0x000 },
8665 { 0x0000003f, 0x00204811, 0x000 },
8666 { 0x0000003f, 0x00204811, 0x000 },
8667 { 0x0000003f, 0x00204811, 0x000 },
8668 { 0x0000003f, 0x00204811, 0x000 },
8669 { 0x00000005, 0x00204811, 0x000 },
8670 { 0x0000a1f4, 0x00204411, 0x000 },
8671 { 0x00000000, 0x00204811, 0x000 },
8672 { 0x88000000, 0x00204411, 0x000 },
8673 { 0x00000001, 0x00204811, 0x000 },
8674 { 0x81000000, 0x00204411, 0x000 },
8675 { 0x00000006, 0x00204811, 0x000 },
8676 { 0x00000001, 0x002f0230, 0x000 },
8677 { 0x00000000, 0x0ce00000, 0x629 },
8678 { 0x00000030, 0x0020062d, 0x000 },
8679 { 0x00000000, 0x002f0221, 0x000 },
8680 { 0x00000000, 0x0ce00000, 0x629 },
8681 { 0x81000000, 0x00204411, 0x000 },
8682 { 0x00000001, 0x00204811, 0x000 },
8683 { 0x00007e00, 0x00280621, 0x000 },
8684 { 0x00000000, 0x002f0221, 0x000 },
8685 { 0x00000000, 0x0ce00000, 0x602 },
8686 { 0x0000a092, 0x00204411, 0x000 },
8687 { 0x00000031, 0x00204a2d, 0x000 },
8688 { 0x0000a093, 0x00204411, 0x000 },
8689 { 0x00000032, 0x00204a2d, 0x000 },
8690 { 0x0000a2b6, 0x00204411, 0x000 },
8691 { 0x00000033, 0x00204a2d, 0x000 },
8692 { 0x0000a2ba, 0x00204411, 0x000 },
8693 { 0x00000034, 0x00204a2d, 0x000 },
8694 { 0x0000a2be, 0x00204411, 0x000 },
8695 { 0x00000035, 0x00204a2d, 0x000 },
8696 { 0x0000a2c2, 0x00204411, 0x000 },
8697 { 0x00000036, 0x00204a2d, 0x000 },
8698 { 0x00000030, 0x0020062d, 0x000 },
8699 { 0x000001ff, 0x00280621, 0x000 },
8700 { 0x00000000, 0x002f0221, 0x000 },
8701 { 0x00000000, 0x0ce00000, 0x628 },
8702 { 0x00000000, 0x00210221, 0x000 },
8703 { 0x00000000, 0x14c00000, 0x60b },
8704 { 0x0004a003, 0x00604411, 0x68a },
8705 { 0x0000a003, 0x00204411, 0x000 },
8706 { 0x00000000, 0x00204810, 0x000 },
8707 { 0x00000001, 0x00210621, 0x000 },
8708 { 0x00000000, 0x14c00000, 0x610 },
8709 { 0x0004a010, 0x00604411, 0x68a },
8710 { 0x0000a010, 0x00204411, 0x000 },
8711 { 0x00000000, 0x00204810, 0x000 },
8712 { 0x00000001, 0x00210621, 0x000 },
8713 { 0x00000000, 0x002f0221, 0x000 },
8714 { 0x00000000, 0x0ce00000, 0x628 },
8715 { 0x0004a011, 0x00604411, 0x68a },
8716 { 0x0000a011, 0x00204411, 0x000 },
8717 { 0x00000000, 0x00204810, 0x000 },
8718 { 0x0004a012, 0x00604411, 0x68a },
8719 { 0x0000a012, 0x00204411, 0x000 },
8720 { 0x00000000, 0x00204810, 0x000 },
8721 { 0x0004a013, 0x00604411, 0x68a },
8722 { 0x0000a013, 0x00204411, 0x000 },
8723 { 0x00000000, 0x00204810, 0x000 },
8724 { 0x0004a014, 0x00604411, 0x68a },
8725 { 0x0000a014, 0x00204411, 0x000 },
8726 { 0x00000000, 0x00204810, 0x000 },
8727 { 0x0004a015, 0x00604411, 0x68a },
8728 { 0x0000a015, 0x00204411, 0x000 },
8729 { 0x00000000, 0x00204810, 0x000 },
8730 { 0x0004a016, 0x00604411, 0x68a },
8731 { 0x0000a016, 0x00204411, 0x000 },
8732 { 0x00000000, 0x00204810, 0x000 },
8733 { 0x0004a017, 0x00604411, 0x68a },
8734 { 0x0000a017, 0x00204411, 0x000 },
8735 { 0x00000000, 0x00204810, 0x000 },
8736 { 0x00042004, 0x00604411, 0x68a },
8737 { 0x0000002c, 0x0080062d, 0x000 },
8738 { 0xff000000, 0x00204411, 0x000 },
8739 { 0x00000000, 0x00204811, 0x000 },
8740 { 0x00000001, 0x00204811, 0x000 },
8741 { 0x00000002, 0x00804811, 0x000 },
8742 { 0x00000000, 0x0ee00000, 0x63a },
8743 { 0x00000030, 0x0020062d, 0x000 },
8744 { 0x00000002, 0x00280621, 0x000 },
8745 { 0x00000000, 0x002f0221, 0x000 },
8746 { 0x00000000, 0x0ce00000, 0x638 },
8747 { 0x81000000, 0x00204411, 0x000 },
8748 { 0x00000001, 0x00204811, 0x000 },
8749 { 0x00042004, 0x00604411, 0x68a },
8750 { 0x00001000, 0x00200811, 0x000 },
8751 { 0x0000002b, 0x00203622, 0x000 },
8752 { 0x00000000, 0x00600000, 0x63e },
8753 { 0x00000000, 0x00600000, 0x5c6 },
8754 { 0x98000000, 0x00204411, 0x000 },
8755 { 0x00000000, 0x00804811, 0x000 },
8756 { 0x00000000, 0xc0600000, 0x63e },
8757 { 0x00000000, 0xc0400400, 0x001 },
8758 { 0x0000a2a4, 0x00204411, 0x000 },
8759 { 0x00000022, 0x00204811, 0x000 },
8760 { 0x89000000, 0x00204411, 0x000 },
8761 { 0x00000001, 0x00404811, 0x62a },
8762 { 0x97000000, 0x00204411, 0x000 },
8763 { 0x00000000, 0x00204811, 0x000 },
8764 { 0x8a000000, 0x00204411, 0x000 },
8765 { 0x00000000, 0x00404811, 0x62a },
8766 { 0x00000000, 0x00600000, 0x659 },
8767 { 0x00002010, 0x00204411, 0x000 },
8768 { 0x00008000, 0x00204811, 0x000 },
8769 { 0x0001a2a4, 0xc0204411, 0x000 },
8770 { 0x00000016, 0x00604811, 0x36e },
8771 { 0x00002010, 0x00204411, 0x000 },
8772 { 0x00010000, 0x00204811, 0x000 },
8773 { 0x81000000, 0x00204411, 0x000 },
8774 { 0x00000001, 0x00204811, 0x000 },
8775 { 0x0000217c, 0x00204411, 0x000 },
8776 { 0x09800000, 0x00204811, 0x000 },
8777 { 0xffffffff, 0x00204811, 0x000 },
8778 { 0x00000000, 0x00204811, 0x000 },
8779 { 0x00000000, 0x17000000, 0x000 },
8780 { 0x0004217f, 0x00604411, 0x68a },
8781 { 0x0000001f, 0x00210230, 0x000 },
8782 { 0x00000000, 0x14c00000, 0x000 },
8783 { 0x00000004, 0x00404c11, 0x653 },
8784 { 0x00000000, 0x00400000, 0x000 },
8785 { 0x00000017, 0x00201e2d, 0x000 },
8786 { 0x00000004, 0x00291e27, 0x000 },
8787 { 0x00000017, 0x00803627, 0x000 },
8788 { 0x00000017, 0x00201e2d, 0x000 },
8789 { 0xfffffffb, 0x00281e27, 0x000 },
8790 { 0x00000017, 0x00803627, 0x000 },
8791 { 0x00000017, 0x00201e2d, 0x000 },
8792 { 0x00000008, 0x00291e27, 0x000 },
8793 { 0x00000017, 0x00803627, 0x000 },
8794 { 0x00000017, 0x00201e2d, 0x000 },
8795 { 0xfffffff7, 0x00281e27, 0x000 },
8796 { 0x00000017, 0x00803627, 0x000 },
8797 { 0x00002010, 0x00204411, 0x000 },
8798 { 0x00008000, 0x00204811, 0x000 },
8799 { 0x0001a2a4, 0x00204411, 0x000 },
8800 { 0x00000016, 0x00604811, 0x36e },
8801 { 0x00002010, 0x00204411, 0x000 },
8802 { 0x00010000, 0x00204811, 0x000 },
8803 { 0x0000217c, 0x00204411, 0x000 },
8804 { 0x01800000, 0x00204811, 0x000 },
8805 { 0xffffffff, 0x00204811, 0x000 },
8806 { 0x00000000, 0x00204811, 0x000 },
8807 { 0x00000000, 0x17000000, 0x000 },
8808 { 0x81000000, 0x00204411, 0x000 },
8809 { 0x00000001, 0x00204811, 0x000 },
8810 { 0x0004217f, 0x00604411, 0x68a },
8811 { 0x0000001f, 0x00210230, 0x000 },
8812 { 0x00000000, 0x14c00000, 0x689 },
8813 { 0x00000010, 0x00404c11, 0x66f },
8814 { 0x00000000, 0xc0200400, 0x000 },
8815 { 0x00000000, 0x38c00000, 0x000 },
8816 { 0x0000001d, 0x00200a2d, 0x000 },
8817 { 0x0000001e, 0x00200e2d, 0x000 },
8818 { 0x0000001f, 0x0020122d, 0x000 },
8819 { 0x00000020, 0x0020162d, 0x000 },
8820 { 0x00002169, 0x00204411, 0x000 },
8821 { 0x00000000, 0x00204804, 0x000 },
8822 { 0x00000000, 0x00204805, 0x000 },
8823 { 0x00000000, 0x00204801, 0x000 },
8824 { 0xcafebabe, 0x00204811, 0x000 },
8825 { 0x00000004, 0x00301224, 0x000 },
8826 { 0x00000000, 0x002f0064, 0x000 },
8827 { 0x00000000, 0x0cc00000, 0x688 },
8828 { 0x00000003, 0x00281a22, 0x000 },
8829 { 0x00000008, 0x00221222, 0x000 },
8830 { 0xfffff000, 0x00281224, 0x000 },
8831 { 0x00000000, 0x002910c4, 0x000 },
8832 { 0x0000001f, 0x00403624, 0x000 },
8833 { 0x00000000, 0x00800000, 0x000 },
8834 { 0x00000000, 0x1ac00000, 0x68a },
8835 { 0x9f000000, 0x00204411, 0x000 },
8836 { 0xcafebabe, 0x00204811, 0x000 },
8837 { 0x00000000, 0x1ae00000, 0x68d },
8838 { 0x00000000, 0x00800000, 0x000 },
8839 { 0x00000000, 0x1ac00000, 0x68f },
8840 { 0x9e000000, 0x00204411, 0x000 },
8841 { 0xcafebabe, 0x00204811, 0x000 },
8842 { 0x00000000, 0x1ae00000, 0x692 },
8843 { 0x00000000, 0x00800000, 0x000 },
8844 { 0x00000000, 0x00600000, 0x00b },
8845 { 0x00001000, 0x00600411, 0x315 },
8846 { 0x00000000, 0x00200411, 0x000 },
8847 { 0x00000000, 0x00600811, 0x1b2 },
8848 { 0x0000225c, 0x00204411, 0x000 },
8849 { 0x00000003, 0x00204811, 0x000 },
8850 { 0x00002256, 0x00204411, 0x000 },
8851 { 0x0000001b, 0x00204811, 0x000 },
8852 { 0x0000a1fc, 0x00204411, 0x000 },
8853 { 0x00000001, 0x00204811, 0x000 },
8854 { 0x0001a1fd, 0xc0204411, 0x000 },
8855 { 0x00000021, 0x00201e2d, 0x000 },
8856 { 0x00000010, 0x00221e27, 0x000 },
8857 { 0x00000024, 0x0020222d, 0x000 },
8858 { 0x0000ffff, 0x00282228, 0x000 },
8859 { 0x00000000, 0x00294907, 0x000 },
8860 { 0x00000000, 0x00204811, 0x000 },
8861 { 0x00000022, 0x0020222d, 0x000 },
8862 { 0x0000ffff, 0x00282228, 0x000 },
8863 { 0x00000000, 0x00294907, 0x000 },
8864 { 0x00000000, 0x00204811, 0x000 },
8865 { 0x00000023, 0x00201e2d, 0x000 },
8866 { 0x00000010, 0x00221e27, 0x000 },
8867 { 0x00000000, 0x00294907, 0x000 },
8868 { 0x00000000, 0x00404811, 0x000 },
8869 { 0x00000000, 0x00000000, 0x000 },
8870 { 0x00000000, 0x00000000, 0x000 },
8871 { 0x00000000, 0x00000000, 0x000 },
8872 { 0x00000000, 0x00000000, 0x000 },
8873 { 0x00000000, 0x00000000, 0x000 },
8874 { 0x00000000, 0x00000000, 0x000 },
8875 { 0x00000000, 0x00000000, 0x000 },
8876 { 0x00000000, 0x00000000, 0x000 },
8877 { 0x00000000, 0x00000000, 0x000 },
8878 { 0x00000000, 0x00000000, 0x000 },
8879 { 0x00000000, 0x00000000, 0x000 },
8880 { 0x00000000, 0x00000000, 0x000 },
8881 { 0x00000000, 0x00000000, 0x000 },
8882 { 0x00000000, 0x00000000, 0x000 },
8883 { 0x00000000, 0x00000000, 0x000 },
8884 { 0x00000000, 0x00000000, 0x000 },
8885 { 0x00000000, 0x00000000, 0x000 },
8886 { 0x00000000, 0x00000000, 0x000 },
8887 { 0x00000000, 0x00000000, 0x000 },
8888 { 0x00000000, 0x00000000, 0x000 },
8889 { 0x00000000, 0x00000000, 0x000 },
8890 { 0x00000000, 0x00000000, 0x000 },
8891 { 0x00000000, 0x00000000, 0x000 },
8892 { 0x00000000, 0x00000000, 0x000 },
8893 { 0x00000000, 0x00000000, 0x000 },
8894 { 0x00000000, 0x00000000, 0x000 },
8895 { 0x00000000, 0x00000000, 0x000 },
8896 { 0x00000000, 0x00000000, 0x000 },
8897 { 0x00000000, 0x00000000, 0x000 },
8898 { 0x00000000, 0x00000000, 0x000 },
8899 { 0x00000000, 0x00000000, 0x000 },
8900 { 0x00000000, 0x00000000, 0x000 },
8901 { 0x00000000, 0x00000000, 0x000 },
8902 { 0x00000000, 0x00000000, 0x000 },
8903 { 0x00000000, 0x00000000, 0x000 },
8904 { 0x00000000, 0x00000000, 0x000 },
8905 { 0x00000000, 0x00000000, 0x000 },
8906 { 0x00000000, 0x00000000, 0x000 },
8907 { 0x00000000, 0x00000000, 0x000 },
8908 { 0x00000000, 0x00000000, 0x000 },
8909 { 0x00000000, 0x00000000, 0x000 },
8910 { 0x00000000, 0x00000000, 0x000 },
8911 { 0x00000000, 0x00000000, 0x000 },
8912 { 0x00000000, 0x00000000, 0x000 },
8913 { 0x00000000, 0x00000000, 0x000 },
8914 { 0x00000000, 0x00000000, 0x000 },
8915 { 0x00000000, 0x00000000, 0x000 },
8916 { 0x00000000, 0x00000000, 0x000 },
8917 { 0x00000000, 0x00000000, 0x000 },
8918 { 0x00000000, 0x00000000, 0x000 },
8919 { 0x00000000, 0x00000000, 0x000 },
8920 { 0x00000000, 0x00000000, 0x000 },
8921 { 0x00000000, 0x00000000, 0x000 },
8922 { 0x00000000, 0x00000000, 0x000 },
8923 { 0x00000000, 0x00000000, 0x000 },
8924 { 0x014204ff, 0x05bd0250, 0x000 },
8925 { 0x01c30168, 0x043f05bd, 0x000 },
8926 { 0x02250209, 0x02500151, 0x000 },
8927 { 0x02230245, 0x02a00241, 0x000 },
8928 { 0x03d705bd, 0x05bd05bd, 0x000 },
8929 { 0x06460647, 0x031f05bd, 0x000 },
8930 { 0x05bd05c2, 0x03200340, 0x000 },
8931 { 0x032a0282, 0x03420334, 0x000 },
8932 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8933 { 0x05bd054e, 0x05bd05bd, 0x000 },
8934 { 0x03ba05bd, 0x04b80344, 0x000 },
8935 { 0x0497044d, 0x043d05bd, 0x000 },
8936 { 0x04cd05bd, 0x044104da, 0x000 },
8937 { 0x044d0504, 0x03510375, 0x000 },
8938 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8939 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8940 { 0x05bd05bd, 0x063c05c4, 0x000 },
8941 { 0x05bd05bd, 0x000705bd, 0x000 },
8942 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8943 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8944 { 0x03f803ed, 0x04080406, 0x000 },
8945 { 0x040e040a, 0x040c0410, 0x000 },
8946 { 0x041c0418, 0x04240420, 0x000 },
8947 { 0x042c0428, 0x04340430, 0x000 },
8948 { 0x05bd05bd, 0x043805bd, 0x000 },
8949 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8950 { 0x05bd05bd, 0x05bd05bd, 0x000 },
8951 { 0x00020676, 0x06940006, 0x000 },
8952};
8953
8954static const u32 RV630_pfp_microcode[] = {
89550xca0400,
89560xa00000,
89570x7e828b,
89580x7c038b,
89590x8001b8,
89600x7c038b,
89610xd4401e,
89620xee001e,
89630xca0400,
89640xa00000,
89650x7e828b,
89660xc41838,
89670xca2400,
89680xca2800,
89690x9581a8,
89700xc41c3a,
89710xc3c000,
89720xca0800,
89730xca0c00,
89740x7c744b,
89750xc20005,
89760x99c000,
89770xc41c3a,
89780x7c744c,
89790xc0fff0,
89800x042c04,
89810x309002,
89820x7d2500,
89830x351402,
89840x7d350b,
89850x255403,
89860x7cd580,
89870x259c03,
89880x95c004,
89890xd5001b,
89900x7eddc1,
89910x7d9d80,
89920xd6801b,
89930xd5801b,
89940xd4401e,
89950xd5401e,
89960xd6401e,
89970xd6801e,
89980xd4801e,
89990xd4c01e,
90000x9783d3,
90010xd5c01e,
90020xca0800,
90030x80001a,
90040xca0c00,
90050xe4011e,
90060xd4001e,
90070x80000c,
90080xc41838,
90090xe4013e,
90100xd4001e,
90110x80000c,
90120xc41838,
90130xd4401e,
90140xee001e,
90150xca0400,
90160xa00000,
90170x7e828b,
90180xe4011e,
90190xd4001e,
90200xd4401e,
90210xee001e,
90220xca0400,
90230xa00000,
90240x7e828b,
90250xe4013e,
90260xd4001e,
90270xd4401e,
90280xee001e,
90290xca0400,
90300xa00000,
90310x7e828b,
90320xca1800,
90330xd4401e,
90340xd5801e,
90350x800053,
90360xd40075,
90370xd4401e,
90380xca0800,
90390xca0c00,
90400xca1000,
90410xd48019,
90420xd4c018,
90430xd50017,
90440xd4801e,
90450xd4c01e,
90460xd5001e,
90470xe2001e,
90480xca0400,
90490xa00000,
90500x7e828b,
90510xca0800,
90520xd48060,
90530xd4401e,
90540x800000,
90550xd4801e,
90560xca0800,
90570xd48061,
90580xd4401e,
90590x800000,
90600xd4801e,
90610xca0800,
90620xca0c00,
90630xd4401e,
90640xd48016,
90650xd4c016,
90660xd4801e,
90670x8001b8,
90680xd4c01e,
90690xc60843,
90700xca0c00,
90710xca1000,
90720x948004,
90730xca1400,
90740xe420f3,
90750xd42013,
90760xd56065,
90770xd4e01c,
90780xd5201c,
90790xd5601c,
90800x800000,
90810x062001,
90820xc60843,
90830xca0c00,
90840xca1000,
90850x9483f7,
90860xca1400,
90870xe420f3,
90880x800079,
90890xd42013,
90900xc60843,
90910xca0c00,
90920xca1000,
90930x9883ef,
90940xca1400,
90950xd40064,
90960x80008d,
90970x000000,
90980xc41432,
90990xc61843,
91000xc4082f,
91010x954005,
91020xc40c30,
91030xd4401e,
91040x800000,
91050xee001e,
91060x9583f5,
91070xc41031,
91080xd44033,
91090xd52065,
91100xd4a01c,
91110xd4e01c,
91120xd5201c,
91130xe4015e,
91140xd4001e,
91150x800000,
91160x062001,
91170xca1800,
91180x0a2001,
91190xd60076,
91200xc40836,
91210x988007,
91220xc61045,
91230x950110,
91240xd4001f,
91250xd46062,
91260x800000,
91270xd42062,
91280xcc3835,
91290xcc1433,
91300x8401bb,
91310xd40072,
91320xd5401e,
91330x800000,
91340xee001e,
91350xe2001a,
91360x8401bb,
91370xe2001a,
91380xcc104b,
91390xcc0447,
91400x2c9401,
91410x7d098b,
91420x984005,
91430x7d15cb,
91440xd4001a,
91450x8001b8,
91460xd4006d,
91470x344401,
91480xcc0c48,
91490x98403a,
91500xcc2c4a,
91510x958004,
91520xcc0449,
91530x8001b8,
91540xd4001a,
91550xd4c01a,
91560x282801,
91570x8400f0,
91580xcc1003,
91590x98801b,
91600x04380c,
91610x8400f0,
91620xcc1003,
91630x988017,
91640x043808,
91650x8400f0,
91660xcc1003,
91670x988013,
91680x043804,
91690x8400f0,
91700xcc1003,
91710x988014,
91720xcc104c,
91730x9a8009,
91740xcc144d,
91750x9840dc,
91760xd4006d,
91770xcc1848,
91780xd5001a,
91790xd5401a,
91800x8000c9,
91810xd5801a,
91820x96c0d5,
91830xd4006d,
91840x8001b8,
91850xd4006e,
91860x9ac003,
91870xd4006d,
91880xd4006e,
91890x800000,
91900xec007f,
91910x9ac0cc,
91920xd4006d,
91930x8001b8,
91940xd4006e,
91950xcc1403,
91960xcc1803,
91970xcc1c03,
91980x7d9103,
91990x7dd583,
92000x7d190c,
92010x35cc1f,
92020x35701f,
92030x7cf0cb,
92040x7cd08b,
92050x880000,
92060x7e8e8b,
92070x95c004,
92080xd4006e,
92090x8001b8,
92100xd4001a,
92110xd4c01a,
92120xcc0803,
92130xcc0c03,
92140xcc1003,
92150xcc1403,
92160xcc1803,
92170xcc1c03,
92180xcc2403,
92190xcc2803,
92200x35c41f,
92210x36b01f,
92220x7c704b,
92230x34f01f,
92240x7c704b,
92250x35701f,
92260x7c704b,
92270x7d8881,
92280x7dccc1,
92290x7e5101,
92300x7e9541,
92310x7c9082,
92320x7cd4c2,
92330x7c848b,
92340x9ac003,
92350x7c8c8b,
92360x2c8801,
92370x98809e,
92380xd4006d,
92390x98409c,
92400xd4006e,
92410xcc084c,
92420xcc0c4d,
92430xcc1048,
92440xd4801a,
92450xd4c01a,
92460x800101,
92470xd5001a,
92480xcc0832,
92490xd40032,
92500x9482d9,
92510xca0c00,
92520xd4401e,
92530x800000,
92540xd4001e,
92550xe4011e,
92560xd4001e,
92570xca0800,
92580xca0c00,
92590xca1000,
92600xd4401e,
92610xca1400,
92620xd4801e,
92630xd4c01e,
92640xd5001e,
92650xd5401e,
92660xd54034,
92670x800000,
92680xee001e,
92690x280404,
92700xe2001a,
92710xe2001a,
92720xd4401a,
92730xca3800,
92740xcc0803,
92750xcc0c03,
92760xcc0c03,
92770xcc0c03,
92780x9882bd,
92790x000000,
92800x8401bb,
92810xd7a06f,
92820x800000,
92830xee001f,
92840xca0400,
92850xc2ff00,
92860xcc0834,
92870xc13fff,
92880x7c74cb,
92890x7cc90b,
92900x7d010f,
92910x9902b0,
92920x7c738b,
92930x8401bb,
92940xd7a06f,
92950x800000,
92960xee001f,
92970xca0800,
92980x281900,
92990x7d898b,
93000x958014,
93010x281404,
93020xca0c00,
93030xca1000,
93040xca1c00,
93050xca2400,
93060xe2001f,
93070xd4c01a,
93080xd5001a,
93090xd5401a,
93100xcc1803,
93110xcc2c03,
93120xcc2c03,
93130xcc2c03,
93140x7da58b,
93150x7d9c47,
93160x984297,
93170x000000,
93180x800161,
93190xd4c01a,
93200xd4401e,
93210xd4801e,
93220x800000,
93230xee001e,
93240xe4011e,
93250xd4001e,
93260xd4401e,
93270xee001e,
93280xca0400,
93290xa00000,
93300x7e828b,
93310xe4013e,
93320xd4001e,
93330xd4401e,
93340xee001e,
93350xca0400,
93360xa00000,
93370x7e828b,
93380xca0800,
93390x248c06,
93400x0ccc06,
93410x98c006,
93420xcc104e,
93430x990004,
93440xd40073,
93450xe4011e,
93460xd4001e,
93470xd4401e,
93480xd4801e,
93490x800000,
93500xee001e,
93510xca0800,
93520xca0c00,
93530x34d018,
93540x251001,
93550x950021,
93560xc17fff,
93570xca1000,
93580xca1400,
93590xca1800,
93600xd4801d,
93610xd4c01d,
93620x7db18b,
93630xc14202,
93640xc2c001,
93650xd5801d,
93660x34dc0e,
93670x7d5d4c,
93680x7f734c,
93690xd7401e,
93700xd5001e,
93710xd5401e,
93720xc14200,
93730xc2c000,
93740x099c01,
93750x31dc10,
93760x7f5f4c,
93770x7f734c,
93780x042802,
93790x7d8380,
93800xd5a86f,
93810xd58066,
93820xd7401e,
93830xec005e,
93840xc82402,
93850xc82402,
93860x8001b8,
93870xd60076,
93880xd4401e,
93890xd4801e,
93900xd4c01e,
93910x800000,
93920xee001e,
93930x800000,
93940xee001f,
93950xd4001f,
93960x800000,
93970xd4001f,
93980xd4001f,
93990x880000,
94000xd4001f,
94010x000000,
94020x000000,
94030x000000,
94040x000000,
94050x000000,
94060x000000,
94070x000000,
94080x000000,
94090x000000,
94100x000000,
94110x000000,
94120x000000,
94130x000000,
94140x000000,
94150x000000,
94160x000000,
94170x000000,
94180x000000,
94190x000000,
94200x000000,
94210x000000,
94220x000000,
94230x000000,
94240x000000,
94250x000000,
94260x000000,
94270x000000,
94280x000000,
94290x000000,
94300x000000,
94310x000000,
94320x000000,
94330x000000,
94340x000000,
94350x000000,
94360x000000,
94370x000000,
94380x000000,
94390x000000,
94400x000000,
94410x000000,
94420x000000,
94430x000000,
94440x000000,
94450x000000,
94460x000000,
94470x000000,
94480x000000,
94490x000000,
94500x000000,
94510x000000,
94520x000000,
94530x000000,
94540x000000,
94550x000000,
94560x000000,
94570x000000,
94580x000000,
94590x000000,
94600x000000,
94610x000000,
94620x000000,
94630x000000,
94640x000000,
94650x000000,
94660x000000,
94670x010171,
94680x020178,
94690x03008f,
94700x04007f,
94710x050003,
94720x06003f,
94730x070032,
94740x08012c,
94750x090046,
94760x0a0036,
94770x1001b6,
94780x1700a2,
94790x22013a,
94800x230149,
94810x2000b4,
94820x240125,
94830x27004d,
94840x28006a,
94850x2a0060,
94860x2b0052,
94870x2f0065,
94880x320087,
94890x34017f,
94900x3c0156,
94910x3f0072,
94920x41018c,
94930x44012e,
94940x550173,
94950x56017a,
94960x60000b,
94970x610034,
94980x620038,
94990x630038,
95000x640038,
95010x650038,
95020x660038,
95030x670038,
95040x68003a,
95050x690041,
95060x6a0048,
95070x6b0048,
95080x6c0048,
95090x6d0048,
95100x6e0048,
95110x6f0048,
95120x000006,
95130x000006,
95140x000006,
95150x000006,
95160x000006,
95170x000006,
95180x000006,
95190x000006,
95200x000006,
95210x000006,
95220x000006,
95230x000006,
95240x000006,
95250x000006,
95260x000006,
95270x000006,
95280x000006,
95290x000006,
95300x000006,
9531};
9532
9533static const u32 RV635_cp_microcode[][3] = {
9534 { 0x00000000, 0xc0200400, 0x000 },
9535 { 0x00000000, 0x00a0000a, 0x000 },
9536 { 0x0000ffff, 0x00284621, 0x000 },
9537 { 0x00000000, 0xd9004800, 0x000 },
9538 { 0x00000000, 0xc0200400, 0x000 },
9539 { 0x00000000, 0x00a0000a, 0x000 },
9540 { 0x00000000, 0x00e00000, 0x000 },
9541 { 0x00010000, 0xc0294620, 0x000 },
9542 { 0x00000000, 0xd9004800, 0x000 },
9543 { 0x00000000, 0xc0200400, 0x000 },
9544 { 0x00000000, 0x00a0000a, 0x000 },
9545 { 0x81000000, 0x00204411, 0x000 },
9546 { 0x00000001, 0x00204811, 0x000 },
9547 { 0x00042004, 0x00604411, 0x68a },
9548 { 0x00000000, 0x00600000, 0x62e },
9549 { 0x00000000, 0x00600000, 0x642 },
9550 { 0x00000000, 0xc0200800, 0x000 },
9551 { 0x00000f00, 0x00281622, 0x000 },
9552 { 0x00000008, 0x00211625, 0x000 },
9553 { 0x00000018, 0x00203625, 0x000 },
9554 { 0x8d000000, 0x00204411, 0x000 },
9555 { 0x00000004, 0x002f0225, 0x000 },
9556 { 0x00000000, 0x0ce00000, 0x018 },
9557 { 0x00412000, 0x00404811, 0x019 },
9558 { 0x00422000, 0x00204811, 0x000 },
9559 { 0x8e000000, 0x00204411, 0x000 },
9560 { 0x00000028, 0x00204a2d, 0x000 },
9561 { 0x90000000, 0x00204411, 0x000 },
9562 { 0x00000000, 0x00204805, 0x000 },
9563 { 0x0000000c, 0x00211622, 0x000 },
9564 { 0x00000003, 0x00281625, 0x000 },
9565 { 0x00000019, 0x00211a22, 0x000 },
9566 { 0x00000004, 0x00281a26, 0x000 },
9567 { 0x00000000, 0x002914c5, 0x000 },
9568 { 0x00000019, 0x00203625, 0x000 },
9569 { 0x00000000, 0x003a1402, 0x000 },
9570 { 0x00000016, 0x00211625, 0x000 },
9571 { 0x00000003, 0x00281625, 0x000 },
9572 { 0x00000017, 0x00200e2d, 0x000 },
9573 { 0xfffffffc, 0x00280e23, 0x000 },
9574 { 0x00000000, 0x002914a3, 0x000 },
9575 { 0x00000017, 0x00203625, 0x000 },
9576 { 0x00008000, 0x00280e22, 0x000 },
9577 { 0x00000007, 0x00220e23, 0x000 },
9578 { 0x00000000, 0x0029386e, 0x000 },
9579 { 0x20000000, 0x00280e22, 0x000 },
9580 { 0x00000006, 0x00210e23, 0x000 },
9581 { 0x00000000, 0x0029386e, 0x000 },
9582 { 0x00000000, 0x00220222, 0x000 },
9583 { 0x00000000, 0x14e00000, 0x038 },
9584 { 0x00000000, 0x2ee00000, 0x035 },
9585 { 0x00000000, 0x2ce00000, 0x037 },
9586 { 0x00000000, 0x00400e2d, 0x039 },
9587 { 0x00000008, 0x00200e2d, 0x000 },
9588 { 0x00000009, 0x0040122d, 0x046 },
9589 { 0x00000001, 0x00400e2d, 0x039 },
9590 { 0x00000000, 0xc0200c00, 0x000 },
9591 { 0x003ffffc, 0x00281223, 0x000 },
9592 { 0x00000002, 0x00221224, 0x000 },
9593 { 0x0000001f, 0x00211e23, 0x000 },
9594 { 0x00000000, 0x14e00000, 0x03e },
9595 { 0x00000008, 0x00401c11, 0x041 },
9596 { 0x0000000d, 0x00201e2d, 0x000 },
9597 { 0x0000000f, 0x00281e27, 0x000 },
9598 { 0x00000003, 0x00221e27, 0x000 },
9599 { 0x7fc00000, 0x00281a23, 0x000 },
9600 { 0x00000014, 0x00211a26, 0x000 },
9601 { 0x00000001, 0x00331a26, 0x000 },
9602 { 0x00000008, 0x00221a26, 0x000 },
9603 { 0x00000000, 0x00290cc7, 0x000 },
9604 { 0x00000027, 0x00203624, 0x000 },
9605 { 0x00007f00, 0x00281221, 0x000 },
9606 { 0x00001400, 0x002f0224, 0x000 },
9607 { 0x00000000, 0x0ce00000, 0x04b },
9608 { 0x00000001, 0x00290e23, 0x000 },
9609 { 0x0000000e, 0x00203623, 0x000 },
9610 { 0x0000e000, 0x00204411, 0x000 },
9611 { 0xfff80000, 0x00294a23, 0x000 },
9612 { 0x00000000, 0x003a2c02, 0x000 },
9613 { 0x00000002, 0x00220e2b, 0x000 },
9614 { 0xfc000000, 0x00280e23, 0x000 },
9615 { 0x0000000f, 0x00203623, 0x000 },
9616 { 0x00001fff, 0x00294a23, 0x000 },
9617 { 0x00000027, 0x00204a2d, 0x000 },
9618 { 0x00000000, 0x00204811, 0x000 },
9619 { 0x00000029, 0x00200e2d, 0x000 },
9620 { 0x060a0200, 0x00294a23, 0x000 },
9621 { 0x00000000, 0x00204811, 0x000 },
9622 { 0x00000000, 0x00204811, 0x000 },
9623 { 0x00000001, 0x00210222, 0x000 },
9624 { 0x00000000, 0x14e00000, 0x061 },
9625 { 0x00000000, 0x2ee00000, 0x05f },
9626 { 0x00000000, 0x2ce00000, 0x05e },
9627 { 0x00000000, 0x00400e2d, 0x062 },
9628 { 0x00000001, 0x00400e2d, 0x062 },
9629 { 0x0000000a, 0x00200e2d, 0x000 },
9630 { 0x0000000b, 0x0040122d, 0x06a },
9631 { 0x00000000, 0xc0200c00, 0x000 },
9632 { 0x003ffffc, 0x00281223, 0x000 },
9633 { 0x00000002, 0x00221224, 0x000 },
9634 { 0x7fc00000, 0x00281623, 0x000 },
9635 { 0x00000014, 0x00211625, 0x000 },
9636 { 0x00000001, 0x00331625, 0x000 },
9637 { 0x80000000, 0x00280e23, 0x000 },
9638 { 0x00000000, 0x00290ca3, 0x000 },
9639 { 0x3ffffc00, 0x00290e23, 0x000 },
9640 { 0x0000001f, 0x00211e23, 0x000 },
9641 { 0x00000000, 0x14e00000, 0x06d },
9642 { 0x00000100, 0x00401c11, 0x070 },
9643 { 0x0000000d, 0x00201e2d, 0x000 },
9644 { 0x000000f0, 0x00281e27, 0x000 },
9645 { 0x00000004, 0x00221e27, 0x000 },
9646 { 0x81000000, 0x00204411, 0x000 },
9647 { 0x0000000d, 0x00204811, 0x000 },
9648 { 0xfffff0ff, 0x00281a30, 0x000 },
9649 { 0x0000a028, 0x00204411, 0x000 },
9650 { 0x00000000, 0x002948e6, 0x000 },
9651 { 0x0000a018, 0x00204411, 0x000 },
9652 { 0x3fffffff, 0x00284a23, 0x000 },
9653 { 0x0000a010, 0x00204411, 0x000 },
9654 { 0x00000000, 0x00204804, 0x000 },
9655 { 0x00000030, 0x0020162d, 0x000 },
9656 { 0x00000002, 0x00291625, 0x000 },
9657 { 0x00000030, 0x00203625, 0x000 },
9658 { 0x00000025, 0x0020162d, 0x000 },
9659 { 0x00000000, 0x002f00a3, 0x000 },
9660 { 0x00000000, 0x0cc00000, 0x083 },
9661 { 0x00000026, 0x0020162d, 0x000 },
9662 { 0x00000000, 0x002f00a4, 0x000 },
9663 { 0x00000000, 0x0cc00000, 0x084 },
9664 { 0x00000000, 0x00400000, 0x08a },
9665 { 0x00000025, 0x00203623, 0x000 },
9666 { 0x00000026, 0x00203624, 0x000 },
9667 { 0x00000017, 0x00201e2d, 0x000 },
9668 { 0x00000002, 0x00210227, 0x000 },
9669 { 0x00000000, 0x14e00000, 0x08a },
9670 { 0x00000000, 0x00600000, 0x665 },
9671 { 0x00000000, 0x00600000, 0x659 },
9672 { 0x00000002, 0x00210e22, 0x000 },
9673 { 0x00000000, 0x14c00000, 0x08d },
9674 { 0x00000012, 0xc0403620, 0x093 },
9675 { 0x00000000, 0x2ee00000, 0x091 },
9676 { 0x00000000, 0x2ce00000, 0x090 },
9677 { 0x00000002, 0x00400e2d, 0x092 },
9678 { 0x00000003, 0x00400e2d, 0x092 },
9679 { 0x0000000c, 0x00200e2d, 0x000 },
9680 { 0x00000012, 0x00203623, 0x000 },
9681 { 0x00000003, 0x00210e22, 0x000 },
9682 { 0x00000000, 0x14c00000, 0x098 },
9683 { 0x0000a00c, 0x00204411, 0x000 },
9684 { 0x00000000, 0xc0204800, 0x000 },
9685 { 0x00000000, 0xc0404800, 0x0a0 },
9686 { 0x0000a00c, 0x00204411, 0x000 },
9687 { 0x00000000, 0x00204811, 0x000 },
9688 { 0x00000000, 0x2ee00000, 0x09e },
9689 { 0x00000000, 0x2ce00000, 0x09d },
9690 { 0x00000002, 0x00400e2d, 0x09f },
9691 { 0x00000003, 0x00400e2d, 0x09f },
9692 { 0x0000000c, 0x00200e2d, 0x000 },
9693 { 0x00000000, 0x00204803, 0x000 },
9694 { 0x00000000, 0x003a0c02, 0x000 },
9695 { 0x003f0000, 0x00280e23, 0x000 },
9696 { 0x00000010, 0x00210e23, 0x000 },
9697 { 0x00000011, 0x00203623, 0x000 },
9698 { 0x0000001e, 0x0021022b, 0x000 },
9699 { 0x00000000, 0x14c00000, 0x0a7 },
9700 { 0x00000016, 0xc0203620, 0x000 },
9701 { 0x0000001f, 0x0021022b, 0x000 },
9702 { 0x00000000, 0x14c00000, 0x0aa },
9703 { 0x00000015, 0xc0203620, 0x000 },
9704 { 0x00000008, 0x00210e2b, 0x000 },
9705 { 0x0000007f, 0x00280e23, 0x000 },
9706 { 0x00000000, 0x002f0223, 0x000 },
9707 { 0x00000000, 0x0ce00000, 0x0e1 },
9708 { 0x00000000, 0x27000000, 0x000 },
9709 { 0x00000000, 0x00600000, 0x2a3 },
9710 { 0x00000001, 0x002f0223, 0x000 },
9711 { 0x00000000, 0x0ae00000, 0x0b3 },
9712 { 0x00000000, 0x00600000, 0x13a },
9713 { 0x81000000, 0x00204411, 0x000 },
9714 { 0x00000006, 0x00204811, 0x000 },
9715 { 0x0000000c, 0x00221e30, 0x000 },
9716 { 0x99800000, 0x00204411, 0x000 },
9717 { 0x00000004, 0x0020122d, 0x000 },
9718 { 0x00000008, 0x00221224, 0x000 },
9719 { 0x00000010, 0x00201811, 0x000 },
9720 { 0x00000000, 0x00291ce4, 0x000 },
9721 { 0x00000000, 0x00604807, 0x12f },
9722 { 0x9b000000, 0x00204411, 0x000 },
9723 { 0x00000000, 0x00204802, 0x000 },
9724 { 0x9c000000, 0x00204411, 0x000 },
9725 { 0x00000000, 0x0033146f, 0x000 },
9726 { 0x00000001, 0x00333e23, 0x000 },
9727 { 0x00000000, 0xd9004800, 0x000 },
9728 { 0x00000000, 0x00203c05, 0x000 },
9729 { 0x81000000, 0x00204411, 0x000 },
9730 { 0x0000000e, 0x00204811, 0x000 },
9731 { 0x00000000, 0x00201010, 0x000 },
9732 { 0x0000e007, 0x00204411, 0x000 },
9733 { 0x0000000f, 0x0021022b, 0x000 },
9734 { 0x00000000, 0x14c00000, 0x0cb },
9735 { 0x00f8ff08, 0x00204811, 0x000 },
9736 { 0x98000000, 0x00404811, 0x0dc },
9737 { 0x000000f0, 0x00280e22, 0x000 },
9738 { 0x000000a0, 0x002f0223, 0x000 },
9739 { 0x00000000, 0x0cc00000, 0x0da },
9740 { 0x00000011, 0x00200e2d, 0x000 },
9741 { 0x00000001, 0x002f0223, 0x000 },
9742 { 0x00000000, 0x0ce00000, 0x0d5 },
9743 { 0x00000002, 0x002f0223, 0x000 },
9744 { 0x00000000, 0x0ce00000, 0x0d4 },
9745 { 0x00003f00, 0x00400c11, 0x0d6 },
9746 { 0x00001f00, 0x00400c11, 0x0d6 },
9747 { 0x00000f00, 0x00200c11, 0x000 },
9748 { 0x00380009, 0x00294a23, 0x000 },
9749 { 0x3f000000, 0x00280e2b, 0x000 },
9750 { 0x00000002, 0x00220e23, 0x000 },
9751 { 0x00000007, 0x00494a23, 0x0dc },
9752 { 0x00380f09, 0x00204811, 0x000 },
9753 { 0x68000007, 0x00204811, 0x000 },
9754 { 0x00000008, 0x00214a27, 0x000 },
9755 { 0x00000000, 0x00204811, 0x000 },
9756 { 0x060a0200, 0x00294a24, 0x000 },
9757 { 0x00000000, 0x00204811, 0x000 },
9758 { 0x00000000, 0x00204811, 0x000 },
9759 { 0x0000a202, 0x00204411, 0x000 },
9760 { 0x00ff0000, 0x00280e22, 0x000 },
9761 { 0x00000080, 0x00294a23, 0x000 },
9762 { 0x00000027, 0x00200e2d, 0x000 },
9763 { 0x00000026, 0x0020122d, 0x000 },
9764 { 0x00000000, 0x002f0083, 0x000 },
9765 { 0x00000000, 0x0ce00000, 0x0ea },
9766 { 0x00000000, 0x00600000, 0x65f },
9767 { 0x00000000, 0x00400000, 0x0eb },
9768 { 0x00000000, 0x00600000, 0x662 },
9769 { 0x00000007, 0x0020222d, 0x000 },
9770 { 0x00000005, 0x00220e22, 0x000 },
9771 { 0x00100000, 0x00280e23, 0x000 },
9772 { 0x00000000, 0x00292068, 0x000 },
9773 { 0x00000000, 0x003a0c02, 0x000 },
9774 { 0x000000ef, 0x00280e23, 0x000 },
9775 { 0x00000000, 0x00292068, 0x000 },
9776 { 0x00000017, 0x00200e2d, 0x000 },
9777 { 0x00000003, 0x00210223, 0x000 },
9778 { 0x00000000, 0x14e00000, 0x0f8 },
9779 { 0x0000000b, 0x00210228, 0x000 },
9780 { 0x00000000, 0x14c00000, 0x0f8 },
9781 { 0x00000400, 0x00292228, 0x000 },
9782 { 0x00000014, 0x00203628, 0x000 },
9783 { 0x0000001c, 0x00210e22, 0x000 },
9784 { 0x00000000, 0x14c00000, 0x0fd },
9785 { 0x0000a30c, 0x00204411, 0x000 },
9786 { 0x00000000, 0x00204811, 0x000 },
9787 { 0x0000001e, 0x00210e22, 0x000 },
9788 { 0x00000000, 0x14c00000, 0x10b },
9789 { 0x0000a30f, 0x00204411, 0x000 },
9790 { 0x00000011, 0x00200e2d, 0x000 },
9791 { 0x00000001, 0x002f0223, 0x000 },
9792 { 0x00000000, 0x0cc00000, 0x104 },
9793 { 0xffffffff, 0x00404811, 0x10b },
9794 { 0x00000002, 0x002f0223, 0x000 },
9795 { 0x00000000, 0x0cc00000, 0x107 },
9796 { 0x0000ffff, 0x00404811, 0x10b },
9797 { 0x00000004, 0x002f0223, 0x000 },
9798 { 0x00000000, 0x0cc00000, 0x10a },
9799 { 0x000000ff, 0x00404811, 0x10b },
9800 { 0x00000001, 0x00204811, 0x000 },
9801 { 0x0002c400, 0x00204411, 0x000 },
9802 { 0x0000001f, 0x00210e22, 0x000 },
9803 { 0x00000000, 0x14c00000, 0x112 },
9804 { 0x00000010, 0x40210e20, 0x000 },
9805 { 0x00000013, 0x00203623, 0x000 },
9806 { 0x00000018, 0x40224a20, 0x000 },
9807 { 0x00000010, 0xc0424a20, 0x114 },
9808 { 0x00000000, 0x00200c11, 0x000 },
9809 { 0x00000013, 0x00203623, 0x000 },
9810 { 0x00000000, 0x00204811, 0x000 },
9811 { 0x00000000, 0x00204811, 0x000 },
9812 { 0x0000000a, 0x00201011, 0x000 },
9813 { 0x00000000, 0x002f0224, 0x000 },
9814 { 0x00000000, 0x0ce00000, 0x11b },
9815 { 0x00000000, 0x00204811, 0x000 },
9816 { 0x00000001, 0x00531224, 0x117 },
9817 { 0xffbfffff, 0x00283a2e, 0x000 },
9818 { 0x0000001b, 0x00210222, 0x000 },
9819 { 0x00000000, 0x14c00000, 0x12e },
9820 { 0x81000000, 0x00204411, 0x000 },
9821 { 0x0000000d, 0x00204811, 0x000 },
9822 { 0x00000018, 0x00220e30, 0x000 },
9823 { 0xfc000000, 0x00280e23, 0x000 },
9824 { 0x81000000, 0x00204411, 0x000 },
9825 { 0x0000000e, 0x00204811, 0x000 },
9826 { 0x00000000, 0x00201010, 0x000 },
9827 { 0x0000e00e, 0x00204411, 0x000 },
9828 { 0x07f8ff08, 0x00204811, 0x000 },
9829 { 0x00000000, 0x00294a23, 0x000 },
9830 { 0x0000001c, 0x00201e2d, 0x000 },
9831 { 0x00000008, 0x00214a27, 0x000 },
9832 { 0x00000000, 0x00204811, 0x000 },
9833 { 0x060a0200, 0x00294a24, 0x000 },
9834 { 0x00000000, 0x00204811, 0x000 },
9835 { 0x00000000, 0x00204811, 0x000 },
9836 { 0x00000000, 0x00800000, 0x000 },
9837 { 0x81000000, 0x00204411, 0x000 },
9838 { 0x00000001, 0x00204811, 0x000 },
9839 { 0x0000217c, 0x00204411, 0x000 },
9840 { 0x00800000, 0x00204811, 0x000 },
9841 { 0x00000000, 0x00204806, 0x000 },
9842 { 0x00000008, 0x00214a27, 0x000 },
9843 { 0x00000000, 0x17000000, 0x000 },
9844 { 0x0004217f, 0x00604411, 0x68a },
9845 { 0x0000001f, 0x00210230, 0x000 },
9846 { 0x00000000, 0x14c00000, 0x689 },
9847 { 0x00000004, 0x00404c11, 0x135 },
9848 { 0x81000000, 0x00204411, 0x000 },
9849 { 0x00000001, 0x00204811, 0x000 },
9850 { 0x000021f8, 0x00204411, 0x000 },
9851 { 0x0000001c, 0x00204811, 0x000 },
9852 { 0x000421f9, 0x00604411, 0x68a },
9853 { 0x00000011, 0x00210230, 0x000 },
9854 { 0x00000000, 0x14e00000, 0x13c },
9855 { 0x00000000, 0x00800000, 0x000 },
9856 { 0x00000000, 0x00600000, 0x00b },
9857 { 0x00000000, 0x00600411, 0x315 },
9858 { 0x00000000, 0x00200411, 0x000 },
9859 { 0x00000000, 0x00600811, 0x1b2 },
9860 { 0x00000000, 0x00600000, 0x160 },
9861 { 0x0000ffff, 0x40280e20, 0x000 },
9862 { 0x00000010, 0xc0211220, 0x000 },
9863 { 0x0000ffff, 0x40280620, 0x000 },
9864 { 0x00000010, 0xc0210a20, 0x000 },
9865 { 0x00000000, 0x00341461, 0x000 },
9866 { 0x00000000, 0x00741882, 0x2bb },
9867 { 0x0001a1fd, 0x00604411, 0x2e0 },
9868 { 0x00003fff, 0x002f022f, 0x000 },
9869 { 0x00000000, 0x0cc00000, 0x147 },
9870 { 0x00000000, 0xc0400400, 0x001 },
9871 { 0x00000000, 0x00600000, 0x00b },
9872 { 0x00000000, 0x00600411, 0x315 },
9873 { 0x00000000, 0x00200411, 0x000 },
9874 { 0x00000000, 0x00600811, 0x1b2 },
9875 { 0x00003fff, 0x002f022f, 0x000 },
9876 { 0x00000000, 0x0ce00000, 0x000 },
9877 { 0x00000000, 0x00600000, 0x160 },
9878 { 0x00000010, 0x40210e20, 0x000 },
9879 { 0x0000ffff, 0xc0281220, 0x000 },
9880 { 0x00000010, 0x40211620, 0x000 },
9881 { 0x0000ffff, 0xc0681a20, 0x2bb },
9882 { 0x0001a1fd, 0x00604411, 0x2e0 },
9883 { 0x00003fff, 0x002f022f, 0x000 },
9884 { 0x00000000, 0x0cc00000, 0x158 },
9885 { 0x00000000, 0xc0400400, 0x001 },
9886 { 0x0000225c, 0x00204411, 0x000 },
9887 { 0x00000001, 0x00300a2f, 0x000 },
9888 { 0x00000001, 0x00210a22, 0x000 },
9889 { 0x00000003, 0x00384a22, 0x000 },
9890 { 0x00002256, 0x00204411, 0x000 },
9891 { 0x0000001a, 0x00204811, 0x000 },
9892 { 0x0000a1fc, 0x00204411, 0x000 },
9893 { 0x00000001, 0x00804811, 0x000 },
9894 { 0x00000000, 0x00600000, 0x00b },
9895 { 0x00000000, 0x00600000, 0x18f },
9896 { 0x00000000, 0x00600000, 0x1a0 },
9897 { 0x00003fff, 0x002f022f, 0x000 },
9898 { 0x00000000, 0x0ce00000, 0x000 },
9899 { 0x00000000, 0x00202c08, 0x000 },
9900 { 0x00000000, 0x00202411, 0x000 },
9901 { 0x00000000, 0x00202811, 0x000 },
9902 { 0x00002256, 0x00204411, 0x000 },
9903 { 0x00000016, 0x00204811, 0x000 },
9904 { 0x0000225c, 0x00204411, 0x000 },
9905 { 0x00000003, 0x00204811, 0x000 },
9906 { 0x93800000, 0x00204411, 0x000 },
9907 { 0x00000002, 0x00221e29, 0x000 },
9908 { 0x00000000, 0x007048eb, 0x19c },
9909 { 0x00000000, 0x00600000, 0x2bb },
9910 { 0x00000001, 0x40330620, 0x000 },
9911 { 0x00000000, 0xc0302409, 0x000 },
9912 { 0x00003fff, 0x002f022f, 0x000 },
9913 { 0x00000000, 0x0ce00000, 0x000 },
9914 { 0x00000000, 0x00600000, 0x2a3 },
9915 { 0x00000000, 0x002f0221, 0x000 },
9916 { 0x00000000, 0x0ae00000, 0x181 },
9917 { 0x00000000, 0x00600000, 0x13a },
9918 { 0x00000000, 0x00400000, 0x186 },
9919 { 0x95000000, 0x00204411, 0x000 },
9920 { 0x00000000, 0x002f0221, 0x000 },
9921 { 0x00000000, 0x0ce00000, 0x186 },
9922 { 0x00000000, 0xc0204800, 0x000 },
9923 { 0x00000001, 0x00530621, 0x182 },
9924 { 0x92000000, 0x00204411, 0x000 },
9925 { 0x00000000, 0xc0604800, 0x197 },
9926 { 0x0001a1fd, 0x00204411, 0x000 },
9927 { 0x00000011, 0x0020062d, 0x000 },
9928 { 0x00000000, 0x0078042a, 0x2fb },
9929 { 0x00000000, 0x00202809, 0x000 },
9930 { 0x00003fff, 0x002f022f, 0x000 },
9931 { 0x00000000, 0x0cc00000, 0x174 },
9932 { 0x00000000, 0xc0400400, 0x001 },
9933 { 0x00000210, 0x00600411, 0x315 },
9934 { 0x00003fff, 0x002f022f, 0x000 },
9935 { 0x00000000, 0x0ce00000, 0x194 },
9936 { 0x00000015, 0xc0203620, 0x000 },
9937 { 0x00000016, 0xc0203620, 0x000 },
9938 { 0x3f800000, 0x00200411, 0x000 },
9939 { 0x46000000, 0x00600811, 0x1b2 },
9940 { 0x00000000, 0x00800000, 0x000 },
9941 { 0x0000a1fc, 0x00204411, 0x000 },
9942 { 0x00003fff, 0x002f022f, 0x000 },
9943 { 0x00000000, 0x0cc00000, 0x19b },
9944 { 0x00000001, 0x00804811, 0x000 },
9945 { 0x00000021, 0x00804811, 0x000 },
9946 { 0x0000ffff, 0x40280e20, 0x000 },
9947 { 0x00000010, 0xc0211220, 0x000 },
9948 { 0x0000ffff, 0x40281620, 0x000 },
9949 { 0x00000010, 0xc0811a20, 0x000 },
9950 { 0x81000000, 0x00204411, 0x000 },
9951 { 0x00000006, 0x00204811, 0x000 },
9952 { 0x00000008, 0x00221e30, 0x000 },
9953 { 0x00000029, 0x00201a2d, 0x000 },
9954 { 0x0000e000, 0x00204411, 0x000 },
9955 { 0xfffbff09, 0x00204811, 0x000 },
9956 { 0x0000000f, 0x0020222d, 0x000 },
9957 { 0x00001fff, 0x00294a28, 0x000 },
9958 { 0x00000006, 0x0020222d, 0x000 },
9959 { 0x00000000, 0x002920e8, 0x000 },
9960 { 0x00000000, 0x00204808, 0x000 },
9961 { 0x00000000, 0x00204811, 0x000 },
9962 { 0x060a0200, 0x00294a26, 0x000 },
9963 { 0x00000000, 0x00204811, 0x000 },
9964 { 0x00000000, 0x00204811, 0x000 },
9965 { 0x00000100, 0x00201811, 0x000 },
9966 { 0x00000008, 0x00621e28, 0x12f },
9967 { 0x00000008, 0x00822228, 0x000 },
9968 { 0x0002c000, 0x00204411, 0x000 },
9969 { 0x00000015, 0x00600e2d, 0x1bd },
9970 { 0x00000016, 0x00600e2d, 0x1bd },
9971 { 0x0000c008, 0x00204411, 0x000 },
9972 { 0x00000017, 0x00200e2d, 0x000 },
9973 { 0x00000000, 0x14c00000, 0x1b9 },
9974 { 0x00000000, 0x00200411, 0x000 },
9975 { 0x00000000, 0x00204801, 0x000 },
9976 { 0x39000000, 0x00204811, 0x000 },
9977 { 0x00000000, 0x00204811, 0x000 },
9978 { 0x00000000, 0x00804802, 0x000 },
9979 { 0x00000018, 0x00202e2d, 0x000 },
9980 { 0x00000000, 0x003b0d63, 0x000 },
9981 { 0x00000008, 0x00224a23, 0x000 },
9982 { 0x00000010, 0x00224a23, 0x000 },
9983 { 0x00000018, 0x00224a23, 0x000 },
9984 { 0x00000000, 0x00804803, 0x000 },
9985 { 0x00000000, 0x00600000, 0x00b },
9986 { 0x00001000, 0x00600411, 0x315 },
9987 { 0x00000000, 0x00200411, 0x000 },
9988 { 0x00000000, 0x00600811, 0x1b2 },
9989 { 0x00000007, 0x0021062f, 0x000 },
9990 { 0x00000013, 0x00200a2d, 0x000 },
9991 { 0x00000001, 0x00202c11, 0x000 },
9992 { 0x0000ffff, 0x40282220, 0x000 },
9993 { 0x0000000f, 0x00262228, 0x000 },
9994 { 0x00000010, 0x40212620, 0x000 },
9995 { 0x0000000f, 0x00262629, 0x000 },
9996 { 0x00000000, 0x00202802, 0x000 },
9997 { 0x00002256, 0x00204411, 0x000 },
9998 { 0x0000001b, 0x00204811, 0x000 },
9999 { 0x00000000, 0x002f0221, 0x000 },
10000 { 0x00000000, 0x0ce00000, 0x1e0 },
10001 { 0x0000225c, 0x00204411, 0x000 },
10002 { 0x00000081, 0x00204811, 0x000 },
10003 { 0x0000a1fc, 0x00204411, 0x000 },
10004 { 0x00000001, 0x00204811, 0x000 },
10005 { 0x00000080, 0x00201c11, 0x000 },
10006 { 0x00000000, 0x002f0227, 0x000 },
10007 { 0x00000000, 0x0ce00000, 0x1dc },
10008 { 0x00000000, 0x00600000, 0x1e9 },
10009 { 0x00000001, 0x00531e27, 0x1d8 },
10010 { 0x00000001, 0x00202c11, 0x000 },
10011 { 0x0000001f, 0x00280a22, 0x000 },
10012 { 0x0000001f, 0x00282a2a, 0x000 },
10013 { 0x00000001, 0x00530621, 0x1d1 },
10014 { 0x0000225c, 0x00204411, 0x000 },
10015 { 0x00000002, 0x00304a2f, 0x000 },
10016 { 0x0000a1fc, 0x00204411, 0x000 },
10017 { 0x00000001, 0x00204811, 0x000 },
10018 { 0x00000001, 0x00301e2f, 0x000 },
10019 { 0x00000000, 0x002f0227, 0x000 },
10020 { 0x00000000, 0x0ce00000, 0x000 },
10021 { 0x00000000, 0x00600000, 0x1e9 },
10022 { 0x00000001, 0x00531e27, 0x1e5 },
10023 { 0x0000ffff, 0x40280e20, 0x000 },
10024 { 0x0000000f, 0x00260e23, 0x000 },
10025 { 0x00000010, 0xc0211220, 0x000 },
10026 { 0x0000000f, 0x00261224, 0x000 },
10027 { 0x00000000, 0x00201411, 0x000 },
10028 { 0x00000000, 0x00601811, 0x2bb },
10029 { 0x0001a1fd, 0x00204411, 0x000 },
10030 { 0x00000000, 0x002f022b, 0x000 },
10031 { 0x00000000, 0x0ce00000, 0x1f8 },
10032 { 0x00000010, 0x00221628, 0x000 },
10033 { 0xffff0000, 0x00281625, 0x000 },
10034 { 0x0000ffff, 0x00281a29, 0x000 },
10035 { 0x00000000, 0x002948c5, 0x000 },
10036 { 0x00000000, 0x0020480a, 0x000 },
10037 { 0x00000000, 0x00202c11, 0x000 },
10038 { 0x00000010, 0x00221623, 0x000 },
10039 { 0xffff0000, 0x00281625, 0x000 },
10040 { 0x0000ffff, 0x00281a24, 0x000 },
10041 { 0x00000000, 0x002948c5, 0x000 },
10042 { 0x00000000, 0x00731503, 0x205 },
10043 { 0x00000000, 0x00201805, 0x000 },
10044 { 0x00000000, 0x00731524, 0x205 },
10045 { 0x00000000, 0x002d14c5, 0x000 },
10046 { 0x00000000, 0x003008a2, 0x000 },
10047 { 0x00000000, 0x00204802, 0x000 },
10048 { 0x00000000, 0x00202802, 0x000 },
10049 { 0x00000000, 0x00202003, 0x000 },
10050 { 0x00000000, 0x00802404, 0x000 },
10051 { 0x0000000f, 0x00210225, 0x000 },
10052 { 0x00000000, 0x14c00000, 0x689 },
10053 { 0x00000000, 0x002b1405, 0x000 },
10054 { 0x00000001, 0x00901625, 0x000 },
10055 { 0x00000000, 0x00600000, 0x00b },
10056 { 0x00000000, 0x00600411, 0x315 },
10057 { 0x00000000, 0x00200411, 0x000 },
10058 { 0x00000000, 0x00600811, 0x1b2 },
10059 { 0x00002256, 0x00204411, 0x000 },
10060 { 0x0000001a, 0x00294a22, 0x000 },
10061 { 0x00000000, 0xc0200000, 0x000 },
10062 { 0x00003fff, 0x002f022f, 0x000 },
10063 { 0x00000000, 0x0ce00000, 0x000 },
10064 { 0x00000000, 0xc0200400, 0x000 },
10065 { 0x0000225c, 0x00204411, 0x000 },
10066 { 0x00000003, 0x00384a21, 0x000 },
10067 { 0x0000a1fc, 0x00204411, 0x000 },
10068 { 0x00000001, 0x00204811, 0x000 },
10069 { 0x0000ffff, 0x40281220, 0x000 },
10070 { 0x00000010, 0xc0211a20, 0x000 },
10071 { 0x0000ffff, 0x40280e20, 0x000 },
10072 { 0x00000010, 0xc0211620, 0x000 },
10073 { 0x00000000, 0x00741465, 0x2bb },
10074 { 0x0001a1fd, 0x00604411, 0x2e0 },
10075 { 0x00000001, 0x00330621, 0x000 },
10076 { 0x00000000, 0x002f0221, 0x000 },
10077 { 0x00000000, 0x0cc00000, 0x219 },
10078 { 0x00003fff, 0x002f022f, 0x000 },
10079 { 0x00000000, 0x0cc00000, 0x212 },
10080 { 0x00000000, 0xc0400400, 0x001 },
10081 { 0x00000000, 0x00600000, 0x642 },
10082 { 0x00000000, 0x0040040f, 0x213 },
10083 { 0x00000000, 0x00600000, 0x62e },
10084 { 0x00000000, 0x00600000, 0x642 },
10085 { 0x00000210, 0x00600411, 0x315 },
10086 { 0x00000000, 0x00600000, 0x1a0 },
10087 { 0x00000000, 0x00600000, 0x19c },
10088 { 0x00000000, 0x00600000, 0x2bb },
10089 { 0x00000000, 0x00600000, 0x2a3 },
10090 { 0x93800000, 0x00204411, 0x000 },
10091 { 0x00000000, 0x00204808, 0x000 },
10092 { 0x00000000, 0x002f022f, 0x000 },
10093 { 0x00000000, 0x0ae00000, 0x232 },
10094 { 0x00000000, 0x00600000, 0x13a },
10095 { 0x00000000, 0x00400000, 0x236 },
10096 { 0x95000000, 0x00204411, 0x000 },
10097 { 0x00000000, 0x002f022f, 0x000 },
10098 { 0x00000000, 0x0ce00000, 0x236 },
10099 { 0x00000000, 0xc0404800, 0x233 },
10100 { 0x92000000, 0x00204411, 0x000 },
10101 { 0x00000000, 0xc0204800, 0x000 },
10102 { 0x00002256, 0x00204411, 0x000 },
10103 { 0x00000016, 0x00204811, 0x000 },
10104 { 0x0000225c, 0x00204411, 0x000 },
10105 { 0x00000003, 0x00204811, 0x000 },
10106 { 0x0000a1fc, 0x00204411, 0x000 },
10107 { 0x00000001, 0x00204811, 0x000 },
10108 { 0x0001a1fd, 0x00204411, 0x000 },
10109 { 0x00000000, 0x00600411, 0x2fb },
10110 { 0x00000000, 0xc0400400, 0x001 },
10111 { 0x00000000, 0x00600000, 0x62e },
10112 { 0x0000a00c, 0x00204411, 0x000 },
10113 { 0x00000000, 0xc0204800, 0x000 },
10114 { 0x00000000, 0xc0404800, 0x000 },
10115 { 0x00000000, 0x00600000, 0x00b },
10116 { 0x00000018, 0x40210a20, 0x000 },
10117 { 0x00000003, 0x002f0222, 0x000 },
10118 { 0x00000000, 0x0ae00000, 0x24c },
10119 { 0x00000014, 0x0020222d, 0x000 },
10120 { 0x00080101, 0x00292228, 0x000 },
10121 { 0x00000014, 0x00203628, 0x000 },
10122 { 0x0000a30c, 0x00204411, 0x000 },
10123 { 0x00000000, 0xc0204800, 0x000 },
10124 { 0x00000000, 0xc0204800, 0x000 },
10125 { 0x00000000, 0xc0404800, 0x251 },
10126 { 0x00000000, 0x00600000, 0x00b },
10127 { 0x00000010, 0x00600411, 0x315 },
10128 { 0x3f800000, 0x00200411, 0x000 },
10129 { 0x00000000, 0x00600811, 0x1b2 },
10130 { 0x0000225c, 0x00204411, 0x000 },
10131 { 0x00000003, 0x00204811, 0x000 },
10132 { 0x00000000, 0x00600000, 0x27c },
10133 { 0x00000017, 0x00201e2d, 0x000 },
10134 { 0x00000001, 0x00211e27, 0x000 },
10135 { 0x00000000, 0x14e00000, 0x26a },
10136 { 0x00000012, 0x00201e2d, 0x000 },
10137 { 0x0000ffff, 0x00281e27, 0x000 },
10138 { 0x00000000, 0x00341c27, 0x000 },
10139 { 0x00000000, 0x12c00000, 0x25f },
10140 { 0x00000000, 0x00201c11, 0x000 },
10141 { 0x00000000, 0x002f00e5, 0x000 },
10142 { 0x00000000, 0x08c00000, 0x262 },
10143 { 0x00000000, 0x00201407, 0x000 },
10144 { 0x00000012, 0x00201e2d, 0x000 },
10145 { 0x00000010, 0x00211e27, 0x000 },
10146 { 0x00000000, 0x00341c47, 0x000 },
10147 { 0x00000000, 0x12c00000, 0x267 },
10148 { 0x00000000, 0x00201c11, 0x000 },
10149 { 0x00000000, 0x002f00e6, 0x000 },
10150 { 0x00000000, 0x08c00000, 0x26a },
10151 { 0x00000000, 0x00201807, 0x000 },
10152 { 0x00000000, 0x00600000, 0x2c1 },
10153 { 0x00002256, 0x00204411, 0x000 },
10154 { 0x00000000, 0x00342023, 0x000 },
10155 { 0x00000000, 0x12c00000, 0x272 },
10156 { 0x00000000, 0x00342044, 0x000 },
10157 { 0x00000000, 0x12c00000, 0x271 },
10158 { 0x00000016, 0x00404811, 0x276 },
10159 { 0x00000018, 0x00404811, 0x276 },
10160 { 0x00000000, 0x00342044, 0x000 },
10161 { 0x00000000, 0x12c00000, 0x275 },
10162 { 0x00000017, 0x00404811, 0x276 },
10163 { 0x00000019, 0x00204811, 0x000 },
10164 { 0x0000a1fc, 0x00204411, 0x000 },
10165 { 0x00000001, 0x00204811, 0x000 },
10166 { 0x0001a1fd, 0x00604411, 0x2e9 },
10167 { 0x00003fff, 0x002f022f, 0x000 },
10168 { 0x00000000, 0x0cc00000, 0x256 },
10169 { 0x00000000, 0xc0400400, 0x001 },
10170 { 0x00000010, 0x40210620, 0x000 },
10171 { 0x0000ffff, 0xc0280a20, 0x000 },
10172 { 0x00000010, 0x40210e20, 0x000 },
10173 { 0x0000ffff, 0xc0281220, 0x000 },
10174 { 0x00000010, 0x40211620, 0x000 },
10175 { 0x0000ffff, 0xc0881a20, 0x000 },
10176 { 0x81000000, 0x00204411, 0x000 },
10177 { 0x00000001, 0x00204811, 0x000 },
10178 { 0x00042004, 0x00604411, 0x68a },
10179 { 0x00000000, 0x00600000, 0x62e },
10180 { 0x00000000, 0xc0600000, 0x2a3 },
10181 { 0x00000005, 0x00200a2d, 0x000 },
10182 { 0x00000008, 0x00220a22, 0x000 },
10183 { 0x0000002b, 0x00201a2d, 0x000 },
10184 { 0x0000001c, 0x00201e2d, 0x000 },
10185 { 0x00007000, 0x00281e27, 0x000 },
10186 { 0x00000000, 0x00311ce6, 0x000 },
10187 { 0x0000002a, 0x00201a2d, 0x000 },
10188 { 0x0000000c, 0x00221a26, 0x000 },
10189 { 0x00000000, 0x002f00e6, 0x000 },
10190 { 0x00000000, 0x06e00000, 0x292 },
10191 { 0x00000000, 0x00201c11, 0x000 },
10192 { 0x00000000, 0x00200c11, 0x000 },
10193 { 0x0000002b, 0x00203623, 0x000 },
10194 { 0x00000010, 0x00201811, 0x000 },
10195 { 0x00000000, 0x00691ce2, 0x12f },
10196 { 0x93800000, 0x00204411, 0x000 },
10197 { 0x00000000, 0x00204807, 0x000 },
10198 { 0x95000000, 0x00204411, 0x000 },
10199 { 0x00000000, 0x002f022f, 0x000 },
10200 { 0x00000000, 0x0ce00000, 0x29d },
10201 { 0x00000001, 0x00333e2f, 0x000 },
10202 { 0x00000000, 0xd9004800, 0x000 },
10203 { 0x92000000, 0x00204411, 0x000 },
10204 { 0x00000000, 0xc0204800, 0x000 },
10205 { 0x0000001c, 0x00403627, 0x000 },
10206 { 0x0000000c, 0xc0220a20, 0x000 },
10207 { 0x00000029, 0x00203622, 0x000 },
10208 { 0x00000028, 0xc0403620, 0x000 },
10209 { 0x0000a2a4, 0x00204411, 0x000 },
10210 { 0x00000009, 0x00204811, 0x000 },
10211 { 0xa1000000, 0x00204411, 0x000 },
10212 { 0x00000001, 0x00804811, 0x000 },
10213 { 0x00000021, 0x00201e2d, 0x000 },
10214 { 0x00000000, 0x002c1ce3, 0x000 },
10215 { 0x00000021, 0x00203627, 0x000 },
10216 { 0x00000022, 0x00201e2d, 0x000 },
10217 { 0x00000000, 0x002c1ce4, 0x000 },
10218 { 0x00000022, 0x00203627, 0x000 },
10219 { 0x00000023, 0x00201e2d, 0x000 },
10220 { 0x00000000, 0x003120a3, 0x000 },
10221 { 0x00000000, 0x002d1d07, 0x000 },
10222 { 0x00000023, 0x00203627, 0x000 },
10223 { 0x00000024, 0x00201e2d, 0x000 },
10224 { 0x00000000, 0x003120c4, 0x000 },
10225 { 0x00000000, 0x002d1d07, 0x000 },
10226 { 0x00000024, 0x00803627, 0x000 },
10227 { 0x00000021, 0x00203623, 0x000 },
10228 { 0x00000022, 0x00203624, 0x000 },
10229 { 0x00000000, 0x00311ca3, 0x000 },
10230 { 0x00000023, 0x00203627, 0x000 },
10231 { 0x00000000, 0x00311cc4, 0x000 },
10232 { 0x00000024, 0x00803627, 0x000 },
10233 { 0x0000001a, 0x00203627, 0x000 },
10234 { 0x0000001b, 0x00203628, 0x000 },
10235 { 0x00000017, 0x00201e2d, 0x000 },
10236 { 0x00000002, 0x00210227, 0x000 },
10237 { 0x00000000, 0x14c00000, 0x2dc },
10238 { 0x00000000, 0x00400000, 0x2d9 },
10239 { 0x0000001a, 0x00203627, 0x000 },
10240 { 0x0000001b, 0x00203628, 0x000 },
10241 { 0x00000017, 0x00201e2d, 0x000 },
10242 { 0x00000002, 0x00210227, 0x000 },
10243 { 0x00000000, 0x14e00000, 0x2d9 },
10244 { 0x00000003, 0x00210227, 0x000 },
10245 { 0x00000000, 0x14e00000, 0x2dc },
10246 { 0x00000023, 0x00201e2d, 0x000 },
10247 { 0x00000000, 0x002e00e1, 0x000 },
10248 { 0x00000000, 0x02c00000, 0x2dc },
10249 { 0x00000021, 0x00201e2d, 0x000 },
10250 { 0x00000000, 0x003120a1, 0x000 },
10251 { 0x00000000, 0x002e00e8, 0x000 },
10252 { 0x00000000, 0x06c00000, 0x2dc },
10253 { 0x00000024, 0x00201e2d, 0x000 },
10254 { 0x00000000, 0x002e00e2, 0x000 },
10255 { 0x00000000, 0x02c00000, 0x2dc },
10256 { 0x00000022, 0x00201e2d, 0x000 },
10257 { 0x00000000, 0x003120c2, 0x000 },
10258 { 0x00000000, 0x002e00e8, 0x000 },
10259 { 0x00000000, 0x06c00000, 0x2dc },
10260 { 0x00000000, 0x00600000, 0x665 },
10261 { 0x00000000, 0x00600000, 0x2b5 },
10262 { 0x00000000, 0x00400000, 0x2de },
10263 { 0x00000000, 0x00600000, 0x2b5 },
10264 { 0x00000000, 0x00600000, 0x65c },
10265 { 0x00000000, 0x00400000, 0x2de },
10266 { 0x00000000, 0x00600000, 0x2a7 },
10267 { 0x00000000, 0x00400000, 0x2de },
10268 { 0x0000001a, 0x00201e2d, 0x000 },
10269 { 0x0000001b, 0x0080222d, 0x000 },
10270 { 0x00000010, 0x00221e23, 0x000 },
10271 { 0x00000000, 0x00294887, 0x000 },
10272 { 0x00000000, 0x00311ca3, 0x000 },
10273 { 0x00000010, 0x00221e27, 0x000 },
10274 { 0x00000000, 0x00294887, 0x000 },
10275 { 0x00000010, 0x00221e23, 0x000 },
10276 { 0x00000000, 0x003120c4, 0x000 },
10277 { 0x0000ffff, 0x00282228, 0x000 },
10278 { 0x00000000, 0x00894907, 0x000 },
10279 { 0x00000010, 0x00221e23, 0x000 },
10280 { 0x00000000, 0x00294887, 0x000 },
10281 { 0x00000010, 0x00221e21, 0x000 },
10282 { 0x00000000, 0x00294847, 0x000 },
10283 { 0x00000000, 0x00311ca3, 0x000 },
10284 { 0x00000010, 0x00221e27, 0x000 },
10285 { 0x00000000, 0x00294887, 0x000 },
10286 { 0x00000000, 0x00311ca1, 0x000 },
10287 { 0x00000010, 0x00221e27, 0x000 },
10288 { 0x00000000, 0x00294847, 0x000 },
10289 { 0x00000010, 0x00221e23, 0x000 },
10290 { 0x00000000, 0x003120c4, 0x000 },
10291 { 0x0000ffff, 0x00282228, 0x000 },
10292 { 0x00000000, 0x00294907, 0x000 },
10293 { 0x00000010, 0x00221e21, 0x000 },
10294 { 0x00000000, 0x003120c2, 0x000 },
10295 { 0x0000ffff, 0x00282228, 0x000 },
10296 { 0x00000000, 0x00894907, 0x000 },
10297 { 0x00000010, 0x00221e23, 0x000 },
10298 { 0x00000000, 0x00294887, 0x000 },
10299 { 0x00000001, 0x00220a21, 0x000 },
10300 { 0x00000000, 0x003308a2, 0x000 },
10301 { 0x00000010, 0x00221e22, 0x000 },
10302 { 0x00000010, 0x00212222, 0x000 },
10303 { 0x00000000, 0x00294907, 0x000 },
10304 { 0x00000000, 0x00311ca3, 0x000 },
10305 { 0x00000010, 0x00221e27, 0x000 },
10306 { 0x00000000, 0x00294887, 0x000 },
10307 { 0x00000001, 0x00220a21, 0x000 },
10308 { 0x00000000, 0x003008a2, 0x000 },
10309 { 0x00000010, 0x00221e22, 0x000 },
10310 { 0x00000010, 0x00212222, 0x000 },
10311 { 0x00000000, 0x00294907, 0x000 },
10312 { 0x00000010, 0x00221e23, 0x000 },
10313 { 0x00000000, 0x003120c4, 0x000 },
10314 { 0x0000ffff, 0x00282228, 0x000 },
10315 { 0x00000000, 0x00294907, 0x000 },
10316 { 0x00000000, 0x003808c5, 0x000 },
10317 { 0x00000000, 0x00300841, 0x000 },
10318 { 0x00000001, 0x00220a22, 0x000 },
10319 { 0x00000000, 0x003308a2, 0x000 },
10320 { 0x00000010, 0x00221e22, 0x000 },
10321 { 0x00000010, 0x00212222, 0x000 },
10322 { 0x00000000, 0x00894907, 0x000 },
10323 { 0x00000017, 0x0020222d, 0x000 },
10324 { 0x00000000, 0x14c00000, 0x318 },
10325 { 0xffffffef, 0x00280621, 0x000 },
10326 { 0x00000014, 0x0020222d, 0x000 },
10327 { 0x0000f8e0, 0x00204411, 0x000 },
10328 { 0x00000000, 0x00294901, 0x000 },
10329 { 0x00000000, 0x00894901, 0x000 },
10330 { 0x00000000, 0x00204811, 0x000 },
10331 { 0x00000000, 0x00204811, 0x000 },
10332 { 0x060a0200, 0x00804811, 0x000 },
10333 { 0x00000000, 0xc0200000, 0x000 },
10334 { 0x97000000, 0xc0204411, 0x000 },
10335 { 0x00000000, 0xc0204811, 0x000 },
10336 { 0x8a000000, 0x00204411, 0x000 },
10337 { 0x00000000, 0x00204811, 0x000 },
10338 { 0x0000225c, 0x00204411, 0x000 },
10339 { 0x00000000, 0xc0204800, 0x000 },
10340 { 0x0000a1fc, 0x00204411, 0x000 },
10341 { 0x00000000, 0xc0204800, 0x000 },
10342 { 0x00000000, 0xc0200400, 0x000 },
10343 { 0x00000000, 0x00a0000a, 0x000 },
10344 { 0x97000000, 0x00204411, 0x000 },
10345 { 0x00000000, 0x00204811, 0x000 },
10346 { 0x8a000000, 0x00204411, 0x000 },
10347 { 0x00000000, 0x00204811, 0x000 },
10348 { 0x0000225c, 0x00204411, 0x000 },
10349 { 0x00000000, 0xc0204800, 0x000 },
10350 { 0x0000a1fc, 0x00204411, 0x000 },
10351 { 0x00000000, 0xc0204800, 0x000 },
10352 { 0x00000000, 0xc0200400, 0x000 },
10353 { 0x00000000, 0x00a0000a, 0x000 },
10354 { 0x97000000, 0x00204411, 0x000 },
10355 { 0x00000000, 0x00204811, 0x000 },
10356 { 0x8a000000, 0x00204411, 0x000 },
10357 { 0x00000000, 0x00204811, 0x000 },
10358 { 0x0000225c, 0x00204411, 0x000 },
10359 { 0x00000000, 0xc0204800, 0x000 },
10360 { 0x0000a1fc, 0x00204411, 0x000 },
10361 { 0x00000000, 0xc0204800, 0x000 },
10362 { 0x0001a1fd, 0x00204411, 0x000 },
10363 { 0x00000000, 0xd9004800, 0x000 },
10364 { 0x00000000, 0xc0200400, 0x000 },
10365 { 0x00000000, 0x00a0000a, 0x000 },
10366 { 0x00002257, 0x00204411, 0x000 },
10367 { 0x00000003, 0xc0484a20, 0x000 },
10368 { 0x0000225d, 0x00204411, 0x000 },
10369 { 0x00000000, 0xc0404800, 0x000 },
10370 { 0x00000000, 0x00600000, 0x642 },
10371 { 0x00000000, 0xc0200800, 0x000 },
10372 { 0x0000225c, 0x00204411, 0x000 },
10373 { 0x00000003, 0x00384a22, 0x000 },
10374 { 0x0000a1fc, 0x00204411, 0x000 },
10375 { 0x00000000, 0xc0204800, 0x000 },
10376 { 0x0001a1fd, 0x00204411, 0x000 },
10377 { 0x00000000, 0x002f0222, 0x000 },
10378 { 0x00000000, 0x0ce00000, 0x000 },
10379 { 0x00000000, 0x40204800, 0x000 },
10380 { 0x00000001, 0x40304a20, 0x000 },
10381 { 0x00000002, 0xc0304a20, 0x000 },
10382 { 0x00000001, 0x00530a22, 0x34b },
10383 { 0x0000003f, 0xc0280a20, 0x000 },
10384 { 0x81000000, 0x00204411, 0x000 },
10385 { 0x00000001, 0x00204811, 0x000 },
10386 { 0x000021f8, 0x00204411, 0x000 },
10387 { 0x00000018, 0x00204811, 0x000 },
10388 { 0x000421f9, 0x00604411, 0x68a },
10389 { 0x00000011, 0x00210230, 0x000 },
10390 { 0x00000000, 0x14e00000, 0x354 },
10391 { 0x00000014, 0x002f0222, 0x000 },
10392 { 0x00000000, 0x0cc00000, 0x364 },
10393 { 0x00002010, 0x00204411, 0x000 },
10394 { 0x00008000, 0x00204811, 0x000 },
10395 { 0x0001a2a4, 0x00204411, 0x000 },
10396 { 0x00000000, 0x00604802, 0x36e },
10397 { 0x00002100, 0x00204411, 0x000 },
10398 { 0x00000000, 0xc0204800, 0x000 },
10399 { 0x00000000, 0xc0204800, 0x000 },
10400 { 0x00000000, 0xc0204800, 0x000 },
10401 { 0x00000000, 0xc0404800, 0x000 },
10402 { 0x00000004, 0x002f0222, 0x000 },
10403 { 0x00000000, 0x0cc00000, 0x36a },
10404 { 0x00002010, 0x00204411, 0x000 },
10405 { 0x00008000, 0x00204811, 0x000 },
10406 { 0x0001a2a4, 0x00204411, 0x000 },
10407 { 0x00000000, 0x00404802, 0x35f },
10408 { 0x00000028, 0x002f0222, 0x000 },
10409 { 0x00000000, 0x0cc00000, 0x5bd },
10410 { 0x0001a2a4, 0x00204411, 0x000 },
10411 { 0x00000000, 0x00404802, 0x35f },
10412 { 0x0000002c, 0x00203626, 0x000 },
10413 { 0x00000049, 0x00201811, 0x000 },
10414 { 0x0000003f, 0x00204811, 0x000 },
10415 { 0x00000001, 0x00331a26, 0x000 },
10416 { 0x00000000, 0x002f0226, 0x000 },
10417 { 0x00000000, 0x0cc00000, 0x370 },
10418 { 0x0000002c, 0x00801a2d, 0x000 },
10419 { 0x0000003f, 0xc0280a20, 0x000 },
10420 { 0x00000015, 0x002f0222, 0x000 },
10421 { 0x00000000, 0x0ce00000, 0x386 },
10422 { 0x00000006, 0x002f0222, 0x000 },
10423 { 0x00000000, 0x0ce00000, 0x3b1 },
10424 { 0x00000016, 0x002f0222, 0x000 },
10425 { 0x00000000, 0x0ce00000, 0x3b5 },
10426 { 0x00000020, 0x002f0222, 0x000 },
10427 { 0x00000000, 0x0ce00000, 0x39c },
10428 { 0x0000000f, 0x002f0222, 0x000 },
10429 { 0x00000000, 0x0ce00000, 0x3a8 },
10430 { 0x00000010, 0x002f0222, 0x000 },
10431 { 0x00000000, 0x0ce00000, 0x3a8 },
10432 { 0x0000001e, 0x002f0222, 0x000 },
10433 { 0x00000000, 0x0ce00000, 0x390 },
10434 { 0x0000a2a4, 0x00204411, 0x000 },
10435 { 0x00000000, 0x00404802, 0x000 },
10436 { 0x08000000, 0x00290a22, 0x000 },
10437 { 0x00000003, 0x40210e20, 0x000 },
10438 { 0x0000000c, 0xc0211220, 0x000 },
10439 { 0x00080000, 0x00281224, 0x000 },
10440 { 0x00000014, 0xc0221620, 0x000 },
10441 { 0x00000000, 0x002914a4, 0x000 },
10442 { 0x0000a2a4, 0x00204411, 0x000 },
10443 { 0x00000000, 0x002948a2, 0x000 },
10444 { 0x0000a1fe, 0x00204411, 0x000 },
10445 { 0x00000000, 0x00404803, 0x000 },
10446 { 0x81000000, 0x00204411, 0x000 },
10447 { 0x00000001, 0x00204811, 0x000 },
10448 { 0x000021f8, 0x00204411, 0x000 },
10449 { 0x00000016, 0x00204811, 0x000 },
10450 { 0x000421f9, 0x00604411, 0x68a },
10451 { 0x00000015, 0x00210230, 0x000 },
10452 { 0x00000000, 0x14e00000, 0x392 },
10453 { 0x0000210e, 0x00204411, 0x000 },
10454 { 0x00000000, 0xc0204800, 0x000 },
10455 { 0x00000000, 0xc0204800, 0x000 },
10456 { 0x0000a2a4, 0x00204411, 0x000 },
10457 { 0x00000000, 0x00404802, 0x000 },
10458 { 0x81000000, 0x00204411, 0x000 },
10459 { 0x00000001, 0x00204811, 0x000 },
10460 { 0x000021f8, 0x00204411, 0x000 },
10461 { 0x00000017, 0x00204811, 0x000 },
10462 { 0x000421f9, 0x00604411, 0x68a },
10463 { 0x00000003, 0x00210230, 0x000 },
10464 { 0x00000000, 0x14e00000, 0x39e },
10465 { 0x00002108, 0x00204411, 0x000 },
10466 { 0x00000000, 0xc0204800, 0x000 },
10467 { 0x00000000, 0xc0204800, 0x000 },
10468 { 0x0000a2a4, 0x00204411, 0x000 },
10469 { 0x00000000, 0x00404802, 0x000 },
10470 { 0x0000a2a4, 0x00204411, 0x000 },
10471 { 0x00000000, 0x00204802, 0x000 },
10472 { 0x80000000, 0x00204411, 0x000 },
10473 { 0x00000000, 0x00204811, 0x000 },
10474 { 0x81000000, 0x00204411, 0x000 },
10475 { 0x00000010, 0x00204811, 0x000 },
10476 { 0x00000000, 0x00200010, 0x000 },
10477 { 0x00000000, 0x14c00000, 0x3ae },
10478 { 0x00000000, 0x00400000, 0x000 },
10479 { 0x00002010, 0x00204411, 0x000 },
10480 { 0x00008000, 0x00204811, 0x000 },
10481 { 0x0001a2a4, 0x00204411, 0x000 },
10482 { 0x00000006, 0x00404811, 0x000 },
10483 { 0x00002010, 0x00204411, 0x000 },
10484 { 0x00008000, 0x00204811, 0x000 },
10485 { 0x0001a2a4, 0x00204411, 0x000 },
10486 { 0x00000016, 0x00604811, 0x36e },
10487 { 0x00000000, 0x00400000, 0x000 },
10488 { 0x00000000, 0xc0200800, 0x000 },
10489 { 0x00000000, 0xc0200c00, 0x000 },
10490 { 0x0000001d, 0x00210223, 0x000 },
10491 { 0x00000000, 0x14e00000, 0x3ce },
10492 { 0x81000000, 0x00204411, 0x000 },
10493 { 0x00000001, 0x00204811, 0x000 },
10494 { 0x000021f8, 0x00204411, 0x000 },
10495 { 0x00000018, 0x00204811, 0x000 },
10496 { 0x000421f9, 0x00604411, 0x68a },
10497 { 0x00000011, 0x00210230, 0x000 },
10498 { 0x00000000, 0x14e00000, 0x3c0 },
10499 { 0x00002100, 0x00204411, 0x000 },
10500 { 0x00000000, 0x00204802, 0x000 },
10501 { 0x00000000, 0x00204803, 0x000 },
10502 { 0xbabecafe, 0x00204811, 0x000 },
10503 { 0xcafebabe, 0x00204811, 0x000 },
10504 { 0x00002010, 0x00204411, 0x000 },
10505 { 0x00008000, 0x00204811, 0x000 },
10506 { 0x0000a2a4, 0x00204411, 0x000 },
10507 { 0x00000004, 0x00404811, 0x000 },
10508 { 0x00002170, 0x00204411, 0x000 },
10509 { 0x00000000, 0x00204802, 0x000 },
10510 { 0x00000000, 0x00204803, 0x000 },
10511 { 0x81000000, 0x00204411, 0x000 },
10512 { 0x0000000a, 0x00204811, 0x000 },
10513 { 0x00000000, 0x00200010, 0x000 },
10514 { 0x00000000, 0x14c00000, 0x3d3 },
10515 { 0x8c000000, 0x00204411, 0x000 },
10516 { 0xcafebabe, 0x00404811, 0x000 },
10517 { 0x81000000, 0x00204411, 0x000 },
10518 { 0x00000001, 0x00204811, 0x000 },
10519 { 0x00003fff, 0x40280a20, 0x000 },
10520 { 0x80000000, 0x40280e20, 0x000 },
10521 { 0x40000000, 0xc0281220, 0x000 },
10522 { 0x00040000, 0x00694622, 0x68a },
10523 { 0x00000000, 0x00201410, 0x000 },
10524 { 0x00000000, 0x002f0223, 0x000 },
10525 { 0x00000000, 0x0cc00000, 0x3e1 },
10526 { 0x00000000, 0xc0401800, 0x3e4 },
10527 { 0x00003fff, 0xc0281a20, 0x000 },
10528 { 0x00040000, 0x00694626, 0x68a },
10529 { 0x00000000, 0x00201810, 0x000 },
10530 { 0x00000000, 0x002f0224, 0x000 },
10531 { 0x00000000, 0x0cc00000, 0x3e7 },
10532 { 0x00000000, 0xc0401c00, 0x3ea },
10533 { 0x00003fff, 0xc0281e20, 0x000 },
10534 { 0x00040000, 0x00694627, 0x68a },
10535 { 0x00000000, 0x00201c10, 0x000 },
10536 { 0x00000000, 0x00204402, 0x000 },
10537 { 0x00000000, 0x002820c5, 0x000 },
10538 { 0x00000000, 0x004948e8, 0x000 },
10539 { 0xa5800000, 0x00200811, 0x000 },
10540 { 0x00002000, 0x00200c11, 0x000 },
10541 { 0x83000000, 0x00604411, 0x412 },
10542 { 0x00000000, 0x00204402, 0x000 },
10543 { 0x00000000, 0xc0204800, 0x000 },
10544 { 0x00000000, 0x40204800, 0x000 },
10545 { 0x0000001f, 0xc0210220, 0x000 },
10546 { 0x00000000, 0x14c00000, 0x3f7 },
10547 { 0x00002010, 0x00204411, 0x000 },
10548 { 0x00008000, 0x00204811, 0x000 },
10549 { 0x0000ffff, 0xc0481220, 0x3ff },
10550 { 0xa7800000, 0x00200811, 0x000 },
10551 { 0x0000a000, 0x00200c11, 0x000 },
10552 { 0x83000000, 0x00604411, 0x412 },
10553 { 0x00000000, 0x00204402, 0x000 },
10554 { 0x00000000, 0xc0204800, 0x000 },
10555 { 0x00000000, 0xc0204800, 0x000 },
10556 { 0x0000ffff, 0xc0281220, 0x000 },
10557 { 0x83000000, 0x00204411, 0x000 },
10558 { 0x00000000, 0x00304883, 0x000 },
10559 { 0x84000000, 0x00204411, 0x000 },
10560 { 0x00000000, 0xc0204800, 0x000 },
10561 { 0x00000000, 0x1d000000, 0x000 },
10562 { 0x83000000, 0x00604411, 0x412 },
10563 { 0x00000000, 0xc0400400, 0x001 },
10564 { 0xa9800000, 0x00200811, 0x000 },
10565 { 0x0000c000, 0x00400c11, 0x3fa },
10566 { 0xab800000, 0x00200811, 0x000 },
10567 { 0x0000f8e0, 0x00400c11, 0x3fa },
10568 { 0xad800000, 0x00200811, 0x000 },
10569 { 0x0000f880, 0x00400c11, 0x3fa },
10570 { 0xb3800000, 0x00200811, 0x000 },
10571 { 0x0000f3fc, 0x00400c11, 0x3fa },
10572 { 0xaf800000, 0x00200811, 0x000 },
10573 { 0x0000e000, 0x00400c11, 0x3fa },
10574 { 0xb1800000, 0x00200811, 0x000 },
10575 { 0x0000f000, 0x00400c11, 0x3fa },
10576 { 0x83000000, 0x00204411, 0x000 },
10577 { 0x00002148, 0x00204811, 0x000 },
10578 { 0x84000000, 0x00204411, 0x000 },
10579 { 0x00000000, 0xc0204800, 0x000 },
10580 { 0x00000000, 0x1d000000, 0x000 },
10581 { 0x00000000, 0x00800000, 0x000 },
10582 { 0x01182000, 0xc0304620, 0x000 },
10583 { 0x00000000, 0xd9004800, 0x000 },
10584 { 0x00000000, 0xc0200400, 0x000 },
10585 { 0x00000000, 0x00a0000a, 0x000 },
10586 { 0x0218a000, 0xc0304620, 0x000 },
10587 { 0x00000000, 0xd9004800, 0x000 },
10588 { 0x00000000, 0xc0200400, 0x000 },
10589 { 0x00000000, 0x00a0000a, 0x000 },
10590 { 0x0318c000, 0xc0304620, 0x000 },
10591 { 0x00000000, 0xd9004800, 0x000 },
10592 { 0x00000000, 0xc0200400, 0x000 },
10593 { 0x00000000, 0x00a0000a, 0x000 },
10594 { 0x0418f8e0, 0xc0304620, 0x000 },
10595 { 0x00000000, 0xd9004800, 0x000 },
10596 { 0x00000000, 0xc0200400, 0x000 },
10597 { 0x00000000, 0x00a0000a, 0x000 },
10598 { 0x0518f880, 0xc0304620, 0x000 },
10599 { 0x00000000, 0xd9004800, 0x000 },
10600 { 0x00000000, 0xc0200400, 0x000 },
10601 { 0x00000000, 0x00a0000a, 0x000 },
10602 { 0x0618e000, 0xc0304620, 0x000 },
10603 { 0x00000000, 0xd9004800, 0x000 },
10604 { 0x00000000, 0xc0200400, 0x000 },
10605 { 0x00000000, 0x00a0000a, 0x000 },
10606 { 0x0718f000, 0xc0304620, 0x000 },
10607 { 0x00000000, 0xd9004800, 0x000 },
10608 { 0x00000000, 0xc0200400, 0x000 },
10609 { 0x00000000, 0x00a0000a, 0x000 },
10610 { 0x0818f3fc, 0xc0304620, 0x000 },
10611 { 0x00000000, 0xd9004800, 0x000 },
10612 { 0x00000000, 0xc0200400, 0x000 },
10613 { 0x00000000, 0x00a0000a, 0x000 },
10614 { 0x00000030, 0x00200a2d, 0x000 },
10615 { 0x00000000, 0xc0290c40, 0x000 },
10616 { 0x00000030, 0x00203623, 0x000 },
10617 { 0x00000000, 0xc0200400, 0x000 },
10618 { 0x00000000, 0x00a0000a, 0x000 },
10619 { 0x86000000, 0x00204411, 0x000 },
10620 { 0x00000000, 0x00404801, 0x000 },
10621 { 0x85000000, 0xc0204411, 0x000 },
10622 { 0x00000000, 0x00404801, 0x000 },
10623 { 0x0000217c, 0x00204411, 0x000 },
10624 { 0x00000000, 0xc0204800, 0x000 },
10625 { 0x00000000, 0xc0204800, 0x000 },
10626 { 0x00000000, 0xc0204800, 0x000 },
10627 { 0x81000000, 0x00204411, 0x000 },
10628 { 0x00000001, 0x00204811, 0x000 },
10629 { 0x00000000, 0xc0200800, 0x000 },
10630 { 0x00000000, 0x17000000, 0x000 },
10631 { 0x0004217f, 0x00604411, 0x68a },
10632 { 0x0000001f, 0x00210230, 0x000 },
10633 { 0x00000000, 0x14c00000, 0x000 },
10634 { 0x00000000, 0x00404c02, 0x448 },
10635 { 0x00000000, 0xc0200c00, 0x000 },
10636 { 0x00000000, 0xc0201000, 0x000 },
10637 { 0x00000000, 0xc0201400, 0x000 },
10638 { 0x00000000, 0xc0201800, 0x000 },
10639 { 0x00000000, 0xc0201c00, 0x000 },
10640 { 0x00007f00, 0x00280a21, 0x000 },
10641 { 0x00004500, 0x002f0222, 0x000 },
10642 { 0x00000000, 0x0ce00000, 0x456 },
10643 { 0x00000000, 0xc0202000, 0x000 },
10644 { 0x00000000, 0x17000000, 0x000 },
10645 { 0x00000010, 0x00280a23, 0x000 },
10646 { 0x00000010, 0x002f0222, 0x000 },
10647 { 0x00000000, 0x0ce00000, 0x45e },
10648 { 0x81000000, 0x00204411, 0x000 },
10649 { 0x00000001, 0x00204811, 0x000 },
10650 { 0x00040000, 0x00694624, 0x68a },
10651 { 0x00000000, 0x00400000, 0x463 },
10652 { 0x81000000, 0x00204411, 0x000 },
10653 { 0x00000000, 0x00204811, 0x000 },
10654 { 0x0000216d, 0x00204411, 0x000 },
10655 { 0x00000000, 0x00204804, 0x000 },
10656 { 0x00000000, 0x00604805, 0x68f },
10657 { 0x00000000, 0x002824f0, 0x000 },
10658 { 0x00000007, 0x00280a23, 0x000 },
10659 { 0x00000001, 0x002f0222, 0x000 },
10660 { 0x00000000, 0x0ae00000, 0x46a },
10661 { 0x00000000, 0x002f00c9, 0x000 },
10662 { 0x00000000, 0x04e00000, 0x483 },
10663 { 0x00000000, 0x00400000, 0x490 },
10664 { 0x00000002, 0x002f0222, 0x000 },
10665 { 0x00000000, 0x0ae00000, 0x46f },
10666 { 0x00000000, 0x002f00c9, 0x000 },
10667 { 0x00000000, 0x02e00000, 0x483 },
10668 { 0x00000000, 0x00400000, 0x490 },
10669 { 0x00000003, 0x002f0222, 0x000 },
10670 { 0x00000000, 0x0ae00000, 0x474 },
10671 { 0x00000000, 0x002f00c9, 0x000 },
10672 { 0x00000000, 0x0ce00000, 0x483 },
10673 { 0x00000000, 0x00400000, 0x490 },
10674 { 0x00000004, 0x002f0222, 0x000 },
10675 { 0x00000000, 0x0ae00000, 0x479 },
10676 { 0x00000000, 0x002f00c9, 0x000 },
10677 { 0x00000000, 0x0ae00000, 0x483 },
10678 { 0x00000000, 0x00400000, 0x490 },
10679 { 0x00000005, 0x002f0222, 0x000 },
10680 { 0x00000000, 0x0ae00000, 0x47e },
10681 { 0x00000000, 0x002f00c9, 0x000 },
10682 { 0x00000000, 0x06e00000, 0x483 },
10683 { 0x00000000, 0x00400000, 0x490 },
10684 { 0x00000006, 0x002f0222, 0x000 },
10685 { 0x00000000, 0x0ae00000, 0x483 },
10686 { 0x00000000, 0x002f00c9, 0x000 },
10687 { 0x00000000, 0x08e00000, 0x483 },
10688 { 0x00000000, 0x00400000, 0x490 },
10689 { 0x00007f00, 0x00280a21, 0x000 },
10690 { 0x00004500, 0x002f0222, 0x000 },
10691 { 0x00000000, 0x0ae00000, 0x000 },
10692 { 0x00000008, 0x00210a23, 0x000 },
10693 { 0x00000000, 0x14c00000, 0x48d },
10694 { 0x00002169, 0x00204411, 0x000 },
10695 { 0x00000000, 0xc0204800, 0x000 },
10696 { 0x00000000, 0xc0204800, 0x000 },
10697 { 0x00000000, 0xc0204800, 0x000 },
10698 { 0xcafebabe, 0x00404811, 0x000 },
10699 { 0x00000000, 0xc0204400, 0x000 },
10700 { 0x00000000, 0xc0200000, 0x000 },
10701 { 0x00000000, 0xc0404800, 0x000 },
10702 { 0x00007f00, 0x00280a21, 0x000 },
10703 { 0x00004500, 0x002f0222, 0x000 },
10704 { 0x00000000, 0x0ae00000, 0x496 },
10705 { 0x00000000, 0xc0200000, 0x000 },
10706 { 0x00000000, 0xc0200000, 0x000 },
10707 { 0x00000000, 0xc0400000, 0x000 },
10708 { 0x00000000, 0x00404c08, 0x456 },
10709 { 0x00000000, 0xc0200800, 0x000 },
10710 { 0x00000010, 0x40210e20, 0x000 },
10711 { 0x00000011, 0x40211220, 0x000 },
10712 { 0x00000012, 0x40211620, 0x000 },
10713 { 0x00002169, 0x00204411, 0x000 },
10714 { 0x00000000, 0x00204802, 0x000 },
10715 { 0x00000000, 0x00210225, 0x000 },
10716 { 0x00000000, 0x14e00000, 0x4a0 },
10717 { 0x00040000, 0xc0494a20, 0x4a1 },
10718 { 0xfffbffff, 0xc0284a20, 0x000 },
10719 { 0x00000000, 0x00210223, 0x000 },
10720 { 0x00000000, 0x14e00000, 0x4ad },
10721 { 0x00000000, 0xc0204800, 0x000 },
10722 { 0x00000000, 0xc0204800, 0x000 },
10723 { 0x00000000, 0x00210224, 0x000 },
10724 { 0x00000000, 0x14c00000, 0x000 },
10725 { 0x81000000, 0x00204411, 0x000 },
10726 { 0x0000000c, 0x00204811, 0x000 },
10727 { 0x00000000, 0x00200010, 0x000 },
10728 { 0x00000000, 0x14c00000, 0x4a9 },
10729 { 0xa0000000, 0x00204411, 0x000 },
10730 { 0xcafebabe, 0x00404811, 0x000 },
10731 { 0x81000000, 0x00204411, 0x000 },
10732 { 0x00000004, 0x00204811, 0x000 },
10733 { 0x0000216b, 0x00204411, 0x000 },
10734 { 0x00000000, 0xc0204810, 0x000 },
10735 { 0x81000000, 0x00204411, 0x000 },
10736 { 0x00000005, 0x00204811, 0x000 },
10737 { 0x0000216c, 0x00204411, 0x000 },
10738 { 0x00000000, 0xc0204810, 0x000 },
10739 { 0x00000000, 0x002f0224, 0x000 },
10740 { 0x00000000, 0x0ce00000, 0x000 },
10741 { 0x00000000, 0x00400000, 0x4a7 },
10742 { 0x00000000, 0xc0210a20, 0x000 },
10743 { 0x00000000, 0x14c00000, 0x4c0 },
10744 { 0x81000000, 0x00204411, 0x000 },
10745 { 0x00000000, 0x00204811, 0x000 },
10746 { 0x0000216d, 0x00204411, 0x000 },
10747 { 0x00000000, 0xc0204800, 0x000 },
10748 { 0x00000000, 0xc0604800, 0x68f },
10749 { 0x00000000, 0x00400000, 0x4c4 },
10750 { 0x81000000, 0x00204411, 0x000 },
10751 { 0x00000001, 0x00204811, 0x000 },
10752 { 0x00040000, 0xc0294620, 0x000 },
10753 { 0x00000000, 0xc0600000, 0x68a },
10754 { 0x00000001, 0x00210222, 0x000 },
10755 { 0x00000000, 0x14c00000, 0x4cb },
10756 { 0x00002169, 0x00204411, 0x000 },
10757 { 0x00000000, 0xc0204800, 0x000 },
10758 { 0x00000000, 0xc0204800, 0x000 },
10759 { 0x00000000, 0x00204810, 0x000 },
10760 { 0xcafebabe, 0x00404811, 0x000 },
10761 { 0x00000000, 0xc0204400, 0x000 },
10762 { 0x00000000, 0xc0404810, 0x000 },
10763 { 0x81000000, 0x00204411, 0x000 },
10764 { 0x00000001, 0x00204811, 0x000 },
10765 { 0x000021f8, 0x00204411, 0x000 },
10766 { 0x0000000e, 0x00204811, 0x000 },
10767 { 0x000421f9, 0x00604411, 0x68a },
10768 { 0x00000000, 0x00210230, 0x000 },
10769 { 0x00000000, 0x14c00000, 0x4cd },
10770 { 0x00002180, 0x00204411, 0x000 },
10771 { 0x00000000, 0xc0204800, 0x000 },
10772 { 0x00000000, 0xc0200000, 0x000 },
10773 { 0x00000000, 0xc0204800, 0x000 },
10774 { 0x00000000, 0xc0200000, 0x000 },
10775 { 0x00000000, 0xc0404800, 0x000 },
10776 { 0x00000003, 0x00333e2f, 0x000 },
10777 { 0x00000001, 0x00210221, 0x000 },
10778 { 0x00000000, 0x14e00000, 0x4fd },
10779 { 0x0000002c, 0x00200a2d, 0x000 },
10780 { 0x00040000, 0x18e00c11, 0x4ec },
10781 { 0x00000001, 0x00333e2f, 0x000 },
10782 { 0x00002169, 0x00204411, 0x000 },
10783 { 0x00000000, 0x00204802, 0x000 },
10784 { 0x00000000, 0x00204803, 0x000 },
10785 { 0x00000008, 0x00300a22, 0x000 },
10786 { 0x00000000, 0xc0204800, 0x000 },
10787 { 0x00000000, 0xc0204800, 0x000 },
10788 { 0x00002169, 0x00204411, 0x000 },
10789 { 0x00000000, 0x00204802, 0x000 },
10790 { 0x00000000, 0x00204803, 0x000 },
10791 { 0x00000008, 0x00300a22, 0x000 },
10792 { 0x00000000, 0xc0204800, 0x000 },
10793 { 0x00000000, 0xd8c04800, 0x4e0 },
10794 { 0x00002169, 0x00204411, 0x000 },
10795 { 0x00000000, 0x00204802, 0x000 },
10796 { 0x00000000, 0x00204803, 0x000 },
10797 { 0x00000008, 0x00300a22, 0x000 },
10798 { 0x00000000, 0xc0204800, 0x000 },
10799 { 0x00000000, 0xc0204800, 0x000 },
10800 { 0x0000002d, 0x0020122d, 0x000 },
10801 { 0x00000000, 0x00290c83, 0x000 },
10802 { 0x00002169, 0x00204411, 0x000 },
10803 { 0x00000000, 0x00204802, 0x000 },
10804 { 0x00000000, 0x00204803, 0x000 },
10805 { 0x00000008, 0x00300a22, 0x000 },
10806 { 0x00000000, 0xc0204800, 0x000 },
10807 { 0x00000000, 0xc0204800, 0x000 },
10808 { 0x00000011, 0x00210224, 0x000 },
10809 { 0x00000000, 0x14c00000, 0x000 },
10810 { 0x00000000, 0x00400000, 0x4a7 },
10811 { 0x0000002c, 0xc0203620, 0x000 },
10812 { 0x0000002d, 0xc0403620, 0x000 },
10813 { 0x0000000f, 0x00210221, 0x000 },
10814 { 0x00000000, 0x14c00000, 0x502 },
10815 { 0x00000000, 0x00600000, 0x00b },
10816 { 0x00000000, 0xd9000000, 0x000 },
10817 { 0x00000000, 0xc0400400, 0x001 },
10818 { 0xb5000000, 0x00204411, 0x000 },
10819 { 0x00002000, 0x00204811, 0x000 },
10820 { 0xb6000000, 0x00204411, 0x000 },
10821 { 0x0000a000, 0x00204811, 0x000 },
10822 { 0xb7000000, 0x00204411, 0x000 },
10823 { 0x0000c000, 0x00204811, 0x000 },
10824 { 0xb8000000, 0x00204411, 0x000 },
10825 { 0x0000f8e0, 0x00204811, 0x000 },
10826 { 0xb9000000, 0x00204411, 0x000 },
10827 { 0x0000f880, 0x00204811, 0x000 },
10828 { 0xba000000, 0x00204411, 0x000 },
10829 { 0x0000e000, 0x00204811, 0x000 },
10830 { 0xbb000000, 0x00204411, 0x000 },
10831 { 0x0000f000, 0x00204811, 0x000 },
10832 { 0xbc000000, 0x00204411, 0x000 },
10833 { 0x0000f3fc, 0x00204811, 0x000 },
10834 { 0x81000000, 0x00204411, 0x000 },
10835 { 0x00000002, 0x00204811, 0x000 },
10836 { 0x000000ff, 0x00280e30, 0x000 },
10837 { 0x00000000, 0x002f0223, 0x000 },
10838 { 0x00000000, 0x0cc00000, 0x516 },
10839 { 0x00000000, 0xc0200800, 0x000 },
10840 { 0x00000000, 0x14c00000, 0x52b },
10841 { 0x00000000, 0x00200c11, 0x000 },
10842 { 0x0000001c, 0x00203623, 0x000 },
10843 { 0x0000002b, 0x00203623, 0x000 },
10844 { 0x00000029, 0x00203623, 0x000 },
10845 { 0x00000028, 0x00203623, 0x000 },
10846 { 0x00000017, 0x00203623, 0x000 },
10847 { 0x00000025, 0x00203623, 0x000 },
10848 { 0x00000026, 0x00203623, 0x000 },
10849 { 0x00000015, 0x00203623, 0x000 },
10850 { 0x00000016, 0x00203623, 0x000 },
10851 { 0xffffe000, 0x00200c11, 0x000 },
10852 { 0x00000021, 0x00203623, 0x000 },
10853 { 0x00000022, 0x00203623, 0x000 },
10854 { 0x00001fff, 0x00200c11, 0x000 },
10855 { 0x00000023, 0x00203623, 0x000 },
10856 { 0x00000024, 0x00203623, 0x000 },
10857 { 0xf1ffffff, 0x00283a2e, 0x000 },
10858 { 0x0000001a, 0xc0220e20, 0x000 },
10859 { 0x00000000, 0x0029386e, 0x000 },
10860 { 0x81000000, 0x00204411, 0x000 },
10861 { 0x00000006, 0x00204811, 0x000 },
10862 { 0x0000002a, 0x40203620, 0x000 },
10863 { 0x87000000, 0x00204411, 0x000 },
10864 { 0x00000000, 0xc0204800, 0x000 },
10865 { 0x0000a1f4, 0x00204411, 0x000 },
10866 { 0x00000000, 0x00204810, 0x000 },
10867 { 0x00000000, 0x00200c11, 0x000 },
10868 { 0x00000030, 0x00203623, 0x000 },
10869 { 0x9d000000, 0x00204411, 0x000 },
10870 { 0x0000001f, 0x40214a20, 0x000 },
10871 { 0x96000000, 0x00204411, 0x000 },
10872 { 0x00000000, 0xc0204800, 0x000 },
10873 { 0x00000000, 0xc0200c00, 0x000 },
10874 { 0x00000000, 0xc0201000, 0x000 },
10875 { 0x0000001f, 0x00211624, 0x000 },
10876 { 0x00000000, 0x14c00000, 0x000 },
10877 { 0x0000001d, 0x00203623, 0x000 },
10878 { 0x00000003, 0x00281e23, 0x000 },
10879 { 0x00000008, 0x00222223, 0x000 },
10880 { 0xfffff000, 0x00282228, 0x000 },
10881 { 0x00000000, 0x002920e8, 0x000 },
10882 { 0x0000001f, 0x00203628, 0x000 },
10883 { 0x00000018, 0x00211e23, 0x000 },
10884 { 0x00000020, 0x00203627, 0x000 },
10885 { 0x00000002, 0x00221624, 0x000 },
10886 { 0x00000000, 0x003014a8, 0x000 },
10887 { 0x0000001e, 0x00203625, 0x000 },
10888 { 0x00000003, 0x00211a24, 0x000 },
10889 { 0x10000000, 0x00281a26, 0x000 },
10890 { 0xefffffff, 0x00283a2e, 0x000 },
10891 { 0x00000000, 0x004938ce, 0x678 },
10892 { 0x00000001, 0x40280a20, 0x000 },
10893 { 0x00000006, 0x40280e20, 0x000 },
10894 { 0x00000300, 0xc0281220, 0x000 },
10895 { 0x00000008, 0x00211224, 0x000 },
10896 { 0x00000000, 0xc0201620, 0x000 },
10897 { 0x00000000, 0xc0201a20, 0x000 },
10898 { 0x00000000, 0x00210222, 0x000 },
10899 { 0x00000000, 0x14c00000, 0x563 },
10900 { 0x81000000, 0x00204411, 0x000 },
10901 { 0x00000001, 0x00204811, 0x000 },
10902 { 0x00002258, 0x00300a24, 0x000 },
10903 { 0x00040000, 0x00694622, 0x68a },
10904 { 0x00002169, 0x00204411, 0x000 },
10905 { 0x00000000, 0x00204805, 0x000 },
10906 { 0x00020000, 0x00294a26, 0x000 },
10907 { 0x00000000, 0x00204810, 0x000 },
10908 { 0xcafebabe, 0x00204811, 0x000 },
10909 { 0x00000002, 0x002f0223, 0x000 },
10910 { 0x00000000, 0x0cc00000, 0x56b },
10911 { 0x00000000, 0xc0201c10, 0x000 },
10912 { 0x00000000, 0xc0400000, 0x579 },
10913 { 0x00000002, 0x002f0223, 0x000 },
10914 { 0x00000000, 0x0cc00000, 0x56b },
10915 { 0x81000000, 0x00204411, 0x000 },
10916 { 0x00000001, 0x00204811, 0x000 },
10917 { 0x00002258, 0x00300a24, 0x000 },
10918 { 0x00040000, 0x00694622, 0x68a },
10919 { 0x00000000, 0xc0201c10, 0x000 },
10920 { 0x00000000, 0xc0400000, 0x579 },
10921 { 0x00000000, 0x002f0223, 0x000 },
10922 { 0x00000000, 0x0cc00000, 0x56f },
10923 { 0x00000000, 0xc0201c00, 0x000 },
10924 { 0x00000000, 0xc0400000, 0x579 },
10925 { 0x00000004, 0x002f0223, 0x000 },
10926 { 0x00000000, 0x0cc00000, 0x577 },
10927 { 0x81000000, 0x00204411, 0x000 },
10928 { 0x00000000, 0x00204811, 0x000 },
10929 { 0x0000216d, 0x00204411, 0x000 },
10930 { 0x00000000, 0xc0204800, 0x000 },
10931 { 0x00000000, 0xc0604800, 0x68f },
10932 { 0x00000000, 0x00401c10, 0x579 },
10933 { 0x00000000, 0xc0200000, 0x000 },
10934 { 0x00000000, 0xc0400000, 0x000 },
10935 { 0x00000000, 0x0ee00000, 0x57b },
10936 { 0x00000000, 0x00600000, 0x5c6 },
10937 { 0x00000000, 0x002f0224, 0x000 },
10938 { 0x00000000, 0x0cc00000, 0x58c },
10939 { 0x0000a2b7, 0x00204411, 0x000 },
10940 { 0x00000000, 0x00204807, 0x000 },
10941 { 0x81000000, 0x00204411, 0x000 },
10942 { 0x00000001, 0x00204811, 0x000 },
10943 { 0x0004a2b6, 0x00604411, 0x68a },
10944 { 0x0000001a, 0x00212230, 0x000 },
10945 { 0x00000006, 0x00222630, 0x000 },
10946 { 0x00042004, 0x00604411, 0x68a },
10947 { 0x0000a2c4, 0x00204411, 0x000 },
10948 { 0x00000000, 0x003048e9, 0x000 },
10949 { 0x00000000, 0x00e00000, 0x58a },
10950 { 0x0000a2d1, 0x00204411, 0x000 },
10951 { 0x00000000, 0x00404808, 0x000 },
10952 { 0x0000a2d1, 0x00204411, 0x000 },
10953 { 0x00000001, 0x00504a28, 0x000 },
10954 { 0x00000001, 0x002f0224, 0x000 },
10955 { 0x00000000, 0x0cc00000, 0x59d },
10956 { 0x0000a2bb, 0x00204411, 0x000 },
10957 { 0x00000000, 0x00204807, 0x000 },
10958 { 0x81000000, 0x00204411, 0x000 },
10959 { 0x00000001, 0x00204811, 0x000 },
10960 { 0x0004a2ba, 0x00604411, 0x68a },
10961 { 0x0000001a, 0x00212230, 0x000 },
10962 { 0x00000006, 0x00222630, 0x000 },
10963 { 0x00042004, 0x00604411, 0x68a },
10964 { 0x0000a2c5, 0x00204411, 0x000 },
10965 { 0x00000000, 0x003048e9, 0x000 },
10966 { 0x00000000, 0x00e00000, 0x59b },
10967 { 0x0000a2d2, 0x00204411, 0x000 },
10968 { 0x00000000, 0x00404808, 0x000 },
10969 { 0x0000a2d2, 0x00204411, 0x000 },
10970 { 0x00000001, 0x00504a28, 0x000 },
10971 { 0x00000002, 0x002f0224, 0x000 },
10972 { 0x00000000, 0x0cc00000, 0x5ae },
10973 { 0x0000a2bf, 0x00204411, 0x000 },
10974 { 0x00000000, 0x00204807, 0x000 },
10975 { 0x81000000, 0x00204411, 0x000 },
10976 { 0x00000001, 0x00204811, 0x000 },
10977 { 0x0004a2be, 0x00604411, 0x68a },
10978 { 0x0000001a, 0x00212230, 0x000 },
10979 { 0x00000006, 0x00222630, 0x000 },
10980 { 0x00042004, 0x00604411, 0x68a },
10981 { 0x0000a2c6, 0x00204411, 0x000 },
10982 { 0x00000000, 0x003048e9, 0x000 },
10983 { 0x00000000, 0x00e00000, 0x5ac },
10984 { 0x0000a2d3, 0x00204411, 0x000 },
10985 { 0x00000000, 0x00404808, 0x000 },
10986 { 0x0000a2d3, 0x00204411, 0x000 },
10987 { 0x00000001, 0x00504a28, 0x000 },
10988 { 0x0000a2c3, 0x00204411, 0x000 },
10989 { 0x00000000, 0x00204807, 0x000 },
10990 { 0x81000000, 0x00204411, 0x000 },
10991 { 0x00000001, 0x00204811, 0x000 },
10992 { 0x0004a2c2, 0x00604411, 0x68a },
10993 { 0x0000001a, 0x00212230, 0x000 },
10994 { 0x00000006, 0x00222630, 0x000 },
10995 { 0x00042004, 0x00604411, 0x68a },
10996 { 0x0000a2c7, 0x00204411, 0x000 },
10997 { 0x00000000, 0x003048e9, 0x000 },
10998 { 0x00000000, 0x00e00000, 0x5bb },
10999 { 0x0000a2d4, 0x00204411, 0x000 },
11000 { 0x00000000, 0x00404808, 0x000 },
11001 { 0x0000a2d4, 0x00204411, 0x000 },
11002 { 0x00000001, 0x00504a28, 0x000 },
11003 { 0x85000000, 0x00204411, 0x000 },
11004 { 0x00000000, 0x00204801, 0x000 },
11005 { 0x0000304a, 0x00204411, 0x000 },
11006 { 0x01000000, 0x00204811, 0x000 },
11007 { 0x00000000, 0x00400000, 0x5c1 },
11008 { 0xa4000000, 0xc0204411, 0x000 },
11009 { 0x00000000, 0xc0404800, 0x000 },
11010 { 0x00000000, 0xc0600000, 0x5c6 },
11011 { 0x00000000, 0xc0400400, 0x001 },
11012 { 0x0000002c, 0x00203621, 0x000 },
11013 { 0x81000000, 0x00204411, 0x000 },
11014 { 0x00000006, 0x00204811, 0x000 },
11015 { 0x00000000, 0x002f0230, 0x000 },
11016 { 0x00000000, 0x0cc00000, 0x5cd },
11017 { 0x00000000, 0x00200411, 0x000 },
11018 { 0x00000030, 0x00403621, 0x5e0 },
11019 { 0x00000030, 0x0020062d, 0x000 },
11020 { 0x00007e00, 0x00280621, 0x000 },
11021 { 0x00000000, 0x002f0221, 0x000 },
11022 { 0x00000000, 0x0ce00000, 0x5e0 },
11023 { 0x81000000, 0x00204411, 0x000 },
11024 { 0x00000001, 0x00204811, 0x000 },
11025 { 0x0004a092, 0x00604411, 0x68a },
11026 { 0x00000031, 0x00203630, 0x000 },
11027 { 0x0004a093, 0x00604411, 0x68a },
11028 { 0x00000032, 0x00203630, 0x000 },
11029 { 0x0004a2b6, 0x00604411, 0x68a },
11030 { 0x00000033, 0x00203630, 0x000 },
11031 { 0x0004a2ba, 0x00604411, 0x68a },
11032 { 0x00000034, 0x00203630, 0x000 },
11033 { 0x0004a2be, 0x00604411, 0x68a },
11034 { 0x00000035, 0x00203630, 0x000 },
11035 { 0x0004a2c2, 0x00604411, 0x68a },
11036 { 0x00000036, 0x00203630, 0x000 },
11037 { 0x00042004, 0x00604411, 0x68a },
11038 { 0x0001a2a4, 0x00204411, 0x000 },
11039 { 0x0000003f, 0x00204811, 0x000 },
11040 { 0x0000003f, 0x00204811, 0x000 },
11041 { 0x0000003f, 0x00204811, 0x000 },
11042 { 0x0000003f, 0x00204811, 0x000 },
11043 { 0x00000005, 0x00204811, 0x000 },
11044 { 0x0000a1f4, 0x00204411, 0x000 },
11045 { 0x00000000, 0x00204811, 0x000 },
11046 { 0x88000000, 0x00204411, 0x000 },
11047 { 0x00000001, 0x00204811, 0x000 },
11048 { 0x81000000, 0x00204411, 0x000 },
11049 { 0x00000006, 0x00204811, 0x000 },
11050 { 0x00000001, 0x002f0230, 0x000 },
11051 { 0x00000000, 0x0ce00000, 0x629 },
11052 { 0x00000030, 0x0020062d, 0x000 },
11053 { 0x00000000, 0x002f0221, 0x000 },
11054 { 0x00000000, 0x0ce00000, 0x629 },
11055 { 0x81000000, 0x00204411, 0x000 },
11056 { 0x00000001, 0x00204811, 0x000 },
11057 { 0x00007e00, 0x00280621, 0x000 },
11058 { 0x00000000, 0x002f0221, 0x000 },
11059 { 0x00000000, 0x0ce00000, 0x602 },
11060 { 0x0000a092, 0x00204411, 0x000 },
11061 { 0x00000031, 0x00204a2d, 0x000 },
11062 { 0x0000a093, 0x00204411, 0x000 },
11063 { 0x00000032, 0x00204a2d, 0x000 },
11064 { 0x0000a2b6, 0x00204411, 0x000 },
11065 { 0x00000033, 0x00204a2d, 0x000 },
11066 { 0x0000a2ba, 0x00204411, 0x000 },
11067 { 0x00000034, 0x00204a2d, 0x000 },
11068 { 0x0000a2be, 0x00204411, 0x000 },
11069 { 0x00000035, 0x00204a2d, 0x000 },
11070 { 0x0000a2c2, 0x00204411, 0x000 },
11071 { 0x00000036, 0x00204a2d, 0x000 },
11072 { 0x00000030, 0x0020062d, 0x000 },
11073 { 0x000001ff, 0x00280621, 0x000 },
11074 { 0x00000000, 0x002f0221, 0x000 },
11075 { 0x00000000, 0x0ce00000, 0x628 },
11076 { 0x00000000, 0x00210221, 0x000 },
11077 { 0x00000000, 0x14c00000, 0x60b },
11078 { 0x0004a003, 0x00604411, 0x68a },
11079 { 0x0000a003, 0x00204411, 0x000 },
11080 { 0x00000000, 0x00204810, 0x000 },
11081 { 0x00000001, 0x00210621, 0x000 },
11082 { 0x00000000, 0x14c00000, 0x610 },
11083 { 0x0004a010, 0x00604411, 0x68a },
11084 { 0x0000a010, 0x00204411, 0x000 },
11085 { 0x00000000, 0x00204810, 0x000 },
11086 { 0x00000001, 0x00210621, 0x000 },
11087 { 0x00000000, 0x002f0221, 0x000 },
11088 { 0x00000000, 0x0ce00000, 0x628 },
11089 { 0x0004a011, 0x00604411, 0x68a },
11090 { 0x0000a011, 0x00204411, 0x000 },
11091 { 0x00000000, 0x00204810, 0x000 },
11092 { 0x0004a012, 0x00604411, 0x68a },
11093 { 0x0000a012, 0x00204411, 0x000 },
11094 { 0x00000000, 0x00204810, 0x000 },
11095 { 0x0004a013, 0x00604411, 0x68a },
11096 { 0x0000a013, 0x00204411, 0x000 },
11097 { 0x00000000, 0x00204810, 0x000 },
11098 { 0x0004a014, 0x00604411, 0x68a },
11099 { 0x0000a014, 0x00204411, 0x000 },
11100 { 0x00000000, 0x00204810, 0x000 },
11101 { 0x0004a015, 0x00604411, 0x68a },
11102 { 0x0000a015, 0x00204411, 0x000 },
11103 { 0x00000000, 0x00204810, 0x000 },
11104 { 0x0004a016, 0x00604411, 0x68a },
11105 { 0x0000a016, 0x00204411, 0x000 },
11106 { 0x00000000, 0x00204810, 0x000 },
11107 { 0x0004a017, 0x00604411, 0x68a },
11108 { 0x0000a017, 0x00204411, 0x000 },
11109 { 0x00000000, 0x00204810, 0x000 },
11110 { 0x00042004, 0x00604411, 0x68a },
11111 { 0x0000002c, 0x0080062d, 0x000 },
11112 { 0xff000000, 0x00204411, 0x000 },
11113 { 0x00000000, 0x00204811, 0x000 },
11114 { 0x00000001, 0x00204811, 0x000 },
11115 { 0x00000002, 0x00804811, 0x000 },
11116 { 0x00000000, 0x0ee00000, 0x63a },
11117 { 0x00000030, 0x0020062d, 0x000 },
11118 { 0x00000002, 0x00280621, 0x000 },
11119 { 0x00000000, 0x002f0221, 0x000 },
11120 { 0x00000000, 0x0ce00000, 0x638 },
11121 { 0x81000000, 0x00204411, 0x000 },
11122 { 0x00000001, 0x00204811, 0x000 },
11123 { 0x00042004, 0x00604411, 0x68a },
11124 { 0x00001000, 0x00200811, 0x000 },
11125 { 0x0000002b, 0x00203622, 0x000 },
11126 { 0x00000000, 0x00600000, 0x63e },
11127 { 0x00000000, 0x00600000, 0x5c6 },
11128 { 0x98000000, 0x00204411, 0x000 },
11129 { 0x00000000, 0x00804811, 0x000 },
11130 { 0x00000000, 0xc0600000, 0x63e },
11131 { 0x00000000, 0xc0400400, 0x001 },
11132 { 0x0000a2a4, 0x00204411, 0x000 },
11133 { 0x00000022, 0x00204811, 0x000 },
11134 { 0x89000000, 0x00204411, 0x000 },
11135 { 0x00000001, 0x00404811, 0x62a },
11136 { 0x97000000, 0x00204411, 0x000 },
11137 { 0x00000000, 0x00204811, 0x000 },
11138 { 0x8a000000, 0x00204411, 0x000 },
11139 { 0x00000000, 0x00404811, 0x62a },
11140 { 0x00000000, 0x00600000, 0x659 },
11141 { 0x00002010, 0x00204411, 0x000 },
11142 { 0x00008000, 0x00204811, 0x000 },
11143 { 0x0001a2a4, 0xc0204411, 0x000 },
11144 { 0x00000016, 0x00604811, 0x36e },
11145 { 0x00002010, 0x00204411, 0x000 },
11146 { 0x00010000, 0x00204811, 0x000 },
11147 { 0x81000000, 0x00204411, 0x000 },
11148 { 0x00000001, 0x00204811, 0x000 },
11149 { 0x0000217c, 0x00204411, 0x000 },
11150 { 0x09800000, 0x00204811, 0x000 },
11151 { 0xffffffff, 0x00204811, 0x000 },
11152 { 0x00000000, 0x00204811, 0x000 },
11153 { 0x00000000, 0x17000000, 0x000 },
11154 { 0x0004217f, 0x00604411, 0x68a },
11155 { 0x0000001f, 0x00210230, 0x000 },
11156 { 0x00000000, 0x14c00000, 0x000 },
11157 { 0x00000004, 0x00404c11, 0x653 },
11158 { 0x00000000, 0x00400000, 0x000 },
11159 { 0x00000017, 0x00201e2d, 0x000 },
11160 { 0x00000004, 0x00291e27, 0x000 },
11161 { 0x00000017, 0x00803627, 0x000 },
11162 { 0x00000017, 0x00201e2d, 0x000 },
11163 { 0xfffffffb, 0x00281e27, 0x000 },
11164 { 0x00000017, 0x00803627, 0x000 },
11165 { 0x00000017, 0x00201e2d, 0x000 },
11166 { 0x00000008, 0x00291e27, 0x000 },
11167 { 0x00000017, 0x00803627, 0x000 },
11168 { 0x00000017, 0x00201e2d, 0x000 },
11169 { 0xfffffff7, 0x00281e27, 0x000 },
11170 { 0x00000017, 0x00803627, 0x000 },
11171 { 0x00002010, 0x00204411, 0x000 },
11172 { 0x00008000, 0x00204811, 0x000 },
11173 { 0x0001a2a4, 0x00204411, 0x000 },
11174 { 0x00000016, 0x00604811, 0x36e },
11175 { 0x00002010, 0x00204411, 0x000 },
11176 { 0x00010000, 0x00204811, 0x000 },
11177 { 0x0000217c, 0x00204411, 0x000 },
11178 { 0x01800000, 0x00204811, 0x000 },
11179 { 0xffffffff, 0x00204811, 0x000 },
11180 { 0x00000000, 0x00204811, 0x000 },
11181 { 0x00000000, 0x17000000, 0x000 },
11182 { 0x81000000, 0x00204411, 0x000 },
11183 { 0x00000001, 0x00204811, 0x000 },
11184 { 0x0004217f, 0x00604411, 0x68a },
11185 { 0x0000001f, 0x00210230, 0x000 },
11186 { 0x00000000, 0x14c00000, 0x689 },
11187 { 0x00000010, 0x00404c11, 0x66f },
11188 { 0x00000000, 0xc0200400, 0x000 },
11189 { 0x00000000, 0x38c00000, 0x000 },
11190 { 0x0000001d, 0x00200a2d, 0x000 },
11191 { 0x0000001e, 0x00200e2d, 0x000 },
11192 { 0x0000001f, 0x0020122d, 0x000 },
11193 { 0x00000020, 0x0020162d, 0x000 },
11194 { 0x00002169, 0x00204411, 0x000 },
11195 { 0x00000000, 0x00204804, 0x000 },
11196 { 0x00000000, 0x00204805, 0x000 },
11197 { 0x00000000, 0x00204801, 0x000 },
11198 { 0xcafebabe, 0x00204811, 0x000 },
11199 { 0x00000004, 0x00301224, 0x000 },
11200 { 0x00000000, 0x002f0064, 0x000 },
11201 { 0x00000000, 0x0cc00000, 0x688 },
11202 { 0x00000003, 0x00281a22, 0x000 },
11203 { 0x00000008, 0x00221222, 0x000 },
11204 { 0xfffff000, 0x00281224, 0x000 },
11205 { 0x00000000, 0x002910c4, 0x000 },
11206 { 0x0000001f, 0x00403624, 0x000 },
11207 { 0x00000000, 0x00800000, 0x000 },
11208 { 0x00000000, 0x1ac00000, 0x68a },
11209 { 0x9f000000, 0x00204411, 0x000 },
11210 { 0xcafebabe, 0x00204811, 0x000 },
11211 { 0x00000000, 0x1ae00000, 0x68d },
11212 { 0x00000000, 0x00800000, 0x000 },
11213 { 0x00000000, 0x1ac00000, 0x68f },
11214 { 0x9e000000, 0x00204411, 0x000 },
11215 { 0xcafebabe, 0x00204811, 0x000 },
11216 { 0x00000000, 0x1ae00000, 0x692 },
11217 { 0x00000000, 0x00800000, 0x000 },
11218 { 0x00000000, 0x00600000, 0x00b },
11219 { 0x00001000, 0x00600411, 0x315 },
11220 { 0x00000000, 0x00200411, 0x000 },
11221 { 0x00000000, 0x00600811, 0x1b2 },
11222 { 0x0000225c, 0x00204411, 0x000 },
11223 { 0x00000003, 0x00204811, 0x000 },
11224 { 0x00002256, 0x00204411, 0x000 },
11225 { 0x0000001b, 0x00204811, 0x000 },
11226 { 0x0000a1fc, 0x00204411, 0x000 },
11227 { 0x00000001, 0x00204811, 0x000 },
11228 { 0x0001a1fd, 0xc0204411, 0x000 },
11229 { 0x00000021, 0x00201e2d, 0x000 },
11230 { 0x00000010, 0x00221e27, 0x000 },
11231 { 0x00000024, 0x0020222d, 0x000 },
11232 { 0x0000ffff, 0x00282228, 0x000 },
11233 { 0x00000000, 0x00294907, 0x000 },
11234 { 0x00000000, 0x00204811, 0x000 },
11235 { 0x00000022, 0x0020222d, 0x000 },
11236 { 0x0000ffff, 0x00282228, 0x000 },
11237 { 0x00000000, 0x00294907, 0x000 },
11238 { 0x00000000, 0x00204811, 0x000 },
11239 { 0x00000023, 0x00201e2d, 0x000 },
11240 { 0x00000010, 0x00221e27, 0x000 },
11241 { 0x00000000, 0x00294907, 0x000 },
11242 { 0x00000000, 0x00404811, 0x000 },
11243 { 0x00000000, 0x00000000, 0x000 },
11244 { 0x00000000, 0x00000000, 0x000 },
11245 { 0x00000000, 0x00000000, 0x000 },
11246 { 0x00000000, 0x00000000, 0x000 },
11247 { 0x00000000, 0x00000000, 0x000 },
11248 { 0x00000000, 0x00000000, 0x000 },
11249 { 0x00000000, 0x00000000, 0x000 },
11250 { 0x00000000, 0x00000000, 0x000 },
11251 { 0x00000000, 0x00000000, 0x000 },
11252 { 0x00000000, 0x00000000, 0x000 },
11253 { 0x00000000, 0x00000000, 0x000 },
11254 { 0x00000000, 0x00000000, 0x000 },
11255 { 0x00000000, 0x00000000, 0x000 },
11256 { 0x00000000, 0x00000000, 0x000 },
11257 { 0x00000000, 0x00000000, 0x000 },
11258 { 0x00000000, 0x00000000, 0x000 },
11259 { 0x00000000, 0x00000000, 0x000 },
11260 { 0x00000000, 0x00000000, 0x000 },
11261 { 0x00000000, 0x00000000, 0x000 },
11262 { 0x00000000, 0x00000000, 0x000 },
11263 { 0x00000000, 0x00000000, 0x000 },
11264 { 0x00000000, 0x00000000, 0x000 },
11265 { 0x00000000, 0x00000000, 0x000 },
11266 { 0x00000000, 0x00000000, 0x000 },
11267 { 0x00000000, 0x00000000, 0x000 },
11268 { 0x00000000, 0x00000000, 0x000 },
11269 { 0x00000000, 0x00000000, 0x000 },
11270 { 0x00000000, 0x00000000, 0x000 },
11271 { 0x00000000, 0x00000000, 0x000 },
11272 { 0x00000000, 0x00000000, 0x000 },
11273 { 0x00000000, 0x00000000, 0x000 },
11274 { 0x00000000, 0x00000000, 0x000 },
11275 { 0x00000000, 0x00000000, 0x000 },
11276 { 0x00000000, 0x00000000, 0x000 },
11277 { 0x00000000, 0x00000000, 0x000 },
11278 { 0x00000000, 0x00000000, 0x000 },
11279 { 0x00000000, 0x00000000, 0x000 },
11280 { 0x00000000, 0x00000000, 0x000 },
11281 { 0x00000000, 0x00000000, 0x000 },
11282 { 0x00000000, 0x00000000, 0x000 },
11283 { 0x00000000, 0x00000000, 0x000 },
11284 { 0x00000000, 0x00000000, 0x000 },
11285 { 0x00000000, 0x00000000, 0x000 },
11286 { 0x00000000, 0x00000000, 0x000 },
11287 { 0x00000000, 0x00000000, 0x000 },
11288 { 0x00000000, 0x00000000, 0x000 },
11289 { 0x00000000, 0x00000000, 0x000 },
11290 { 0x00000000, 0x00000000, 0x000 },
11291 { 0x00000000, 0x00000000, 0x000 },
11292 { 0x00000000, 0x00000000, 0x000 },
11293 { 0x00000000, 0x00000000, 0x000 },
11294 { 0x00000000, 0x00000000, 0x000 },
11295 { 0x00000000, 0x00000000, 0x000 },
11296 { 0x00000000, 0x00000000, 0x000 },
11297 { 0x00000000, 0x00000000, 0x000 },
11298 { 0x014204ff, 0x05bd0250, 0x000 },
11299 { 0x01c30168, 0x043f05bd, 0x000 },
11300 { 0x02250209, 0x02500151, 0x000 },
11301 { 0x02230245, 0x02a00241, 0x000 },
11302 { 0x03d705bd, 0x05bd05bd, 0x000 },
11303 { 0x06460647, 0x031f05bd, 0x000 },
11304 { 0x05bd05c2, 0x03200340, 0x000 },
11305 { 0x032a0282, 0x03420334, 0x000 },
11306 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11307 { 0x05bd054e, 0x05bd05bd, 0x000 },
11308 { 0x03ba05bd, 0x04b80344, 0x000 },
11309 { 0x0497044d, 0x043d05bd, 0x000 },
11310 { 0x04cd05bd, 0x044104da, 0x000 },
11311 { 0x044d0504, 0x03510375, 0x000 },
11312 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11313 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11314 { 0x05bd05bd, 0x063c05c4, 0x000 },
11315 { 0x05bd05bd, 0x000705bd, 0x000 },
11316 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11317 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11318 { 0x03f803ed, 0x04080406, 0x000 },
11319 { 0x040e040a, 0x040c0410, 0x000 },
11320 { 0x041c0418, 0x04240420, 0x000 },
11321 { 0x042c0428, 0x04340430, 0x000 },
11322 { 0x05bd05bd, 0x043805bd, 0x000 },
11323 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11324 { 0x05bd05bd, 0x05bd05bd, 0x000 },
11325 { 0x00020676, 0x06940006, 0x000 },
11326};
11327
11328static const u32 RV635_pfp_microcode[] = {
113290xca0400,
113300xa00000,
113310x7e828b,
113320x7c038b,
113330x8001b8,
113340x7c038b,
113350xd4401e,
113360xee001e,
113370xca0400,
113380xa00000,
113390x7e828b,
113400xc41838,
113410xca2400,
113420xca2800,
113430x9581a8,
113440xc41c3a,
113450xc3c000,
113460xca0800,
113470xca0c00,
113480x7c744b,
113490xc20005,
113500x99c000,
113510xc41c3a,
113520x7c744c,
113530xc0fff0,
113540x042c04,
113550x309002,
113560x7d2500,
113570x351402,
113580x7d350b,
113590x255403,
113600x7cd580,
113610x259c03,
113620x95c004,
113630xd5001b,
113640x7eddc1,
113650x7d9d80,
113660xd6801b,
113670xd5801b,
113680xd4401e,
113690xd5401e,
113700xd6401e,
113710xd6801e,
113720xd4801e,
113730xd4c01e,
113740x9783d3,
113750xd5c01e,
113760xca0800,
113770x80001a,
113780xca0c00,
113790xe4011e,
113800xd4001e,
113810x80000c,
113820xc41838,
113830xe4013e,
113840xd4001e,
113850x80000c,
113860xc41838,
113870xd4401e,
113880xee001e,
113890xca0400,
113900xa00000,
113910x7e828b,
113920xe4011e,
113930xd4001e,
113940xd4401e,
113950xee001e,
113960xca0400,
113970xa00000,
113980x7e828b,
113990xe4013e,
114000xd4001e,
114010xd4401e,
114020xee001e,
114030xca0400,
114040xa00000,
114050x7e828b,
114060xca1800,
114070xd4401e,
114080xd5801e,
114090x800053,
114100xd40075,
114110xd4401e,
114120xca0800,
114130xca0c00,
114140xca1000,
114150xd48019,
114160xd4c018,
114170xd50017,
114180xd4801e,
114190xd4c01e,
114200xd5001e,
114210xe2001e,
114220xca0400,
114230xa00000,
114240x7e828b,
114250xca0800,
114260xd48060,
114270xd4401e,
114280x800000,
114290xd4801e,
114300xca0800,
114310xd48061,
114320xd4401e,
114330x800000,
114340xd4801e,
114350xca0800,
114360xca0c00,
114370xd4401e,
114380xd48016,
114390xd4c016,
114400xd4801e,
114410x8001b8,
114420xd4c01e,
114430xc60843,
114440xca0c00,
114450xca1000,
114460x948004,
114470xca1400,
114480xe420f3,
114490xd42013,
114500xd56065,
114510xd4e01c,
114520xd5201c,
114530xd5601c,
114540x800000,
114550x062001,
114560xc60843,
114570xca0c00,
114580xca1000,
114590x9483f7,
114600xca1400,
114610xe420f3,
114620x800079,
114630xd42013,
114640xc60843,
114650xca0c00,
114660xca1000,
114670x9883ef,
114680xca1400,
114690xd40064,
114700x80008d,
114710x000000,
114720xc41432,
114730xc61843,
114740xc4082f,
114750x954005,
114760xc40c30,
114770xd4401e,
114780x800000,
114790xee001e,
114800x9583f5,
114810xc41031,
114820xd44033,
114830xd52065,
114840xd4a01c,
114850xd4e01c,
114860xd5201c,
114870xe4015e,
114880xd4001e,
114890x800000,
114900x062001,
114910xca1800,
114920x0a2001,
114930xd60076,
114940xc40836,
114950x988007,
114960xc61045,
114970x950110,
114980xd4001f,
114990xd46062,
115000x800000,
115010xd42062,
115020xcc3835,
115030xcc1433,
115040x8401bb,
115050xd40072,
115060xd5401e,
115070x800000,
115080xee001e,
115090xe2001a,
115100x8401bb,
115110xe2001a,
115120xcc104b,
115130xcc0447,
115140x2c9401,
115150x7d098b,
115160x984005,
115170x7d15cb,
115180xd4001a,
115190x8001b8,
115200xd4006d,
115210x344401,
115220xcc0c48,
115230x98403a,
115240xcc2c4a,
115250x958004,
115260xcc0449,
115270x8001b8,
115280xd4001a,
115290xd4c01a,
115300x282801,
115310x8400f0,
115320xcc1003,
115330x98801b,
115340x04380c,
115350x8400f0,
115360xcc1003,
115370x988017,
115380x043808,
115390x8400f0,
115400xcc1003,
115410x988013,
115420x043804,
115430x8400f0,
115440xcc1003,
115450x988014,
115460xcc104c,
115470x9a8009,
115480xcc144d,
115490x9840dc,
115500xd4006d,
115510xcc1848,
115520xd5001a,
115530xd5401a,
115540x8000c9,
115550xd5801a,
115560x96c0d5,
115570xd4006d,
115580x8001b8,
115590xd4006e,
115600x9ac003,
115610xd4006d,
115620xd4006e,
115630x800000,
115640xec007f,
115650x9ac0cc,
115660xd4006d,
115670x8001b8,
115680xd4006e,
115690xcc1403,
115700xcc1803,
115710xcc1c03,
115720x7d9103,
115730x7dd583,
115740x7d190c,
115750x35cc1f,
115760x35701f,
115770x7cf0cb,
115780x7cd08b,
115790x880000,
115800x7e8e8b,
115810x95c004,
115820xd4006e,
115830x8001b8,
115840xd4001a,
115850xd4c01a,
115860xcc0803,
115870xcc0c03,
115880xcc1003,
115890xcc1403,
115900xcc1803,
115910xcc1c03,
115920xcc2403,
115930xcc2803,
115940x35c41f,
115950x36b01f,
115960x7c704b,
115970x34f01f,
115980x7c704b,
115990x35701f,
116000x7c704b,
116010x7d8881,
116020x7dccc1,
116030x7e5101,
116040x7e9541,
116050x7c9082,
116060x7cd4c2,
116070x7c848b,
116080x9ac003,
116090x7c8c8b,
116100x2c8801,
116110x98809e,
116120xd4006d,
116130x98409c,
116140xd4006e,
116150xcc084c,
116160xcc0c4d,
116170xcc1048,
116180xd4801a,
116190xd4c01a,
116200x800101,
116210xd5001a,
116220xcc0832,
116230xd40032,
116240x9482d9,
116250xca0c00,
116260xd4401e,
116270x800000,
116280xd4001e,
116290xe4011e,
116300xd4001e,
116310xca0800,
116320xca0c00,
116330xca1000,
116340xd4401e,
116350xca1400,
116360xd4801e,
116370xd4c01e,
116380xd5001e,
116390xd5401e,
116400xd54034,
116410x800000,
116420xee001e,
116430x280404,
116440xe2001a,
116450xe2001a,
116460xd4401a,
116470xca3800,
116480xcc0803,
116490xcc0c03,
116500xcc0c03,
116510xcc0c03,
116520x9882bd,
116530x000000,
116540x8401bb,
116550xd7a06f,
116560x800000,
116570xee001f,
116580xca0400,
116590xc2ff00,
116600xcc0834,
116610xc13fff,
116620x7c74cb,
116630x7cc90b,
116640x7d010f,
116650x9902b0,
116660x7c738b,
116670x8401bb,
116680xd7a06f,
116690x800000,
116700xee001f,
116710xca0800,
116720x281900,
116730x7d898b,
116740x958014,
116750x281404,
116760xca0c00,
116770xca1000,
116780xca1c00,
116790xca2400,
116800xe2001f,
116810xd4c01a,
116820xd5001a,
116830xd5401a,
116840xcc1803,
116850xcc2c03,
116860xcc2c03,
116870xcc2c03,
116880x7da58b,
116890x7d9c47,
116900x984297,
116910x000000,
116920x800161,
116930xd4c01a,
116940xd4401e,
116950xd4801e,
116960x800000,
116970xee001e,
116980xe4011e,
116990xd4001e,
117000xd4401e,
117010xee001e,
117020xca0400,
117030xa00000,
117040x7e828b,
117050xe4013e,
117060xd4001e,
117070xd4401e,
117080xee001e,
117090xca0400,
117100xa00000,
117110x7e828b,
117120xca0800,
117130x248c06,
117140x0ccc06,
117150x98c006,
117160xcc104e,
117170x990004,
117180xd40073,
117190xe4011e,
117200xd4001e,
117210xd4401e,
117220xd4801e,
117230x800000,
117240xee001e,
117250xca0800,
117260xca0c00,
117270x34d018,
117280x251001,
117290x950021,
117300xc17fff,
117310xca1000,
117320xca1400,
117330xca1800,
117340xd4801d,
117350xd4c01d,
117360x7db18b,
117370xc14202,
117380xc2c001,
117390xd5801d,
117400x34dc0e,
117410x7d5d4c,
117420x7f734c,
117430xd7401e,
117440xd5001e,
117450xd5401e,
117460xc14200,
117470xc2c000,
117480x099c01,
117490x31dc10,
117500x7f5f4c,
117510x7f734c,
117520x042802,
117530x7d8380,
117540xd5a86f,
117550xd58066,
117560xd7401e,
117570xec005e,
117580xc82402,
117590xc82402,
117600x8001b8,
117610xd60076,
117620xd4401e,
117630xd4801e,
117640xd4c01e,
117650x800000,
117660xee001e,
117670x800000,
117680xee001f,
117690xd4001f,
117700x800000,
117710xd4001f,
117720xd4001f,
117730x880000,
117740xd4001f,
117750x000000,
117760x000000,
117770x000000,
117780x000000,
117790x000000,
117800x000000,
117810x000000,
117820x000000,
117830x000000,
117840x000000,
117850x000000,
117860x000000,
117870x000000,
117880x000000,
117890x000000,
117900x000000,
117910x000000,
117920x000000,
117930x000000,
117940x000000,
117950x000000,
117960x000000,
117970x000000,
117980x000000,
117990x000000,
118000x000000,
118010x000000,
118020x000000,
118030x000000,
118040x000000,
118050x000000,
118060x000000,
118070x000000,
118080x000000,
118090x000000,
118100x000000,
118110x000000,
118120x000000,
118130x000000,
118140x000000,
118150x000000,
118160x000000,
118170x000000,
118180x000000,
118190x000000,
118200x000000,
118210x000000,
118220x000000,
118230x000000,
118240x000000,
118250x000000,
118260x000000,
118270x000000,
118280x000000,
118290x000000,
118300x000000,
118310x000000,
118320x000000,
118330x000000,
118340x000000,
118350x000000,
118360x000000,
118370x000000,
118380x000000,
118390x000000,
118400x000000,
118410x010171,
118420x020178,
118430x03008f,
118440x04007f,
118450x050003,
118460x06003f,
118470x070032,
118480x08012c,
118490x090046,
118500x0a0036,
118510x1001b6,
118520x1700a2,
118530x22013a,
118540x230149,
118550x2000b4,
118560x240125,
118570x27004d,
118580x28006a,
118590x2a0060,
118600x2b0052,
118610x2f0065,
118620x320087,
118630x34017f,
118640x3c0156,
118650x3f0072,
118660x41018c,
118670x44012e,
118680x550173,
118690x56017a,
118700x60000b,
118710x610034,
118720x620038,
118730x630038,
118740x640038,
118750x650038,
118760x660038,
118770x670038,
118780x68003a,
118790x690041,
118800x6a0048,
118810x6b0048,
118820x6c0048,
118830x6d0048,
118840x6e0048,
118850x6f0048,
118860x000006,
118870x000006,
118880x000006,
118890x000006,
118900x000006,
118910x000006,
118920x000006,
118930x000006,
118940x000006,
118950x000006,
118960x000006,
118970x000006,
118980x000006,
118990x000006,
119000x000006,
119010x000006,
119020x000006,
119030x000006,
119040x000006,
11905};
11906
11907static const u32 RV670_cp_microcode[][3] = {
11908 { 0x00000000, 0xc0200400, 0x000 },
11909 { 0x00000000, 0x00a0000a, 0x000 },
11910 { 0x0000ffff, 0x00284621, 0x000 },
11911 { 0x00000000, 0xd9004800, 0x000 },
11912 { 0x00000000, 0xc0200400, 0x000 },
11913 { 0x00000000, 0x00a0000a, 0x000 },
11914 { 0x00000000, 0x00e00000, 0x000 },
11915 { 0x00010000, 0xc0294620, 0x000 },
11916 { 0x00000000, 0xd9004800, 0x000 },
11917 { 0x00000000, 0xc0200400, 0x000 },
11918 { 0x00000000, 0x00a0000a, 0x000 },
11919 { 0x81000000, 0x00204411, 0x000 },
11920 { 0x00000001, 0x00204811, 0x000 },
11921 { 0x00042004, 0x00604411, 0x67c },
11922 { 0x00000000, 0x00600000, 0x624 },
11923 { 0x00000000, 0x00600000, 0x638 },
11924 { 0x00000000, 0xc0200800, 0x000 },
11925 { 0x00000f00, 0x00281622, 0x000 },
11926 { 0x00000008, 0x00211625, 0x000 },
11927 { 0x00000018, 0x00203625, 0x000 },
11928 { 0x8d000000, 0x00204411, 0x000 },
11929 { 0x00000004, 0x002f0225, 0x000 },
11930 { 0x00000000, 0x0ce00000, 0x018 },
11931 { 0x00412000, 0x00404811, 0x019 },
11932 { 0x00422000, 0x00204811, 0x000 },
11933 { 0x8e000000, 0x00204411, 0x000 },
11934 { 0x00000028, 0x00204a2d, 0x000 },
11935 { 0x90000000, 0x00204411, 0x000 },
11936 { 0x00000000, 0x00204805, 0x000 },
11937 { 0x0000000c, 0x00211622, 0x000 },
11938 { 0x00000003, 0x00281625, 0x000 },
11939 { 0x00000019, 0x00211a22, 0x000 },
11940 { 0x00000004, 0x00281a26, 0x000 },
11941 { 0x00000000, 0x002914c5, 0x000 },
11942 { 0x00000019, 0x00203625, 0x000 },
11943 { 0x00000000, 0x003a1402, 0x000 },
11944 { 0x00000016, 0x00211625, 0x000 },
11945 { 0x00000003, 0x00281625, 0x000 },
11946 { 0x00000017, 0x00200e2d, 0x000 },
11947 { 0xfffffffc, 0x00280e23, 0x000 },
11948 { 0x00000000, 0x002914a3, 0x000 },
11949 { 0x00000017, 0x00203625, 0x000 },
11950 { 0x00008000, 0x00280e22, 0x000 },
11951 { 0x00000007, 0x00220e23, 0x000 },
11952 { 0x00000000, 0x0029386e, 0x000 },
11953 { 0x20000000, 0x00280e22, 0x000 },
11954 { 0x00000006, 0x00210e23, 0x000 },
11955 { 0x00000000, 0x0029386e, 0x000 },
11956 { 0x00000000, 0x00220222, 0x000 },
11957 { 0x00000000, 0x14e00000, 0x038 },
11958 { 0x00000000, 0x2ee00000, 0x035 },
11959 { 0x00000000, 0x2ce00000, 0x037 },
11960 { 0x00000000, 0x00400e2d, 0x039 },
11961 { 0x00000008, 0x00200e2d, 0x000 },
11962 { 0x00000009, 0x0040122d, 0x046 },
11963 { 0x00000001, 0x00400e2d, 0x039 },
11964 { 0x00000000, 0xc0200c00, 0x000 },
11965 { 0x003ffffc, 0x00281223, 0x000 },
11966 { 0x00000002, 0x00221224, 0x000 },
11967 { 0x0000001f, 0x00211e23, 0x000 },
11968 { 0x00000000, 0x14e00000, 0x03e },
11969 { 0x00000008, 0x00401c11, 0x041 },
11970 { 0x0000000d, 0x00201e2d, 0x000 },
11971 { 0x0000000f, 0x00281e27, 0x000 },
11972 { 0x00000003, 0x00221e27, 0x000 },
11973 { 0x7fc00000, 0x00281a23, 0x000 },
11974 { 0x00000014, 0x00211a26, 0x000 },
11975 { 0x00000001, 0x00331a26, 0x000 },
11976 { 0x00000008, 0x00221a26, 0x000 },
11977 { 0x00000000, 0x00290cc7, 0x000 },
11978 { 0x00000027, 0x00203624, 0x000 },
11979 { 0x00007f00, 0x00281221, 0x000 },
11980 { 0x00001400, 0x002f0224, 0x000 },
11981 { 0x00000000, 0x0ce00000, 0x04b },
11982 { 0x00000001, 0x00290e23, 0x000 },
11983 { 0x0000000e, 0x00203623, 0x000 },
11984 { 0x0000e000, 0x00204411, 0x000 },
11985 { 0xfff80000, 0x00294a23, 0x000 },
11986 { 0x00000000, 0x003a2c02, 0x000 },
11987 { 0x00000002, 0x00220e2b, 0x000 },
11988 { 0xfc000000, 0x00280e23, 0x000 },
11989 { 0x0000000f, 0x00203623, 0x000 },
11990 { 0x00001fff, 0x00294a23, 0x000 },
11991 { 0x00000027, 0x00204a2d, 0x000 },
11992 { 0x00000000, 0x00204811, 0x000 },
11993 { 0x00000029, 0x00200e2d, 0x000 },
11994 { 0x060a0200, 0x00294a23, 0x000 },
11995 { 0x00000000, 0x00204811, 0x000 },
11996 { 0x00000000, 0x00204811, 0x000 },
11997 { 0x00000001, 0x00210222, 0x000 },
11998 { 0x00000000, 0x14e00000, 0x061 },
11999 { 0x00000000, 0x2ee00000, 0x05f },
12000 { 0x00000000, 0x2ce00000, 0x05e },
12001 { 0x00000000, 0x00400e2d, 0x062 },
12002 { 0x00000001, 0x00400e2d, 0x062 },
12003 { 0x0000000a, 0x00200e2d, 0x000 },
12004 { 0x0000000b, 0x0040122d, 0x06a },
12005 { 0x00000000, 0xc0200c00, 0x000 },
12006 { 0x003ffffc, 0x00281223, 0x000 },
12007 { 0x00000002, 0x00221224, 0x000 },
12008 { 0x7fc00000, 0x00281623, 0x000 },
12009 { 0x00000014, 0x00211625, 0x000 },
12010 { 0x00000001, 0x00331625, 0x000 },
12011 { 0x80000000, 0x00280e23, 0x000 },
12012 { 0x00000000, 0x00290ca3, 0x000 },
12013 { 0x3ffffc00, 0x00290e23, 0x000 },
12014 { 0x0000001f, 0x00211e23, 0x000 },
12015 { 0x00000000, 0x14e00000, 0x06d },
12016 { 0x00000100, 0x00401c11, 0x070 },
12017 { 0x0000000d, 0x00201e2d, 0x000 },
12018 { 0x000000f0, 0x00281e27, 0x000 },
12019 { 0x00000004, 0x00221e27, 0x000 },
12020 { 0x81000000, 0x00204411, 0x000 },
12021 { 0x0000000d, 0x00204811, 0x000 },
12022 { 0xfffff0ff, 0x00281a30, 0x000 },
12023 { 0x0000a028, 0x00204411, 0x000 },
12024 { 0x00000000, 0x002948e6, 0x000 },
12025 { 0x0000a018, 0x00204411, 0x000 },
12026 { 0x3fffffff, 0x00284a23, 0x000 },
12027 { 0x0000a010, 0x00204411, 0x000 },
12028 { 0x00000000, 0x00204804, 0x000 },
12029 { 0x00000030, 0x0020162d, 0x000 },
12030 { 0x00000002, 0x00291625, 0x000 },
12031 { 0x00000030, 0x00203625, 0x000 },
12032 { 0x00000025, 0x0020162d, 0x000 },
12033 { 0x00000000, 0x002f00a3, 0x000 },
12034 { 0x00000000, 0x0cc00000, 0x083 },
12035 { 0x00000026, 0x0020162d, 0x000 },
12036 { 0x00000000, 0x002f00a4, 0x000 },
12037 { 0x00000000, 0x0cc00000, 0x084 },
12038 { 0x00000000, 0x00400000, 0x08a },
12039 { 0x00000025, 0x00203623, 0x000 },
12040 { 0x00000026, 0x00203624, 0x000 },
12041 { 0x00000017, 0x00201e2d, 0x000 },
12042 { 0x00000002, 0x00210227, 0x000 },
12043 { 0x00000000, 0x14e00000, 0x08a },
12044 { 0x00000000, 0x00600000, 0x659 },
12045 { 0x00000000, 0x00600000, 0x64d },
12046 { 0x00000002, 0x00210e22, 0x000 },
12047 { 0x00000000, 0x14c00000, 0x08d },
12048 { 0x00000012, 0xc0403620, 0x093 },
12049 { 0x00000000, 0x2ee00000, 0x091 },
12050 { 0x00000000, 0x2ce00000, 0x090 },
12051 { 0x00000002, 0x00400e2d, 0x092 },
12052 { 0x00000003, 0x00400e2d, 0x092 },
12053 { 0x0000000c, 0x00200e2d, 0x000 },
12054 { 0x00000012, 0x00203623, 0x000 },
12055 { 0x00000003, 0x00210e22, 0x000 },
12056 { 0x00000000, 0x14c00000, 0x098 },
12057 { 0x0000a00c, 0x00204411, 0x000 },
12058 { 0x00000000, 0xc0204800, 0x000 },
12059 { 0x00000000, 0xc0404800, 0x0a0 },
12060 { 0x0000a00c, 0x00204411, 0x000 },
12061 { 0x00000000, 0x00204811, 0x000 },
12062 { 0x00000000, 0x2ee00000, 0x09e },
12063 { 0x00000000, 0x2ce00000, 0x09d },
12064 { 0x00000002, 0x00400e2d, 0x09f },
12065 { 0x00000003, 0x00400e2d, 0x09f },
12066 { 0x0000000c, 0x00200e2d, 0x000 },
12067 { 0x00000000, 0x00204803, 0x000 },
12068 { 0x00000000, 0x003a0c02, 0x000 },
12069 { 0x003f0000, 0x00280e23, 0x000 },
12070 { 0x00000010, 0x00210e23, 0x000 },
12071 { 0x00000011, 0x00203623, 0x000 },
12072 { 0x0000001e, 0x0021022b, 0x000 },
12073 { 0x00000000, 0x14c00000, 0x0a7 },
12074 { 0x00000016, 0xc0203620, 0x000 },
12075 { 0x0000001f, 0x0021022b, 0x000 },
12076 { 0x00000000, 0x14c00000, 0x0aa },
12077 { 0x00000015, 0xc0203620, 0x000 },
12078 { 0x00000008, 0x00210e2b, 0x000 },
12079 { 0x0000007f, 0x00280e23, 0x000 },
12080 { 0x00000000, 0x002f0223, 0x000 },
12081 { 0x00000000, 0x0ce00000, 0x0e1 },
12082 { 0x00000000, 0x27000000, 0x000 },
12083 { 0x00000000, 0x00600000, 0x2a3 },
12084 { 0x00000001, 0x002f0223, 0x000 },
12085 { 0x00000000, 0x0ae00000, 0x0b3 },
12086 { 0x00000000, 0x00600000, 0x13a },
12087 { 0x81000000, 0x00204411, 0x000 },
12088 { 0x00000006, 0x00204811, 0x000 },
12089 { 0x0000000c, 0x00221e30, 0x000 },
12090 { 0x99800000, 0x00204411, 0x000 },
12091 { 0x00000004, 0x0020122d, 0x000 },
12092 { 0x00000008, 0x00221224, 0x000 },
12093 { 0x00000010, 0x00201811, 0x000 },
12094 { 0x00000000, 0x00291ce4, 0x000 },
12095 { 0x00000000, 0x00604807, 0x12f },
12096 { 0x9b000000, 0x00204411, 0x000 },
12097 { 0x00000000, 0x00204802, 0x000 },
12098 { 0x9c000000, 0x00204411, 0x000 },
12099 { 0x00000000, 0x0033146f, 0x000 },
12100 { 0x00000001, 0x00333e23, 0x000 },
12101 { 0x00000000, 0xd9004800, 0x000 },
12102 { 0x00000000, 0x00203c05, 0x000 },
12103 { 0x81000000, 0x00204411, 0x000 },
12104 { 0x0000000e, 0x00204811, 0x000 },
12105 { 0x00000000, 0x00201010, 0x000 },
12106 { 0x0000e007, 0x00204411, 0x000 },
12107 { 0x0000000f, 0x0021022b, 0x000 },
12108 { 0x00000000, 0x14c00000, 0x0cb },
12109 { 0x00f8ff08, 0x00204811, 0x000 },
12110 { 0x98000000, 0x00404811, 0x0dc },
12111 { 0x000000f0, 0x00280e22, 0x000 },
12112 { 0x000000a0, 0x002f0223, 0x000 },
12113 { 0x00000000, 0x0cc00000, 0x0da },
12114 { 0x00000011, 0x00200e2d, 0x000 },
12115 { 0x00000001, 0x002f0223, 0x000 },
12116 { 0x00000000, 0x0ce00000, 0x0d5 },
12117 { 0x00000002, 0x002f0223, 0x000 },
12118 { 0x00000000, 0x0ce00000, 0x0d4 },
12119 { 0x00003f00, 0x00400c11, 0x0d6 },
12120 { 0x00001f00, 0x00400c11, 0x0d6 },
12121 { 0x00000f00, 0x00200c11, 0x000 },
12122 { 0x00380009, 0x00294a23, 0x000 },
12123 { 0x3f000000, 0x00280e2b, 0x000 },
12124 { 0x00000002, 0x00220e23, 0x000 },
12125 { 0x00000007, 0x00494a23, 0x0dc },
12126 { 0x00380f09, 0x00204811, 0x000 },
12127 { 0x68000007, 0x00204811, 0x000 },
12128 { 0x00000008, 0x00214a27, 0x000 },
12129 { 0x00000000, 0x00204811, 0x000 },
12130 { 0x060a0200, 0x00294a24, 0x000 },
12131 { 0x00000000, 0x00204811, 0x000 },
12132 { 0x00000000, 0x00204811, 0x000 },
12133 { 0x0000a202, 0x00204411, 0x000 },
12134 { 0x00ff0000, 0x00280e22, 0x000 },
12135 { 0x00000080, 0x00294a23, 0x000 },
12136 { 0x00000027, 0x00200e2d, 0x000 },
12137 { 0x00000026, 0x0020122d, 0x000 },
12138 { 0x00000000, 0x002f0083, 0x000 },
12139 { 0x00000000, 0x0ce00000, 0x0ea },
12140 { 0x00000000, 0x00600000, 0x653 },
12141 { 0x00000000, 0x00400000, 0x0eb },
12142 { 0x00000000, 0x00600000, 0x656 },
12143 { 0x00000007, 0x0020222d, 0x000 },
12144 { 0x00000005, 0x00220e22, 0x000 },
12145 { 0x00100000, 0x00280e23, 0x000 },
12146 { 0x00000000, 0x00292068, 0x000 },
12147 { 0x00000000, 0x003a0c02, 0x000 },
12148 { 0x000000ef, 0x00280e23, 0x000 },
12149 { 0x00000000, 0x00292068, 0x000 },
12150 { 0x00000017, 0x00200e2d, 0x000 },
12151 { 0x00000003, 0x00210223, 0x000 },
12152 { 0x00000000, 0x14e00000, 0x0f8 },
12153 { 0x0000000b, 0x00210228, 0x000 },
12154 { 0x00000000, 0x14c00000, 0x0f8 },
12155 { 0x00000400, 0x00292228, 0x000 },
12156 { 0x00000014, 0x00203628, 0x000 },
12157 { 0x0000001c, 0x00210e22, 0x000 },
12158 { 0x00000000, 0x14c00000, 0x0fd },
12159 { 0x0000a30c, 0x00204411, 0x000 },
12160 { 0x00000000, 0x00204811, 0x000 },
12161 { 0x0000001e, 0x00210e22, 0x000 },
12162 { 0x00000000, 0x14c00000, 0x10b },
12163 { 0x0000a30f, 0x00204411, 0x000 },
12164 { 0x00000011, 0x00200e2d, 0x000 },
12165 { 0x00000001, 0x002f0223, 0x000 },
12166 { 0x00000000, 0x0cc00000, 0x104 },
12167 { 0xffffffff, 0x00404811, 0x10b },
12168 { 0x00000002, 0x002f0223, 0x000 },
12169 { 0x00000000, 0x0cc00000, 0x107 },
12170 { 0x0000ffff, 0x00404811, 0x10b },
12171 { 0x00000004, 0x002f0223, 0x000 },
12172 { 0x00000000, 0x0cc00000, 0x10a },
12173 { 0x000000ff, 0x00404811, 0x10b },
12174 { 0x00000001, 0x00204811, 0x000 },
12175 { 0x0002c400, 0x00204411, 0x000 },
12176 { 0x0000001f, 0x00210e22, 0x000 },
12177 { 0x00000000, 0x14c00000, 0x112 },
12178 { 0x00000010, 0x40210e20, 0x000 },
12179 { 0x00000013, 0x00203623, 0x000 },
12180 { 0x00000018, 0x40224a20, 0x000 },
12181 { 0x00000010, 0xc0424a20, 0x114 },
12182 { 0x00000000, 0x00200c11, 0x000 },
12183 { 0x00000013, 0x00203623, 0x000 },
12184 { 0x00000000, 0x00204811, 0x000 },
12185 { 0x00000000, 0x00204811, 0x000 },
12186 { 0x0000000a, 0x00201011, 0x000 },
12187 { 0x00000000, 0x002f0224, 0x000 },
12188 { 0x00000000, 0x0ce00000, 0x11b },
12189 { 0x00000000, 0x00204811, 0x000 },
12190 { 0x00000001, 0x00531224, 0x117 },
12191 { 0xffbfffff, 0x00283a2e, 0x000 },
12192 { 0x0000001b, 0x00210222, 0x000 },
12193 { 0x00000000, 0x14c00000, 0x12e },
12194 { 0x81000000, 0x00204411, 0x000 },
12195 { 0x0000000d, 0x00204811, 0x000 },
12196 { 0x00000018, 0x00220e30, 0x000 },
12197 { 0xfc000000, 0x00280e23, 0x000 },
12198 { 0x81000000, 0x00204411, 0x000 },
12199 { 0x0000000e, 0x00204811, 0x000 },
12200 { 0x00000000, 0x00201010, 0x000 },
12201 { 0x0000e00e, 0x00204411, 0x000 },
12202 { 0x07f8ff08, 0x00204811, 0x000 },
12203 { 0x00000000, 0x00294a23, 0x000 },
12204 { 0x0000001c, 0x00201e2d, 0x000 },
12205 { 0x00000008, 0x00214a27, 0x000 },
12206 { 0x00000000, 0x00204811, 0x000 },
12207 { 0x060a0200, 0x00294a24, 0x000 },
12208 { 0x00000000, 0x00204811, 0x000 },
12209 { 0x00000000, 0x00204811, 0x000 },
12210 { 0x00000000, 0x00800000, 0x000 },
12211 { 0x81000000, 0x00204411, 0x000 },
12212 { 0x00000001, 0x00204811, 0x000 },
12213 { 0x0000217c, 0x00204411, 0x000 },
12214 { 0x00800000, 0x00204811, 0x000 },
12215 { 0x00000000, 0x00204806, 0x000 },
12216 { 0x00000008, 0x00214a27, 0x000 },
12217 { 0x00000000, 0x17000000, 0x000 },
12218 { 0x0004217f, 0x00604411, 0x67c },
12219 { 0x0000001f, 0x00210230, 0x000 },
12220 { 0x00000000, 0x14c00000, 0x67b },
12221 { 0x00000004, 0x00404c11, 0x135 },
12222 { 0x81000000, 0x00204411, 0x000 },
12223 { 0x00000001, 0x00204811, 0x000 },
12224 { 0x000021f8, 0x00204411, 0x000 },
12225 { 0x0000001c, 0x00204811, 0x000 },
12226 { 0x000421f9, 0x00604411, 0x67c },
12227 { 0x00000011, 0x00210230, 0x000 },
12228 { 0x00000000, 0x14e00000, 0x13c },
12229 { 0x00000000, 0x00800000, 0x000 },
12230 { 0x00000000, 0x00600000, 0x00b },
12231 { 0x00000000, 0x00600411, 0x315 },
12232 { 0x00000000, 0x00200411, 0x000 },
12233 { 0x00000000, 0x00600811, 0x1b2 },
12234 { 0x00000000, 0x00600000, 0x160 },
12235 { 0x0000ffff, 0x40280e20, 0x000 },
12236 { 0x00000010, 0xc0211220, 0x000 },
12237 { 0x0000ffff, 0x40280620, 0x000 },
12238 { 0x00000010, 0xc0210a20, 0x000 },
12239 { 0x00000000, 0x00341461, 0x000 },
12240 { 0x00000000, 0x00741882, 0x2bb },
12241 { 0x0001a1fd, 0x00604411, 0x2e0 },
12242 { 0x00003fff, 0x002f022f, 0x000 },
12243 { 0x00000000, 0x0cc00000, 0x147 },
12244 { 0x00000000, 0xc0400400, 0x001 },
12245 { 0x00000000, 0x00600000, 0x00b },
12246 { 0x00000000, 0x00600411, 0x315 },
12247 { 0x00000000, 0x00200411, 0x000 },
12248 { 0x00000000, 0x00600811, 0x1b2 },
12249 { 0x00003fff, 0x002f022f, 0x000 },
12250 { 0x00000000, 0x0ce00000, 0x000 },
12251 { 0x00000000, 0x00600000, 0x160 },
12252 { 0x00000010, 0x40210e20, 0x000 },
12253 { 0x0000ffff, 0xc0281220, 0x000 },
12254 { 0x00000010, 0x40211620, 0x000 },
12255 { 0x0000ffff, 0xc0681a20, 0x2bb },
12256 { 0x0001a1fd, 0x00604411, 0x2e0 },
12257 { 0x00003fff, 0x002f022f, 0x000 },
12258 { 0x00000000, 0x0cc00000, 0x158 },
12259 { 0x00000000, 0xc0400400, 0x001 },
12260 { 0x0000225c, 0x00204411, 0x000 },
12261 { 0x00000001, 0x00300a2f, 0x000 },
12262 { 0x00000001, 0x00210a22, 0x000 },
12263 { 0x00000003, 0x00384a22, 0x000 },
12264 { 0x00002256, 0x00204411, 0x000 },
12265 { 0x0000001a, 0x00204811, 0x000 },
12266 { 0x0000a1fc, 0x00204411, 0x000 },
12267 { 0x00000001, 0x00804811, 0x000 },
12268 { 0x00000000, 0x00600000, 0x00b },
12269 { 0x00000000, 0x00600000, 0x18f },
12270 { 0x00000000, 0x00600000, 0x1a0 },
12271 { 0x00003fff, 0x002f022f, 0x000 },
12272 { 0x00000000, 0x0ce00000, 0x000 },
12273 { 0x00000000, 0x00202c08, 0x000 },
12274 { 0x00000000, 0x00202411, 0x000 },
12275 { 0x00000000, 0x00202811, 0x000 },
12276 { 0x00002256, 0x00204411, 0x000 },
12277 { 0x00000016, 0x00204811, 0x000 },
12278 { 0x0000225c, 0x00204411, 0x000 },
12279 { 0x00000003, 0x00204811, 0x000 },
12280 { 0x93800000, 0x00204411, 0x000 },
12281 { 0x00000002, 0x00221e29, 0x000 },
12282 { 0x00000000, 0x007048eb, 0x19c },
12283 { 0x00000000, 0x00600000, 0x2bb },
12284 { 0x00000001, 0x40330620, 0x000 },
12285 { 0x00000000, 0xc0302409, 0x000 },
12286 { 0x00003fff, 0x002f022f, 0x000 },
12287 { 0x00000000, 0x0ce00000, 0x000 },
12288 { 0x00000000, 0x00600000, 0x2a3 },
12289 { 0x00000000, 0x002f0221, 0x000 },
12290 { 0x00000000, 0x0ae00000, 0x181 },
12291 { 0x00000000, 0x00600000, 0x13a },
12292 { 0x00000000, 0x00400000, 0x186 },
12293 { 0x95000000, 0x00204411, 0x000 },
12294 { 0x00000000, 0x002f0221, 0x000 },
12295 { 0x00000000, 0x0ce00000, 0x186 },
12296 { 0x00000000, 0xc0204800, 0x000 },
12297 { 0x00000001, 0x00530621, 0x182 },
12298 { 0x92000000, 0x00204411, 0x000 },
12299 { 0x00000000, 0xc0604800, 0x197 },
12300 { 0x0001a1fd, 0x00204411, 0x000 },
12301 { 0x00000011, 0x0020062d, 0x000 },
12302 { 0x00000000, 0x0078042a, 0x2fb },
12303 { 0x00000000, 0x00202809, 0x000 },
12304 { 0x00003fff, 0x002f022f, 0x000 },
12305 { 0x00000000, 0x0cc00000, 0x174 },
12306 { 0x00000000, 0xc0400400, 0x001 },
12307 { 0x00000210, 0x00600411, 0x315 },
12308 { 0x00003fff, 0x002f022f, 0x000 },
12309 { 0x00000000, 0x0ce00000, 0x194 },
12310 { 0x00000015, 0xc0203620, 0x000 },
12311 { 0x00000016, 0xc0203620, 0x000 },
12312 { 0x3f800000, 0x00200411, 0x000 },
12313 { 0x46000000, 0x00600811, 0x1b2 },
12314 { 0x00000000, 0x00800000, 0x000 },
12315 { 0x0000a1fc, 0x00204411, 0x000 },
12316 { 0x00003fff, 0x002f022f, 0x000 },
12317 { 0x00000000, 0x0cc00000, 0x19b },
12318 { 0x00000001, 0x00804811, 0x000 },
12319 { 0x00000021, 0x00804811, 0x000 },
12320 { 0x0000ffff, 0x40280e20, 0x000 },
12321 { 0x00000010, 0xc0211220, 0x000 },
12322 { 0x0000ffff, 0x40281620, 0x000 },
12323 { 0x00000010, 0xc0811a20, 0x000 },
12324 { 0x81000000, 0x00204411, 0x000 },
12325 { 0x00000006, 0x00204811, 0x000 },
12326 { 0x00000008, 0x00221e30, 0x000 },
12327 { 0x00000029, 0x00201a2d, 0x000 },
12328 { 0x0000e000, 0x00204411, 0x000 },
12329 { 0xfffbff09, 0x00204811, 0x000 },
12330 { 0x0000000f, 0x0020222d, 0x000 },
12331 { 0x00001fff, 0x00294a28, 0x000 },
12332 { 0x00000006, 0x0020222d, 0x000 },
12333 { 0x00000000, 0x002920e8, 0x000 },
12334 { 0x00000000, 0x00204808, 0x000 },
12335 { 0x00000000, 0x00204811, 0x000 },
12336 { 0x060a0200, 0x00294a26, 0x000 },
12337 { 0x00000000, 0x00204811, 0x000 },
12338 { 0x00000000, 0x00204811, 0x000 },
12339 { 0x00000100, 0x00201811, 0x000 },
12340 { 0x00000008, 0x00621e28, 0x12f },
12341 { 0x00000008, 0x00822228, 0x000 },
12342 { 0x0002c000, 0x00204411, 0x000 },
12343 { 0x00000015, 0x00600e2d, 0x1bd },
12344 { 0x00000016, 0x00600e2d, 0x1bd },
12345 { 0x0000c008, 0x00204411, 0x000 },
12346 { 0x00000017, 0x00200e2d, 0x000 },
12347 { 0x00000000, 0x14c00000, 0x1b9 },
12348 { 0x00000000, 0x00200411, 0x000 },
12349 { 0x00000000, 0x00204801, 0x000 },
12350 { 0x39000000, 0x00204811, 0x000 },
12351 { 0x00000000, 0x00204811, 0x000 },
12352 { 0x00000000, 0x00804802, 0x000 },
12353 { 0x00000018, 0x00202e2d, 0x000 },
12354 { 0x00000000, 0x003b0d63, 0x000 },
12355 { 0x00000008, 0x00224a23, 0x000 },
12356 { 0x00000010, 0x00224a23, 0x000 },
12357 { 0x00000018, 0x00224a23, 0x000 },
12358 { 0x00000000, 0x00804803, 0x000 },
12359 { 0x00000000, 0x00600000, 0x00b },
12360 { 0x00001000, 0x00600411, 0x315 },
12361 { 0x00000000, 0x00200411, 0x000 },
12362 { 0x00000000, 0x00600811, 0x1b2 },
12363 { 0x00000007, 0x0021062f, 0x000 },
12364 { 0x00000013, 0x00200a2d, 0x000 },
12365 { 0x00000001, 0x00202c11, 0x000 },
12366 { 0x0000ffff, 0x40282220, 0x000 },
12367 { 0x0000000f, 0x00262228, 0x000 },
12368 { 0x00000010, 0x40212620, 0x000 },
12369 { 0x0000000f, 0x00262629, 0x000 },
12370 { 0x00000000, 0x00202802, 0x000 },
12371 { 0x00002256, 0x00204411, 0x000 },
12372 { 0x0000001b, 0x00204811, 0x000 },
12373 { 0x00000000, 0x002f0221, 0x000 },
12374 { 0x00000000, 0x0ce00000, 0x1e0 },
12375 { 0x0000225c, 0x00204411, 0x000 },
12376 { 0x00000081, 0x00204811, 0x000 },
12377 { 0x0000a1fc, 0x00204411, 0x000 },
12378 { 0x00000001, 0x00204811, 0x000 },
12379 { 0x00000080, 0x00201c11, 0x000 },
12380 { 0x00000000, 0x002f0227, 0x000 },
12381 { 0x00000000, 0x0ce00000, 0x1dc },
12382 { 0x00000000, 0x00600000, 0x1e9 },
12383 { 0x00000001, 0x00531e27, 0x1d8 },
12384 { 0x00000001, 0x00202c11, 0x000 },
12385 { 0x0000001f, 0x00280a22, 0x000 },
12386 { 0x0000001f, 0x00282a2a, 0x000 },
12387 { 0x00000001, 0x00530621, 0x1d1 },
12388 { 0x0000225c, 0x00204411, 0x000 },
12389 { 0x00000002, 0x00304a2f, 0x000 },
12390 { 0x0000a1fc, 0x00204411, 0x000 },
12391 { 0x00000001, 0x00204811, 0x000 },
12392 { 0x00000001, 0x00301e2f, 0x000 },
12393 { 0x00000000, 0x002f0227, 0x000 },
12394 { 0x00000000, 0x0ce00000, 0x000 },
12395 { 0x00000000, 0x00600000, 0x1e9 },
12396 { 0x00000001, 0x00531e27, 0x1e5 },
12397 { 0x0000ffff, 0x40280e20, 0x000 },
12398 { 0x0000000f, 0x00260e23, 0x000 },
12399 { 0x00000010, 0xc0211220, 0x000 },
12400 { 0x0000000f, 0x00261224, 0x000 },
12401 { 0x00000000, 0x00201411, 0x000 },
12402 { 0x00000000, 0x00601811, 0x2bb },
12403 { 0x0001a1fd, 0x00204411, 0x000 },
12404 { 0x00000000, 0x002f022b, 0x000 },
12405 { 0x00000000, 0x0ce00000, 0x1f8 },
12406 { 0x00000010, 0x00221628, 0x000 },
12407 { 0xffff0000, 0x00281625, 0x000 },
12408 { 0x0000ffff, 0x00281a29, 0x000 },
12409 { 0x00000000, 0x002948c5, 0x000 },
12410 { 0x00000000, 0x0020480a, 0x000 },
12411 { 0x00000000, 0x00202c11, 0x000 },
12412 { 0x00000010, 0x00221623, 0x000 },
12413 { 0xffff0000, 0x00281625, 0x000 },
12414 { 0x0000ffff, 0x00281a24, 0x000 },
12415 { 0x00000000, 0x002948c5, 0x000 },
12416 { 0x00000000, 0x00731503, 0x205 },
12417 { 0x00000000, 0x00201805, 0x000 },
12418 { 0x00000000, 0x00731524, 0x205 },
12419 { 0x00000000, 0x002d14c5, 0x000 },
12420 { 0x00000000, 0x003008a2, 0x000 },
12421 { 0x00000000, 0x00204802, 0x000 },
12422 { 0x00000000, 0x00202802, 0x000 },
12423 { 0x00000000, 0x00202003, 0x000 },
12424 { 0x00000000, 0x00802404, 0x000 },
12425 { 0x0000000f, 0x00210225, 0x000 },
12426 { 0x00000000, 0x14c00000, 0x67b },
12427 { 0x00000000, 0x002b1405, 0x000 },
12428 { 0x00000001, 0x00901625, 0x000 },
12429 { 0x00000000, 0x00600000, 0x00b },
12430 { 0x00000000, 0x00600411, 0x315 },
12431 { 0x00000000, 0x00200411, 0x000 },
12432 { 0x00000000, 0x00600811, 0x1b2 },
12433 { 0x00002256, 0x00204411, 0x000 },
12434 { 0x0000001a, 0x00294a22, 0x000 },
12435 { 0x00000000, 0xc0200000, 0x000 },
12436 { 0x00003fff, 0x002f022f, 0x000 },
12437 { 0x00000000, 0x0ce00000, 0x000 },
12438 { 0x00000000, 0xc0200400, 0x000 },
12439 { 0x0000225c, 0x00204411, 0x000 },
12440 { 0x00000003, 0x00384a21, 0x000 },
12441 { 0x0000a1fc, 0x00204411, 0x000 },
12442 { 0x00000001, 0x00204811, 0x000 },
12443 { 0x0000ffff, 0x40281220, 0x000 },
12444 { 0x00000010, 0xc0211a20, 0x000 },
12445 { 0x0000ffff, 0x40280e20, 0x000 },
12446 { 0x00000010, 0xc0211620, 0x000 },
12447 { 0x00000000, 0x00741465, 0x2bb },
12448 { 0x0001a1fd, 0x00604411, 0x2e0 },
12449 { 0x00000001, 0x00330621, 0x000 },
12450 { 0x00000000, 0x002f0221, 0x000 },
12451 { 0x00000000, 0x0cc00000, 0x219 },
12452 { 0x00003fff, 0x002f022f, 0x000 },
12453 { 0x00000000, 0x0cc00000, 0x212 },
12454 { 0x00000000, 0xc0400400, 0x001 },
12455 { 0x00000000, 0x00600000, 0x638 },
12456 { 0x00000000, 0x0040040f, 0x213 },
12457 { 0x00000000, 0x00600000, 0x624 },
12458 { 0x00000000, 0x00600000, 0x638 },
12459 { 0x00000210, 0x00600411, 0x315 },
12460 { 0x00000000, 0x00600000, 0x1a0 },
12461 { 0x00000000, 0x00600000, 0x19c },
12462 { 0x00000000, 0x00600000, 0x2bb },
12463 { 0x00000000, 0x00600000, 0x2a3 },
12464 { 0x93800000, 0x00204411, 0x000 },
12465 { 0x00000000, 0x00204808, 0x000 },
12466 { 0x00000000, 0x002f022f, 0x000 },
12467 { 0x00000000, 0x0ae00000, 0x232 },
12468 { 0x00000000, 0x00600000, 0x13a },
12469 { 0x00000000, 0x00400000, 0x236 },
12470 { 0x95000000, 0x00204411, 0x000 },
12471 { 0x00000000, 0x002f022f, 0x000 },
12472 { 0x00000000, 0x0ce00000, 0x236 },
12473 { 0x00000000, 0xc0404800, 0x233 },
12474 { 0x92000000, 0x00204411, 0x000 },
12475 { 0x00000000, 0xc0204800, 0x000 },
12476 { 0x00002256, 0x00204411, 0x000 },
12477 { 0x00000016, 0x00204811, 0x000 },
12478 { 0x0000225c, 0x00204411, 0x000 },
12479 { 0x00000003, 0x00204811, 0x000 },
12480 { 0x0000a1fc, 0x00204411, 0x000 },
12481 { 0x00000001, 0x00204811, 0x000 },
12482 { 0x0001a1fd, 0x00204411, 0x000 },
12483 { 0x00000000, 0x00600411, 0x2fb },
12484 { 0x00000000, 0xc0400400, 0x001 },
12485 { 0x00000000, 0x00600000, 0x624 },
12486 { 0x0000a00c, 0x00204411, 0x000 },
12487 { 0x00000000, 0xc0204800, 0x000 },
12488 { 0x00000000, 0xc0404800, 0x000 },
12489 { 0x00000000, 0x00600000, 0x00b },
12490 { 0x00000018, 0x40210a20, 0x000 },
12491 { 0x00000003, 0x002f0222, 0x000 },
12492 { 0x00000000, 0x0ae00000, 0x24c },
12493 { 0x00000014, 0x0020222d, 0x000 },
12494 { 0x00080101, 0x00292228, 0x000 },
12495 { 0x00000014, 0x00203628, 0x000 },
12496 { 0x0000a30c, 0x00204411, 0x000 },
12497 { 0x00000000, 0xc0204800, 0x000 },
12498 { 0x00000000, 0xc0204800, 0x000 },
12499 { 0x00000000, 0xc0404800, 0x251 },
12500 { 0x00000000, 0x00600000, 0x00b },
12501 { 0x00000010, 0x00600411, 0x315 },
12502 { 0x3f800000, 0x00200411, 0x000 },
12503 { 0x00000000, 0x00600811, 0x1b2 },
12504 { 0x0000225c, 0x00204411, 0x000 },
12505 { 0x00000003, 0x00204811, 0x000 },
12506 { 0x00000000, 0x00600000, 0x27c },
12507 { 0x00000017, 0x00201e2d, 0x000 },
12508 { 0x00000001, 0x00211e27, 0x000 },
12509 { 0x00000000, 0x14e00000, 0x26a },
12510 { 0x00000012, 0x00201e2d, 0x000 },
12511 { 0x0000ffff, 0x00281e27, 0x000 },
12512 { 0x00000000, 0x00341c27, 0x000 },
12513 { 0x00000000, 0x12c00000, 0x25f },
12514 { 0x00000000, 0x00201c11, 0x000 },
12515 { 0x00000000, 0x002f00e5, 0x000 },
12516 { 0x00000000, 0x08c00000, 0x262 },
12517 { 0x00000000, 0x00201407, 0x000 },
12518 { 0x00000012, 0x00201e2d, 0x000 },
12519 { 0x00000010, 0x00211e27, 0x000 },
12520 { 0x00000000, 0x00341c47, 0x000 },
12521 { 0x00000000, 0x12c00000, 0x267 },
12522 { 0x00000000, 0x00201c11, 0x000 },
12523 { 0x00000000, 0x002f00e6, 0x000 },
12524 { 0x00000000, 0x08c00000, 0x26a },
12525 { 0x00000000, 0x00201807, 0x000 },
12526 { 0x00000000, 0x00600000, 0x2c1 },
12527 { 0x00002256, 0x00204411, 0x000 },
12528 { 0x00000000, 0x00342023, 0x000 },
12529 { 0x00000000, 0x12c00000, 0x272 },
12530 { 0x00000000, 0x00342044, 0x000 },
12531 { 0x00000000, 0x12c00000, 0x271 },
12532 { 0x00000016, 0x00404811, 0x276 },
12533 { 0x00000018, 0x00404811, 0x276 },
12534 { 0x00000000, 0x00342044, 0x000 },
12535 { 0x00000000, 0x12c00000, 0x275 },
12536 { 0x00000017, 0x00404811, 0x276 },
12537 { 0x00000019, 0x00204811, 0x000 },
12538 { 0x0000a1fc, 0x00204411, 0x000 },
12539 { 0x00000001, 0x00204811, 0x000 },
12540 { 0x0001a1fd, 0x00604411, 0x2e9 },
12541 { 0x00003fff, 0x002f022f, 0x000 },
12542 { 0x00000000, 0x0cc00000, 0x256 },
12543 { 0x00000000, 0xc0400400, 0x001 },
12544 { 0x00000010, 0x40210620, 0x000 },
12545 { 0x0000ffff, 0xc0280a20, 0x000 },
12546 { 0x00000010, 0x40210e20, 0x000 },
12547 { 0x0000ffff, 0xc0281220, 0x000 },
12548 { 0x00000010, 0x40211620, 0x000 },
12549 { 0x0000ffff, 0xc0881a20, 0x000 },
12550 { 0x81000000, 0x00204411, 0x000 },
12551 { 0x00000001, 0x00204811, 0x000 },
12552 { 0x00042004, 0x00604411, 0x67c },
12553 { 0x00000000, 0x00600000, 0x624 },
12554 { 0x00000000, 0xc0600000, 0x2a3 },
12555 { 0x00000005, 0x00200a2d, 0x000 },
12556 { 0x00000008, 0x00220a22, 0x000 },
12557 { 0x0000002b, 0x00201a2d, 0x000 },
12558 { 0x0000001c, 0x00201e2d, 0x000 },
12559 { 0x00007000, 0x00281e27, 0x000 },
12560 { 0x00000000, 0x00311ce6, 0x000 },
12561 { 0x0000002a, 0x00201a2d, 0x000 },
12562 { 0x0000000c, 0x00221a26, 0x000 },
12563 { 0x00000000, 0x002f00e6, 0x000 },
12564 { 0x00000000, 0x06e00000, 0x292 },
12565 { 0x00000000, 0x00201c11, 0x000 },
12566 { 0x00000000, 0x00200c11, 0x000 },
12567 { 0x0000002b, 0x00203623, 0x000 },
12568 { 0x00000010, 0x00201811, 0x000 },
12569 { 0x00000000, 0x00691ce2, 0x12f },
12570 { 0x93800000, 0x00204411, 0x000 },
12571 { 0x00000000, 0x00204807, 0x000 },
12572 { 0x95000000, 0x00204411, 0x000 },
12573 { 0x00000000, 0x002f022f, 0x000 },
12574 { 0x00000000, 0x0ce00000, 0x29d },
12575 { 0x00000001, 0x00333e2f, 0x000 },
12576 { 0x00000000, 0xd9004800, 0x000 },
12577 { 0x92000000, 0x00204411, 0x000 },
12578 { 0x00000000, 0xc0204800, 0x000 },
12579 { 0x0000001c, 0x00403627, 0x000 },
12580 { 0x0000000c, 0xc0220a20, 0x000 },
12581 { 0x00000029, 0x00203622, 0x000 },
12582 { 0x00000028, 0xc0403620, 0x000 },
12583 { 0x0000a2a4, 0x00204411, 0x000 },
12584 { 0x00000009, 0x00204811, 0x000 },
12585 { 0xa1000000, 0x00204411, 0x000 },
12586 { 0x00000001, 0x00804811, 0x000 },
12587 { 0x00000021, 0x00201e2d, 0x000 },
12588 { 0x00000000, 0x002c1ce3, 0x000 },
12589 { 0x00000021, 0x00203627, 0x000 },
12590 { 0x00000022, 0x00201e2d, 0x000 },
12591 { 0x00000000, 0x002c1ce4, 0x000 },
12592 { 0x00000022, 0x00203627, 0x000 },
12593 { 0x00000023, 0x00201e2d, 0x000 },
12594 { 0x00000000, 0x003120a3, 0x000 },
12595 { 0x00000000, 0x002d1d07, 0x000 },
12596 { 0x00000023, 0x00203627, 0x000 },
12597 { 0x00000024, 0x00201e2d, 0x000 },
12598 { 0x00000000, 0x003120c4, 0x000 },
12599 { 0x00000000, 0x002d1d07, 0x000 },
12600 { 0x00000024, 0x00803627, 0x000 },
12601 { 0x00000021, 0x00203623, 0x000 },
12602 { 0x00000022, 0x00203624, 0x000 },
12603 { 0x00000000, 0x00311ca3, 0x000 },
12604 { 0x00000023, 0x00203627, 0x000 },
12605 { 0x00000000, 0x00311cc4, 0x000 },
12606 { 0x00000024, 0x00803627, 0x000 },
12607 { 0x0000001a, 0x00203627, 0x000 },
12608 { 0x0000001b, 0x00203628, 0x000 },
12609 { 0x00000017, 0x00201e2d, 0x000 },
12610 { 0x00000002, 0x00210227, 0x000 },
12611 { 0x00000000, 0x14c00000, 0x2dc },
12612 { 0x00000000, 0x00400000, 0x2d9 },
12613 { 0x0000001a, 0x00203627, 0x000 },
12614 { 0x0000001b, 0x00203628, 0x000 },
12615 { 0x00000017, 0x00201e2d, 0x000 },
12616 { 0x00000002, 0x00210227, 0x000 },
12617 { 0x00000000, 0x14e00000, 0x2d9 },
12618 { 0x00000003, 0x00210227, 0x000 },
12619 { 0x00000000, 0x14e00000, 0x2dc },
12620 { 0x00000023, 0x00201e2d, 0x000 },
12621 { 0x00000000, 0x002e00e1, 0x000 },
12622 { 0x00000000, 0x02c00000, 0x2dc },
12623 { 0x00000021, 0x00201e2d, 0x000 },
12624 { 0x00000000, 0x003120a1, 0x000 },
12625 { 0x00000000, 0x002e00e8, 0x000 },
12626 { 0x00000000, 0x06c00000, 0x2dc },
12627 { 0x00000024, 0x00201e2d, 0x000 },
12628 { 0x00000000, 0x002e00e2, 0x000 },
12629 { 0x00000000, 0x02c00000, 0x2dc },
12630 { 0x00000022, 0x00201e2d, 0x000 },
12631 { 0x00000000, 0x003120c2, 0x000 },
12632 { 0x00000000, 0x002e00e8, 0x000 },
12633 { 0x00000000, 0x06c00000, 0x2dc },
12634 { 0x00000000, 0x00600000, 0x659 },
12635 { 0x00000000, 0x00600000, 0x2b5 },
12636 { 0x00000000, 0x00400000, 0x2de },
12637 { 0x00000000, 0x00600000, 0x2b5 },
12638 { 0x00000000, 0x00600000, 0x650 },
12639 { 0x00000000, 0x00400000, 0x2de },
12640 { 0x00000000, 0x00600000, 0x2a7 },
12641 { 0x00000000, 0x00400000, 0x2de },
12642 { 0x0000001a, 0x00201e2d, 0x000 },
12643 { 0x0000001b, 0x0080222d, 0x000 },
12644 { 0x00000010, 0x00221e23, 0x000 },
12645 { 0x00000000, 0x00294887, 0x000 },
12646 { 0x00000000, 0x00311ca3, 0x000 },
12647 { 0x00000010, 0x00221e27, 0x000 },
12648 { 0x00000000, 0x00294887, 0x000 },
12649 { 0x00000010, 0x00221e23, 0x000 },
12650 { 0x00000000, 0x003120c4, 0x000 },
12651 { 0x0000ffff, 0x00282228, 0x000 },
12652 { 0x00000000, 0x00894907, 0x000 },
12653 { 0x00000010, 0x00221e23, 0x000 },
12654 { 0x00000000, 0x00294887, 0x000 },
12655 { 0x00000010, 0x00221e21, 0x000 },
12656 { 0x00000000, 0x00294847, 0x000 },
12657 { 0x00000000, 0x00311ca3, 0x000 },
12658 { 0x00000010, 0x00221e27, 0x000 },
12659 { 0x00000000, 0x00294887, 0x000 },
12660 { 0x00000000, 0x00311ca1, 0x000 },
12661 { 0x00000010, 0x00221e27, 0x000 },
12662 { 0x00000000, 0x00294847, 0x000 },
12663 { 0x00000010, 0x00221e23, 0x000 },
12664 { 0x00000000, 0x003120c4, 0x000 },
12665 { 0x0000ffff, 0x00282228, 0x000 },
12666 { 0x00000000, 0x00294907, 0x000 },
12667 { 0x00000010, 0x00221e21, 0x000 },
12668 { 0x00000000, 0x003120c2, 0x000 },
12669 { 0x0000ffff, 0x00282228, 0x000 },
12670 { 0x00000000, 0x00894907, 0x000 },
12671 { 0x00000010, 0x00221e23, 0x000 },
12672 { 0x00000000, 0x00294887, 0x000 },
12673 { 0x00000001, 0x00220a21, 0x000 },
12674 { 0x00000000, 0x003308a2, 0x000 },
12675 { 0x00000010, 0x00221e22, 0x000 },
12676 { 0x00000010, 0x00212222, 0x000 },
12677 { 0x00000000, 0x00294907, 0x000 },
12678 { 0x00000000, 0x00311ca3, 0x000 },
12679 { 0x00000010, 0x00221e27, 0x000 },
12680 { 0x00000000, 0x00294887, 0x000 },
12681 { 0x00000001, 0x00220a21, 0x000 },
12682 { 0x00000000, 0x003008a2, 0x000 },
12683 { 0x00000010, 0x00221e22, 0x000 },
12684 { 0x00000010, 0x00212222, 0x000 },
12685 { 0x00000000, 0x00294907, 0x000 },
12686 { 0x00000010, 0x00221e23, 0x000 },
12687 { 0x00000000, 0x003120c4, 0x000 },
12688 { 0x0000ffff, 0x00282228, 0x000 },
12689 { 0x00000000, 0x00294907, 0x000 },
12690 { 0x00000000, 0x003808c5, 0x000 },
12691 { 0x00000000, 0x00300841, 0x000 },
12692 { 0x00000001, 0x00220a22, 0x000 },
12693 { 0x00000000, 0x003308a2, 0x000 },
12694 { 0x00000010, 0x00221e22, 0x000 },
12695 { 0x00000010, 0x00212222, 0x000 },
12696 { 0x00000000, 0x00894907, 0x000 },
12697 { 0x00000017, 0x0020222d, 0x000 },
12698 { 0x00000000, 0x14c00000, 0x318 },
12699 { 0xffffffef, 0x00280621, 0x000 },
12700 { 0x00000014, 0x0020222d, 0x000 },
12701 { 0x0000f8e0, 0x00204411, 0x000 },
12702 { 0x00000000, 0x00294901, 0x000 },
12703 { 0x00000000, 0x00894901, 0x000 },
12704 { 0x00000000, 0x00204811, 0x000 },
12705 { 0x00000000, 0x00204811, 0x000 },
12706 { 0x060a0200, 0x00804811, 0x000 },
12707 { 0x00000000, 0xc0200000, 0x000 },
12708 { 0x97000000, 0xc0204411, 0x000 },
12709 { 0x00000000, 0xc0204811, 0x000 },
12710 { 0x8a000000, 0x00204411, 0x000 },
12711 { 0x00000000, 0x00204811, 0x000 },
12712 { 0x0000225c, 0x00204411, 0x000 },
12713 { 0x00000000, 0xc0204800, 0x000 },
12714 { 0x0000a1fc, 0x00204411, 0x000 },
12715 { 0x00000000, 0xc0204800, 0x000 },
12716 { 0x00000000, 0xc0200400, 0x000 },
12717 { 0x00000000, 0x00a0000a, 0x000 },
12718 { 0x97000000, 0x00204411, 0x000 },
12719 { 0x00000000, 0x00204811, 0x000 },
12720 { 0x8a000000, 0x00204411, 0x000 },
12721 { 0x00000000, 0x00204811, 0x000 },
12722 { 0x0000225c, 0x00204411, 0x000 },
12723 { 0x00000000, 0xc0204800, 0x000 },
12724 { 0x0000a1fc, 0x00204411, 0x000 },
12725 { 0x00000000, 0xc0204800, 0x000 },
12726 { 0x00000000, 0xc0200400, 0x000 },
12727 { 0x00000000, 0x00a0000a, 0x000 },
12728 { 0x97000000, 0x00204411, 0x000 },
12729 { 0x00000000, 0x00204811, 0x000 },
12730 { 0x8a000000, 0x00204411, 0x000 },
12731 { 0x00000000, 0x00204811, 0x000 },
12732 { 0x0000225c, 0x00204411, 0x000 },
12733 { 0x00000000, 0xc0204800, 0x000 },
12734 { 0x0000a1fc, 0x00204411, 0x000 },
12735 { 0x00000000, 0xc0204800, 0x000 },
12736 { 0x0001a1fd, 0x00204411, 0x000 },
12737 { 0x00000000, 0xd9004800, 0x000 },
12738 { 0x00000000, 0xc0200400, 0x000 },
12739 { 0x00000000, 0x00a0000a, 0x000 },
12740 { 0x00002257, 0x00204411, 0x000 },
12741 { 0x00000003, 0xc0484a20, 0x000 },
12742 { 0x0000225d, 0x00204411, 0x000 },
12743 { 0x00000000, 0xc0404800, 0x000 },
12744 { 0x00000000, 0x00600000, 0x638 },
12745 { 0x00000000, 0xc0200800, 0x000 },
12746 { 0x0000225c, 0x00204411, 0x000 },
12747 { 0x00000003, 0x00384a22, 0x000 },
12748 { 0x0000a1fc, 0x00204411, 0x000 },
12749 { 0x00000000, 0xc0204800, 0x000 },
12750 { 0x0001a1fd, 0x00204411, 0x000 },
12751 { 0x00000000, 0x002f0222, 0x000 },
12752 { 0x00000000, 0x0ce00000, 0x000 },
12753 { 0x00000000, 0x40204800, 0x000 },
12754 { 0x00000001, 0x40304a20, 0x000 },
12755 { 0x00000002, 0xc0304a20, 0x000 },
12756 { 0x00000001, 0x00530a22, 0x34b },
12757 { 0x0000003f, 0xc0280a20, 0x000 },
12758 { 0x81000000, 0x00204411, 0x000 },
12759 { 0x00000001, 0x00204811, 0x000 },
12760 { 0x000021f8, 0x00204411, 0x000 },
12761 { 0x00000018, 0x00204811, 0x000 },
12762 { 0x000421f9, 0x00604411, 0x67c },
12763 { 0x00000011, 0x00210230, 0x000 },
12764 { 0x00000000, 0x14e00000, 0x354 },
12765 { 0x00000014, 0x002f0222, 0x000 },
12766 { 0x00000000, 0x0cc00000, 0x362 },
12767 { 0x0001a2a4, 0x00204411, 0x000 },
12768 { 0x00000000, 0x00604802, 0x36a },
12769 { 0x00002100, 0x00204411, 0x000 },
12770 { 0x00000000, 0xc0204800, 0x000 },
12771 { 0x00000000, 0xc0204800, 0x000 },
12772 { 0x00000000, 0xc0204800, 0x000 },
12773 { 0x00000000, 0xc0404800, 0x000 },
12774 { 0x00000004, 0x002f0222, 0x000 },
12775 { 0x00000000, 0x0cc00000, 0x366 },
12776 { 0x0001a2a4, 0x00204411, 0x000 },
12777 { 0x00000000, 0x00404802, 0x35d },
12778 { 0x00000028, 0x002f0222, 0x000 },
12779 { 0x00000000, 0x0cc00000, 0x5b3 },
12780 { 0x0001a2a4, 0x00204411, 0x000 },
12781 { 0x00000000, 0x00404802, 0x35d },
12782 { 0x0000002c, 0x00203626, 0x000 },
12783 { 0x00000049, 0x00201811, 0x000 },
12784 { 0x0000003f, 0x00204811, 0x000 },
12785 { 0x00000001, 0x00331a26, 0x000 },
12786 { 0x00000000, 0x002f0226, 0x000 },
12787 { 0x00000000, 0x0cc00000, 0x36c },
12788 { 0x0000002c, 0x00801a2d, 0x000 },
12789 { 0x0000003f, 0xc0280a20, 0x000 },
12790 { 0x00000015, 0x002f0222, 0x000 },
12791 { 0x00000000, 0x0ce00000, 0x382 },
12792 { 0x00000006, 0x002f0222, 0x000 },
12793 { 0x00000000, 0x0ce00000, 0x3ad },
12794 { 0x00000016, 0x002f0222, 0x000 },
12795 { 0x00000000, 0x0ce00000, 0x3af },
12796 { 0x00000020, 0x002f0222, 0x000 },
12797 { 0x00000000, 0x0ce00000, 0x398 },
12798 { 0x0000000f, 0x002f0222, 0x000 },
12799 { 0x00000000, 0x0ce00000, 0x3a4 },
12800 { 0x00000010, 0x002f0222, 0x000 },
12801 { 0x00000000, 0x0ce00000, 0x3a4 },
12802 { 0x0000001e, 0x002f0222, 0x000 },
12803 { 0x00000000, 0x0ce00000, 0x38c },
12804 { 0x0000a2a4, 0x00204411, 0x000 },
12805 { 0x00000000, 0x00404802, 0x000 },
12806 { 0x08000000, 0x00290a22, 0x000 },
12807 { 0x00000003, 0x40210e20, 0x000 },
12808 { 0x0000000c, 0xc0211220, 0x000 },
12809 { 0x00080000, 0x00281224, 0x000 },
12810 { 0x00000014, 0xc0221620, 0x000 },
12811 { 0x00000000, 0x002914a4, 0x000 },
12812 { 0x0000a2a4, 0x00204411, 0x000 },
12813 { 0x00000000, 0x002948a2, 0x000 },
12814 { 0x0000a1fe, 0x00204411, 0x000 },
12815 { 0x00000000, 0x00404803, 0x000 },
12816 { 0x81000000, 0x00204411, 0x000 },
12817 { 0x00000001, 0x00204811, 0x000 },
12818 { 0x000021f8, 0x00204411, 0x000 },
12819 { 0x00000016, 0x00204811, 0x000 },
12820 { 0x000421f9, 0x00604411, 0x67c },
12821 { 0x00000015, 0x00210230, 0x000 },
12822 { 0x00000000, 0x14e00000, 0x38e },
12823 { 0x0000210e, 0x00204411, 0x000 },
12824 { 0x00000000, 0xc0204800, 0x000 },
12825 { 0x00000000, 0xc0204800, 0x000 },
12826 { 0x0000a2a4, 0x00204411, 0x000 },
12827 { 0x00000000, 0x00404802, 0x000 },
12828 { 0x81000000, 0x00204411, 0x000 },
12829 { 0x00000001, 0x00204811, 0x000 },
12830 { 0x000021f8, 0x00204411, 0x000 },
12831 { 0x00000017, 0x00204811, 0x000 },
12832 { 0x000421f9, 0x00604411, 0x67c },
12833 { 0x00000003, 0x00210230, 0x000 },
12834 { 0x00000000, 0x14e00000, 0x39a },
12835 { 0x00002108, 0x00204411, 0x000 },
12836 { 0x00000000, 0xc0204800, 0x000 },
12837 { 0x00000000, 0xc0204800, 0x000 },
12838 { 0x0000a2a4, 0x00204411, 0x000 },
12839 { 0x00000000, 0x00404802, 0x000 },
12840 { 0x0000a2a4, 0x00204411, 0x000 },
12841 { 0x00000000, 0x00204802, 0x000 },
12842 { 0x80000000, 0x00204411, 0x000 },
12843 { 0x00000000, 0x00204811, 0x000 },
12844 { 0x81000000, 0x00204411, 0x000 },
12845 { 0x00000010, 0x00204811, 0x000 },
12846 { 0x00000000, 0x00200010, 0x000 },
12847 { 0x00000000, 0x14c00000, 0x3aa },
12848 { 0x00000000, 0x00400000, 0x000 },
12849 { 0x0001a2a4, 0x00204411, 0x000 },
12850 { 0x00000006, 0x00404811, 0x000 },
12851 { 0x0001a2a4, 0x00204411, 0x000 },
12852 { 0x00000016, 0x00604811, 0x36a },
12853 { 0x00000000, 0x00400000, 0x000 },
12854 { 0x00000000, 0xc0200800, 0x000 },
12855 { 0x00000000, 0xc0200c00, 0x000 },
12856 { 0x0000001d, 0x00210223, 0x000 },
12857 { 0x00000000, 0x14e00000, 0x3c4 },
12858 { 0x81000000, 0x00204411, 0x000 },
12859 { 0x00000001, 0x00204811, 0x000 },
12860 { 0x000021f8, 0x00204411, 0x000 },
12861 { 0x00000018, 0x00204811, 0x000 },
12862 { 0x000421f9, 0x00604411, 0x67c },
12863 { 0x00000011, 0x00210230, 0x000 },
12864 { 0x00000000, 0x14e00000, 0x3b8 },
12865 { 0x00002100, 0x00204411, 0x000 },
12866 { 0x00000000, 0x00204802, 0x000 },
12867 { 0x00000000, 0x00204803, 0x000 },
12868 { 0xbabecafe, 0x00204811, 0x000 },
12869 { 0xcafebabe, 0x00204811, 0x000 },
12870 { 0x0000a2a4, 0x00204411, 0x000 },
12871 { 0x00000004, 0x00404811, 0x000 },
12872 { 0x00002170, 0x00204411, 0x000 },
12873 { 0x00000000, 0x00204802, 0x000 },
12874 { 0x00000000, 0x00204803, 0x000 },
12875 { 0x81000000, 0x00204411, 0x000 },
12876 { 0x0000000a, 0x00204811, 0x000 },
12877 { 0x00000000, 0x00200010, 0x000 },
12878 { 0x00000000, 0x14c00000, 0x3c9 },
12879 { 0x8c000000, 0x00204411, 0x000 },
12880 { 0xcafebabe, 0x00404811, 0x000 },
12881 { 0x81000000, 0x00204411, 0x000 },
12882 { 0x00000001, 0x00204811, 0x000 },
12883 { 0x00003fff, 0x40280a20, 0x000 },
12884 { 0x80000000, 0x40280e20, 0x000 },
12885 { 0x40000000, 0xc0281220, 0x000 },
12886 { 0x00040000, 0x00694622, 0x67c },
12887 { 0x00000000, 0x00201410, 0x000 },
12888 { 0x00000000, 0x002f0223, 0x000 },
12889 { 0x00000000, 0x0cc00000, 0x3d7 },
12890 { 0x00000000, 0xc0401800, 0x3da },
12891 { 0x00003fff, 0xc0281a20, 0x000 },
12892 { 0x00040000, 0x00694626, 0x67c },
12893 { 0x00000000, 0x00201810, 0x000 },
12894 { 0x00000000, 0x002f0224, 0x000 },
12895 { 0x00000000, 0x0cc00000, 0x3dd },
12896 { 0x00000000, 0xc0401c00, 0x3e0 },
12897 { 0x00003fff, 0xc0281e20, 0x000 },
12898 { 0x00040000, 0x00694627, 0x67c },
12899 { 0x00000000, 0x00201c10, 0x000 },
12900 { 0x00000000, 0x00204402, 0x000 },
12901 { 0x00000000, 0x002820c5, 0x000 },
12902 { 0x00000000, 0x004948e8, 0x000 },
12903 { 0xa5800000, 0x00200811, 0x000 },
12904 { 0x00002000, 0x00200c11, 0x000 },
12905 { 0x83000000, 0x00604411, 0x408 },
12906 { 0x00000000, 0x00204402, 0x000 },
12907 { 0x00000000, 0xc0204800, 0x000 },
12908 { 0x00000000, 0x40204800, 0x000 },
12909 { 0x0000001f, 0xc0210220, 0x000 },
12910 { 0x00000000, 0x14c00000, 0x3ed },
12911 { 0x00002010, 0x00204411, 0x000 },
12912 { 0x00008000, 0x00204811, 0x000 },
12913 { 0x0000ffff, 0xc0481220, 0x3f5 },
12914 { 0xa7800000, 0x00200811, 0x000 },
12915 { 0x0000a000, 0x00200c11, 0x000 },
12916 { 0x83000000, 0x00604411, 0x408 },
12917 { 0x00000000, 0x00204402, 0x000 },
12918 { 0x00000000, 0xc0204800, 0x000 },
12919 { 0x00000000, 0xc0204800, 0x000 },
12920 { 0x0000ffff, 0xc0281220, 0x000 },
12921 { 0x83000000, 0x00204411, 0x000 },
12922 { 0x00000000, 0x00304883, 0x000 },
12923 { 0x84000000, 0x00204411, 0x000 },
12924 { 0x00000000, 0xc0204800, 0x000 },
12925 { 0x00000000, 0x1d000000, 0x000 },
12926 { 0x83000000, 0x00604411, 0x408 },
12927 { 0x00000000, 0xc0400400, 0x001 },
12928 { 0xa9800000, 0x00200811, 0x000 },
12929 { 0x0000c000, 0x00400c11, 0x3f0 },
12930 { 0xab800000, 0x00200811, 0x000 },
12931 { 0x0000f8e0, 0x00400c11, 0x3f0 },
12932 { 0xad800000, 0x00200811, 0x000 },
12933 { 0x0000f880, 0x00400c11, 0x3f0 },
12934 { 0xb3800000, 0x00200811, 0x000 },
12935 { 0x0000f3fc, 0x00400c11, 0x3f0 },
12936 { 0xaf800000, 0x00200811, 0x000 },
12937 { 0x0000e000, 0x00400c11, 0x3f0 },
12938 { 0xb1800000, 0x00200811, 0x000 },
12939 { 0x0000f000, 0x00400c11, 0x3f0 },
12940 { 0x83000000, 0x00204411, 0x000 },
12941 { 0x00002148, 0x00204811, 0x000 },
12942 { 0x84000000, 0x00204411, 0x000 },
12943 { 0x00000000, 0xc0204800, 0x000 },
12944 { 0x00000000, 0x1d000000, 0x000 },
12945 { 0x00000000, 0x00800000, 0x000 },
12946 { 0x01182000, 0xc0304620, 0x000 },
12947 { 0x00000000, 0xd9004800, 0x000 },
12948 { 0x00000000, 0xc0200400, 0x000 },
12949 { 0x00000000, 0x00a0000a, 0x000 },
12950 { 0x0218a000, 0xc0304620, 0x000 },
12951 { 0x00000000, 0xd9004800, 0x000 },
12952 { 0x00000000, 0xc0200400, 0x000 },
12953 { 0x00000000, 0x00a0000a, 0x000 },
12954 { 0x0318c000, 0xc0304620, 0x000 },
12955 { 0x00000000, 0xd9004800, 0x000 },
12956 { 0x00000000, 0xc0200400, 0x000 },
12957 { 0x00000000, 0x00a0000a, 0x000 },
12958 { 0x0418f8e0, 0xc0304620, 0x000 },
12959 { 0x00000000, 0xd9004800, 0x000 },
12960 { 0x00000000, 0xc0200400, 0x000 },
12961 { 0x00000000, 0x00a0000a, 0x000 },
12962 { 0x0518f880, 0xc0304620, 0x000 },
12963 { 0x00000000, 0xd9004800, 0x000 },
12964 { 0x00000000, 0xc0200400, 0x000 },
12965 { 0x00000000, 0x00a0000a, 0x000 },
12966 { 0x0618e000, 0xc0304620, 0x000 },
12967 { 0x00000000, 0xd9004800, 0x000 },
12968 { 0x00000000, 0xc0200400, 0x000 },
12969 { 0x00000000, 0x00a0000a, 0x000 },
12970 { 0x0718f000, 0xc0304620, 0x000 },
12971 { 0x00000000, 0xd9004800, 0x000 },
12972 { 0x00000000, 0xc0200400, 0x000 },
12973 { 0x00000000, 0x00a0000a, 0x000 },
12974 { 0x0818f3fc, 0xc0304620, 0x000 },
12975 { 0x00000000, 0xd9004800, 0x000 },
12976 { 0x00000000, 0xc0200400, 0x000 },
12977 { 0x00000000, 0x00a0000a, 0x000 },
12978 { 0x00000030, 0x00200a2d, 0x000 },
12979 { 0x00000000, 0xc0290c40, 0x000 },
12980 { 0x00000030, 0x00203623, 0x000 },
12981 { 0x00000000, 0xc0200400, 0x000 },
12982 { 0x00000000, 0x00a0000a, 0x000 },
12983 { 0x86000000, 0x00204411, 0x000 },
12984 { 0x00000000, 0x00404801, 0x000 },
12985 { 0x85000000, 0xc0204411, 0x000 },
12986 { 0x00000000, 0x00404801, 0x000 },
12987 { 0x0000217c, 0x00204411, 0x000 },
12988 { 0x00000000, 0xc0204800, 0x000 },
12989 { 0x00000000, 0xc0204800, 0x000 },
12990 { 0x00000000, 0xc0204800, 0x000 },
12991 { 0x81000000, 0x00204411, 0x000 },
12992 { 0x00000001, 0x00204811, 0x000 },
12993 { 0x00000000, 0xc0200800, 0x000 },
12994 { 0x00000000, 0x17000000, 0x000 },
12995 { 0x0004217f, 0x00604411, 0x67c },
12996 { 0x0000001f, 0x00210230, 0x000 },
12997 { 0x00000000, 0x14c00000, 0x000 },
12998 { 0x00000000, 0x00404c02, 0x43e },
12999 { 0x00000000, 0xc0200c00, 0x000 },
13000 { 0x00000000, 0xc0201000, 0x000 },
13001 { 0x00000000, 0xc0201400, 0x000 },
13002 { 0x00000000, 0xc0201800, 0x000 },
13003 { 0x00000000, 0xc0201c00, 0x000 },
13004 { 0x00007f00, 0x00280a21, 0x000 },
13005 { 0x00004500, 0x002f0222, 0x000 },
13006 { 0x00000000, 0x0ce00000, 0x44c },
13007 { 0x00000000, 0xc0202000, 0x000 },
13008 { 0x00000000, 0x17000000, 0x000 },
13009 { 0x00000010, 0x00280a23, 0x000 },
13010 { 0x00000010, 0x002f0222, 0x000 },
13011 { 0x00000000, 0x0ce00000, 0x454 },
13012 { 0x81000000, 0x00204411, 0x000 },
13013 { 0x00000001, 0x00204811, 0x000 },
13014 { 0x00040000, 0x00694624, 0x67c },
13015 { 0x00000000, 0x00400000, 0x459 },
13016 { 0x81000000, 0x00204411, 0x000 },
13017 { 0x00000000, 0x00204811, 0x000 },
13018 { 0x0000216d, 0x00204411, 0x000 },
13019 { 0x00000000, 0x00204804, 0x000 },
13020 { 0x00000000, 0x00604805, 0x681 },
13021 { 0x00000000, 0x002824f0, 0x000 },
13022 { 0x00000007, 0x00280a23, 0x000 },
13023 { 0x00000001, 0x002f0222, 0x000 },
13024 { 0x00000000, 0x0ae00000, 0x460 },
13025 { 0x00000000, 0x002f00c9, 0x000 },
13026 { 0x00000000, 0x04e00000, 0x479 },
13027 { 0x00000000, 0x00400000, 0x486 },
13028 { 0x00000002, 0x002f0222, 0x000 },
13029 { 0x00000000, 0x0ae00000, 0x465 },
13030 { 0x00000000, 0x002f00c9, 0x000 },
13031 { 0x00000000, 0x02e00000, 0x479 },
13032 { 0x00000000, 0x00400000, 0x486 },
13033 { 0x00000003, 0x002f0222, 0x000 },
13034 { 0x00000000, 0x0ae00000, 0x46a },
13035 { 0x00000000, 0x002f00c9, 0x000 },
13036 { 0x00000000, 0x0ce00000, 0x479 },
13037 { 0x00000000, 0x00400000, 0x486 },
13038 { 0x00000004, 0x002f0222, 0x000 },
13039 { 0x00000000, 0x0ae00000, 0x46f },
13040 { 0x00000000, 0x002f00c9, 0x000 },
13041 { 0x00000000, 0x0ae00000, 0x479 },
13042 { 0x00000000, 0x00400000, 0x486 },
13043 { 0x00000005, 0x002f0222, 0x000 },
13044 { 0x00000000, 0x0ae00000, 0x474 },
13045 { 0x00000000, 0x002f00c9, 0x000 },
13046 { 0x00000000, 0x06e00000, 0x479 },
13047 { 0x00000000, 0x00400000, 0x486 },
13048 { 0x00000006, 0x002f0222, 0x000 },
13049 { 0x00000000, 0x0ae00000, 0x479 },
13050 { 0x00000000, 0x002f00c9, 0x000 },
13051 { 0x00000000, 0x08e00000, 0x479 },
13052 { 0x00000000, 0x00400000, 0x486 },
13053 { 0x00007f00, 0x00280a21, 0x000 },
13054 { 0x00004500, 0x002f0222, 0x000 },
13055 { 0x00000000, 0x0ae00000, 0x000 },
13056 { 0x00000008, 0x00210a23, 0x000 },
13057 { 0x00000000, 0x14c00000, 0x483 },
13058 { 0x00002169, 0x00204411, 0x000 },
13059 { 0x00000000, 0xc0204800, 0x000 },
13060 { 0x00000000, 0xc0204800, 0x000 },
13061 { 0x00000000, 0xc0204800, 0x000 },
13062 { 0xcafebabe, 0x00404811, 0x000 },
13063 { 0x00000000, 0xc0204400, 0x000 },
13064 { 0x00000000, 0xc0200000, 0x000 },
13065 { 0x00000000, 0xc0404800, 0x000 },
13066 { 0x00007f00, 0x00280a21, 0x000 },
13067 { 0x00004500, 0x002f0222, 0x000 },
13068 { 0x00000000, 0x0ae00000, 0x48c },
13069 { 0x00000000, 0xc0200000, 0x000 },
13070 { 0x00000000, 0xc0200000, 0x000 },
13071 { 0x00000000, 0xc0400000, 0x000 },
13072 { 0x00000000, 0x00404c08, 0x44c },
13073 { 0x00000000, 0xc0200800, 0x000 },
13074 { 0x00000010, 0x40210e20, 0x000 },
13075 { 0x00000011, 0x40211220, 0x000 },
13076 { 0x00000012, 0x40211620, 0x000 },
13077 { 0x00002169, 0x00204411, 0x000 },
13078 { 0x00000000, 0x00204802, 0x000 },
13079 { 0x00000000, 0x00210225, 0x000 },
13080 { 0x00000000, 0x14e00000, 0x496 },
13081 { 0x00040000, 0xc0494a20, 0x497 },
13082 { 0xfffbffff, 0xc0284a20, 0x000 },
13083 { 0x00000000, 0x00210223, 0x000 },
13084 { 0x00000000, 0x14e00000, 0x4a3 },
13085 { 0x00000000, 0xc0204800, 0x000 },
13086 { 0x00000000, 0xc0204800, 0x000 },
13087 { 0x00000000, 0x00210224, 0x000 },
13088 { 0x00000000, 0x14c00000, 0x000 },
13089 { 0x81000000, 0x00204411, 0x000 },
13090 { 0x0000000c, 0x00204811, 0x000 },
13091 { 0x00000000, 0x00200010, 0x000 },
13092 { 0x00000000, 0x14c00000, 0x49f },
13093 { 0xa0000000, 0x00204411, 0x000 },
13094 { 0xcafebabe, 0x00404811, 0x000 },
13095 { 0x81000000, 0x00204411, 0x000 },
13096 { 0x00000004, 0x00204811, 0x000 },
13097 { 0x0000216b, 0x00204411, 0x000 },
13098 { 0x00000000, 0xc0204810, 0x000 },
13099 { 0x81000000, 0x00204411, 0x000 },
13100 { 0x00000005, 0x00204811, 0x000 },
13101 { 0x0000216c, 0x00204411, 0x000 },
13102 { 0x00000000, 0xc0204810, 0x000 },
13103 { 0x00000000, 0x002f0224, 0x000 },
13104 { 0x00000000, 0x0ce00000, 0x000 },
13105 { 0x00000000, 0x00400000, 0x49d },
13106 { 0x00000000, 0xc0210a20, 0x000 },
13107 { 0x00000000, 0x14c00000, 0x4b6 },
13108 { 0x81000000, 0x00204411, 0x000 },
13109 { 0x00000000, 0x00204811, 0x000 },
13110 { 0x0000216d, 0x00204411, 0x000 },
13111 { 0x00000000, 0xc0204800, 0x000 },
13112 { 0x00000000, 0xc0604800, 0x681 },
13113 { 0x00000000, 0x00400000, 0x4ba },
13114 { 0x81000000, 0x00204411, 0x000 },
13115 { 0x00000001, 0x00204811, 0x000 },
13116 { 0x00040000, 0xc0294620, 0x000 },
13117 { 0x00000000, 0xc0600000, 0x67c },
13118 { 0x00000001, 0x00210222, 0x000 },
13119 { 0x00000000, 0x14c00000, 0x4c1 },
13120 { 0x00002169, 0x00204411, 0x000 },
13121 { 0x00000000, 0xc0204800, 0x000 },
13122 { 0x00000000, 0xc0204800, 0x000 },
13123 { 0x00000000, 0x00204810, 0x000 },
13124 { 0xcafebabe, 0x00404811, 0x000 },
13125 { 0x00000000, 0xc0204400, 0x000 },
13126 { 0x00000000, 0xc0404810, 0x000 },
13127 { 0x81000000, 0x00204411, 0x000 },
13128 { 0x00000001, 0x00204811, 0x000 },
13129 { 0x000021f8, 0x00204411, 0x000 },
13130 { 0x0000000e, 0x00204811, 0x000 },
13131 { 0x000421f9, 0x00604411, 0x67c },
13132 { 0x00000000, 0x00210230, 0x000 },
13133 { 0x00000000, 0x14c00000, 0x4c3 },
13134 { 0x00002180, 0x00204411, 0x000 },
13135 { 0x00000000, 0xc0204800, 0x000 },
13136 { 0x00000000, 0xc0200000, 0x000 },
13137 { 0x00000000, 0xc0204800, 0x000 },
13138 { 0x00000000, 0xc0200000, 0x000 },
13139 { 0x00000000, 0xc0404800, 0x000 },
13140 { 0x00000003, 0x00333e2f, 0x000 },
13141 { 0x00000001, 0x00210221, 0x000 },
13142 { 0x00000000, 0x14e00000, 0x4f3 },
13143 { 0x0000002c, 0x00200a2d, 0x000 },
13144 { 0x00040000, 0x18e00c11, 0x4e2 },
13145 { 0x00000001, 0x00333e2f, 0x000 },
13146 { 0x00002169, 0x00204411, 0x000 },
13147 { 0x00000000, 0x00204802, 0x000 },
13148 { 0x00000000, 0x00204803, 0x000 },
13149 { 0x00000008, 0x00300a22, 0x000 },
13150 { 0x00000000, 0xc0204800, 0x000 },
13151 { 0x00000000, 0xc0204800, 0x000 },
13152 { 0x00002169, 0x00204411, 0x000 },
13153 { 0x00000000, 0x00204802, 0x000 },
13154 { 0x00000000, 0x00204803, 0x000 },
13155 { 0x00000008, 0x00300a22, 0x000 },
13156 { 0x00000000, 0xc0204800, 0x000 },
13157 { 0x00000000, 0xd8c04800, 0x4d6 },
13158 { 0x00002169, 0x00204411, 0x000 },
13159 { 0x00000000, 0x00204802, 0x000 },
13160 { 0x00000000, 0x00204803, 0x000 },
13161 { 0x00000008, 0x00300a22, 0x000 },
13162 { 0x00000000, 0xc0204800, 0x000 },
13163 { 0x00000000, 0xc0204800, 0x000 },
13164 { 0x0000002d, 0x0020122d, 0x000 },
13165 { 0x00000000, 0x00290c83, 0x000 },
13166 { 0x00002169, 0x00204411, 0x000 },
13167 { 0x00000000, 0x00204802, 0x000 },
13168 { 0x00000000, 0x00204803, 0x000 },
13169 { 0x00000008, 0x00300a22, 0x000 },
13170 { 0x00000000, 0xc0204800, 0x000 },
13171 { 0x00000000, 0xc0204800, 0x000 },
13172 { 0x00000011, 0x00210224, 0x000 },
13173 { 0x00000000, 0x14c00000, 0x000 },
13174 { 0x00000000, 0x00400000, 0x49d },
13175 { 0x0000002c, 0xc0203620, 0x000 },
13176 { 0x0000002d, 0xc0403620, 0x000 },
13177 { 0x0000000f, 0x00210221, 0x000 },
13178 { 0x00000000, 0x14c00000, 0x4f8 },
13179 { 0x00000000, 0x00600000, 0x00b },
13180 { 0x00000000, 0xd9000000, 0x000 },
13181 { 0x00000000, 0xc0400400, 0x001 },
13182 { 0xb5000000, 0x00204411, 0x000 },
13183 { 0x00002000, 0x00204811, 0x000 },
13184 { 0xb6000000, 0x00204411, 0x000 },
13185 { 0x0000a000, 0x00204811, 0x000 },
13186 { 0xb7000000, 0x00204411, 0x000 },
13187 { 0x0000c000, 0x00204811, 0x000 },
13188 { 0xb8000000, 0x00204411, 0x000 },
13189 { 0x0000f8e0, 0x00204811, 0x000 },
13190 { 0xb9000000, 0x00204411, 0x000 },
13191 { 0x0000f880, 0x00204811, 0x000 },
13192 { 0xba000000, 0x00204411, 0x000 },
13193 { 0x0000e000, 0x00204811, 0x000 },
13194 { 0xbb000000, 0x00204411, 0x000 },
13195 { 0x0000f000, 0x00204811, 0x000 },
13196 { 0xbc000000, 0x00204411, 0x000 },
13197 { 0x0000f3fc, 0x00204811, 0x000 },
13198 { 0x81000000, 0x00204411, 0x000 },
13199 { 0x00000002, 0x00204811, 0x000 },
13200 { 0x000000ff, 0x00280e30, 0x000 },
13201 { 0x00000000, 0x002f0223, 0x000 },
13202 { 0x00000000, 0x0cc00000, 0x50c },
13203 { 0x00000000, 0xc0200800, 0x000 },
13204 { 0x00000000, 0x14c00000, 0x521 },
13205 { 0x00000000, 0x00200c11, 0x000 },
13206 { 0x0000001c, 0x00203623, 0x000 },
13207 { 0x0000002b, 0x00203623, 0x000 },
13208 { 0x00000029, 0x00203623, 0x000 },
13209 { 0x00000028, 0x00203623, 0x000 },
13210 { 0x00000017, 0x00203623, 0x000 },
13211 { 0x00000025, 0x00203623, 0x000 },
13212 { 0x00000026, 0x00203623, 0x000 },
13213 { 0x00000015, 0x00203623, 0x000 },
13214 { 0x00000016, 0x00203623, 0x000 },
13215 { 0xffffe000, 0x00200c11, 0x000 },
13216 { 0x00000021, 0x00203623, 0x000 },
13217 { 0x00000022, 0x00203623, 0x000 },
13218 { 0x00001fff, 0x00200c11, 0x000 },
13219 { 0x00000023, 0x00203623, 0x000 },
13220 { 0x00000024, 0x00203623, 0x000 },
13221 { 0xf1ffffff, 0x00283a2e, 0x000 },
13222 { 0x0000001a, 0xc0220e20, 0x000 },
13223 { 0x00000000, 0x0029386e, 0x000 },
13224 { 0x81000000, 0x00204411, 0x000 },
13225 { 0x00000006, 0x00204811, 0x000 },
13226 { 0x0000002a, 0x40203620, 0x000 },
13227 { 0x87000000, 0x00204411, 0x000 },
13228 { 0x00000000, 0xc0204800, 0x000 },
13229 { 0x0000a1f4, 0x00204411, 0x000 },
13230 { 0x00000000, 0x00204810, 0x000 },
13231 { 0x00000000, 0x00200c11, 0x000 },
13232 { 0x00000030, 0x00203623, 0x000 },
13233 { 0x9d000000, 0x00204411, 0x000 },
13234 { 0x0000001f, 0x40214a20, 0x000 },
13235 { 0x96000000, 0x00204411, 0x000 },
13236 { 0x00000000, 0xc0204800, 0x000 },
13237 { 0x00000000, 0xc0200c00, 0x000 },
13238 { 0x00000000, 0xc0201000, 0x000 },
13239 { 0x0000001f, 0x00211624, 0x000 },
13240 { 0x00000000, 0x14c00000, 0x000 },
13241 { 0x0000001d, 0x00203623, 0x000 },
13242 { 0x00000003, 0x00281e23, 0x000 },
13243 { 0x00000008, 0x00222223, 0x000 },
13244 { 0xfffff000, 0x00282228, 0x000 },
13245 { 0x00000000, 0x002920e8, 0x000 },
13246 { 0x0000001f, 0x00203628, 0x000 },
13247 { 0x00000018, 0x00211e23, 0x000 },
13248 { 0x00000020, 0x00203627, 0x000 },
13249 { 0x00000002, 0x00221624, 0x000 },
13250 { 0x00000000, 0x003014a8, 0x000 },
13251 { 0x0000001e, 0x00203625, 0x000 },
13252 { 0x00000003, 0x00211a24, 0x000 },
13253 { 0x10000000, 0x00281a26, 0x000 },
13254 { 0xefffffff, 0x00283a2e, 0x000 },
13255 { 0x00000000, 0x004938ce, 0x66a },
13256 { 0x00000001, 0x40280a20, 0x000 },
13257 { 0x00000006, 0x40280e20, 0x000 },
13258 { 0x00000300, 0xc0281220, 0x000 },
13259 { 0x00000008, 0x00211224, 0x000 },
13260 { 0x00000000, 0xc0201620, 0x000 },
13261 { 0x00000000, 0xc0201a20, 0x000 },
13262 { 0x00000000, 0x00210222, 0x000 },
13263 { 0x00000000, 0x14c00000, 0x559 },
13264 { 0x81000000, 0x00204411, 0x000 },
13265 { 0x00000001, 0x00204811, 0x000 },
13266 { 0x00002258, 0x00300a24, 0x000 },
13267 { 0x00040000, 0x00694622, 0x67c },
13268 { 0x00002169, 0x00204411, 0x000 },
13269 { 0x00000000, 0x00204805, 0x000 },
13270 { 0x00020000, 0x00294a26, 0x000 },
13271 { 0x00000000, 0x00204810, 0x000 },
13272 { 0xcafebabe, 0x00204811, 0x000 },
13273 { 0x00000002, 0x002f0223, 0x000 },
13274 { 0x00000000, 0x0cc00000, 0x561 },
13275 { 0x00000000, 0xc0201c10, 0x000 },
13276 { 0x00000000, 0xc0400000, 0x56f },
13277 { 0x00000002, 0x002f0223, 0x000 },
13278 { 0x00000000, 0x0cc00000, 0x561 },
13279 { 0x81000000, 0x00204411, 0x000 },
13280 { 0x00000001, 0x00204811, 0x000 },
13281 { 0x00002258, 0x00300a24, 0x000 },
13282 { 0x00040000, 0x00694622, 0x67c },
13283 { 0x00000000, 0xc0201c10, 0x000 },
13284 { 0x00000000, 0xc0400000, 0x56f },
13285 { 0x00000000, 0x002f0223, 0x000 },
13286 { 0x00000000, 0x0cc00000, 0x565 },
13287 { 0x00000000, 0xc0201c00, 0x000 },
13288 { 0x00000000, 0xc0400000, 0x56f },
13289 { 0x00000004, 0x002f0223, 0x000 },
13290 { 0x00000000, 0x0cc00000, 0x56d },
13291 { 0x81000000, 0x00204411, 0x000 },
13292 { 0x00000000, 0x00204811, 0x000 },
13293 { 0x0000216d, 0x00204411, 0x000 },
13294 { 0x00000000, 0xc0204800, 0x000 },
13295 { 0x00000000, 0xc0604800, 0x681 },
13296 { 0x00000000, 0x00401c10, 0x56f },
13297 { 0x00000000, 0xc0200000, 0x000 },
13298 { 0x00000000, 0xc0400000, 0x000 },
13299 { 0x00000000, 0x0ee00000, 0x571 },
13300 { 0x00000000, 0x00600000, 0x5bc },
13301 { 0x00000000, 0x002f0224, 0x000 },
13302 { 0x00000000, 0x0cc00000, 0x582 },
13303 { 0x0000a2b7, 0x00204411, 0x000 },
13304 { 0x00000000, 0x00204807, 0x000 },
13305 { 0x81000000, 0x00204411, 0x000 },
13306 { 0x00000001, 0x00204811, 0x000 },
13307 { 0x0004a2b6, 0x00604411, 0x67c },
13308 { 0x0000001a, 0x00212230, 0x000 },
13309 { 0x00000006, 0x00222630, 0x000 },
13310 { 0x00042004, 0x00604411, 0x67c },
13311 { 0x0000a2c4, 0x00204411, 0x000 },
13312 { 0x00000000, 0x003048e9, 0x000 },
13313 { 0x00000000, 0x00e00000, 0x580 },
13314 { 0x0000a2d1, 0x00204411, 0x000 },
13315 { 0x00000000, 0x00404808, 0x000 },
13316 { 0x0000a2d1, 0x00204411, 0x000 },
13317 { 0x00000001, 0x00504a28, 0x000 },
13318 { 0x00000001, 0x002f0224, 0x000 },
13319 { 0x00000000, 0x0cc00000, 0x593 },
13320 { 0x0000a2bb, 0x00204411, 0x000 },
13321 { 0x00000000, 0x00204807, 0x000 },
13322 { 0x81000000, 0x00204411, 0x000 },
13323 { 0x00000001, 0x00204811, 0x000 },
13324 { 0x0004a2ba, 0x00604411, 0x67c },
13325 { 0x0000001a, 0x00212230, 0x000 },
13326 { 0x00000006, 0x00222630, 0x000 },
13327 { 0x00042004, 0x00604411, 0x67c },
13328 { 0x0000a2c5, 0x00204411, 0x000 },
13329 { 0x00000000, 0x003048e9, 0x000 },
13330 { 0x00000000, 0x00e00000, 0x591 },
13331 { 0x0000a2d2, 0x00204411, 0x000 },
13332 { 0x00000000, 0x00404808, 0x000 },
13333 { 0x0000a2d2, 0x00204411, 0x000 },
13334 { 0x00000001, 0x00504a28, 0x000 },
13335 { 0x00000002, 0x002f0224, 0x000 },
13336 { 0x00000000, 0x0cc00000, 0x5a4 },
13337 { 0x0000a2bf, 0x00204411, 0x000 },
13338 { 0x00000000, 0x00204807, 0x000 },
13339 { 0x81000000, 0x00204411, 0x000 },
13340 { 0x00000001, 0x00204811, 0x000 },
13341 { 0x0004a2be, 0x00604411, 0x67c },
13342 { 0x0000001a, 0x00212230, 0x000 },
13343 { 0x00000006, 0x00222630, 0x000 },
13344 { 0x00042004, 0x00604411, 0x67c },
13345 { 0x0000a2c6, 0x00204411, 0x000 },
13346 { 0x00000000, 0x003048e9, 0x000 },
13347 { 0x00000000, 0x00e00000, 0x5a2 },
13348 { 0x0000a2d3, 0x00204411, 0x000 },
13349 { 0x00000000, 0x00404808, 0x000 },
13350 { 0x0000a2d3, 0x00204411, 0x000 },
13351 { 0x00000001, 0x00504a28, 0x000 },
13352 { 0x0000a2c3, 0x00204411, 0x000 },
13353 { 0x00000000, 0x00204807, 0x000 },
13354 { 0x81000000, 0x00204411, 0x000 },
13355 { 0x00000001, 0x00204811, 0x000 },
13356 { 0x0004a2c2, 0x00604411, 0x67c },
13357 { 0x0000001a, 0x00212230, 0x000 },
13358 { 0x00000006, 0x00222630, 0x000 },
13359 { 0x00042004, 0x00604411, 0x67c },
13360 { 0x0000a2c7, 0x00204411, 0x000 },
13361 { 0x00000000, 0x003048e9, 0x000 },
13362 { 0x00000000, 0x00e00000, 0x5b1 },
13363 { 0x0000a2d4, 0x00204411, 0x000 },
13364 { 0x00000000, 0x00404808, 0x000 },
13365 { 0x0000a2d4, 0x00204411, 0x000 },
13366 { 0x00000001, 0x00504a28, 0x000 },
13367 { 0x85000000, 0x00204411, 0x000 },
13368 { 0x00000000, 0x00204801, 0x000 },
13369 { 0x0000304a, 0x00204411, 0x000 },
13370 { 0x01000000, 0x00204811, 0x000 },
13371 { 0x00000000, 0x00400000, 0x5b7 },
13372 { 0xa4000000, 0xc0204411, 0x000 },
13373 { 0x00000000, 0xc0404800, 0x000 },
13374 { 0x00000000, 0xc0600000, 0x5bc },
13375 { 0x00000000, 0xc0400400, 0x001 },
13376 { 0x0000002c, 0x00203621, 0x000 },
13377 { 0x81000000, 0x00204411, 0x000 },
13378 { 0x00000006, 0x00204811, 0x000 },
13379 { 0x00000000, 0x002f0230, 0x000 },
13380 { 0x00000000, 0x0cc00000, 0x5c3 },
13381 { 0x00000000, 0x00200411, 0x000 },
13382 { 0x00000030, 0x00403621, 0x5d6 },
13383 { 0x00000030, 0x0020062d, 0x000 },
13384 { 0x00007e00, 0x00280621, 0x000 },
13385 { 0x00000000, 0x002f0221, 0x000 },
13386 { 0x00000000, 0x0ce00000, 0x5d6 },
13387 { 0x81000000, 0x00204411, 0x000 },
13388 { 0x00000001, 0x00204811, 0x000 },
13389 { 0x0004a092, 0x00604411, 0x67c },
13390 { 0x00000031, 0x00203630, 0x000 },
13391 { 0x0004a093, 0x00604411, 0x67c },
13392 { 0x00000032, 0x00203630, 0x000 },
13393 { 0x0004a2b6, 0x00604411, 0x67c },
13394 { 0x00000033, 0x00203630, 0x000 },
13395 { 0x0004a2ba, 0x00604411, 0x67c },
13396 { 0x00000034, 0x00203630, 0x000 },
13397 { 0x0004a2be, 0x00604411, 0x67c },
13398 { 0x00000035, 0x00203630, 0x000 },
13399 { 0x0004a2c2, 0x00604411, 0x67c },
13400 { 0x00000036, 0x00203630, 0x000 },
13401 { 0x00042004, 0x00604411, 0x67c },
13402 { 0x0001a2a4, 0x00204411, 0x000 },
13403 { 0x0000003f, 0x00204811, 0x000 },
13404 { 0x0000003f, 0x00204811, 0x000 },
13405 { 0x0000003f, 0x00204811, 0x000 },
13406 { 0x0000003f, 0x00204811, 0x000 },
13407 { 0x00000005, 0x00204811, 0x000 },
13408 { 0x0000a1f4, 0x00204411, 0x000 },
13409 { 0x00000000, 0x00204811, 0x000 },
13410 { 0x88000000, 0x00204411, 0x000 },
13411 { 0x00000001, 0x00204811, 0x000 },
13412 { 0x81000000, 0x00204411, 0x000 },
13413 { 0x00000006, 0x00204811, 0x000 },
13414 { 0x00000001, 0x002f0230, 0x000 },
13415 { 0x00000000, 0x0ce00000, 0x61f },
13416 { 0x00000030, 0x0020062d, 0x000 },
13417 { 0x00000000, 0x002f0221, 0x000 },
13418 { 0x00000000, 0x0ce00000, 0x61f },
13419 { 0x81000000, 0x00204411, 0x000 },
13420 { 0x00000001, 0x00204811, 0x000 },
13421 { 0x00007e00, 0x00280621, 0x000 },
13422 { 0x00000000, 0x002f0221, 0x000 },
13423 { 0x00000000, 0x0ce00000, 0x5f8 },
13424 { 0x0000a092, 0x00204411, 0x000 },
13425 { 0x00000031, 0x00204a2d, 0x000 },
13426 { 0x0000a093, 0x00204411, 0x000 },
13427 { 0x00000032, 0x00204a2d, 0x000 },
13428 { 0x0000a2b6, 0x00204411, 0x000 },
13429 { 0x00000033, 0x00204a2d, 0x000 },
13430 { 0x0000a2ba, 0x00204411, 0x000 },
13431 { 0x00000034, 0x00204a2d, 0x000 },
13432 { 0x0000a2be, 0x00204411, 0x000 },
13433 { 0x00000035, 0x00204a2d, 0x000 },
13434 { 0x0000a2c2, 0x00204411, 0x000 },
13435 { 0x00000036, 0x00204a2d, 0x000 },
13436 { 0x00000030, 0x0020062d, 0x000 },
13437 { 0x000001ff, 0x00280621, 0x000 },
13438 { 0x00000000, 0x002f0221, 0x000 },
13439 { 0x00000000, 0x0ce00000, 0x61e },
13440 { 0x00000000, 0x00210221, 0x000 },
13441 { 0x00000000, 0x14c00000, 0x601 },
13442 { 0x0004a003, 0x00604411, 0x67c },
13443 { 0x0000a003, 0x00204411, 0x000 },
13444 { 0x00000000, 0x00204810, 0x000 },
13445 { 0x00000001, 0x00210621, 0x000 },
13446 { 0x00000000, 0x14c00000, 0x606 },
13447 { 0x0004a010, 0x00604411, 0x67c },
13448 { 0x0000a010, 0x00204411, 0x000 },
13449 { 0x00000000, 0x00204810, 0x000 },
13450 { 0x00000001, 0x00210621, 0x000 },
13451 { 0x00000000, 0x002f0221, 0x000 },
13452 { 0x00000000, 0x0ce00000, 0x61e },
13453 { 0x0004a011, 0x00604411, 0x67c },
13454 { 0x0000a011, 0x00204411, 0x000 },
13455 { 0x00000000, 0x00204810, 0x000 },
13456 { 0x0004a012, 0x00604411, 0x67c },
13457 { 0x0000a012, 0x00204411, 0x000 },
13458 { 0x00000000, 0x00204810, 0x000 },
13459 { 0x0004a013, 0x00604411, 0x67c },
13460 { 0x0000a013, 0x00204411, 0x000 },
13461 { 0x00000000, 0x00204810, 0x000 },
13462 { 0x0004a014, 0x00604411, 0x67c },
13463 { 0x0000a014, 0x00204411, 0x000 },
13464 { 0x00000000, 0x00204810, 0x000 },
13465 { 0x0004a015, 0x00604411, 0x67c },
13466 { 0x0000a015, 0x00204411, 0x000 },
13467 { 0x00000000, 0x00204810, 0x000 },
13468 { 0x0004a016, 0x00604411, 0x67c },
13469 { 0x0000a016, 0x00204411, 0x000 },
13470 { 0x00000000, 0x00204810, 0x000 },
13471 { 0x0004a017, 0x00604411, 0x67c },
13472 { 0x0000a017, 0x00204411, 0x000 },
13473 { 0x00000000, 0x00204810, 0x000 },
13474 { 0x00042004, 0x00604411, 0x67c },
13475 { 0x0000002c, 0x0080062d, 0x000 },
13476 { 0xff000000, 0x00204411, 0x000 },
13477 { 0x00000000, 0x00204811, 0x000 },
13478 { 0x00000001, 0x00204811, 0x000 },
13479 { 0x00000002, 0x00804811, 0x000 },
13480 { 0x00000000, 0x0ee00000, 0x630 },
13481 { 0x00000030, 0x0020062d, 0x000 },
13482 { 0x00000002, 0x00280621, 0x000 },
13483 { 0x00000000, 0x002f0221, 0x000 },
13484 { 0x00000000, 0x0ce00000, 0x62e },
13485 { 0x81000000, 0x00204411, 0x000 },
13486 { 0x00000001, 0x00204811, 0x000 },
13487 { 0x00042004, 0x00604411, 0x67c },
13488 { 0x00001000, 0x00200811, 0x000 },
13489 { 0x0000002b, 0x00203622, 0x000 },
13490 { 0x00000000, 0x00600000, 0x634 },
13491 { 0x00000000, 0x00600000, 0x5bc },
13492 { 0x98000000, 0x00204411, 0x000 },
13493 { 0x00000000, 0x00804811, 0x000 },
13494 { 0x00000000, 0xc0600000, 0x634 },
13495 { 0x00000000, 0xc0400400, 0x001 },
13496 { 0x0000a2a4, 0x00204411, 0x000 },
13497 { 0x00000022, 0x00204811, 0x000 },
13498 { 0x89000000, 0x00204411, 0x000 },
13499 { 0x00000001, 0x00404811, 0x620 },
13500 { 0x97000000, 0x00204411, 0x000 },
13501 { 0x00000000, 0x00204811, 0x000 },
13502 { 0x8a000000, 0x00204411, 0x000 },
13503 { 0x00000000, 0x00404811, 0x620 },
13504 { 0x00000000, 0x00600000, 0x64d },
13505 { 0x0001a2a4, 0xc0204411, 0x000 },
13506 { 0x00000016, 0x00604811, 0x36a },
13507 { 0x00002010, 0x00204411, 0x000 },
13508 { 0x00010000, 0x00204811, 0x000 },
13509 { 0x81000000, 0x00204411, 0x000 },
13510 { 0x00000001, 0x00204811, 0x000 },
13511 { 0x0000217c, 0x00204411, 0x000 },
13512 { 0x09800000, 0x00204811, 0x000 },
13513 { 0xffffffff, 0x00204811, 0x000 },
13514 { 0x00000000, 0x00204811, 0x000 },
13515 { 0x00000000, 0x17000000, 0x000 },
13516 { 0x0004217f, 0x00604411, 0x67c },
13517 { 0x0000001f, 0x00210230, 0x000 },
13518 { 0x00000000, 0x14c00000, 0x000 },
13519 { 0x00000004, 0x00404c11, 0x647 },
13520 { 0x00000000, 0x00400000, 0x000 },
13521 { 0x00000017, 0x00201e2d, 0x000 },
13522 { 0x00000004, 0x00291e27, 0x000 },
13523 { 0x00000017, 0x00803627, 0x000 },
13524 { 0x00000017, 0x00201e2d, 0x000 },
13525 { 0xfffffffb, 0x00281e27, 0x000 },
13526 { 0x00000017, 0x00803627, 0x000 },
13527 { 0x00000017, 0x00201e2d, 0x000 },
13528 { 0x00000008, 0x00291e27, 0x000 },
13529 { 0x00000017, 0x00803627, 0x000 },
13530 { 0x00000017, 0x00201e2d, 0x000 },
13531 { 0xfffffff7, 0x00281e27, 0x000 },
13532 { 0x00000017, 0x00803627, 0x000 },
13533 { 0x0001a2a4, 0x00204411, 0x000 },
13534 { 0x00000016, 0x00604811, 0x36a },
13535 { 0x00002010, 0x00204411, 0x000 },
13536 { 0x00010000, 0x00204811, 0x000 },
13537 { 0x0000217c, 0x00204411, 0x000 },
13538 { 0x01800000, 0x00204811, 0x000 },
13539 { 0xffffffff, 0x00204811, 0x000 },
13540 { 0x00000000, 0x00204811, 0x000 },
13541 { 0x00000000, 0x17000000, 0x000 },
13542 { 0x81000000, 0x00204411, 0x000 },
13543 { 0x00000001, 0x00204811, 0x000 },
13544 { 0x0004217f, 0x00604411, 0x67c },
13545 { 0x0000001f, 0x00210230, 0x000 },
13546 { 0x00000000, 0x14c00000, 0x67b },
13547 { 0x00000010, 0x00404c11, 0x661 },
13548 { 0x00000000, 0xc0200400, 0x000 },
13549 { 0x00000000, 0x38c00000, 0x000 },
13550 { 0x0000001d, 0x00200a2d, 0x000 },
13551 { 0x0000001e, 0x00200e2d, 0x000 },
13552 { 0x0000001f, 0x0020122d, 0x000 },
13553 { 0x00000020, 0x0020162d, 0x000 },
13554 { 0x00002169, 0x00204411, 0x000 },
13555 { 0x00000000, 0x00204804, 0x000 },
13556 { 0x00000000, 0x00204805, 0x000 },
13557 { 0x00000000, 0x00204801, 0x000 },
13558 { 0xcafebabe, 0x00204811, 0x000 },
13559 { 0x00000004, 0x00301224, 0x000 },
13560 { 0x00000000, 0x002f0064, 0x000 },
13561 { 0x00000000, 0x0cc00000, 0x67a },
13562 { 0x00000003, 0x00281a22, 0x000 },
13563 { 0x00000008, 0x00221222, 0x000 },
13564 { 0xfffff000, 0x00281224, 0x000 },
13565 { 0x00000000, 0x002910c4, 0x000 },
13566 { 0x0000001f, 0x00403624, 0x000 },
13567 { 0x00000000, 0x00800000, 0x000 },
13568 { 0x00000000, 0x1ac00000, 0x67c },
13569 { 0x9f000000, 0x00204411, 0x000 },
13570 { 0xcafebabe, 0x00204811, 0x000 },
13571 { 0x00000000, 0x1ae00000, 0x67f },
13572 { 0x00000000, 0x00800000, 0x000 },
13573 { 0x00000000, 0x1ac00000, 0x681 },
13574 { 0x9e000000, 0x00204411, 0x000 },
13575 { 0xcafebabe, 0x00204811, 0x000 },
13576 { 0x00000000, 0x1ae00000, 0x684 },
13577 { 0x00000000, 0x00800000, 0x000 },
13578 { 0x00000000, 0x00600000, 0x00b },
13579 { 0x00001000, 0x00600411, 0x315 },
13580 { 0x00000000, 0x00200411, 0x000 },
13581 { 0x00000000, 0x00600811, 0x1b2 },
13582 { 0x0000225c, 0x00204411, 0x000 },
13583 { 0x00000003, 0x00204811, 0x000 },
13584 { 0x00002256, 0x00204411, 0x000 },
13585 { 0x0000001b, 0x00204811, 0x000 },
13586 { 0x0000a1fc, 0x00204411, 0x000 },
13587 { 0x00000001, 0x00204811, 0x000 },
13588 { 0x0001a1fd, 0xc0204411, 0x000 },
13589 { 0x00000021, 0x00201e2d, 0x000 },
13590 { 0x00000010, 0x00221e27, 0x000 },
13591 { 0x00000024, 0x0020222d, 0x000 },
13592 { 0x0000ffff, 0x00282228, 0x000 },
13593 { 0x00000000, 0x00294907, 0x000 },
13594 { 0x00000000, 0x00204811, 0x000 },
13595 { 0x00000022, 0x0020222d, 0x000 },
13596 { 0x0000ffff, 0x00282228, 0x000 },
13597 { 0x00000000, 0x00294907, 0x000 },
13598 { 0x00000000, 0x00204811, 0x000 },
13599 { 0x00000023, 0x00201e2d, 0x000 },
13600 { 0x00000010, 0x00221e27, 0x000 },
13601 { 0x00000000, 0x00294907, 0x000 },
13602 { 0x00000000, 0x00404811, 0x000 },
13603 { 0x00000000, 0x00000000, 0x000 },
13604 { 0x00000000, 0x00000000, 0x000 },
13605 { 0x00000000, 0x00000000, 0x000 },
13606 { 0x00000000, 0x00000000, 0x000 },
13607 { 0x00000000, 0x00000000, 0x000 },
13608 { 0x00000000, 0x00000000, 0x000 },
13609 { 0x00000000, 0x00000000, 0x000 },
13610 { 0x00000000, 0x00000000, 0x000 },
13611 { 0x00000000, 0x00000000, 0x000 },
13612 { 0x00000000, 0x00000000, 0x000 },
13613 { 0x00000000, 0x00000000, 0x000 },
13614 { 0x00000000, 0x00000000, 0x000 },
13615 { 0x00000000, 0x00000000, 0x000 },
13616 { 0x00000000, 0x00000000, 0x000 },
13617 { 0x00000000, 0x00000000, 0x000 },
13618 { 0x00000000, 0x00000000, 0x000 },
13619 { 0x00000000, 0x00000000, 0x000 },
13620 { 0x00000000, 0x00000000, 0x000 },
13621 { 0x00000000, 0x00000000, 0x000 },
13622 { 0x00000000, 0x00000000, 0x000 },
13623 { 0x00000000, 0x00000000, 0x000 },
13624 { 0x00000000, 0x00000000, 0x000 },
13625 { 0x00000000, 0x00000000, 0x000 },
13626 { 0x00000000, 0x00000000, 0x000 },
13627 { 0x00000000, 0x00000000, 0x000 },
13628 { 0x00000000, 0x00000000, 0x000 },
13629 { 0x00000000, 0x00000000, 0x000 },
13630 { 0x00000000, 0x00000000, 0x000 },
13631 { 0x00000000, 0x00000000, 0x000 },
13632 { 0x00000000, 0x00000000, 0x000 },
13633 { 0x00000000, 0x00000000, 0x000 },
13634 { 0x00000000, 0x00000000, 0x000 },
13635 { 0x00000000, 0x00000000, 0x000 },
13636 { 0x00000000, 0x00000000, 0x000 },
13637 { 0x00000000, 0x00000000, 0x000 },
13638 { 0x00000000, 0x00000000, 0x000 },
13639 { 0x00000000, 0x00000000, 0x000 },
13640 { 0x00000000, 0x00000000, 0x000 },
13641 { 0x00000000, 0x00000000, 0x000 },
13642 { 0x00000000, 0x00000000, 0x000 },
13643 { 0x00000000, 0x00000000, 0x000 },
13644 { 0x00000000, 0x00000000, 0x000 },
13645 { 0x00000000, 0x00000000, 0x000 },
13646 { 0x00000000, 0x00000000, 0x000 },
13647 { 0x00000000, 0x00000000, 0x000 },
13648 { 0x00000000, 0x00000000, 0x000 },
13649 { 0x00000000, 0x00000000, 0x000 },
13650 { 0x00000000, 0x00000000, 0x000 },
13651 { 0x00000000, 0x00000000, 0x000 },
13652 { 0x00000000, 0x00000000, 0x000 },
13653 { 0x00000000, 0x00000000, 0x000 },
13654 { 0x00000000, 0x00000000, 0x000 },
13655 { 0x00000000, 0x00000000, 0x000 },
13656 { 0x00000000, 0x00000000, 0x000 },
13657 { 0x00000000, 0x00000000, 0x000 },
13658 { 0x00000000, 0x00000000, 0x000 },
13659 { 0x00000000, 0x00000000, 0x000 },
13660 { 0x00000000, 0x00000000, 0x000 },
13661 { 0x00000000, 0x00000000, 0x000 },
13662 { 0x00000000, 0x00000000, 0x000 },
13663 { 0x00000000, 0x00000000, 0x000 },
13664 { 0x00000000, 0x00000000, 0x000 },
13665 { 0x00000000, 0x00000000, 0x000 },
13666 { 0x00000000, 0x00000000, 0x000 },
13667 { 0x00000000, 0x00000000, 0x000 },
13668 { 0x00000000, 0x00000000, 0x000 },
13669 { 0x00000000, 0x00000000, 0x000 },
13670 { 0x00000000, 0x00000000, 0x000 },
13671 { 0x00000000, 0x00000000, 0x000 },
13672 { 0x014204f5, 0x05b30250, 0x000 },
13673 { 0x01c30168, 0x043505b3, 0x000 },
13674 { 0x02250209, 0x02500151, 0x000 },
13675 { 0x02230245, 0x02a00241, 0x000 },
13676 { 0x03cd05b3, 0x05b305b3, 0x000 },
13677 { 0x063c063d, 0x031f05b3, 0x000 },
13678 { 0x05b305b8, 0x03200340, 0x000 },
13679 { 0x032a0282, 0x03420334, 0x000 },
13680 { 0x05b305b3, 0x05b305b3, 0x000 },
13681 { 0x05b30544, 0x05b305b3, 0x000 },
13682 { 0x03b205b3, 0x04ae0344, 0x000 },
13683 { 0x048d0443, 0x043305b3, 0x000 },
13684 { 0x04c305b3, 0x043704d0, 0x000 },
13685 { 0x044304fa, 0x03510371, 0x000 },
13686 { 0x05b305b3, 0x05b305b3, 0x000 },
13687 { 0x05b305b3, 0x05b305b3, 0x000 },
13688 { 0x05b305b3, 0x063205ba, 0x000 },
13689 { 0x05b305b3, 0x000705b3, 0x000 },
13690 { 0x05b305b3, 0x05b305b3, 0x000 },
13691 { 0x05b305b3, 0x05b305b3, 0x000 },
13692 { 0x03ee03e3, 0x03fe03fc, 0x000 },
13693 { 0x04040400, 0x04020406, 0x000 },
13694 { 0x0412040e, 0x041a0416, 0x000 },
13695 { 0x0422041e, 0x042a0426, 0x000 },
13696 { 0x05b305b3, 0x042e05b3, 0x000 },
13697 { 0x05b305b3, 0x05b305b3, 0x000 },
13698 { 0x05b305b3, 0x05b305b3, 0x000 },
13699 { 0x00020668, 0x06860006, 0x000 },
13700};
13701
13702static const u32 RV670_pfp_microcode[] = {
137030xca0400,
137040xa00000,
137050x7e828b,
137060x7c038b,
137070x8001b8,
137080x7c038b,
137090xd4401e,
137100xee001e,
137110xca0400,
137120xa00000,
137130x7e828b,
137140xc41838,
137150xca2400,
137160xca2800,
137170x9581a8,
137180xc41c3a,
137190xc3c000,
137200xca0800,
137210xca0c00,
137220x7c744b,
137230xc20005,
137240x99c000,
137250xc41c3a,
137260x7c744c,
137270xc0fff0,
137280x042c04,
137290x309002,
137300x7d2500,
137310x351402,
137320x7d350b,
137330x255403,
137340x7cd580,
137350x259c03,
137360x95c004,
137370xd5001b,
137380x7eddc1,
137390x7d9d80,
137400xd6801b,
137410xd5801b,
137420xd4401e,
137430xd5401e,
137440xd6401e,
137450xd6801e,
137460xd4801e,
137470xd4c01e,
137480x9783d3,
137490xd5c01e,
137500xca0800,
137510x80001a,
137520xca0c00,
137530xe4011e,
137540xd4001e,
137550x80000c,
137560xc41838,
137570xe4013e,
137580xd4001e,
137590x80000c,
137600xc41838,
137610xd4401e,
137620xee001e,
137630xca0400,
137640xa00000,
137650x7e828b,
137660xe4011e,
137670xd4001e,
137680xd4401e,
137690xee001e,
137700xca0400,
137710xa00000,
137720x7e828b,
137730xe4013e,
137740xd4001e,
137750xd4401e,
137760xee001e,
137770xca0400,
137780xa00000,
137790x7e828b,
137800xca1800,
137810xd4401e,
137820xd5801e,
137830x800053,
137840xd40075,
137850xd4401e,
137860xca0800,
137870xca0c00,
137880xca1000,
137890xd48019,
137900xd4c018,
137910xd50017,
137920xd4801e,
137930xd4c01e,
137940xd5001e,
137950xe2001e,
137960xca0400,
137970xa00000,
137980x7e828b,
137990xca0800,
138000xd48060,
138010xd4401e,
138020x800000,
138030xd4801e,
138040xca0800,
138050xd48061,
138060xd4401e,
138070x800000,
138080xd4801e,
138090xca0800,
138100xca0c00,
138110xd4401e,
138120xd48016,
138130xd4c016,
138140xd4801e,
138150x8001b8,
138160xd4c01e,
138170xc60843,
138180xca0c00,
138190xca1000,
138200x948004,
138210xca1400,
138220xe420f3,
138230xd42013,
138240xd56065,
138250xd4e01c,
138260xd5201c,
138270xd5601c,
138280x800000,
138290x062001,
138300xc60843,
138310xca0c00,
138320xca1000,
138330x9483f7,
138340xca1400,
138350xe420f3,
138360x800079,
138370xd42013,
138380xc60843,
138390xca0c00,
138400xca1000,
138410x9883ef,
138420xca1400,
138430xd40064,
138440x80008d,
138450x000000,
138460xc41432,
138470xc61843,
138480xc4082f,
138490x954005,
138500xc40c30,
138510xd4401e,
138520x800000,
138530xee001e,
138540x9583f5,
138550xc41031,
138560xd44033,
138570xd52065,
138580xd4a01c,
138590xd4e01c,
138600xd5201c,
138610xe4015e,
138620xd4001e,
138630x800000,
138640x062001,
138650xca1800,
138660x0a2001,
138670xd60076,
138680xc40836,
138690x988007,
138700xc61045,
138710x950110,
138720xd4001f,
138730xd46062,
138740x800000,
138750xd42062,
138760xcc3835,
138770xcc1433,
138780x8401bb,
138790xd40072,
138800xd5401e,
138810x800000,
138820xee001e,
138830xe2001a,
138840x8401bb,
138850xe2001a,
138860xcc104b,
138870xcc0447,
138880x2c9401,
138890x7d098b,
138900x984005,
138910x7d15cb,
138920xd4001a,
138930x8001b8,
138940xd4006d,
138950x344401,
138960xcc0c48,
138970x98403a,
138980xcc2c4a,
138990x958004,
139000xcc0449,
139010x8001b8,
139020xd4001a,
139030xd4c01a,
139040x282801,
139050x8400f0,
139060xcc1003,
139070x98801b,
139080x04380c,
139090x8400f0,
139100xcc1003,
139110x988017,
139120x043808,
139130x8400f0,
139140xcc1003,
139150x988013,
139160x043804,
139170x8400f0,
139180xcc1003,
139190x988014,
139200xcc104c,
139210x9a8009,
139220xcc144d,
139230x9840dc,
139240xd4006d,
139250xcc1848,
139260xd5001a,
139270xd5401a,
139280x8000c9,
139290xd5801a,
139300x96c0d5,
139310xd4006d,
139320x8001b8,
139330xd4006e,
139340x9ac003,
139350xd4006d,
139360xd4006e,
139370x800000,
139380xec007f,
139390x9ac0cc,
139400xd4006d,
139410x8001b8,
139420xd4006e,
139430xcc1403,
139440xcc1803,
139450xcc1c03,
139460x7d9103,
139470x7dd583,
139480x7d190c,
139490x35cc1f,
139500x35701f,
139510x7cf0cb,
139520x7cd08b,
139530x880000,
139540x7e8e8b,
139550x95c004,
139560xd4006e,
139570x8001b8,
139580xd4001a,
139590xd4c01a,
139600xcc0803,
139610xcc0c03,
139620xcc1003,
139630xcc1403,
139640xcc1803,
139650xcc1c03,
139660xcc2403,
139670xcc2803,
139680x35c41f,
139690x36b01f,
139700x7c704b,
139710x34f01f,
139720x7c704b,
139730x35701f,
139740x7c704b,
139750x7d8881,
139760x7dccc1,
139770x7e5101,
139780x7e9541,
139790x7c9082,
139800x7cd4c2,
139810x7c848b,
139820x9ac003,
139830x7c8c8b,
139840x2c8801,
139850x98809e,
139860xd4006d,
139870x98409c,
139880xd4006e,
139890xcc084c,
139900xcc0c4d,
139910xcc1048,
139920xd4801a,
139930xd4c01a,
139940x800101,
139950xd5001a,
139960xcc0832,
139970xd40032,
139980x9482d9,
139990xca0c00,
140000xd4401e,
140010x800000,
140020xd4001e,
140030xe4011e,
140040xd4001e,
140050xca0800,
140060xca0c00,
140070xca1000,
140080xd4401e,
140090xca1400,
140100xd4801e,
140110xd4c01e,
140120xd5001e,
140130xd5401e,
140140xd54034,
140150x800000,
140160xee001e,
140170x280404,
140180xe2001a,
140190xe2001a,
140200xd4401a,
140210xca3800,
140220xcc0803,
140230xcc0c03,
140240xcc0c03,
140250xcc0c03,
140260x9882bd,
140270x000000,
140280x8401bb,
140290xd7a06f,
140300x800000,
140310xee001f,
140320xca0400,
140330xc2ff00,
140340xcc0834,
140350xc13fff,
140360x7c74cb,
140370x7cc90b,
140380x7d010f,
140390x9902b0,
140400x7c738b,
140410x8401bb,
140420xd7a06f,
140430x800000,
140440xee001f,
140450xca0800,
140460x281900,
140470x7d898b,
140480x958014,
140490x281404,
140500xca0c00,
140510xca1000,
140520xca1c00,
140530xca2400,
140540xe2001f,
140550xd4c01a,
140560xd5001a,
140570xd5401a,
140580xcc1803,
140590xcc2c03,
140600xcc2c03,
140610xcc2c03,
140620x7da58b,
140630x7d9c47,
140640x984297,
140650x000000,
140660x800161,
140670xd4c01a,
140680xd4401e,
140690xd4801e,
140700x800000,
140710xee001e,
140720xe4011e,
140730xd4001e,
140740xd4401e,
140750xee001e,
140760xca0400,
140770xa00000,
140780x7e828b,
140790xe4013e,
140800xd4001e,
140810xd4401e,
140820xee001e,
140830xca0400,
140840xa00000,
140850x7e828b,
140860xca0800,
140870x248c06,
140880x0ccc06,
140890x98c006,
140900xcc104e,
140910x990004,
140920xd40073,
140930xe4011e,
140940xd4001e,
140950xd4401e,
140960xd4801e,
140970x800000,
140980xee001e,
140990xca0800,
141000xca0c00,
141010x34d018,
141020x251001,
141030x950021,
141040xc17fff,
141050xca1000,
141060xca1400,
141070xca1800,
141080xd4801d,
141090xd4c01d,
141100x7db18b,
141110xc14202,
141120xc2c001,
141130xd5801d,
141140x34dc0e,
141150x7d5d4c,
141160x7f734c,
141170xd7401e,
141180xd5001e,
141190xd5401e,
141200xc14200,
141210xc2c000,
141220x099c01,
141230x31dc10,
141240x7f5f4c,
141250x7f734c,
141260x042802,
141270x7d8380,
141280xd5a86f,
141290xd58066,
141300xd7401e,
141310xec005e,
141320xc82402,
141330xc82402,
141340x8001b8,
141350xd60076,
141360xd4401e,
141370xd4801e,
141380xd4c01e,
141390x800000,
141400xee001e,
141410x800000,
141420xee001f,
141430xd4001f,
141440x800000,
141450xd4001f,
141460xd4001f,
141470x880000,
141480xd4001f,
141490x000000,
141500x000000,
141510x000000,
141520x000000,
141530x000000,
141540x000000,
141550x000000,
141560x000000,
141570x000000,
141580x000000,
141590x000000,
141600x000000,
141610x000000,
141620x000000,
141630x000000,
141640x000000,
141650x000000,
141660x000000,
141670x000000,
141680x000000,
141690x000000,
141700x000000,
141710x000000,
141720x000000,
141730x000000,
141740x000000,
141750x000000,
141760x000000,
141770x000000,
141780x000000,
141790x000000,
141800x000000,
141810x000000,
141820x000000,
141830x000000,
141840x000000,
141850x000000,
141860x000000,
141870x000000,
141880x000000,
141890x000000,
141900x000000,
141910x000000,
141920x000000,
141930x000000,
141940x000000,
141950x000000,
141960x000000,
141970x000000,
141980x000000,
141990x000000,
142000x000000,
142010x000000,
142020x000000,
142030x000000,
142040x000000,
142050x000000,
142060x000000,
142070x000000,
142080x000000,
142090x000000,
142100x000000,
142110x000000,
142120x000000,
142130x000000,
142140x000000,
142150x010171,
142160x020178,
142170x03008f,
142180x04007f,
142190x050003,
142200x06003f,
142210x070032,
142220x08012c,
142230x090046,
142240x0a0036,
142250x1001b6,
142260x1700a2,
142270x22013a,
142280x230149,
142290x2000b4,
142300x240125,
142310x27004d,
142320x28006a,
142330x2a0060,
142340x2b0052,
142350x2f0065,
142360x320087,
142370x34017f,
142380x3c0156,
142390x3f0072,
142400x41018c,
142410x44012e,
142420x550173,
142430x56017a,
142440x60000b,
142450x610034,
142460x620038,
142470x630038,
142480x640038,
142490x650038,
142500x660038,
142510x670038,
142520x68003a,
142530x690041,
142540x6a0048,
142550x6b0048,
142560x6c0048,
142570x6d0048,
142580x6e0048,
142590x6f0048,
142600x000006,
142610x000006,
142620x000006,
142630x000006,
142640x000006,
142650x000006,
142660x000006,
142670x000006,
142680x000006,
142690x000006,
142700x000006,
142710x000006,
142720x000006,
142730x000006,
142740x000006,
142750x000006,
142760x000006,
142770x000006,
142780x000006,
14279};
14280
14281static const u32 RS780_cp_microcode[][3] = {
14282 { 0x00000000, 0xc0200400, 0x000 },
14283 { 0x00000000, 0x00a0000a, 0x000 },
14284 { 0x0000ffff, 0x00284621, 0x000 },
14285 { 0x00000000, 0xd9004800, 0x000 },
14286 { 0x00000000, 0xc0200400, 0x000 },
14287 { 0x00000000, 0x00a0000a, 0x000 },
14288 { 0x00000000, 0x00e00000, 0x000 },
14289 { 0x00010000, 0xc0294620, 0x000 },
14290 { 0x00000000, 0xd9004800, 0x000 },
14291 { 0x00000000, 0xc0200400, 0x000 },
14292 { 0x00000000, 0x00a0000a, 0x000 },
14293 { 0x81000000, 0x00204411, 0x000 },
14294 { 0x00000001, 0x00204811, 0x000 },
14295 { 0x00042004, 0x00604411, 0x622 },
14296 { 0x00000000, 0x00600000, 0x5d1 },
14297 { 0x00000000, 0x00600000, 0x5de },
14298 { 0x00000000, 0xc0200800, 0x000 },
14299 { 0x00000f00, 0x00281622, 0x000 },
14300 { 0x00000008, 0x00211625, 0x000 },
14301 { 0x00000018, 0x00203625, 0x000 },
14302 { 0x8d000000, 0x00204411, 0x000 },
14303 { 0x00000004, 0x002f0225, 0x000 },
14304 { 0x00000000, 0x0ce00000, 0x018 },
14305 { 0x00412000, 0x00404811, 0x019 },
14306 { 0x00422000, 0x00204811, 0x000 },
14307 { 0x8e000000, 0x00204411, 0x000 },
14308 { 0x00000028, 0x00204a2d, 0x000 },
14309 { 0x90000000, 0x00204411, 0x000 },
14310 { 0x00000000, 0x00204805, 0x000 },
14311 { 0x0000000c, 0x00211622, 0x000 },
14312 { 0x00000003, 0x00281625, 0x000 },
14313 { 0x00000019, 0x00211a22, 0x000 },
14314 { 0x00000004, 0x00281a26, 0x000 },
14315 { 0x00000000, 0x002914c5, 0x000 },
14316 { 0x00000019, 0x00203625, 0x000 },
14317 { 0x00000000, 0x003a1402, 0x000 },
14318 { 0x00000016, 0x00211625, 0x000 },
14319 { 0x00000003, 0x00281625, 0x000 },
14320 { 0x00000017, 0x00200e2d, 0x000 },
14321 { 0xfffffffc, 0x00280e23, 0x000 },
14322 { 0x00000000, 0x002914a3, 0x000 },
14323 { 0x00000017, 0x00203625, 0x000 },
14324 { 0x00008000, 0x00280e22, 0x000 },
14325 { 0x00000007, 0x00220e23, 0x000 },
14326 { 0x00000000, 0x0029386e, 0x000 },
14327 { 0x20000000, 0x00280e22, 0x000 },
14328 { 0x00000006, 0x00210e23, 0x000 },
14329 { 0x00000000, 0x0029386e, 0x000 },
14330 { 0x00000000, 0x00220222, 0x000 },
14331 { 0x00000000, 0x14e00000, 0x038 },
14332 { 0x00000000, 0x2ee00000, 0x035 },
14333 { 0x00000000, 0x2ce00000, 0x037 },
14334 { 0x00000000, 0x00400e2d, 0x039 },
14335 { 0x00000008, 0x00200e2d, 0x000 },
14336 { 0x00000009, 0x0040122d, 0x046 },
14337 { 0x00000001, 0x00400e2d, 0x039 },
14338 { 0x00000000, 0xc0200c00, 0x000 },
14339 { 0x003ffffc, 0x00281223, 0x000 },
14340 { 0x00000002, 0x00221224, 0x000 },
14341 { 0x0000001f, 0x00211e23, 0x000 },
14342 { 0x00000000, 0x14e00000, 0x03e },
14343 { 0x00000008, 0x00401c11, 0x041 },
14344 { 0x0000000d, 0x00201e2d, 0x000 },
14345 { 0x0000000f, 0x00281e27, 0x000 },
14346 { 0x00000003, 0x00221e27, 0x000 },
14347 { 0x7fc00000, 0x00281a23, 0x000 },
14348 { 0x00000014, 0x00211a26, 0x000 },
14349 { 0x00000001, 0x00331a26, 0x000 },
14350 { 0x00000008, 0x00221a26, 0x000 },
14351 { 0x00000000, 0x00290cc7, 0x000 },
14352 { 0x00000027, 0x00203624, 0x000 },
14353 { 0x00007f00, 0x00281221, 0x000 },
14354 { 0x00001400, 0x002f0224, 0x000 },
14355 { 0x00000000, 0x0ce00000, 0x04b },
14356 { 0x00000001, 0x00290e23, 0x000 },
14357 { 0x0000000e, 0x00203623, 0x000 },
14358 { 0x0000e000, 0x00204411, 0x000 },
14359 { 0xfff80000, 0x00294a23, 0x000 },
14360 { 0x00000000, 0x003a2c02, 0x000 },
14361 { 0x00000002, 0x00220e2b, 0x000 },
14362 { 0xfc000000, 0x00280e23, 0x000 },
14363 { 0x0000000f, 0x00203623, 0x000 },
14364 { 0x00001fff, 0x00294a23, 0x000 },
14365 { 0x00000027, 0x00204a2d, 0x000 },
14366 { 0x00000000, 0x00204811, 0x000 },
14367 { 0x00000029, 0x00200e2d, 0x000 },
14368 { 0x060a0200, 0x00294a23, 0x000 },
14369 { 0x00000000, 0x00204811, 0x000 },
14370 { 0x00000000, 0x00204811, 0x000 },
14371 { 0x00000001, 0x00210222, 0x000 },
14372 { 0x00000000, 0x14e00000, 0x061 },
14373 { 0x00000000, 0x2ee00000, 0x05f },
14374 { 0x00000000, 0x2ce00000, 0x05e },
14375 { 0x00000000, 0x00400e2d, 0x062 },
14376 { 0x00000001, 0x00400e2d, 0x062 },
14377 { 0x0000000a, 0x00200e2d, 0x000 },
14378 { 0x0000000b, 0x0040122d, 0x06a },
14379 { 0x00000000, 0xc0200c00, 0x000 },
14380 { 0x003ffffc, 0x00281223, 0x000 },
14381 { 0x00000002, 0x00221224, 0x000 },
14382 { 0x7fc00000, 0x00281623, 0x000 },
14383 { 0x00000014, 0x00211625, 0x000 },
14384 { 0x00000001, 0x00331625, 0x000 },
14385 { 0x80000000, 0x00280e23, 0x000 },
14386 { 0x00000000, 0x00290ca3, 0x000 },
14387 { 0x3ffffc00, 0x00290e23, 0x000 },
14388 { 0x0000001f, 0x00211e23, 0x000 },
14389 { 0x00000000, 0x14e00000, 0x06d },
14390 { 0x00000100, 0x00401c11, 0x070 },
14391 { 0x0000000d, 0x00201e2d, 0x000 },
14392 { 0x000000f0, 0x00281e27, 0x000 },
14393 { 0x00000004, 0x00221e27, 0x000 },
14394 { 0x81000000, 0x00204411, 0x000 },
14395 { 0x0000000d, 0x00204811, 0x000 },
14396 { 0xfffff0ff, 0x00281a30, 0x000 },
14397 { 0x0000a028, 0x00204411, 0x000 },
14398 { 0x00000000, 0x002948e6, 0x000 },
14399 { 0x0000a018, 0x00204411, 0x000 },
14400 { 0x3fffffff, 0x00284a23, 0x000 },
14401 { 0x0000a010, 0x00204411, 0x000 },
14402 { 0x00000000, 0x00204804, 0x000 },
14403 { 0x00000030, 0x0020162d, 0x000 },
14404 { 0x00000002, 0x00291625, 0x000 },
14405 { 0x00000030, 0x00203625, 0x000 },
14406 { 0x00000025, 0x0020162d, 0x000 },
14407 { 0x00000000, 0x002f00a3, 0x000 },
14408 { 0x00000000, 0x0cc00000, 0x083 },
14409 { 0x00000026, 0x0020162d, 0x000 },
14410 { 0x00000000, 0x002f00a4, 0x000 },
14411 { 0x00000000, 0x0cc00000, 0x084 },
14412 { 0x00000000, 0x00400000, 0x08a },
14413 { 0x00000025, 0x00203623, 0x000 },
14414 { 0x00000026, 0x00203624, 0x000 },
14415 { 0x00000017, 0x00201e2d, 0x000 },
14416 { 0x00000002, 0x00210227, 0x000 },
14417 { 0x00000000, 0x14e00000, 0x08a },
14418 { 0x00000000, 0x00600000, 0x5ff },
14419 { 0x00000000, 0x00600000, 0x5f3 },
14420 { 0x00000002, 0x00210e22, 0x000 },
14421 { 0x00000000, 0x14c00000, 0x08d },
14422 { 0x00000012, 0xc0403620, 0x093 },
14423 { 0x00000000, 0x2ee00000, 0x091 },
14424 { 0x00000000, 0x2ce00000, 0x090 },
14425 { 0x00000002, 0x00400e2d, 0x092 },
14426 { 0x00000003, 0x00400e2d, 0x092 },
14427 { 0x0000000c, 0x00200e2d, 0x000 },
14428 { 0x00000012, 0x00203623, 0x000 },
14429 { 0x00000003, 0x00210e22, 0x000 },
14430 { 0x00000000, 0x14c00000, 0x098 },
14431 { 0x0000a00c, 0x00204411, 0x000 },
14432 { 0x00000000, 0xc0204800, 0x000 },
14433 { 0x00000000, 0xc0404800, 0x0a0 },
14434 { 0x0000a00c, 0x00204411, 0x000 },
14435 { 0x00000000, 0x00204811, 0x000 },
14436 { 0x00000000, 0x2ee00000, 0x09e },
14437 { 0x00000000, 0x2ce00000, 0x09d },
14438 { 0x00000002, 0x00400e2d, 0x09f },
14439 { 0x00000003, 0x00400e2d, 0x09f },
14440 { 0x0000000c, 0x00200e2d, 0x000 },
14441 { 0x00000000, 0x00204803, 0x000 },
14442 { 0x00000000, 0x003a0c02, 0x000 },
14443 { 0x003f0000, 0x00280e23, 0x000 },
14444 { 0x00000010, 0x00210e23, 0x000 },
14445 { 0x00000011, 0x00203623, 0x000 },
14446 { 0x0000001e, 0x0021022b, 0x000 },
14447 { 0x00000000, 0x14c00000, 0x0a7 },
14448 { 0x00000016, 0xc0203620, 0x000 },
14449 { 0x0000001f, 0x0021022b, 0x000 },
14450 { 0x00000000, 0x14c00000, 0x0aa },
14451 { 0x00000015, 0xc0203620, 0x000 },
14452 { 0x00000008, 0x00210e2b, 0x000 },
14453 { 0x0000007f, 0x00280e23, 0x000 },
14454 { 0x00000000, 0x002f0223, 0x000 },
14455 { 0x00000000, 0x0ce00000, 0x0e1 },
14456 { 0x00000000, 0x27000000, 0x000 },
14457 { 0x00000000, 0x00600000, 0x2a3 },
14458 { 0x00000001, 0x002f0223, 0x000 },
14459 { 0x00000000, 0x0ae00000, 0x0b3 },
14460 { 0x00000000, 0x00600000, 0x13a },
14461 { 0x81000000, 0x00204411, 0x000 },
14462 { 0x00000006, 0x00204811, 0x000 },
14463 { 0x0000000c, 0x00221e30, 0x000 },
14464 { 0x99800000, 0x00204411, 0x000 },
14465 { 0x00000004, 0x0020122d, 0x000 },
14466 { 0x00000008, 0x00221224, 0x000 },
14467 { 0x00000010, 0x00201811, 0x000 },
14468 { 0x00000000, 0x00291ce4, 0x000 },
14469 { 0x00000000, 0x00604807, 0x12f },
14470 { 0x9b000000, 0x00204411, 0x000 },
14471 { 0x00000000, 0x00204802, 0x000 },
14472 { 0x9c000000, 0x00204411, 0x000 },
14473 { 0x00000000, 0x0033146f, 0x000 },
14474 { 0x00000001, 0x00333e23, 0x000 },
14475 { 0x00000000, 0xd9004800, 0x000 },
14476 { 0x00000000, 0x00203c05, 0x000 },
14477 { 0x81000000, 0x00204411, 0x000 },
14478 { 0x0000000e, 0x00204811, 0x000 },
14479 { 0x00000000, 0x00201010, 0x000 },
14480 { 0x0000e007, 0x00204411, 0x000 },
14481 { 0x0000000f, 0x0021022b, 0x000 },
14482 { 0x00000000, 0x14c00000, 0x0cb },
14483 { 0x00f8ff08, 0x00204811, 0x000 },
14484 { 0x98000000, 0x00404811, 0x0dc },
14485 { 0x000000f0, 0x00280e22, 0x000 },
14486 { 0x000000a0, 0x002f0223, 0x000 },
14487 { 0x00000000, 0x0cc00000, 0x0da },
14488 { 0x00000011, 0x00200e2d, 0x000 },
14489 { 0x00000001, 0x002f0223, 0x000 },
14490 { 0x00000000, 0x0ce00000, 0x0d5 },
14491 { 0x00000002, 0x002f0223, 0x000 },
14492 { 0x00000000, 0x0ce00000, 0x0d4 },
14493 { 0x00003f00, 0x00400c11, 0x0d6 },
14494 { 0x00001f00, 0x00400c11, 0x0d6 },
14495 { 0x00000f00, 0x00200c11, 0x000 },
14496 { 0x00380009, 0x00294a23, 0x000 },
14497 { 0x3f000000, 0x00280e2b, 0x000 },
14498 { 0x00000002, 0x00220e23, 0x000 },
14499 { 0x00000007, 0x00494a23, 0x0dc },
14500 { 0x00380f09, 0x00204811, 0x000 },
14501 { 0x68000007, 0x00204811, 0x000 },
14502 { 0x00000008, 0x00214a27, 0x000 },
14503 { 0x00000000, 0x00204811, 0x000 },
14504 { 0x060a0200, 0x00294a24, 0x000 },
14505 { 0x00000000, 0x00204811, 0x000 },
14506 { 0x00000000, 0x00204811, 0x000 },
14507 { 0x0000a202, 0x00204411, 0x000 },
14508 { 0x00ff0000, 0x00280e22, 0x000 },
14509 { 0x00000080, 0x00294a23, 0x000 },
14510 { 0x00000027, 0x00200e2d, 0x000 },
14511 { 0x00000026, 0x0020122d, 0x000 },
14512 { 0x00000000, 0x002f0083, 0x000 },
14513 { 0x00000000, 0x0ce00000, 0x0ea },
14514 { 0x00000000, 0x00600000, 0x5f9 },
14515 { 0x00000000, 0x00400000, 0x0eb },
14516 { 0x00000000, 0x00600000, 0x5fc },
14517 { 0x00000007, 0x0020222d, 0x000 },
14518 { 0x00000005, 0x00220e22, 0x000 },
14519 { 0x00100000, 0x00280e23, 0x000 },
14520 { 0x00000000, 0x00292068, 0x000 },
14521 { 0x00000000, 0x003a0c02, 0x000 },
14522 { 0x000000ef, 0x00280e23, 0x000 },
14523 { 0x00000000, 0x00292068, 0x000 },
14524 { 0x00000017, 0x00200e2d, 0x000 },
14525 { 0x00000003, 0x00210223, 0x000 },
14526 { 0x00000000, 0x14e00000, 0x0f8 },
14527 { 0x0000000b, 0x00210228, 0x000 },
14528 { 0x00000000, 0x14c00000, 0x0f8 },
14529 { 0x00000400, 0x00292228, 0x000 },
14530 { 0x00000014, 0x00203628, 0x000 },
14531 { 0x0000001c, 0x00210e22, 0x000 },
14532 { 0x00000000, 0x14c00000, 0x0fd },
14533 { 0x0000a30c, 0x00204411, 0x000 },
14534 { 0x00000000, 0x00204811, 0x000 },
14535 { 0x0000001e, 0x00210e22, 0x000 },
14536 { 0x00000000, 0x14c00000, 0x10b },
14537 { 0x0000a30f, 0x00204411, 0x000 },
14538 { 0x00000011, 0x00200e2d, 0x000 },
14539 { 0x00000001, 0x002f0223, 0x000 },
14540 { 0x00000000, 0x0cc00000, 0x104 },
14541 { 0xffffffff, 0x00404811, 0x10b },
14542 { 0x00000002, 0x002f0223, 0x000 },
14543 { 0x00000000, 0x0cc00000, 0x107 },
14544 { 0x0000ffff, 0x00404811, 0x10b },
14545 { 0x00000004, 0x002f0223, 0x000 },
14546 { 0x00000000, 0x0cc00000, 0x10a },
14547 { 0x000000ff, 0x00404811, 0x10b },
14548 { 0x00000001, 0x00204811, 0x000 },
14549 { 0x0002c400, 0x00204411, 0x000 },
14550 { 0x0000001f, 0x00210e22, 0x000 },
14551 { 0x00000000, 0x14c00000, 0x112 },
14552 { 0x00000010, 0x40210e20, 0x000 },
14553 { 0x00000013, 0x00203623, 0x000 },
14554 { 0x00000018, 0x40224a20, 0x000 },
14555 { 0x00000010, 0xc0424a20, 0x114 },
14556 { 0x00000000, 0x00200c11, 0x000 },
14557 { 0x00000013, 0x00203623, 0x000 },
14558 { 0x00000000, 0x00204811, 0x000 },
14559 { 0x00000000, 0x00204811, 0x000 },
14560 { 0x0000000a, 0x00201011, 0x000 },
14561 { 0x00000000, 0x002f0224, 0x000 },
14562 { 0x00000000, 0x0ce00000, 0x11b },
14563 { 0x00000000, 0x00204811, 0x000 },
14564 { 0x00000001, 0x00531224, 0x117 },
14565 { 0xffbfffff, 0x00283a2e, 0x000 },
14566 { 0x0000001b, 0x00210222, 0x000 },
14567 { 0x00000000, 0x14c00000, 0x12e },
14568 { 0x81000000, 0x00204411, 0x000 },
14569 { 0x0000000d, 0x00204811, 0x000 },
14570 { 0x00000018, 0x00220e30, 0x000 },
14571 { 0xfc000000, 0x00280e23, 0x000 },
14572 { 0x81000000, 0x00204411, 0x000 },
14573 { 0x0000000e, 0x00204811, 0x000 },
14574 { 0x00000000, 0x00201010, 0x000 },
14575 { 0x0000e00e, 0x00204411, 0x000 },
14576 { 0x07f8ff08, 0x00204811, 0x000 },
14577 { 0x00000000, 0x00294a23, 0x000 },
14578 { 0x0000001c, 0x00201e2d, 0x000 },
14579 { 0x00000008, 0x00214a27, 0x000 },
14580 { 0x00000000, 0x00204811, 0x000 },
14581 { 0x060a0200, 0x00294a24, 0x000 },
14582 { 0x00000000, 0x00204811, 0x000 },
14583 { 0x00000000, 0x00204811, 0x000 },
14584 { 0x00000000, 0x00800000, 0x000 },
14585 { 0x81000000, 0x00204411, 0x000 },
14586 { 0x00000001, 0x00204811, 0x000 },
14587 { 0x0000217c, 0x00204411, 0x000 },
14588 { 0x00800000, 0x00204811, 0x000 },
14589 { 0x00000000, 0x00204806, 0x000 },
14590 { 0x00000008, 0x00214a27, 0x000 },
14591 { 0x00000000, 0x17000000, 0x000 },
14592 { 0x0004217f, 0x00604411, 0x622 },
14593 { 0x0000001f, 0x00210230, 0x000 },
14594 { 0x00000000, 0x14c00000, 0x621 },
14595 { 0x00000004, 0x00404c11, 0x135 },
14596 { 0x81000000, 0x00204411, 0x000 },
14597 { 0x00000001, 0x00204811, 0x000 },
14598 { 0x000021f8, 0x00204411, 0x000 },
14599 { 0x0000001c, 0x00204811, 0x000 },
14600 { 0x000421f9, 0x00604411, 0x622 },
14601 { 0x00000011, 0x00210230, 0x000 },
14602 { 0x00000000, 0x14e00000, 0x13c },
14603 { 0x00000000, 0x00800000, 0x000 },
14604 { 0x00000000, 0x00600000, 0x00b },
14605 { 0x00000000, 0x00600411, 0x315 },
14606 { 0x00000000, 0x00200411, 0x000 },
14607 { 0x00000000, 0x00600811, 0x1b2 },
14608 { 0x00000000, 0x00600000, 0x160 },
14609 { 0x0000ffff, 0x40280e20, 0x000 },
14610 { 0x00000010, 0xc0211220, 0x000 },
14611 { 0x0000ffff, 0x40280620, 0x000 },
14612 { 0x00000010, 0xc0210a20, 0x000 },
14613 { 0x00000000, 0x00341461, 0x000 },
14614 { 0x00000000, 0x00741882, 0x2bb },
14615 { 0x0001a1fd, 0x00604411, 0x2e0 },
14616 { 0x00003fff, 0x002f022f, 0x000 },
14617 { 0x00000000, 0x0cc00000, 0x147 },
14618 { 0x00000000, 0xc0400400, 0x001 },
14619 { 0x00000000, 0x00600000, 0x00b },
14620 { 0x00000000, 0x00600411, 0x315 },
14621 { 0x00000000, 0x00200411, 0x000 },
14622 { 0x00000000, 0x00600811, 0x1b2 },
14623 { 0x00003fff, 0x002f022f, 0x000 },
14624 { 0x00000000, 0x0ce00000, 0x000 },
14625 { 0x00000000, 0x00600000, 0x160 },
14626 { 0x00000010, 0x40210e20, 0x000 },
14627 { 0x0000ffff, 0xc0281220, 0x000 },
14628 { 0x00000010, 0x40211620, 0x000 },
14629 { 0x0000ffff, 0xc0681a20, 0x2bb },
14630 { 0x0001a1fd, 0x00604411, 0x2e0 },
14631 { 0x00003fff, 0x002f022f, 0x000 },
14632 { 0x00000000, 0x0cc00000, 0x158 },
14633 { 0x00000000, 0xc0400400, 0x001 },
14634 { 0x0000225c, 0x00204411, 0x000 },
14635 { 0x00000001, 0x00300a2f, 0x000 },
14636 { 0x00000001, 0x00210a22, 0x000 },
14637 { 0x00000003, 0x00384a22, 0x000 },
14638 { 0x00002256, 0x00204411, 0x000 },
14639 { 0x0000001a, 0x00204811, 0x000 },
14640 { 0x0000a1fc, 0x00204411, 0x000 },
14641 { 0x00000001, 0x00804811, 0x000 },
14642 { 0x00000000, 0x00600000, 0x00b },
14643 { 0x00000000, 0x00600000, 0x18f },
14644 { 0x00000000, 0x00600000, 0x1a0 },
14645 { 0x00003fff, 0x002f022f, 0x000 },
14646 { 0x00000000, 0x0ce00000, 0x000 },
14647 { 0x00000000, 0x00202c08, 0x000 },
14648 { 0x00000000, 0x00202411, 0x000 },
14649 { 0x00000000, 0x00202811, 0x000 },
14650 { 0x00002256, 0x00204411, 0x000 },
14651 { 0x00000016, 0x00204811, 0x000 },
14652 { 0x0000225c, 0x00204411, 0x000 },
14653 { 0x00000003, 0x00204811, 0x000 },
14654 { 0x93800000, 0x00204411, 0x000 },
14655 { 0x00000002, 0x00221e29, 0x000 },
14656 { 0x00000000, 0x007048eb, 0x19c },
14657 { 0x00000000, 0x00600000, 0x2bb },
14658 { 0x00000001, 0x40330620, 0x000 },
14659 { 0x00000000, 0xc0302409, 0x000 },
14660 { 0x00003fff, 0x002f022f, 0x000 },
14661 { 0x00000000, 0x0ce00000, 0x000 },
14662 { 0x00000000, 0x00600000, 0x2a3 },
14663 { 0x00000000, 0x002f0221, 0x000 },
14664 { 0x00000000, 0x0ae00000, 0x181 },
14665 { 0x00000000, 0x00600000, 0x13a },
14666 { 0x00000000, 0x00400000, 0x186 },
14667 { 0x95000000, 0x00204411, 0x000 },
14668 { 0x00000000, 0x002f0221, 0x000 },
14669 { 0x00000000, 0x0ce00000, 0x186 },
14670 { 0x00000000, 0xc0204800, 0x000 },
14671 { 0x00000001, 0x00530621, 0x182 },
14672 { 0x92000000, 0x00204411, 0x000 },
14673 { 0x00000000, 0xc0604800, 0x197 },
14674 { 0x0001a1fd, 0x00204411, 0x000 },
14675 { 0x00000011, 0x0020062d, 0x000 },
14676 { 0x00000000, 0x0078042a, 0x2fb },
14677 { 0x00000000, 0x00202809, 0x000 },
14678 { 0x00003fff, 0x002f022f, 0x000 },
14679 { 0x00000000, 0x0cc00000, 0x174 },
14680 { 0x00000000, 0xc0400400, 0x001 },
14681 { 0x00000210, 0x00600411, 0x315 },
14682 { 0x00003fff, 0x002f022f, 0x000 },
14683 { 0x00000000, 0x0ce00000, 0x194 },
14684 { 0x00000015, 0xc0203620, 0x000 },
14685 { 0x00000016, 0xc0203620, 0x000 },
14686 { 0x3f800000, 0x00200411, 0x000 },
14687 { 0x46000000, 0x00600811, 0x1b2 },
14688 { 0x00000000, 0x00800000, 0x000 },
14689 { 0x0000a1fc, 0x00204411, 0x000 },
14690 { 0x00003fff, 0x002f022f, 0x000 },
14691 { 0x00000000, 0x0cc00000, 0x19b },
14692 { 0x00000001, 0x00804811, 0x000 },
14693 { 0x00000021, 0x00804811, 0x000 },
14694 { 0x0000ffff, 0x40280e20, 0x000 },
14695 { 0x00000010, 0xc0211220, 0x000 },
14696 { 0x0000ffff, 0x40281620, 0x000 },
14697 { 0x00000010, 0xc0811a20, 0x000 },
14698 { 0x81000000, 0x00204411, 0x000 },
14699 { 0x00000006, 0x00204811, 0x000 },
14700 { 0x00000008, 0x00221e30, 0x000 },
14701 { 0x00000029, 0x00201a2d, 0x000 },
14702 { 0x0000e000, 0x00204411, 0x000 },
14703 { 0xfffbff09, 0x00204811, 0x000 },
14704 { 0x0000000f, 0x0020222d, 0x000 },
14705 { 0x00001fff, 0x00294a28, 0x000 },
14706 { 0x00000006, 0x0020222d, 0x000 },
14707 { 0x00000000, 0x002920e8, 0x000 },
14708 { 0x00000000, 0x00204808, 0x000 },
14709 { 0x00000000, 0x00204811, 0x000 },
14710 { 0x060a0200, 0x00294a26, 0x000 },
14711 { 0x00000000, 0x00204811, 0x000 },
14712 { 0x00000000, 0x00204811, 0x000 },
14713 { 0x00000100, 0x00201811, 0x000 },
14714 { 0x00000008, 0x00621e28, 0x12f },
14715 { 0x00000008, 0x00822228, 0x000 },
14716 { 0x0002c000, 0x00204411, 0x000 },
14717 { 0x00000015, 0x00600e2d, 0x1bd },
14718 { 0x00000016, 0x00600e2d, 0x1bd },
14719 { 0x0000c008, 0x00204411, 0x000 },
14720 { 0x00000017, 0x00200e2d, 0x000 },
14721 { 0x00000000, 0x14c00000, 0x1b9 },
14722 { 0x00000000, 0x00200411, 0x000 },
14723 { 0x00000000, 0x00204801, 0x000 },
14724 { 0x39000000, 0x00204811, 0x000 },
14725 { 0x00000000, 0x00204811, 0x000 },
14726 { 0x00000000, 0x00804802, 0x000 },
14727 { 0x00000018, 0x00202e2d, 0x000 },
14728 { 0x00000000, 0x003b0d63, 0x000 },
14729 { 0x00000008, 0x00224a23, 0x000 },
14730 { 0x00000010, 0x00224a23, 0x000 },
14731 { 0x00000018, 0x00224a23, 0x000 },
14732 { 0x00000000, 0x00804803, 0x000 },
14733 { 0x00000000, 0x00600000, 0x00b },
14734 { 0x00001000, 0x00600411, 0x315 },
14735 { 0x00000000, 0x00200411, 0x000 },
14736 { 0x00000000, 0x00600811, 0x1b2 },
14737 { 0x00000007, 0x0021062f, 0x000 },
14738 { 0x00000013, 0x00200a2d, 0x000 },
14739 { 0x00000001, 0x00202c11, 0x000 },
14740 { 0x0000ffff, 0x40282220, 0x000 },
14741 { 0x0000000f, 0x00262228, 0x000 },
14742 { 0x00000010, 0x40212620, 0x000 },
14743 { 0x0000000f, 0x00262629, 0x000 },
14744 { 0x00000000, 0x00202802, 0x000 },
14745 { 0x00002256, 0x00204411, 0x000 },
14746 { 0x0000001b, 0x00204811, 0x000 },
14747 { 0x00000000, 0x002f0221, 0x000 },
14748 { 0x00000000, 0x0ce00000, 0x1e0 },
14749 { 0x0000225c, 0x00204411, 0x000 },
14750 { 0x00000081, 0x00204811, 0x000 },
14751 { 0x0000a1fc, 0x00204411, 0x000 },
14752 { 0x00000001, 0x00204811, 0x000 },
14753 { 0x00000080, 0x00201c11, 0x000 },
14754 { 0x00000000, 0x002f0227, 0x000 },
14755 { 0x00000000, 0x0ce00000, 0x1dc },
14756 { 0x00000000, 0x00600000, 0x1e9 },
14757 { 0x00000001, 0x00531e27, 0x1d8 },
14758 { 0x00000001, 0x00202c11, 0x000 },
14759 { 0x0000001f, 0x00280a22, 0x000 },
14760 { 0x0000001f, 0x00282a2a, 0x000 },
14761 { 0x00000001, 0x00530621, 0x1d1 },
14762 { 0x0000225c, 0x00204411, 0x000 },
14763 { 0x00000002, 0x00304a2f, 0x000 },
14764 { 0x0000a1fc, 0x00204411, 0x000 },
14765 { 0x00000001, 0x00204811, 0x000 },
14766 { 0x00000001, 0x00301e2f, 0x000 },
14767 { 0x00000000, 0x002f0227, 0x000 },
14768 { 0x00000000, 0x0ce00000, 0x000 },
14769 { 0x00000000, 0x00600000, 0x1e9 },
14770 { 0x00000001, 0x00531e27, 0x1e5 },
14771 { 0x0000ffff, 0x40280e20, 0x000 },
14772 { 0x0000000f, 0x00260e23, 0x000 },
14773 { 0x00000010, 0xc0211220, 0x000 },
14774 { 0x0000000f, 0x00261224, 0x000 },
14775 { 0x00000000, 0x00201411, 0x000 },
14776 { 0x00000000, 0x00601811, 0x2bb },
14777 { 0x0001a1fd, 0x00204411, 0x000 },
14778 { 0x00000000, 0x002f022b, 0x000 },
14779 { 0x00000000, 0x0ce00000, 0x1f8 },
14780 { 0x00000010, 0x00221628, 0x000 },
14781 { 0xffff0000, 0x00281625, 0x000 },
14782 { 0x0000ffff, 0x00281a29, 0x000 },
14783 { 0x00000000, 0x002948c5, 0x000 },
14784 { 0x00000000, 0x0020480a, 0x000 },
14785 { 0x00000000, 0x00202c11, 0x000 },
14786 { 0x00000010, 0x00221623, 0x000 },
14787 { 0xffff0000, 0x00281625, 0x000 },
14788 { 0x0000ffff, 0x00281a24, 0x000 },
14789 { 0x00000000, 0x002948c5, 0x000 },
14790 { 0x00000000, 0x00731503, 0x205 },
14791 { 0x00000000, 0x00201805, 0x000 },
14792 { 0x00000000, 0x00731524, 0x205 },
14793 { 0x00000000, 0x002d14c5, 0x000 },
14794 { 0x00000000, 0x003008a2, 0x000 },
14795 { 0x00000000, 0x00204802, 0x000 },
14796 { 0x00000000, 0x00202802, 0x000 },
14797 { 0x00000000, 0x00202003, 0x000 },
14798 { 0x00000000, 0x00802404, 0x000 },
14799 { 0x0000000f, 0x00210225, 0x000 },
14800 { 0x00000000, 0x14c00000, 0x621 },
14801 { 0x00000000, 0x002b1405, 0x000 },
14802 { 0x00000001, 0x00901625, 0x000 },
14803 { 0x00000000, 0x00600000, 0x00b },
14804 { 0x00000000, 0x00600411, 0x315 },
14805 { 0x00000000, 0x00200411, 0x000 },
14806 { 0x00000000, 0x00600811, 0x1b2 },
14807 { 0x00002256, 0x00204411, 0x000 },
14808 { 0x0000001a, 0x00294a22, 0x000 },
14809 { 0x00000000, 0xc0200000, 0x000 },
14810 { 0x00003fff, 0x002f022f, 0x000 },
14811 { 0x00000000, 0x0ce00000, 0x000 },
14812 { 0x00000000, 0xc0200400, 0x000 },
14813 { 0x0000225c, 0x00204411, 0x000 },
14814 { 0x00000003, 0x00384a21, 0x000 },
14815 { 0x0000a1fc, 0x00204411, 0x000 },
14816 { 0x00000001, 0x00204811, 0x000 },
14817 { 0x0000ffff, 0x40281220, 0x000 },
14818 { 0x00000010, 0xc0211a20, 0x000 },
14819 { 0x0000ffff, 0x40280e20, 0x000 },
14820 { 0x00000010, 0xc0211620, 0x000 },
14821 { 0x00000000, 0x00741465, 0x2bb },
14822 { 0x0001a1fd, 0x00604411, 0x2e0 },
14823 { 0x00000001, 0x00330621, 0x000 },
14824 { 0x00000000, 0x002f0221, 0x000 },
14825 { 0x00000000, 0x0cc00000, 0x219 },
14826 { 0x00003fff, 0x002f022f, 0x000 },
14827 { 0x00000000, 0x0cc00000, 0x212 },
14828 { 0x00000000, 0xc0400400, 0x001 },
14829 { 0x00000000, 0x00600000, 0x5de },
14830 { 0x00000000, 0x0040040f, 0x213 },
14831 { 0x00000000, 0x00600000, 0x5d1 },
14832 { 0x00000000, 0x00600000, 0x5de },
14833 { 0x00000210, 0x00600411, 0x315 },
14834 { 0x00000000, 0x00600000, 0x1a0 },
14835 { 0x00000000, 0x00600000, 0x19c },
14836 { 0x00000000, 0x00600000, 0x2bb },
14837 { 0x00000000, 0x00600000, 0x2a3 },
14838 { 0x93800000, 0x00204411, 0x000 },
14839 { 0x00000000, 0x00204808, 0x000 },
14840 { 0x00000000, 0x002f022f, 0x000 },
14841 { 0x00000000, 0x0ae00000, 0x232 },
14842 { 0x00000000, 0x00600000, 0x13a },
14843 { 0x00000000, 0x00400000, 0x236 },
14844 { 0x95000000, 0x00204411, 0x000 },
14845 { 0x00000000, 0x002f022f, 0x000 },
14846 { 0x00000000, 0x0ce00000, 0x236 },
14847 { 0x00000000, 0xc0404800, 0x233 },
14848 { 0x92000000, 0x00204411, 0x000 },
14849 { 0x00000000, 0xc0204800, 0x000 },
14850 { 0x00002256, 0x00204411, 0x000 },
14851 { 0x00000016, 0x00204811, 0x000 },
14852 { 0x0000225c, 0x00204411, 0x000 },
14853 { 0x00000003, 0x00204811, 0x000 },
14854 { 0x0000a1fc, 0x00204411, 0x000 },
14855 { 0x00000001, 0x00204811, 0x000 },
14856 { 0x0001a1fd, 0x00204411, 0x000 },
14857 { 0x00000000, 0x00600411, 0x2fb },
14858 { 0x00000000, 0xc0400400, 0x001 },
14859 { 0x00000000, 0x00600000, 0x5d1 },
14860 { 0x0000a00c, 0x00204411, 0x000 },
14861 { 0x00000000, 0xc0204800, 0x000 },
14862 { 0x00000000, 0xc0404800, 0x000 },
14863 { 0x00000000, 0x00600000, 0x00b },
14864 { 0x00000018, 0x40210a20, 0x000 },
14865 { 0x00000003, 0x002f0222, 0x000 },
14866 { 0x00000000, 0x0ae00000, 0x24c },
14867 { 0x00000014, 0x0020222d, 0x000 },
14868 { 0x00080101, 0x00292228, 0x000 },
14869 { 0x00000014, 0x00203628, 0x000 },
14870 { 0x0000a30c, 0x00204411, 0x000 },
14871 { 0x00000000, 0xc0204800, 0x000 },
14872 { 0x00000000, 0xc0204800, 0x000 },
14873 { 0x00000000, 0xc0404800, 0x251 },
14874 { 0x00000000, 0x00600000, 0x00b },
14875 { 0x00000010, 0x00600411, 0x315 },
14876 { 0x3f800000, 0x00200411, 0x000 },
14877 { 0x00000000, 0x00600811, 0x1b2 },
14878 { 0x0000225c, 0x00204411, 0x000 },
14879 { 0x00000003, 0x00204811, 0x000 },
14880 { 0x00000000, 0x00600000, 0x27c },
14881 { 0x00000017, 0x00201e2d, 0x000 },
14882 { 0x00000001, 0x00211e27, 0x000 },
14883 { 0x00000000, 0x14e00000, 0x26a },
14884 { 0x00000012, 0x00201e2d, 0x000 },
14885 { 0x0000ffff, 0x00281e27, 0x000 },
14886 { 0x00000000, 0x00341c27, 0x000 },
14887 { 0x00000000, 0x12c00000, 0x25f },
14888 { 0x00000000, 0x00201c11, 0x000 },
14889 { 0x00000000, 0x002f00e5, 0x000 },
14890 { 0x00000000, 0x08c00000, 0x262 },
14891 { 0x00000000, 0x00201407, 0x000 },
14892 { 0x00000012, 0x00201e2d, 0x000 },
14893 { 0x00000010, 0x00211e27, 0x000 },
14894 { 0x00000000, 0x00341c47, 0x000 },
14895 { 0x00000000, 0x12c00000, 0x267 },
14896 { 0x00000000, 0x00201c11, 0x000 },
14897 { 0x00000000, 0x002f00e6, 0x000 },
14898 { 0x00000000, 0x08c00000, 0x26a },
14899 { 0x00000000, 0x00201807, 0x000 },
14900 { 0x00000000, 0x00600000, 0x2c1 },
14901 { 0x00002256, 0x00204411, 0x000 },
14902 { 0x00000000, 0x00342023, 0x000 },
14903 { 0x00000000, 0x12c00000, 0x272 },
14904 { 0x00000000, 0x00342044, 0x000 },
14905 { 0x00000000, 0x12c00000, 0x271 },
14906 { 0x00000016, 0x00404811, 0x276 },
14907 { 0x00000018, 0x00404811, 0x276 },
14908 { 0x00000000, 0x00342044, 0x000 },
14909 { 0x00000000, 0x12c00000, 0x275 },
14910 { 0x00000017, 0x00404811, 0x276 },
14911 { 0x00000019, 0x00204811, 0x000 },
14912 { 0x0000a1fc, 0x00204411, 0x000 },
14913 { 0x00000001, 0x00204811, 0x000 },
14914 { 0x0001a1fd, 0x00604411, 0x2e9 },
14915 { 0x00003fff, 0x002f022f, 0x000 },
14916 { 0x00000000, 0x0cc00000, 0x256 },
14917 { 0x00000000, 0xc0400400, 0x001 },
14918 { 0x00000010, 0x40210620, 0x000 },
14919 { 0x0000ffff, 0xc0280a20, 0x000 },
14920 { 0x00000010, 0x40210e20, 0x000 },
14921 { 0x0000ffff, 0xc0281220, 0x000 },
14922 { 0x00000010, 0x40211620, 0x000 },
14923 { 0x0000ffff, 0xc0881a20, 0x000 },
14924 { 0x81000000, 0x00204411, 0x000 },
14925 { 0x00000001, 0x00204811, 0x000 },
14926 { 0x00042004, 0x00604411, 0x622 },
14927 { 0x00000000, 0x00600000, 0x5d1 },
14928 { 0x00000000, 0xc0600000, 0x2a3 },
14929 { 0x00000005, 0x00200a2d, 0x000 },
14930 { 0x00000008, 0x00220a22, 0x000 },
14931 { 0x0000002b, 0x00201a2d, 0x000 },
14932 { 0x0000001c, 0x00201e2d, 0x000 },
14933 { 0x00007000, 0x00281e27, 0x000 },
14934 { 0x00000000, 0x00311ce6, 0x000 },
14935 { 0x0000002a, 0x00201a2d, 0x000 },
14936 { 0x0000000c, 0x00221a26, 0x000 },
14937 { 0x00000000, 0x002f00e6, 0x000 },
14938 { 0x00000000, 0x06e00000, 0x292 },
14939 { 0x00000000, 0x00201c11, 0x000 },
14940 { 0x00000000, 0x00200c11, 0x000 },
14941 { 0x0000002b, 0x00203623, 0x000 },
14942 { 0x00000010, 0x00201811, 0x000 },
14943 { 0x00000000, 0x00691ce2, 0x12f },
14944 { 0x93800000, 0x00204411, 0x000 },
14945 { 0x00000000, 0x00204807, 0x000 },
14946 { 0x95000000, 0x00204411, 0x000 },
14947 { 0x00000000, 0x002f022f, 0x000 },
14948 { 0x00000000, 0x0ce00000, 0x29d },
14949 { 0x00000001, 0x00333e2f, 0x000 },
14950 { 0x00000000, 0xd9004800, 0x000 },
14951 { 0x92000000, 0x00204411, 0x000 },
14952 { 0x00000000, 0xc0204800, 0x000 },
14953 { 0x0000001c, 0x00403627, 0x000 },
14954 { 0x0000000c, 0xc0220a20, 0x000 },
14955 { 0x00000029, 0x00203622, 0x000 },
14956 { 0x00000028, 0xc0403620, 0x000 },
14957 { 0x0000a2a4, 0x00204411, 0x000 },
14958 { 0x00000009, 0x00204811, 0x000 },
14959 { 0xa1000000, 0x00204411, 0x000 },
14960 { 0x00000001, 0x00804811, 0x000 },
14961 { 0x00000021, 0x00201e2d, 0x000 },
14962 { 0x00000000, 0x002c1ce3, 0x000 },
14963 { 0x00000021, 0x00203627, 0x000 },
14964 { 0x00000022, 0x00201e2d, 0x000 },
14965 { 0x00000000, 0x002c1ce4, 0x000 },
14966 { 0x00000022, 0x00203627, 0x000 },
14967 { 0x00000023, 0x00201e2d, 0x000 },
14968 { 0x00000000, 0x003120a3, 0x000 },
14969 { 0x00000000, 0x002d1d07, 0x000 },
14970 { 0x00000023, 0x00203627, 0x000 },
14971 { 0x00000024, 0x00201e2d, 0x000 },
14972 { 0x00000000, 0x003120c4, 0x000 },
14973 { 0x00000000, 0x002d1d07, 0x000 },
14974 { 0x00000024, 0x00803627, 0x000 },
14975 { 0x00000021, 0x00203623, 0x000 },
14976 { 0x00000022, 0x00203624, 0x000 },
14977 { 0x00000000, 0x00311ca3, 0x000 },
14978 { 0x00000023, 0x00203627, 0x000 },
14979 { 0x00000000, 0x00311cc4, 0x000 },
14980 { 0x00000024, 0x00803627, 0x000 },
14981 { 0x0000001a, 0x00203627, 0x000 },
14982 { 0x0000001b, 0x00203628, 0x000 },
14983 { 0x00000017, 0x00201e2d, 0x000 },
14984 { 0x00000002, 0x00210227, 0x000 },
14985 { 0x00000000, 0x14c00000, 0x2dc },
14986 { 0x00000000, 0x00400000, 0x2d9 },
14987 { 0x0000001a, 0x00203627, 0x000 },
14988 { 0x0000001b, 0x00203628, 0x000 },
14989 { 0x00000017, 0x00201e2d, 0x000 },
14990 { 0x00000002, 0x00210227, 0x000 },
14991 { 0x00000000, 0x14e00000, 0x2d9 },
14992 { 0x00000003, 0x00210227, 0x000 },
14993 { 0x00000000, 0x14e00000, 0x2dc },
14994 { 0x00000023, 0x00201e2d, 0x000 },
14995 { 0x00000000, 0x002e00e1, 0x000 },
14996 { 0x00000000, 0x02c00000, 0x2dc },
14997 { 0x00000021, 0x00201e2d, 0x000 },
14998 { 0x00000000, 0x003120a1, 0x000 },
14999 { 0x00000000, 0x002e00e8, 0x000 },
15000 { 0x00000000, 0x06c00000, 0x2dc },
15001 { 0x00000024, 0x00201e2d, 0x000 },
15002 { 0x00000000, 0x002e00e2, 0x000 },
15003 { 0x00000000, 0x02c00000, 0x2dc },
15004 { 0x00000022, 0x00201e2d, 0x000 },
15005 { 0x00000000, 0x003120c2, 0x000 },
15006 { 0x00000000, 0x002e00e8, 0x000 },
15007 { 0x00000000, 0x06c00000, 0x2dc },
15008 { 0x00000000, 0x00600000, 0x5ff },
15009 { 0x00000000, 0x00600000, 0x2b5 },
15010 { 0x00000000, 0x00400000, 0x2de },
15011 { 0x00000000, 0x00600000, 0x2b5 },
15012 { 0x00000000, 0x00600000, 0x5f6 },
15013 { 0x00000000, 0x00400000, 0x2de },
15014 { 0x00000000, 0x00600000, 0x2a7 },
15015 { 0x00000000, 0x00400000, 0x2de },
15016 { 0x0000001a, 0x00201e2d, 0x000 },
15017 { 0x0000001b, 0x0080222d, 0x000 },
15018 { 0x00000010, 0x00221e23, 0x000 },
15019 { 0x00000000, 0x00294887, 0x000 },
15020 { 0x00000000, 0x00311ca3, 0x000 },
15021 { 0x00000010, 0x00221e27, 0x000 },
15022 { 0x00000000, 0x00294887, 0x000 },
15023 { 0x00000010, 0x00221e23, 0x000 },
15024 { 0x00000000, 0x003120c4, 0x000 },
15025 { 0x0000ffff, 0x00282228, 0x000 },
15026 { 0x00000000, 0x00894907, 0x000 },
15027 { 0x00000010, 0x00221e23, 0x000 },
15028 { 0x00000000, 0x00294887, 0x000 },
15029 { 0x00000010, 0x00221e21, 0x000 },
15030 { 0x00000000, 0x00294847, 0x000 },
15031 { 0x00000000, 0x00311ca3, 0x000 },
15032 { 0x00000010, 0x00221e27, 0x000 },
15033 { 0x00000000, 0x00294887, 0x000 },
15034 { 0x00000000, 0x00311ca1, 0x000 },
15035 { 0x00000010, 0x00221e27, 0x000 },
15036 { 0x00000000, 0x00294847, 0x000 },
15037 { 0x00000010, 0x00221e23, 0x000 },
15038 { 0x00000000, 0x003120c4, 0x000 },
15039 { 0x0000ffff, 0x00282228, 0x000 },
15040 { 0x00000000, 0x00294907, 0x000 },
15041 { 0x00000010, 0x00221e21, 0x000 },
15042 { 0x00000000, 0x003120c2, 0x000 },
15043 { 0x0000ffff, 0x00282228, 0x000 },
15044 { 0x00000000, 0x00894907, 0x000 },
15045 { 0x00000010, 0x00221e23, 0x000 },
15046 { 0x00000000, 0x00294887, 0x000 },
15047 { 0x00000001, 0x00220a21, 0x000 },
15048 { 0x00000000, 0x003308a2, 0x000 },
15049 { 0x00000010, 0x00221e22, 0x000 },
15050 { 0x00000010, 0x00212222, 0x000 },
15051 { 0x00000000, 0x00294907, 0x000 },
15052 { 0x00000000, 0x00311ca3, 0x000 },
15053 { 0x00000010, 0x00221e27, 0x000 },
15054 { 0x00000000, 0x00294887, 0x000 },
15055 { 0x00000001, 0x00220a21, 0x000 },
15056 { 0x00000000, 0x003008a2, 0x000 },
15057 { 0x00000010, 0x00221e22, 0x000 },
15058 { 0x00000010, 0x00212222, 0x000 },
15059 { 0x00000000, 0x00294907, 0x000 },
15060 { 0x00000010, 0x00221e23, 0x000 },
15061 { 0x00000000, 0x003120c4, 0x000 },
15062 { 0x0000ffff, 0x00282228, 0x000 },
15063 { 0x00000000, 0x00294907, 0x000 },
15064 { 0x00000000, 0x003808c5, 0x000 },
15065 { 0x00000000, 0x00300841, 0x000 },
15066 { 0x00000001, 0x00220a22, 0x000 },
15067 { 0x00000000, 0x003308a2, 0x000 },
15068 { 0x00000010, 0x00221e22, 0x000 },
15069 { 0x00000010, 0x00212222, 0x000 },
15070 { 0x00000000, 0x00894907, 0x000 },
15071 { 0x00000017, 0x0020222d, 0x000 },
15072 { 0x00000000, 0x14c00000, 0x318 },
15073 { 0xffffffef, 0x00280621, 0x000 },
15074 { 0x00000014, 0x0020222d, 0x000 },
15075 { 0x0000f8e0, 0x00204411, 0x000 },
15076 { 0x00000000, 0x00294901, 0x000 },
15077 { 0x00000000, 0x00894901, 0x000 },
15078 { 0x00000000, 0x00204811, 0x000 },
15079 { 0x00000000, 0x00204811, 0x000 },
15080 { 0x060a0200, 0x00804811, 0x000 },
15081 { 0x00000000, 0xc0200000, 0x000 },
15082 { 0x97000000, 0xc0204411, 0x000 },
15083 { 0x00000000, 0xc0204811, 0x000 },
15084 { 0x8a000000, 0x00204411, 0x000 },
15085 { 0x00000000, 0x00204811, 0x000 },
15086 { 0x0000225c, 0x00204411, 0x000 },
15087 { 0x00000000, 0xc0204800, 0x000 },
15088 { 0x0000a1fc, 0x00204411, 0x000 },
15089 { 0x00000000, 0xc0204800, 0x000 },
15090 { 0x00000000, 0xc0200400, 0x000 },
15091 { 0x00000000, 0x00a0000a, 0x000 },
15092 { 0x97000000, 0xc0204411, 0x000 },
15093 { 0x00000000, 0xc0204811, 0x000 },
15094 { 0x8a000000, 0xc0204411, 0x000 },
15095 { 0x00000000, 0x00204811, 0x000 },
15096 { 0x0000225c, 0x00204411, 0x000 },
15097 { 0x00000000, 0xc0204800, 0x000 },
15098 { 0x0000a1fc, 0x00204411, 0x000 },
15099 { 0x00000000, 0xc0204800, 0x000 },
15100 { 0x00000000, 0xc0200400, 0x000 },
15101 { 0x00000000, 0x00a0000a, 0x000 },
15102 { 0x97000000, 0x00204411, 0x000 },
15103 { 0x00000000, 0x00204811, 0x000 },
15104 { 0x8a000000, 0x00204411, 0x000 },
15105 { 0x00000000, 0x00204811, 0x000 },
15106 { 0x0000225c, 0x00204411, 0x000 },
15107 { 0x00000000, 0xc0204800, 0x000 },
15108 { 0x0000a1fc, 0x00204411, 0x000 },
15109 { 0x00000000, 0xc0204800, 0x000 },
15110 { 0x00000000, 0xc0200400, 0x000 },
15111 { 0x00000000, 0x00a0000a, 0x000 },
15112 { 0x97000000, 0x00204411, 0x000 },
15113 { 0x00000000, 0x00204811, 0x000 },
15114 { 0x8a000000, 0x00204411, 0x000 },
15115 { 0x00000000, 0x00204811, 0x000 },
15116 { 0x0000225c, 0x00204411, 0x000 },
15117 { 0x00000000, 0xc0204800, 0x000 },
15118 { 0x0000a1fc, 0x00204411, 0x000 },
15119 { 0x00000000, 0xc0204800, 0x000 },
15120 { 0x0001a1fd, 0x00204411, 0x000 },
15121 { 0x00000000, 0xd9004800, 0x000 },
15122 { 0x00000000, 0xc0200400, 0x000 },
15123 { 0x00000000, 0x00a0000a, 0x000 },
15124 { 0x00002257, 0x00204411, 0x000 },
15125 { 0x00000003, 0xc0484a20, 0x000 },
15126 { 0x0000225d, 0x00204411, 0x000 },
15127 { 0x00000000, 0xc0404800, 0x000 },
15128 { 0x00000000, 0x00600000, 0x5de },
15129 { 0x00000000, 0xc0200800, 0x000 },
15130 { 0x0000225c, 0x00204411, 0x000 },
15131 { 0x00000003, 0x00384a22, 0x000 },
15132 { 0x0000a1fc, 0x00204411, 0x000 },
15133 { 0x00000000, 0xc0204800, 0x000 },
15134 { 0x0001a1fd, 0x00204411, 0x000 },
15135 { 0x00000000, 0x002f0222, 0x000 },
15136 { 0x00000000, 0x0ce00000, 0x000 },
15137 { 0x00000000, 0x40204800, 0x000 },
15138 { 0x00000001, 0x40304a20, 0x000 },
15139 { 0x00000002, 0xc0304a20, 0x000 },
15140 { 0x00000001, 0x00530a22, 0x355 },
15141 { 0x0000003f, 0xc0280a20, 0x000 },
15142 { 0x81000000, 0x00204411, 0x000 },
15143 { 0x00000001, 0x00204811, 0x000 },
15144 { 0x000021f8, 0x00204411, 0x000 },
15145 { 0x00000018, 0x00204811, 0x000 },
15146 { 0x000421f9, 0x00604411, 0x622 },
15147 { 0x00000011, 0x00210230, 0x000 },
15148 { 0x00000000, 0x14e00000, 0x35e },
15149 { 0x00000014, 0x002f0222, 0x000 },
15150 { 0x00000000, 0x0cc00000, 0x36c },
15151 { 0x0001a2a4, 0x00204411, 0x000 },
15152 { 0x00000000, 0x00604802, 0x374 },
15153 { 0x00002100, 0x00204411, 0x000 },
15154 { 0x00000000, 0xc0204800, 0x000 },
15155 { 0x00000000, 0xc0204800, 0x000 },
15156 { 0x00000000, 0xc0204800, 0x000 },
15157 { 0x00000000, 0xc0404800, 0x000 },
15158 { 0x00000004, 0x002f0222, 0x000 },
15159 { 0x00000000, 0x0cc00000, 0x370 },
15160 { 0x0001a2a4, 0x00204411, 0x000 },
15161 { 0x00000000, 0x00404802, 0x367 },
15162 { 0x00000028, 0x002f0222, 0x000 },
15163 { 0x00000000, 0x0cc00000, 0x5ba },
15164 { 0x0001a2a4, 0x00204411, 0x000 },
15165 { 0x00000000, 0x00404802, 0x367 },
15166 { 0x0000002c, 0x00203626, 0x000 },
15167 { 0x00000049, 0x00201811, 0x000 },
15168 { 0x0000003f, 0x00204811, 0x000 },
15169 { 0x00000001, 0x00331a26, 0x000 },
15170 { 0x00000000, 0x002f0226, 0x000 },
15171 { 0x00000000, 0x0cc00000, 0x376 },
15172 { 0x0000002c, 0x00801a2d, 0x000 },
15173 { 0x0000003f, 0xc0280a20, 0x000 },
15174 { 0x00000015, 0x002f0222, 0x000 },
15175 { 0x00000000, 0x0ce00000, 0x38c },
15176 { 0x00000006, 0x002f0222, 0x000 },
15177 { 0x00000000, 0x0ce00000, 0x3b7 },
15178 { 0x00000016, 0x002f0222, 0x000 },
15179 { 0x00000000, 0x0ce00000, 0x3b9 },
15180 { 0x00000020, 0x002f0222, 0x000 },
15181 { 0x00000000, 0x0ce00000, 0x3a2 },
15182 { 0x0000000f, 0x002f0222, 0x000 },
15183 { 0x00000000, 0x0ce00000, 0x3ae },
15184 { 0x00000010, 0x002f0222, 0x000 },
15185 { 0x00000000, 0x0ce00000, 0x3ae },
15186 { 0x0000001e, 0x002f0222, 0x000 },
15187 { 0x00000000, 0x0ce00000, 0x396 },
15188 { 0x0000a2a4, 0x00204411, 0x000 },
15189 { 0x00000000, 0x00404802, 0x000 },
15190 { 0x08000000, 0x00290a22, 0x000 },
15191 { 0x00000003, 0x40210e20, 0x000 },
15192 { 0x0000000c, 0xc0211220, 0x000 },
15193 { 0x00080000, 0x00281224, 0x000 },
15194 { 0x00000014, 0xc0221620, 0x000 },
15195 { 0x00000000, 0x002914a4, 0x000 },
15196 { 0x0000a2a4, 0x00204411, 0x000 },
15197 { 0x00000000, 0x002948a2, 0x000 },
15198 { 0x0000a1fe, 0x00204411, 0x000 },
15199 { 0x00000000, 0x00404803, 0x000 },
15200 { 0x81000000, 0x00204411, 0x000 },
15201 { 0x00000001, 0x00204811, 0x000 },
15202 { 0x000021f8, 0x00204411, 0x000 },
15203 { 0x00000016, 0x00204811, 0x000 },
15204 { 0x000421f9, 0x00604411, 0x622 },
15205 { 0x00000015, 0x00210230, 0x000 },
15206 { 0x00000000, 0x14e00000, 0x398 },
15207 { 0x0000210e, 0x00204411, 0x000 },
15208 { 0x00000000, 0xc0204800, 0x000 },
15209 { 0x00000000, 0xc0204800, 0x000 },
15210 { 0x0000a2a4, 0x00204411, 0x000 },
15211 { 0x00000000, 0x00404802, 0x000 },
15212 { 0x81000000, 0x00204411, 0x000 },
15213 { 0x00000001, 0x00204811, 0x000 },
15214 { 0x000021f8, 0x00204411, 0x000 },
15215 { 0x00000017, 0x00204811, 0x000 },
15216 { 0x000421f9, 0x00604411, 0x622 },
15217 { 0x00000003, 0x00210230, 0x000 },
15218 { 0x00000000, 0x14e00000, 0x3a4 },
15219 { 0x00002108, 0x00204411, 0x000 },
15220 { 0x00000000, 0xc0204800, 0x000 },
15221 { 0x00000000, 0xc0204800, 0x000 },
15222 { 0x0000a2a4, 0x00204411, 0x000 },
15223 { 0x00000000, 0x00404802, 0x000 },
15224 { 0x0000a2a4, 0x00204411, 0x000 },
15225 { 0x00000000, 0x00204802, 0x000 },
15226 { 0x80000000, 0x00204411, 0x000 },
15227 { 0x00000000, 0x00204811, 0x000 },
15228 { 0x81000000, 0x00204411, 0x000 },
15229 { 0x00000010, 0x00204811, 0x000 },
15230 { 0x00000000, 0x00200010, 0x000 },
15231 { 0x00000000, 0x14c00000, 0x3b4 },
15232 { 0x00000000, 0x00400000, 0x000 },
15233 { 0x0001a2a4, 0x00204411, 0x000 },
15234 { 0x00000006, 0x00404811, 0x000 },
15235 { 0x0001a2a4, 0x00204411, 0x000 },
15236 { 0x00000016, 0x00604811, 0x374 },
15237 { 0x00000000, 0x00400000, 0x000 },
15238 { 0x00000000, 0xc0200800, 0x000 },
15239 { 0x00000000, 0xc0200c00, 0x000 },
15240 { 0x0000001d, 0x00210223, 0x000 },
15241 { 0x00000000, 0x14e00000, 0x3ce },
15242 { 0x81000000, 0x00204411, 0x000 },
15243 { 0x00000001, 0x00204811, 0x000 },
15244 { 0x000021f8, 0x00204411, 0x000 },
15245 { 0x00000018, 0x00204811, 0x000 },
15246 { 0x000421f9, 0x00604411, 0x622 },
15247 { 0x00000011, 0x00210230, 0x000 },
15248 { 0x00000000, 0x14e00000, 0x3c2 },
15249 { 0x00002100, 0x00204411, 0x000 },
15250 { 0x00000000, 0x00204802, 0x000 },
15251 { 0x00000000, 0x00204803, 0x000 },
15252 { 0xbabecafe, 0x00204811, 0x000 },
15253 { 0xcafebabe, 0x00204811, 0x000 },
15254 { 0x0000a2a4, 0x00204411, 0x000 },
15255 { 0x00000004, 0x00404811, 0x000 },
15256 { 0x00002170, 0x00204411, 0x000 },
15257 { 0x00000000, 0x00204802, 0x000 },
15258 { 0x00000000, 0x00204803, 0x000 },
15259 { 0x81000000, 0x00204411, 0x000 },
15260 { 0x0000000a, 0x00204811, 0x000 },
15261 { 0x00000000, 0x00200010, 0x000 },
15262 { 0x00000000, 0x14c00000, 0x3d3 },
15263 { 0x8c000000, 0x00204411, 0x000 },
15264 { 0xcafebabe, 0x00404811, 0x000 },
15265 { 0x81000000, 0x00204411, 0x000 },
15266 { 0x00000001, 0x00204811, 0x000 },
15267 { 0x00003fff, 0x40280a20, 0x000 },
15268 { 0x80000000, 0x40280e20, 0x000 },
15269 { 0x40000000, 0xc0281220, 0x000 },
15270 { 0x00040000, 0x00694622, 0x622 },
15271 { 0x00000000, 0x00201410, 0x000 },
15272 { 0x00000000, 0x002f0223, 0x000 },
15273 { 0x00000000, 0x0cc00000, 0x3e1 },
15274 { 0x00000000, 0xc0401800, 0x3e4 },
15275 { 0x00003fff, 0xc0281a20, 0x000 },
15276 { 0x00040000, 0x00694626, 0x622 },
15277 { 0x00000000, 0x00201810, 0x000 },
15278 { 0x00000000, 0x002f0224, 0x000 },
15279 { 0x00000000, 0x0cc00000, 0x3e7 },
15280 { 0x00000000, 0xc0401c00, 0x3ea },
15281 { 0x00003fff, 0xc0281e20, 0x000 },
15282 { 0x00040000, 0x00694627, 0x622 },
15283 { 0x00000000, 0x00201c10, 0x000 },
15284 { 0x00000000, 0x00204402, 0x000 },
15285 { 0x00000000, 0x002820c5, 0x000 },
15286 { 0x00000000, 0x004948e8, 0x000 },
15287 { 0xa5800000, 0x00200811, 0x000 },
15288 { 0x00002000, 0x00200c11, 0x000 },
15289 { 0x83000000, 0x00604411, 0x412 },
15290 { 0x00000000, 0x00204402, 0x000 },
15291 { 0x00000000, 0xc0204800, 0x000 },
15292 { 0x00000000, 0x40204800, 0x000 },
15293 { 0x0000001f, 0xc0210220, 0x000 },
15294 { 0x00000000, 0x14c00000, 0x3f7 },
15295 { 0x00002010, 0x00204411, 0x000 },
15296 { 0x00008000, 0x00204811, 0x000 },
15297 { 0x0000ffff, 0xc0481220, 0x3ff },
15298 { 0xa7800000, 0x00200811, 0x000 },
15299 { 0x0000a000, 0x00200c11, 0x000 },
15300 { 0x83000000, 0x00604411, 0x412 },
15301 { 0x00000000, 0x00204402, 0x000 },
15302 { 0x00000000, 0xc0204800, 0x000 },
15303 { 0x00000000, 0xc0204800, 0x000 },
15304 { 0x0000ffff, 0xc0281220, 0x000 },
15305 { 0x83000000, 0x00204411, 0x000 },
15306 { 0x00000000, 0x00304883, 0x000 },
15307 { 0x84000000, 0x00204411, 0x000 },
15308 { 0x00000000, 0xc0204800, 0x000 },
15309 { 0x00000000, 0x1d000000, 0x000 },
15310 { 0x83000000, 0x00604411, 0x412 },
15311 { 0x00000000, 0xc0400400, 0x001 },
15312 { 0xa9800000, 0x00200811, 0x000 },
15313 { 0x0000c000, 0x00400c11, 0x3fa },
15314 { 0xab800000, 0x00200811, 0x000 },
15315 { 0x0000f8e0, 0x00400c11, 0x3fa },
15316 { 0xad800000, 0x00200811, 0x000 },
15317 { 0x0000f880, 0x00400c11, 0x3fa },
15318 { 0xb3800000, 0x00200811, 0x000 },
15319 { 0x0000f3fc, 0x00400c11, 0x3fa },
15320 { 0xaf800000, 0x00200811, 0x000 },
15321 { 0x0000e000, 0x00400c11, 0x3fa },
15322 { 0xb1800000, 0x00200811, 0x000 },
15323 { 0x0000f000, 0x00400c11, 0x3fa },
15324 { 0x83000000, 0x00204411, 0x000 },
15325 { 0x00002148, 0x00204811, 0x000 },
15326 { 0x84000000, 0x00204411, 0x000 },
15327 { 0x00000000, 0xc0204800, 0x000 },
15328 { 0x00000000, 0x1d000000, 0x000 },
15329 { 0x00000000, 0x00800000, 0x000 },
15330 { 0x01182000, 0xc0304620, 0x000 },
15331 { 0x00000000, 0xd9004800, 0x000 },
15332 { 0x00000000, 0xc0200400, 0x000 },
15333 { 0x00000000, 0x00a0000a, 0x000 },
15334 { 0x0218a000, 0xc0304620, 0x000 },
15335 { 0x00000000, 0xd9004800, 0x000 },
15336 { 0x00000000, 0xc0200400, 0x000 },
15337 { 0x00000000, 0x00a0000a, 0x000 },
15338 { 0x0318c000, 0xc0304620, 0x000 },
15339 { 0x00000000, 0xd9004800, 0x000 },
15340 { 0x00000000, 0xc0200400, 0x000 },
15341 { 0x00000000, 0x00a0000a, 0x000 },
15342 { 0x0418f8e0, 0xc0304620, 0x000 },
15343 { 0x00000000, 0xd9004800, 0x000 },
15344 { 0x00000000, 0xc0200400, 0x000 },
15345 { 0x00000000, 0x00a0000a, 0x000 },
15346 { 0x0518f880, 0xc0304620, 0x000 },
15347 { 0x00000000, 0xd9004800, 0x000 },
15348 { 0x00000000, 0xc0200400, 0x000 },
15349 { 0x00000000, 0x00a0000a, 0x000 },
15350 { 0x0618e000, 0xc0304620, 0x000 },
15351 { 0x00000000, 0xd9004800, 0x000 },
15352 { 0x00000000, 0xc0200400, 0x000 },
15353 { 0x00000000, 0x00a0000a, 0x000 },
15354 { 0x0718f000, 0xc0304620, 0x000 },
15355 { 0x00000000, 0xd9004800, 0x000 },
15356 { 0x00000000, 0xc0200400, 0x000 },
15357 { 0x00000000, 0x00a0000a, 0x000 },
15358 { 0x0818f3fc, 0xc0304620, 0x000 },
15359 { 0x00000000, 0xd9004800, 0x000 },
15360 { 0x00000000, 0xc0200400, 0x000 },
15361 { 0x00000000, 0x00a0000a, 0x000 },
15362 { 0x00000033, 0xc0300a20, 0x000 },
15363 { 0x00000000, 0xc0403440, 0x000 },
15364 { 0x00000030, 0x00200a2d, 0x000 },
15365 { 0x00000000, 0xc0290c40, 0x000 },
15366 { 0x00000030, 0x00203623, 0x000 },
15367 { 0x00000000, 0xc0200400, 0x000 },
15368 { 0x00000000, 0x00a0000a, 0x000 },
15369 { 0x86000000, 0x00204411, 0x000 },
15370 { 0x00000000, 0x00404801, 0x000 },
15371 { 0x85000000, 0xc0204411, 0x000 },
15372 { 0x00000000, 0x00404801, 0x000 },
15373 { 0x0000217c, 0x00204411, 0x000 },
15374 { 0x00000018, 0x40210220, 0x000 },
15375 { 0x00000000, 0x14c00000, 0x447 },
15376 { 0x00800000, 0xc0494a20, 0x448 },
15377 { 0x00000000, 0xc0204800, 0x000 },
15378 { 0x00000000, 0xc0204800, 0x000 },
15379 { 0x00000000, 0xc0204800, 0x000 },
15380 { 0x81000000, 0x00204411, 0x000 },
15381 { 0x00000001, 0x00204811, 0x000 },
15382 { 0x00000000, 0xc0200800, 0x000 },
15383 { 0x00000004, 0x002f0222, 0x000 },
15384 { 0x00000000, 0x06e00000, 0x450 },
15385 { 0x00000004, 0x00200811, 0x000 },
15386 { 0x00000000, 0x17000000, 0x000 },
15387 { 0x0004217f, 0x00604411, 0x622 },
15388 { 0x0000001f, 0x00210230, 0x000 },
15389 { 0x00000000, 0x14c00000, 0x000 },
15390 { 0x00000000, 0x00404c02, 0x450 },
15391 { 0x00000000, 0xc0200c00, 0x000 },
15392 { 0x00000000, 0xc0201000, 0x000 },
15393 { 0x00000000, 0xc0201400, 0x000 },
15394 { 0x00000000, 0xc0201800, 0x000 },
15395 { 0x00000000, 0xc0201c00, 0x000 },
15396 { 0x00007f00, 0x00280a21, 0x000 },
15397 { 0x00004500, 0x002f0222, 0x000 },
15398 { 0x00000000, 0x0ce00000, 0x461 },
15399 { 0x00000000, 0xc0202000, 0x000 },
15400 { 0x00000004, 0x002f0228, 0x000 },
15401 { 0x00000000, 0x06e00000, 0x461 },
15402 { 0x00000004, 0x00202011, 0x000 },
15403 { 0x00000000, 0x17000000, 0x000 },
15404 { 0x00000010, 0x00280a23, 0x000 },
15405 { 0x00000010, 0x002f0222, 0x000 },
15406 { 0x00000000, 0x0ce00000, 0x469 },
15407 { 0x81000000, 0x00204411, 0x000 },
15408 { 0x00000001, 0x00204811, 0x000 },
15409 { 0x00040000, 0x00694624, 0x622 },
15410 { 0x00000000, 0x00400000, 0x46e },
15411 { 0x81000000, 0x00204411, 0x000 },
15412 { 0x00000000, 0x00204811, 0x000 },
15413 { 0x0000216d, 0x00204411, 0x000 },
15414 { 0x00000000, 0x00204804, 0x000 },
15415 { 0x00000000, 0x00604805, 0x627 },
15416 { 0x00000000, 0x002824f0, 0x000 },
15417 { 0x00000007, 0x00280a23, 0x000 },
15418 { 0x00000001, 0x002f0222, 0x000 },
15419 { 0x00000000, 0x0ae00000, 0x475 },
15420 { 0x00000000, 0x002f00c9, 0x000 },
15421 { 0x00000000, 0x04e00000, 0x48e },
15422 { 0x00000000, 0x00400000, 0x49b },
15423 { 0x00000002, 0x002f0222, 0x000 },
15424 { 0x00000000, 0x0ae00000, 0x47a },
15425 { 0x00000000, 0x002f00c9, 0x000 },
15426 { 0x00000000, 0x02e00000, 0x48e },
15427 { 0x00000000, 0x00400000, 0x49b },
15428 { 0x00000003, 0x002f0222, 0x000 },
15429 { 0x00000000, 0x0ae00000, 0x47f },
15430 { 0x00000000, 0x002f00c9, 0x000 },
15431 { 0x00000000, 0x0ce00000, 0x48e },
15432 { 0x00000000, 0x00400000, 0x49b },
15433 { 0x00000004, 0x002f0222, 0x000 },
15434 { 0x00000000, 0x0ae00000, 0x484 },
15435 { 0x00000000, 0x002f00c9, 0x000 },
15436 { 0x00000000, 0x0ae00000, 0x48e },
15437 { 0x00000000, 0x00400000, 0x49b },
15438 { 0x00000005, 0x002f0222, 0x000 },
15439 { 0x00000000, 0x0ae00000, 0x489 },
15440 { 0x00000000, 0x002f00c9, 0x000 },
15441 { 0x00000000, 0x06e00000, 0x48e },
15442 { 0x00000000, 0x00400000, 0x49b },
15443 { 0x00000006, 0x002f0222, 0x000 },
15444 { 0x00000000, 0x0ae00000, 0x48e },
15445 { 0x00000000, 0x002f00c9, 0x000 },
15446 { 0x00000000, 0x08e00000, 0x48e },
15447 { 0x00000000, 0x00400000, 0x49b },
15448 { 0x00007f00, 0x00280a21, 0x000 },
15449 { 0x00004500, 0x002f0222, 0x000 },
15450 { 0x00000000, 0x0ae00000, 0x000 },
15451 { 0x00000008, 0x00210a23, 0x000 },
15452 { 0x00000000, 0x14c00000, 0x498 },
15453 { 0x00002169, 0x00204411, 0x000 },
15454 { 0x00000000, 0xc0204800, 0x000 },
15455 { 0x00000000, 0xc0204800, 0x000 },
15456 { 0x00000000, 0xc0204800, 0x000 },
15457 { 0xcafebabe, 0x00404811, 0x000 },
15458 { 0x00000000, 0xc0204400, 0x000 },
15459 { 0x00000000, 0xc0200000, 0x000 },
15460 { 0x00000000, 0xc0404800, 0x000 },
15461 { 0x00007f00, 0x00280a21, 0x000 },
15462 { 0x00004500, 0x002f0222, 0x000 },
15463 { 0x00000000, 0x0ae00000, 0x4a1 },
15464 { 0x00000000, 0xc0200000, 0x000 },
15465 { 0x00000000, 0xc0200000, 0x000 },
15466 { 0x00000000, 0xc0400000, 0x000 },
15467 { 0x00000000, 0x00404c08, 0x461 },
15468 { 0x00000000, 0xc0200800, 0x000 },
15469 { 0x00000010, 0x40210e20, 0x000 },
15470 { 0x00000011, 0x40211220, 0x000 },
15471 { 0x00000012, 0x40211620, 0x000 },
15472 { 0x00002169, 0x00204411, 0x000 },
15473 { 0x00000000, 0x00204802, 0x000 },
15474 { 0x00000000, 0x00210225, 0x000 },
15475 { 0x00000000, 0x14e00000, 0x4ab },
15476 { 0x00040000, 0xc0494a20, 0x4ac },
15477 { 0xfffbffff, 0xc0284a20, 0x000 },
15478 { 0x00000000, 0x00210223, 0x000 },
15479 { 0x00000000, 0x14e00000, 0x4b8 },
15480 { 0x00000000, 0xc0204800, 0x000 },
15481 { 0x00000000, 0xc0204800, 0x000 },
15482 { 0x00000000, 0x00210224, 0x000 },
15483 { 0x00000000, 0x14c00000, 0x000 },
15484 { 0x81000000, 0x00204411, 0x000 },
15485 { 0x0000000c, 0x00204811, 0x000 },
15486 { 0x00000000, 0x00200010, 0x000 },
15487 { 0x00000000, 0x14c00000, 0x4b4 },
15488 { 0xa0000000, 0x00204411, 0x000 },
15489 { 0xcafebabe, 0x00404811, 0x000 },
15490 { 0x81000000, 0x00204411, 0x000 },
15491 { 0x00000004, 0x00204811, 0x000 },
15492 { 0x0000216b, 0x00204411, 0x000 },
15493 { 0x00000000, 0xc0204810, 0x000 },
15494 { 0x81000000, 0x00204411, 0x000 },
15495 { 0x00000005, 0x00204811, 0x000 },
15496 { 0x0000216c, 0x00204411, 0x000 },
15497 { 0x00000000, 0xc0204810, 0x000 },
15498 { 0x00000000, 0x002f0224, 0x000 },
15499 { 0x00000000, 0x0ce00000, 0x000 },
15500 { 0x00000000, 0x00400000, 0x4b2 },
15501 { 0x00000000, 0xc0210a20, 0x000 },
15502 { 0x00000000, 0x14c00000, 0x4cb },
15503 { 0x81000000, 0x00204411, 0x000 },
15504 { 0x00000000, 0x00204811, 0x000 },
15505 { 0x0000216d, 0x00204411, 0x000 },
15506 { 0x00000000, 0xc0204800, 0x000 },
15507 { 0x00000000, 0xc0604800, 0x627 },
15508 { 0x00000000, 0x00400000, 0x4cf },
15509 { 0x81000000, 0x00204411, 0x000 },
15510 { 0x00000001, 0x00204811, 0x000 },
15511 { 0x00040000, 0xc0294620, 0x000 },
15512 { 0x00000000, 0xc0600000, 0x622 },
15513 { 0x00000001, 0x00210222, 0x000 },
15514 { 0x00000000, 0x14c00000, 0x4d6 },
15515 { 0x00002169, 0x00204411, 0x000 },
15516 { 0x00000000, 0xc0204800, 0x000 },
15517 { 0x00000000, 0xc0204800, 0x000 },
15518 { 0x00000000, 0x00204810, 0x000 },
15519 { 0xcafebabe, 0x00404811, 0x000 },
15520 { 0x00000000, 0xc0204400, 0x000 },
15521 { 0x00000000, 0xc0404810, 0x000 },
15522 { 0x81000000, 0x00204411, 0x000 },
15523 { 0x00000001, 0x00204811, 0x000 },
15524 { 0x000021f8, 0x00204411, 0x000 },
15525 { 0x0000000e, 0x00204811, 0x000 },
15526 { 0x000421f9, 0x00604411, 0x622 },
15527 { 0x00000000, 0x00210230, 0x000 },
15528 { 0x00000000, 0x14c00000, 0x4d8 },
15529 { 0x00002180, 0x00204411, 0x000 },
15530 { 0x00000000, 0xc0204800, 0x000 },
15531 { 0x00000000, 0xc0200000, 0x000 },
15532 { 0x00000000, 0xc0204800, 0x000 },
15533 { 0x00000000, 0xc0200000, 0x000 },
15534 { 0x00000000, 0xc0404800, 0x000 },
15535 { 0x00000003, 0x00333e2f, 0x000 },
15536 { 0x00000001, 0x00210221, 0x000 },
15537 { 0x00000000, 0x14e00000, 0x508 },
15538 { 0x0000002c, 0x00200a2d, 0x000 },
15539 { 0x00040000, 0x18e00c11, 0x4f7 },
15540 { 0x00000001, 0x00333e2f, 0x000 },
15541 { 0x00002169, 0x00204411, 0x000 },
15542 { 0x00000000, 0x00204802, 0x000 },
15543 { 0x00000000, 0x00204803, 0x000 },
15544 { 0x00000008, 0x00300a22, 0x000 },
15545 { 0x00000000, 0xc0204800, 0x000 },
15546 { 0x00000000, 0xc0204800, 0x000 },
15547 { 0x00002169, 0x00204411, 0x000 },
15548 { 0x00000000, 0x00204802, 0x000 },
15549 { 0x00000000, 0x00204803, 0x000 },
15550 { 0x00000008, 0x00300a22, 0x000 },
15551 { 0x00000000, 0xc0204800, 0x000 },
15552 { 0x00000000, 0xd8c04800, 0x4eb },
15553 { 0x00002169, 0x00204411, 0x000 },
15554 { 0x00000000, 0x00204802, 0x000 },
15555 { 0x00000000, 0x00204803, 0x000 },
15556 { 0x00000008, 0x00300a22, 0x000 },
15557 { 0x00000000, 0xc0204800, 0x000 },
15558 { 0x00000000, 0xc0204800, 0x000 },
15559 { 0x0000002d, 0x0020122d, 0x000 },
15560 { 0x00000000, 0x00290c83, 0x000 },
15561 { 0x00002169, 0x00204411, 0x000 },
15562 { 0x00000000, 0x00204802, 0x000 },
15563 { 0x00000000, 0x00204803, 0x000 },
15564 { 0x00000008, 0x00300a22, 0x000 },
15565 { 0x00000000, 0xc0204800, 0x000 },
15566 { 0x00000000, 0xc0204800, 0x000 },
15567 { 0x00000011, 0x00210224, 0x000 },
15568 { 0x00000000, 0x14c00000, 0x000 },
15569 { 0x00000000, 0x00400000, 0x4b2 },
15570 { 0x0000002c, 0xc0203620, 0x000 },
15571 { 0x0000002d, 0xc0403620, 0x000 },
15572 { 0x0000000f, 0x00210221, 0x000 },
15573 { 0x00000000, 0x14c00000, 0x50d },
15574 { 0x00000000, 0x00600000, 0x00b },
15575 { 0x00000000, 0xd9000000, 0x000 },
15576 { 0x00000000, 0xc0400400, 0x001 },
15577 { 0xb5000000, 0x00204411, 0x000 },
15578 { 0x00002000, 0x00204811, 0x000 },
15579 { 0xb6000000, 0x00204411, 0x000 },
15580 { 0x0000a000, 0x00204811, 0x000 },
15581 { 0xb7000000, 0x00204411, 0x000 },
15582 { 0x0000c000, 0x00204811, 0x000 },
15583 { 0xb8000000, 0x00204411, 0x000 },
15584 { 0x0000f8e0, 0x00204811, 0x000 },
15585 { 0xb9000000, 0x00204411, 0x000 },
15586 { 0x0000f880, 0x00204811, 0x000 },
15587 { 0xba000000, 0x00204411, 0x000 },
15588 { 0x0000e000, 0x00204811, 0x000 },
15589 { 0xbb000000, 0x00204411, 0x000 },
15590 { 0x0000f000, 0x00204811, 0x000 },
15591 { 0xbc000000, 0x00204411, 0x000 },
15592 { 0x0000f3fc, 0x00204811, 0x000 },
15593 { 0x81000000, 0x00204411, 0x000 },
15594 { 0x00000002, 0x00204811, 0x000 },
15595 { 0x000000ff, 0x00280e30, 0x000 },
15596 { 0x00000000, 0x002f0223, 0x000 },
15597 { 0x00000000, 0x0cc00000, 0x521 },
15598 { 0x00000000, 0xc0200800, 0x000 },
15599 { 0x00000000, 0x14c00000, 0x536 },
15600 { 0x00000000, 0x00200c11, 0x000 },
15601 { 0x0000001c, 0x00203623, 0x000 },
15602 { 0x0000002b, 0x00203623, 0x000 },
15603 { 0x00000029, 0x00203623, 0x000 },
15604 { 0x00000028, 0x00203623, 0x000 },
15605 { 0x00000017, 0x00203623, 0x000 },
15606 { 0x00000025, 0x00203623, 0x000 },
15607 { 0x00000026, 0x00203623, 0x000 },
15608 { 0x00000015, 0x00203623, 0x000 },
15609 { 0x00000016, 0x00203623, 0x000 },
15610 { 0xffffe000, 0x00200c11, 0x000 },
15611 { 0x00000021, 0x00203623, 0x000 },
15612 { 0x00000022, 0x00203623, 0x000 },
15613 { 0x00001fff, 0x00200c11, 0x000 },
15614 { 0x00000023, 0x00203623, 0x000 },
15615 { 0x00000024, 0x00203623, 0x000 },
15616 { 0xf1ffffff, 0x00283a2e, 0x000 },
15617 { 0x0000001a, 0xc0220e20, 0x000 },
15618 { 0x00000000, 0x0029386e, 0x000 },
15619 { 0x81000000, 0x00204411, 0x000 },
15620 { 0x00000006, 0x00204811, 0x000 },
15621 { 0x0000002a, 0x40203620, 0x000 },
15622 { 0x87000000, 0x00204411, 0x000 },
15623 { 0x00000000, 0xc0204800, 0x000 },
15624 { 0x0000a1f4, 0x00204411, 0x000 },
15625 { 0x00000000, 0x00204810, 0x000 },
15626 { 0x9d000000, 0x00204411, 0x000 },
15627 { 0x0000001f, 0x40214a20, 0x000 },
15628 { 0x96000000, 0x00204411, 0x000 },
15629 { 0x00000000, 0xc0204800, 0x000 },
15630 { 0x00000000, 0xc0200c00, 0x000 },
15631 { 0x00000000, 0xc0201000, 0x000 },
15632 { 0x0000001f, 0x00211624, 0x000 },
15633 { 0x00000000, 0x14c00000, 0x000 },
15634 { 0x0000001d, 0x00203623, 0x000 },
15635 { 0x00000003, 0x00281e23, 0x000 },
15636 { 0x00000008, 0x00222223, 0x000 },
15637 { 0xfffff000, 0x00282228, 0x000 },
15638 { 0x00000000, 0x002920e8, 0x000 },
15639 { 0x0000001f, 0x00203628, 0x000 },
15640 { 0x00000018, 0x00211e23, 0x000 },
15641 { 0x00000020, 0x00203627, 0x000 },
15642 { 0x00000002, 0x00221624, 0x000 },
15643 { 0x00000000, 0x003014a8, 0x000 },
15644 { 0x0000001e, 0x00203625, 0x000 },
15645 { 0x00000003, 0x00211a24, 0x000 },
15646 { 0x10000000, 0x00281a26, 0x000 },
15647 { 0xefffffff, 0x00283a2e, 0x000 },
15648 { 0x00000000, 0x004938ce, 0x610 },
15649 { 0x00000001, 0x40280a20, 0x000 },
15650 { 0x00000006, 0x40280e20, 0x000 },
15651 { 0x00000300, 0xc0281220, 0x000 },
15652 { 0x00000008, 0x00211224, 0x000 },
15653 { 0x00000000, 0xc0201620, 0x000 },
15654 { 0x00000000, 0xc0201a20, 0x000 },
15655 { 0x00000000, 0x00210222, 0x000 },
15656 { 0x00000000, 0x14c00000, 0x56c },
15657 { 0x81000000, 0x00204411, 0x000 },
15658 { 0x00000001, 0x00204811, 0x000 },
15659 { 0x00002258, 0x00300a24, 0x000 },
15660 { 0x00040000, 0x00694622, 0x622 },
15661 { 0x00002169, 0x00204411, 0x000 },
15662 { 0x00000000, 0x00204805, 0x000 },
15663 { 0x00020000, 0x00294a26, 0x000 },
15664 { 0x00000000, 0x00204810, 0x000 },
15665 { 0xcafebabe, 0x00204811, 0x000 },
15666 { 0x00000002, 0x002f0223, 0x000 },
15667 { 0x00000000, 0x0cc00000, 0x574 },
15668 { 0x00000000, 0xc0201c10, 0x000 },
15669 { 0x00000000, 0xc0400000, 0x582 },
15670 { 0x00000002, 0x002f0223, 0x000 },
15671 { 0x00000000, 0x0cc00000, 0x574 },
15672 { 0x81000000, 0x00204411, 0x000 },
15673 { 0x00000001, 0x00204811, 0x000 },
15674 { 0x00002258, 0x00300a24, 0x000 },
15675 { 0x00040000, 0x00694622, 0x622 },
15676 { 0x00000000, 0xc0201c10, 0x000 },
15677 { 0x00000000, 0xc0400000, 0x582 },
15678 { 0x00000000, 0x002f0223, 0x000 },
15679 { 0x00000000, 0x0cc00000, 0x578 },
15680 { 0x00000000, 0xc0201c00, 0x000 },
15681 { 0x00000000, 0xc0400000, 0x582 },
15682 { 0x00000004, 0x002f0223, 0x000 },
15683 { 0x00000000, 0x0cc00000, 0x580 },
15684 { 0x81000000, 0x00204411, 0x000 },
15685 { 0x00000000, 0x00204811, 0x000 },
15686 { 0x0000216d, 0x00204411, 0x000 },
15687 { 0x00000000, 0xc0204800, 0x000 },
15688 { 0x00000000, 0xc0604800, 0x627 },
15689 { 0x00000000, 0x00401c10, 0x582 },
15690 { 0x00000000, 0xc0200000, 0x000 },
15691 { 0x00000000, 0xc0400000, 0x000 },
15692 { 0x00000000, 0x0ee00000, 0x584 },
15693 { 0x00000000, 0x00600000, 0x5c3 },
15694 { 0x00000000, 0x002f0224, 0x000 },
15695 { 0x00000000, 0x0cc00000, 0x592 },
15696 { 0x0000a2b7, 0x00204411, 0x000 },
15697 { 0x00000000, 0x00204807, 0x000 },
15698 { 0x00000033, 0x0020262d, 0x000 },
15699 { 0x0000001a, 0x00212229, 0x000 },
15700 { 0x00000006, 0x00222629, 0x000 },
15701 { 0x0000a2c4, 0x00204411, 0x000 },
15702 { 0x00000000, 0x003048e9, 0x000 },
15703 { 0x00000000, 0x00e00000, 0x590 },
15704 { 0x0000a2d1, 0x00204411, 0x000 },
15705 { 0x00000000, 0x00404808, 0x000 },
15706 { 0x0000a2d1, 0x00204411, 0x000 },
15707 { 0x00000001, 0x00504a28, 0x000 },
15708 { 0x00000001, 0x002f0224, 0x000 },
15709 { 0x00000000, 0x0cc00000, 0x5a0 },
15710 { 0x0000a2bb, 0x00204411, 0x000 },
15711 { 0x00000000, 0x00204807, 0x000 },
15712 { 0x00000034, 0x0020262d, 0x000 },
15713 { 0x0000001a, 0x00212229, 0x000 },
15714 { 0x00000006, 0x00222629, 0x000 },
15715 { 0x0000a2c5, 0x00204411, 0x000 },
15716 { 0x00000000, 0x003048e9, 0x000 },
15717 { 0x00000000, 0x00e00000, 0x59e },
15718 { 0x0000a2d2, 0x00204411, 0x000 },
15719 { 0x00000000, 0x00404808, 0x000 },
15720 { 0x0000a2d2, 0x00204411, 0x000 },
15721 { 0x00000001, 0x00504a28, 0x000 },
15722 { 0x00000002, 0x002f0224, 0x000 },
15723 { 0x00000000, 0x0cc00000, 0x5ae },
15724 { 0x0000a2bf, 0x00204411, 0x000 },
15725 { 0x00000000, 0x00204807, 0x000 },
15726 { 0x00000035, 0x0020262d, 0x000 },
15727 { 0x0000001a, 0x00212229, 0x000 },
15728 { 0x00000006, 0x00222629, 0x000 },
15729 { 0x0000a2c6, 0x00204411, 0x000 },
15730 { 0x00000000, 0x003048e9, 0x000 },
15731 { 0x00000000, 0x00e00000, 0x5ac },
15732 { 0x0000a2d3, 0x00204411, 0x000 },
15733 { 0x00000000, 0x00404808, 0x000 },
15734 { 0x0000a2d3, 0x00204411, 0x000 },
15735 { 0x00000001, 0x00504a28, 0x000 },
15736 { 0x0000a2c3, 0x00204411, 0x000 },
15737 { 0x00000000, 0x00204807, 0x000 },
15738 { 0x00000036, 0x0020262d, 0x000 },
15739 { 0x0000001a, 0x00212229, 0x000 },
15740 { 0x00000006, 0x00222629, 0x000 },
15741 { 0x0000a2c7, 0x00204411, 0x000 },
15742 { 0x00000000, 0x003048e9, 0x000 },
15743 { 0x00000000, 0x00e00000, 0x5b8 },
15744 { 0x0000a2d4, 0x00204411, 0x000 },
15745 { 0x00000000, 0x00404808, 0x000 },
15746 { 0x0000a2d4, 0x00204411, 0x000 },
15747 { 0x00000001, 0x00504a28, 0x000 },
15748 { 0x85000000, 0x00204411, 0x000 },
15749 { 0x00000000, 0x00204801, 0x000 },
15750 { 0x0000304a, 0x00204411, 0x000 },
15751 { 0x01000000, 0x00204811, 0x000 },
15752 { 0x00000000, 0x00400000, 0x5be },
15753 { 0xa4000000, 0xc0204411, 0x000 },
15754 { 0x00000000, 0xc0404800, 0x000 },
15755 { 0x00000000, 0xc0600000, 0x5c3 },
15756 { 0x00000000, 0xc0400400, 0x001 },
15757 { 0x0001a2a4, 0x00204411, 0x000 },
15758 { 0x0000003f, 0x00204811, 0x000 },
15759 { 0x0000003f, 0x00204811, 0x000 },
15760 { 0x0000003f, 0x00204811, 0x000 },
15761 { 0x0000003f, 0x00204811, 0x000 },
15762 { 0x00000005, 0x00204811, 0x000 },
15763 { 0x0000a1f4, 0x00204411, 0x000 },
15764 { 0x00000000, 0x00204811, 0x000 },
15765 { 0x88000000, 0x00204411, 0x000 },
15766 { 0x00000001, 0x00204811, 0x000 },
15767 { 0xff000000, 0x00204411, 0x000 },
15768 { 0x00000000, 0x00204811, 0x000 },
15769 { 0x00000001, 0x00204811, 0x000 },
15770 { 0x00000002, 0x00804811, 0x000 },
15771 { 0x00000000, 0x0ee00000, 0x5d6 },
15772 { 0x00001000, 0x00200811, 0x000 },
15773 { 0x0000002b, 0x00203622, 0x000 },
15774 { 0x00000000, 0x00600000, 0x5da },
15775 { 0x00000000, 0x00600000, 0x5c3 },
15776 { 0x98000000, 0x00204411, 0x000 },
15777 { 0x00000000, 0x00804811, 0x000 },
15778 { 0x00000000, 0xc0600000, 0x5da },
15779 { 0x00000000, 0xc0400400, 0x001 },
15780 { 0x0000a2a4, 0x00204411, 0x000 },
15781 { 0x00000022, 0x00204811, 0x000 },
15782 { 0x89000000, 0x00204411, 0x000 },
15783 { 0x00000001, 0x00404811, 0x5cd },
15784 { 0x97000000, 0x00204411, 0x000 },
15785 { 0x00000000, 0x00204811, 0x000 },
15786 { 0x8a000000, 0x00204411, 0x000 },
15787 { 0x00000000, 0x00404811, 0x5cd },
15788 { 0x00000000, 0x00600000, 0x5f3 },
15789 { 0x0001a2a4, 0xc0204411, 0x000 },
15790 { 0x00000016, 0x00604811, 0x374 },
15791 { 0x00002010, 0x00204411, 0x000 },
15792 { 0x00010000, 0x00204811, 0x000 },
15793 { 0x81000000, 0x00204411, 0x000 },
15794 { 0x00000001, 0x00204811, 0x000 },
15795 { 0x0000217c, 0x00204411, 0x000 },
15796 { 0x09800000, 0x00204811, 0x000 },
15797 { 0xffffffff, 0x00204811, 0x000 },
15798 { 0x00000000, 0x00204811, 0x000 },
15799 { 0x00000000, 0x17000000, 0x000 },
15800 { 0x0004217f, 0x00604411, 0x622 },
15801 { 0x0000001f, 0x00210230, 0x000 },
15802 { 0x00000000, 0x14c00000, 0x000 },
15803 { 0x00000004, 0x00404c11, 0x5ed },
15804 { 0x00000000, 0x00400000, 0x000 },
15805 { 0x00000017, 0x00201e2d, 0x000 },
15806 { 0x00000004, 0x00291e27, 0x000 },
15807 { 0x00000017, 0x00803627, 0x000 },
15808 { 0x00000017, 0x00201e2d, 0x000 },
15809 { 0xfffffffb, 0x00281e27, 0x000 },
15810 { 0x00000017, 0x00803627, 0x000 },
15811 { 0x00000017, 0x00201e2d, 0x000 },
15812 { 0x00000008, 0x00291e27, 0x000 },
15813 { 0x00000017, 0x00803627, 0x000 },
15814 { 0x00000017, 0x00201e2d, 0x000 },
15815 { 0xfffffff7, 0x00281e27, 0x000 },
15816 { 0x00000017, 0x00803627, 0x000 },
15817 { 0x0001a2a4, 0x00204411, 0x000 },
15818 { 0x00000016, 0x00604811, 0x374 },
15819 { 0x00002010, 0x00204411, 0x000 },
15820 { 0x00010000, 0x00204811, 0x000 },
15821 { 0x0000217c, 0x00204411, 0x000 },
15822 { 0x01800000, 0x00204811, 0x000 },
15823 { 0xffffffff, 0x00204811, 0x000 },
15824 { 0x00000000, 0x00204811, 0x000 },
15825 { 0x00000000, 0x17000000, 0x000 },
15826 { 0x81000000, 0x00204411, 0x000 },
15827 { 0x00000001, 0x00204811, 0x000 },
15828 { 0x0004217f, 0x00604411, 0x622 },
15829 { 0x0000001f, 0x00210230, 0x000 },
15830 { 0x00000000, 0x14c00000, 0x621 },
15831 { 0x00000010, 0x00404c11, 0x607 },
15832 { 0x00000000, 0xc0200400, 0x000 },
15833 { 0x00000000, 0x38c00000, 0x000 },
15834 { 0x0000001d, 0x00200a2d, 0x000 },
15835 { 0x0000001e, 0x00200e2d, 0x000 },
15836 { 0x0000001f, 0x0020122d, 0x000 },
15837 { 0x00000020, 0x0020162d, 0x000 },
15838 { 0x00002169, 0x00204411, 0x000 },
15839 { 0x00000000, 0x00204804, 0x000 },
15840 { 0x00000000, 0x00204805, 0x000 },
15841 { 0x00000000, 0x00204801, 0x000 },
15842 { 0xcafebabe, 0x00204811, 0x000 },
15843 { 0x00000004, 0x00301224, 0x000 },
15844 { 0x00000000, 0x002f0064, 0x000 },
15845 { 0x00000000, 0x0cc00000, 0x620 },
15846 { 0x00000003, 0x00281a22, 0x000 },
15847 { 0x00000008, 0x00221222, 0x000 },
15848 { 0xfffff000, 0x00281224, 0x000 },
15849 { 0x00000000, 0x002910c4, 0x000 },
15850 { 0x0000001f, 0x00403624, 0x000 },
15851 { 0x00000000, 0x00800000, 0x000 },
15852 { 0x00000000, 0x1ac00000, 0x622 },
15853 { 0x9f000000, 0x00204411, 0x000 },
15854 { 0xcafebabe, 0x00204811, 0x000 },
15855 { 0x00000000, 0x1ae00000, 0x625 },
15856 { 0x00000000, 0x00800000, 0x000 },
15857 { 0x00000000, 0x1ac00000, 0x627 },
15858 { 0x9e000000, 0x00204411, 0x000 },
15859 { 0xcafebabe, 0x00204811, 0x000 },
15860 { 0x00000000, 0x1ae00000, 0x62a },
15861 { 0x00000000, 0x00800000, 0x000 },
15862 { 0x00000000, 0x00600000, 0x00b },
15863 { 0x00001000, 0x00600411, 0x315 },
15864 { 0x00000000, 0x00200411, 0x000 },
15865 { 0x00000000, 0x00600811, 0x1b2 },
15866 { 0x0000225c, 0x00204411, 0x000 },
15867 { 0x00000003, 0x00204811, 0x000 },
15868 { 0x00002256, 0x00204411, 0x000 },
15869 { 0x0000001b, 0x00204811, 0x000 },
15870 { 0x0000a1fc, 0x00204411, 0x000 },
15871 { 0x00000001, 0x00204811, 0x000 },
15872 { 0x0001a1fd, 0xc0204411, 0x000 },
15873 { 0x00000021, 0x00201e2d, 0x000 },
15874 { 0x00000010, 0x00221e27, 0x000 },
15875 { 0x00000024, 0x0020222d, 0x000 },
15876 { 0x0000ffff, 0x00282228, 0x000 },
15877 { 0x00000000, 0x00294907, 0x000 },
15878 { 0x00000000, 0x00204811, 0x000 },
15879 { 0x00000022, 0x0020222d, 0x000 },
15880 { 0x0000ffff, 0x00282228, 0x000 },
15881 { 0x00000000, 0x00294907, 0x000 },
15882 { 0x00000000, 0x00204811, 0x000 },
15883 { 0x00000023, 0x00201e2d, 0x000 },
15884 { 0x00000010, 0x00221e27, 0x000 },
15885 { 0x00000000, 0x00294907, 0x000 },
15886 { 0x00000000, 0x00404811, 0x000 },
15887 { 0x00000000, 0x00000000, 0x000 },
15888 { 0x00000000, 0x00000000, 0x000 },
15889 { 0x00000000, 0x00000000, 0x000 },
15890 { 0x00000000, 0x00000000, 0x000 },
15891 { 0x00000000, 0x00000000, 0x000 },
15892 { 0x00000000, 0x00000000, 0x000 },
15893 { 0x00000000, 0x00000000, 0x000 },
15894 { 0x00000000, 0x00000000, 0x000 },
15895 { 0x00000000, 0x00000000, 0x000 },
15896 { 0x00000000, 0x00000000, 0x000 },
15897 { 0x00000000, 0x00000000, 0x000 },
15898 { 0x00000000, 0x00000000, 0x000 },
15899 { 0x00000000, 0x00000000, 0x000 },
15900 { 0x00000000, 0x00000000, 0x000 },
15901 { 0x00000000, 0x00000000, 0x000 },
15902 { 0x00000000, 0x00000000, 0x000 },
15903 { 0x00000000, 0x00000000, 0x000 },
15904 { 0x00000000, 0x00000000, 0x000 },
15905 { 0x00000000, 0x00000000, 0x000 },
15906 { 0x00000000, 0x00000000, 0x000 },
15907 { 0x00000000, 0x00000000, 0x000 },
15908 { 0x00000000, 0x00000000, 0x000 },
15909 { 0x00000000, 0x00000000, 0x000 },
15910 { 0x00000000, 0x00000000, 0x000 },
15911 { 0x00000000, 0x00000000, 0x000 },
15912 { 0x00000000, 0x00000000, 0x000 },
15913 { 0x00000000, 0x00000000, 0x000 },
15914 { 0x00000000, 0x00000000, 0x000 },
15915 { 0x00000000, 0x00000000, 0x000 },
15916 { 0x00000000, 0x00000000, 0x000 },
15917 { 0x00000000, 0x00000000, 0x000 },
15918 { 0x00000000, 0x00000000, 0x000 },
15919 { 0x00000000, 0x00000000, 0x000 },
15920 { 0x00000000, 0x00000000, 0x000 },
15921 { 0x00000000, 0x00000000, 0x000 },
15922 { 0x00000000, 0x00000000, 0x000 },
15923 { 0x00000000, 0x00000000, 0x000 },
15924 { 0x00000000, 0x00000000, 0x000 },
15925 { 0x00000000, 0x00000000, 0x000 },
15926 { 0x00000000, 0x00000000, 0x000 },
15927 { 0x00000000, 0x00000000, 0x000 },
15928 { 0x00000000, 0x00000000, 0x000 },
15929 { 0x00000000, 0x00000000, 0x000 },
15930 { 0x00000000, 0x00000000, 0x000 },
15931 { 0x00000000, 0x00000000, 0x000 },
15932 { 0x00000000, 0x00000000, 0x000 },
15933 { 0x00000000, 0x00000000, 0x000 },
15934 { 0x00000000, 0x00000000, 0x000 },
15935 { 0x00000000, 0x00000000, 0x000 },
15936 { 0x00000000, 0x00000000, 0x000 },
15937 { 0x00000000, 0x00000000, 0x000 },
15938 { 0x00000000, 0x00000000, 0x000 },
15939 { 0x00000000, 0x00000000, 0x000 },
15940 { 0x00000000, 0x00000000, 0x000 },
15941 { 0x00000000, 0x00000000, 0x000 },
15942 { 0x00000000, 0x00000000, 0x000 },
15943 { 0x00000000, 0x00000000, 0x000 },
15944 { 0x00000000, 0x00000000, 0x000 },
15945 { 0x00000000, 0x00000000, 0x000 },
15946 { 0x00000000, 0x00000000, 0x000 },
15947 { 0x00000000, 0x00000000, 0x000 },
15948 { 0x00000000, 0x00000000, 0x000 },
15949 { 0x00000000, 0x00000000, 0x000 },
15950 { 0x00000000, 0x00000000, 0x000 },
15951 { 0x00000000, 0x00000000, 0x000 },
15952 { 0x00000000, 0x00000000, 0x000 },
15953 { 0x00000000, 0x00000000, 0x000 },
15954 { 0x00000000, 0x00000000, 0x000 },
15955 { 0x00000000, 0x00000000, 0x000 },
15956 { 0x00000000, 0x00000000, 0x000 },
15957 { 0x00000000, 0x00000000, 0x000 },
15958 { 0x00000000, 0x00000000, 0x000 },
15959 { 0x00000000, 0x00000000, 0x000 },
15960 { 0x00000000, 0x00000000, 0x000 },
15961 { 0x00000000, 0x00000000, 0x000 },
15962 { 0x00000000, 0x00000000, 0x000 },
15963 { 0x00000000, 0x00000000, 0x000 },
15964 { 0x00000000, 0x00000000, 0x000 },
15965 { 0x00000000, 0x00000000, 0x000 },
15966 { 0x00000000, 0x00000000, 0x000 },
15967 { 0x00000000, 0x00000000, 0x000 },
15968 { 0x00000000, 0x00000000, 0x000 },
15969 { 0x00000000, 0x00000000, 0x000 },
15970 { 0x00000000, 0x00000000, 0x000 },
15971 { 0x00000000, 0x00000000, 0x000 },
15972 { 0x00000000, 0x00000000, 0x000 },
15973 { 0x00000000, 0x00000000, 0x000 },
15974 { 0x00000000, 0x00000000, 0x000 },
15975 { 0x00000000, 0x00000000, 0x000 },
15976 { 0x00000000, 0x00000000, 0x000 },
15977 { 0x00000000, 0x00000000, 0x000 },
15978 { 0x00000000, 0x00000000, 0x000 },
15979 { 0x00000000, 0x00000000, 0x000 },
15980 { 0x00000000, 0x00000000, 0x000 },
15981 { 0x00000000, 0x00000000, 0x000 },
15982 { 0x00000000, 0x00000000, 0x000 },
15983 { 0x00000000, 0x00000000, 0x000 },
15984 { 0x00000000, 0x00000000, 0x000 },
15985 { 0x00000000, 0x00000000, 0x000 },
15986 { 0x00000000, 0x00000000, 0x000 },
15987 { 0x00000000, 0x00000000, 0x000 },
15988 { 0x00000000, 0x00000000, 0x000 },
15989 { 0x00000000, 0x00000000, 0x000 },
15990 { 0x00000000, 0x00000000, 0x000 },
15991 { 0x00000000, 0x00000000, 0x000 },
15992 { 0x00000000, 0x00000000, 0x000 },
15993 { 0x00000000, 0x00000000, 0x000 },
15994 { 0x00000000, 0x00000000, 0x000 },
15995 { 0x00000000, 0x00000000, 0x000 },
15996 { 0x00000000, 0x00000000, 0x000 },
15997 { 0x00000000, 0x00000000, 0x000 },
15998 { 0x00000000, 0x00000000, 0x000 },
15999 { 0x00000000, 0x00000000, 0x000 },
16000 { 0x00000000, 0x00000000, 0x000 },
16001 { 0x00000000, 0x00000000, 0x000 },
16002 { 0x00000000, 0x00000000, 0x000 },
16003 { 0x00000000, 0x00000000, 0x000 },
16004 { 0x00000000, 0x00000000, 0x000 },
16005 { 0x00000000, 0x00000000, 0x000 },
16006 { 0x00000000, 0x00000000, 0x000 },
16007 { 0x00000000, 0x00000000, 0x000 },
16008 { 0x00000000, 0x00000000, 0x000 },
16009 { 0x00000000, 0x00000000, 0x000 },
16010 { 0x00000000, 0x00000000, 0x000 },
16011 { 0x00000000, 0x00000000, 0x000 },
16012 { 0x00000000, 0x00000000, 0x000 },
16013 { 0x00000000, 0x00000000, 0x000 },
16014 { 0x00000000, 0x00000000, 0x000 },
16015 { 0x00000000, 0x00000000, 0x000 },
16016 { 0x00000000, 0x00000000, 0x000 },
16017 { 0x00000000, 0x00000000, 0x000 },
16018 { 0x00000000, 0x00000000, 0x000 },
16019 { 0x00000000, 0x00000000, 0x000 },
16020 { 0x00000000, 0x00000000, 0x000 },
16021 { 0x00000000, 0x00000000, 0x000 },
16022 { 0x00000000, 0x00000000, 0x000 },
16023 { 0x00000000, 0x00000000, 0x000 },
16024 { 0x00000000, 0x00000000, 0x000 },
16025 { 0x00000000, 0x00000000, 0x000 },
16026 { 0x00000000, 0x00000000, 0x000 },
16027 { 0x00000000, 0x00000000, 0x000 },
16028 { 0x00000000, 0x00000000, 0x000 },
16029 { 0x00000000, 0x00000000, 0x000 },
16030 { 0x00000000, 0x00000000, 0x000 },
16031 { 0x00000000, 0x00000000, 0x000 },
16032 { 0x00000000, 0x00000000, 0x000 },
16033 { 0x00000000, 0x00000000, 0x000 },
16034 { 0x00000000, 0x00000000, 0x000 },
16035 { 0x00000000, 0x00000000, 0x000 },
16036 { 0x00000000, 0x00000000, 0x000 },
16037 { 0x00000000, 0x00000000, 0x000 },
16038 { 0x00000000, 0x00000000, 0x000 },
16039 { 0x00000000, 0x00000000, 0x000 },
16040 { 0x00000000, 0x00000000, 0x000 },
16041 { 0x00000000, 0x00000000, 0x000 },
16042 { 0x00000000, 0x00000000, 0x000 },
16043 { 0x00000000, 0x00000000, 0x000 },
16044 { 0x00000000, 0x00000000, 0x000 },
16045 { 0x00000000, 0x00000000, 0x000 },
16046 { 0x0142050a, 0x05ba0250, 0x000 },
16047 { 0x01c30168, 0x044105ba, 0x000 },
16048 { 0x02250209, 0x02500151, 0x000 },
16049 { 0x02230245, 0x02a00241, 0x000 },
16050 { 0x03d705ba, 0x05ba05ba, 0x000 },
16051 { 0x05e205e3, 0x031f05ba, 0x000 },
16052 { 0x032005bf, 0x0320034a, 0x000 },
16053 { 0x03340282, 0x034c033e, 0x000 },
16054 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16055 { 0x05ba0557, 0x05ba032a, 0x000 },
16056 { 0x03bc05ba, 0x04c3034e, 0x000 },
16057 { 0x04a20455, 0x043f05ba, 0x000 },
16058 { 0x04d805ba, 0x044304e5, 0x000 },
16059 { 0x0455050f, 0x035b037b, 0x000 },
16060 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16061 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16062 { 0x05ba05ba, 0x05d805c1, 0x000 },
16063 { 0x05ba05ba, 0x000705ba, 0x000 },
16064 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16065 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16066 { 0x03f803ed, 0x04080406, 0x000 },
16067 { 0x040e040a, 0x040c0410, 0x000 },
16068 { 0x041c0418, 0x04240420, 0x000 },
16069 { 0x042c0428, 0x04340430, 0x000 },
16070 { 0x05ba05ba, 0x043a0438, 0x000 },
16071 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16072 { 0x05ba05ba, 0x05ba05ba, 0x000 },
16073 { 0x0002060e, 0x062c0006, 0x000 },
16074};
16075
16076static const u32 RS780_pfp_microcode[] = {
160770xca0400,
160780xa00000,
160790x7e828b,
160800x7c038b,
160810x8001db,
160820x7c038b,
160830xd4401e,
160840xee001e,
160850xca0400,
160860xa00000,
160870x7e828b,
160880xc41838,
160890xca2400,
160900xca2800,
160910x9581cb,
160920xc41c3a,
160930xc3c000,
160940xca0800,
160950xca0c00,
160960x7c744b,
160970xc20005,
160980x99c000,
160990xc41c3a,
161000x7c744c,
161010xc0ffe0,
161020x042c08,
161030x309002,
161040x7d2500,
161050x351402,
161060x7d350b,
161070x255407,
161080x7cd580,
161090x259c07,
161100x95c004,
161110xd5001b,
161120x7eddc1,
161130x7d9d80,
161140xd6801b,
161150xd5801b,
161160xd4401e,
161170xd5401e,
161180xd6401e,
161190xd6801e,
161200xd4801e,
161210xd4c01e,
161220x9783d3,
161230xd5c01e,
161240xca0800,
161250x80001a,
161260xca0c00,
161270xe4011e,
161280xd4001e,
161290x80000c,
161300xc41838,
161310xe4013e,
161320xd4001e,
161330x80000c,
161340xc41838,
161350xd4401e,
161360xee001e,
161370xca0400,
161380xa00000,
161390x7e828b,
161400xe4011e,
161410xd4001e,
161420xd4401e,
161430xee001e,
161440xca0400,
161450xa00000,
161460x7e828b,
161470xe4013e,
161480xd4001e,
161490xd4401e,
161500xee001e,
161510xca0400,
161520xa00000,
161530x7e828b,
161540xca0800,
161550xca0c00,
161560x8001db,
161570xd48024,
161580xca0800,
161590x7c00c0,
161600xc81425,
161610xc81824,
161620x7c9488,
161630x7c9880,
161640xc20003,
161650xd40075,
161660x7c744c,
161670x800064,
161680xd4401e,
161690xca1800,
161700xd4401e,
161710xd5801e,
161720x800062,
161730xd40075,
161740xd4401e,
161750xca0800,
161760xca0c00,
161770xca1000,
161780xd48019,
161790xd4c018,
161800xd50017,
161810xd4801e,
161820xd4c01e,
161830xd5001e,
161840xe2001e,
161850xca0400,
161860xa00000,
161870x7e828b,
161880xd40075,
161890xd4401e,
161900xca0800,
161910xca0c00,
161920xca1000,
161930xd48019,
161940xd4c018,
161950xd50017,
161960xd4801e,
161970xd4c01e,
161980xd5001e,
161990xee001e,
162000xca0400,
162010xa00000,
162020x7e828b,
162030xca0800,
162040x248c01,
162050xd48060,
162060x94c003,
162070x041001,
162080x041002,
162090xd50025,
162100xd4401e,
162110x800000,
162120xd4801e,
162130xca0800,
162140xd48061,
162150xd4401e,
162160x800000,
162170xd4801e,
162180xca0800,
162190xca0c00,
162200xd4401e,
162210xd48016,
162220xd4c016,
162230xd4801e,
162240x8001db,
162250xd4c01e,
162260xc60843,
162270xca0c00,
162280xca1000,
162290x948004,
162300xca1400,
162310xe420f3,
162320xd42013,
162330xd56065,
162340xd4e01c,
162350xd5201c,
162360xd5601c,
162370x800000,
162380x062001,
162390xc60843,
162400xca0c00,
162410xca1000,
162420x9483f7,
162430xca1400,
162440xe420f3,
162450x80009c,
162460xd42013,
162470xc60843,
162480xca0c00,
162490xca1000,
162500x9883ef,
162510xca1400,
162520xd40064,
162530x8000b0,
162540x000000,
162550xc41432,
162560xc61843,
162570xc4082f,
162580x954005,
162590xc40c30,
162600xd4401e,
162610x800000,
162620xee001e,
162630x9583f5,
162640xc41031,
162650xd44033,
162660xd52065,
162670xd4a01c,
162680xd4e01c,
162690xd5201c,
162700xe4015e,
162710xd4001e,
162720x800000,
162730x062001,
162740xca1800,
162750x0a2001,
162760xd60076,
162770xc40836,
162780x988007,
162790xc61045,
162800x950110,
162810xd4001f,
162820xd46062,
162830x800000,
162840xd42062,
162850xcc3835,
162860xcc1433,
162870x8401de,
162880xd40072,
162890xd5401e,
162900x800000,
162910xee001e,
162920xe2001a,
162930x8401de,
162940xe2001a,
162950xcc104b,
162960xcc0447,
162970x2c9401,
162980x7d098b,
162990x984005,
163000x7d15cb,
163010xd4001a,
163020x8001db,
163030xd4006d,
163040x344401,
163050xcc0c48,
163060x98403a,
163070xcc2c4a,
163080x958004,
163090xcc0449,
163100x8001db,
163110xd4001a,
163120xd4c01a,
163130x282801,
163140x840113,
163150xcc1003,
163160x98801b,
163170x04380c,
163180x840113,
163190xcc1003,
163200x988017,
163210x043808,
163220x840113,
163230xcc1003,
163240x988013,
163250x043804,
163260x840113,
163270xcc1003,
163280x988014,
163290xcc104c,
163300x9a8009,
163310xcc144d,
163320x9840dc,
163330xd4006d,
163340xcc1848,
163350xd5001a,
163360xd5401a,
163370x8000ec,
163380xd5801a,
163390x96c0d5,
163400xd4006d,
163410x8001db,
163420xd4006e,
163430x9ac003,
163440xd4006d,
163450xd4006e,
163460x800000,
163470xec007f,
163480x9ac0cc,
163490xd4006d,
163500x8001db,
163510xd4006e,
163520xcc1403,
163530xcc1803,
163540xcc1c03,
163550x7d9103,
163560x7dd583,
163570x7d190c,
163580x35cc1f,
163590x35701f,
163600x7cf0cb,
163610x7cd08b,
163620x880000,
163630x7e8e8b,
163640x95c004,
163650xd4006e,
163660x8001db,
163670xd4001a,
163680xd4c01a,
163690xcc0803,
163700xcc0c03,
163710xcc1003,
163720xcc1403,
163730xcc1803,
163740xcc1c03,
163750xcc2403,
163760xcc2803,
163770x35c41f,
163780x36b01f,
163790x7c704b,
163800x34f01f,
163810x7c704b,
163820x35701f,
163830x7c704b,
163840x7d8881,
163850x7dccc1,
163860x7e5101,
163870x7e9541,
163880x7c9082,
163890x7cd4c2,
163900x7c848b,
163910x9ac003,
163920x7c8c8b,
163930x2c8801,
163940x98809e,
163950xd4006d,
163960x98409c,
163970xd4006e,
163980xcc084c,
163990xcc0c4d,
164000xcc1048,
164010xd4801a,
164020xd4c01a,
164030x800124,
164040xd5001a,
164050xcc0832,
164060xd40032,
164070x9482b6,
164080xca0c00,
164090xd4401e,
164100x800000,
164110xd4001e,
164120xe4011e,
164130xd4001e,
164140xca0800,
164150xca0c00,
164160xca1000,
164170xd4401e,
164180xca1400,
164190xd4801e,
164200xd4c01e,
164210xd5001e,
164220xd5401e,
164230xd54034,
164240x800000,
164250xee001e,
164260x280404,
164270xe2001a,
164280xe2001a,
164290xd4401a,
164300xca3800,
164310xcc0803,
164320xcc0c03,
164330xcc0c03,
164340xcc0c03,
164350x98829a,
164360x000000,
164370x8401de,
164380xd7a06f,
164390x800000,
164400xee001f,
164410xca0400,
164420xc2ff00,
164430xcc0834,
164440xc13fff,
164450x7c74cb,
164460x7cc90b,
164470x7d010f,
164480x99028d,
164490x7c738b,
164500x8401de,
164510xd7a06f,
164520x800000,
164530xee001f,
164540xca0800,
164550x281900,
164560x7d898b,
164570x958014,
164580x281404,
164590xca0c00,
164600xca1000,
164610xca1c00,
164620xca2400,
164630xe2001f,
164640xd4c01a,
164650xd5001a,
164660xd5401a,
164670xcc1803,
164680xcc2c03,
164690xcc2c03,
164700xcc2c03,
164710x7da58b,
164720x7d9c47,
164730x984274,
164740x000000,
164750x800184,
164760xd4c01a,
164770xd4401e,
164780xd4801e,
164790x800000,
164800xee001e,
164810xe4011e,
164820xd4001e,
164830xd4401e,
164840xee001e,
164850xca0400,
164860xa00000,
164870x7e828b,
164880xe4013e,
164890xd4001e,
164900xd4401e,
164910xee001e,
164920xca0400,
164930xa00000,
164940x7e828b,
164950xca0800,
164960x248c06,
164970x0ccc06,
164980x98c006,
164990xcc104e,
165000x990004,
165010xd40073,
165020xe4011e,
165030xd4001e,
165040xd4401e,
165050xd4801e,
165060x800000,
165070xee001e,
165080xca0800,
165090xca0c00,
165100x34d018,
165110x251001,
165120x950021,
165130xc17fff,
165140xca1000,
165150xca1400,
165160xca1800,
165170xd4801d,
165180xd4c01d,
165190x7db18b,
165200xc14202,
165210xc2c001,
165220xd5801d,
165230x34dc0e,
165240x7d5d4c,
165250x7f734c,
165260xd7401e,
165270xd5001e,
165280xd5401e,
165290xc14200,
165300xc2c000,
165310x099c01,
165320x31dc10,
165330x7f5f4c,
165340x7f734c,
165350x042802,
165360x7d8380,
165370xd5a86f,
165380xd58066,
165390xd7401e,
165400xec005e,
165410xc82402,
165420xc82402,
165430x8001db,
165440xd60076,
165450xd4401e,
165460xd4801e,
165470xd4c01e,
165480x800000,
165490xee001e,
165500x800000,
165510xee001f,
165520xd4001f,
165530x800000,
165540xd4001f,
165550xd4001f,
165560x880000,
165570xd4001f,
165580x000000,
165590x000000,
165600x000000,
165610x000000,
165620x000000,
165630x000000,
165640x000000,
165650x000000,
165660x000000,
165670x000000,
165680x000000,
165690x000000,
165700x000000,
165710x000000,
165720x000000,
165730x000000,
165740x000000,
165750x000000,
165760x000000,
165770x000000,
165780x000000,
165790x000000,
165800x000000,
165810x000000,
165820x000000,
165830x000000,
165840x000000,
165850x000000,
165860x000000,
165870x000000,
165880x000000,
165890x010194,
165900x02019b,
165910x0300b2,
165920x0400a2,
165930x050003,
165940x06003f,
165950x070032,
165960x08014f,
165970x090046,
165980x0a0036,
165990x1001d9,
166000x1700c5,
166010x22015d,
166020x23016c,
166030x2000d7,
166040x240148,
166050x26004d,
166060x27005c,
166070x28008d,
166080x290051,
166090x2a007e,
166100x2b0061,
166110x2f0088,
166120x3200aa,
166130x3401a2,
166140x36006f,
166150x3c0179,
166160x3f0095,
166170x4101af,
166180x440151,
166190x550196,
166200x56019d,
166210x60000b,
166220x610034,
166230x620038,
166240x630038,
166250x640038,
166260x650038,
166270x660038,
166280x670038,
166290x68003a,
166300x690041,
166310x6a0048,
166320x6b0048,
166330x6c0048,
166340x6d0048,
166350x6e0048,
166360x6f0048,
166370x7301d9,
166380x000006,
166390x000006,
166400x000006,
166410x000006,
166420x000006,
166430x000006,
166440x000006,
166450x000006,
166460x000006,
166470x000006,
166480x000006,
166490x000006,
166500x000006,
166510x000006,
166520x000006,
16653};
16654
16655static const u32 RV770_cp_microcode[] = {
166560xcc0003ea,
166570x7c408000,
166580xa0000000,
166590xcc800062,
166600x80000001,
166610xd040007f,
166620x80000001,
166630xcc400041,
166640x7c40c000,
166650xc0160004,
166660x30d03fff,
166670x7d15000c,
166680xcc110000,
166690x28d8001e,
166700x31980001,
166710x28dc001f,
166720xc8200004,
166730x95c00006,
166740x7c424000,
166750xcc000062,
166760x7e56800c,
166770xcc290000,
166780xc8240004,
166790x7e26000b,
166800x95800006,
166810x7c42c000,
166820xcc000062,
166830x7ed7000c,
166840xcc310000,
166850xc82c0004,
166860x7e2e000c,
166870xcc000062,
166880x31103fff,
166890x80000001,
166900xce110000,
166910x7c40c000,
166920x80000001,
166930xcc400040,
166940x80000001,
166950xcc412257,
166960x7c418000,
166970xcc400045,
166980xcc400048,
166990xcc41225c,
167000xcc41a1fc,
167010x7c408000,
167020xa0000000,
167030xcc800062,
167040xcc400045,
167050xcc400048,
167060x7c40c000,
167070xcc41225c,
167080xcc41a1fc,
167090x7c408000,
167100xa0000000,
167110xcc800062,
167120xcc000045,
167130xcc000048,
167140xcc41225c,
167150xcc41a1fc,
167160x7c408000,
167170xa0000000,
167180xcc800062,
167190x040ca1fd,
167200xc0120001,
167210xcc000045,
167220xcc000048,
167230x7cd0c00c,
167240xcc41225c,
167250xcc41a1fc,
167260xd04d0000,
167270x7c408000,
167280xa0000000,
167290xcc800062,
167300x80000001,
167310xcc41225d,
167320x7c408000,
167330x7c40c000,
167340xc02a0002,
167350x7c410000,
167360x7d29000c,
167370x30940001,
167380x30980006,
167390x309c0300,
167400x29dc0008,
167410x7c420000,
167420x7c424000,
167430x9540000f,
167440xc02e0004,
167450x05f02258,
167460x7f2f000c,
167470xcc310000,
167480xc8280004,
167490xccc12169,
167500xcd01216a,
167510xce81216b,
167520x0db40002,
167530xcc01216c,
167540x9740000e,
167550x0db40000,
167560x8000007b,
167570xc834000a,
167580x0db40002,
167590x97400009,
167600x0db40000,
167610xc02e0004,
167620x05f02258,
167630x7f2f000c,
167640xcc310000,
167650xc8280004,
167660x8000007b,
167670xc834000a,
167680x97400004,
167690x7e028000,
167700x8000007b,
167710xc834000a,
167720x0db40004,
167730x9740ff8c,
167740x00000000,
167750xce01216d,
167760xce41216e,
167770xc8280003,
167780xc834000a,
167790x9b400004,
167800x043c0005,
167810x8400026d,
167820xcc000062,
167830x0df40000,
167840x9740000b,
167850xc82c03e6,
167860xce81a2b7,
167870xc0300006,
167880x7ef34028,
167890xc0300020,
167900x7f6b8020,
167910x7fb3c029,
167920xcf81a2c4,
167930x80000001,
167940xcfc1a2d1,
167950x0df40001,
167960x9740000b,
167970xc82c03e7,
167980xce81a2bb,
167990xc0300006,
168000x7ef34028,
168010xc0300020,
168020x7f6b8020,
168030x7fb3c029,
168040xcf81a2c5,
168050x80000001,
168060xcfc1a2d2,
168070x0df40002,
168080x9740000b,
168090xc82c03e8,
168100xce81a2bf,
168110xc0300006,
168120x7ef34028,
168130xc0300020,
168140x7f6b8020,
168150x7fb3c029,
168160xcf81a2c6,
168170x80000001,
168180xcfc1a2d3,
168190xc82c03e9,
168200xce81a2c3,
168210xc0300006,
168220x7ef34028,
168230xc0300020,
168240x7f6b8020,
168250x7fb3c029,
168260xcf81a2c7,
168270x80000001,
168280xcfc1a2d4,
168290x80000001,
168300xcc400042,
168310x7c40c000,
168320x7c410000,
168330x2914001d,
168340x31540001,
168350x9940000d,
168360x31181000,
168370xc81c0011,
168380x09dc0001,
168390x95c0ffff,
168400xc81c0011,
168410xccc12100,
168420xcd012101,
168430xccc12102,
168440xcd012103,
168450x04180004,
168460x8000039f,
168470xcd81a2a4,
168480xc02a0004,
168490x95800008,
168500x36a821a3,
168510xcc290000,
168520xc8280004,
168530xc81c0011,
168540x0de40040,
168550x9640ffff,
168560xc81c0011,
168570xccc12170,
168580xcd012171,
168590xc8200012,
168600x96000000,
168610xc8200012,
168620x8000039f,
168630xcc000064,
168640x7c40c000,
168650x7c410000,
168660xcc000045,
168670xcc000048,
168680x40d40003,
168690xcd41225c,
168700xcd01a1fc,
168710xc01a0001,
168720x041ca1fd,
168730x7dd9c00c,
168740x7c420000,
168750x08cc0001,
168760x06240001,
168770x06280002,
168780xce1d0000,
168790xce5d0000,
168800x98c0fffa,
168810xce9d0000,
168820x7c408000,
168830xa0000000,
168840xcc800062,
168850x7c40c000,
168860x30d00001,
168870x28cc0001,
168880x7c414000,
168890x95000006,
168900x7c418000,
168910xcd41216d,
168920xcd81216e,
168930x800000f3,
168940xc81c0003,
168950xc0220004,
168960x7e16000c,
168970xcc210000,
168980xc81c0004,
168990x7c424000,
169000x98c00004,
169010x7c428000,
169020x80000001,
169030xcde50000,
169040xce412169,
169050xce81216a,
169060xcdc1216b,
169070x80000001,
169080xcc01216c,
169090x7c40c000,
169100x7c410000,
169110x7c414000,
169120x7c418000,
169130x7c41c000,
169140x28a40008,
169150x326400ff,
169160x0e68003c,
169170x9680000a,
169180x7c020000,
169190x7c420000,
169200x1e300003,
169210xcc00006a,
169220x9b000003,
169230x42200005,
169240x04200040,
169250x80000110,
169260x7c024000,
169270x7e024000,
169280x9a400000,
169290x0a640001,
169300x30ec0010,
169310x9ac0000a,
169320xcc000062,
169330xc02a0004,
169340xc82c0021,
169350x7e92800c,
169360xcc000041,
169370xcc290000,
169380xcec00021,
169390x80000120,
169400xc8300004,
169410xcd01216d,
169420xcd41216e,
169430xc8300003,
169440x7f1f000b,
169450x30f40007,
169460x27780001,
169470x9740002a,
169480x07b80125,
169490x9f800000,
169500x00000000,
169510x80000135,
169520x7f1b8004,
169530x80000139,
169540x7f1b8005,
169550x8000013d,
169560x7f1b8002,
169570x80000141,
169580x7f1b8003,
169590x80000145,
169600x7f1b8007,
169610x80000149,
169620x7f1b8006,
169630x8000014e,
169640x28a40008,
169650x9b800019,
169660x28a40008,
169670x8000015e,
169680x326400ff,
169690x9b800015,
169700x28a40008,
169710x8000015e,
169720x326400ff,
169730x9b800011,
169740x28a40008,
169750x8000015e,
169760x326400ff,
169770x9b80000d,
169780x28a40008,
169790x8000015e,
169800x326400ff,
169810x9b800009,
169820x28a40008,
169830x8000015e,
169840x326400ff,
169850x9b800005,
169860x28a40008,
169870x8000015e,
169880x326400ff,
169890x28a40008,
169900x326400ff,
169910x0e68003c,
169920x9a80feb1,
169930x28ec0008,
169940x7c434000,
169950x7c438000,
169960x7c43c000,
169970x96c00007,
169980xcc000062,
169990xcf412169,
170000xcf81216a,
170010xcfc1216b,
170020x80000001,
170030xcc01216c,
170040x80000001,
170050xcff50000,
170060xcc00006b,
170070x840003a2,
170080x0e68003c,
170090x9a800004,
170100xc8280015,
170110x80000001,
170120xd040007f,
170130x9680ffab,
170140x7e024000,
170150x8400023b,
170160xc00e0002,
170170xcc000041,
170180x80000239,
170190xccc1304a,
170200x7c40c000,
170210x7c410000,
170220xc01e0001,
170230x29240012,
170240xc0220002,
170250x96400005,
170260xc0260004,
170270xc027fffb,
170280x7d25000b,
170290xc0260000,
170300x7dd2800b,
170310x7e12c00b,
170320x7d25000c,
170330x7c414000,
170340x7c418000,
170350xccc12169,
170360x9a80000a,
170370xcd01216a,
170380xcd41216b,
170390x96c0fe82,
170400xcd81216c,
170410xc8300018,
170420x97000000,
170430xc8300018,
170440x80000001,
170450xcc000018,
170460x840003a2,
170470xcc00007f,
170480xc8140013,
170490xc8180014,
170500xcd41216b,
170510x96c0fe76,
170520xcd81216c,
170530x80000182,
170540xc8300018,
170550xc80c0008,
170560x98c00000,
170570xc80c0008,
170580x7c410000,
170590x95000002,
170600x00000000,
170610x7c414000,
170620xc8200009,
170630xcc400043,
170640xce01a1f4,
170650xcc400044,
170660xc00e8000,
170670x7c424000,
170680x7c428000,
170690x2aac001f,
170700x96c0fe63,
170710xc035f000,
170720xce4003e2,
170730x32780003,
170740x267c0008,
170750x7ff7c00b,
170760x7ffbc00c,
170770x2a780018,
170780xcfc003e3,
170790xcf8003e4,
170800x26b00002,
170810x7f3f0000,
170820xcf0003e5,
170830x8000031f,
170840x7c80c000,
170850x7c40c000,
170860x28d00008,
170870x3110000f,
170880x9500000f,
170890x25280001,
170900x06a801b3,
170910x9e800000,
170920x00000000,
170930x800001d4,
170940xc0120800,
170950x800001e2,
170960xc814000f,
170970x800001e9,
170980xc8140010,
170990x800001f0,
171000xccc1a2a4,
171010x800001f9,
171020xc8140011,
171030x30d0003f,
171040x0d280015,
171050x9a800012,
171060x0d28001e,
171070x9a80001e,
171080x0d280020,
171090x9a800023,
171100x0d24000f,
171110x0d280010,
171120x7e6a800c,
171130x9a800026,
171140x0d200004,
171150x0d240014,
171160x0d280028,
171170x7e62400c,
171180x7ea6800c,
171190x9a80002a,
171200xc8140011,
171210x80000001,
171220xccc1a2a4,
171230xc0120800,
171240x7c414000,
171250x7d0cc00c,
171260xc0120008,
171270x29580003,
171280x295c000c,
171290x7c420000,
171300x7dd1c00b,
171310x26200014,
171320x7e1e400c,
171330x7e4e800c,
171340xce81a2a4,
171350x80000001,
171360xcd81a1fe,
171370xc814000f,
171380x0410210e,
171390x95400000,
171400xc814000f,
171410xd0510000,
171420x80000001,
171430xccc1a2a4,
171440xc8140010,
171450x04102108,
171460x95400000,
171470xc8140010,
171480xd0510000,
171490x80000001,
171500xccc1a2a4,
171510xccc1a2a4,
171520x04100001,
171530xcd000019,
171540x840003a2,
171550xcc00007f,
171560xc8100019,
171570x99000000,
171580xc8100019,
171590x80000002,
171600x7c408000,
171610x04102100,
171620x09540001,
171630x9540ffff,
171640xc8140011,
171650xd0510000,
171660x8000039f,
171670xccc1a2a4,
171680x7c40c000,
171690xcc40000d,
171700x94c0fdff,
171710xcc40000e,
171720x7c410000,
171730x95000005,
171740x08cc0001,
171750xc8140005,
171760x99400014,
171770x00000000,
171780x98c0fffb,
171790x7c410000,
171800x80000002,
171810x7d008000,
171820xc8140005,
171830x7c40c000,
171840x9940000c,
171850xc818000c,
171860x7c410000,
171870x9580fdee,
171880xc820000e,
171890xc81c000d,
171900x66200020,
171910x7e1e002c,
171920x25240002,
171930x7e624020,
171940x80000001,
171950xcce60000,
171960x7c410000,
171970xcc00006c,
171980xcc00006d,
171990xc818001f,
172000xc81c001e,
172010x65980020,
172020x7dd9c02c,
172030x7cd4c00c,
172040xccde0000,
172050x45dc0004,
172060xc8280017,
172070x9680000f,
172080xc00e0001,
172090x28680008,
172100x2aac0016,
172110x32a800ff,
172120x0eb00049,
172130x7f2f000b,
172140x97000006,
172150x00000000,
172160xc8140005,
172170x7c40c000,
172180x80000223,
172190x7c410000,
172200x80000226,
172210xd040007f,
172220x8400023b,
172230xcc000041,
172240xccc1304a,
172250x94000000,
172260xc83c001a,
172270x043c0005,
172280xcfc1a2a4,
172290xc0361f90,
172300xc0387fff,
172310x7c03c010,
172320x7f7b400c,
172330xcf41217c,
172340xcfc1217d,
172350xcc01217e,
172360xc03a0004,
172370x0434217f,
172380x7f7b400c,
172390xcc350000,
172400xc83c0004,
172410x2bfc001f,
172420x04380020,
172430x97c00005,
172440xcc000062,
172450x9b800000,
172460x0bb80001,
172470x80000247,
172480xcc000071,
172490xcc01a1f4,
172500x04380016,
172510xc0360002,
172520xcf81a2a4,
172530x88000000,
172540xcf412010,
172550x7c40c000,
172560x28d0001c,
172570x95000005,
172580x04d40001,
172590xcd400065,
172600x80000001,
172610xcd400068,
172620x09540002,
172630x80000001,
172640xcd400066,
172650x8400026c,
172660xc81803ea,
172670x7c40c000,
172680x9980fd9d,
172690xc8140016,
172700x08d00001,
172710x9940002b,
172720xcd000068,
172730x7c408000,
172740xa0000000,
172750xcc800062,
172760x043c0005,
172770xcfc1a2a4,
172780xcc01a1f4,
172790x840003a2,
172800xcc000046,
172810x88000000,
172820xcc00007f,
172830x8400027e,
172840xc81803ea,
172850x7c40c000,
172860x9980fd8b,
172870xc8140016,
172880x08d00001,
172890x99400019,
172900xcd000068,
172910x7c408000,
172920xa0000000,
172930xcc800062,
172940x043c0022,
172950xcfc1a2a4,
172960x840003a2,
172970xcc000047,
172980x88000000,
172990xcc00007f,
173000xc8100016,
173010x9900000d,
173020xcc400067,
173030x80000002,
173040x7c408000,
173050xc81803ea,
173060x9980fd77,
173070x7c40c000,
173080x94c00003,
173090xc8100016,
173100x99000004,
173110xccc00068,
173120x80000002,
173130x7c408000,
173140x8400023b,
173150xc0148000,
173160xcc000041,
173170xcd41304a,
173180xc0148000,
173190x99000000,
173200xc8100016,
173210x80000002,
173220x7c408000,
173230xc0120001,
173240x7c51400c,
173250x80000001,
173260xd0550000,
173270x7c40c000,
173280x7c410000,
173290x7c414000,
173300x7c418000,
173310x291c001f,
173320xccc0004a,
173330xcd00004b,
173340x95c00003,
173350xc01c8000,
173360xcdc12010,
173370xdd830000,
173380x055c2000,
173390xcc000062,
173400x80000001,
173410xd81f4100,
173420x7c40c000,
173430x7c410000,
173440x7c414000,
173450x7c418000,
173460xccc0004c,
173470xcd00004d,
173480xdd830000,
173490x055ca000,
173500x80000001,
173510xd81f4100,
173520x7c40c000,
173530x7c410000,
173540x7c414000,
173550x7c418000,
173560xccc0004e,
173570xcd00004f,
173580xdd830000,
173590x055cc000,
173600x80000001,
173610xd81f4100,
173620x7c40c000,
173630x7c410000,
173640x7c414000,
173650x7c418000,
173660xccc00050,
173670xcd000051,
173680xdd830000,
173690x055cf8e0,
173700x80000001,
173710xd81f4100,
173720x7c40c000,
173730x7c410000,
173740x7c414000,
173750x7c418000,
173760xccc00052,
173770xcd000053,
173780xdd830000,
173790x055cf880,
173800x80000001,
173810xd81f4100,
173820x7c40c000,
173830x7c410000,
173840x7c414000,
173850x7c418000,
173860xccc00054,
173870xcd000055,
173880xdd830000,
173890x055ce000,
173900x80000001,
173910xd81f4100,
173920x7c40c000,
173930x7c410000,
173940x7c414000,
173950x7c418000,
173960xccc00056,
173970xcd000057,
173980xdd830000,
173990x055cf000,
174000x80000001,
174010xd81f4100,
174020x7c40c000,
174030x7c410000,
174040x7c414000,
174050x7c418000,
174060xccc00058,
174070xcd000059,
174080xdd830000,
174090x055cf3fc,
174100x80000001,
174110xd81f4100,
174120xd0432000,
174130x7c408000,
174140xa0000000,
174150xcc800062,
174160xd043a000,
174170x7c408000,
174180xa0000000,
174190xcc800062,
174200xd043c000,
174210x7c408000,
174220xa0000000,
174230xcc800062,
174240xd043f8e0,
174250x7c408000,
174260xa0000000,
174270xcc800062,
174280xd043f880,
174290x7c408000,
174300xa0000000,
174310xcc800062,
174320xd043e000,
174330x7c408000,
174340xa0000000,
174350xcc800062,
174360xd043f000,
174370x7c408000,
174380xa0000000,
174390xcc800062,
174400xd043f3fc,
174410x7c408000,
174420xa0000000,
174430xcc800062,
174440xc81403e0,
174450xcc430000,
174460xcc430000,
174470xcc430000,
174480x7d45c000,
174490xcdc30000,
174500xd0430000,
174510x7c408000,
174520xa0000000,
174530xcc800062,
174540x7c40c000,
174550xc81003e2,
174560xc81403e5,
174570xc81803e3,
174580xc81c03e4,
174590xcd812169,
174600xcdc1216a,
174610xccc1216b,
174620xcc01216c,
174630x04200004,
174640x7da18000,
174650x7d964002,
174660x9640fcd7,
174670xcd8003e3,
174680x31280003,
174690xc02df000,
174700x25180008,
174710x7dad800b,
174720x7da9800c,
174730x80000001,
174740xcd8003e3,
174750x308cffff,
174760xd04d0000,
174770x7c408000,
174780xa0000000,
174790xcc800062,
174800x7c40c000,
174810x7c410000,
174820x29240018,
174830x32640001,
174840x9a400013,
174850xc8140020,
174860x15580002,
174870x9580ffff,
174880xc8140020,
174890xcc00006e,
174900xccc12180,
174910xcd01218d,
174920xcc412181,
174930x2914001f,
174940x34588000,
174950xcd81218c,
174960x9540fcb9,
174970xcc412182,
174980xc8140020,
174990x9940ffff,
175000xc8140020,
175010x80000002,
175020x7c408000,
175030x7c414000,
175040x7c418000,
175050x7c41c000,
175060x65b40020,
175070x7f57402c,
175080xd4378100,
175090x47740004,
175100xd4378100,
175110x47740004,
175120xd4378100,
175130x47740004,
175140x09dc0004,
175150xd4378100,
175160x99c0fff8,
175170x47740004,
175180x2924001f,
175190xc0380019,
175200x9640fca1,
175210xc03e0004,
175220xcf8121f8,
175230x37e021f9,
175240xcc210000,
175250xc8200004,
175260x2a200018,
175270x32200001,
175280x9a00fffb,
175290xcf8121f8,
175300x80000002,
175310x7c408000,
175320x7c40c000,
175330x28d00018,
175340x31100001,
175350xc0160080,
175360x95000003,
175370xc02a0004,
175380x7cd4c00c,
175390xccc1217c,
175400xcc41217d,
175410xcc41217e,
175420x7c418000,
175430x1db00003,
175440x36a0217f,
175450x9b000003,
175460x419c0005,
175470x041c0040,
175480x99c00000,
175490x09dc0001,
175500xcc210000,
175510xc8240004,
175520x2a6c001f,
175530x419c0005,
175540x9ac0fffa,
175550xcc800062,
175560x80000002,
175570x7c408000,
175580x7c40c000,
175590x04d403e6,
175600x80000001,
175610xcc540000,
175620x8000039f,
175630xcc4003ea,
175640xc01c8000,
175650x044ca000,
175660xcdc12010,
175670x7c410000,
175680xc8140009,
175690x04180000,
175700x041c0008,
175710xcd800071,
175720x09dc0001,
175730x05980001,
175740xcd0d0000,
175750x99c0fffc,
175760xcc800062,
175770x8000039f,
175780xcd400071,
175790xc00e0100,
175800xcc000041,
175810xccc1304a,
175820xc83c007f,
175830xcc00007f,
175840x80000001,
175850xcc00007f,
175860xcc00007f,
175870x88000000,
175880xcc00007f,
175890x00000000,
175900x00000000,
175910x00000000,
175920x00000000,
175930x00000000,
175940x00000000,
175950x00000000,
175960x00000000,
175970x00000000,
175980x00000000,
175990x00000000,
176000x00000000,
176010x00000000,
176020x00000000,
176030x00000000,
176040x00000000,
176050x00000000,
176060x00000000,
176070x00000000,
176080x00000000,
176090x00000000,
176100x00000000,
176110x00000000,
176120x00000000,
176130x00000000,
176140x00000000,
176150x00000000,
176160x00000000,
176170x00000000,
176180x00000000,
176190x00000000,
176200x00000000,
176210x00000000,
176220x00000000,
176230x00000000,
176240x00000000,
176250x00000000,
176260x00000000,
176270x00000000,
176280x00000000,
176290x00000000,
176300x00000000,
176310x00000000,
176320x00000000,
176330x00000000,
176340x00000000,
176350x00000000,
176360x00000000,
176370x00000000,
176380x00000000,
176390x00000000,
176400x00000000,
176410x00000000,
176420x00000000,
176430x00000000,
176440x00000000,
176450x00000000,
176460x00000000,
176470x00000000,
176480x00000000,
176490x00000000,
176500x00000000,
176510x00000000,
176520x00000000,
176530x00000000,
176540x00000000,
176550x00000000,
176560x00000000,
176570x00000000,
176580x00000000,
176590x00000000,
176600x00000000,
176610x00000000,
176620x00000000,
176630x00000000,
176640x00000000,
176650x00000000,
176660x00000000,
176670x00000000,
176680x00000000,
176690x00000000,
176700x00000000,
176710x00000000,
176720x00000000,
176730x00000000,
176740x00000000,
176750x00000000,
176760x00000000,
176770x00000000,
176780x00000000,
176790x00000000,
176800x00000000,
176810x00000000,
176820x00000000,
176830x00000000,
176840x00000000,
176850x00000000,
176860x00000000,
176870x00000000,
176880x00000000,
176890x00000000,
176900x00000000,
176910x00000000,
176920x00000000,
176930x00000000,
176940x00000000,
176950x00000000,
176960x00000000,
176970x00000000,
176980x00000000,
176990x00000000,
177000x00000000,
177010x00000000,
177020x00000000,
177030x00000000,
177040x00000000,
177050x00000000,
177060x00000000,
177070x00000000,
177080x00000000,
177090x00000000,
177100x00000000,
177110x00000000,
177120x00000000,
177130x00000000,
177140x00000000,
177150x00000000,
177160x00000000,
177170x00000000,
177180x00000000,
177190x00000000,
177200x00000000,
177210x00000000,
177220x00000000,
177230x00000000,
177240x00000000,
177250x00000000,
177260x00000000,
177270x00000000,
177280x00000000,
177290x00000000,
177300x00000000,
177310x00000000,
177320x00000000,
177330x00000000,
177340x00000000,
177350x00000000,
177360x00000000,
177370x00000000,
177380x00000000,
177390x00000000,
177400x00000000,
177410x00000000,
177420x00000000,
177430x00000000,
177440x00000000,
177450x00000000,
177460x00000000,
177470x00000000,
177480x00000000,
177490x00000000,
177500x00000000,
177510x00000000,
177520x00000000,
177530x00000000,
177540x00000000,
177550x00000000,
177560x00000000,
177570x00000000,
177580x00000000,
177590x00000000,
177600x00000000,
177610x00000000,
177620x00000000,
177630x00000000,
177640x00000000,
177650x00000000,
177660x00000000,
177670x00000000,
177680x00000000,
177690x00000000,
177700x00000000,
177710x00000000,
177720x00000000,
177730x00000000,
177740x00000000,
177750x00000000,
177760x00000000,
177770x00000000,
177780x00000000,
177790x00000000,
177800x00000000,
177810x00000000,
177820x00000000,
177830x00000000,
177840x00000000,
177850x00000000,
177860x00000000,
177870x00000000,
177880x00000000,
177890x00000000,
177900x00000000,
177910x00000000,
177920x00000000,
177930x00000000,
177940x00000000,
177950x00000000,
177960x00000000,
177970x00000000,
177980x00000000,
177990x00000000,
178000x00000000,
178010x00000000,
178020x00000000,
178030x00000000,
178040x00000000,
178050x00000000,
178060x00000000,
178070x00000000,
178080x00000000,
178090x00000000,
178100x00000000,
178110x00000000,
178120x00000000,
178130x00000000,
178140x00000000,
178150x00000000,
178160x00000000,
178170x00000000,
178180x00000000,
178190x00000000,
178200x00000000,
178210x00000000,
178220x00000000,
178230x00000000,
178240x00000000,
178250x00000000,
178260x00000000,
178270x00000000,
178280x00000000,
178290x00000000,
178300x00000000,
178310x00000000,
178320x00000000,
178330x00000000,
178340x00000000,
178350x00000000,
178360x00000000,
178370x00000000,
178380x00000000,
178390x00000000,
178400x00000000,
178410x00000000,
178420x00000000,
178430x00000000,
178440x00000000,
178450x00000000,
178460x00000000,
178470x00000000,
178480x00000000,
178490x00000000,
178500x00000000,
178510x00000000,
178520x00000000,
178530x00000000,
178540x00000000,
178550x00000000,
178560x00000000,
178570x00000000,
178580x00000000,
178590x00000000,
178600x00000000,
178610x00000000,
178620x00000000,
178630x00000000,
178640x00000000,
178650x00000000,
178660x00000000,
178670x00000000,
178680x00000000,
178690x00000000,
178700x00000000,
178710x00000000,
178720x00000000,
178730x00000000,
178740x00000000,
178750x00000000,
178760x00000000,
178770x00000000,
178780x00000000,
178790x00000000,
178800x00000000,
178810x00000000,
178820x00000000,
178830x00000000,
178840x00000000,
178850x00000000,
178860x00000000,
178870x00000000,
178880x00000000,
178890x00000000,
178900x00000000,
178910x00000000,
178920x00000000,
178930x00000000,
178940x00000000,
178950x00000000,
178960x00000000,
178970x00000000,
178980x00000000,
178990x00000000,
179000x00000000,
179010x00000000,
179020x00000000,
179030x00000000,
179040x00000000,
179050x00000000,
179060x00000000,
179070x00000000,
179080x00000000,
179090x00000000,
179100x00000000,
179110x00000000,
179120x00000000,
179130x00000000,
179140x00000000,
179150x00000000,
179160x00000000,
179170x00000000,
179180x00000000,
179190x00000000,
179200x00000000,
179210x00000000,
179220x00000000,
179230x00000000,
179240x00000000,
179250x00000000,
179260x00000000,
179270x00000000,
179280x00000000,
179290x00000000,
179300x00000000,
179310x00000000,
179320x00000000,
179330x00000000,
179340x00000000,
179350x00000000,
179360x00010333,
179370x00100004,
179380x00170006,
179390x00210008,
179400x00270028,
179410x00280023,
179420x00290029,
179430x002a0026,
179440x002b0029,
179450x002d0038,
179460x002e003f,
179470x002f004a,
179480x0034004c,
179490x00360030,
179500x003900af,
179510x003a00d0,
179520x003b00e5,
179530x003c00fd,
179540x003d016c,
179550x003f00ad,
179560x00410338,
179570x0043036c,
179580x0044018f,
179590x004500fd,
179600x004601ad,
179610x004701ad,
179620x00480200,
179630x0049020e,
179640x004a0257,
179650x004b0284,
179660x00520261,
179670x00530273,
179680x00540289,
179690x0057029b,
179700x0060029f,
179710x006102ae,
179720x006202b8,
179730x006302c2,
179740x006402cc,
179750x006502d6,
179760x006602e0,
179770x006702ea,
179780x006802f4,
179790x006902f8,
179800x006a02fc,
179810x006b0300,
179820x006c0304,
179830x006d0308,
179840x006e030c,
179850x006f0310,
179860x00700314,
179870x00720386,
179880x0074038c,
179890x0079038a,
179900x007c031e,
179910x000f039b,
179920x000f039b,
179930x000f039b,
179940x000f039b,
179950x000f039b,
179960x000f039b,
179970x000f039b,
179980x000f039b,
179990x000f039b,
180000x000f039b,
180010x000f039b,
180020x000f039b,
180030x000f039b,
180040x000f039b,
180050x000f039b,
180060x000f039b,
180070x000f039b,
180080x000f039b,
180090x000f039b,
180100x000f039b,
180110x000f039b,
180120x000f039b,
180130x000f039b,
180140x000f039b,
180150x000f039b,
18016};
18017
18018static const u32 RV770_pfp_microcode[] = {
180190x7c408000,
180200xa0000000,
180210x7e82800b,
180220x80000000,
180230xdc030000,
180240xcc800040,
180250xd0400040,
180260x7c408000,
180270xa0000000,
180280x7e82800b,
180290xc818000e,
180300x31980001,
180310x7c424000,
180320x95800252,
180330x7c428000,
180340xc81c001c,
180350xc037c000,
180360x7c40c000,
180370x7c410000,
180380x7cb4800b,
180390xc0360003,
180400x99c00000,
180410xc81c001c,
180420x7cb4800c,
180430x24d40002,
180440x7d654000,
180450xcd400043,
180460xce800043,
180470xcd000043,
180480xcc800040,
180490xce400040,
180500xce800040,
180510xccc00040,
180520xdc3a0000,
180530x9780ffde,
180540xcd000040,
180550x7c40c000,
180560x80000018,
180570x7c410000,
180580xd4000340,
180590xd4000fc0,
180600xd4000fa2,
180610xc818000e,
180620x8000000c,
180630x31980002,
180640xd40003c0,
180650xd4000fc0,
180660xd4000fa2,
180670xc818000e,
180680x288c0008,
180690x30cc000f,
180700x34100001,
180710x7d0d0008,
180720x8000000c,
180730x7d91800b,
180740xcc800040,
180750xd0400040,
180760x7c408000,
180770xa0000000,
180780x7e82800b,
180790xd4000340,
180800xd4000fc0,
180810xd4000fa2,
180820xcc800040,
180830xd0400040,
180840x7c408000,
180850xa0000000,
180860x7e82800b,
180870xd40003c0,
180880xd4000fc0,
180890xd4000fa2,
180900xcc800040,
180910xd0400040,
180920x7c408000,
180930xa0000000,
180940x7e82800b,
180950xcc4003f9,
180960x80000261,
180970xcc4003f8,
180980xc82003f8,
180990xc81c03f9,
181000xc81803fb,
181010xc037ffff,
181020x7c414000,
181030xcf41a29e,
181040x66200020,
181050x7de1c02c,
181060x7d58c008,
181070x7cdcc020,
181080x68d00020,
181090xc0360003,
181100xcc000054,
181110x7cb4800c,
181120x8000006a,
181130xcc800040,
181140x7c418000,
181150xcd81a29e,
181160xcc800040,
181170xcd800040,
181180x80000068,
181190xcc000054,
181200xc019ffff,
181210xcc800040,
181220xcd81a29e,
181230x7c40c000,
181240x7c410000,
181250x7c414000,
181260xccc1a1fa,
181270xcd01a1f9,
181280xcd41a29d,
181290xccc00040,
181300xcd000040,
181310xcd400040,
181320xcc400040,
181330x7c408000,
181340xa0000000,
181350x7e82800b,
181360xcc000054,
181370xcc800040,
181380x7c40c000,
181390x7c410000,
181400x7c414000,
181410xccc1a1fa,
181420xcd01a1f9,
181430xcd41a29d,
181440xccc00040,
181450xcd000040,
181460xcd400040,
181470xd0400040,
181480x7c408000,
181490xa0000000,
181500x7e82800b,
181510x7c40c000,
181520x30d00001,
181530xccc1a29f,
181540x95000003,
181550x04140001,
181560x04140002,
181570xcd4003fb,
181580xcc800040,
181590x80000000,
181600xccc00040,
181610x7c40c000,
181620xcc800040,
181630xccc1a2a2,
181640x80000000,
181650xccc00040,
181660x7c40c000,
181670x28d4001f,
181680xcc800040,
181690x95400003,
181700x7c410000,
181710xccc00057,
181720x2918001f,
181730xccc00040,
181740x95800003,
181750xcd000040,
181760xcd000058,
181770x80000261,
181780xcc00007f,
181790xc8200017,
181800xc8300022,
181810x9a000006,
181820x0e280001,
181830xc824001e,
181840x0a640001,
181850xd4001240,
181860xce400040,
181870xc036c000,
181880x96800007,
181890x37747900,
181900x041c0001,
181910xcf400040,
181920xcdc00040,
181930xcf0003fa,
181940x7c030000,
181950xca0c0010,
181960x7c410000,
181970x94c00004,
181980x7c414000,
181990xd42002c4,
182000xcde00044,
182010x9b00000b,
182020x7c418000,
182030xcc00004b,
182040xcda00049,
182050xcd200041,
182060xcd600041,
182070xcda00041,
182080x06200001,
182090xce000056,
182100x80000261,
182110xcc00007f,
182120xc8280020,
182130xc82c0021,
182140xcc000063,
182150x7eea4001,
182160x65740020,
182170x7f53402c,
182180x269c0002,
182190x7df5c020,
182200x69f80020,
182210xce80004b,
182220xce600049,
182230xcde00041,
182240xcfa00041,
182250xce600041,
182260x271c0002,
182270x7df5c020,
182280x69f80020,
182290x7db24001,
182300xcf00004b,
182310xce600049,
182320xcde00041,
182330xcfa00041,
182340x800000bd,
182350xce600041,
182360xc8200017,
182370xc8300022,
182380x9a000006,
182390x0e280001,
182400xc824001e,
182410x0a640001,
182420xd4001240,
182430xce400040,
182440xca0c0010,
182450x7c410000,
182460x94c0000b,
182470xc036c000,
182480x96800007,
182490x37747900,
182500x041c0001,
182510xcf400040,
182520xcdc00040,
182530xcf0003fa,
182540x7c030000,
182550x800000b6,
182560x7c414000,
182570xcc000048,
182580x800000ef,
182590x00000000,
182600xc8200017,
182610xc81c0023,
182620x0e240002,
182630x99c00015,
182640x7c418000,
182650x0a200001,
182660xce000056,
182670xd4000440,
182680xcc000040,
182690xc036c000,
182700xca140013,
182710x96400007,
182720x37747900,
182730xcf400040,
182740xcc000040,
182750xc83003fa,
182760x80000104,
182770xcf000022,
182780xcc000022,
182790x9540015d,
182800xcc00007f,
182810xcca00046,
182820x80000000,
182830xcc200046,
182840x80000261,
182850xcc000064,
182860xc8200017,
182870xc810001f,
182880x96000005,
182890x09100001,
182900xd4000440,
182910xcd000040,
182920xcd000022,
182930xcc800040,
182940xd0400040,
182950xc80c0025,
182960x94c0feeb,
182970xc8100008,
182980xcd000040,
182990xd4000fc0,
183000x80000000,
183010xd4000fa2,
183020x7c40c000,
183030x7c410000,
183040xccc003fd,
183050xcd0003fc,
183060xccc00042,
183070xcd000042,
183080x2914001f,
183090x29180010,
183100x31980007,
183110x3b5c0001,
183120x7d76000b,
183130x99800005,
183140x7d5e400b,
183150xcc000042,
183160x80000261,
183170xcc00004d,
183180x29980001,
183190x292c0008,
183200x9980003d,
183210x32ec0001,
183220x96000004,
183230x2930000c,
183240x80000261,
183250xcc000042,
183260x04140010,
183270xcd400042,
183280x33300001,
183290x34280001,
183300x8400015e,
183310xc8140003,
183320x9b40001b,
183330x0438000c,
183340x8400015e,
183350xc8140003,
183360x9b400017,
183370x04380008,
183380x8400015e,
183390xc8140003,
183400x9b400013,
183410x04380004,
183420x8400015e,
183430xc8140003,
183440x9b400015,
183450xc80c03fd,
183460x9a800009,
183470xc81003fc,
183480x9b000118,
183490xcc00004d,
183500x04140010,
183510xccc00042,
183520xcd000042,
183530x80000136,
183540xcd400042,
183550x96c00111,
183560xcc00004d,
183570x80000261,
183580xcc00004e,
183590x9ac00003,
183600xcc00004d,
183610xcc00004e,
183620xdf830000,
183630x80000000,
183640xd80301ff,
183650x9ac00107,
183660xcc00004d,
183670x80000261,
183680xcc00004e,
183690xc8180003,
183700xc81c0003,
183710xc8200003,
183720x7d5d4003,
183730x7da1c003,
183740x7d5d400c,
183750x2a10001f,
183760x299c001f,
183770x7d1d000b,
183780x7d17400b,
183790x88000000,
183800x7e92800b,
183810x96400004,
183820xcc00004e,
183830x80000261,
183840xcc000042,
183850x04380008,
183860xcf800042,
183870xc8080003,
183880xc80c0003,
183890xc8100003,
183900xc8140003,
183910xc8180003,
183920xc81c0003,
183930xc8240003,
183940xc8280003,
183950x29fc001f,
183960x2ab0001f,
183970x7ff3c00b,
183980x28f0001f,
183990x7ff3c00b,
184000x2970001f,
184010x7ff3c00b,
184020x7d888001,
184030x7dccc001,
184040x7e510001,
184050x7e954001,
184060x7c908002,
184070x7cd4c002,
184080x7cbc800b,
184090x9ac00003,
184100x7c8f400b,
184110x38b40001,
184120x9b4000d8,
184130xcc00004d,
184140x9bc000d6,
184150xcc00004e,
184160xc80c03fd,
184170xc81003fc,
184180xccc00042,
184190x8000016f,
184200xcd000042,
184210xd4000340,
184220xd4000fc0,
184230xd4000fa2,
184240xcc800040,
184250xcc400040,
184260xcc400040,
184270xcc400040,
184280x7c40c000,
184290xccc00040,
184300xccc0000d,
184310x80000000,
184320xd0400040,
184330x7c40c000,
184340x7c410000,
184350x65140020,
184360x7d4d402c,
184370x24580002,
184380x7d598020,
184390x7c41c000,
184400xcd800042,
184410x69980020,
184420xcd800042,
184430xcdc00042,
184440xc023c000,
184450x05e40002,
184460x7ca0800b,
184470x26640010,
184480x7ca4800c,
184490xcc800040,
184500xcdc00040,
184510xccc00040,
184520x95c0000e,
184530xcd000040,
184540x09dc0001,
184550xc8280003,
184560x96800008,
184570xce800040,
184580xc834001d,
184590x97400000,
184600xc834001d,
184610x26a80008,
184620x84000264,
184630xcc2b0000,
184640x99c0fff7,
184650x09dc0001,
184660xdc3a0000,
184670x97800004,
184680x7c418000,
184690x800001a3,
184700x25980002,
184710xa0000000,
184720x7d808000,
184730xc818001d,
184740x7c40c000,
184750x64d00008,
184760x95800000,
184770xc818001d,
184780xcc130000,
184790xcc800040,
184800xccc00040,
184810x80000000,
184820xcc400040,
184830xc810001f,
184840x7c40c000,
184850xcc800040,
184860x7cd1400c,
184870xcd400040,
184880x05180001,
184890x80000000,
184900xcd800022,
184910x7c40c000,
184920x64500020,
184930x84000264,
184940xcc000061,
184950x7cd0c02c,
184960xc8200017,
184970xc8d60000,
184980x99400008,
184990x7c438000,
185000xdf830000,
185010xcfa0004f,
185020x84000264,
185030xcc000062,
185040x80000000,
185050xd040007f,
185060x80000261,
185070xcc000062,
185080x84000264,
185090xcc000061,
185100xc8200017,
185110x7c40c000,
185120xc036ff00,
185130xc810000d,
185140xc0303fff,
185150x7cf5400b,
185160x7d51800b,
185170x7d81800f,
185180x99800008,
185190x7cf3800b,
185200xdf830000,
185210xcfa0004f,
185220x84000264,
185230xcc000062,
185240x80000000,
185250xd040007f,
185260x80000261,
185270xcc000062,
185280x84000264,
185290x7c40c000,
185300x28dc0008,
185310x95c00019,
185320x30dc0010,
185330x7c410000,
185340x99c00004,
185350x64540020,
185360x80000209,
185370xc91d0000,
185380x7d15002c,
185390xc91e0000,
185400x7c420000,
185410x7c424000,
185420x7c418000,
185430x7de5c00b,
185440x7de28007,
185450x9a80000e,
185460x41ac0005,
185470x9ac00000,
185480x0aec0001,
185490x30dc0010,
185500x99c00004,
185510x00000000,
185520x8000020c,
185530xc91d0000,
185540x8000020c,
185550xc91e0000,
185560xcc800040,
185570xccc00040,
185580xd0400040,
185590xc80c0025,
185600x94c0fde3,
185610xc8100008,
185620xcd000040,
185630xd4000fc0,
185640x80000000,
185650xd4000fa2,
185660xd4000340,
185670xd4000fc0,
185680xd4000fa2,
185690xcc800040,
185700xd0400040,
185710x7c408000,
185720xa0000000,
185730x7e82800b,
185740xd40003c0,
185750xd4000fc0,
185760xd4000fa2,
185770xcc800040,
185780xd0400040,
185790x7c408000,
185800xa0000000,
185810x7e82800b,
185820x7c40c000,
185830x30d00006,
185840x0d100006,
185850x99000007,
185860xc8140015,
185870x99400005,
185880xcc000052,
185890xd4000340,
185900xd4000fc0,
185910xd4000fa2,
185920xcc800040,
185930xccc00040,
185940x80000000,
185950xd0400040,
185960x7c40c000,
185970xcc4d0000,
185980xdc3a0000,
185990x9780fdbc,
186000x04cc0001,
186010x80000243,
186020xcc4d0000,
186030x7c40c000,
186040x7c410000,
186050x29240018,
186060x32640001,
186070x9640000f,
186080xcc800040,
186090x7c414000,
186100x7c418000,
186110x7c41c000,
186120xccc00043,
186130xcd000043,
186140x31dc7fff,
186150xcdc00043,
186160xccc00040,
186170xcd000040,
186180xcd400040,
186190xcd800040,
186200x80000000,
186210xcdc00040,
186220xccc00040,
186230xcd000040,
186240x80000000,
186250xd0400040,
186260x80000000,
186270xd040007f,
186280xcc00007f,
186290x80000000,
186300xcc00007f,
186310xcc00007f,
186320x88000000,
186330xcc00007f,
186340x00000000,
186350x00000000,
186360x00000000,
186370x00000000,
186380x00000000,
186390x00000000,
186400x00000000,
186410x00000000,
186420x00000000,
186430x00000000,
186440x00000000,
186450x00000000,
186460x00000000,
186470x00000000,
186480x00000000,
186490x00000000,
186500x00000000,
186510x00000000,
186520x00000000,
186530x00000000,
186540x00000000,
186550x00000000,
186560x00000000,
186570x00000000,
186580x00000000,
186590x00000000,
186600x00000000,
186610x00000000,
186620x00000000,
186630x00000000,
186640x00000000,
186650x00000000,
186660x00000000,
186670x00000000,
186680x00000000,
186690x00000000,
186700x00000000,
186710x00000000,
186720x00000000,
186730x00000000,
186740x00000000,
186750x00000000,
186760x00000000,
186770x00000000,
186780x00000000,
186790x00000000,
186800x00000000,
186810x00000000,
186820x00000000,
186830x00000000,
186840x00000000,
186850x00000000,
186860x00000000,
186870x00000000,
186880x00000000,
186890x00000000,
186900x00000000,
186910x00000000,
186920x00000000,
186930x00000000,
186940x00000000,
186950x00000000,
186960x00000000,
186970x00000000,
186980x00000000,
186990x00000000,
187000x00000000,
187010x00000000,
187020x00000000,
187030x00000000,
187040x00000000,
187050x00000000,
187060x00000000,
187070x00000000,
187080x00000000,
187090x00000000,
187100x00000000,
187110x00000000,
187120x00000000,
187130x00000000,
187140x00000000,
187150x00000000,
187160x00000000,
187170x00000000,
187180x00000000,
187190x00000000,
187200x00000000,
187210x00000000,
187220x00000000,
187230x00000000,
187240x00000000,
187250x00000000,
187260x00000000,
187270x00000000,
187280x00000000,
187290x00000000,
187300x00000000,
187310x00000000,
187320x00000000,
187330x00000000,
187340x00000000,
187350x00000000,
187360x00000000,
187370x00000000,
187380x00000000,
187390x00000000,
187400x00000000,
187410x00000000,
187420x00000000,
187430x00000000,
187440x00000000,
187450x00000000,
187460x00000000,
187470x00000000,
187480x00000000,
187490x00000000,
187500x00000000,
187510x00000000,
187520x00000000,
187530x00000000,
187540x00000000,
187550x00000000,
187560x00000000,
187570x00000000,
187580x00000000,
187590x00000000,
187600x00000000,
187610x00000000,
187620x00000000,
187630x00000000,
187640x00000000,
187650x00000000,
187660x00000000,
187670x00000000,
187680x00000000,
187690x00000000,
187700x00000000,
187710x00000000,
187720x00000000,
187730x00000000,
187740x00000000,
187750x00000000,
187760x00000000,
187770x00000000,
187780x00000000,
187790x00000000,
187800x00000000,
187810x00000000,
187820x00000000,
187830x00000000,
187840x00000000,
187850x00000000,
187860x00000000,
187870x00030223,
187880x0004022b,
187890x000500a0,
187900x00020003,
187910x0006003c,
187920x00070027,
187930x00080192,
187940x00090044,
187950x000a002d,
187960x0010025f,
187970x001700f1,
187980x002201d8,
187990x002301e9,
188000x0026004c,
188010x0027005f,
188020x0020011b,
188030x00280093,
188040x0029004f,
188050x002a0084,
188060x002b0065,
188070x002f008e,
188080x003200d9,
188090x00340233,
188100x00360075,
188110x0039010b,
188120x003c01fd,
188130x003f00a0,
188140x00410248,
188150x00440195,
188160x0048019e,
188170x004901c6,
188180x004a01d0,
188190x00550226,
188200x0056022e,
188210x0060000a,
188220x0061002a,
188230x00620030,
188240x00630030,
188250x00640030,
188260x00650030,
188270x00660030,
188280x00670030,
188290x00680037,
188300x0069003f,
188310x006a0047,
188320x006b0047,
188330x006c0047,
188340x006d0047,
188350x006e0047,
188360x006f0047,
188370x00700047,
188380x0073025f,
188390x007b0241,
188400x00000005,
188410x00000005,
188420x00000005,
188430x00000005,
188440x00000005,
188450x00000005,
188460x00000005,
188470x00000005,
188480x00000005,
188490x00000005,
188500x00000005,
188510x00000005,
188520x00000005,
188530x00000005,
188540x00000005,
188550x00000005,
188560x00000005,
188570x00000005,
188580x00000005,
188590x00000005,
188600x00000005,
188610x00000005,
188620x00000005,
188630x00000005,
188640x00000005,
188650x00000005,
188660x00000005,
18867};
18868
18869static const u32 RV730_pfp_microcode[] = {
188700x7c408000,
188710xa0000000,
188720x7e82800b,
188730x80000000,
188740xdc030000,
188750xcc800040,
188760xd0400040,
188770x7c408000,
188780xa0000000,
188790x7e82800b,
188800xc818000e,
188810x31980001,
188820x7c424000,
188830x9580023a,
188840x7c428000,
188850xc81c001c,
188860xc037c000,
188870x7c40c000,
188880x7c410000,
188890x7cb4800b,
188900xc0360003,
188910x99c00000,
188920xc81c001c,
188930x7cb4800c,
188940x24d40002,
188950x7d654000,
188960xcd400043,
188970xce800043,
188980xcd000043,
188990xcc800040,
189000xce400040,
189010xce800040,
189020xccc00040,
189030xdc3a0000,
189040x9780ffde,
189050xcd000040,
189060x7c40c000,
189070x80000018,
189080x7c410000,
189090xd4000340,
189100xd4000fc0,
189110xd4000fa2,
189120xc818000e,
189130x8000000c,
189140x31980002,
189150xd40003c0,
189160xd4000fc0,
189170xd4000fa2,
189180xc818000e,
189190x288c0008,
189200x30cc000f,
189210x34100001,
189220x7d0d0008,
189230x8000000c,
189240x7d91800b,
189250xcc800040,
189260xd0400040,
189270x7c408000,
189280xa0000000,
189290x7e82800b,
189300xd4000340,
189310xd4000fc0,
189320xd4000fa2,
189330xcc800040,
189340xd0400040,
189350x7c408000,
189360xa0000000,
189370x7e82800b,
189380xd40003c0,
189390xd4000fc0,
189400xd4000fa2,
189410xcc800040,
189420xd0400040,
189430x7c408000,
189440xa0000000,
189450x7e82800b,
189460xcc4003f9,
189470x80000249,
189480xcc4003f8,
189490xc037ffff,
189500x7c414000,
189510xcf41a29e,
189520xc82003f8,
189530xc81c03f9,
189540x66200020,
189550xc81803fb,
189560x7de1c02c,
189570x7d58c008,
189580x7cdcc020,
189590x69100020,
189600xc0360003,
189610xcc000054,
189620x7cb4800c,
189630x80000069,
189640xcc800040,
189650x7c418000,
189660xcd81a29e,
189670xcc800040,
189680x80000067,
189690xcd800040,
189700xc019ffff,
189710xcc800040,
189720xcd81a29e,
189730x7c40c000,
189740x7c410000,
189750x7c414000,
189760xccc1a1fa,
189770xcd01a1f9,
189780xcd41a29d,
189790xccc00040,
189800xcd000040,
189810xcd400040,
189820xcc400040,
189830x7c408000,
189840xa0000000,
189850x7e82800b,
189860xcc000054,
189870xcc800040,
189880x7c40c000,
189890x7c410000,
189900x7c414000,
189910xccc1a1fa,
189920xcd01a1f9,
189930xcd41a29d,
189940xccc00040,
189950xcd000040,
189960xcd400040,
189970xd0400040,
189980x7c408000,
189990xa0000000,
190000x7e82800b,
190010x7c40c000,
190020x30d00001,
190030xccc1a29f,
190040x95000003,
190050x04140001,
190060x04140002,
190070xcd4003fb,
190080xcc800040,
190090x80000000,
190100xccc00040,
190110x7c40c000,
190120xcc800040,
190130xccc1a2a2,
190140x80000000,
190150xccc00040,
190160x7c40c000,
190170x28d4001f,
190180xcc800040,
190190x95400003,
190200x7c410000,
190210xccc00057,
190220x2918001f,
190230xccc00040,
190240x95800003,
190250xcd000040,
190260xcd000058,
190270x80000249,
190280xcc00007f,
190290xc8200017,
190300xc8300022,
190310x9a000006,
190320x0e280001,
190330xc824001e,
190340x0a640001,
190350xd4001240,
190360xce400040,
190370xc036c000,
190380x96800007,
190390x37747900,
190400x041c0001,
190410xcf400040,
190420xcdc00040,
190430xcf0003fa,
190440x7c030000,
190450xca0c0010,
190460x7c410000,
190470x94c00004,
190480x7c414000,
190490xd42002c4,
190500xcde00044,
190510x9b00000b,
190520x7c418000,
190530xcc00004b,
190540xcda00049,
190550xcd200041,
190560xcd600041,
190570xcda00041,
190580x06200001,
190590xce000056,
190600x80000249,
190610xcc00007f,
190620xc8280020,
190630xc82c0021,
190640xcc000063,
190650x7eea4001,
190660x65740020,
190670x7f53402c,
190680x269c0002,
190690x7df5c020,
190700x69f80020,
190710xce80004b,
190720xce600049,
190730xcde00041,
190740xcfa00041,
190750xce600041,
190760x271c0002,
190770x7df5c020,
190780x69f80020,
190790x7db24001,
190800xcf00004b,
190810xce600049,
190820xcde00041,
190830xcfa00041,
190840x800000bc,
190850xce600041,
190860xc8200017,
190870xc8300022,
190880x9a000006,
190890x0e280001,
190900xc824001e,
190910x0a640001,
190920xd4001240,
190930xce400040,
190940xca0c0010,
190950x7c410000,
190960x94c0000b,
190970xc036c000,
190980x96800007,
190990x37747900,
191000x041c0001,
191010xcf400040,
191020xcdc00040,
191030xcf0003fa,
191040x7c030000,
191050x800000b5,
191060x7c414000,
191070xcc000048,
191080x800000ee,
191090x00000000,
191100xc8200017,
191110xc81c0023,
191120x0e240002,
191130x99c00015,
191140x7c418000,
191150x0a200001,
191160xce000056,
191170xd4000440,
191180xcc000040,
191190xc036c000,
191200xca140013,
191210x96400007,
191220x37747900,
191230xcf400040,
191240xcc000040,
191250xc83003fa,
191260x80000103,
191270xcf000022,
191280xcc000022,
191290x95400146,
191300xcc00007f,
191310xcca00046,
191320x80000000,
191330xcc200046,
191340x80000249,
191350xcc000064,
191360xc8200017,
191370xc810001f,
191380x96000005,
191390x09100001,
191400xd4000440,
191410xcd000040,
191420xcd000022,
191430xcc800040,
191440xd0400040,
191450xc80c0025,
191460x94c0feec,
191470xc8100008,
191480xcd000040,
191490xd4000fc0,
191500x80000000,
191510xd4000fa2,
191520x7c40c000,
191530x7c410000,
191540xccc003fd,
191550xcd0003fc,
191560xccc00042,
191570xcd000042,
191580x2914001f,
191590x29180010,
191600x31980007,
191610x3b5c0001,
191620x7d76000b,
191630x99800005,
191640x7d5e400b,
191650xcc000042,
191660x80000249,
191670xcc00004d,
191680x29980001,
191690x292c0008,
191700x9980003d,
191710x32ec0001,
191720x96000004,
191730x2930000c,
191740x80000249,
191750xcc000042,
191760x04140010,
191770xcd400042,
191780x33300001,
191790x34280001,
191800x8400015d,
191810xc8140003,
191820x9b40001b,
191830x0438000c,
191840x8400015d,
191850xc8140003,
191860x9b400017,
191870x04380008,
191880x8400015d,
191890xc8140003,
191900x9b400013,
191910x04380004,
191920x8400015d,
191930xc8140003,
191940x9b400015,
191950xc80c03fd,
191960x9a800009,
191970xc81003fc,
191980x9b000101,
191990xcc00004d,
192000x04140010,
192010xccc00042,
192020xcd000042,
192030x80000135,
192040xcd400042,
192050x96c000fa,
192060xcc00004d,
192070x80000249,
192080xcc00004e,
192090x9ac00003,
192100xcc00004d,
192110xcc00004e,
192120xdf830000,
192130x80000000,
192140xd80301ff,
192150x9ac000f0,
192160xcc00004d,
192170x80000249,
192180xcc00004e,
192190xc8180003,
192200xc81c0003,
192210xc8200003,
192220x7d5d4003,
192230x7da1c003,
192240x7d5d400c,
192250x2a10001f,
192260x299c001f,
192270x7d1d000b,
192280x7d17400b,
192290x88000000,
192300x7e92800b,
192310x96400004,
192320xcc00004e,
192330x80000249,
192340xcc000042,
192350x04380008,
192360xcf800042,
192370xc8080003,
192380xc80c0003,
192390xc8100003,
192400xc8140003,
192410xc8180003,
192420xc81c0003,
192430xc8240003,
192440xc8280003,
192450x29fc001f,
192460x2ab0001f,
192470x7ff3c00b,
192480x28f0001f,
192490x7ff3c00b,
192500x2970001f,
192510x7ff3c00b,
192520x7d888001,
192530x7dccc001,
192540x7e510001,
192550x7e954001,
192560x7c908002,
192570x7cd4c002,
192580x7cbc800b,
192590x9ac00003,
192600x7c8f400b,
192610x38b40001,
192620x9b4000c1,
192630xcc00004d,
192640x9bc000bf,
192650xcc00004e,
192660xc80c03fd,
192670xc81003fc,
192680xccc00042,
192690x8000016e,
192700xcd000042,
192710xd4000340,
192720xd4000fc0,
192730xd4000fa2,
192740xcc800040,
192750xcc400040,
192760xcc400040,
192770xcc400040,
192780x7c40c000,
192790xccc00040,
192800xccc0000d,
192810x80000000,
192820xd0400040,
192830x7c40c000,
192840x7c410000,
192850x65140020,
192860x7d4d402c,
192870x24580002,
192880x7d598020,
192890x7c41c000,
192900xcd800042,
192910x69980020,
192920xcd800042,
192930xcdc00042,
192940xc023c000,
192950x05e40002,
192960x7ca0800b,
192970x26640010,
192980x7ca4800c,
192990xcc800040,
193000xcdc00040,
193010xccc00040,
193020x95c0000e,
193030xcd000040,
193040x09dc0001,
193050xc8280003,
193060x96800008,
193070xce800040,
193080xc834001d,
193090x97400000,
193100xc834001d,
193110x26a80008,
193120x8400024c,
193130xcc2b0000,
193140x99c0fff7,
193150x09dc0001,
193160xdc3a0000,
193170x97800004,
193180x7c418000,
193190x800001a2,
193200x25980002,
193210xa0000000,
193220x7d808000,
193230xc818001d,
193240x7c40c000,
193250x64d00008,
193260x95800000,
193270xc818001d,
193280xcc130000,
193290xcc800040,
193300xccc00040,
193310x80000000,
193320xcc400040,
193330xc810001f,
193340x7c40c000,
193350xcc800040,
193360x7cd1400c,
193370xcd400040,
193380x05180001,
193390x80000000,
193400xcd800022,
193410x7c40c000,
193420x64500020,
193430x8400024c,
193440xcc000061,
193450x7cd0c02c,
193460xc8200017,
193470xc8d60000,
193480x99400008,
193490x7c438000,
193500xdf830000,
193510xcfa0004f,
193520x8400024c,
193530xcc000062,
193540x80000000,
193550xd040007f,
193560x80000249,
193570xcc000062,
193580x8400024c,
193590xcc000061,
193600xc8200017,
193610x7c40c000,
193620xc036ff00,
193630xc810000d,
193640xc0303fff,
193650x7cf5400b,
193660x7d51800b,
193670x7d81800f,
193680x99800008,
193690x7cf3800b,
193700xdf830000,
193710xcfa0004f,
193720x8400024c,
193730xcc000062,
193740x80000000,
193750xd040007f,
193760x80000249,
193770xcc000062,
193780x8400024c,
193790x7c40c000,
193800x28dc0008,
193810x95c00019,
193820x30dc0010,
193830x7c410000,
193840x99c00004,
193850x64540020,
193860x80000208,
193870xc91d0000,
193880x7d15002c,
193890xc91e0000,
193900x7c420000,
193910x7c424000,
193920x7c418000,
193930x7de5c00b,
193940x7de28007,
193950x9a80000e,
193960x41ac0005,
193970x9ac00000,
193980x0aec0001,
193990x30dc0010,
194000x99c00004,
194010x00000000,
194020x8000020b,
194030xc91d0000,
194040x8000020b,
194050xc91e0000,
194060xcc800040,
194070xccc00040,
194080xd0400040,
194090xc80c0025,
194100x94c0fde4,
194110xc8100008,
194120xcd000040,
194130xd4000fc0,
194140x80000000,
194150xd4000fa2,
194160xd4000340,
194170xd4000fc0,
194180xd4000fa2,
194190xcc800040,
194200xd0400040,
194210x7c408000,
194220xa0000000,
194230x7e82800b,
194240xd40003c0,
194250xd4000fc0,
194260xd4000fa2,
194270xcc800040,
194280xd0400040,
194290x7c408000,
194300xa0000000,
194310x7e82800b,
194320x7c40c000,
194330x30d00006,
194340x0d100006,
194350x99000007,
194360xc8140015,
194370x99400005,
194380xcc000052,
194390xd4000340,
194400xd4000fc0,
194410xd4000fa2,
194420xcc800040,
194430xccc00040,
194440x80000000,
194450xd0400040,
194460x7c40c000,
194470xcc4d0000,
194480xdc3a0000,
194490x9780fdbd,
194500x04cc0001,
194510x80000242,
194520xcc4d0000,
194530x80000000,
194540xd040007f,
194550xcc00007f,
194560x80000000,
194570xcc00007f,
194580xcc00007f,
194590x88000000,
194600xcc00007f,
194610x00000000,
194620x00000000,
194630x00000000,
194640x00000000,
194650x00000000,
194660x00000000,
194670x00000000,
194680x00000000,
194690x00000000,
194700x00000000,
194710x00000000,
194720x00000000,
194730x00000000,
194740x00000000,
194750x00000000,
194760x00000000,
194770x00000000,
194780x00000000,
194790x00000000,
194800x00000000,
194810x00000000,
194820x00000000,
194830x00000000,
194840x00000000,
194850x00000000,
194860x00000000,
194870x00000000,
194880x00000000,
194890x00000000,
194900x00000000,
194910x00000000,
194920x00000000,
194930x00000000,
194940x00000000,
194950x00000000,
194960x00000000,
194970x00000000,
194980x00000000,
194990x00000000,
195000x00000000,
195010x00000000,
195020x00000000,
195030x00000000,
195040x00000000,
195050x00000000,
195060x00000000,
195070x00000000,
195080x00000000,
195090x00000000,
195100x00000000,
195110x00000000,
195120x00000000,
195130x00000000,
195140x00000000,
195150x00000000,
195160x00000000,
195170x00000000,
195180x00000000,
195190x00000000,
195200x00000000,
195210x00000000,
195220x00000000,
195230x00000000,
195240x00000000,
195250x00000000,
195260x00000000,
195270x00000000,
195280x00000000,
195290x00000000,
195300x00000000,
195310x00000000,
195320x00000000,
195330x00000000,
195340x00000000,
195350x00000000,
195360x00000000,
195370x00000000,
195380x00000000,
195390x00000000,
195400x00000000,
195410x00000000,
195420x00000000,
195430x00000000,
195440x00000000,
195450x00000000,
195460x00000000,
195470x00000000,
195480x00000000,
195490x00000000,
195500x00000000,
195510x00000000,
195520x00000000,
195530x00000000,
195540x00000000,
195550x00000000,
195560x00000000,
195570x00000000,
195580x00000000,
195590x00000000,
195600x00000000,
195610x00000000,
195620x00000000,
195630x00000000,
195640x00000000,
195650x00000000,
195660x00000000,
195670x00000000,
195680x00000000,
195690x00000000,
195700x00000000,
195710x00000000,
195720x00000000,
195730x00000000,
195740x00000000,
195750x00000000,
195760x00000000,
195770x00000000,
195780x00000000,
195790x00000000,
195800x00000000,
195810x00000000,
195820x00000000,
195830x00000000,
195840x00000000,
195850x00000000,
195860x00000000,
195870x00000000,
195880x00000000,
195890x00000000,
195900x00000000,
195910x00000000,
195920x00000000,
195930x00000000,
195940x00000000,
195950x00000000,
195960x00000000,
195970x00000000,
195980x00000000,
195990x00000000,
196000x00000000,
196010x00000000,
196020x00000000,
196030x00000000,
196040x00000000,
196050x00000000,
196060x00000000,
196070x00000000,
196080x00000000,
196090x00000000,
196100x00000000,
196110x00000000,
196120x00000000,
196130x00000000,
196140x00000000,
196150x00000000,
196160x00000000,
196170x00000000,
196180x00000000,
196190x00000000,
196200x00000000,
196210x00000000,
196220x00000000,
196230x00000000,
196240x00000000,
196250x00000000,
196260x00000000,
196270x00000000,
196280x00000000,
196290x00000000,
196300x00000000,
196310x00000000,
196320x00000000,
196330x00000000,
196340x00000000,
196350x00000000,
196360x00000000,
196370x00000000,
196380x00030222,
196390x0004022a,
196400x0005009f,
196410x00020003,
196420x0006003c,
196430x00070027,
196440x00080191,
196450x00090044,
196460x000a002d,
196470x00100247,
196480x001700f0,
196490x002201d7,
196500x002301e8,
196510x0026004c,
196520x0027005f,
196530x0020011a,
196540x00280092,
196550x0029004f,
196560x002a0083,
196570x002b0064,
196580x002f008d,
196590x003200d8,
196600x00340232,
196610x00360074,
196620x0039010a,
196630x003c01fc,
196640x003f009f,
196650x00410005,
196660x00440194,
196670x0048019d,
196680x004901c5,
196690x004a01cf,
196700x00550225,
196710x0056022d,
196720x0060000a,
196730x0061002a,
196740x00620030,
196750x00630030,
196760x00640030,
196770x00650030,
196780x00660030,
196790x00670030,
196800x00680037,
196810x0069003f,
196820x006a0047,
196830x006b0047,
196840x006c0047,
196850x006d0047,
196860x006e0047,
196870x006f0047,
196880x00700047,
196890x00730247,
196900x007b0240,
196910x00000005,
196920x00000005,
196930x00000005,
196940x00000005,
196950x00000005,
196960x00000005,
196970x00000005,
196980x00000005,
196990x00000005,
197000x00000005,
197010x00000005,
197020x00000005,
197030x00000005,
197040x00000005,
197050x00000005,
197060x00000005,
197070x00000005,
197080x00000005,
197090x00000005,
197100x00000005,
197110x00000005,
197120x00000005,
197130x00000005,
197140x00000005,
197150x00000005,
197160x00000005,
197170x00000005,
19718};
19719
19720static const u32 RV730_cp_microcode[] = {
197210xcc0003ea,
197220x7c408000,
197230xa0000000,
197240xcc800062,
197250x80000001,
197260xd040007f,
197270x80000001,
197280xcc400041,
197290x7c40c000,
197300xc0160004,
197310x30d03fff,
197320x7d15000c,
197330xcc110000,
197340x28d8001e,
197350x31980001,
197360x28dc001f,
197370xc8200004,
197380x95c00006,
197390x7c424000,
197400xcc000062,
197410x7e56800c,
197420xcc290000,
197430xc8240004,
197440x7e26000b,
197450x95800006,
197460x7c42c000,
197470xcc000062,
197480x7ed7000c,
197490xcc310000,
197500xc82c0004,
197510x7e2e000c,
197520xcc000062,
197530x31103fff,
197540x80000001,
197550xce110000,
197560x7c40c000,
197570x80000001,
197580xcc400040,
197590x80000001,
197600xcc412257,
197610x7c418000,
197620xcc400045,
197630xcc400048,
197640xcc41225c,
197650xcc41a1fc,
197660x7c408000,
197670xa0000000,
197680xcc800062,
197690xcc400045,
197700xcc400048,
197710x7c40c000,
197720xcc41225c,
197730xcc41a1fc,
197740x7c408000,
197750xa0000000,
197760xcc800062,
197770xcc000045,
197780xcc000048,
197790xcc41225c,
197800xcc41a1fc,
197810x7c408000,
197820xa0000000,
197830xcc800062,
197840x040ca1fd,
197850xc0120001,
197860xcc000045,
197870xcc000048,
197880x7cd0c00c,
197890xcc41225c,
197900xcc41a1fc,
197910xd04d0000,
197920x7c408000,
197930xa0000000,
197940xcc800062,
197950x80000001,
197960xcc41225d,
197970x7c408000,
197980x7c40c000,
197990xc02a0002,
198000x7c410000,
198010x7d29000c,
198020x30940001,
198030x30980006,
198040x309c0300,
198050x29dc0008,
198060x7c420000,
198070x7c424000,
198080x9540000f,
198090xc02e0004,
198100x05f02258,
198110x7f2f000c,
198120xcc310000,
198130xc8280004,
198140xccc12169,
198150xcd01216a,
198160xce81216b,
198170x0db40002,
198180xcc01216c,
198190x9740000e,
198200x0db40000,
198210x8000007b,
198220xc834000a,
198230x0db40002,
198240x97400009,
198250x0db40000,
198260xc02e0004,
198270x05f02258,
198280x7f2f000c,
198290xcc310000,
198300xc8280004,
198310x8000007b,
198320xc834000a,
198330x97400004,
198340x7e028000,
198350x8000007b,
198360xc834000a,
198370x0db40004,
198380x9740ff8c,
198390x00000000,
198400xce01216d,
198410xce41216e,
198420xc8280003,
198430xc834000a,
198440x9b400004,
198450x043c0005,
198460x8400026b,
198470xcc000062,
198480x0df40000,
198490x9740000b,
198500xc82c03e6,
198510xce81a2b7,
198520xc0300006,
198530x7ef34028,
198540xc0300020,
198550x7f6b8020,
198560x7fb3c029,
198570xcf81a2c4,
198580x80000001,
198590xcfc1a2d1,
198600x0df40001,
198610x9740000b,
198620xc82c03e7,
198630xce81a2bb,
198640xc0300006,
198650x7ef34028,
198660xc0300020,
198670x7f6b8020,
198680x7fb3c029,
198690xcf81a2c5,
198700x80000001,
198710xcfc1a2d2,
198720x0df40002,
198730x9740000b,
198740xc82c03e8,
198750xce81a2bf,
198760xc0300006,
198770x7ef34028,
198780xc0300020,
198790x7f6b8020,
198800x7fb3c029,
198810xcf81a2c6,
198820x80000001,
198830xcfc1a2d3,
198840xc82c03e9,
198850xce81a2c3,
198860xc0300006,
198870x7ef34028,
198880xc0300020,
198890x7f6b8020,
198900x7fb3c029,
198910xcf81a2c7,
198920x80000001,
198930xcfc1a2d4,
198940x80000001,
198950xcc400042,
198960x7c40c000,
198970x7c410000,
198980x2914001d,
198990x31540001,
199000x9940000c,
199010x31181000,
199020xc81c0011,
199030x95c00000,
199040xc81c0011,
199050xccc12100,
199060xcd012101,
199070xccc12102,
199080xcd012103,
199090x04180004,
199100x8000037c,
199110xcd81a2a4,
199120xc02a0004,
199130x95800008,
199140x36a821a3,
199150xcc290000,
199160xc8280004,
199170xc81c0011,
199180x0de40040,
199190x9640ffff,
199200xc81c0011,
199210xccc12170,
199220xcd012171,
199230xc8200012,
199240x96000000,
199250xc8200012,
199260x8000037c,
199270xcc000064,
199280x7c40c000,
199290x7c410000,
199300xcc000045,
199310xcc000048,
199320x40d40003,
199330xcd41225c,
199340xcd01a1fc,
199350xc01a0001,
199360x041ca1fd,
199370x7dd9c00c,
199380x7c420000,
199390x08cc0001,
199400x06240001,
199410x06280002,
199420xce1d0000,
199430xce5d0000,
199440x98c0fffa,
199450xce9d0000,
199460x7c408000,
199470xa0000000,
199480xcc800062,
199490x7c40c000,
199500x30d00001,
199510x28cc0001,
199520x7c414000,
199530x95000006,
199540x7c418000,
199550xcd41216d,
199560xcd81216e,
199570x800000f2,
199580xc81c0003,
199590xc0220004,
199600x7e16000c,
199610xcc210000,
199620xc81c0004,
199630x7c424000,
199640x98c00004,
199650x7c428000,
199660x80000001,
199670xcde50000,
199680xce412169,
199690xce81216a,
199700xcdc1216b,
199710x80000001,
199720xcc01216c,
199730x7c40c000,
199740x7c410000,
199750x7c414000,
199760x7c418000,
199770x7c41c000,
199780x28a40008,
199790x326400ff,
199800x0e68003c,
199810x9680000a,
199820x7c020000,
199830x7c420000,
199840x1e300003,
199850xcc00006a,
199860x9b000003,
199870x42200005,
199880x04200040,
199890x8000010f,
199900x7c024000,
199910x7e024000,
199920x9a400000,
199930x0a640001,
199940x30ec0010,
199950x9ac0000a,
199960xcc000062,
199970xc02a0004,
199980xc82c0021,
199990x7e92800c,
200000xcc000041,
200010xcc290000,
200020xcec00021,
200030x8000011f,
200040xc8300004,
200050xcd01216d,
200060xcd41216e,
200070xc8300003,
200080x7f1f000b,
200090x30f40007,
200100x27780001,
200110x9740002a,
200120x07b80124,
200130x9f800000,
200140x00000000,
200150x80000134,
200160x7f1b8004,
200170x80000138,
200180x7f1b8005,
200190x8000013c,
200200x7f1b8002,
200210x80000140,
200220x7f1b8003,
200230x80000144,
200240x7f1b8007,
200250x80000148,
200260x7f1b8006,
200270x8000014d,
200280x28a40008,
200290x9b800019,
200300x28a40008,
200310x8000015d,
200320x326400ff,
200330x9b800015,
200340x28a40008,
200350x8000015d,
200360x326400ff,
200370x9b800011,
200380x28a40008,
200390x8000015d,
200400x326400ff,
200410x9b80000d,
200420x28a40008,
200430x8000015d,
200440x326400ff,
200450x9b800009,
200460x28a40008,
200470x8000015d,
200480x326400ff,
200490x9b800005,
200500x28a40008,
200510x8000015d,
200520x326400ff,
200530x28a40008,
200540x326400ff,
200550x0e68003c,
200560x9a80feb2,
200570x28ec0008,
200580x7c434000,
200590x7c438000,
200600x7c43c000,
200610x96c00007,
200620xcc000062,
200630xcf412169,
200640xcf81216a,
200650xcfc1216b,
200660x80000001,
200670xcc01216c,
200680x80000001,
200690xcff50000,
200700xcc00006b,
200710x8400037f,
200720x0e68003c,
200730x9a800004,
200740xc8280015,
200750x80000001,
200760xd040007f,
200770x9680ffab,
200780x7e024000,
200790x84000239,
200800xc00e0002,
200810xcc000041,
200820x80000237,
200830xccc1304a,
200840x7c40c000,
200850x7c410000,
200860xc01e0001,
200870x29240012,
200880xc0220002,
200890x96400005,
200900xc0260004,
200910xc027fffb,
200920x7d25000b,
200930xc0260000,
200940x7dd2800b,
200950x7e12c00b,
200960x7d25000c,
200970x7c414000,
200980x7c418000,
200990xccc12169,
201000x9a80000a,
201010xcd01216a,
201020xcd41216b,
201030x96c0fe83,
201040xcd81216c,
201050xc8300018,
201060x97000000,
201070xc8300018,
201080x80000001,
201090xcc000018,
201100x8400037f,
201110xcc00007f,
201120xc8140013,
201130xc8180014,
201140xcd41216b,
201150x96c0fe77,
201160xcd81216c,
201170x80000181,
201180xc8300018,
201190xc80c0008,
201200x98c00000,
201210xc80c0008,
201220x7c410000,
201230x95000002,
201240x00000000,
201250x7c414000,
201260xc8200009,
201270xcc400043,
201280xce01a1f4,
201290xcc400044,
201300xc00e8000,
201310x7c424000,
201320x7c428000,
201330x2aac001f,
201340x96c0fe64,
201350xc035f000,
201360xce4003e2,
201370x32780003,
201380x267c0008,
201390x7ff7c00b,
201400x7ffbc00c,
201410x2a780018,
201420xcfc003e3,
201430xcf8003e4,
201440x26b00002,
201450x7f3f0000,
201460xcf0003e5,
201470x8000031d,
201480x7c80c000,
201490x7c40c000,
201500x28d00008,
201510x3110000f,
201520x9500000f,
201530x25280001,
201540x06a801b2,
201550x9e800000,
201560x00000000,
201570x800001d3,
201580xc0120800,
201590x800001e1,
201600xc814000f,
201610x800001e8,
201620xc8140010,
201630x800001ef,
201640xccc1a2a4,
201650x800001f8,
201660xc8140011,
201670x30d0003f,
201680x0d280015,
201690x9a800012,
201700x0d28001e,
201710x9a80001e,
201720x0d280020,
201730x9a800023,
201740x0d24000f,
201750x0d280010,
201760x7e6a800c,
201770x9a800026,
201780x0d200004,
201790x0d240014,
201800x0d280028,
201810x7e62400c,
201820x7ea6800c,
201830x9a80002a,
201840xc8140011,
201850x80000001,
201860xccc1a2a4,
201870xc0120800,
201880x7c414000,
201890x7d0cc00c,
201900xc0120008,
201910x29580003,
201920x295c000c,
201930x7c420000,
201940x7dd1c00b,
201950x26200014,
201960x7e1e400c,
201970x7e4e800c,
201980xce81a2a4,
201990x80000001,
202000xcd81a1fe,
202010xc814000f,
202020x0410210e,
202030x95400000,
202040xc814000f,
202050xd0510000,
202060x80000001,
202070xccc1a2a4,
202080xc8140010,
202090x04102108,
202100x95400000,
202110xc8140010,
202120xd0510000,
202130x80000001,
202140xccc1a2a4,
202150xccc1a2a4,
202160x04100001,
202170xcd000019,
202180x8400037f,
202190xcc00007f,
202200xc8100019,
202210x99000000,
202220xc8100019,
202230x80000002,
202240x7c408000,
202250x04102100,
202260x95400000,
202270xc8140011,
202280xd0510000,
202290x8000037c,
202300xccc1a2a4,
202310x7c40c000,
202320xcc40000d,
202330x94c0fe01,
202340xcc40000e,
202350x7c410000,
202360x95000005,
202370x08cc0001,
202380xc8140005,
202390x99400014,
202400x00000000,
202410x98c0fffb,
202420x7c410000,
202430x80000002,
202440x7d008000,
202450xc8140005,
202460x7c40c000,
202470x9940000c,
202480xc818000c,
202490x7c410000,
202500x9580fdf0,
202510xc820000e,
202520xc81c000d,
202530x66200020,
202540x7e1e002c,
202550x25240002,
202560x7e624020,
202570x80000001,
202580xcce60000,
202590x7c410000,
202600xcc00006c,
202610xcc00006d,
202620xc818001f,
202630xc81c001e,
202640x65980020,
202650x7dd9c02c,
202660x7cd4c00c,
202670xccde0000,
202680x45dc0004,
202690xc8280017,
202700x9680000f,
202710xc00e0001,
202720x28680008,
202730x2aac0016,
202740x32a800ff,
202750x0eb00049,
202760x7f2f000b,
202770x97000006,
202780x00000000,
202790xc8140005,
202800x7c40c000,
202810x80000221,
202820x7c410000,
202830x80000224,
202840xd040007f,
202850x84000239,
202860xcc000041,
202870xccc1304a,
202880x94000000,
202890xc83c001a,
202900x043c0005,
202910xcfc1a2a4,
202920xc0361f90,
202930xc0387fff,
202940x7c03c010,
202950x7f7b400c,
202960xcf41217c,
202970xcfc1217d,
202980xcc01217e,
202990xc03a0004,
203000x0434217f,
203010x7f7b400c,
203020xcc350000,
203030xc83c0004,
203040x2bfc001f,
203050x04380020,
203060x97c00005,
203070xcc000062,
203080x9b800000,
203090x0bb80001,
203100x80000245,
203110xcc000071,
203120xcc01a1f4,
203130x04380016,
203140xc0360002,
203150xcf81a2a4,
203160x88000000,
203170xcf412010,
203180x7c40c000,
203190x28d0001c,
203200x95000005,
203210x04d40001,
203220xcd400065,
203230x80000001,
203240xcd400068,
203250x09540002,
203260x80000001,
203270xcd400066,
203280x8400026a,
203290xc81803ea,
203300x7c40c000,
203310x9980fd9f,
203320xc8140016,
203330x08d00001,
203340x9940002b,
203350xcd000068,
203360x7c408000,
203370xa0000000,
203380xcc800062,
203390x043c0005,
203400xcfc1a2a4,
203410xcc01a1f4,
203420x8400037f,
203430xcc000046,
203440x88000000,
203450xcc00007f,
203460x8400027c,
203470xc81803ea,
203480x7c40c000,
203490x9980fd8d,
203500xc8140016,
203510x08d00001,
203520x99400019,
203530xcd000068,
203540x7c408000,
203550xa0000000,
203560xcc800062,
203570x043c0022,
203580xcfc1a2a4,
203590x8400037f,
203600xcc000047,
203610x88000000,
203620xcc00007f,
203630xc8100016,
203640x9900000d,
203650xcc400067,
203660x80000002,
203670x7c408000,
203680xc81803ea,
203690x9980fd79,
203700x7c40c000,
203710x94c00003,
203720xc8100016,
203730x99000004,
203740xccc00068,
203750x80000002,
203760x7c408000,
203770x84000239,
203780xc0148000,
203790xcc000041,
203800xcd41304a,
203810xc0148000,
203820x99000000,
203830xc8100016,
203840x80000002,
203850x7c408000,
203860xc0120001,
203870x7c51400c,
203880x80000001,
203890xd0550000,
203900x7c40c000,
203910x7c410000,
203920x7c414000,
203930x7c418000,
203940x291c001f,
203950xccc0004a,
203960xcd00004b,
203970x95c00003,
203980xc01c8000,
203990xcdc12010,
204000xdd830000,
204010x055c2000,
204020xcc000062,
204030x80000001,
204040xd81f4100,
204050x7c40c000,
204060x7c410000,
204070x7c414000,
204080x7c418000,
204090xccc0004c,
204100xcd00004d,
204110xdd830000,
204120x055ca000,
204130x80000001,
204140xd81f4100,
204150x7c40c000,
204160x7c410000,
204170x7c414000,
204180x7c418000,
204190xccc0004e,
204200xcd00004f,
204210xdd830000,
204220x055cc000,
204230x80000001,
204240xd81f4100,
204250x7c40c000,
204260x7c410000,
204270x7c414000,
204280x7c418000,
204290xccc00050,
204300xcd000051,
204310xdd830000,
204320x055cf8e0,
204330x80000001,
204340xd81f4100,
204350x7c40c000,
204360x7c410000,
204370x7c414000,
204380x7c418000,
204390xccc00052,
204400xcd000053,
204410xdd830000,
204420x055cf880,
204430x80000001,
204440xd81f4100,
204450x7c40c000,
204460x7c410000,
204470x7c414000,
204480x7c418000,
204490xccc00054,
204500xcd000055,
204510xdd830000,
204520x055ce000,
204530x80000001,
204540xd81f4100,
204550x7c40c000,
204560x7c410000,
204570x7c414000,
204580x7c418000,
204590xccc00056,
204600xcd000057,
204610xdd830000,
204620x055cf000,
204630x80000001,
204640xd81f4100,
204650x7c40c000,
204660x7c410000,
204670x7c414000,
204680x7c418000,
204690xccc00058,
204700xcd000059,
204710xdd830000,
204720x055cf3fc,
204730x80000001,
204740xd81f4100,
204750xd0432000,
204760x7c408000,
204770xa0000000,
204780xcc800062,
204790xd043a000,
204800x7c408000,
204810xa0000000,
204820xcc800062,
204830xd043c000,
204840x7c408000,
204850xa0000000,
204860xcc800062,
204870xd043f8e0,
204880x7c408000,
204890xa0000000,
204900xcc800062,
204910xd043f880,
204920x7c408000,
204930xa0000000,
204940xcc800062,
204950xd043e000,
204960x7c408000,
204970xa0000000,
204980xcc800062,
204990xd043f000,
205000x7c408000,
205010xa0000000,
205020xcc800062,
205030xd043f3fc,
205040x7c408000,
205050xa0000000,
205060xcc800062,
205070xc81403e0,
205080xcc430000,
205090xcc430000,
205100xcc430000,
205110x7d45c000,
205120xcdc30000,
205130xd0430000,
205140x7c408000,
205150xa0000000,
205160xcc800062,
205170x7c40c000,
205180xc81003e2,
205190xc81403e5,
205200xc81803e3,
205210xc81c03e4,
205220xcd812169,
205230xcdc1216a,
205240xccc1216b,
205250xcc01216c,
205260x04200004,
205270x7da18000,
205280x7d964002,
205290x9640fcd9,
205300xcd8003e3,
205310x31280003,
205320xc02df000,
205330x25180008,
205340x7dad800b,
205350x7da9800c,
205360x80000001,
205370xcd8003e3,
205380x308cffff,
205390xd04d0000,
205400x7c408000,
205410xa0000000,
205420xcc800062,
205430xc8140020,
205440x15580002,
205450x9580ffff,
205460xc8140020,
205470xcc00006e,
205480xcc412180,
205490x7c40c000,
205500xccc1218d,
205510xcc412181,
205520x28d0001f,
205530x34588000,
205540xcd81218c,
205550x9500fcbf,
205560xcc412182,
205570xc8140020,
205580x9940ffff,
205590xc8140020,
205600x80000002,
205610x7c408000,
205620x7c40c000,
205630x28d00018,
205640x31100001,
205650xc0160080,
205660x95000003,
205670xc02a0004,
205680x7cd4c00c,
205690xccc1217c,
205700xcc41217d,
205710xcc41217e,
205720x7c418000,
205730x1db00003,
205740x36a0217f,
205750x9b000003,
205760x419c0005,
205770x041c0040,
205780x99c00000,
205790x09dc0001,
205800xcc210000,
205810xc8240004,
205820x2a6c001f,
205830x419c0005,
205840x9ac0fffa,
205850xcc800062,
205860x80000002,
205870x7c408000,
205880x7c40c000,
205890x04d403e6,
205900x80000001,
205910xcc540000,
205920x8000037c,
205930xcc4003ea,
205940xc01c8000,
205950x044ca000,
205960xcdc12010,
205970x7c410000,
205980xc8140009,
205990x04180000,
206000x041c0008,
206010xcd800071,
206020x09dc0001,
206030x05980001,
206040xcd0d0000,
206050x99c0fffc,
206060xcc800062,
206070x8000037c,
206080xcd400071,
206090xc00e0100,
206100xcc000041,
206110xccc1304a,
206120xc83c007f,
206130xcc00007f,
206140x80000001,
206150xcc00007f,
206160xcc00007f,
206170x88000000,
206180xcc00007f,
206190x00000000,
206200x00000000,
206210x00000000,
206220x00000000,
206230x00000000,
206240x00000000,
206250x00000000,
206260x00000000,
206270x00000000,
206280x00000000,
206290x00000000,
206300x00000000,
206310x00000000,
206320x00000000,
206330x00000000,
206340x00000000,
206350x00000000,
206360x00000000,
206370x00000000,
206380x00000000,
206390x00000000,
206400x00000000,
206410x00000000,
206420x00000000,
206430x00000000,
206440x00000000,
206450x00000000,
206460x00000000,
206470x00000000,
206480x00000000,
206490x00000000,
206500x00000000,
206510x00000000,
206520x00000000,
206530x00000000,
206540x00000000,
206550x00000000,
206560x00000000,
206570x00000000,
206580x00000000,
206590x00000000,
206600x00000000,
206610x00000000,
206620x00000000,
206630x00000000,
206640x00000000,
206650x00000000,
206660x00000000,
206670x00000000,
206680x00000000,
206690x00000000,
206700x00000000,
206710x00000000,
206720x00000000,
206730x00000000,
206740x00000000,
206750x00000000,
206760x00000000,
206770x00000000,
206780x00000000,
206790x00000000,
206800x00000000,
206810x00000000,
206820x00000000,
206830x00000000,
206840x00000000,
206850x00000000,
206860x00000000,
206870x00000000,
206880x00000000,
206890x00000000,
206900x00000000,
206910x00000000,
206920x00000000,
206930x00000000,
206940x00000000,
206950x00000000,
206960x00000000,
206970x00000000,
206980x00000000,
206990x00000000,
207000x00000000,
207010x00000000,
207020x00000000,
207030x00000000,
207040x00000000,
207050x00000000,
207060x00000000,
207070x00000000,
207080x00000000,
207090x00000000,
207100x00000000,
207110x00000000,
207120x00000000,
207130x00000000,
207140x00000000,
207150x00000000,
207160x00000000,
207170x00000000,
207180x00000000,
207190x00000000,
207200x00000000,
207210x00000000,
207220x00000000,
207230x00000000,
207240x00000000,
207250x00000000,
207260x00000000,
207270x00000000,
207280x00000000,
207290x00000000,
207300x00000000,
207310x00000000,
207320x00000000,
207330x00000000,
207340x00000000,
207350x00000000,
207360x00000000,
207370x00000000,
207380x00000000,
207390x00000000,
207400x00000000,
207410x00000000,
207420x00000000,
207430x00000000,
207440x00000000,
207450x00000000,
207460x00000000,
207470x00000000,
207480x00000000,
207490x00000000,
207500x00000000,
207510x00000000,
207520x00000000,
207530x00000000,
207540x00000000,
207550x00000000,
207560x00000000,
207570x00000000,
207580x00000000,
207590x00000000,
207600x00000000,
207610x00000000,
207620x00000000,
207630x00000000,
207640x00000000,
207650x00000000,
207660x00000000,
207670x00000000,
207680x00000000,
207690x00000000,
207700x00000000,
207710x00000000,
207720x00000000,
207730x00000000,
207740x00000000,
207750x00000000,
207760x00000000,
207770x00000000,
207780x00000000,
207790x00000000,
207800x00000000,
207810x00000000,
207820x00000000,
207830x00000000,
207840x00000000,
207850x00000000,
207860x00000000,
207870x00000000,
207880x00000000,
207890x00000000,
207900x00000000,
207910x00000000,
207920x00000000,
207930x00000000,
207940x00000000,
207950x00000000,
207960x00000000,
207970x00000000,
207980x00000000,
207990x00000000,
208000x00000000,
208010x00000000,
208020x00000000,
208030x00000000,
208040x00000000,
208050x00000000,
208060x00000000,
208070x00000000,
208080x00000000,
208090x00000000,
208100x00000000,
208110x00000000,
208120x00000000,
208130x00000000,
208140x00000000,
208150x00000000,
208160x00000000,
208170x00000000,
208180x00000000,
208190x00000000,
208200x00000000,
208210x00000000,
208220x00000000,
208230x00000000,
208240x00000000,
208250x00000000,
208260x00000000,
208270x00000000,
208280x00000000,
208290x00000000,
208300x00000000,
208310x00000000,
208320x00000000,
208330x00000000,
208340x00000000,
208350x00000000,
208360x00000000,
208370x00000000,
208380x00000000,
208390x00000000,
208400x00000000,
208410x00000000,
208420x00000000,
208430x00000000,
208440x00000000,
208450x00000000,
208460x00000000,
208470x00000000,
208480x00000000,
208490x00000000,
208500x00000000,
208510x00000000,
208520x00000000,
208530x00000000,
208540x00000000,
208550x00000000,
208560x00000000,
208570x00000000,
208580x00000000,
208590x00000000,
208600x00000000,
208610x00000000,
208620x00000000,
208630x00000000,
208640x00000000,
208650x00000000,
208660x00000000,
208670x00000000,
208680x00000000,
208690x00000000,
208700x00000000,
208710x00000000,
208720x00000000,
208730x00000000,
208740x00000000,
208750x00000000,
208760x00000000,
208770x00000000,
208780x00000000,
208790x00000000,
208800x00000000,
208810x00000000,
208820x00000000,
208830x00000000,
208840x00000000,
208850x00000000,
208860x00000000,
208870x00000000,
208880x00000000,
208890x00000000,
208900x00000000,
208910x00000000,
208920x00000000,
208930x00000000,
208940x00000000,
208950x00000000,
208960x00000000,
208970x00000000,
208980x00000000,
208990x00000000,
209000x00000000,
209010x00000000,
209020x00000000,
209030x00000000,
209040x00000000,
209050x00000000,
209060x00000000,
209070x00000000,
209080x00000000,
209090x00000000,
209100x00000000,
209110x00000000,
209120x00000000,
209130x00000000,
209140x00000000,
209150x00000000,
209160x00000000,
209170x00000000,
209180x00000000,
209190x00000000,
209200x00000000,
209210x00000000,
209220x00000000,
209230x00000000,
209240x00000000,
209250x00000000,
209260x00000000,
209270x00000000,
209280x00000000,
209290x00000000,
209300x00000000,
209310x00000000,
209320x00000000,
209330x00000000,
209340x00000000,
209350x00000000,
209360x00000000,
209370x00000000,
209380x00000000,
209390x00000000,
209400x00000000,
209410x00000000,
209420x00000000,
209430x00000000,
209440x00000000,
209450x00000000,
209460x00000000,
209470x00000000,
209480x00000000,
209490x00000000,
209500x00000000,
209510x00000000,
209520x00000000,
209530x00000000,
209540x00000000,
209550x00000000,
209560x00000000,
209570x00000000,
209580x00000000,
209590x00000000,
209600x00000000,
209610x00000000,
209620x00000000,
209630x00000000,
209640x00000000,
209650x00000000,
209660x00000000,
209670x00000000,
209680x00000000,
209690x00000000,
209700x00000000,
209710x00000000,
209720x00000000,
209730x00000000,
209740x00000000,
209750x00000000,
209760x00000000,
209770x00000000,
209780x00000000,
209790x00000000,
209800x00000000,
209810x00000000,
209820x00000000,
209830x00000000,
209840x00000000,
209850x00000000,
209860x00000000,
209870x00000000,
209880x00000000,
209890x00000000,
209900x00000000,
209910x00000000,
209920x00000000,
209930x00000000,
209940x00000000,
209950x00000000,
209960x00000000,
209970x00000000,
209980x00000000,
209990x00000000,
210000x00000000,
210010x00010331,
210020x00100004,
210030x00170006,
210040x00210008,
210050x00270028,
210060x00280023,
210070x00290029,
210080x002a0026,
210090x002b0029,
210100x002d0038,
210110x002e003f,
210120x002f004a,
210130x0034004c,
210140x00360030,
210150x003900af,
210160x003a00cf,
210170x003b00e4,
210180x003c00fc,
210190x003d016b,
210200x003f00ad,
210210x00410336,
210220x00430349,
210230x0044018e,
210240x004500fc,
210250x004601ac,
210260x004701ac,
210270x004801fe,
210280x0049020c,
210290x004a0255,
210300x004b0282,
210310x0052025f,
210320x00530271,
210330x00540287,
210340x00570299,
210350x0060029d,
210360x006102ac,
210370x006202b6,
210380x006302c0,
210390x006402ca,
210400x006502d4,
210410x006602de,
210420x006702e8,
210430x006802f2,
210440x006902f6,
210450x006a02fa,
210460x006b02fe,
210470x006c0302,
210480x006d0306,
210490x006e030a,
210500x006f030e,
210510x00700312,
210520x00720363,
210530x00740369,
210540x00790367,
210550x007c031c,
210560x000f0378,
210570x000f0378,
210580x000f0378,
210590x000f0378,
210600x000f0378,
210610x000f0378,
210620x000f0378,
210630x000f0378,
210640x000f0378,
210650x000f0378,
210660x000f0378,
210670x000f0378,
210680x000f0378,
210690x000f0378,
210700x000f0378,
210710x000f0378,
210720x000f0378,
210730x000f0378,
210740x000f0378,
210750x000f0378,
210760x000f0378,
210770x000f0378,
210780x000f0378,
210790x000f0378,
210800x000f0378,
21081};
21082
21083static const u32 RV710_pfp_microcode[] = {
210840x7c408000,
210850xa0000000,
210860x7e82800b,
210870x80000000,
210880xdc030000,
210890xcc800040,
210900xd0400040,
210910x7c408000,
210920xa0000000,
210930x7e82800b,
210940xc818000e,
210950x31980001,
210960x7c424000,
210970x9580023a,
210980x7c428000,
210990xc81c001c,
211000xc037c000,
211010x7c40c000,
211020x7c410000,
211030x7cb4800b,
211040xc0360003,
211050x99c00000,
211060xc81c001c,
211070x7cb4800c,
211080x24d40002,
211090x7d654000,
211100xcd400043,
211110xce800043,
211120xcd000043,
211130xcc800040,
211140xce400040,
211150xce800040,
211160xccc00040,
211170xdc3a0000,
211180x9780ffde,
211190xcd000040,
211200x7c40c000,
211210x80000018,
211220x7c410000,
211230xd4000340,
211240xd4000fc0,
211250xd4000fa2,
211260xc818000e,
211270x8000000c,
211280x31980002,
211290xd40003c0,
211300xd4000fc0,
211310xd4000fa2,
211320xc818000e,
211330x288c0008,
211340x30cc000f,
211350x34100001,
211360x7d0d0008,
211370x8000000c,
211380x7d91800b,
211390xcc800040,
211400xd0400040,
211410x7c408000,
211420xa0000000,
211430x7e82800b,
211440xd4000340,
211450xd4000fc0,
211460xd4000fa2,
211470xcc800040,
211480xd0400040,
211490x7c408000,
211500xa0000000,
211510x7e82800b,
211520xd40003c0,
211530xd4000fc0,
211540xd4000fa2,
211550xcc800040,
211560xd0400040,
211570x7c408000,
211580xa0000000,
211590x7e82800b,
211600xcc4003f9,
211610x80000249,
211620xcc4003f8,
211630xc037ffff,
211640x7c414000,
211650xcf41a29e,
211660xc82003f8,
211670xc81c03f9,
211680x66200020,
211690xc81803fb,
211700x7de1c02c,
211710x7d58c008,
211720x7cdcc020,
211730x69100020,
211740xc0360003,
211750xcc000054,
211760x7cb4800c,
211770x80000069,
211780xcc800040,
211790x7c418000,
211800xcd81a29e,
211810xcc800040,
211820x80000067,
211830xcd800040,
211840xc019ffff,
211850xcc800040,
211860xcd81a29e,
211870x7c40c000,
211880x7c410000,
211890x7c414000,
211900xccc1a1fa,
211910xcd01a1f9,
211920xcd41a29d,
211930xccc00040,
211940xcd000040,
211950xcd400040,
211960xcc400040,
211970x7c408000,
211980xa0000000,
211990x7e82800b,
212000xcc000054,
212010xcc800040,
212020x7c40c000,
212030x7c410000,
212040x7c414000,
212050xccc1a1fa,
212060xcd01a1f9,
212070xcd41a29d,
212080xccc00040,
212090xcd000040,
212100xcd400040,
212110xd0400040,
212120x7c408000,
212130xa0000000,
212140x7e82800b,
212150x7c40c000,
212160x30d00001,
212170xccc1a29f,
212180x95000003,
212190x04140001,
212200x04140002,
212210xcd4003fb,
212220xcc800040,
212230x80000000,
212240xccc00040,
212250x7c40c000,
212260xcc800040,
212270xccc1a2a2,
212280x80000000,
212290xccc00040,
212300x7c40c000,
212310x28d4001f,
212320xcc800040,
212330x95400003,
212340x7c410000,
212350xccc00057,
212360x2918001f,
212370xccc00040,
212380x95800003,
212390xcd000040,
212400xcd000058,
212410x80000249,
212420xcc00007f,
212430xc8200017,
212440xc8300022,
212450x9a000006,
212460x0e280001,
212470xc824001e,
212480x0a640001,
212490xd4001240,
212500xce400040,
212510xc036c000,
212520x96800007,
212530x37747900,
212540x041c0001,
212550xcf400040,
212560xcdc00040,
212570xcf0003fa,
212580x7c030000,
212590xca0c0010,
212600x7c410000,
212610x94c00004,
212620x7c414000,
212630xd42002c4,
212640xcde00044,
212650x9b00000b,
212660x7c418000,
212670xcc00004b,
212680xcda00049,
212690xcd200041,
212700xcd600041,
212710xcda00041,
212720x06200001,
212730xce000056,
212740x80000249,
212750xcc00007f,
212760xc8280020,
212770xc82c0021,
212780xcc000063,
212790x7eea4001,
212800x65740020,
212810x7f53402c,
212820x269c0002,
212830x7df5c020,
212840x69f80020,
212850xce80004b,
212860xce600049,
212870xcde00041,
212880xcfa00041,
212890xce600041,
212900x271c0002,
212910x7df5c020,
212920x69f80020,
212930x7db24001,
212940xcf00004b,
212950xce600049,
212960xcde00041,
212970xcfa00041,
212980x800000bc,
212990xce600041,
213000xc8200017,
213010xc8300022,
213020x9a000006,
213030x0e280001,
213040xc824001e,
213050x0a640001,
213060xd4001240,
213070xce400040,
213080xca0c0010,
213090x7c410000,
213100x94c0000b,
213110xc036c000,
213120x96800007,
213130x37747900,
213140x041c0001,
213150xcf400040,
213160xcdc00040,
213170xcf0003fa,
213180x7c030000,
213190x800000b5,
213200x7c414000,
213210xcc000048,
213220x800000ee,
213230x00000000,
213240xc8200017,
213250xc81c0023,
213260x0e240002,
213270x99c00015,
213280x7c418000,
213290x0a200001,
213300xce000056,
213310xd4000440,
213320xcc000040,
213330xc036c000,
213340xca140013,
213350x96400007,
213360x37747900,
213370xcf400040,
213380xcc000040,
213390xc83003fa,
213400x80000103,
213410xcf000022,
213420xcc000022,
213430x95400146,
213440xcc00007f,
213450xcca00046,
213460x80000000,
213470xcc200046,
213480x80000249,
213490xcc000064,
213500xc8200017,
213510xc810001f,
213520x96000005,
213530x09100001,
213540xd4000440,
213550xcd000040,
213560xcd000022,
213570xcc800040,
213580xd0400040,
213590xc80c0025,
213600x94c0feec,
213610xc8100008,
213620xcd000040,
213630xd4000fc0,
213640x80000000,
213650xd4000fa2,
213660x7c40c000,
213670x7c410000,
213680xccc003fd,
213690xcd0003fc,
213700xccc00042,
213710xcd000042,
213720x2914001f,
213730x29180010,
213740x31980007,
213750x3b5c0001,
213760x7d76000b,
213770x99800005,
213780x7d5e400b,
213790xcc000042,
213800x80000249,
213810xcc00004d,
213820x29980001,
213830x292c0008,
213840x9980003d,
213850x32ec0001,
213860x96000004,
213870x2930000c,
213880x80000249,
213890xcc000042,
213900x04140010,
213910xcd400042,
213920x33300001,
213930x34280001,
213940x8400015d,
213950xc8140003,
213960x9b40001b,
213970x0438000c,
213980x8400015d,
213990xc8140003,
214000x9b400017,
214010x04380008,
214020x8400015d,
214030xc8140003,
214040x9b400013,
214050x04380004,
214060x8400015d,
214070xc8140003,
214080x9b400015,
214090xc80c03fd,
214100x9a800009,
214110xc81003fc,
214120x9b000101,
214130xcc00004d,
214140x04140010,
214150xccc00042,
214160xcd000042,
214170x80000135,
214180xcd400042,
214190x96c000fa,
214200xcc00004d,
214210x80000249,
214220xcc00004e,
214230x9ac00003,
214240xcc00004d,
214250xcc00004e,
214260xdf830000,
214270x80000000,
214280xd80301ff,
214290x9ac000f0,
214300xcc00004d,
214310x80000249,
214320xcc00004e,
214330xc8180003,
214340xc81c0003,
214350xc8200003,
214360x7d5d4003,
214370x7da1c003,
214380x7d5d400c,
214390x2a10001f,
214400x299c001f,
214410x7d1d000b,
214420x7d17400b,
214430x88000000,
214440x7e92800b,
214450x96400004,
214460xcc00004e,
214470x80000249,
214480xcc000042,
214490x04380008,
214500xcf800042,
214510xc8080003,
214520xc80c0003,
214530xc8100003,
214540xc8140003,
214550xc8180003,
214560xc81c0003,
214570xc8240003,
214580xc8280003,
214590x29fc001f,
214600x2ab0001f,
214610x7ff3c00b,
214620x28f0001f,
214630x7ff3c00b,
214640x2970001f,
214650x7ff3c00b,
214660x7d888001,
214670x7dccc001,
214680x7e510001,
214690x7e954001,
214700x7c908002,
214710x7cd4c002,
214720x7cbc800b,
214730x9ac00003,
214740x7c8f400b,
214750x38b40001,
214760x9b4000c1,
214770xcc00004d,
214780x9bc000bf,
214790xcc00004e,
214800xc80c03fd,
214810xc81003fc,
214820xccc00042,
214830x8000016e,
214840xcd000042,
214850xd4000340,
214860xd4000fc0,
214870xd4000fa2,
214880xcc800040,
214890xcc400040,
214900xcc400040,
214910xcc400040,
214920x7c40c000,
214930xccc00040,
214940xccc0000d,
214950x80000000,
214960xd0400040,
214970x7c40c000,
214980x7c410000,
214990x65140020,
215000x7d4d402c,
215010x24580002,
215020x7d598020,
215030x7c41c000,
215040xcd800042,
215050x69980020,
215060xcd800042,
215070xcdc00042,
215080xc023c000,
215090x05e40002,
215100x7ca0800b,
215110x26640010,
215120x7ca4800c,
215130xcc800040,
215140xcdc00040,
215150xccc00040,
215160x95c0000e,
215170xcd000040,
215180x09dc0001,
215190xc8280003,
215200x96800008,
215210xce800040,
215220xc834001d,
215230x97400000,
215240xc834001d,
215250x26a80008,
215260x8400024c,
215270xcc2b0000,
215280x99c0fff7,
215290x09dc0001,
215300xdc3a0000,
215310x97800004,
215320x7c418000,
215330x800001a2,
215340x25980002,
215350xa0000000,
215360x7d808000,
215370xc818001d,
215380x7c40c000,
215390x64d00008,
215400x95800000,
215410xc818001d,
215420xcc130000,
215430xcc800040,
215440xccc00040,
215450x80000000,
215460xcc400040,
215470xc810001f,
215480x7c40c000,
215490xcc800040,
215500x7cd1400c,
215510xcd400040,
215520x05180001,
215530x80000000,
215540xcd800022,
215550x7c40c000,
215560x64500020,
215570x8400024c,
215580xcc000061,
215590x7cd0c02c,
215600xc8200017,
215610xc8d60000,
215620x99400008,
215630x7c438000,
215640xdf830000,
215650xcfa0004f,
215660x8400024c,
215670xcc000062,
215680x80000000,
215690xd040007f,
215700x80000249,
215710xcc000062,
215720x8400024c,
215730xcc000061,
215740xc8200017,
215750x7c40c000,
215760xc036ff00,
215770xc810000d,
215780xc0303fff,
215790x7cf5400b,
215800x7d51800b,
215810x7d81800f,
215820x99800008,
215830x7cf3800b,
215840xdf830000,
215850xcfa0004f,
215860x8400024c,
215870xcc000062,
215880x80000000,
215890xd040007f,
215900x80000249,
215910xcc000062,
215920x8400024c,
215930x7c40c000,
215940x28dc0008,
215950x95c00019,
215960x30dc0010,
215970x7c410000,
215980x99c00004,
215990x64540020,
216000x80000208,
216010xc91d0000,
216020x7d15002c,
216030xc91e0000,
216040x7c420000,
216050x7c424000,
216060x7c418000,
216070x7de5c00b,
216080x7de28007,
216090x9a80000e,
216100x41ac0005,
216110x9ac00000,
216120x0aec0001,
216130x30dc0010,
216140x99c00004,
216150x00000000,
216160x8000020b,
216170xc91d0000,
216180x8000020b,
216190xc91e0000,
216200xcc800040,
216210xccc00040,
216220xd0400040,
216230xc80c0025,
216240x94c0fde4,
216250xc8100008,
216260xcd000040,
216270xd4000fc0,
216280x80000000,
216290xd4000fa2,
216300xd4000340,
216310xd4000fc0,
216320xd4000fa2,
216330xcc800040,
216340xd0400040,
216350x7c408000,
216360xa0000000,
216370x7e82800b,
216380xd40003c0,
216390xd4000fc0,
216400xd4000fa2,
216410xcc800040,
216420xd0400040,
216430x7c408000,
216440xa0000000,
216450x7e82800b,
216460x7c40c000,
216470x30d00006,
216480x0d100006,
216490x99000007,
216500xc8140015,
216510x99400005,
216520xcc000052,
216530xd4000340,
216540xd4000fc0,
216550xd4000fa2,
216560xcc800040,
216570xccc00040,
216580x80000000,
216590xd0400040,
216600x7c40c000,
216610xcc4d0000,
216620xdc3a0000,
216630x9780fdbd,
216640x04cc0001,
216650x80000242,
216660xcc4d0000,
216670x80000000,
216680xd040007f,
216690xcc00007f,
216700x80000000,
216710xcc00007f,
216720xcc00007f,
216730x88000000,
216740xcc00007f,
216750x00000000,
216760x00000000,
216770x00000000,
216780x00000000,
216790x00000000,
216800x00000000,
216810x00000000,
216820x00000000,
216830x00000000,
216840x00000000,
216850x00000000,
216860x00000000,
216870x00000000,
216880x00000000,
216890x00000000,
216900x00000000,
216910x00000000,
216920x00000000,
216930x00000000,
216940x00000000,
216950x00000000,
216960x00000000,
216970x00000000,
216980x00000000,
216990x00000000,
217000x00000000,
217010x00000000,
217020x00000000,
217030x00000000,
217040x00000000,
217050x00000000,
217060x00000000,
217070x00000000,
217080x00000000,
217090x00000000,
217100x00000000,
217110x00000000,
217120x00000000,
217130x00000000,
217140x00000000,
217150x00000000,
217160x00000000,
217170x00000000,
217180x00000000,
217190x00000000,
217200x00000000,
217210x00000000,
217220x00000000,
217230x00000000,
217240x00000000,
217250x00000000,
217260x00000000,
217270x00000000,
217280x00000000,
217290x00000000,
217300x00000000,
217310x00000000,
217320x00000000,
217330x00000000,
217340x00000000,
217350x00000000,
217360x00000000,
217370x00000000,
217380x00000000,
217390x00000000,
217400x00000000,
217410x00000000,
217420x00000000,
217430x00000000,
217440x00000000,
217450x00000000,
217460x00000000,
217470x00000000,
217480x00000000,
217490x00000000,
217500x00000000,
217510x00000000,
217520x00000000,
217530x00000000,
217540x00000000,
217550x00000000,
217560x00000000,
217570x00000000,
217580x00000000,
217590x00000000,
217600x00000000,
217610x00000000,
217620x00000000,
217630x00000000,
217640x00000000,
217650x00000000,
217660x00000000,
217670x00000000,
217680x00000000,
217690x00000000,
217700x00000000,
217710x00000000,
217720x00000000,
217730x00000000,
217740x00000000,
217750x00000000,
217760x00000000,
217770x00000000,
217780x00000000,
217790x00000000,
217800x00000000,
217810x00000000,
217820x00000000,
217830x00000000,
217840x00000000,
217850x00000000,
217860x00000000,
217870x00000000,
217880x00000000,
217890x00000000,
217900x00000000,
217910x00000000,
217920x00000000,
217930x00000000,
217940x00000000,
217950x00000000,
217960x00000000,
217970x00000000,
217980x00000000,
217990x00000000,
218000x00000000,
218010x00000000,
218020x00000000,
218030x00000000,
218040x00000000,
218050x00000000,
218060x00000000,
218070x00000000,
218080x00000000,
218090x00000000,
218100x00000000,
218110x00000000,
218120x00000000,
218130x00000000,
218140x00000000,
218150x00000000,
218160x00000000,
218170x00000000,
218180x00000000,
218190x00000000,
218200x00000000,
218210x00000000,
218220x00000000,
218230x00000000,
218240x00000000,
218250x00000000,
218260x00000000,
218270x00000000,
218280x00000000,
218290x00000000,
218300x00000000,
218310x00000000,
218320x00000000,
218330x00000000,
218340x00000000,
218350x00000000,
218360x00000000,
218370x00000000,
218380x00000000,
218390x00000000,
218400x00000000,
218410x00000000,
218420x00000000,
218430x00000000,
218440x00000000,
218450x00000000,
218460x00000000,
218470x00000000,
218480x00000000,
218490x00000000,
218500x00000000,
218510x00000000,
218520x00030222,
218530x0004022a,
218540x0005009f,
218550x00020003,
218560x0006003c,
218570x00070027,
218580x00080191,
218590x00090044,
218600x000a002d,
218610x00100247,
218620x001700f0,
218630x002201d7,
218640x002301e8,
218650x0026004c,
218660x0027005f,
218670x0020011a,
218680x00280092,
218690x0029004f,
218700x002a0083,
218710x002b0064,
218720x002f008d,
218730x003200d8,
218740x00340232,
218750x00360074,
218760x0039010a,
218770x003c01fc,
218780x003f009f,
218790x00410005,
218800x00440194,
218810x0048019d,
218820x004901c5,
218830x004a01cf,
218840x00550225,
218850x0056022d,
218860x0060000a,
218870x0061002a,
218880x00620030,
218890x00630030,
218900x00640030,
218910x00650030,
218920x00660030,
218930x00670030,
218940x00680037,
218950x0069003f,
218960x006a0047,
218970x006b0047,
218980x006c0047,
218990x006d0047,
219000x006e0047,
219010x006f0047,
219020x00700047,
219030x00730247,
219040x007b0240,
219050x00000005,
219060x00000005,
219070x00000005,
219080x00000005,
219090x00000005,
219100x00000005,
219110x00000005,
219120x00000005,
219130x00000005,
219140x00000005,
219150x00000005,
219160x00000005,
219170x00000005,
219180x00000005,
219190x00000005,
219200x00000005,
219210x00000005,
219220x00000005,
219230x00000005,
219240x00000005,
219250x00000005,
219260x00000005,
219270x00000005,
219280x00000005,
219290x00000005,
219300x00000005,
219310x00000005,
21932};
21933
21934static const u32 RV710_cp_microcode[] = {
219350xcc0003ea,
219360x04080003,
219370xcc800043,
219380x7c408000,
219390xa0000000,
219400xcc800062,
219410x80000003,
219420xd040007f,
219430x80000003,
219440xcc400041,
219450x7c40c000,
219460xc0160004,
219470x30d03fff,
219480x7d15000c,
219490xcc110000,
219500x28d8001e,
219510x31980001,
219520x28dc001f,
219530xc8200004,
219540x95c00006,
219550x7c424000,
219560xcc000062,
219570x7e56800c,
219580xcc290000,
219590xc8240004,
219600x7e26000b,
219610x95800006,
219620x7c42c000,
219630xcc000062,
219640x7ed7000c,
219650xcc310000,
219660xc82c0004,
219670x7e2e000c,
219680xcc000062,
219690x31103fff,
219700x80000003,
219710xce110000,
219720x7c40c000,
219730x80000003,
219740xcc400040,
219750x80000003,
219760xcc412257,
219770x7c418000,
219780xcc400045,
219790xcc400048,
219800xcc41225c,
219810xcc41a1fc,
219820x7c408000,
219830xa0000000,
219840xcc800062,
219850xcc400045,
219860xcc400048,
219870x7c40c000,
219880xcc41225c,
219890xcc41a1fc,
219900x7c408000,
219910xa0000000,
219920xcc800062,
219930xcc000045,
219940xcc000048,
219950xcc41225c,
219960xcc41a1fc,
219970x7c408000,
219980xa0000000,
219990xcc800062,
220000x040ca1fd,
220010xc0120001,
220020xcc000045,
220030xcc000048,
220040x7cd0c00c,
220050xcc41225c,
220060xcc41a1fc,
220070xd04d0000,
220080x7c408000,
220090xa0000000,
220100xcc800062,
220110x80000003,
220120xcc41225d,
220130x7c408000,
220140x7c40c000,
220150xc02a0002,
220160x7c410000,
220170x7d29000c,
220180x30940001,
220190x30980006,
220200x309c0300,
220210x29dc0008,
220220x7c420000,
220230x7c424000,
220240x9540000f,
220250xc02e0004,
220260x05f02258,
220270x7f2f000c,
220280xcc310000,
220290xc8280004,
220300xccc12169,
220310xcd01216a,
220320xce81216b,
220330x0db40002,
220340xcc01216c,
220350x9740000e,
220360x0db40000,
220370x8000007d,
220380xc834000a,
220390x0db40002,
220400x97400009,
220410x0db40000,
220420xc02e0004,
220430x05f02258,
220440x7f2f000c,
220450xcc310000,
220460xc8280004,
220470x8000007d,
220480xc834000a,
220490x97400004,
220500x7e028000,
220510x8000007d,
220520xc834000a,
220530x0db40004,
220540x9740ff8c,
220550x00000000,
220560xce01216d,
220570xce41216e,
220580xc8280003,
220590xc834000a,
220600x9b400004,
220610x043c0005,
220620x8400026d,
220630xcc000062,
220640x0df40000,
220650x9740000b,
220660xc82c03e6,
220670xce81a2b7,
220680xc0300006,
220690x7ef34028,
220700xc0300020,
220710x7f6b8020,
220720x7fb3c029,
220730xcf81a2c4,
220740x80000003,
220750xcfc1a2d1,
220760x0df40001,
220770x9740000b,
220780xc82c03e7,
220790xce81a2bb,
220800xc0300006,
220810x7ef34028,
220820xc0300020,
220830x7f6b8020,
220840x7fb3c029,
220850xcf81a2c5,
220860x80000003,
220870xcfc1a2d2,
220880x0df40002,
220890x9740000b,
220900xc82c03e8,
220910xce81a2bf,
220920xc0300006,
220930x7ef34028,
220940xc0300020,
220950x7f6b8020,
220960x7fb3c029,
220970xcf81a2c6,
220980x80000003,
220990xcfc1a2d3,
221000xc82c03e9,
221010xce81a2c3,
221020xc0300006,
221030x7ef34028,
221040xc0300020,
221050x7f6b8020,
221060x7fb3c029,
221070xcf81a2c7,
221080x80000003,
221090xcfc1a2d4,
221100x80000003,
221110xcc400042,
221120x7c40c000,
221130x7c410000,
221140x2914001d,
221150x31540001,
221160x9940000c,
221170x31181000,
221180xc81c0011,
221190x95c00000,
221200xc81c0011,
221210xccc12100,
221220xcd012101,
221230xccc12102,
221240xcd012103,
221250x04180004,
221260x8000037e,
221270xcd81a2a4,
221280xc02a0004,
221290x95800008,
221300x36a821a3,
221310xcc290000,
221320xc8280004,
221330xc81c0011,
221340x0de40040,
221350x9640ffff,
221360xc81c0011,
221370xccc12170,
221380xcd012171,
221390xc8200012,
221400x96000000,
221410xc8200012,
221420x8000037e,
221430xcc000064,
221440x7c40c000,
221450x7c410000,
221460xcc000045,
221470xcc000048,
221480x40d40003,
221490xcd41225c,
221500xcd01a1fc,
221510xc01a0001,
221520x041ca1fd,
221530x7dd9c00c,
221540x7c420000,
221550x08cc0001,
221560x06240001,
221570x06280002,
221580xce1d0000,
221590xce5d0000,
221600x98c0fffa,
221610xce9d0000,
221620x7c408000,
221630xa0000000,
221640xcc800062,
221650x7c40c000,
221660x30d00001,
221670x28cc0001,
221680x7c414000,
221690x95000006,
221700x7c418000,
221710xcd41216d,
221720xcd81216e,
221730x800000f4,
221740xc81c0003,
221750xc0220004,
221760x7e16000c,
221770xcc210000,
221780xc81c0004,
221790x7c424000,
221800x98c00004,
221810x7c428000,
221820x80000003,
221830xcde50000,
221840xce412169,
221850xce81216a,
221860xcdc1216b,
221870x80000003,
221880xcc01216c,
221890x7c40c000,
221900x7c410000,
221910x7c414000,
221920x7c418000,
221930x7c41c000,
221940x28a40008,
221950x326400ff,
221960x0e68003c,
221970x9680000a,
221980x7c020000,
221990x7c420000,
222000x1e300003,
222010xcc00006a,
222020x9b000003,
222030x42200005,
222040x04200040,
222050x80000111,
222060x7c024000,
222070x7e024000,
222080x9a400000,
222090x0a640001,
222100x30ec0010,
222110x9ac0000a,
222120xcc000062,
222130xc02a0004,
222140xc82c0021,
222150x7e92800c,
222160xcc000041,
222170xcc290000,
222180xcec00021,
222190x80000121,
222200xc8300004,
222210xcd01216d,
222220xcd41216e,
222230xc8300003,
222240x7f1f000b,
222250x30f40007,
222260x27780001,
222270x9740002a,
222280x07b80126,
222290x9f800000,
222300x00000000,
222310x80000136,
222320x7f1b8004,
222330x8000013a,
222340x7f1b8005,
222350x8000013e,
222360x7f1b8002,
222370x80000142,
222380x7f1b8003,
222390x80000146,
222400x7f1b8007,
222410x8000014a,
222420x7f1b8006,
222430x8000014f,
222440x28a40008,
222450x9b800019,
222460x28a40008,
222470x8000015f,
222480x326400ff,
222490x9b800015,
222500x28a40008,
222510x8000015f,
222520x326400ff,
222530x9b800011,
222540x28a40008,
222550x8000015f,
222560x326400ff,
222570x9b80000d,
222580x28a40008,
222590x8000015f,
222600x326400ff,
222610x9b800009,
222620x28a40008,
222630x8000015f,
222640x326400ff,
222650x9b800005,
222660x28a40008,
222670x8000015f,
222680x326400ff,
222690x28a40008,
222700x326400ff,
222710x0e68003c,
222720x9a80feb2,
222730x28ec0008,
222740x7c434000,
222750x7c438000,
222760x7c43c000,
222770x96c00007,
222780xcc000062,
222790xcf412169,
222800xcf81216a,
222810xcfc1216b,
222820x80000003,
222830xcc01216c,
222840x80000003,
222850xcff50000,
222860xcc00006b,
222870x84000381,
222880x0e68003c,
222890x9a800004,
222900xc8280015,
222910x80000003,
222920xd040007f,
222930x9680ffab,
222940x7e024000,
222950x8400023b,
222960xc00e0002,
222970xcc000041,
222980x80000239,
222990xccc1304a,
223000x7c40c000,
223010x7c410000,
223020xc01e0001,
223030x29240012,
223040xc0220002,
223050x96400005,
223060xc0260004,
223070xc027fffb,
223080x7d25000b,
223090xc0260000,
223100x7dd2800b,
223110x7e12c00b,
223120x7d25000c,
223130x7c414000,
223140x7c418000,
223150xccc12169,
223160x9a80000a,
223170xcd01216a,
223180xcd41216b,
223190x96c0fe83,
223200xcd81216c,
223210xc8300018,
223220x97000000,
223230xc8300018,
223240x80000003,
223250xcc000018,
223260x84000381,
223270xcc00007f,
223280xc8140013,
223290xc8180014,
223300xcd41216b,
223310x96c0fe77,
223320xcd81216c,
223330x80000183,
223340xc8300018,
223350xc80c0008,
223360x98c00000,
223370xc80c0008,
223380x7c410000,
223390x95000002,
223400x00000000,
223410x7c414000,
223420xc8200009,
223430xcc400043,
223440xce01a1f4,
223450xcc400044,
223460xc00e8000,
223470x7c424000,
223480x7c428000,
223490x2aac001f,
223500x96c0fe64,
223510xc035f000,
223520xce4003e2,
223530x32780003,
223540x267c0008,
223550x7ff7c00b,
223560x7ffbc00c,
223570x2a780018,
223580xcfc003e3,
223590xcf8003e4,
223600x26b00002,
223610x7f3f0000,
223620xcf0003e5,
223630x8000031f,
223640x7c80c000,
223650x7c40c000,
223660x28d00008,
223670x3110000f,
223680x9500000f,
223690x25280001,
223700x06a801b4,
223710x9e800000,
223720x00000000,
223730x800001d5,
223740xc0120800,
223750x800001e3,
223760xc814000f,
223770x800001ea,
223780xc8140010,
223790x800001f1,
223800xccc1a2a4,
223810x800001fa,
223820xc8140011,
223830x30d0003f,
223840x0d280015,
223850x9a800012,
223860x0d28001e,
223870x9a80001e,
223880x0d280020,
223890x9a800023,
223900x0d24000f,
223910x0d280010,
223920x7e6a800c,
223930x9a800026,
223940x0d200004,
223950x0d240014,
223960x0d280028,
223970x7e62400c,
223980x7ea6800c,
223990x9a80002a,
224000xc8140011,
224010x80000003,
224020xccc1a2a4,
224030xc0120800,
224040x7c414000,
224050x7d0cc00c,
224060xc0120008,
224070x29580003,
224080x295c000c,
224090x7c420000,
224100x7dd1c00b,
224110x26200014,
224120x7e1e400c,
224130x7e4e800c,
224140xce81a2a4,
224150x80000003,
224160xcd81a1fe,
224170xc814000f,
224180x0410210e,
224190x95400000,
224200xc814000f,
224210xd0510000,
224220x80000003,
224230xccc1a2a4,
224240xc8140010,
224250x04102108,
224260x95400000,
224270xc8140010,
224280xd0510000,
224290x80000003,
224300xccc1a2a4,
224310xccc1a2a4,
224320x04100001,
224330xcd000019,
224340x84000381,
224350xcc00007f,
224360xc8100019,
224370x99000000,
224380xc8100019,
224390x80000004,
224400x7c408000,
224410x04102100,
224420x95400000,
224430xc8140011,
224440xd0510000,
224450x8000037e,
224460xccc1a2a4,
224470x7c40c000,
224480xcc40000d,
224490x94c0fe01,
224500xcc40000e,
224510x7c410000,
224520x95000005,
224530x08cc0001,
224540xc8140005,
224550x99400014,
224560x00000000,
224570x98c0fffb,
224580x7c410000,
224590x80000004,
224600x7d008000,
224610xc8140005,
224620x7c40c000,
224630x9940000c,
224640xc818000c,
224650x7c410000,
224660x9580fdf0,
224670xc820000e,
224680xc81c000d,
224690x66200020,
224700x7e1e002c,
224710x25240002,
224720x7e624020,
224730x80000003,
224740xcce60000,
224750x7c410000,
224760xcc00006c,
224770xcc00006d,
224780xc818001f,
224790xc81c001e,
224800x65980020,
224810x7dd9c02c,
224820x7cd4c00c,
224830xccde0000,
224840x45dc0004,
224850xc8280017,
224860x9680000f,
224870xc00e0001,
224880x28680008,
224890x2aac0016,
224900x32a800ff,
224910x0eb00049,
224920x7f2f000b,
224930x97000006,
224940x00000000,
224950xc8140005,
224960x7c40c000,
224970x80000223,
224980x7c410000,
224990x80000226,
225000xd040007f,
225010x8400023b,
225020xcc000041,
225030xccc1304a,
225040x94000000,
225050xc83c001a,
225060x043c0005,
225070xcfc1a2a4,
225080xc0361f90,
225090xc0387fff,
225100x7c03c010,
225110x7f7b400c,
225120xcf41217c,
225130xcfc1217d,
225140xcc01217e,
225150xc03a0004,
225160x0434217f,
225170x7f7b400c,
225180xcc350000,
225190xc83c0004,
225200x2bfc001f,
225210x04380020,
225220x97c00005,
225230xcc000062,
225240x9b800000,
225250x0bb80001,
225260x80000247,
225270xcc000071,
225280xcc01a1f4,
225290x04380016,
225300xc0360002,
225310xcf81a2a4,
225320x88000000,
225330xcf412010,
225340x7c40c000,
225350x28d0001c,
225360x95000005,
225370x04d40001,
225380xcd400065,
225390x80000003,
225400xcd400068,
225410x09540002,
225420x80000003,
225430xcd400066,
225440x8400026c,
225450xc81803ea,
225460x7c40c000,
225470x9980fd9f,
225480xc8140016,
225490x08d00001,
225500x9940002b,
225510xcd000068,
225520x7c408000,
225530xa0000000,
225540xcc800062,
225550x043c0005,
225560xcfc1a2a4,
225570xcc01a1f4,
225580x84000381,
225590xcc000046,
225600x88000000,
225610xcc00007f,
225620x8400027e,
225630xc81803ea,
225640x7c40c000,
225650x9980fd8d,
225660xc8140016,
225670x08d00001,
225680x99400019,
225690xcd000068,
225700x7c408000,
225710xa0000000,
225720xcc800062,
225730x043c0022,
225740xcfc1a2a4,
225750x84000381,
225760xcc000047,
225770x88000000,
225780xcc00007f,
225790xc8100016,
225800x9900000d,
225810xcc400067,
225820x80000004,
225830x7c408000,
225840xc81803ea,
225850x9980fd79,
225860x7c40c000,
225870x94c00003,
225880xc8100016,
225890x99000004,
225900xccc00068,
225910x80000004,
225920x7c408000,
225930x8400023b,
225940xc0148000,
225950xcc000041,
225960xcd41304a,
225970xc0148000,
225980x99000000,
225990xc8100016,
226000x80000004,
226010x7c408000,
226020xc0120001,
226030x7c51400c,
226040x80000003,
226050xd0550000,
226060x7c40c000,
226070x7c410000,
226080x7c414000,
226090x7c418000,
226100x291c001f,
226110xccc0004a,
226120xcd00004b,
226130x95c00003,
226140xc01c8000,
226150xcdc12010,
226160xdd830000,
226170x055c2000,
226180xcc000062,
226190x80000003,
226200xd81f4100,
226210x7c40c000,
226220x7c410000,
226230x7c414000,
226240x7c418000,
226250xccc0004c,
226260xcd00004d,
226270xdd830000,
226280x055ca000,
226290x80000003,
226300xd81f4100,
226310x7c40c000,
226320x7c410000,
226330x7c414000,
226340x7c418000,
226350xccc0004e,
226360xcd00004f,
226370xdd830000,
226380x055cc000,
226390x80000003,
226400xd81f4100,
226410x7c40c000,
226420x7c410000,
226430x7c414000,
226440x7c418000,
226450xccc00050,
226460xcd000051,
226470xdd830000,
226480x055cf8e0,
226490x80000003,
226500xd81f4100,
226510x7c40c000,
226520x7c410000,
226530x7c414000,
226540x7c418000,
226550xccc00052,
226560xcd000053,
226570xdd830000,
226580x055cf880,
226590x80000003,
226600xd81f4100,
226610x7c40c000,
226620x7c410000,
226630x7c414000,
226640x7c418000,
226650xccc00054,
226660xcd000055,
226670xdd830000,
226680x055ce000,
226690x80000003,
226700xd81f4100,
226710x7c40c000,
226720x7c410000,
226730x7c414000,
226740x7c418000,
226750xccc00056,
226760xcd000057,
226770xdd830000,
226780x055cf000,
226790x80000003,
226800xd81f4100,
226810x7c40c000,
226820x7c410000,
226830x7c414000,
226840x7c418000,
226850xccc00058,
226860xcd000059,
226870xdd830000,
226880x055cf3fc,
226890x80000003,
226900xd81f4100,
226910xd0432000,
226920x7c408000,
226930xa0000000,
226940xcc800062,
226950xd043a000,
226960x7c408000,
226970xa0000000,
226980xcc800062,
226990xd043c000,
227000x7c408000,
227010xa0000000,
227020xcc800062,
227030xd043f8e0,
227040x7c408000,
227050xa0000000,
227060xcc800062,
227070xd043f880,
227080x7c408000,
227090xa0000000,
227100xcc800062,
227110xd043e000,
227120x7c408000,
227130xa0000000,
227140xcc800062,
227150xd043f000,
227160x7c408000,
227170xa0000000,
227180xcc800062,
227190xd043f3fc,
227200x7c408000,
227210xa0000000,
227220xcc800062,
227230xc81403e0,
227240xcc430000,
227250xcc430000,
227260xcc430000,
227270x7d45c000,
227280xcdc30000,
227290xd0430000,
227300x7c408000,
227310xa0000000,
227320xcc800062,
227330x7c40c000,
227340xc81003e2,
227350xc81403e5,
227360xc81803e3,
227370xc81c03e4,
227380xcd812169,
227390xcdc1216a,
227400xccc1216b,
227410xcc01216c,
227420x04200004,
227430x7da18000,
227440x7d964002,
227450x9640fcd9,
227460xcd8003e3,
227470x31280003,
227480xc02df000,
227490x25180008,
227500x7dad800b,
227510x7da9800c,
227520x80000003,
227530xcd8003e3,
227540x308cffff,
227550xd04d0000,
227560x7c408000,
227570xa0000000,
227580xcc800062,
227590xc8140020,
227600x15580002,
227610x9580ffff,
227620xc8140020,
227630xcc00006e,
227640xcc412180,
227650x7c40c000,
227660xccc1218d,
227670xcc412181,
227680x28d0001f,
227690x34588000,
227700xcd81218c,
227710x9500fcbf,
227720xcc412182,
227730xc8140020,
227740x9940ffff,
227750xc8140020,
227760x80000004,
227770x7c408000,
227780x7c40c000,
227790x28d00018,
227800x31100001,
227810xc0160080,
227820x95000003,
227830xc02a0004,
227840x7cd4c00c,
227850xccc1217c,
227860xcc41217d,
227870xcc41217e,
227880x7c418000,
227890x1db00003,
227900x36a0217f,
227910x9b000003,
227920x419c0005,
227930x041c0040,
227940x99c00000,
227950x09dc0001,
227960xcc210000,
227970xc8240004,
227980x2a6c001f,
227990x419c0005,
228000x9ac0fffa,
228010xcc800062,
228020x80000004,
228030x7c408000,
228040x7c40c000,
228050x04d403e6,
228060x80000003,
228070xcc540000,
228080x8000037e,
228090xcc4003ea,
228100xc01c8000,
228110x044ca000,
228120xcdc12010,
228130x7c410000,
228140xc8140009,
228150x04180000,
228160x041c0008,
228170xcd800071,
228180x09dc0001,
228190x05980001,
228200xcd0d0000,
228210x99c0fffc,
228220xcc800062,
228230x8000037e,
228240xcd400071,
228250xc00e0100,
228260xcc000041,
228270xccc1304a,
228280xc83c007f,
228290xcc00007f,
228300x80000003,
228310xcc00007f,
228320xcc00007f,
228330x88000000,
228340xcc00007f,
228350x00000000,
228360x00000000,
228370x00000000,
228380x00000000,
228390x00000000,
228400x00000000,
228410x00000000,
228420x00000000,
228430x00000000,
228440x00000000,
228450x00000000,
228460x00000000,
228470x00000000,
228480x00000000,
228490x00000000,
228500x00000000,
228510x00000000,
228520x00000000,
228530x00000000,
228540x00000000,
228550x00000000,
228560x00000000,
228570x00000000,
228580x00000000,
228590x00000000,
228600x00000000,
228610x00000000,
228620x00000000,
228630x00000000,
228640x00000000,
228650x00000000,
228660x00000000,
228670x00000000,
228680x00000000,
228690x00000000,
228700x00000000,
228710x00000000,
228720x00000000,
228730x00000000,
228740x00000000,
228750x00000000,
228760x00000000,
228770x00000000,
228780x00000000,
228790x00000000,
228800x00000000,
228810x00000000,
228820x00000000,
228830x00000000,
228840x00000000,
228850x00000000,
228860x00000000,
228870x00000000,
228880x00000000,
228890x00000000,
228900x00000000,
228910x00000000,
228920x00000000,
228930x00000000,
228940x00000000,
228950x00000000,
228960x00000000,
228970x00000000,
228980x00000000,
228990x00000000,
229000x00000000,
229010x00000000,
229020x00000000,
229030x00000000,
229040x00000000,
229050x00000000,
229060x00000000,
229070x00000000,
229080x00000000,
229090x00000000,
229100x00000000,
229110x00000000,
229120x00000000,
229130x00000000,
229140x00000000,
229150x00000000,
229160x00000000,
229170x00000000,
229180x00000000,
229190x00000000,
229200x00000000,
229210x00000000,
229220x00000000,
229230x00000000,
229240x00000000,
229250x00000000,
229260x00000000,
229270x00000000,
229280x00000000,
229290x00000000,
229300x00000000,
229310x00000000,
229320x00000000,
229330x00000000,
229340x00000000,
229350x00000000,
229360x00000000,
229370x00000000,
229380x00000000,
229390x00000000,
229400x00000000,
229410x00000000,
229420x00000000,
229430x00000000,
229440x00000000,
229450x00000000,
229460x00000000,
229470x00000000,
229480x00000000,
229490x00000000,
229500x00000000,
229510x00000000,
229520x00000000,
229530x00000000,
229540x00000000,
229550x00000000,
229560x00000000,
229570x00000000,
229580x00000000,
229590x00000000,
229600x00000000,
229610x00000000,
229620x00000000,
229630x00000000,
229640x00000000,
229650x00000000,
229660x00000000,
229670x00000000,
229680x00000000,
229690x00000000,
229700x00000000,
229710x00000000,
229720x00000000,
229730x00000000,
229740x00000000,
229750x00000000,
229760x00000000,
229770x00000000,
229780x00000000,
229790x00000000,
229800x00000000,
229810x00000000,
229820x00000000,
229830x00000000,
229840x00000000,
229850x00000000,
229860x00000000,
229870x00000000,
229880x00000000,
229890x00000000,
229900x00000000,
229910x00000000,
229920x00000000,
229930x00000000,
229940x00000000,
229950x00000000,
229960x00000000,
229970x00000000,
229980x00000000,
229990x00000000,
230000x00000000,
230010x00000000,
230020x00000000,
230030x00000000,
230040x00000000,
230050x00000000,
230060x00000000,
230070x00000000,
230080x00000000,
230090x00000000,
230100x00000000,
230110x00000000,
230120x00000000,
230130x00000000,
230140x00000000,
230150x00000000,
230160x00000000,
230170x00000000,
230180x00000000,
230190x00000000,
230200x00000000,
230210x00000000,
230220x00000000,
230230x00000000,
230240x00000000,
230250x00000000,
230260x00000000,
230270x00000000,
230280x00000000,
230290x00000000,
230300x00000000,
230310x00000000,
230320x00000000,
230330x00000000,
230340x00000000,
230350x00000000,
230360x00000000,
230370x00000000,
230380x00000000,
230390x00000000,
230400x00000000,
230410x00000000,
230420x00000000,
230430x00000000,
230440x00000000,
230450x00000000,
230460x00000000,
230470x00000000,
230480x00000000,
230490x00000000,
230500x00000000,
230510x00000000,
230520x00000000,
230530x00000000,
230540x00000000,
230550x00000000,
230560x00000000,
230570x00000000,
230580x00000000,
230590x00000000,
230600x00000000,
230610x00000000,
230620x00000000,
230630x00000000,
230640x00000000,
230650x00000000,
230660x00000000,
230670x00000000,
230680x00000000,
230690x00000000,
230700x00000000,
230710x00000000,
230720x00000000,
230730x00000000,
230740x00000000,
230750x00000000,
230760x00000000,
230770x00000000,
230780x00000000,
230790x00000000,
230800x00000000,
230810x00000000,
230820x00000000,
230830x00000000,
230840x00000000,
230850x00000000,
230860x00000000,
230870x00000000,
230880x00000000,
230890x00000000,
230900x00000000,
230910x00000000,
230920x00000000,
230930x00000000,
230940x00000000,
230950x00000000,
230960x00000000,
230970x00000000,
230980x00000000,
230990x00000000,
231000x00000000,
231010x00000000,
231020x00000000,
231030x00000000,
231040x00000000,
231050x00000000,
231060x00000000,
231070x00000000,
231080x00000000,
231090x00000000,
231100x00000000,
231110x00000000,
231120x00000000,
231130x00000000,
231140x00000000,
231150x00000000,
231160x00000000,
231170x00000000,
231180x00000000,
231190x00000000,
231200x00000000,
231210x00000000,
231220x00000000,
231230x00000000,
231240x00000000,
231250x00000000,
231260x00000000,
231270x00000000,
231280x00000000,
231290x00000000,
231300x00000000,
231310x00000000,
231320x00000000,
231330x00000000,
231340x00000000,
231350x00000000,
231360x00000000,
231370x00000000,
231380x00000000,
231390x00000000,
231400x00000000,
231410x00000000,
231420x00000000,
231430x00000000,
231440x00000000,
231450x00000000,
231460x00000000,
231470x00000000,
231480x00000000,
231490x00000000,
231500x00000000,
231510x00000000,
231520x00000000,
231530x00000000,
231540x00000000,
231550x00000000,
231560x00000000,
231570x00000000,
231580x00000000,
231590x00000000,
231600x00000000,
231610x00000000,
231620x00000000,
231630x00000000,
231640x00000000,
231650x00000000,
231660x00000000,
231670x00000000,
231680x00000000,
231690x00000000,
231700x00000000,
231710x00000000,
231720x00000000,
231730x00000000,
231740x00000000,
231750x00000000,
231760x00000000,
231770x00000000,
231780x00000000,
231790x00000000,
231800x00000000,
231810x00000000,
231820x00000000,
231830x00000000,
231840x00000000,
231850x00000000,
231860x00000000,
231870x00000000,
231880x00000000,
231890x00000000,
231900x00000000,
231910x00000000,
231920x00000000,
231930x00000000,
231940x00000000,
231950x00000000,
231960x00000000,
231970x00000000,
231980x00000000,
231990x00000000,
232000x00000000,
232010x00000000,
232020x00000000,
232030x00000000,
232040x00000000,
232050x00000000,
232060x00000000,
232070x00000000,
232080x00000000,
232090x00000000,
232100x00000000,
232110x00000000,
232120x00000000,
232130x00000000,
232140x00000000,
232150x00010333,
232160x00100006,
232170x00170008,
232180x0021000a,
232190x0027002a,
232200x00280025,
232210x0029002b,
232220x002a0028,
232230x002b002b,
232240x002d003a,
232250x002e0041,
232260x002f004c,
232270x0034004e,
232280x00360032,
232290x003900b1,
232300x003a00d1,
232310x003b00e6,
232320x003c00fe,
232330x003d016d,
232340x003f00af,
232350x00410338,
232360x0043034b,
232370x00440190,
232380x004500fe,
232390x004601ae,
232400x004701ae,
232410x00480200,
232420x0049020e,
232430x004a0257,
232440x004b0284,
232450x00520261,
232460x00530273,
232470x00540289,
232480x0057029b,
232490x0060029f,
232500x006102ae,
232510x006202b8,
232520x006302c2,
232530x006402cc,
232540x006502d6,
232550x006602e0,
232560x006702ea,
232570x006802f4,
232580x006902f8,
232590x006a02fc,
232600x006b0300,
232610x006c0304,
232620x006d0308,
232630x006e030c,
232640x006f0310,
232650x00700314,
232660x00720365,
232670x0074036b,
232680x00790369,
232690x007c031e,
232700x000f037a,
232710x000f037a,
232720x000f037a,
232730x000f037a,
232740x000f037a,
232750x000f037a,
232760x000f037a,
232770x000f037a,
232780x000f037a,
232790x000f037a,
232800x000f037a,
232810x000f037a,
232820x000f037a,
232830x000f037a,
232840x000f037a,
232850x000f037a,
232860x000f037a,
232870x000f037a,
232880x000f037a,
232890x000f037a,
232900x000f037a,
232910x000f037a,
232920x000f037a,
232930x000f037a,
232940x000f037a,
23295};
23296
23297#endif
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 92965dbb3c1..77a7a4d8465 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -43,6 +43,78 @@
43static int radeon_do_cleanup_cp(struct drm_device * dev); 43static int radeon_do_cleanup_cp(struct drm_device * dev);
44static void radeon_do_cp_start(drm_radeon_private_t * dev_priv); 44static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
45 45
46u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off)
47{
48 u32 val;
49
50 if (dev_priv->flags & RADEON_IS_AGP) {
51 val = DRM_READ32(dev_priv->ring_rptr, off);
52 } else {
53 val = *(((volatile u32 *)
54 dev_priv->ring_rptr->handle) +
55 (off / sizeof(u32)));
56 val = le32_to_cpu(val);
57 }
58 return val;
59}
60
61u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv)
62{
63 if (dev_priv->writeback_works)
64 return radeon_read_ring_rptr(dev_priv, 0);
65 else {
66 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
67 return RADEON_READ(R600_CP_RB_RPTR);
68 else
69 return RADEON_READ(RADEON_CP_RB_RPTR);
70 }
71}
72
73void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u32 off, u32 val)
74{
75 if (dev_priv->flags & RADEON_IS_AGP)
76 DRM_WRITE32(dev_priv->ring_rptr, off, val);
77 else
78 *(((volatile u32 *) dev_priv->ring_rptr->handle) +
79 (off / sizeof(u32))) = cpu_to_le32(val);
80}
81
82void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val)
83{
84 radeon_write_ring_rptr(dev_priv, 0, val);
85}
86
87u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index)
88{
89 if (dev_priv->writeback_works) {
90 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
91 return radeon_read_ring_rptr(dev_priv,
92 R600_SCRATCHOFF(index));
93 else
94 return radeon_read_ring_rptr(dev_priv,
95 RADEON_SCRATCHOFF(index));
96 } else {
97 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
98 return RADEON_READ(R600_SCRATCH_REG0 + 4*index);
99 else
100 return RADEON_READ(RADEON_SCRATCH_REG0 + 4*index);
101 }
102}
103
104u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr)
105{
106 u32 ret;
107
108 if (addr < 0x10000)
109 ret = DRM_READ32(dev_priv->mmio, addr);
110 else {
111 DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, addr);
112 ret = DRM_READ32(dev_priv->mmio, RADEON_MM_DATA);
113 }
114
115 return ret;
116}
117
46static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) 118static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
47{ 119{
48 u32 ret; 120 u32 ret;
@@ -70,11 +142,22 @@ static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
70 return ret; 142 return ret;
71} 143}
72 144
145static u32 RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
146{
147 u32 ret;
148 RADEON_WRITE(RS600_MC_INDEX, ((addr & RS600_MC_ADDR_MASK) |
149 RS600_MC_IND_CITF_ARB0));
150 ret = RADEON_READ(RS600_MC_DATA);
151 return ret;
152}
153
73static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) 154static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
74{ 155{
75 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || 156 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
76 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) 157 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
77 return RS690_READ_MCIND(dev_priv, addr); 158 return RS690_READ_MCIND(dev_priv, addr);
159 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
160 return RS600_READ_MCIND(dev_priv, addr);
78 else 161 else
79 return RS480_READ_MCIND(dev_priv, addr); 162 return RS480_READ_MCIND(dev_priv, addr);
80} 163}
@@ -82,11 +165,17 @@ static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
82u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv) 165u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
83{ 166{
84 167
85 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) 168 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
169 return RADEON_READ(R700_MC_VM_FB_LOCATION);
170 else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
171 return RADEON_READ(R600_MC_VM_FB_LOCATION);
172 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
86 return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION); 173 return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
87 else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || 174 else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
88 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) 175 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
89 return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION); 176 return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
177 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
178 return RS600_READ_MCIND(dev_priv, RS600_MC_FB_LOCATION);
90 else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) 179 else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
91 return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION); 180 return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
92 else 181 else
@@ -95,42 +184,66 @@ u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
95 184
96static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) 185static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
97{ 186{
98 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) 187 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
188 RADEON_WRITE(R700_MC_VM_FB_LOCATION, fb_loc);
189 else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
190 RADEON_WRITE(R600_MC_VM_FB_LOCATION, fb_loc);
191 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
99 R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc); 192 R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
100 else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || 193 else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
101 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) 194 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
102 RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc); 195 RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
196 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
197 RS600_WRITE_MCIND(RS600_MC_FB_LOCATION, fb_loc);
103 else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) 198 else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
104 R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc); 199 R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
105 else 200 else
106 RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc); 201 RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc);
107} 202}
108 203
109static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc) 204void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
110{ 205{
111 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) 206 /*R6xx/R7xx: AGP_TOP and BOT are actually 18 bits each */
207 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
208 RADEON_WRITE(R700_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */
209 RADEON_WRITE(R700_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff);
210 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
211 RADEON_WRITE(R600_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */
212 RADEON_WRITE(R600_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff);
213 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
112 R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc); 214 R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
113 else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || 215 else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
114 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) 216 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
115 RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc); 217 RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
218 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
219 RS600_WRITE_MCIND(RS600_MC_AGP_LOCATION, agp_loc);
116 else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) 220 else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
117 R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc); 221 R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
118 else 222 else
119 RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc); 223 RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);
120} 224}
121 225
122static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) 226void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
123{ 227{
124 u32 agp_base_hi = upper_32_bits(agp_base); 228 u32 agp_base_hi = upper_32_bits(agp_base);
125 u32 agp_base_lo = agp_base & 0xffffffff; 229 u32 agp_base_lo = agp_base & 0xffffffff;
126 230 u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff;
127 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) { 231
232 /* R6xx/R7xx must be aligned to a 4MB boundry */
233 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
234 RADEON_WRITE(R700_MC_VM_AGP_BASE, r6xx_agp_base);
235 else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
236 RADEON_WRITE(R600_MC_VM_AGP_BASE, r6xx_agp_base);
237 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
128 R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo); 238 R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
129 R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi); 239 R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
130 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || 240 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
131 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { 241 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
132 RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo); 242 RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
133 RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi); 243 RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
244 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
245 RS600_WRITE_MCIND(RS600_AGP_BASE, agp_base_lo);
246 RS600_WRITE_MCIND(RS600_AGP_BASE_2, agp_base_hi);
134 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) { 247 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
135 R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo); 248 R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);
136 R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi); 249 R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);
@@ -145,6 +258,25 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
145 } 258 }
146} 259}
147 260
261void radeon_enable_bm(struct drm_radeon_private *dev_priv)
262{
263 u32 tmp;
264 /* Turn on bus mastering */
265 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
266 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
267 /* rs600/rs690/rs740 */
268 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
269 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
270 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
271 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
272 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
273 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
274 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
275 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
276 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
277 } /* PCIE cards appears to not need this */
278}
279
148static int RADEON_READ_PLL(struct drm_device * dev, int addr) 280static int RADEON_READ_PLL(struct drm_device * dev, int addr)
149{ 281{
150 drm_radeon_private_t *dev_priv = dev->dev_private; 282 drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -302,7 +434,7 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
302 434
303 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { 435 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
304 RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); 436 RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
305 RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1)); 437 RADEON_WRITE(R300_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
306 } 438 }
307 RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config); 439 RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config);
308 radeon_do_wait_for_idle(dev_priv); 440 radeon_do_wait_for_idle(dev_priv);
@@ -382,6 +514,14 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
382 RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, 514 RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
383 RS690_cp_microcode[i][0]); 515 RS690_cp_microcode[i][0]);
384 } 516 }
517 } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
518 DRM_INFO("Loading RS600 Microcode\n");
519 for (i = 0; i < 256; i++) {
520 RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
521 RS600_cp_microcode[i][1]);
522 RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
523 RS600_cp_microcode[i][0]);
524 }
385 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) || 525 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
386 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) || 526 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
387 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) || 527 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
@@ -562,7 +702,6 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
562{ 702{
563 struct drm_radeon_master_private *master_priv; 703 struct drm_radeon_master_private *master_priv;
564 u32 ring_start, cur_read_ptr; 704 u32 ring_start, cur_read_ptr;
565 u32 tmp;
566 705
567 /* Initialize the memory controller. With new memory map, the fb location 706 /* Initialize the memory controller. With new memory map, the fb location
568 * is not changed, it should have been properly initialized already. Part 707 * is not changed, it should have been properly initialized already. Part
@@ -611,17 +750,10 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
611 } else 750 } else
612#endif 751#endif
613 { 752 {
614 struct drm_sg_mem *entry = dev->sg; 753 RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR,
615 unsigned long tmp_ofs, page_ofs; 754 dev_priv->ring_rptr->offset
616 755 - ((unsigned long) dev->sg->virtual)
617 tmp_ofs = dev_priv->ring_rptr->offset - 756 + dev_priv->gart_vm_start);
618 (unsigned long)dev->sg->virtual;
619 page_ofs = tmp_ofs >> PAGE_SHIFT;
620
621 RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]);
622 DRM_DEBUG("ring rptr: offset=0x%08lx handle=0x%08lx\n",
623 (unsigned long)entry->busaddr[page_ofs],
624 entry->handle + tmp_ofs);
625 } 757 }
626 758
627 /* Set ring buffer size */ 759 /* Set ring buffer size */
@@ -649,34 +781,17 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
649 RADEON_WRITE(RADEON_SCRATCH_ADDR, RADEON_READ(RADEON_CP_RB_RPTR_ADDR) 781 RADEON_WRITE(RADEON_SCRATCH_ADDR, RADEON_READ(RADEON_CP_RB_RPTR_ADDR)
650 + RADEON_SCRATCH_REG_OFFSET); 782 + RADEON_SCRATCH_REG_OFFSET);
651 783
652 dev_priv->scratch = ((__volatile__ u32 *)
653 dev_priv->ring_rptr->handle +
654 (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
655
656 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); 784 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
657 785
658 /* Turn on bus mastering */ 786 radeon_enable_bm(dev_priv);
659 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
660 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
661 /* rs600/rs690/rs740 */
662 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
663 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
664 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
665 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
666 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
667 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
668 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
669 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
670 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
671 } /* PCIE cards appears to not need this */
672 787
673 dev_priv->scratch[0] = 0; 788 radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(0), 0);
674 RADEON_WRITE(RADEON_LAST_FRAME_REG, 0); 789 RADEON_WRITE(RADEON_LAST_FRAME_REG, 0);
675 790
676 dev_priv->scratch[1] = 0; 791 radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0);
677 RADEON_WRITE(RADEON_LAST_DISPATCH_REG, 0); 792 RADEON_WRITE(RADEON_LAST_DISPATCH_REG, 0);
678 793
679 dev_priv->scratch[2] = 0; 794 radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(2), 0);
680 RADEON_WRITE(RADEON_LAST_CLEAR_REG, 0); 795 RADEON_WRITE(RADEON_LAST_CLEAR_REG, 0);
681 796
682 /* reset sarea copies of these */ 797 /* reset sarea copies of these */
@@ -708,12 +823,15 @@ static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
708 /* Writeback doesn't seem to work everywhere, test it here and possibly 823 /* Writeback doesn't seem to work everywhere, test it here and possibly
709 * enable it if it appears to work 824 * enable it if it appears to work
710 */ 825 */
711 DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0); 826 radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0);
827
712 RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef); 828 RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef);
713 829
714 for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) { 830 for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
715 if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) == 831 u32 val;
716 0xdeadbeef) 832
833 val = radeon_read_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1));
834 if (val == 0xdeadbeef)
717 break; 835 break;
718 DRM_UDELAY(1); 836 DRM_UDELAY(1);
719 } 837 }
@@ -809,6 +927,82 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
809 } 927 }
810} 928}
811 929
930/* Enable or disable IGP GART on the chip */
931static void rs600_set_igpgart(drm_radeon_private_t *dev_priv, int on)
932{
933 u32 temp;
934 int i;
935
936 if (on) {
937 DRM_DEBUG("programming igp gart %08X %08lX %08X\n",
938 dev_priv->gart_vm_start,
939 (long)dev_priv->gart_info.bus_addr,
940 dev_priv->gart_size);
941
942 IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (RS600_EFFECTIVE_L2_CACHE_SIZE(6) |
943 RS600_EFFECTIVE_L2_QUEUE_SIZE(6)));
944
945 for (i = 0; i < 19; i++)
946 IGP_WRITE_MCIND(RS600_MC_PT0_CLIENT0_CNTL + i,
947 (RS600_ENABLE_TRANSLATION_MODE_OVERRIDE |
948 RS600_SYSTEM_ACCESS_MODE_IN_SYS |
949 RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH |
950 RS600_EFFECTIVE_L1_CACHE_SIZE(3) |
951 RS600_ENABLE_FRAGMENT_PROCESSING |
952 RS600_EFFECTIVE_L1_QUEUE_SIZE(3)));
953
954 IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL, (RS600_ENABLE_PAGE_TABLE |
955 RS600_PAGE_TABLE_TYPE_FLAT));
956
957 /* disable all other contexts */
958 for (i = 1; i < 8; i++)
959 IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL + i, 0);
960
961 /* setup the page table aperture */
962 IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,
963 dev_priv->gart_info.bus_addr);
964 IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR,
965 dev_priv->gart_vm_start);
966 IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR,
967 (dev_priv->gart_vm_start + dev_priv->gart_size - 1));
968 IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);
969
970 /* setup the system aperture */
971 IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR,
972 dev_priv->gart_vm_start);
973 IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR,
974 (dev_priv->gart_vm_start + dev_priv->gart_size - 1));
975
976 /* enable page tables */
977 temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
978 IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (temp | RS600_ENABLE_PT));
979
980 temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1);
981 IGP_WRITE_MCIND(RS600_MC_CNTL1, (temp | RS600_ENABLE_PAGE_TABLES));
982
983 /* invalidate the cache */
984 temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
985
986 temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE);
987 IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
988 temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
989
990 temp |= RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE;
991 IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
992 temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
993
994 temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE);
995 IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
996 temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
997
998 } else {
999 IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, 0);
1000 temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1);
1001 temp &= ~RS600_ENABLE_PAGE_TABLES;
1002 IGP_WRITE_MCIND(RS600_MC_CNTL1, temp);
1003 }
1004}
1005
812static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on) 1006static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on)
813{ 1007{
814 u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL); 1008 u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL);
@@ -850,6 +1044,11 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
850 return; 1044 return;
851 } 1045 }
852 1046
1047 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
1048 rs600_set_igpgart(dev_priv, on);
1049 return;
1050 }
1051
853 if (dev_priv->flags & RADEON_IS_PCIE) { 1052 if (dev_priv->flags & RADEON_IS_PCIE) {
854 radeon_set_pciegart(dev_priv, on); 1053 radeon_set_pciegart(dev_priv, on);
855 return; 1054 return;
@@ -881,6 +1080,46 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
881 } 1080 }
882} 1081}
883 1082
1083static int radeon_setup_pcigart_surface(drm_radeon_private_t *dev_priv)
1084{
1085 struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
1086 struct radeon_virt_surface *vp;
1087 int i;
1088
1089 for (i = 0; i < RADEON_MAX_SURFACES * 2; i++) {
1090 if (!dev_priv->virt_surfaces[i].file_priv ||
1091 dev_priv->virt_surfaces[i].file_priv == PCIGART_FILE_PRIV)
1092 break;
1093 }
1094 if (i >= 2 * RADEON_MAX_SURFACES)
1095 return -ENOMEM;
1096 vp = &dev_priv->virt_surfaces[i];
1097
1098 for (i = 0; i < RADEON_MAX_SURFACES; i++) {
1099 struct radeon_surface *sp = &dev_priv->surfaces[i];
1100 if (sp->refcount)
1101 continue;
1102
1103 vp->surface_index = i;
1104 vp->lower = gart_info->bus_addr;
1105 vp->upper = vp->lower + gart_info->table_size;
1106 vp->flags = 0;
1107 vp->file_priv = PCIGART_FILE_PRIV;
1108
1109 sp->refcount = 1;
1110 sp->lower = vp->lower;
1111 sp->upper = vp->upper;
1112 sp->flags = 0;
1113
1114 RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, sp->flags);
1115 RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16 * i, sp->lower);
1116 RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16 * i, sp->upper);
1117 return 0;
1118 }
1119
1120 return -ENOMEM;
1121}
1122
884static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init, 1123static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
885 struct drm_file *file_priv) 1124 struct drm_file *file_priv)
886{ 1125{
@@ -1062,11 +1301,12 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
1062 } else 1301 } else
1063#endif 1302#endif
1064 { 1303 {
1065 dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset; 1304 dev_priv->cp_ring->handle =
1305 (void *)(unsigned long)dev_priv->cp_ring->offset;
1066 dev_priv->ring_rptr->handle = 1306 dev_priv->ring_rptr->handle =
1067 (void *)dev_priv->ring_rptr->offset; 1307 (void *)(unsigned long)dev_priv->ring_rptr->offset;
1068 dev->agp_buffer_map->handle = 1308 dev->agp_buffer_map->handle =
1069 (void *)dev->agp_buffer_map->offset; 1309 (void *)(unsigned long)dev->agp_buffer_map->offset;
1070 1310
1071 DRM_DEBUG("dev_priv->cp_ring->handle %p\n", 1311 DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
1072 dev_priv->cp_ring->handle); 1312 dev_priv->cp_ring->handle);
@@ -1173,11 +1413,14 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
1173 } else 1413 } else
1174#endif 1414#endif
1175 { 1415 {
1416 u32 sctrl;
1417 int ret;
1418
1176 dev_priv->gart_info.table_mask = DMA_BIT_MASK(32); 1419 dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
1177 /* if we have an offset set from userspace */ 1420 /* if we have an offset set from userspace */
1178 if (dev_priv->pcigart_offset_set) { 1421 if (dev_priv->pcigart_offset_set) {
1179 dev_priv->gart_info.bus_addr = 1422 dev_priv->gart_info.bus_addr =
1180 dev_priv->pcigart_offset + dev_priv->fb_location; 1423 (resource_size_t)dev_priv->pcigart_offset + dev_priv->fb_location;
1181 dev_priv->gart_info.mapping.offset = 1424 dev_priv->gart_info.mapping.offset =
1182 dev_priv->pcigart_offset + dev_priv->fb_aper_offset; 1425 dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
1183 dev_priv->gart_info.mapping.size = 1426 dev_priv->gart_info.mapping.size =
@@ -1214,12 +1457,31 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
1214 } 1457 }
1215 } 1458 }
1216 1459
1217 if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) { 1460 sctrl = RADEON_READ(RADEON_SURFACE_CNTL);
1461 RADEON_WRITE(RADEON_SURFACE_CNTL, 0);
1462 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
1463 ret = r600_page_table_init(dev);
1464 else
1465 ret = drm_ati_pcigart_init(dev, &dev_priv->gart_info);
1466 RADEON_WRITE(RADEON_SURFACE_CNTL, sctrl);
1467
1468 if (!ret) {
1218 DRM_ERROR("failed to init PCI GART!\n"); 1469 DRM_ERROR("failed to init PCI GART!\n");
1219 radeon_do_cleanup_cp(dev); 1470 radeon_do_cleanup_cp(dev);
1220 return -ENOMEM; 1471 return -ENOMEM;
1221 } 1472 }
1222 1473
1474 ret = radeon_setup_pcigart_surface(dev_priv);
1475 if (ret) {
1476 DRM_ERROR("failed to setup GART surface!\n");
1477 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
1478 r600_page_table_cleanup(dev, &dev_priv->gart_info);
1479 else
1480 drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info);
1481 radeon_do_cleanup_cp(dev);
1482 return ret;
1483 }
1484
1223 /* Turn on PCI GART */ 1485 /* Turn on PCI GART */
1224 radeon_set_pcigart(dev_priv, 1); 1486 radeon_set_pcigart(dev_priv, 1);
1225 } 1487 }
@@ -1268,14 +1530,18 @@ static int radeon_do_cleanup_cp(struct drm_device * dev)
1268 if (dev_priv->gart_info.bus_addr) { 1530 if (dev_priv->gart_info.bus_addr) {
1269 /* Turn off PCI GART */ 1531 /* Turn off PCI GART */
1270 radeon_set_pcigart(dev_priv, 0); 1532 radeon_set_pcigart(dev_priv, 0);
1271 if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info)) 1533 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
1272 DRM_ERROR("failed to cleanup PCI GART!\n"); 1534 r600_page_table_cleanup(dev, &dev_priv->gart_info);
1535 else {
1536 if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
1537 DRM_ERROR("failed to cleanup PCI GART!\n");
1538 }
1273 } 1539 }
1274 1540
1275 if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB) 1541 if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
1276 { 1542 {
1277 drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev); 1543 drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
1278 dev_priv->gart_info.addr = 0; 1544 dev_priv->gart_info.addr = NULL;
1279 } 1545 }
1280 } 1546 }
1281 /* only clear to the start of flags */ 1547 /* only clear to the start of flags */
@@ -1326,6 +1592,7 @@ static int radeon_do_resume_cp(struct drm_device *dev, struct drm_file *file_pri
1326 1592
1327int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) 1593int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
1328{ 1594{
1595 drm_radeon_private_t *dev_priv = dev->dev_private;
1329 drm_radeon_init_t *init = data; 1596 drm_radeon_init_t *init = data;
1330 1597
1331 LOCK_TEST_WITH_RETURN(dev, file_priv); 1598 LOCK_TEST_WITH_RETURN(dev, file_priv);
@@ -1338,8 +1605,13 @@ int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_pri
1338 case RADEON_INIT_R200_CP: 1605 case RADEON_INIT_R200_CP:
1339 case RADEON_INIT_R300_CP: 1606 case RADEON_INIT_R300_CP:
1340 return radeon_do_init_cp(dev, init, file_priv); 1607 return radeon_do_init_cp(dev, init, file_priv);
1608 case RADEON_INIT_R600_CP:
1609 return r600_do_init_cp(dev, init, file_priv);
1341 case RADEON_CLEANUP_CP: 1610 case RADEON_CLEANUP_CP:
1342 return radeon_do_cleanup_cp(dev); 1611 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1612 return r600_do_cleanup_cp(dev);
1613 else
1614 return radeon_do_cleanup_cp(dev);
1343 } 1615 }
1344 1616
1345 return -EINVAL; 1617 return -EINVAL;
@@ -1362,7 +1634,10 @@ int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_pr
1362 return 0; 1634 return 0;
1363 } 1635 }
1364 1636
1365 radeon_do_cp_start(dev_priv); 1637 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1638 r600_do_cp_start(dev_priv);
1639 else
1640 radeon_do_cp_start(dev_priv);
1366 1641
1367 return 0; 1642 return 0;
1368} 1643}
@@ -1393,7 +1668,10 @@ int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_pri
1393 * code so that the DRM ioctl wrapper can try again. 1668 * code so that the DRM ioctl wrapper can try again.
1394 */ 1669 */
1395 if (stop->idle) { 1670 if (stop->idle) {
1396 ret = radeon_do_cp_idle(dev_priv); 1671 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1672 ret = r600_do_cp_idle(dev_priv);
1673 else
1674 ret = radeon_do_cp_idle(dev_priv);
1397 if (ret) 1675 if (ret)
1398 return ret; 1676 return ret;
1399 } 1677 }
@@ -1402,10 +1680,16 @@ int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_pri
1402 * we will get some dropped triangles as they won't be fully 1680 * we will get some dropped triangles as they won't be fully
1403 * rendered before the CP is shut down. 1681 * rendered before the CP is shut down.
1404 */ 1682 */
1405 radeon_do_cp_stop(dev_priv); 1683 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1684 r600_do_cp_stop(dev_priv);
1685 else
1686 radeon_do_cp_stop(dev_priv);
1406 1687
1407 /* Reset the engine */ 1688 /* Reset the engine */
1408 radeon_do_engine_reset(dev); 1689 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1690 r600_do_engine_reset(dev);
1691 else
1692 radeon_do_engine_reset(dev);
1409 1693
1410 return 0; 1694 return 0;
1411} 1695}
@@ -1418,29 +1702,47 @@ void radeon_do_release(struct drm_device * dev)
1418 if (dev_priv) { 1702 if (dev_priv) {
1419 if (dev_priv->cp_running) { 1703 if (dev_priv->cp_running) {
1420 /* Stop the cp */ 1704 /* Stop the cp */
1421 while ((ret = radeon_do_cp_idle(dev_priv)) != 0) { 1705 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
1422 DRM_DEBUG("radeon_do_cp_idle %d\n", ret); 1706 while ((ret = r600_do_cp_idle(dev_priv)) != 0) {
1707 DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
1708#ifdef __linux__
1709 schedule();
1710#else
1711 tsleep(&ret, PZERO, "rdnrel", 1);
1712#endif
1713 }
1714 } else {
1715 while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
1716 DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
1423#ifdef __linux__ 1717#ifdef __linux__
1424 schedule(); 1718 schedule();
1425#else 1719#else
1426 tsleep(&ret, PZERO, "rdnrel", 1); 1720 tsleep(&ret, PZERO, "rdnrel", 1);
1427#endif 1721#endif
1722 }
1723 }
1724 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
1725 r600_do_cp_stop(dev_priv);
1726 r600_do_engine_reset(dev);
1727 } else {
1728 radeon_do_cp_stop(dev_priv);
1729 radeon_do_engine_reset(dev);
1428 } 1730 }
1429 radeon_do_cp_stop(dev_priv);
1430 radeon_do_engine_reset(dev);
1431 } 1731 }
1432 1732
1433 /* Disable *all* interrupts */ 1733 if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) {
1434 if (dev_priv->mmio) /* remove this after permanent addmaps */ 1734 /* Disable *all* interrupts */
1435 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 1735 if (dev_priv->mmio) /* remove this after permanent addmaps */
1436 1736 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
1437 if (dev_priv->mmio) { /* remove all surfaces */ 1737
1438 for (i = 0; i < RADEON_MAX_SURFACES; i++) { 1738 if (dev_priv->mmio) { /* remove all surfaces */
1439 RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0); 1739 for (i = 0; i < RADEON_MAX_SURFACES; i++) {
1440 RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 1740 RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0);
1441 16 * i, 0); 1741 RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND +
1442 RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 1742 16 * i, 0);
1443 16 * i, 0); 1743 RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND +
1744 16 * i, 0);
1745 }
1444 } 1746 }
1445 } 1747 }
1446 1748
@@ -1449,7 +1751,10 @@ void radeon_do_release(struct drm_device * dev)
1449 radeon_mem_takedown(&(dev_priv->fb_heap)); 1751 radeon_mem_takedown(&(dev_priv->fb_heap));
1450 1752
1451 /* deallocate kernel resources */ 1753 /* deallocate kernel resources */
1452 radeon_do_cleanup_cp(dev); 1754 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1755 r600_do_cleanup_cp(dev);
1756 else
1757 radeon_do_cleanup_cp(dev);
1453 } 1758 }
1454} 1759}
1455 1760
@@ -1467,7 +1772,10 @@ int radeon_cp_reset(struct drm_device *dev, void *data, struct drm_file *file_pr
1467 return -EINVAL; 1772 return -EINVAL;
1468 } 1773 }
1469 1774
1470 radeon_do_cp_reset(dev_priv); 1775 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1776 r600_do_cp_reset(dev_priv);
1777 else
1778 radeon_do_cp_reset(dev_priv);
1471 1779
1472 /* The CP is no longer running after an engine reset */ 1780 /* The CP is no longer running after an engine reset */
1473 dev_priv->cp_running = 0; 1781 dev_priv->cp_running = 0;
@@ -1482,23 +1790,36 @@ int radeon_cp_idle(struct drm_device *dev, void *data, struct drm_file *file_pri
1482 1790
1483 LOCK_TEST_WITH_RETURN(dev, file_priv); 1791 LOCK_TEST_WITH_RETURN(dev, file_priv);
1484 1792
1485 return radeon_do_cp_idle(dev_priv); 1793 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1794 return r600_do_cp_idle(dev_priv);
1795 else
1796 return radeon_do_cp_idle(dev_priv);
1486} 1797}
1487 1798
1488/* Added by Charl P. Botha to call radeon_do_resume_cp(). 1799/* Added by Charl P. Botha to call radeon_do_resume_cp().
1489 */ 1800 */
1490int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file *file_priv) 1801int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file *file_priv)
1491{ 1802{
1492 return radeon_do_resume_cp(dev, file_priv); 1803 drm_radeon_private_t *dev_priv = dev->dev_private;
1804 DRM_DEBUG("\n");
1805
1806 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1807 return r600_do_resume_cp(dev, file_priv);
1808 else
1809 return radeon_do_resume_cp(dev, file_priv);
1493} 1810}
1494 1811
1495int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv) 1812int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
1496{ 1813{
1814 drm_radeon_private_t *dev_priv = dev->dev_private;
1497 DRM_DEBUG("\n"); 1815 DRM_DEBUG("\n");
1498 1816
1499 LOCK_TEST_WITH_RETURN(dev, file_priv); 1817 LOCK_TEST_WITH_RETURN(dev, file_priv);
1500 1818
1501 return radeon_do_engine_reset(dev); 1819 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
1820 return r600_do_engine_reset(dev);
1821 else
1822 return radeon_do_engine_reset(dev);
1502} 1823}
1503 1824
1504/* ================================================================ 1825/* ================================================================
@@ -1548,7 +1869,7 @@ struct drm_buf *radeon_freelist_get(struct drm_device * dev)
1548 start = dev_priv->last_buf; 1869 start = dev_priv->last_buf;
1549 1870
1550 for (t = 0; t < dev_priv->usec_timeout; t++) { 1871 for (t = 0; t < dev_priv->usec_timeout; t++) {
1551 u32 done_age = GET_SCRATCH(1); 1872 u32 done_age = GET_SCRATCH(dev_priv, 1);
1552 DRM_DEBUG("done_age = %d\n", done_age); 1873 DRM_DEBUG("done_age = %d\n", done_age);
1553 for (i = start; i < dma->buf_count; i++) { 1874 for (i = start; i < dma->buf_count; i++) {
1554 buf = dma->buflist[i]; 1875 buf = dma->buflist[i];
@@ -1582,8 +1903,9 @@ struct drm_buf *radeon_freelist_get(struct drm_device * dev)
1582 struct drm_buf *buf; 1903 struct drm_buf *buf;
1583 int i, t; 1904 int i, t;
1584 int start; 1905 int start;
1585 u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)); 1906 u32 done_age;
1586 1907
1908 done_age = radeon_read_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1));
1587 if (++dev_priv->last_buf >= dma->buf_count) 1909 if (++dev_priv->last_buf >= dma->buf_count)
1588 dev_priv->last_buf = 0; 1910 dev_priv->last_buf = 0;
1589 1911
@@ -1854,3 +2176,41 @@ int radeon_driver_unload(struct drm_device *dev)
1854 dev->dev_private = NULL; 2176 dev->dev_private = NULL;
1855 return 0; 2177 return 0;
1856} 2178}
2179
2180void radeon_commit_ring(drm_radeon_private_t *dev_priv)
2181{
2182 int i;
2183 u32 *ring;
2184 int tail_aligned;
2185
2186 /* check if the ring is padded out to 16-dword alignment */
2187
2188 tail_aligned = dev_priv->ring.tail & 0xf;
2189 if (tail_aligned) {
2190 int num_p2 = 16 - tail_aligned;
2191
2192 ring = dev_priv->ring.start;
2193 /* pad with some CP_PACKET2 */
2194 for (i = 0; i < num_p2; i++)
2195 ring[dev_priv->ring.tail + i] = CP_PACKET2();
2196
2197 dev_priv->ring.tail += i;
2198
2199 dev_priv->ring.space -= num_p2 * sizeof(u32);
2200 }
2201
2202 dev_priv->ring.tail &= dev_priv->ring.tail_mask;
2203
2204 DRM_MEMORYBARRIER();
2205 GET_RING_HEAD( dev_priv );
2206
2207 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
2208 RADEON_WRITE(R600_CP_RB_WPTR, dev_priv->ring.tail);
2209 /* read from PCI bus to ensure correct posting */
2210 RADEON_READ(R600_CP_RB_RPTR);
2211 } else {
2212 RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail);
2213 /* read from PCI bus to ensure correct posting */
2214 RADEON_READ(RADEON_CP_RB_RPTR);
2215 }
2216}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index fef207881f4..13a60f4d422 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -41,23 +41,15 @@ int radeon_no_wb;
41MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 41MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
42module_param_named(no_wb, radeon_no_wb, int, 0444); 42module_param_named(no_wb, radeon_no_wb, int, 0444);
43 43
44static int dri_library_name(struct drm_device *dev, char *buf)
45{
46 drm_radeon_private_t *dev_priv = dev->dev_private;
47 int family = dev_priv->flags & RADEON_FAMILY_MASK;
48
49 return snprintf(buf, PAGE_SIZE, "%s\n",
50 (family < CHIP_R200) ? "radeon" :
51 ((family < CHIP_R300) ? "r200" :
52 "r300"));
53}
54
55static int radeon_suspend(struct drm_device *dev, pm_message_t state) 44static int radeon_suspend(struct drm_device *dev, pm_message_t state)
56{ 45{
57 drm_radeon_private_t *dev_priv = dev->dev_private; 46 drm_radeon_private_t *dev_priv = dev->dev_private;
58 47
48 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
49 return 0;
50
59 /* Disable *all* interrupts */ 51 /* Disable *all* interrupts */
60 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) 52 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
61 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 53 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
62 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 54 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
63 return 0; 55 return 0;
@@ -67,8 +59,11 @@ static int radeon_resume(struct drm_device *dev)
67{ 59{
68 drm_radeon_private_t *dev_priv = dev->dev_private; 60 drm_radeon_private_t *dev_priv = dev->dev_private;
69 61
62 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
63 return 0;
64
70 /* Restore interrupt registers */ 65 /* Restore interrupt registers */
71 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) 66 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
72 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 67 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
73 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 68 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
74 return 0; 69 return 0;
@@ -95,7 +90,6 @@ static struct drm_driver driver = {
95 .get_vblank_counter = radeon_get_vblank_counter, 90 .get_vblank_counter = radeon_get_vblank_counter,
96 .enable_vblank = radeon_enable_vblank, 91 .enable_vblank = radeon_enable_vblank,
97 .disable_vblank = radeon_disable_vblank, 92 .disable_vblank = radeon_disable_vblank,
98 .dri_library_name = dri_library_name,
99 .master_create = radeon_master_create, 93 .master_create = radeon_master_create,
100 .master_destroy = radeon_master_destroy, 94 .master_destroy = radeon_master_destroy,
101 .irq_preinstall = radeon_driver_irq_preinstall, 95 .irq_preinstall = radeon_driver_irq_preinstall,
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 490bc7ceef6..ed4d27e6ee6 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -126,6 +126,7 @@ enum radeon_family {
126 CHIP_RV410, 126 CHIP_RV410,
127 CHIP_RS400, 127 CHIP_RS400,
128 CHIP_RS480, 128 CHIP_RS480,
129 CHIP_RS600,
129 CHIP_RS690, 130 CHIP_RS690,
130 CHIP_RS740, 131 CHIP_RS740,
131 CHIP_RV515, 132 CHIP_RV515,
@@ -134,6 +135,16 @@ enum radeon_family {
134 CHIP_RV560, 135 CHIP_RV560,
135 CHIP_RV570, 136 CHIP_RV570,
136 CHIP_R580, 137 CHIP_R580,
138 CHIP_R600,
139 CHIP_RV610,
140 CHIP_RV630,
141 CHIP_RV620,
142 CHIP_RV635,
143 CHIP_RV670,
144 CHIP_RS780,
145 CHIP_RV770,
146 CHIP_RV730,
147 CHIP_RV710,
137 CHIP_LAST, 148 CHIP_LAST,
138}; 149};
139 150
@@ -160,10 +171,6 @@ enum radeon_chip_flags {
160 RADEON_IS_IGPGART = 0x01000000UL, 171 RADEON_IS_IGPGART = 0x01000000UL,
161}; 172};
162 173
163#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
164 DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
165#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
166
167typedef struct drm_radeon_freelist { 174typedef struct drm_radeon_freelist {
168 unsigned int age; 175 unsigned int age;
169 struct drm_buf *buf; 176 struct drm_buf *buf;
@@ -221,10 +228,11 @@ struct radeon_virt_surface {
221 u32 upper; 228 u32 upper;
222 u32 flags; 229 u32 flags;
223 struct drm_file *file_priv; 230 struct drm_file *file_priv;
231#define PCIGART_FILE_PRIV ((void *) -1L)
224}; 232};
225 233
226#define RADEON_FLUSH_EMITED (1 < 0) 234#define RADEON_FLUSH_EMITED (1 << 0)
227#define RADEON_PURGE_EMITED (1 < 1) 235#define RADEON_PURGE_EMITED (1 << 1)
228 236
229struct drm_radeon_master_private { 237struct drm_radeon_master_private {
230 drm_local_map_t *sarea; 238 drm_local_map_t *sarea;
@@ -248,7 +256,6 @@ typedef struct drm_radeon_private {
248 drm_radeon_freelist_t *head; 256 drm_radeon_freelist_t *head;
249 drm_radeon_freelist_t *tail; 257 drm_radeon_freelist_t *tail;
250 int last_buf; 258 int last_buf;
251 volatile u32 *scratch;
252 int writeback_works; 259 int writeback_works;
253 260
254 int usec_timeout; 261 int usec_timeout;
@@ -316,11 +323,31 @@ typedef struct drm_radeon_private {
316 323
317 /* starting from here on, data is preserved accross an open */ 324 /* starting from here on, data is preserved accross an open */
318 uint32_t flags; /* see radeon_chip_flags */ 325 uint32_t flags; /* see radeon_chip_flags */
319 unsigned long fb_aper_offset; 326 resource_size_t fb_aper_offset;
320 327
321 int num_gb_pipes; 328 int num_gb_pipes;
322 int track_flush; 329 int track_flush;
323 drm_local_map_t *mmio; 330 drm_local_map_t *mmio;
331
332 /* r6xx/r7xx pipe/shader config */
333 int r600_max_pipes;
334 int r600_max_tile_pipes;
335 int r600_max_simds;
336 int r600_max_backends;
337 int r600_max_gprs;
338 int r600_max_threads;
339 int r600_max_stack_entries;
340 int r600_max_hw_contexts;
341 int r600_max_gs_threads;
342 int r600_sx_max_export_size;
343 int r600_sx_max_export_pos_size;
344 int r600_sx_max_export_smx_size;
345 int r600_sq_num_cf_insts;
346 int r700_sx_num_of_sets;
347 int r700_sc_prim_fifo_size;
348 int r700_sc_hiz_tile_fifo_size;
349 int r700_sc_earlyz_tile_fifo_fize;
350
324} drm_radeon_private_t; 351} drm_radeon_private_t;
325 352
326typedef struct drm_radeon_buf_priv { 353typedef struct drm_radeon_buf_priv {
@@ -338,6 +365,12 @@ extern int radeon_no_wb;
338extern struct drm_ioctl_desc radeon_ioctls[]; 365extern struct drm_ioctl_desc radeon_ioctls[];
339extern int radeon_max_ioctl; 366extern int radeon_max_ioctl;
340 367
368extern u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv);
369extern void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val);
370
371#define GET_RING_HEAD(dev_priv) radeon_get_ring_head(dev_priv)
372#define SET_RING_HEAD(dev_priv, val) radeon_set_ring_head(dev_priv, val)
373
341/* Check whether the given hardware address is inside the framebuffer or the 374/* Check whether the given hardware address is inside the framebuffer or the
342 * GART area. 375 * GART area.
343 */ 376 */
@@ -364,6 +397,9 @@ extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_fi
364extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); 397extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
365extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); 398extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
366extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv); 399extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
400extern void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc);
401extern void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base);
402extern u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr);
367 403
368extern void radeon_freelist_reset(struct drm_device * dev); 404extern void radeon_freelist_reset(struct drm_device * dev);
369extern struct drm_buf *radeon_freelist_get(struct drm_device * dev); 405extern struct drm_buf *radeon_freelist_get(struct drm_device * dev);
@@ -383,6 +419,10 @@ extern void radeon_mem_takedown(struct mem_block **heap);
383extern void radeon_mem_release(struct drm_file *file_priv, 419extern void radeon_mem_release(struct drm_file *file_priv,
384 struct mem_block *heap); 420 struct mem_block *heap);
385 421
422extern void radeon_enable_bm(struct drm_radeon_private *dev_priv);
423extern u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off);
424extern void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u32 off, u32 val);
425
386 /* radeon_irq.c */ 426 /* radeon_irq.c */
387extern void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state); 427extern void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state);
388extern int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv); 428extern int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv);
@@ -423,6 +463,21 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
423 struct drm_file *file_priv, 463 struct drm_file *file_priv,
424 drm_radeon_kcmd_buffer_t *cmdbuf); 464 drm_radeon_kcmd_buffer_t *cmdbuf);
425 465
466/* r600_cp.c */
467extern int r600_do_engine_reset(struct drm_device *dev);
468extern int r600_do_cleanup_cp(struct drm_device *dev);
469extern int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
470 struct drm_file *file_priv);
471extern int r600_do_resume_cp(struct drm_device *dev, struct drm_file *file_priv);
472extern int r600_do_cp_idle(drm_radeon_private_t *dev_priv);
473extern void r600_do_cp_start(drm_radeon_private_t *dev_priv);
474extern void r600_do_cp_reset(drm_radeon_private_t *dev_priv);
475extern void r600_do_cp_stop(drm_radeon_private_t *dev_priv);
476extern int r600_cp_dispatch_indirect(struct drm_device *dev,
477 struct drm_buf *buf, int start, int end);
478extern int r600_page_table_init(struct drm_device *dev);
479extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
480
426/* Flags for stats.boxes 481/* Flags for stats.boxes
427 */ 482 */
428#define RADEON_BOX_DMA_IDLE 0x1 483#define RADEON_BOX_DMA_IDLE 0x1
@@ -434,6 +489,8 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
434/* Register definitions, register access macros and drmAddMap constants 489/* Register definitions, register access macros and drmAddMap constants
435 * for Radeon kernel driver. 490 * for Radeon kernel driver.
436 */ 491 */
492#define RADEON_MM_INDEX 0x0000
493#define RADEON_MM_DATA 0x0004
437 494
438#define RADEON_AGP_COMMAND 0x0f60 495#define RADEON_AGP_COMMAND 0x0f60
439#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */ 496#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */
@@ -556,6 +613,56 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
556#define RS690_MC_AGP_BASE 0x102 613#define RS690_MC_AGP_BASE 0x102
557#define RS690_MC_AGP_BASE_2 0x103 614#define RS690_MC_AGP_BASE_2 0x103
558 615
616#define RS600_MC_INDEX 0x70
617# define RS600_MC_ADDR_MASK 0xffff
618# define RS600_MC_IND_SEQ_RBS_0 (1 << 16)
619# define RS600_MC_IND_SEQ_RBS_1 (1 << 17)
620# define RS600_MC_IND_SEQ_RBS_2 (1 << 18)
621# define RS600_MC_IND_SEQ_RBS_3 (1 << 19)
622# define RS600_MC_IND_AIC_RBS (1 << 20)
623# define RS600_MC_IND_CITF_ARB0 (1 << 21)
624# define RS600_MC_IND_CITF_ARB1 (1 << 22)
625# define RS600_MC_IND_WR_EN (1 << 23)
626#define RS600_MC_DATA 0x74
627
628#define RS600_MC_STATUS 0x0
629# define RS600_MC_IDLE (1 << 1)
630#define RS600_MC_FB_LOCATION 0x4
631#define RS600_MC_AGP_LOCATION 0x5
632#define RS600_AGP_BASE 0x6
633#define RS600_AGP_BASE_2 0x7
634#define RS600_MC_CNTL1 0x9
635# define RS600_ENABLE_PAGE_TABLES (1 << 26)
636#define RS600_MC_PT0_CNTL 0x100
637# define RS600_ENABLE_PT (1 << 0)
638# define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15)
639# define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21)
640# define RS600_INVALIDATE_ALL_L1_TLBS (1 << 28)
641# define RS600_INVALIDATE_L2_CACHE (1 << 29)
642#define RS600_MC_PT0_CONTEXT0_CNTL 0x102
643# define RS600_ENABLE_PAGE_TABLE (1 << 0)
644# define RS600_PAGE_TABLE_TYPE_FLAT (0 << 1)
645#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112
646#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR 0x114
647#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR 0x11c
648#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR 0x12c
649#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR 0x13c
650#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR 0x14c
651#define RS600_MC_PT0_CLIENT0_CNTL 0x16c
652# define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE (1 << 0)
653# define RS600_TRANSLATION_MODE_OVERRIDE (1 << 1)
654# define RS600_SYSTEM_ACCESS_MODE_MASK (3 << 8)
655# define RS600_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 8)
656# define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 8)
657# define RS600_SYSTEM_ACCESS_MODE_IN_SYS (2 << 8)
658# define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 8)
659# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH (0 << 10)
660# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 10)
661# define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11)
662# define RS600_ENABLE_FRAGMENT_PROCESSING (1 << 14)
663# define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15)
664# define RS600_INVALIDATE_L1_TLB (1 << 20)
665
559#define R520_MC_IND_INDEX 0x70 666#define R520_MC_IND_INDEX 0x70
560#define R520_MC_IND_WR_EN (1 << 24) 667#define R520_MC_IND_WR_EN (1 << 24)
561#define R520_MC_IND_DATA 0x74 668#define R520_MC_IND_DATA 0x74
@@ -580,7 +687,6 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
580/* pipe config regs */ 687/* pipe config regs */
581#define R400_GB_PIPE_SELECT 0x402c 688#define R400_GB_PIPE_SELECT 0x402c
582#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ 689#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
583#define R500_SU_REG_DEST 0x42c8
584#define R300_GB_TILE_CONFIG 0x4018 690#define R300_GB_TILE_CONFIG 0x4018
585# define R300_ENABLE_TILING (1 << 0) 691# define R300_ENABLE_TILING (1 << 0)
586# define R300_PIPE_COUNT_RV350 (0 << 1) 692# define R300_PIPE_COUNT_RV350 (0 << 1)
@@ -639,9 +745,22 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
639 745
640#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x)) 746#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x))
641 747
642#define GET_SCRATCH( x ) (dev_priv->writeback_works \ 748extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
643 ? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \ 749
644 : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) ) 750#define GET_SCRATCH(dev_priv, x) radeon_get_scratch(dev_priv, x)
751
752#define R600_SCRATCH_REG0 0x8500
753#define R600_SCRATCH_REG1 0x8504
754#define R600_SCRATCH_REG2 0x8508
755#define R600_SCRATCH_REG3 0x850c
756#define R600_SCRATCH_REG4 0x8510
757#define R600_SCRATCH_REG5 0x8514
758#define R600_SCRATCH_REG6 0x8518
759#define R600_SCRATCH_REG7 0x851c
760#define R600_SCRATCH_UMSK 0x8540
761#define R600_SCRATCH_ADDR 0x8544
762
763#define R600_SCRATCHOFF(x) (R600_SCRATCH_REG_OFFSET + 4*(x))
645 764
646#define RADEON_GEN_INT_CNTL 0x0040 765#define RADEON_GEN_INT_CNTL 0x0040
647# define RADEON_CRTC_VBLANK_MASK (1 << 0) 766# define RADEON_CRTC_VBLANK_MASK (1 << 0)
@@ -922,6 +1041,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
922#define RADEON_CP_RB_CNTL 0x0704 1041#define RADEON_CP_RB_CNTL 0x0704
923# define RADEON_BUF_SWAP_32BIT (2 << 16) 1042# define RADEON_BUF_SWAP_32BIT (2 << 16)
924# define RADEON_RB_NO_UPDATE (1 << 27) 1043# define RADEON_RB_NO_UPDATE (1 << 27)
1044# define RADEON_RB_RPTR_WR_ENA (1 << 31)
925#define RADEON_CP_RB_RPTR_ADDR 0x070c 1045#define RADEON_CP_RB_RPTR_ADDR 0x070c
926#define RADEON_CP_RB_RPTR 0x0710 1046#define RADEON_CP_RB_RPTR 0x0710
927#define RADEON_CP_RB_WPTR 0x0714 1047#define RADEON_CP_RB_WPTR 0x0714
@@ -983,6 +1103,14 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
983# define RADEON_CNTL_BITBLT_MULTI 0x00009B00 1103# define RADEON_CNTL_BITBLT_MULTI 0x00009B00
984# define RADEON_CNTL_SET_SCISSORS 0xC0001E00 1104# define RADEON_CNTL_SET_SCISSORS 0xC0001E00
985 1105
1106# define R600_IT_INDIRECT_BUFFER 0x00003200
1107# define R600_IT_ME_INITIALIZE 0x00004400
1108# define R600_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)
1109# define R600_IT_EVENT_WRITE 0x00004600
1110# define R600_IT_SET_CONFIG_REG 0x00006800
1111# define R600_SET_CONFIG_REG_OFFSET 0x00008000
1112# define R600_SET_CONFIG_REG_END 0x0000ac00
1113
986#define RADEON_CP_PACKET_MASK 0xC0000000 1114#define RADEON_CP_PACKET_MASK 0xC0000000
987#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 1115#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000
988#define RADEON_CP_PACKET0_REG_MASK 0x000007ff 1116#define RADEON_CP_PACKET0_REG_MASK 0x000007ff
@@ -1181,6 +1309,422 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
1181#define R500_D1_VBLANK_INTERRUPT (1 << 4) 1309#define R500_D1_VBLANK_INTERRUPT (1 << 4)
1182#define R500_D2_VBLANK_INTERRUPT (1 << 5) 1310#define R500_D2_VBLANK_INTERRUPT (1 << 5)
1183 1311
1312/* R6xx/R7xx registers */
1313#define R600_MC_VM_FB_LOCATION 0x2180
1314#define R600_MC_VM_AGP_TOP 0x2184
1315#define R600_MC_VM_AGP_BOT 0x2188
1316#define R600_MC_VM_AGP_BASE 0x218c
1317#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190
1318#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194
1319#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198
1320
1321#define R700_MC_VM_FB_LOCATION 0x2024
1322#define R700_MC_VM_AGP_TOP 0x2028
1323#define R700_MC_VM_AGP_BOT 0x202c
1324#define R700_MC_VM_AGP_BASE 0x2030
1325#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034
1326#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038
1327#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c
1328
1329#define R600_MCD_RD_A_CNTL 0x219c
1330#define R600_MCD_RD_B_CNTL 0x21a0
1331
1332#define R600_MCD_WR_A_CNTL 0x21a4
1333#define R600_MCD_WR_B_CNTL 0x21a8
1334
1335#define R600_MCD_RD_SYS_CNTL 0x2200
1336#define R600_MCD_WR_SYS_CNTL 0x2214
1337
1338#define R600_MCD_RD_GFX_CNTL 0x21fc
1339#define R600_MCD_RD_HDP_CNTL 0x2204
1340#define R600_MCD_RD_PDMA_CNTL 0x2208
1341#define R600_MCD_RD_SEM_CNTL 0x220c
1342#define R600_MCD_WR_GFX_CNTL 0x2210
1343#define R600_MCD_WR_HDP_CNTL 0x2218
1344#define R600_MCD_WR_PDMA_CNTL 0x221c
1345#define R600_MCD_WR_SEM_CNTL 0x2220
1346
1347# define R600_MCD_L1_TLB (1 << 0)
1348# define R600_MCD_L1_FRAG_PROC (1 << 1)
1349# define R600_MCD_L1_STRICT_ORDERING (1 << 2)
1350
1351# define R600_MCD_SYSTEM_ACCESS_MODE_MASK (3 << 6)
1352# define R600_MCD_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 6)
1353# define R600_MCD_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 6)
1354# define R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS (2 << 6)
1355# define R600_MCD_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 6)
1356
1357# define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 8)
1358# define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 8)
1359
1360# define R600_MCD_SEMAPHORE_MODE (1 << 10)
1361# define R600_MCD_WAIT_L2_QUERY (1 << 11)
1362# define R600_MCD_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 12)
1363# define R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15)
1364
1365#define R700_MC_VM_MD_L1_TLB0_CNTL 0x2654
1366#define R700_MC_VM_MD_L1_TLB1_CNTL 0x2658
1367#define R700_MC_VM_MD_L1_TLB2_CNTL 0x265c
1368
1369#define R700_MC_VM_MB_L1_TLB0_CNTL 0x2234
1370#define R700_MC_VM_MB_L1_TLB1_CNTL 0x2238
1371#define R700_MC_VM_MB_L1_TLB2_CNTL 0x223c
1372#define R700_MC_VM_MB_L1_TLB3_CNTL 0x2240
1373
1374# define R700_ENABLE_L1_TLB (1 << 0)
1375# define R700_ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)
1376# define R700_SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
1377# define R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)
1378# define R700_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 15)
1379# define R700_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 18)
1380
1381#define R700_MC_ARB_RAMCFG 0x2760
1382# define R700_NOOFBANK_SHIFT 0
1383# define R700_NOOFBANK_MASK 0x3
1384# define R700_NOOFRANK_SHIFT 2
1385# define R700_NOOFRANK_MASK 0x1
1386# define R700_NOOFROWS_SHIFT 3
1387# define R700_NOOFROWS_MASK 0x7
1388# define R700_NOOFCOLS_SHIFT 6
1389# define R700_NOOFCOLS_MASK 0x3
1390# define R700_CHANSIZE_SHIFT 8
1391# define R700_CHANSIZE_MASK 0x1
1392# define R700_BURSTLENGTH_SHIFT 9
1393# define R700_BURSTLENGTH_MASK 0x1
1394#define R600_RAMCFG 0x2408
1395# define R600_NOOFBANK_SHIFT 0
1396# define R600_NOOFBANK_MASK 0x1
1397# define R600_NOOFRANK_SHIFT 1
1398# define R600_NOOFRANK_MASK 0x1
1399# define R600_NOOFROWS_SHIFT 2
1400# define R600_NOOFROWS_MASK 0x7
1401# define R600_NOOFCOLS_SHIFT 5
1402# define R600_NOOFCOLS_MASK 0x3
1403# define R600_CHANSIZE_SHIFT 7
1404# define R600_CHANSIZE_MASK 0x1
1405# define R600_BURSTLENGTH_SHIFT 8
1406# define R600_BURSTLENGTH_MASK 0x1
1407
1408#define R600_VM_L2_CNTL 0x1400
1409# define R600_VM_L2_CACHE_EN (1 << 0)
1410# define R600_VM_L2_FRAG_PROC (1 << 1)
1411# define R600_VM_ENABLE_PTE_CACHE_LRU_W (1 << 9)
1412# define R600_VM_L2_CNTL_QUEUE_SIZE(x) ((x) << 13)
1413# define R700_VM_L2_CNTL_QUEUE_SIZE(x) ((x) << 14)
1414
1415#define R600_VM_L2_CNTL2 0x1404
1416# define R600_VM_L2_CNTL2_INVALIDATE_ALL_L1_TLBS (1 << 0)
1417# define R600_VM_L2_CNTL2_INVALIDATE_L2_CACHE (1 << 1)
1418#define R600_VM_L2_CNTL3 0x1408
1419# define R600_VM_L2_CNTL3_BANK_SELECT_0(x) ((x) << 0)
1420# define R600_VM_L2_CNTL3_BANK_SELECT_1(x) ((x) << 5)
1421# define R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(x) ((x) << 10)
1422# define R700_VM_L2_CNTL3_BANK_SELECT(x) ((x) << 0)
1423# define R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(x) ((x) << 6)
1424
1425#define R600_VM_L2_STATUS 0x140c
1426
1427#define R600_VM_CONTEXT0_CNTL 0x1410
1428# define R600_VM_ENABLE_CONTEXT (1 << 0)
1429# define R600_VM_PAGE_TABLE_DEPTH_FLAT (0 << 1)
1430
1431#define R600_VM_CONTEXT0_CNTL2 0x1430
1432#define R600_VM_CONTEXT0_REQUEST_RESPONSE 0x1470
1433#define R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR 0x1490
1434#define R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR 0x14b0
1435#define R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x1574
1436#define R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x1594
1437#define R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x15b4
1438
1439#define R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153c
1440#define R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x155c
1441#define R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x157c
1442
1443#define R600_HDP_HOST_PATH_CNTL 0x2c00
1444
1445#define R600_GRBM_CNTL 0x8000
1446# define R600_GRBM_READ_TIMEOUT(x) ((x) << 0)
1447
1448#define R600_GRBM_STATUS 0x8010
1449# define R600_CMDFIFO_AVAIL_MASK 0x1f
1450# define R700_CMDFIFO_AVAIL_MASK 0xf
1451# define R600_GUI_ACTIVE (1 << 31)
1452#define R600_GRBM_STATUS2 0x8014
1453#define R600_GRBM_SOFT_RESET 0x8020
1454# define R600_SOFT_RESET_CP (1 << 0)
1455#define R600_WAIT_UNTIL 0x8040
1456
1457#define R600_CP_SEM_WAIT_TIMER 0x85bc
1458#define R600_CP_ME_CNTL 0x86d8
1459# define R600_CP_ME_HALT (1 << 28)
1460#define R600_CP_QUEUE_THRESHOLDS 0x8760
1461# define R600_ROQ_IB1_START(x) ((x) << 0)
1462# define R600_ROQ_IB2_START(x) ((x) << 8)
1463#define R600_CP_MEQ_THRESHOLDS 0x8764
1464# define R700_STQ_SPLIT(x) ((x) << 0)
1465# define R600_MEQ_END(x) ((x) << 16)
1466# define R600_ROQ_END(x) ((x) << 24)
1467#define R600_CP_PERFMON_CNTL 0x87fc
1468#define R600_CP_RB_BASE 0xc100
1469#define R600_CP_RB_CNTL 0xc104
1470# define R600_RB_BUFSZ(x) ((x) << 0)
1471# define R600_RB_BLKSZ(x) ((x) << 8)
1472# define R600_RB_NO_UPDATE (1 << 27)
1473# define R600_RB_RPTR_WR_ENA (1 << 31)
1474#define R600_CP_RB_RPTR_WR 0xc108
1475#define R600_CP_RB_RPTR_ADDR 0xc10c
1476#define R600_CP_RB_RPTR_ADDR_HI 0xc110
1477#define R600_CP_RB_WPTR 0xc114
1478#define R600_CP_RB_WPTR_ADDR 0xc118
1479#define R600_CP_RB_WPTR_ADDR_HI 0xc11c
1480#define R600_CP_RB_RPTR 0x8700
1481#define R600_CP_RB_WPTR_DELAY 0x8704
1482#define R600_CP_PFP_UCODE_ADDR 0xc150
1483#define R600_CP_PFP_UCODE_DATA 0xc154
1484#define R600_CP_ME_RAM_RADDR 0xc158
1485#define R600_CP_ME_RAM_WADDR 0xc15c
1486#define R600_CP_ME_RAM_DATA 0xc160
1487#define R600_CP_DEBUG 0xc1fc
1488
1489#define R600_PA_CL_ENHANCE 0x8a14
1490# define R600_CLIP_VTX_REORDER_ENA (1 << 0)
1491# define R600_NUM_CLIP_SEQ(x) ((x) << 1)
1492#define R600_PA_SC_LINE_STIPPLE_STATE 0x8b10
1493#define R600_PA_SC_MULTI_CHIP_CNTL 0x8b20
1494#define R700_PA_SC_FORCE_EOV_MAX_CNTS 0x8b24
1495# define R700_FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0)
1496# define R700_FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16)
1497#define R600_PA_SC_AA_SAMPLE_LOCS_2S 0x8b40
1498#define R600_PA_SC_AA_SAMPLE_LOCS_4S 0x8b44
1499#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0 0x8b48
1500#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1 0x8b4c
1501# define R600_S0_X(x) ((x) << 0)
1502# define R600_S0_Y(x) ((x) << 4)
1503# define R600_S1_X(x) ((x) << 8)
1504# define R600_S1_Y(x) ((x) << 12)
1505# define R600_S2_X(x) ((x) << 16)
1506# define R600_S2_Y(x) ((x) << 20)
1507# define R600_S3_X(x) ((x) << 24)
1508# define R600_S3_Y(x) ((x) << 28)
1509# define R600_S4_X(x) ((x) << 0)
1510# define R600_S4_Y(x) ((x) << 4)
1511# define R600_S5_X(x) ((x) << 8)
1512# define R600_S5_Y(x) ((x) << 12)
1513# define R600_S6_X(x) ((x) << 16)
1514# define R600_S6_Y(x) ((x) << 20)
1515# define R600_S7_X(x) ((x) << 24)
1516# define R600_S7_Y(x) ((x) << 28)
1517#define R600_PA_SC_FIFO_SIZE 0x8bd0
1518# define R600_SC_PRIM_FIFO_SIZE(x) ((x) << 0)
1519# define R600_SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 8)
1520# define R600_SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 16)
1521#define R700_PA_SC_FIFO_SIZE_R7XX 0x8bcc
1522# define R700_SC_PRIM_FIFO_SIZE(x) ((x) << 0)
1523# define R700_SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12)
1524# define R700_SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20)
1525#define R600_PA_SC_ENHANCE 0x8bf0
1526# define R600_FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0)
1527# define R600_FORCE_EOV_MAX_TILE_CNT(x) ((x) << 12)
1528#define R600_PA_SC_CLIPRECT_RULE 0x2820c
1529#define R700_PA_SC_EDGERULE 0x28230
1530#define R600_PA_SC_LINE_STIPPLE 0x28a0c
1531#define R600_PA_SC_MODE_CNTL 0x28a4c
1532#define R600_PA_SC_AA_CONFIG 0x28c04
1533
1534#define R600_SX_EXPORT_BUFFER_SIZES 0x900c
1535# define R600_COLOR_BUFFER_SIZE(x) ((x) << 0)
1536# define R600_POSITION_BUFFER_SIZE(x) ((x) << 8)
1537# define R600_SMX_BUFFER_SIZE(x) ((x) << 16)
1538#define R600_SX_DEBUG_1 0x9054
1539# define R600_SMX_EVENT_RELEASE (1 << 0)
1540# define R600_ENABLE_NEW_SMX_ADDRESS (1 << 16)
1541#define R700_SX_DEBUG_1 0x9058
1542# define R700_ENABLE_NEW_SMX_ADDRESS (1 << 16)
1543#define R600_SX_MISC 0x28350
1544
1545#define R600_DB_DEBUG 0x9830
1546# define R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31)
1547#define R600_DB_WATERMARKS 0x9838
1548# define R600_DEPTH_FREE(x) ((x) << 0)
1549# define R600_DEPTH_FLUSH(x) ((x) << 5)
1550# define R600_DEPTH_PENDING_FREE(x) ((x) << 15)
1551# define R600_DEPTH_CACHELINE_FREE(x) ((x) << 20)
1552#define R700_DB_DEBUG3 0x98b0
1553# define R700_DB_CLK_OFF_DELAY(x) ((x) << 11)
1554#define RV700_DB_DEBUG4 0x9b8c
1555# define RV700_DISABLE_TILE_COVERED_FOR_PS_ITER (1 << 6)
1556
1557#define R600_VGT_CACHE_INVALIDATION 0x88c4
1558# define R600_CACHE_INVALIDATION(x) ((x) << 0)
1559# define R600_VC_ONLY 0
1560# define R600_TC_ONLY 1
1561# define R600_VC_AND_TC 2
1562# define R700_AUTO_INVLD_EN(x) ((x) << 6)
1563# define R700_NO_AUTO 0
1564# define R700_ES_AUTO 1
1565# define R700_GS_AUTO 2
1566# define R700_ES_AND_GS_AUTO 3
1567#define R600_VGT_GS_PER_ES 0x88c8
1568#define R600_VGT_ES_PER_GS 0x88cc
1569#define R600_VGT_GS_PER_VS 0x88e8
1570#define R600_VGT_GS_VERTEX_REUSE 0x88d4
1571#define R600_VGT_NUM_INSTANCES 0x8974
1572#define R600_VGT_STRMOUT_EN 0x28ab0
1573#define R600_VGT_EVENT_INITIATOR 0x28a90
1574# define R600_CACHE_FLUSH_AND_INV_EVENT (0x16 << 0)
1575#define R600_VGT_VERTEX_REUSE_BLOCK_CNTL 0x28c58
1576# define R600_VTX_REUSE_DEPTH_MASK 0xff
1577#define R600_VGT_OUT_DEALLOC_CNTL 0x28c5c
1578# define R600_DEALLOC_DIST_MASK 0x7f
1579
1580#define R600_CB_COLOR0_BASE 0x28040
1581#define R600_CB_COLOR1_BASE 0x28044
1582#define R600_CB_COLOR2_BASE 0x28048
1583#define R600_CB_COLOR3_BASE 0x2804c
1584#define R600_CB_COLOR4_BASE 0x28050
1585#define R600_CB_COLOR5_BASE 0x28054
1586#define R600_CB_COLOR6_BASE 0x28058
1587#define R600_CB_COLOR7_BASE 0x2805c
1588#define R600_CB_COLOR7_FRAG 0x280fc
1589
1590#define R600_TC_CNTL 0x9608
1591# define R600_TC_L2_SIZE(x) ((x) << 5)
1592# define R600_L2_DISABLE_LATE_HIT (1 << 9)
1593
1594#define R600_ARB_POP 0x2418
1595# define R600_ENABLE_TC128 (1 << 30)
1596#define R600_ARB_GDEC_RD_CNTL 0x246c
1597
1598#define R600_TA_CNTL_AUX 0x9508
1599# define R600_DISABLE_CUBE_WRAP (1 << 0)
1600# define R600_DISABLE_CUBE_ANISO (1 << 1)
1601# define R700_GETLOD_SELECT(x) ((x) << 2)
1602# define R600_SYNC_GRADIENT (1 << 24)
1603# define R600_SYNC_WALKER (1 << 25)
1604# define R600_SYNC_ALIGNER (1 << 26)
1605# define R600_BILINEAR_PRECISION_6_BIT (0 << 31)
1606# define R600_BILINEAR_PRECISION_8_BIT (1 << 31)
1607
1608#define R700_TCP_CNTL 0x9610
1609
1610#define R600_SMX_DC_CTL0 0xa020
1611# define R700_USE_HASH_FUNCTION (1 << 0)
1612# define R700_CACHE_DEPTH(x) ((x) << 1)
1613# define R700_FLUSH_ALL_ON_EVENT (1 << 10)
1614# define R700_STALL_ON_EVENT (1 << 11)
1615#define R700_SMX_EVENT_CTL 0xa02c
1616# define R700_ES_FLUSH_CTL(x) ((x) << 0)
1617# define R700_GS_FLUSH_CTL(x) ((x) << 3)
1618# define R700_ACK_FLUSH_CTL(x) ((x) << 6)
1619# define R700_SYNC_FLUSH_CTL (1 << 8)
1620
1621#define R600_SQ_CONFIG 0x8c00
1622# define R600_VC_ENABLE (1 << 0)
1623# define R600_EXPORT_SRC_C (1 << 1)
1624# define R600_DX9_CONSTS (1 << 2)
1625# define R600_ALU_INST_PREFER_VECTOR (1 << 3)
1626# define R600_DX10_CLAMP (1 << 4)
1627# define R600_CLAUSE_SEQ_PRIO(x) ((x) << 8)
1628# define R600_PS_PRIO(x) ((x) << 24)
1629# define R600_VS_PRIO(x) ((x) << 26)
1630# define R600_GS_PRIO(x) ((x) << 28)
1631# define R600_ES_PRIO(x) ((x) << 30)
1632#define R600_SQ_GPR_RESOURCE_MGMT_1 0x8c04
1633# define R600_NUM_PS_GPRS(x) ((x) << 0)
1634# define R600_NUM_VS_GPRS(x) ((x) << 16)
1635# define R700_DYN_GPR_ENABLE (1 << 27)
1636# define R600_NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28)
1637#define R600_SQ_GPR_RESOURCE_MGMT_2 0x8c08
1638# define R600_NUM_GS_GPRS(x) ((x) << 0)
1639# define R600_NUM_ES_GPRS(x) ((x) << 16)
1640#define R600_SQ_THREAD_RESOURCE_MGMT 0x8c0c
1641# define R600_NUM_PS_THREADS(x) ((x) << 0)
1642# define R600_NUM_VS_THREADS(x) ((x) << 8)
1643# define R600_NUM_GS_THREADS(x) ((x) << 16)
1644# define R600_NUM_ES_THREADS(x) ((x) << 24)
1645#define R600_SQ_STACK_RESOURCE_MGMT_1 0x8c10
1646# define R600_NUM_PS_STACK_ENTRIES(x) ((x) << 0)
1647# define R600_NUM_VS_STACK_ENTRIES(x) ((x) << 16)
1648#define R600_SQ_STACK_RESOURCE_MGMT_2 0x8c14
1649# define R600_NUM_GS_STACK_ENTRIES(x) ((x) << 0)
1650# define R600_NUM_ES_STACK_ENTRIES(x) ((x) << 16)
1651#define R600_SQ_MS_FIFO_SIZES 0x8cf0
1652# define R600_CACHE_FIFO_SIZE(x) ((x) << 0)
1653# define R600_FETCH_FIFO_HIWATER(x) ((x) << 8)
1654# define R600_DONE_FIFO_HIWATER(x) ((x) << 16)
1655# define R600_ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24)
1656#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_0 0x8db0
1657# define R700_SIMDA_RING0(x) ((x) << 0)
1658# define R700_SIMDA_RING1(x) ((x) << 8)
1659# define R700_SIMDB_RING0(x) ((x) << 16)
1660# define R700_SIMDB_RING1(x) ((x) << 24)
1661#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_1 0x8db4
1662#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_2 0x8db8
1663#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_3 0x8dbc
1664#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_4 0x8dc0
1665#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_5 0x8dc4
1666#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_6 0x8dc8
1667#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_7 0x8dcc
1668
1669#define R600_SPI_PS_IN_CONTROL_0 0x286cc
1670# define R600_NUM_INTERP(x) ((x) << 0)
1671# define R600_POSITION_ENA (1 << 8)
1672# define R600_POSITION_CENTROID (1 << 9)
1673# define R600_POSITION_ADDR(x) ((x) << 10)
1674# define R600_PARAM_GEN(x) ((x) << 15)
1675# define R600_PARAM_GEN_ADDR(x) ((x) << 19)
1676# define R600_BARYC_SAMPLE_CNTL(x) ((x) << 26)
1677# define R600_PERSP_GRADIENT_ENA (1 << 28)
1678# define R600_LINEAR_GRADIENT_ENA (1 << 29)
1679# define R600_POSITION_SAMPLE (1 << 30)
1680# define R600_BARYC_AT_SAMPLE_ENA (1 << 31)
1681#define R600_SPI_PS_IN_CONTROL_1 0x286d0
1682# define R600_GEN_INDEX_PIX (1 << 0)
1683# define R600_GEN_INDEX_PIX_ADDR(x) ((x) << 1)
1684# define R600_FRONT_FACE_ENA (1 << 8)
1685# define R600_FRONT_FACE_CHAN(x) ((x) << 9)
1686# define R600_FRONT_FACE_ALL_BITS (1 << 11)
1687# define R600_FRONT_FACE_ADDR(x) ((x) << 12)
1688# define R600_FOG_ADDR(x) ((x) << 17)
1689# define R600_FIXED_PT_POSITION_ENA (1 << 24)
1690# define R600_FIXED_PT_POSITION_ADDR(x) ((x) << 25)
1691# define R700_POSITION_ULC (1 << 30)
1692#define R600_SPI_INPUT_Z 0x286d8
1693
1694#define R600_SPI_CONFIG_CNTL 0x9100
1695# define R600_GPR_WRITE_PRIORITY(x) ((x) << 0)
1696# define R600_DISABLE_INTERP_1 (1 << 5)
1697#define R600_SPI_CONFIG_CNTL_1 0x913c
1698# define R600_VTX_DONE_DELAY(x) ((x) << 0)
1699# define R600_INTERP_ONE_PRIM_PER_ROW (1 << 4)
1700
1701#define R600_GB_TILING_CONFIG 0x98f0
1702# define R600_PIPE_TILING(x) ((x) << 1)
1703# define R600_BANK_TILING(x) ((x) << 4)
1704# define R600_GROUP_SIZE(x) ((x) << 6)
1705# define R600_ROW_TILING(x) ((x) << 8)
1706# define R600_BANK_SWAPS(x) ((x) << 11)
1707# define R600_SAMPLE_SPLIT(x) ((x) << 14)
1708# define R600_BACKEND_MAP(x) ((x) << 16)
1709#define R600_DCP_TILING_CONFIG 0x6ca0
1710#define R600_HDP_TILING_CONFIG 0x2f3c
1711
1712#define R600_CC_RB_BACKEND_DISABLE 0x98f4
1713#define R700_CC_SYS_RB_BACKEND_DISABLE 0x3f88
1714# define R600_BACKEND_DISABLE(x) ((x) << 16)
1715
1716#define R600_CC_GC_SHADER_PIPE_CONFIG 0x8950
1717#define R600_GC_USER_SHADER_PIPE_CONFIG 0x8954
1718# define R600_INACTIVE_QD_PIPES(x) ((x) << 8)
1719# define R600_INACTIVE_QD_PIPES_MASK (0xff << 8)
1720# define R600_INACTIVE_SIMDS(x) ((x) << 16)
1721# define R600_INACTIVE_SIMDS_MASK (0xff << 16)
1722
1723#define R700_CGTS_SYS_TCC_DISABLE 0x3f90
1724#define R700_CGTS_USER_SYS_TCC_DISABLE 0x3f94
1725#define R700_CGTS_TCC_DISABLE 0x9148
1726#define R700_CGTS_USER_TCC_DISABLE 0x914c
1727
1184/* Constants */ 1728/* Constants */
1185#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ 1729#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
1186 1730
@@ -1190,6 +1734,11 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
1190#define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3 1734#define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3
1191#define RADEON_LAST_DISPATCH 1 1735#define RADEON_LAST_DISPATCH 1
1192 1736
1737#define R600_LAST_FRAME_REG R600_SCRATCH_REG0
1738#define R600_LAST_DISPATCH_REG R600_SCRATCH_REG1
1739#define R600_LAST_CLEAR_REG R600_SCRATCH_REG2
1740#define R600_LAST_SWI_REG R600_SCRATCH_REG3
1741
1193#define RADEON_MAX_VB_AGE 0x7fffffff 1742#define RADEON_MAX_VB_AGE 0x7fffffff
1194#define RADEON_MAX_VB_VERTS (0xffff) 1743#define RADEON_MAX_VB_VERTS (0xffff)
1195 1744
@@ -1198,7 +1747,15 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
1198#define RADEON_PCIGART_TABLE_SIZE (32*1024) 1747#define RADEON_PCIGART_TABLE_SIZE (32*1024)
1199 1748
1200#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) 1749#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
1201#define RADEON_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) 1750#define RADEON_WRITE(reg, val) \
1751do { \
1752 if (reg < 0x10000) { \
1753 DRM_WRITE32(dev_priv->mmio, (reg), (val)); \
1754 } else { \
1755 DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, (reg)); \
1756 DRM_WRITE32(dev_priv->mmio, RADEON_MM_DATA, (val)); \
1757 } \
1758} while (0)
1202#define RADEON_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) 1759#define RADEON_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) )
1203#define RADEON_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) 1760#define RADEON_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) )
1204 1761
@@ -1238,11 +1795,19 @@ do { \
1238 RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); \ 1795 RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); \
1239} while (0) 1796} while (0)
1240 1797
1798#define RS600_WRITE_MCIND(addr, val) \
1799do { \
1800 RADEON_WRITE(RS600_MC_INDEX, RS600_MC_IND_WR_EN | RS600_MC_IND_CITF_ARB0 | ((addr) & RS600_MC_ADDR_MASK)); \
1801 RADEON_WRITE(RS600_MC_DATA, val); \
1802} while (0)
1803
1241#define IGP_WRITE_MCIND(addr, val) \ 1804#define IGP_WRITE_MCIND(addr, val) \
1242do { \ 1805do { \
1243 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || \ 1806 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || \
1244 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) \ 1807 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) \
1245 RS690_WRITE_MCIND(addr, val); \ 1808 RS690_WRITE_MCIND(addr, val); \
1809 else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) \
1810 RS600_WRITE_MCIND(addr, val); \
1246 else \ 1811 else \
1247 RS480_WRITE_MCIND(addr, val); \ 1812 RS480_WRITE_MCIND(addr, val); \
1248} while (0) 1813} while (0)
@@ -1346,7 +1911,11 @@ do { \
1346 struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; \ 1911 struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; \
1347 drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; \ 1912 drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; \
1348 if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \ 1913 if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \
1349 int __ret = radeon_do_cp_idle( dev_priv ); \ 1914 int __ret; \
1915 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) \
1916 __ret = r600_do_cp_idle(dev_priv); \
1917 else \
1918 __ret = radeon_do_cp_idle(dev_priv); \
1350 if ( __ret ) return __ret; \ 1919 if ( __ret ) return __ret; \
1351 sarea_priv->last_dispatch = 0; \ 1920 sarea_priv->last_dispatch = 0; \
1352 radeon_freelist_reset( dev ); \ 1921 radeon_freelist_reset( dev ); \
@@ -1368,21 +1937,40 @@ do { \
1368 OUT_RING( age ); \ 1937 OUT_RING( age ); \
1369} while (0) 1938} while (0)
1370 1939
1940#define R600_DISPATCH_AGE(age) do { \
1941 OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \
1942 OUT_RING((R600_LAST_DISPATCH_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \
1943 OUT_RING(age); \
1944} while (0)
1945
1946#define R600_FRAME_AGE(age) do { \
1947 OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \
1948 OUT_RING((R600_LAST_FRAME_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \
1949 OUT_RING(age); \
1950} while (0)
1951
1952#define R600_CLEAR_AGE(age) do { \
1953 OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \
1954 OUT_RING((R600_LAST_CLEAR_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \
1955 OUT_RING(age); \
1956} while (0)
1957
1371/* ================================================================ 1958/* ================================================================
1372 * Ring control 1959 * Ring control
1373 */ 1960 */
1374 1961
1375#define RADEON_VERBOSE 0 1962#define RADEON_VERBOSE 0
1376 1963
1377#define RING_LOCALS int write, _nr; unsigned int mask; u32 *ring; 1964#define RING_LOCALS int write, _nr, _align_nr; unsigned int mask; u32 *ring;
1378 1965
1379#define BEGIN_RING( n ) do { \ 1966#define BEGIN_RING( n ) do { \
1380 if ( RADEON_VERBOSE ) { \ 1967 if ( RADEON_VERBOSE ) { \
1381 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ 1968 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \
1382 } \ 1969 } \
1383 if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ 1970 _align_nr = (n + 0xf) & ~0xf; \
1971 if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) { \
1384 COMMIT_RING(); \ 1972 COMMIT_RING(); \
1385 radeon_wait_ring( dev_priv, (n) * sizeof(u32) ); \ 1973 radeon_wait_ring( dev_priv, _align_nr * sizeof(u32)); \
1386 } \ 1974 } \
1387 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ 1975 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
1388 ring = dev_priv->ring.start; \ 1976 ring = dev_priv->ring.start; \
@@ -1399,19 +1987,16 @@ do { \
1399 DRM_ERROR( \ 1987 DRM_ERROR( \
1400 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ 1988 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
1401 ((dev_priv->ring.tail + _nr) & mask), \ 1989 ((dev_priv->ring.tail + _nr) & mask), \
1402 write, __LINE__); \ 1990 write, __LINE__); \
1403 } else \ 1991 } else \
1404 dev_priv->ring.tail = write; \ 1992 dev_priv->ring.tail = write; \
1405} while (0) 1993} while (0)
1406 1994
1995extern void radeon_commit_ring(drm_radeon_private_t *dev_priv);
1996
1407#define COMMIT_RING() do { \ 1997#define COMMIT_RING() do { \
1408 /* Flush writes to ring */ \ 1998 radeon_commit_ring(dev_priv); \
1409 DRM_MEMORYBARRIER(); \ 1999 } while(0)
1410 GET_RING_HEAD( dev_priv ); \
1411 RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \
1412 /* read from PCI bus to ensure correct posting */ \
1413 RADEON_READ( RADEON_CP_RB_RPTR ); \
1414} while (0)
1415 2000
1416#define OUT_RING( x ) do { \ 2001#define OUT_RING( x ) do { \
1417 if ( RADEON_VERBOSE ) { \ 2002 if ( RADEON_VERBOSE ) { \
diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index 8289e16419a..9836c705a95 100644
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -65,7 +65,7 @@ int radeon_enable_vblank(struct drm_device *dev, int crtc)
65{ 65{
66 drm_radeon_private_t *dev_priv = dev->dev_private; 66 drm_radeon_private_t *dev_priv = dev->dev_private;
67 67
68 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { 68 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
69 switch (crtc) { 69 switch (crtc) {
70 case 0: 70 case 0:
71 r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1); 71 r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1);
@@ -100,7 +100,7 @@ void radeon_disable_vblank(struct drm_device *dev, int crtc)
100{ 100{
101 drm_radeon_private_t *dev_priv = dev->dev_private; 101 drm_radeon_private_t *dev_priv = dev->dev_private;
102 102
103 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { 103 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
104 switch (crtc) { 104 switch (crtc) {
105 case 0: 105 case 0:
106 r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0); 106 r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0);
@@ -135,7 +135,7 @@ static inline u32 radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 *r
135 u32 irq_mask = RADEON_SW_INT_TEST; 135 u32 irq_mask = RADEON_SW_INT_TEST;
136 136
137 *r500_disp_int = 0; 137 *r500_disp_int = 0;
138 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { 138 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
139 /* vbl interrupts in a different place */ 139 /* vbl interrupts in a different place */
140 140
141 if (irqs & R500_DISPLAY_INT_STATUS) { 141 if (irqs & R500_DISPLAY_INT_STATUS) {
@@ -202,7 +202,7 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
202 DRM_WAKEUP(&dev_priv->swi_queue); 202 DRM_WAKEUP(&dev_priv->swi_queue);
203 203
204 /* VBLANK interrupt */ 204 /* VBLANK interrupt */
205 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { 205 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
206 if (r500_disp_int & R500_D1_VBLANK_INTERRUPT) 206 if (r500_disp_int & R500_D1_VBLANK_INTERRUPT)
207 drm_handle_vblank(dev, 0); 207 drm_handle_vblank(dev, 0);
208 if (r500_disp_int & R500_D2_VBLANK_INTERRUPT) 208 if (r500_disp_int & R500_D2_VBLANK_INTERRUPT)
@@ -265,7 +265,7 @@ u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc)
265 return -EINVAL; 265 return -EINVAL;
266 } 266 }
267 267
268 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { 268 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
269 if (crtc == 0) 269 if (crtc == 0)
270 return RADEON_READ(R500_D1CRTC_FRAME_COUNT); 270 return RADEON_READ(R500_D1CRTC_FRAME_COUNT);
271 else 271 else
@@ -327,7 +327,7 @@ void radeon_driver_irq_preinstall(struct drm_device * dev)
327 u32 dummy; 327 u32 dummy;
328 328
329 /* Disable *all* interrupts */ 329 /* Disable *all* interrupts */
330 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) 330 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
331 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 331 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
332 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 332 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
333 333
@@ -357,7 +357,7 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
357 if (!dev_priv) 357 if (!dev_priv)
358 return; 358 return;
359 359
360 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) 360 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
361 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 361 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
362 /* Disable *all* interrupts */ 362 /* Disable *all* interrupts */
363 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 363 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index ef940a079dc..fa728ec6ed3 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1556,9 +1556,15 @@ static void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_master *
1556 buf_priv->age = ++master_priv->sarea_priv->last_dispatch; 1556 buf_priv->age = ++master_priv->sarea_priv->last_dispatch;
1557 1557
1558 /* Emit the vertex buffer age */ 1558 /* Emit the vertex buffer age */
1559 BEGIN_RING(2); 1559 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
1560 RADEON_DISPATCH_AGE(buf_priv->age); 1560 BEGIN_RING(3);
1561 ADVANCE_RING(); 1561 R600_DISPATCH_AGE(buf_priv->age);
1562 ADVANCE_RING();
1563 } else {
1564 BEGIN_RING(2);
1565 RADEON_DISPATCH_AGE(buf_priv->age);
1566 ADVANCE_RING();
1567 }
1562 1568
1563 buf->pending = 1; 1569 buf->pending = 1;
1564 buf->used = 0; 1570 buf->used = 0;
@@ -1980,7 +1986,7 @@ static int alloc_surface(drm_radeon_surface_alloc_t *new,
1980 1986
1981 /* find a virtual surface */ 1987 /* find a virtual surface */
1982 for (i = 0; i < 2 * RADEON_MAX_SURFACES; i++) 1988 for (i = 0; i < 2 * RADEON_MAX_SURFACES; i++)
1983 if (dev_priv->virt_surfaces[i].file_priv == 0) 1989 if (dev_priv->virt_surfaces[i].file_priv == NULL)
1984 break; 1990 break;
1985 if (i == 2 * RADEON_MAX_SURFACES) { 1991 if (i == 2 * RADEON_MAX_SURFACES) {
1986 return -1; 1992 return -1;
@@ -2473,24 +2479,25 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil
2473 2479
2474 buf->used = indirect->end; 2480 buf->used = indirect->end;
2475 2481
2476 /* Wait for the 3D stream to idle before the indirect buffer
2477 * containing 2D acceleration commands is processed.
2478 */
2479 BEGIN_RING(2);
2480
2481 RADEON_WAIT_UNTIL_3D_IDLE();
2482
2483 ADVANCE_RING();
2484
2485 /* Dispatch the indirect buffer full of commands from the 2482 /* Dispatch the indirect buffer full of commands from the
2486 * X server. This is insecure and is thus only available to 2483 * X server. This is insecure and is thus only available to
2487 * privileged clients. 2484 * privileged clients.
2488 */ 2485 */
2489 radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end); 2486 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
2490 if (indirect->discard) { 2487 r600_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
2491 radeon_cp_discard_buffer(dev, file_priv->master, buf); 2488 else {
2489 /* Wait for the 3D stream to idle before the indirect buffer
2490 * containing 2D acceleration commands is processed.
2491 */
2492 BEGIN_RING(2);
2493 RADEON_WAIT_UNTIL_3D_IDLE();
2494 ADVANCE_RING();
2495 radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
2492 } 2496 }
2493 2497
2498 if (indirect->discard)
2499 radeon_cp_discard_buffer(dev, file_priv->master, buf);
2500
2494 COMMIT_RING(); 2501 COMMIT_RING();
2495 return 0; 2502 return 0;
2496} 2503}
@@ -3010,14 +3017,14 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
3010 break; 3017 break;
3011 case RADEON_PARAM_LAST_FRAME: 3018 case RADEON_PARAM_LAST_FRAME:
3012 dev_priv->stats.last_frame_reads++; 3019 dev_priv->stats.last_frame_reads++;
3013 value = GET_SCRATCH(0); 3020 value = GET_SCRATCH(dev_priv, 0);
3014 break; 3021 break;
3015 case RADEON_PARAM_LAST_DISPATCH: 3022 case RADEON_PARAM_LAST_DISPATCH:
3016 value = GET_SCRATCH(1); 3023 value = GET_SCRATCH(dev_priv, 1);
3017 break; 3024 break;
3018 case RADEON_PARAM_LAST_CLEAR: 3025 case RADEON_PARAM_LAST_CLEAR:
3019 dev_priv->stats.last_clear_reads++; 3026 dev_priv->stats.last_clear_reads++;
3020 value = GET_SCRATCH(2); 3027 value = GET_SCRATCH(dev_priv, 2);
3021 break; 3028 break;
3022 case RADEON_PARAM_IRQ_NR: 3029 case RADEON_PARAM_IRQ_NR:
3023 value = drm_dev_to_irq(dev); 3030 value = drm_dev_to_irq(dev);
@@ -3052,7 +3059,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
3052 case RADEON_PARAM_SCRATCH_OFFSET: 3059 case RADEON_PARAM_SCRATCH_OFFSET:
3053 if (!dev_priv->writeback_works) 3060 if (!dev_priv->writeback_works)
3054 return -EINVAL; 3061 return -EINVAL;
3055 value = RADEON_SCRATCH_REG_OFFSET; 3062 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
3063 value = R600_SCRATCH_REG_OFFSET;
3064 else
3065 value = RADEON_SCRATCH_REG_OFFSET;
3056 break; 3066 break;
3057 case RADEON_PARAM_CARD_TYPE: 3067 case RADEON_PARAM_CARD_TYPE:
3058 if (dev_priv->flags & RADEON_IS_PCIE) 3068 if (dev_priv->flags & RADEON_IS_PCIE)
@@ -3155,6 +3165,7 @@ void radeon_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
3155 3165
3156void radeon_driver_lastclose(struct drm_device *dev) 3166void radeon_driver_lastclose(struct drm_device *dev)
3157{ 3167{
3168 radeon_surfaces_release(PCIGART_FILE_PRIV, dev->dev_private);
3158 radeon_do_release(dev); 3169 radeon_do_release(dev);
3159} 3170}
3160 3171
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
index d465b2f9c1c..456cd040f31 100644
--- a/drivers/gpu/drm/savage/savage_bci.c
+++ b/drivers/gpu/drm/savage/savage_bci.c
@@ -599,8 +599,8 @@ int savage_driver_firstopen(struct drm_device *dev)
599 drm_mtrr_add(dev_priv->mtrr[2].base, 599 drm_mtrr_add(dev_priv->mtrr[2].base,
600 dev_priv->mtrr[2].size, DRM_MTRR_WC); 600 dev_priv->mtrr[2].size, DRM_MTRR_WC);
601 } else { 601 } else {
602 DRM_ERROR("strange pci_resource_len %08lx\n", 602 DRM_ERROR("strange pci_resource_len %08llx\n",
603 drm_get_resource_len(dev, 0)); 603 (unsigned long long)drm_get_resource_len(dev, 0));
604 } 604 }
605 } else if (dev_priv->chipset != S3_SUPERSAVAGE && 605 } else if (dev_priv->chipset != S3_SUPERSAVAGE &&
606 dev_priv->chipset != S3_SAVAGE2000) { 606 dev_priv->chipset != S3_SAVAGE2000) {
@@ -620,8 +620,8 @@ int savage_driver_firstopen(struct drm_device *dev)
620 drm_mtrr_add(dev_priv->mtrr[0].base, 620 drm_mtrr_add(dev_priv->mtrr[0].base,
621 dev_priv->mtrr[0].size, DRM_MTRR_WC); 621 dev_priv->mtrr[0].size, DRM_MTRR_WC);
622 } else { 622 } else {
623 DRM_ERROR("strange pci_resource_len %08lx\n", 623 DRM_ERROR("strange pci_resource_len %08llx\n",
624 drm_get_resource_len(dev, 1)); 624 (unsigned long long)drm_get_resource_len(dev, 1));
625 } 625 }
626 } else { 626 } else {
627 mmio_base = drm_get_resource_start(dev, 0); 627 mmio_base = drm_get_resource_start(dev, 0);
diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
index 0993b441fc4..bc2f5184300 100644
--- a/drivers/gpu/drm/via/via_drv.c
+++ b/drivers/gpu/drm/via/via_drv.c
@@ -28,11 +28,6 @@
28 28
29#include "drm_pciids.h" 29#include "drm_pciids.h"
30 30
31static int dri_library_name(struct drm_device *dev, char *buf)
32{
33 return snprintf(buf, PAGE_SIZE, "unichrome");
34}
35
36static struct pci_device_id pciidlist[] = { 31static struct pci_device_id pciidlist[] = {
37 viadrv_PCI_IDS 32 viadrv_PCI_IDS
38}; 33};
@@ -52,7 +47,6 @@ static struct drm_driver driver = {
52 .irq_uninstall = via_driver_irq_uninstall, 47 .irq_uninstall = via_driver_irq_uninstall,
53 .irq_handler = via_driver_irq_handler, 48 .irq_handler = via_driver_irq_handler,
54 .dma_quiescent = via_driver_dma_quiescent, 49 .dma_quiescent = via_driver_dma_quiescent,
55 .dri_library_name = dri_library_name,
56 .reclaim_buffers = drm_core_reclaim_buffers, 50 .reclaim_buffers = drm_core_reclaim_buffers,
57 .reclaim_buffers_locked = NULL, 51 .reclaim_buffers_locked = NULL,
58 .reclaim_buffers_idlelocked = via_reclaim_buffers_locked, 52 .reclaim_buffers_idlelocked = via_reclaim_buffers_locked,
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 09:04:04 -0500