aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/kernel/cputable.c
diff options
context:
space:
mode:
authorAnton Blanchard <anton@samba.org>2006-04-28 19:51:06 -0400
committerPaul Mackerras <paulus@samba.org>2006-04-28 20:56:58 -0400
commit03054d51a70e8c273df5d9bc31fea6c843eaa1c3 (patch)
tree44b1b9e52979a0b083edb5169c1ac328abd4c715 /arch/powerpc/kernel/cputable.c
parent09b03b6c29638eb5c79b02e585cb1b20d91a8ea0 (diff)
[PATCH] powerpc: Add cputable entry for POWER6
Add a cputable entry for the POWER6 processor. The SIHV and SIPR bits in the mmcra have moved in POWER6, so disable support for that until oprofile is fixed. Also tell firmware that we know about POWER6. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/cputable.c')
-rw-r--r--arch/powerpc/kernel/cputable.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 39e348a3ade..3f7182db9ed 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -57,6 +57,8 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 58#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 62#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
61 PPC_FEATURE_BOOKE) 63 PPC_FEATURE_BOOKE)
62 64
@@ -263,6 +265,20 @@ struct cpu_spec cpu_specs[] = {
263 .oprofile_type = PPC_OPROFILE_POWER4, 265 .oprofile_type = PPC_OPROFILE_POWER4,
264 .platform = "power5+", 266 .platform = "power5+",
265 }, 267 },
268 { /* Power6 */
269 .pvr_mask = 0xffff0000,
270 .pvr_value = 0x003e0000,
271 .cpu_name = "POWER6",
272 .cpu_features = CPU_FTRS_POWER6,
273 .cpu_user_features = COMMON_USER_POWER6,
274 .icache_bsize = 128,
275 .dcache_bsize = 128,
276 .num_pmcs = 6,
277 .cpu_setup = __setup_cpu_power4,
278 .oprofile_cpu_type = "ppc64/power6",
279 .oprofile_type = PPC_OPROFILE_POWER4,
280 .platform = "power6",
281 },
266 { /* Cell Broadband Engine */ 282 { /* Cell Broadband Engine */
267 .pvr_mask = 0xffff0000, 283 .pvr_mask = 0xffff0000,
268 .pvr_value = 0x00700000, 284 .pvr_value = 0x00700000,