diff options
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 16 | ||||
-rw-r--r-- | arch/powerpc/kernel/prom_init.c | 1 | ||||
-rw-r--r-- | include/asm-powerpc/cputable.h | 14 |
3 files changed, 27 insertions, 4 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 39e348a3ade..3f7182db9ed 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -57,6 +57,8 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); | |||
57 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) | 57 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) |
58 | #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ | 58 | #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ |
59 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) | 59 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) |
60 | #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ | ||
61 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) | ||
60 | #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ | 62 | #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ |
61 | PPC_FEATURE_BOOKE) | 63 | PPC_FEATURE_BOOKE) |
62 | 64 | ||
@@ -263,6 +265,20 @@ struct cpu_spec cpu_specs[] = { | |||
263 | .oprofile_type = PPC_OPROFILE_POWER4, | 265 | .oprofile_type = PPC_OPROFILE_POWER4, |
264 | .platform = "power5+", | 266 | .platform = "power5+", |
265 | }, | 267 | }, |
268 | { /* Power6 */ | ||
269 | .pvr_mask = 0xffff0000, | ||
270 | .pvr_value = 0x003e0000, | ||
271 | .cpu_name = "POWER6", | ||
272 | .cpu_features = CPU_FTRS_POWER6, | ||
273 | .cpu_user_features = COMMON_USER_POWER6, | ||
274 | .icache_bsize = 128, | ||
275 | .dcache_bsize = 128, | ||
276 | .num_pmcs = 6, | ||
277 | .cpu_setup = __setup_cpu_power4, | ||
278 | .oprofile_cpu_type = "ppc64/power6", | ||
279 | .oprofile_type = PPC_OPROFILE_POWER4, | ||
280 | .platform = "power6", | ||
281 | }, | ||
266 | { /* Cell Broadband Engine */ | 282 | { /* Cell Broadband Engine */ |
267 | .pvr_mask = 0xffff0000, | 283 | .pvr_mask = 0xffff0000, |
268 | .pvr_value = 0x00700000, | 284 | .pvr_value = 0x00700000, |
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 00ad7f981a0..078fb553354 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c | |||
@@ -686,6 +686,7 @@ static void __init early_cmdline_parse(void) | |||
686 | */ | 686 | */ |
687 | static unsigned char ibm_architecture_vec[] = { | 687 | static unsigned char ibm_architecture_vec[] = { |
688 | W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ | 688 | W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ |
689 | W(0xffff0000), W(0x003e0000), /* POWER6 */ | ||
689 | W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ | 690 | W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ |
690 | 5 - 1, /* 5 option vectors */ | 691 | 5 - 1, /* 5 option vectors */ |
691 | 692 | ||
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 4321483cce5..9fcf0162d85 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -22,6 +22,7 @@ | |||
22 | #define PPC_FEATURE_BOOKE 0x00008000 | 22 | #define PPC_FEATURE_BOOKE 0x00008000 |
23 | #define PPC_FEATURE_SMT 0x00004000 | 23 | #define PPC_FEATURE_SMT 0x00004000 |
24 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 | 24 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 |
25 | #define PPC_FEATURE_ARCH_2_05 0x00001000 | ||
25 | 26 | ||
26 | #ifdef __KERNEL__ | 27 | #ifdef __KERNEL__ |
27 | #ifndef __ASSEMBLY__ | 28 | #ifndef __ASSEMBLY__ |
@@ -320,6 +321,11 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
320 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 321 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
321 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | 322 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ |
322 | CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR) | 323 | CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR) |
324 | #define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | ||
325 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ | ||
326 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | ||
327 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | ||
328 | CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE) | ||
323 | #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 329 | #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
324 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ | 330 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ |
325 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 331 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
@@ -331,8 +337,8 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
331 | #ifdef __powerpc64__ | 337 | #ifdef __powerpc64__ |
332 | #define CPU_FTRS_POSSIBLE \ | 338 | #define CPU_FTRS_POSSIBLE \ |
333 | (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ | 339 | (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ |
334 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL | \ | 340 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ |
335 | CPU_FTR_CI_LARGE_PAGE) | 341 | CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE) |
336 | #else | 342 | #else |
337 | enum { | 343 | enum { |
338 | CPU_FTRS_POSSIBLE = | 344 | CPU_FTRS_POSSIBLE = |
@@ -376,8 +382,8 @@ enum { | |||
376 | #ifdef __powerpc64__ | 382 | #ifdef __powerpc64__ |
377 | #define CPU_FTRS_ALWAYS \ | 383 | #define CPU_FTRS_ALWAYS \ |
378 | (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ | 384 | (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ |
379 | CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL & \ | 385 | CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ |
380 | CPU_FTRS_POSSIBLE) | 386 | CPU_FTRS_CELL & CPU_FTRS_POSSIBLE) |
381 | #else | 387 | #else |
382 | enum { | 388 | enum { |
383 | CPU_FTRS_ALWAYS = | 389 | CPU_FTRS_ALWAYS = |