aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-sa1100
diff options
context:
space:
mode:
authorJeremy Kerr <jeremy.kerr@canonical.com>2010-07-06 06:30:06 -0400
committerNicolas Pitre <nico@fluxnic.net>2010-10-20 00:27:33 -0400
commit0ea1293009826da45e1019f45dfde1e557bb30df (patch)
tree7111bcd355921f03415182845e5f236ffe1896f4 /arch/arm/mach-sa1100
parent1ea64615601229f0dc16dee91dc5b50216411baa (diff)
arm: return both physical and virtual addresses from addruart
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r--arch/arm/mach-sa1100/include/mach/debug-macro.S36
1 files changed, 20 insertions, 16 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S
index 336adccea54..0cd0fc9635b 100644
--- a/arch/arm/mach-sa1100/include/mach/debug-macro.S
+++ b/arch/arm/mach-sa1100/include/mach/debug-macro.S
@@ -12,33 +12,37 @@
12*/ 12*/
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14 14
15 .macro addruart, rx, tmp 15 .macro addruart, rp, rv
16 mrc p15, 0, \rx, c1, c0 16 mrc p15, 0, \rp, c1, c0
17 tst \rx, #1 @ MMU enabled? 17 tst \rp, #1 @ MMU enabled?
18 moveq \rx, #0x80000000 @ physical base address 18 moveq \rp, #0x80000000 @ physical base address
19 movne \rx, #0xf8000000 @ virtual address 19 movne \rp, #0xf8000000 @ virtual address
20 20
21 @ We probe for the active serial port here, coherently with 21 @ We probe for the active serial port here, coherently with
22 @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h. 22 @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
23 @ We assume r1 can be clobbered. 23 @ We assume r1 can be clobbered.
24 24
25 @ see if Ser3 is active 25 @ see if Ser3 is active
26 add \rx, \rx, #0x00050000 26 add \rp, \rp, #0x00050000
27 ldr r1, [\rx, #UTCR3] 27 ldr \rv, [\rp, #UTCR3]
28 tst r1, #UTCR3_TXE 28 tst \rv, #UTCR3_TXE
29 29
30 @ if Ser3 is inactive, then try Ser1 30 @ if Ser3 is inactive, then try Ser1
31 addeq \rx, \rx, #(0x00010000 - 0x00050000) 31 addeq \rp, \rp, #(0x00010000 - 0x00050000)
32 ldreq r1, [\rx, #UTCR3] 32 ldreq \rv, [\rp, #UTCR3]
33 tsteq r1, #UTCR3_TXE 33 tsteq \rv, #UTCR3_TXE
34 34
35 @ if Ser1 is inactive, then try Ser2 35 @ if Ser1 is inactive, then try Ser2
36 addeq \rx, \rx, #(0x00030000 - 0x00010000) 36 addeq \rp, \rp, #(0x00030000 - 0x00010000)
37 ldreq r1, [\rx, #UTCR3] 37 ldreq \rv, [\rp, #UTCR3]
38 tsteq r1, #UTCR3_TXE 38 tsteq \rv, #UTCR3_TXE
39
40 @ clear top bits, and generate both phys and virt addresses
41 lsl \rp, \rp, #8
42 lsr \rp, \rp, #8
43 orr \rv, \rp, #0xf8000000 @ virtual
44 orr \rp, \rp, #0x80000000 @ physical
39 45
40 @ if all ports are inactive, then there is nothing we can do
41 moveq pc, lr
42 .endm 46 .endm
43 47
44 .macro senduart,rd,rx 48 .macro senduart,rd,rx