| Commit message (Collapse) | Author | Age |
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This patch adds support for dynamically calculating the size of all
low power code (suspend, ddr freq change and low power idle). This allows
for easy code changes in the future.
This patch also moves the DDR frequency change code from lower 8K of the memory
allocated for IRAM page table to regular IRAM. With this the lower 8K of the
IRAM page table only contains suspend/resume and low power IDLE code. This
gives a little more flexibility to the cdoe size for suspend/resume and low
power IDLE.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
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Using common mxc_restart interface to do restart instead of platform specific
interface of imx6sl_restart.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Enet get MAC address order:
From module parameters or kernel command line -> device tree ->
pfuse -> mac registers set by bootloader -> random mac address.
When there have no "fec.macaddr" parameters set in kernel command
line, enet driver get MAC address from device tree. And then if
the MAC address set in device tree and is valid, enet driver get
MAC address from device tree. Otherwise,enet get MAC address from
pfuse. So, in the condition, update the MAC address (read from pfuse)
to device tree.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Check the source setting in dts file to support different WDOG reset event.
Correct imx6sl_restart instead of mxc_restart.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Enable WAIT mode support for MX6SL. Need to ensure that the
ARM:IPG clock ratio is maintained at 12:5 when WFI is executed.
This is the fix for the WAIT mode issue on MX6SL.
Set AHB to 132Mhz at boot, which is the recommended freq for AHB.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Add CPUFREQ support for iMX6SL.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Enable suspend/resume function for i.MX6SL, currently
support standby and mem mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Config iomux-gpr1 to select clock source for fec system clock.
Clear gpr1[14], gpr1[18-17] bit to select the fec clock source
from internal anatop PLL.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl. With the support, user space can get soc related
info by looking at sysfs like below.
$ cat /sys/devices/soc0/machine
Freescale i.MX6 Quad SABRE Smart Device Board
$ cat /sys/devices/soc0/family
Freescale i.MX
$ cat /sys/devices/soc0/soc_id
i.MX6Q
$ cat /sys/devices/soc0/revision
1.2
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Add imx6sl support into imx_init_revision_from_anatop(), so that it can
be used to initialize cpu type and revision on imx6sl.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Add i.mx6sl cpu type check and i.mx6 series SOC check.
Signed-off-by: Anson Huang <b20788@freescale.com>
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The optimized L2 prefect and power setting done in imx_init_l2cache()
can also benefit imx6sl, so let's call the function on imx6sl as well.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Commit 53bb71da1c5c14267089218923585840f76e2480 upstream.
Instead of explicitly calling clock initialization functions, we can
declare the functions with CLK_OF_DECLARE() and then call common
of_clk_init() to have them invoked properly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Commit 31a2fbf70e1cf3fcd6623a928a5547a2c5c6733f upstream.
Add initial support for i.MX6 SoloLite.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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