| Commit message (Collapse) | Author | Age |
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suspend/resume
This patch ensures that the SCU and certain A9 CP15 registers state are maintained across
a suspend/resume cycle:
1. Need to ensure that SCU standby bit is set again after suspend/resume cycle, else
the system will never WAIT mode after a suspend/resume cycle. This bit should be enabled
on all SMP systems immaterial of whether CPUIDLE is enabled or not.
2. Several A9 errata workarounds involve setting bits in the ARM diagnostic register.
Save/restore this register across a suspend/resume cycle.
3. Save and restore the A9 power control register also.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
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Enable cpuidle on i.MX6SX, derive from i.MX6Q cpuidle driver.
Signed-off-by: Anson Huang <b20788@freescale.com>
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To support all i.MX6 SOCs' suspend/resume, need to
rename pm-imx6q.c to pm-imx6.c and move common code
of ccm setting from platform specific clk file to
pm-imx6.c to avoid duplicated code.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Correct CCM_CGPR bit17's name according to latest RM,
it is called INT_MEM_CLK_LPM.
Add parameter for setting CCM_CGPR_INT_MEM_CLK_LPM to
support both enable and disable setting.
Signed-off-by: Anson Huang <b20788@freescale.com>
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The code intializes the cpuidle driver at different places.
The cpuidle driver for :
* imx5 : is in the pm-imx5.c, the init function is in cpuidle.c
* imx6 : is in cpuidle-imx6q.c, the init function is in cpuidle.c
and cpuidle-imx6q.c
Instead of having the cpuidle code spread across different files,
let's create a driver for each SoC and use the common register function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The en_core_tk_irqen flag is set in all the cpuidle driver which
means it is not necessary to specify this flag.
Remove the flag and the code related to it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org> # for mach-omap2/*
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The initialization is done from the cpuidle framework.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Use the CPUIDLE_FLAG_TIMER_STOP and let the cpuidle framework
to handle the CLOCK_EVT_NOTIFY_BROADCAST_ENTER/EXIT when entering
this state.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Add WAIT mode (ARM core clock gating) support to imx6q cpuidle driver.
As WAIT mode is broken on imx6q TO 1.0 and 1.1, it only enables the
support for revision 1.2 with chicken bit set.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Move imx6q_cpuidle_driver into a separate file as more codes will
be added when WAIT mode gets implemented as cpuidle.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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