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* ENGR00317542-1 ARM:imx6x: Dynamically calculate the size of low power mode code.Ranjani Vaidyanathan2014-06-12
| | | | | | | | | | | | | This patch adds support for dynamically calculating the size of all low power code (suspend, ddr freq change and low power idle). This allows for easy code changes in the future. This patch also moves the DDR frequency change code from lower 8K of the memory allocated for IRAM page table to regular IRAM. With this the lower 8K of the IRAM page table only contains suspend/resume and low power IDLE code. This gives a little more flexibility to the cdoe size for suspend/resume and low power IDLE. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
* ENGR00315400 ARM: imx: add lpddr2 busfreq support for i.mx6sxAnson Huang2014-06-04
| | | | | | | | | | Add freq scaling for lpddr2 of i.MX6SX, support 3 setpoints: high -> 400MHz audio -> 100MHz low -> 24MHz Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00298524-2 ARM: imx: Add MSL support for i.mx6sxAnson Huang2014-04-16
| | | | | | | | | | | | | | It adds initial MSL support for i.mx6sx, including below features: 1. add cpu type check; 2. add system timer support; 3. add clock tree support; 4. add machine layer init support; Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> Acked-by: Jason Liu
* ARM: imx: replace imx6q_restart() with mxc_restart()Shawn Guo2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | The imx6q_restart() works fine with normal reboot but will run into problem with emergency reboot like sysrq-b. In that case, of_iomap() gets called from interrupt context and hence triggers the BUG_ON in __get_vm_area_node(). Actually, since commit c1e31d1 (ARM: imx: create mxc_arch_reset_init_dt() for DT boot), imx6q/dl should try to use mxc_restart() by calling mxc_arch_reset_init_dt() beforehand, where things like of_iomap() can be done. The patch updates mxc_restart() a little bit to get it work for imx6q/dl and kill imx6q_restart() completely. Reported-by: Nathan Lynch <nathan_lynch@mentor.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> (cherry picked from commit 87a84b69824d7fd63b20f3bc98d75c0238b8e7d0) Conflicts: arch/arm/mach-imx/mach-imx6q.c Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00281804 ARM: imx6: init enet MAC addressFugang Duan2014-04-16
| | | | | | | | | | | | | | | Enet get MAC address order: From module parameters or kernel command line -> device tree -> pfuse -> mac registers set by bootloader -> random mac address. When there have no "fec.macaddr" parameters set in kernel command line, enet driver get MAC address from device tree. And then if the MAC address set in device tree and is valid, enet driver get MAC address from device tree. Otherwise,enet get MAC address from pfuse. So, in the condition, update the MAC address (read from pfuse) to device tree. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00277382-2 [MX6SL] Add WaIT mode support for MX6SL.Ranjani Vaidyanathan2014-04-16
| | | | | | | | | | Enable WAIT mode support for MX6SL. Need to ensure that the ARM:IPG clock ratio is maintained at 12:5 when WFI is executed. This is the fix for the WAIT mode issue on MX6SL. Set AHB to 132Mhz at boot, which is the recommended freq for AHB. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00276023-2: ARM: imx: support LDO_BYPASS mode for imx6qdlRobin Gong2014-04-16
| | | | | | | Make code change for LDO_BYPASS mode. In LDO_BYPASS mode gpc will use dummy pu regulator to be notified by xPU driver. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00275821-1 ARM: imx: rename pm-imx6q.cAnson Huang2014-04-16
| | | | | | | | | To support all i.MX6 SOCs' suspend/resume, need to rename pm-imx6q.c to pm-imx6.c and move common code of ccm setting from platform specific clk file to pm-imx6.c to avoid duplicated code. Signed-off-by: Anson Huang <b20788@freescale.com>
* ARM: imx: Move anatop related from board file to anatop driverPeter Chen2014-04-16
| | | | | | | Move anatop related (For USB) from board file to anatop driver Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ENGR00275023-5 ARM: imx: Support standby mode for suspendAnson Huang2014-04-16
| | | | | | | | | Support standby mode for suspend, standby mode will only make CCM enter STOP mode with OSC on and no PMIC_STBY_REQ asserted, standby mode focus more on resume latency than power number. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00275023-2 ARM: imx: Correct CCM_CGPR bit17's nameAnson Huang2014-04-16
| | | | | | | | | | Correct CCM_CGPR bit17's name according to latest RM, it is called INT_MEM_CLK_LPM. Add parameter for setting CCM_CGPR_INT_MEM_CLK_LPM to support both enable and disable setting. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00274473-5 ARM: imx: Support PU regulator on/off dynamicallyAnson Huang2014-04-16
| | | | | | | | | | | | | 1. Change GPC to platform driver to support regulator nofication in order to implement dynamical PU regulator on/off; 2. Remove previous enabling PU regulator during kernel boot up, PU modules will handle it. 3. Support dynamical PU regulator on/off according to regulator notification. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00269945: ARM: imx6: report soc info via soc deviceShawn Guo2014-04-16
| | | | | | | | | | | | | | | | | | The patch enables soc bus infrastructure and adds a function imx_soc_device_init() to report soc info via soc device interface for imx6qdl and imx6sl. With the support, user space can get soc related info by looking at sysfs like below. $ cat /sys/devices/soc0/machine Freescale i.MX6 Quad SABRE Smart Device Board $ cat /sys/devices/soc0/family Freescale i.MX $ cat /sys/devices/soc0/soc_id i.MX6Q $ cat /sys/devices/soc0/revision 1.2 Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx6qdl: add a common function to initialize revision ↵Shawn Guo2014-04-16
| | | | | | | | | | | from anatop The patch creates a common function imx_init_revision_from_anatop() by merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any SoC that encodes revision info in anatop can use it to initialize revision. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx6qdl: use common soc revision helpersShawn Guo2014-04-16
| | | | | | | | It calls imx_set_soc_revision() to set up soc revision in imx6q_init_revision(), and replaces all the occurrences imx6q_revision() and imx6dl_revision() with common helper imx_get_soc_revision(). Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00269945: ARM: imx: add soc revision helper functionsShawn Guo2014-04-16
| | | | | | | | Similar to what we do for cpu type, the patch adds helper functions imx_set_soc_revision() and imx_get_soc_revision() to maintain imx_soc_revision in cpu.c. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ENGR00273425 ARM: imx: enable suspend code for imx6q/dlRobin Gong2014-04-16
| | | | | | | | Enable DSM code for imx6, the code porting form kernel 3.5.7.So with the patch, we can suspend imx6q, imx6dl from iram to decrease power number of DDR IO: save ~15mA@1.5V on imx6qsabresd, but need more ~30us in suspend and resume back. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00273867-1 ARM: imx: Enable cpuidle for i.mx6q and i.mx6dlAnson Huang2014-04-16
| | | | | | | | | | | | | Enable cpuidle for i.mx6q and i.mx6dl, two cpuidle levels supported: 1. Simple WFI; 2. WAIT mode enabled; Currently only i.mx6q > TO1.1 and i.mx6dl > TO1.0 support this feature, as they have WAIT mode available. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00269945 ARM: imx: Enable PU powerAnson Huang2014-04-16
| | | | | | | | | | | | | | PU is turned off in uboot, so we need to turn it on here to avoid kernel hang during GPU init. PU power enable need to follow the flows: 1. Enable xPU's clk; 2. Enable PU power rail and wait for PU power stable; 3. Enable PU power gate in GPC; Otherwise, some chips' PU may not work. Signed-off-by: Anson Huang <b20788@freescale.com>
* ARM: imx: let L2 initialization be a common functionShawn Guo2014-04-16
| | | | | | | | Move imx6q L2 initialization function imx6q_init_l2cache() into system.c, and rename it imx_init_l2cache(), so that other platforms other than imx6q can also use the function. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx6: use common of_clk_init() call to initialize clocksShawn Guo2014-04-16
| | | | | | | | | | | Commit 53bb71da1c5c14267089218923585840f76e2480 upstream. Instead of explicitly calling clock initialization functions, we can declare the functions with CLK_OF_DECLARE() and then call common of_clk_init() to have them invoked properly. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: add initial support for imx6slShawn Guo2014-04-16
| | | | | | | | | Commit 31a2fbf70e1cf3fcd6623a928a5547a2c5c6733f upstream. Add initial support for i.MX6 SoloLite. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: create mxc_arch_reset_init_dt() for DT bootShawn Guo2014-04-16
| | | | | | | | | | | | | Commit c1e31d126b4db6a3a8d96883fae40fe22d5eba65 upstream. The mxc_arch_reset_init() uses static mapping and calls clk_get_sys() to get clock. It's suitable for non-DT boot but not for DT boot where dynamic mapping and of_clk_get() should be used instead. Create mxc_arch_reset_init_dt() as the DT variant of mxc_arch_reset_init(), and change DT platforms to use it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: compile fix for hotplug.cShawn Guo2013-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit bca7a5a (ARM: cpu hotplug: remove majority of cache flushing from platforms) removes include of <asm/cacheflush.h> and hence discovers a few indirect inclusion and declaration problems as below. CC arch/arm/mach-imx/hotplug.o In file included from arch/arm/mach-imx/hotplug.c:16:0: arch/arm/mach-imx/common.h:100:29: warning: ‘struct pt_regs’ declared inside parameter list [enabled by default] arch/arm/mach-imx/common.h:100:29: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] arch/arm/mach-imx/common.h:101:29: warning: ‘struct pt_regs’ declared inside parameter list [enabled by default] arch/arm/mach-imx/hotplug.c: In function ‘imx_cpu_die’: arch/arm/mach-imx/hotplug.c:53:2: error: implicit declaration of function ‘cpu_do_idle’ [-Werror=implicit-function-declaration] arch/arm/mach-imx/hotplug.c: In function ‘imx_cpu_kill’: arch/arm/mach-imx/hotplug.c:58:26: error: ‘jiffies’ undeclared (first use in this function) arch/arm/mach-imx/hotplug.c:58:26: note: each undeclared identifier is reported only once for each function it appears in arch/arm/mach-imx/hotplug.c:58:2: error: implicit declaration of function ‘msecs_to_jiffies’ [-Werror=implicit-function-declaration] arch/arm/mach-imx/hotplug.c:61:3: error: implicit declaration of function ‘time_after’ [-Werror=implicit-function-declaration] Fix them by adding the needed inclusion and declaration. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM i.MX6q: export imx6q_revisionPhilipp Zabel2013-04-12
| | | | | | | So it can be used in clk-imx6q.c for revision dependent clock tree setup. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: enable RBC to support anatop LPM modeAnson Huang2013-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | RBC is to control whether some ANATOP sub modules can enter lpm mode when SOC is into STOP mode, if RBC is enabled and PMIC_VSTBY_REQ is set, ANATOP will have below behaviors: 1. Digital LDOs(CORE, SOC and PU) are bypassed; 2. Analog LDOs(1P1, 2P5, 3P0) are disabled; As the 2P5 is necessary for DRAM IO pre-drive in STOP mode, so we need to enable weak 2P5 in STOP mode when 2P5 LDO is disabled. For RBC settings, there are some rules as below due to hardware design: 1. All interrupts must be masked during operating RBC registers; 2. At least 2 CKIL(32K) cycles is needed after the RBC setting is changed. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: enable anatop suspend/resumeAnson Huang2013-04-12
| | | | | | | | | | | | | | Anatop module have sereval configurations for user to reduce the power consumption in suspend, provide suspend/resume interface for further use and enable fet_odrive to reduce CORE LDO leakage during suspend. As we have a common anatop file, remove all the operations of anatop module in other files, use anatop interfaces to do that. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge tag 'imx-cleanup-3.10' into imx/socShawn Guo2013-04-12
|\ | | | | | | | | | | | | | | | | | | | | The imx cleanup for 3.10: * Clean up a couple of unneeded function declarations * Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well as the replacement * Remove platform ahci support * Clean up unused ARCH/MACH Kconfig symbols * Remove a couple of unused files
| * ARM: imx: remove pl310_get_save_ptr() declarationShawn Guo2013-04-01
| | | | | | | | | | | | | | | | Commit a1f1c7e (arm/imx6q: add suspend/resume support) added declaration for a non-existing function pl310_get_save_ptr() by mistake. Remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: imx: remove duplicated function declarationShawn Guo2013-04-01
| | | | | | | | | | | | | | | | Commit 13eed98 (arm/imx6q: add device tree machine support) added duplicated function declaration for imx_enable_cpu() and imx_set_cpu_jump(). Remove them. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_killShawn Guo2013-03-26
|/ | | | | | | | | | | | | | | There is a sync issue with hotplug operation. It's possible that when imx_cpu_kill gets running on primary core, the imx_cpu_die execution on the core which is to be killed hasn't been finished yet. The problem will very likely be hit when running suspend without no_console_suspend setting on kernel cmdline. It uses cpu jumping argument register to sync imx_cpu_die and imx_cpu_kill. The register will be set in imx_cpu_die and imx_cpu_kill will wait for the register being cleared to actually kill the cpu. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: <stable@vger.kernel.org>
* Merge tag 'v3.8-rc6' into next/socOlof Johansson2013-02-05
|\ | | | | | | Linux 3.8-rc6
| * ARM: imx: disable cpu in .cpu_kill hookShawn Guo2013-01-14
| | | | | | | | | | | | | | | | | | | | | | It's buggy to disable the cpu that is being hot-unplugged in .cpu_die hook which runs on the cpu itself. Instead, it should be done in .cpu_kill which runs on the thread (another cpu) that asks for shutting down the cpu. Move imx_enable_cpu(cpu, false) call into .cpu_kill hook, and leave the cpu to be hot-unplugged in WFI within .cpu_die, so that we can get a more stable cpu hot-plug operation. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | Merge tag 'imx6q-cpudile-3.9' of ↵Olof Johansson2013-02-05
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc From Shawn Guo: imx6q cpuidle support for 3.9 - It's based on imx-cleanup-3.9 to avoid conflicts. * tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx6q: support WAIT mode using cpuidle ARM: imx: move imx6q_cpuidle_driver into a separate file ARM: imx: mask gpc interrupts initially ARM: imx: return zero in case next event gets a large increment ARM: imx: Remove mx508 support ARM: imx: Remove mach-mx51_3ds board ARM: imx: use debug_ll_io_init() for imx6q ARM: imx: remove unused imx6q_clock_map_io() ARM: mach-imx: Kconfig: Do not select Babbage for MACH_IMX51_DT Signed-off-by: Olof Johansson <olof@lixom.net> Still, two delete/change conflicts caused by imx/cleanup: arch/arm/mach-imx/mach-mx50_rdp.c arch/arm/mach-imx/mach-mx51_3ds.c
| * | ARM: imx6q: support WAIT mode using cpuidleShawn Guo2013-01-30
| | | | | | | | | | | | | | | | | | | | | | | | Add WAIT mode (ARM core clock gating) support to imx6q cpuidle driver. As WAIT mode is broken on imx6q TO 1.0 and 1.1, it only enables the support for revision 1.2 with chicken bit set. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: Remove mx508 supportFabio Estevam2013-01-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN for several releases. mx508 currently lacks clock support. In case someone needs to add mx508 support back, then the recommended approach is to use device tree. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: use debug_ll_io_init() for imx6qShawn Guo2013-01-29
| | | | | | | | | | | | | | | | | | | | | Use debug_ll_io_init() to map low level debug port for imx6q, so that arch/arm/mach-imx/lluart.c can be removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx: remove unused imx6q_clock_map_io()Shawn Guo2013-01-29
| |/ | | | | | | | | | | | | imx6q_clock_map_io() becomes an empty function since imx6q clock driver is moved to common clock framework. It's used nowhere now. Remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* / ARM: remove mach .handle_irq for GIC usersRob Herring2013-01-12
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM i.MX25: Add devicetree supportSascha Hauer2012-11-12
| | | | | | | | This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: call mxc_device_init() in soc specific functionShawn Guo2012-10-14
| | | | | | | | | | | | | mxc_device_init() is a core_initcall function used to register devices for mxc_aips_bus and mxc_ahb_bus, which are needed by gpio and dma device registration. Instead of being a core_initcall function, we have it called in soc specific initialization function before gpio and dma devices get registered, so that it will not be called for other platforms when we enable multi-platform support for imx. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: include common.h rather than mach/common.hShawn Guo2012-10-14
Rename mach-imx/include/mach/common.h to mach-imx/common.h and update all users to include common.h rather than mach/common.h. It also removes an unneeded inclusion to common.h in mach-imx/devices/devices.c. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
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