| Commit message (Collapse) | Author | Age |
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only enable this module in specific dts file.
Signed-off-by: Allen Xu <b45815@freescale.com>
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Add new dts file and enable gpmi module.
Signed-off-by: Allen Xu <b45815@freescale.com>
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The QuadSPI driver has a workaround to check if M4 is using QuadSPI NOR
flash. When M4 is running on QuadSPI NOR, the QuadSPI driver will quit.
This workaround has a bug when system booting from QuadSPI NOR.
Therefore, removed the workaround and disabled the QuadSPI driver in
MCC specific DTB. The MCC DTB will let the QuadSPI driver to disabled,
not conflict with M4.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6733ca3382ddb6358f4ccf8dd4f16d8f65995241)
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M4 has occupied the ADC1 and ADC2 in RDC, must disable them in DTS
to avoid kernel boot panic.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 046b1c214af6740e7936aae6876941e79c10da8e)
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enable dual camera support on imx6sx-sdb.
For camera ov5640, need an adapter (sch 700-28342)
For VADC, need expansion board (sch 700-26109)
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit ce4e36b59f225b3af75ba04accde746049a58cb4)
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GPIO17 is used by headphone jack. if don't config the PAD setting, the
gpio value is not correct.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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On imx6dl dcic2 clock gate depend on dcic1,
so setting dcic1 as disp-axi clock for dcic2 in imx6qdl dts.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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We met an issue that access the 0x2600 offset of message ram
does not work although the mx6sx spec claims a 16KB size.
The reason is still unkown.
Change the RAM size to a small size to use the first 2K
to avoid such issue.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Gpr item is remove from vadc dts by dcic patch incorrectly.
It should add back, otherwise vadc driver can not initialized.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit f24c5f76c18745c3b6b7562a873dedf0d4a3c321)
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Enable dcic driver for imx6sx ARM2 and SDB board.
Setting LCDIF pins bit 4 for loopback to dcic.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit bf508e6be22d077043c071477250e208621aefd2)
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Enable dcic driver for imx6q/dl SabreSD and SabreAI
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit eec9deb496b20e9dba0de071da9fdfdf779895b3)
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Becuase in fsl_csi.c, there's a function call as follows.
id = of_alias_get_id(pdev->dev.of_node, "csi");
The corresponding change has been made for imx6sx, but not for imx6sl.
This patch fixed it by making an alias csi0.
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit a5738d856fd5a8176f04a5eb316dfd512603ab4a)
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csi_id property is missing in dts file for imx6sl-evk board, which
causes the following kernel dump when insert the csi_v4l2_capture module.
This patch fixed it.
csi_v4l2 csi_v4l2_cap.22: csi_id missing or invalid
Unable to handle kernel NULL pointer dereference at virtual address 00000034
pgd = a8774000
[00000034] *pgd=a957f831, *pte=00000000, *ppte=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP ARM
Modules linked in: csi_v4l2_capture(+) fsl_csi ov5642_camera ov5640_camera evbug
CPU: 0 PID: 829 Comm: modprobe Not tainted 3.10.31-1.1.0_beta+g3c16fd0 #1
task: a881ef00 ti: a892c000 task.ti: a892c000
PC is at csi_v4l2_probe+0x2a0/0x35c [csi_v4l2_capture]
LR is at csi_v4l2_probe+0x290/0x35c [csi_v4l2_capture]
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit d0173b8ba4027983b2b9e988fafb64124ccb9731)
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csi_id property is missing in dts file for imx6sx-sdb board, which
causes the following kernel dump when insert the csi_v4l2_capture module.
This patch fixed it.
udevd[122]: starting version 182
csi_v4l2 csi1_v4l2_cap.29: csi_id missing or invalid
Unable to handle kernel NULL pointer dereference at virtual address 00000034
pgd = a8c50000
[00000034] *pgd=a8c2f831, *pte=00000000, *ppte=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP ARM
Modules linked in: evbug csi_v4l2_capture(+) fsl_csi
CPU: 0 PID: 147 Comm: udevd Not tainted 3.10.31-01988-gd965cfd-dirty #831
task: a8c95a40 ti: a8c4c000 task.ti: a8c4c000
PC is at csi_v4l2_probe+0x58/0xfc [csi_v4l2_capture]
LR is at csi_v4l2_probe+0x50/0xfc [csi_v4l2_capture]
pc : [<7f007efc>] lr : [<7f007ef4>] psr: a00f0113
sp : a8c4de40 ip : 600f0113 fp : 00097220
r10: 7f00c000 r9 : a8c4c000 r8 : 7f009d78
r7 : 00000000 r6 : a80ec810 r5 : a80ec800 r4 : 7f009f30
r3 : a8c03000 r2 : 00000000 r1 : a8c03000 r0 : 00000000
Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c53c7d Table: a8c5004a DAC: 00000015
Process udevd (pid: 147, stack limit = 0xa8c4c238)
Stack: (0xa8c4de40 to 0xa8c4e000)
This patch also changed csi_id for vadc to 1.
Signed-off-by: Robby Cai <r63905@freescale.com>
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Make the linux mmc index to be fixed according to controller order.
This can make user easily to identify which mmcX corresponding to which
controller and kernel be able find the rootfs in a card plugged in a
specific slot persistently.
This is a eventually solution for finding mmc block devices correctly
for different cards on multi slots.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit d6aa7401f65fbe5458e5459526d84405fdf4d078)
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Add CSI2 support.
use CSI2 for VADC instead of CSI1.
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit 9de447e3c715fa570c145bdd2e9692f59b0072a3)
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make the alias for two CSI ports.
Signed-off-by: Robby Cai <r63905@freescale.com>
(cherry picked from commit 3ba09b29305103b466cc4afa038df9b77818d3c5)
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Add device tree for spdif in sx-sdb board.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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Enable SoC usb charger detect function
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add the required clocks for the dispmix on/off operation.
This include clocks definition and initialization.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
(cherry picked from commit 638acb3c30b135901631e59c9938e06422cc4b76)
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mode option.
The driver for android team need to enalbe mma8451 fifo overflow interrupt feather.
So add the interrupt option into device tree.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from commit 443fd43f454215f615ee326ddb02911e05bcd2ae)
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The current imx6q clock driver combines two mux clocks axi_alt_sel and
axi_sel into one, while axi_alt_sel is a glitchy mux and axi_sel is a
glitchless one. Fix it to match the clock tree in Reference Manual,
and update busfreq driver regarding parent switching on that. Note,
the parent checking before calling clk_set_parent() in busfreq driver
isn't really necessary, because clk API will make the check and do
nothing if the new parent is the same one as the old.
One thing clk API clients need to take care is that clk_set_parent()
can be called on glitchy axi_alt_sel only when axi_sel selects the other
path, i.e. periph. Otherwise, a glitch could be generated on
axi_alt_sel and get propagated into the divider axi_podf. In that case,
axi_podf gets locked up and axi clock has no output.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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The usdhc could also be wakeup source, thus add it into the mege_fast
wakeup source list.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The mmc core will reserve the mmc index for the specific controller
by add mmc alias in device tree.
There's an eMMC chip on sabresd board on uSDHC slot 4.
We want it be fixed to mmc0 to be used for finding rootfs persistently.
So adding Alias mmc0 to usdhc4 in device tree.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 4cd99820322abca9c9d2b82ee2513aa9d096c02b)
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For imx6sx 17x17/19x19 arm2 board, add enet as mege_fast wakeup source.
For imx6sx sdb board, it don't support wake on lan, so it cannot support
enet as mega_fast wake up source.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Introduce a new dtb imx6sx-sdb-canfd.dtb due to pin conflict with flexcan.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The clock sources from ASRC, ESAI and MLB are not actually from CCM but
outside PAD inputs. So we these clock sources over here are totally wrong
and should be fixed.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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Add Mega/Fast domain's wakeup source info for kernel, if there
is wakeup source in Mega/Fast domain enabled, then this domain's
power can NOT be disabled in DSM.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Allocate 4K of IRAM space for DDR freq change code in the dts files.
Also reduce the regular IRAM available for other functions by this amount.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
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LCDIF1 pin conflict with camera, ov5640 driver is disabled in
imx6sx 19x19 arm2 lcdif1 dts file,
v4l2 capture function shouldn't disabled in the dts,
remove the disable code.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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This is pretty much an example to demonstrate how the GPIO6 workaround
for bug ERR006687 (ENET: Only the ENET wake-up interrupt request can
wake the system from Wait mode) should be applied for a board.
Basically it requires a setup of MX6QDL_PAD_GPIO_6__ENET_IRQ in pinctrl
entry, and an overwrite on the property interrupts-extended to replace
the ENET GIC IRQ with GPIO1_6.
Since the pad GPIO6 is used by I2C3 on the board, we have to create
sabresd-enetirq.dts with I2C3 disabled to enable this workaround.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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commit 454cf8f54d9918c8017f2eee7fb0138927ef2afd upstream.
We need to be able to override interrupts in board file to
workaround a hardware bug for ethernet interrupts
waking the processor by using interrupts-extended.
So, use interrupts-extended here as well.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Conflicts:
arch/arm/boot/dts/imx6qdl.dtsi
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commit d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2 upstream.
From "Chip Errata for the i.MX 6Dual/6Quad"
ERR006687 ENET: Only the ENET wake-up interrupt request can wake the
system from Wait mode.
The ENET block generates many interrupts. Only one of these interrupt lines
is connected to the General Power Controller (GPC) block, but a logical OR
of all of the ENET interrupts is connected to the General Interrupt Controller
(GIC). When the system enters Wait mode, a normal RX Done or TX Done does not
wake up the system because the GPC cannot see this interrupt. This impacts
performance of the ENET block because its interrupts are serviced only when
the chip exits Wait mode due to an interrupt from some other wake-up source.
Adding MX6QDL_PAD_GPIO_6__ENET_IRQ is the 1st step to
workaround this problem.
The input reg is set to 0x3c to set IOMUX_OBSRV_MUX1 to ENET_IRQ.
The mux reg value is 0x11, so that the observable mux is routed to
this pin and to the gpio controller(sion bit). These magic values
come from Ranjani Vaidyanathan's patch:
"ENGR00257847-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active"
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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commit 78119fd1068cc068f6112a57a5f6de0e5b20245a upstream.
Commit 2361613206e6, "of/irq: Refactor interrupt-map parsing" introduced
a bug. The irq parsing will fail for some nodes that don't have a reg
property. It is fixed by deferring the check for reg until it is
actually needed. Also adjust the testcase data to catch the bug.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Ming Lei <tom.leiming@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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commit 79d9701559a9f3e9b2021fbd292f5e70ad75f686 upstream.
The standard interrupts property in device tree can only handle
interrupts coming from a single interrupt parent. If a device is wired
to multiple interrupt controllers, then it needs to be attached to a
node with an interrupt-map property to demux the interrupt specifiers
which is confusing. It would be a lot easier if there was a form of the
interrupts property that allows for a separate interrupt phandle for
each interrupt specifier.
This patch does exactly that by creating a new interrupts-extended
property which reuses the phandle+arguments pattern used by GPIOs and
other core bindings.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kumar Gala <galak@codeaurora.org>
[grant.likely: removed versatile platform hunks into separate patch]
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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commit a9f10ca76d784023fc45f01f025b54e9960f4ec1 upstream.
This patch extends the DT selftest code with some test cases for the
interrupt parsing functions.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Add enet magic pattern support for imx6sx arm2 platforms.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The upsteamed commit is 0c516b4ff85c0be4cee5b30ae59c9565c7f91a00
ASoC: cs42xx8: Add codec driver support for CS42448/CS42888
This patch adds support for the Cirrus Logic CS42448/CS42888 Audio CODEC that
has six/four 24-bit AD and eight 24-bit DA converters.
[ CS42448/CS42888 supports both I2C and SPI control ports. As initial patch,
this patch only adds the support for I2C. ]
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Brian Austin <brian.austin@cirrus.com>
Acked-by: Paul Handrigan <Paul.Handrigan@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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Add cpufreq related opp info to support cpufreq
driver for i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Create standalone dts for a9 when m4 is running, since there
are some conflictions in the following modules
* i2c3
* flexcan1&2
* uart2
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add busfreq support;
Signed-off-by: Anson Huang <b20788@freescale.com>
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cherry-picked commit is 43d24e76b69826ce32292f47060ad78cdd0197fa
Header of this commit is "ASoC: fsl_esai: Add ESAI CPU DAI driver", use upstream
driver to replace current one.
Merged feature is:
1. Move setting of PRRC and PCRC to the end of hw_params, and disable it in
shutdown function.
2. Merged the xrun handler with this commit.
3. Use dma init with NO_RESIDUE|NO_DT|COMPAT.
4. Add spba clock for ESAI
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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There are three clock for ESAI, esai_extal, esai_ipg, esai_mem.
Make the clock for ESAI more clear.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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We disable spdif and sai in imx6sx-*-arm2.dts and only enable them
in their sub-dts like imx6sx-17x17-arm2-spdif.dts while we haven't
put the sound nodes into the sub-dts because the dependancy between
sound and spdif/sai. This would result people get the frequent -517
probe error everytime they insert a new device or module.
So this patch puts them to the sub-dts.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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Add imx6sx-17x17-arm2-mlb.dtb in devicetree makefile list
Signed-off-by: Luwei Zhou <b45643@freescale.com>
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Since we changed asrc_p2p's DT bindings to support record case, we should
update it in imx6sx platform as well.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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Change the output-rate, output-width to p2p-rate, p2p-width.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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csi camera ov5640 pin conflict with esai and sai
in 19x19 arm2 board, add this file to resolve it.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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Add vadc item in imx6sx.dtsi
and enable it in 19x19 arm2 and sdb board.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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The eMMC interface is shared with uSDHC4 BOOT card slot and the eMMC chip is
DNP by default. User needs burn the eMMC chip onto the board manually and
do hw rework to enable eMMC signals.
We create a new dts imx6sx-sdb-emmc.dts for easy eMMC test after doing hw rework.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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